FCC ID: 2AD3BJAP85110 CloudPets 11.5 inch Bear

PO06643-/)\ Ht Al Ais

(76.2*3)x127mm-2015-01-17 STEP 7 - Invite Friends & Family 1. Select the friends button. 2. Enter friends or families email address or phone number. 3. Confirm you want to add them as a friend. 4. Friend or family will receive an email with a link to the CloudPets App and to register their own account. Reset/Troubleshooting 1. To Reset, hold both paw buttons down simultaneously (at the same time). 2. While holding the paw buttons turn the Power button OFF and back ON. 3. Heart light will turn on and go solid for 2 seconds. Please go to www.cloudpets.com for additional instructions and troubleshooting. Warning: Changes or modifications to this unit not BATTERY SAFETY INFORMATION expressly approved by the party responsible for Only batteries of the same or equivalent type as compliance could void the user's authority to operate recommended are to be used. the equipment. Batteries are to be inserted in position according NOTE: This equipment has been tested and found to to polarity. Do not mix old and new batteries. Do not mix alkaline, standard (carbon-zinc) or rechargeable batteries. Dispose of batteries safely and correctly Remove batteries if the toy will not be used for a comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed long period of time. and used in accordance with the instructions, may Exhausted batteries are to be removed from cause harmful interference to radio communications. the toy. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. 4 Do not use rechargeable batteries. Non-rechargeable batteries are not to be recharged. Batteries should be replaced under adult supervision. Do not dispose of batteries in fire. Different types of batteries are not to be mixed. INSTRUCTIONS STEP 1 - Insert Batteries CR 1. Remove battery cover. 2. Insert 3 AN/LRG batteries, (NCQMEMUANNED <2) _

(= mm of

(not included) 3. Turn power to ON position. Note: When the toy is powered on correctly the heart will flash 2 times. STEP 2 - Download Apps iOS App on the App Store 1. Go to App store on your device. 2. Type CloudPets. 3. Download Free App. Perle Mom r App Store Apple Devices Supported iPhone 4S and later, iPad 3 and later, iPad Mini, and iPod 5 and later. Android App on Google Play 1. Go to App store on your device. 2. Type CloudPets. 3. Download Free App. Android Devices Supported Most Android Devices supporting Bluetooth 4.0 Technolo-

gy. Device must have Android 4.2.2 or later. STEP 3 - Set Up Account 1. Open App once downloaded. 2. Enter valid email address. 3. Enter Password. 4

. Press Create Account button. Note: Account will be created and a verification email will be sent to you. 1

> eee tel The supply terminals are not to be short circuited. Please read carefully with a parent or guardian, parental supervision required. Read and keep all packaging for future reference. Colors may vary. Please remove all packaging attachments, and any other components which are not part of the toy before giving to a child. OboudPets www.CloudPets.com Manufactured for and Distributed by Jay at Play Int'l HK Ltd., a subsidiary of Jay Franco & Sons, Inc. 295 5th Ave. New York, NY 10016. Jay at Play. TM & 2014

@) DEMAND. CloudPets and a Message You Can Hug are registered trademarks of On Demand and provided under license to Jay at Play Int'l HK, Ltd. US Patent Pending. Apple, the Apple logo, iPhone, iPad, and iPod touch are trademarks of Apple Inc., registered in the U.S. and other countries. App Store is a service mark of Apple Inc. Google Play is a trademark of Google Inc. 4sral } Bluetooth SMART CloudPetsApp 2014 and associated marks and logos are trademarks of Spiral. The Bluetooth trademarks are owned by Bluetooth SIG, Inc. and are used under license by Spiral. BATTERY RECYCLING INFORMATION Help the environment by disposing of batteries responsibly. The wheelie bin symbol indicates that batteries must not be disposed of in domestic waste as they contain substances which can be damaging to the environment and health. Please use designated collection points or recycling facilities when disposing of batteries. STEP 4 - Connect to Toy

. Once Account is verified press the Login button. Verify if you want to send your account key to toy and press yes. Note: if the toy already has a key, it can be reset. Refer to Reset/Troubleshooting toy. The toy is connected when the button on the upper left hand corner is green. If the button is red, follow the instructions on the CloudPets App to connect the toy or go to www.cloudpets.com for more instructions. STEP 5 - Play Features Go to CloudPets App for:

Messaging Features

* Toy Interactions Games

* Stories Ensure your toy is connected (showing the green button) and follow the App instructions. For more support go to www.cloudpets.com. Messaging Feature 1. Make sure you have a supported device. 2. Ensure that your bluetooth is turned ON in your settings. 3. Ensure that your device is at all times within 10 meters (30 feet) from your toy. 4. Friends/Family can connect to your CloudPets App through our CloudPets Cloud. INSTRUCTIONS How it works!

Note: You will receive notifications when messages are received from friends or family. Ensure that your CloudPets App is on and that your device is within 70 meters (30 feet) from your toy. STEP 6 - Send, Listen, & Record Messages

. Follow the CloudPets App for instructions to send a message. When the heart blinks, your CloudPet has received a message. Press the left paw

(blue button) to hear your message. Once the message has played you can answer the sender by pressing the right paw (red button). The heart will blink while you record your message. Press the red button again to stop recording. This automatically sends the message!

. The App will inform the sender when they have received a message from the CloudPet. They can listen to the message on their smart device and send a new message in reply. 3 tome

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INTERTEK TESTING SERVICE Report No.: 15011051HKG-001 Equipment Photographs Model : 85115

(Internal) FCC ID: 2AD3BJAP85110 INTERTEK TESTING SERVICE Report No.: 15011051HKG-001 Equipment Photographs Model : 85115

(Internal) FCC ID: 2AD3BJAP85110 INTERTEK TESTING SERVICE Report No.: 15011051HKG-001 Equipment Photographs Model : 85115

(Internal) FCC ID: 2AD3BJAP85110 INTERTEK TESTING SERVICE Equipment Photographs Report No.: 15011051HKG-001 Model : 85115

(Internal) FCC ID: 2AD3BJAP85110

INTERTEK TESTING SERVICE Report No.: 15011051HKG-001 Equipment Photographs Model : 85115

(External) FCC ID: 2AD3BJAP85110

20mm FCC ID: 2AD3BJAP85110 This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and

(2) this device must accept any interference received, including interference that may cause undesired operation. sew space

45mm information

MicroPhone Play BuGon Record BuGon LED 2M Flash SPI SPI Bus ADC Sonix Chip DAC TI 2541 BT Radio TesJng and Programming I/O UART TX/RX Discrete Component Circuit Matching Inverted-F Antenna CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com BLOCK DIAGRAM A block diagram of the CC2541 is shown in Figure 9. The modules can be roughly divided into one of three categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related modules. In the following subsections, a short description of each module is given. Figure 9. CC2541 Block Diagram 18 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 SFRbusSFRbusMEMORYARBITRATOR8051CPUCOREDMAFLASHSRAMFLASH CTRLDEBUGINTERFACERESETRESET_NP2_4P2_3P2_2P2_1P2_0P1_4P1_3P1_2P1_1P1_0P1_7P1_6P1_5P0_4P0_3P0_2P0_1P0_0P0_7P0_6P0_532.768-kHzCRYSTALOSC32-MHZCRYSTALOSCHIGH SPEEDRC-OSC32-kHzRC-OSCCLOCK MUXandCALIBRATIONRAMUSART0USART1TIMER1 (16-Bit)TIMER3(8-bit)TIMER2(BLELLTIMER)TIMER4(8-bit)AESENCRYPTIONandDECRYPTIONWATCHDOG TIMERIRQCTRLFLASHUNIFIEDRF_PRF_NSYNTHMODULATORPOWER-ON RESETBROWN OUTRADIOREGISTERSPOWER MGT.CONTROLLERSLEEPTIMERPDATAXRAMIRAMSFRXOSC_Q2XOSC_Q1DSADCAUDIO/DCDIGITALANALOGMIXEDVDD(2 V3.6 V)DCOUPLON-CHIPVOLTAGEREGULATORLink Layer EngineFREQUENCYSYNTHESIZERI2CDEMODULATORRECEIVETRANSMITOP-ANALOG COMPARATORI/OCONTROLLER1-KB SRAMRadioArbiterFIFOCTRLSDASCL

1122334455667788DDCCBBAATitleNumberRevisionSizeA2Date:2015/1/22 Sheet ofFile:F:\\..\ToyFi_ImgA .SchDocDrawn By:1of1DVDD210P0_613GND1SCL2SDA3NC4P2_036P2_135P2_234P1_011P1_19P1_46P1_37P1_28P1_55P1_737P0_514P0_415P0_217P0_316P0_019P0_118P0_712P1_638RESET_N20GND41RBIAS30DCOUPL40XOSC_Q223XOSC_Q122P2_3 / OSC32K_Q233P2_4 / OSC32K_Q132RF_N26RF_P25AVDD631AVDD429AVDD128AVDD227AVDD324AVDD521DVDD139U3CC2541F256RHATGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDVCC_CC2541GNDCC2541_DCCC2541_RESETnCC2541_DDGNDCC2541_DDCC2541_DCCC2541_RESETnLED_DRVBUTTON1BUTTON2GNDSNC_MOSISNC_SCKSNC_MISOPROCESSOR / BLUETOOTH 4.0 RADIOBUTTON / LED HEADERANT1PCB Inverted AntennaB11GND2B23GND4LED+5GND6CN22.54mm*6VCC_CC254121MIC1VSSCS#1SO/SIO12WP#3GND4SI/SIO05SCLK6HOLD#7VCC8U2GD25Q16BMOSIMISOSCKCSPlace 0.1 uF bypass caps as close to power pins as possibleVSSVSSAVSSVCC_CC25413V3_REG3V3_REG1234P2Header 4*2DDVCCRESETnDCCSSCKMOSIMISOGND3V3_SNC7232VSS3V3_REGGNDGNDGNDGNDVBATT_INGNDPOWER SUPPLYGND3V3_REGR2610KR10+C14.7uF+C394.7uF+C222uFC30.1uF+C274.7uF21354U1AP7331-33WG-7TP9TP1021CN1Bat INP0.34P0.23P0.12P0.01P0.45P0.56P0.67P0.78VDDIO9VSSIO10P0.811P0.912P0.1013P0.1114P0.1215P0.1316P0.1417P0.1518VPP19VSS5A_PPDAC20DAON21VDD5A_PPDAC22DAOP23VSS5A_PPDAC24VDDIO25P1.726P1.627VSSIO28P1.529P1.430P1.331P1.232P1.133P1.034VCOIN35P_RESET136P_TEST037VDD5_REG38VDD39GND40MIC_N41MIC_P42REFH43VMIC44VSS_AD45VDD_AD46U4IC-SNC7232FB11000OHMC112.2uFC100.1uFC90.1uFC8220pFC70.1uFC60.1uFC51uFC40.1uFC37NCC331pFL35.1nHL21nHL42nHL12nHC311pFC351pFC3418pFC3218pFC1715pFC1615pFC1512pFC1412pFY132.768KHzY232MHzC131uFR456KGNDC121nFR32.26KTP38TP22TP23TP11TP12TP13TP14R90R210KR2310KR2410KR6330+C364.7uFC300.1uFC250.22uFC260.22uFR185.1KR172.2KC2910uFR152.2K21RESET1C220.1uFR1247KR143.3KC210.1uFC243300pFTP24MOSIMISOSCKCSTP1TP3TP4TP2C180.1uFTP17TP1821SPKY332.768KHzC1920pFC2020pFK11P2T(SS-12F41)P1.4P0.0P0.2TP21TP19TP5TP25TP26TP27TP28TP29TP30TP32TP34TP6TP36TP33P0.1P0.3SNC_CSCC2541 BusySNC7232 BusyRESETVOUTREGP0.4P0.5P0.6P0.7VPPVSSVSSAVSSAVSSVDDAVOUTREGVSSVSSP1.7P1.6P1.4P1.5DAONDAOPVSSAVSSAVSSAVSSAMIC_PVSSAVSSAMIC_NVSSVOUTREGP_RESET1VCOINVOUTREGVSSP1.5VSSVSSVOUTREG+C404.7uFC230.1uFVOUTREGVSSR100R110VDDAVSSVSSATP7TP8OTP WriterP_RESET1VPPP0.0P0.212345678P3CN-Header 4*212345678910P1Header 5*2CC2541 RequesCMD/DATACC2541 BusySNC_CSSNC_MISOCC2541 RequesSNC7232 BusySNC_SCKSNC_MOSICMD/DATAVMICVDDA_ADRESETVSSA+C384.7uFVDDAR5NCVDDA_ADVSSVOUTREGVBATT_INRecPlay

Jay at Play International HK Ltd Suite 1003-4, Houston Centre 63 Mody Road, TST East Kowloon, Hong Kong Tel.: 852.2735.8844 Letter of Agency

, an Officer of Jay at Play Int'l HK Ltd do hereby authorize Intertek Testing Services (Mr. Terry Chan / Koo Wai Ip / Kenneth Wong) to act on our behalf in front of the Federal Communications Commission with respect to all matters relating to certification of equipment under Part 15 and Part 18 of the FCC Rules until further notice."

| further certify that no party (as defined in 1.2002(b) of CFR 47, 2004) to this application, including myself, is subject to a denial of federal benefits, that includes FCC benefits, pursuant to Section 5301 of the Anti-Drug Abuse Act of 1988, 21 U.S.C.,862. Dated this _13th_ day _ January of 2015 oleh Ta oa ARSLULI Cola]

iq nted Name Managing Director Title who signs this authorization letter must be the grantee contact of record in the Remark: The person Grantee Code data base.

Technical Description The Equipment Under Test (EUT) is a Recording Toy Bear, equipped with Bluetooth 4.0. The EUT operates in the frequency range 2402MHz to 2480MHz (39 channels with 2 MHz spacing). The EUT is powered by 4.5VDC

(3 x 1.5V AA Batteries). When the recording is sending the LED (red colour) on the panel of the unit will be flashed. It can be controlled by iPhone via Bluetooth communication. Antenna Type: Internal integral antenna Antenna Gain: 0dBi Nominal rated field strength: 92.5dBV/m at 3m Maximum allowed field strength of production tolerance: +/- 3dB The functions of main ICs are mentioned below. 1)2.4GHz BT transceiver;

i) U3 (CC2541) acts as the Bluetooth RF Chipset. ii) Y1 acts as 32.768KHz Oscillator. iii) Y2 acts as 32MHz Oscillator. 2) U1 acts as a Power Supply. 3) U2 acts as a Flash memory. 4) U4 (IC-SNC7232) acts as a Sonix Chip. CC2541 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 2.4-GHz Bluetooth low energy and Proprietary System-on-Chip Check for Samples: CC2541 1FEATURES 23 RF 2.4-GHz Bluetooth low energy Compliant and Proprietary RF System-on-Chip Supports 250-kbps, 500-kbps, 1-Mbps, 2-

Mbps Data Rates Excellent Link Budget, Enabling Long-

Range Applications Without External Front End Programmable Output Power up to 0 dBm Excellent Receiver Sensitivity (94 dBm at 1 Mbps), Selectivity, and Blocking Performance High-Performance and Low-Power 8051 Microcontroller Core With Code Prefetch In-System-Programmable Flash, 128- or 256-KB 8-KB RAM With Retention in All Power Modes Hardware Debug Support Extensive Baseband Automation, Including Auto-Acknowledgment and Address Decoding Retention of All Relevant Registers in All Power Modes Suitable for Systems Targeting Compliance Peripherals With Worldwide Radio Frequency Regulations: ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15

(US), and ARIB STD-T66 (Japan) Layout Few External Components Reference Design Provided 6-mm 6-mm QFN-40 Package Pin-Compatible With CC2540 (When Not Using USB or I2C) Low Power Active-Mode RX Down to: 17.9 mA Active-Mode TX (0 dBm): 18.2 mA Power Mode 1 (4-s Wake-Up): 270 A Power Mode 2 (Sleep Timer On): 1 A Power Mode 3 (External Interrupts): 0.5 A Wide Supply-Voltage Range (2 V3.6 V) TPS62730 Compatible Low Power in Active Mode RX Down to: 14.7 mA (3-V supply) TX (0 dBm): 14.3 mA (3-V supply) White space White space White space White space White space White space Microcontroller 1 Powerful Five-Channel DMA General-Purpose Timers (One 16-Bit, Two 8-Bit) IR Generation Circuitry 32-kHz Sleep Timer With Capture Accurate Digital RSSI Support Battery Monitor and Temperature Sensor 12-Bit ADC With Eight Channels and Configurable Resolution AES Security Coprocessor Two Powerful USARTs With Support for Several Serial Protocols 23 General-Purpose I/O Pins

(21 4 mA, 2 20 mA) I2C interface 2 I/O Pins Have LED Driving Capabilities Watchdog Timer Integrated High-Performance Comparator Development Tools CC2541 Evaluation Module Kit

(CC2541EMK) CC2541 Mini Development Kit (CC2541DK-

MINI) SmartRF Software IAR Embedded Workbench Available Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2Bluetooth is a trademark of Bluetooth SIG, Inc.. 3ZigBee is a registered trademark of ZigBee Alliance. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 20122013, Texas Instruments Incorporated CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com SOFTWARE FEATURES Bluetooth v4.0 Compliant Protocol Stack for CC2541 WITH TPS62730 TPS62730 is a 2-MHz Step-Down Converter Single-Mode BLE Solution Complete Power-Optimized Stack, Including Controller and Host GAP Central, Peripheral, Observer, or Broadcaster (Including Combination Roles) ATT / GATT Client and Server SMP AES-128 Encryption and Decryption L2CAP Sample Applications and Profiles Generic Applications for GAP Central and Peripheral Roles Proximity, Accelerometer, Simple Keys, and Battery GATT Services More Applications Supported in BLE Software Stack Multiple Configuration Options Single-Chip Configuration, Allowing Applications to Run on CC2541 Network Processor Interface for Applications Running on an External Microcontroller BTool Windows PC Application for Evaluation, Development, and Test 2.4-GHz Bluetooth low energy Systems APPLICATIONS Proprietary 2.4-GHz Systems Human-Interface Devices (Keyboard, Mouse, Remote Control) Sports and Leisure Equipment Mobile Phone Accessories Consumer Electronics With Bypass Mode Extends Battery Lifetime by up to 20%

Reduced Current in All Active Modes 30-nA Bypass Mode Current to Support Low-

Power Modes RF Performance Unchanged Small Package Allows for Small Solution Size CC2541 Controllable the combines The CC2541 DESCRIPTION The CC2541 is a power-optimized true system-on-

chip (SoC) solution for both Bluetooth low energy and proprietary 2.4-GHz applications. It enables robust network nodes to be built with low total bill-of-material costs. excellent performance of a leading RF transceiver with an industry-standard enhanced 8051 MCU, in-system programmable flash memory, 8-KB RAM, and many other powerful supporting features and peripherals. The CC2541 is highly suited for systems where ultralow power consumption is required. This is specified by various operating modes. Short transition times between operating modes further enable low power consumption. The CC2541 is pin-compatible with the CC2540 in the 6-mm 6-mm QFN40 package, if the USB is not used on the CC2540 and the I2C/extra I/O is not used on the CC2541. Compared to the CC2540, the CC2541 provides lower RF current consumption. The CC2541 does not have the USB interface of the CC2540, and provides lower maximum output power in TX mode. The CC2541 also adds a HW I2C interface. The CC2541 is pin-compatible with the CC2533 RF4CE-optimized IEEE 802.15.4 SoC. The CC2541 comes in two different versions:

CC2541F128/F256, with 128 KB and 256 KB of flash memory, respectively. For the CC2541 block diagram, see Figure 1. 2 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. integrated circuits be handled with ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. CC2541 Figure 1. Block Diagram Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: CC2541 SFRbusSFRbusMEMORYARBITRATOR8051CPUCOREDMAFLASHSRAMFLASH CTRLDEBUGINTERFACERESETRESET_NP2_4P2_3P2_2P2_1P2_0P1_4P1_3P1_2P1_1P1_0P1_7P1_6P1_5P0_4P0_3P0_2P0_1P0_0P0_7P0_6P0_532.768-kHzCRYSTALOSC32-MHZCRYSTALOSCHIGH SPEEDRC-OSC32-kHzRC-OSCCLOCK MUXandCALIBRATIONRAMUSART0USART1TIMER1 (16-Bit)TIMER3(8-bit)TIMER2(BLELLTIMER)TIMER4(8-bit)AESENCRYPTIONandDECRYPTIONWATCHDOG TIMERIRQCTRLFLASHUNIFIEDRF_PRF_NSYNTHMODULATORPOWER-ON RESETBROWN OUTRADIOREGISTERSPOWER MGT.CONTROLLERSLEEPTIMERPDATAXRAMIRAMSFRXOSC_Q2XOSC_Q1DSADCAUDIO/DCDIGITALANALOGMIXEDVDD(2 V3.6 V)DCOUPLON-CHIPVOLTAGEREGULATORLink Layer EngineFREQUENCYSYNTHESIZERI2CDEMODULATORRECEIVETRANSMITOP-ANALOG COMPARATORI/OCONTROLLER1-KB SRAMRadioArbiterFIFOCTRLSDASCL CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS(1) over operating free-air temperature range (unless otherwise noted) Supply voltage Voltage on any digital pin Input RF level Storage temperature range ESD (2) All supply pins must have the same voltage All pins, excluding pins 25 and 26, according to human-body model, JEDEC STD 22, method A114 All pins, according to human-body model, JEDEC STD 22, method A114 According to charged-device model, JEDEC STD 22, method C101 MIN 0.3 0.3 40 MAX 3.9 VDD + 0.3 3.9 10 125 2 1 500 UNIT V V dBm C kV kV V

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) CAUTION: ESD sesnsitive device. Precautions should be used when handling the device in order to prevent permanent damage. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) Operating ambient temperature range, TA Operating supply voltage MIN NOM MAX 40 85 3.6 2 UNIT C V ELECTRICAL CHARACTERISTICS Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V, 1 Mbps, GFSK, 250-kHz deviation, Bluetooth low energy mode, and 0.1% BER PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RX mode, standard mode, no peripherals active, low MCU activity RX mode, high-gain mode, no peripherals active, low MCU activity TX mode, 20 dBm output power, no peripherals active, low MCU activity TX mode, 0 dBm output power, no peripherals active, low MCU activity Power mode 1. Digital regulator on; 16-MHz RCOSC and 32-

MHz crystal oscillator off; 32.768-kHz XOSC, POR, BOD and sleep timer active; RAM and register retention Power mode 2. Digital regulator off; 16-MHz RCOSC and 32-

MHz crystal oscillator off; 32.768-kHz XOSC, POR, and sleep timer active; RAM and register retention Power mode 3. Digital regulator off; no clocks; POR active;

RAM and register retention Low MCU activity: 32-MHz XOSC running. No radio or peripherals. Limited flash access, no RAM access. Timer 1. Timer running, 32-MHz XOSC used Timer 2. Timer running, 32-MHz XOSC used Timer 3. Timer running, 32-MHz XOSC used Timer 4. Timer running, 32-MHz XOSC used Sleep timer, including 32.753-kHz RCOSC ADC, when converting 17.9 20.2 16.8 18.2 270 1 0.5 6.7 90 90 60 70 0.6 1.2 mA A mA A mA Icore Core current consumption Iperi Peripheral current consumption

(Adds to core current Icore for each peripheral unit activated) 4 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 CC2541 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 GENERAL CHARACTERISTICS Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V PARAMETER WAKE-UP AND TIMING Power mode 1 Active Power mode 2 or 3 Active Active TX or RX RX/TX turnaround RADIO PART RF frequency range Data rate and modulation format TEST CONDITIONS MIN TYP MAX UNIT Digital regulator on, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of 16-MHz RCOSC Digital regulator off, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of regulator and 16-MHz RCOSC Crystal ESR = 16 . Initially running on 16-MHz RCOSC, with 32-MHz XOSC OFF With 32-MHz XOSC initially on Proprietary auto mode BLE mode Programmable in 1-MHz steps 2 Mbps, GFSK, 500-kHz deviation 2 Mbps, GFSK, 320-kHz deviation 1 Mbps, GFSK, 250-kHz deviation 1 Mbps, GFSK, 160-kHz deviation 500 kbps, MSK 250 kbps, GFSK, 160-kHz deviation 250 kbps, MSK 4 120 500 180 130 150 s s s s s 2379 2496 MHz RF RECEIVE SECTION Measured on Texas Instruments CC2541 EM reference design with TA = 25C, VDD = 3 V, fc = 2440 MHz PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 2 Mbps, GFSK, 500-kHz Deviation, 0.1% BER Receiver sensitivity Saturation Co-channel rejection In-band blocking rejection Frequency error tolerance (1) Symbol rate error tolerance (2) 2 Mbps, GFSK, 320-kHz Deviation, 0.1% BER Receiver sensitivity Saturation Co-channel rejection BER < 0.1%

Wanted signal at 67 dBm 2 MHz offset, 0.1% BER, wanted signal 67 dBm 4 MHz offset, 0.1% BER, wanted signal 67 dBm 6 MHz or greater offset, 0.1% BER, wanted signal 67 dBm Including both initial tolerance and drift. Sensitivity better than 67dBm, 250 byte payload. BER 0.1%

Maximum packet length. Sensitivity better than67dBm, 250 byte payload. BER 0.1%

BER < 0.1%

Wanted signal at 67 dBm 2 MHz offset, 0.1% BER, wanted signal 67 dBm 4 MHz offset, 0.1% BER, wanted signal 67 dBm 6 MHz or greater offset, 0.1% BER, wanted signal 67 dBm Including both initial tolerance and drift. Sensitivity better than 67 dBm, 250 byte payload. BER 0.1%

Maximum packet length. Sensitivity better than 67 dBm, 250 byte payload. BER 0.1%

In-band blocking rejection Frequency error tolerance(1) Symbol rate error tolerance (2) 300 120 dBm dBm dB dB 300 kHz 120 ppm dBm dBm dB dB 90 1 9 2 36 41 86 7 12 1 34 39 300 120 300 kHz 120 ppm

(1) Difference between center frequency of the received RF signal and local oscillator frequency

(2) Difference between incoming symbol rate and the internally generated symbol rate Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: CC2541 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com RF RECEIVE SECTION (continued) Measured on Texas Instruments CC2541 EM reference design with TA = 25C, VDD = 3 V, fc = 2440 MHz PARAMETER TEST CONDITIONS 1 Mbps, GFSK, 250-kHz Deviation, Bluetooth low energy Mode, 0.1% BER MIN TYP MAX UNIT Receiver sensitivity (3) (4) Saturation(4) Co-channel rejection(4) In-band blocking rejection (4) Out-of-band blocking rejection(4) Intermodulation(4) Frequency error tolerance (5) High-gain mode Standard mode BER < 0.1%

Wanted signal 67 dBm 1 MHz offset, 0.1% BER, wanted signal 67 dBm 2 MHz offset, 0.1% BER, wanted signal 67 dBm 3 MHz offset, 0.1% BER, wanted signal 67 dBm

>6 MHz offset, 0.1% BER, wanted signal 67 dBm Minimum interferer level < 2 GHz (Wanted signal 67 dBm) Minimum interferer level [2 GHz, 3 GHz] (Wanted signal 67 dBm) Minimum interferer level > 3 GHz (Wanted signal 67 dBm) Minimum interferer level Including both initial tolerance and drift. Sensitivity better than -67dBm, 250 byte payload. BER 0.1%

Maximum packet length. Sensitivity better than 67 dBm, 250 byte payload. BER 0.1%

Symbol rate error tolerance (6) 1 Mbps, GFSK, 160-kHz Deviation, 0.1% BER Receiver sensitivity (7) Saturation Co-channel rejection BER < 0.1%

Wanted signal 10 dB above sensitivity level 1-MHz offset, 0.1% BER, wanted signal 67 dBm 2-MHz offset, 0.1% BER, wanted signal 67 dBm 3-MHz offset, 0.1% BER, wanted signal -67 dBm

>6-MHz offset, 0.1% BER, wanted signal 67 dBm Including both initial tolerance and drift. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

Maximum packet length. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

BER < 0.1%

Wanted signal 67 dBm 1-MHz offset, 0.1% BER, wanted signal 67 dBm 2-MHz offset, 0.1% BER, wanted signal 67 dBm

>2-MHz offset, 0.1% BER, wanted signal 67 dBm Including both initial tolerance and drift. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

Maximum packet length. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

In-band blocking rejection Frequency error tolerance(5) Symbol rate error tolerance (6) 500 kbps, MSK, 0.1% BER Receiver sensitivity(7) Saturation Co-channel rejection In-band blocking rejection Frequency error tolerance Symbol rate error tolerance mode. 94 88 5 6 2 26 34 33 21 25 7 36 91 0 9 2 24 27 32 99 0 5 20 27 28 dBm dBm dB dB dBm dBm 250 kHz 80 ppm dBm dBm dB dB 200 kHz 80 ppm dBm dBm dB dB 250 80 200 80 150 80 150 kHz 80 ppm

(3) The receiver sensitivity setting is programmable using a TI BLE stack vendor-specific API command. The default value is standard

(4) Results based on standard-gain mode.

(5) Difference between center frequency of the received RF signal and local oscillator frequency

(6) Difference between incoming symbol rate and the internally generated symbol rate

(7) Results based on high-gain mode. 6 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 RF RECEIVE SECTION (continued) Measured on Texas Instruments CC2541 EM reference design with TA = 25C, VDD = 3 V, fc = 2440 MHz PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CC2541 250 kbps, GFSK, 160 kHz Deviation, 0.1% BER Receiver sensitivity (8) Saturation Co-channel rejection BER < 0.1%

Wanted signal -67 dBm 1-MHz offset, 0.1% BER, wanted signal 67 dBm 2-MHz offset, 0.1% BER, wanted signal 67 dBm

>2-MHz offset, 0.1% BER, wanted signal 67 dBm Including both initial tolerance and drift. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

Maximum packet length. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

BER < 0.1%

Wanted signal -67 dBm 1-MHz offset, 0.1% BER, wanted signal 67 dBm 2-MHz offset, 0.1% BER, wanted signal 67 dBm

>2-MHz offset, 0.1% BER, wanted signal 67 dBm Including both initial tolerance and drift. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

Maximum packet length. Sensitivity better than 67 dBm, 250-byte payload. BER 0.1%

f < 1 GHz f > 1 GHz In-band blocking rejection Frequency error tolerance (9) Symbol rate error tolerance (10) 250 kbps, MSK, 0.1% BER Receiver sensitivity (11) Saturation Co-channel rejection In-band blocking rejection Frequency error tolerance Symbol rate error tolerance ALL RATES/FORMATS Spurious emission in RX. Conducted measurement Spurious emission in RX. Conducted measurement 98 0 3 23 28 29 99 0 5 20 29 30 67 57 dBm dBm dB dB 150 kHz 80 ppm dBm dBm dB dB 150 kHz 80 ppm dBm dBm 150 80 150 80

(8) Results based on standard-gain mode.

(9) Difference between center frequency of the received RF signal and local oscillator frequency

(10) Difference between incoming symbol rate and the internally generated symbol rate

(11) Results based on high-gain mode. Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: CC2541 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com RF TRANSMIT SECTION Measured on Texas Instruments CC2541 EM reference design with TA = 25C, VDD = 3 V and fc = 2440 MHz PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output power Delivered to a single-ended 50- load through a balun using maximum recommended output power setting Delivered to a single-ended 50- load through a balun using minimum recommended output power setting Programmable output power Delivered to a single-ended 50- load through a balun using range minimum recommended output power setting f < 1 GHz Spurious emission conducted f > 1 GHz measurement 0 23 23 52 48 dBm dB dBm dBm Optimum load impedance Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan) Differential impedance as seen from the RF port (RF_P and RF_N) toward the antenna 70 +j30 Designs with antenna connectors that require conducted ETSI compliance at 64 MHz should insert an LC resonator in front of the antenna connector. Use a 1.6-nH inductor in parallel with a 1.8-pF capacitor. Connect both from the signal trace to a good RF ground. CURRENT CONSUMPTION WITH TPS62730 Measured on Texas Instruments CC2541 TPA62730 EM reference design with TA = 25C, VDD = 3 V and fc = 2440 MHz, 1 Mbsp, GFSK, 250-kHz deviation, Bluetooth low energy Mode, 1% BER (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Current consumption RX mode, standard mode, no peripherals active, low MCU activity, MCU at 1 MHz RX mode, high-gain mode, no peripherals active, low MCU activity, MCU at 1 MHz TX mode, 20 dBm output power, no peripherals active, low MCU activity, MCU at 1 MHz TX mode, 0 dBm output power, no peripherals active, low MCU activity, MCU at 1 MHz 14.7 16.7 13.1 14.3 mA

(1) 0.1% BER maps to 30.8% PER 32-MHz CRYSTAL OSCILLATOR Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V PARAMETER Crystal frequency Crystal frequency accuracy requirement (1) Equivalent series resistance Crystal shunt capacitance Crystal load capacitance Start-up time Power-down guard time ESR C0 CL TEST CONDITIONS The crystal oscillator must be in power down for a guard time before it is used again. This requirement is valid for all modes of operation. The need for power-down guard time can vary with crystal type and load. MIN 40 6 1 10 3 TYP MAX UNIT MHz 32 40 60 7 16 ppm pF pF ms ms 0.25

(1) Including aging and temperature dependency, as specified by [1]

8 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 CC2541 32.768-kHz CRYSTAL OSCILLATOR Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V PARAMETER TEST CONDITIONS Crystal frequency Crystal frequency accuracy requirement (1) Equivalent series resistance Crystal shunt capacitance Crystal load capacitance Start-up time ESR C0 CL MIN 40

(1) Including aging and temperature dependency, as specified by [1]

32-kHz RC OSCILLATOR Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V. PARAMETER TEST CONDITIONS MIN Calibrated frequency (1) Frequency accuracy after calibration Temperature coefficient (2) Supply-voltage coefficient (3) Calibration time (4) 32.768 TYP MAX UNIT kHz ppm k pF pF s 40 130 2 16 40 0.9 12 0.4 TYP MAX UNIT kHz 32.753 0.2%

0.4 3 2

%/C

%/V ms

(1) The calibrated 32-kHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 977.

(2) Frequency drift when temperature changes after calibration

(3) Frequency drift when supply voltage changes after calibration

(4) When the 32-kHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator is performed while SLEEPCMD.OSC32K_CALDIS is set to 0. 16-MHz RC OSCILLATOR Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V PARAMETER TEST CONDITIONS MIN Frequency (1) Uncalibrated frequency accuracy Calibrated frequency accuracy Start-up time Initial calibration time (2) TYP 16 18%

0.6%

10 50 MAX UNIT MHz s s

(1) The calibrated 16-MHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 2.

(2) When the 16-MHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator is performed while SLEEPCMD.OSC_PD is set to 0. Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: CC2541 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com RSSI CHARACTERISTICS Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V 2 Mbps, GFSK, 320-kHz Deviation, 0.1% BER and 2 Mbps, GFSK, 500-kHz Deviation, 0.1% BER PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Useful RSSI range (1) RSSI offset(1) Absolute uncalibrated accuracy(1) Step size (LSB value) All Other Rates/Formats Useful RSSI range (1) RSSI offset(1) Absolute uncalibrated accuracy(1) Step size (LSB value) Reduced gain by AGC algorithm High gain by AGC algorithm Reduced gain by AGC algorithm High gain by AGC algorithm Standard mode High-gain mode Standard mode High-gain mode 64 64 79 99 6 1 64 64 98 107 3 1 dB dBm dB dB dB dBm dB dB

(1) Assuming CC2541 EM reference design. Other RF designs give an offset from the reported value. FREQUENCY SYNTHESIZER CHARACTERISTICS Measured on Texas Instruments CC2541 EM reference design with TA = 25C, VDD = 3 V and fc = 2440 MHz PARAMETER TEST CONDITIONS MIN Phase noise, unmodulated carrier At 1-MHz offset from carrier At 3-MHz offset from carrier At 5-MHz offset from carrier ANALOG TEMPERATURE SENSOR Measured on Texas Instruments CC2541 EM reference design with TA = 25C and VDD = 3 V PARAMETER TEST CONDITIONS MIN Output Temperature coefficient Voltage coefficient Initial accuracy without calibration Accuracy using 1-point calibration Current consumption when enabled Measured using integrated ADC, internal band-gap voltage reference, and maximum resolution MAX UNIT dBc/Hz TYP 109 112 119 TYP MAX 1480 4.5 1 10 5 0.5 UNIT 12-bit

/ 1C 0.1 V C C mA COMPARATOR CHARACTERISTICS TA = 25C, VDD = 3 V. All measurement results are obtained using the CC2541 reference designs, post-calibration. TEST CONDITIONS MIN PARAMETER Common-mode maximum voltage Common-mode minimum voltage Input offset voltage Offset vs temperature Offset vs operating voltage Supply current Hysteresis V TYP MAX UNIT VDD 0.3 1 16 4 230 0.15 mV V/C mV/V nA mV 10 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 www.ti.com ADC CHARACTERISTICS TA = 25C and VDD = 3 V PARAMETER TEST CONDITIONS Input voltage VDD is voltage on AVDD5 pin External reference voltage VDD is voltage on AVDD5 pin External reference voltage differential VDD is voltage on AVDD5 pin Input resistance, signal Full-scale signal (1) CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 Simulated using 4-MHz clock speed Peak-to-peak, defines 0 dBFS Single-ended input, 7-bit setting Single-ended input, 9-bit setting Single-ended input, 10-bit setting Single-ended input, 12-bit setting Differential input, 7-bit setting Differential input, 9-bit setting Differential input, 10-bit setting Differential input, 12-bit setting 10-bit setting, clocked by RCOSC 12-bit setting, clocked by RCOSC 7-bit setting, both single and differential Single ended input, 12-bit setting, 6 dBFS(1) Differential input, 12-bit setting, 6 dBFS(1) Single-ended input, 12-bit setting(1) Differential input, 12-bit setting(1) Single-ended input, 12-bit setting, 6 dBFS(1) Differential input, 12-bit setting, 6 dBFS(1) Differential input, 12-bit setting, 1-kHz sine

(0 dBFS), limited by ADC resolution Single ended input, 12-bit setting, 1-kHz sine

(0 dBFS), limited by ADC resolution Midscale 12-bit setting, mean(1) 12-bit setting, maximum(1) 12-bit setting, mean(1) 12-bit setting, maximum(1) 12-bit setting, mean, clocked by RCOSC 12-bit setting, max, clocked by RCOSC Single ended input, 7-bit setting(1) Single ended input, 9-bit setting(1) Single ended input, 10-bit setting(1) Single ended input, 12-bit setting(1) Differential input, 7-bit setting(1) Differential input, 9-bit setting(1) Differential input, 10-bit setting(1) Differential input, 12-bit setting(1) 7-bit setting 9-bit setting 10-bit setting 12-bit setting MIN 0 0 0 TYP MAX VDD VDD VDD 197 2.97 5.7 7.5 9.3 10.3 6.5 8.3 10 11.5 9.7 10.9 020 75.2 86.6 70.2 79.3 78.8 88.9

>84

>84 3 0.68%

0.05 0.9 4.6 13.3 10 29 35.4 46.8 57.5 66.6 40.7 51.6 61.8 70.8 20 36 68 132 UNIT V V V k V bits kHz dB dB dB dB mV LSB LSB dB s ENOB(1) Effective number of bits Useful power bandwidth THD Total harmonic distortion Signal to nonharmonic ratio CMRR Common-mode rejection ratio Crosstalk Offset Gain error DNL Differential nonlinearity INL Integral nonlinearity SINAD

(THD+N) Signal-to-noise-and-distortion Conversion time

(1) Measured with 300-Hz sine-wave input and VDD as reference. Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: CC2541 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 ADC CHARACTERISTICS (continued) TA = 25C and VDD = 3 V PARAMETER Power consumption Internal reference VDD coefficient Internal reference temperature coefficient Internal reference voltage CONTROL INPUT AC CHARACTERISTICS TA = 40C to 85C, VDD = 2 V to 3.6 V TEST CONDITIONS MIN www.ti.com TYP MAX 1.2 4 UNIT mA mV/V 0.4 1.24 mV/10C V PARAMETER System clock, fSYSCLK tSYSCLK = 1/ fSYSCLK RESET_N low duration Interrupt pulse duration TEST CONDITIONS MIN TYP MAX UNIT The undivided system clock is 32 MHz when crystal oscillator is used. The undivided system clock is 16 MHz when calibrated 16-MHz RC oscillator is used. See item 1, Figure 2. This is the shortest pulse that is recognized as a complete reset pin request. Note that shorter pulses may be recognized but do not lead to complete reset of all modules within the chip. See item 2, Figure 2.This is the shortest pulse that is recognized as an interrupt request. 16 1 20 32 MHz s ns Figure 2. Control Input AC Characteristics 12 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 RESET_NPx.nT0299-0112 TEST CONDITIONS www.ti.com SPI AC CHARACTERISTICS TA = 40C to 85C, VDD = 2 V to 3.6 V PARAMETER SCK period SCK duty cycle SSN low to SCK SCK to SSN high MOSI early out MOSI late out MISO setup MISO hold SCK duty cycle MOSI setup MOSI hold MISO late out t1 t2 t3 t4 t5 t6 t7 t10 t11 t9 Operating frequency Master, RX and TX Slave, RX and TX Master Master Slave Master Slave Master, load = 10 pF Master, load = 10 pF Master Master Slave Slave Slave Slave, load = 10 pF Master, TX only Master, RX and TX Slave, RX only Slave, RX and TX CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 MIN 250 250 63 63 63 63 90 10 35 10 TYP MAX UNIT 50%

50%

ns ns ns ns ns ns ns ns ns ns ns MHz 7 10 95 8 4 8 4 Figure 3. SPI Master AC Characteristics Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: CC2541 SCKSSNMOSIMISOD0D1XD0Xt2t4t6t7t5t3XT0478-01 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com Figure 4. SPI Slave AC Characteristics DEBUG INTERFACE AC CHARACTERISTICS TA = 40C to 85C, VDD = 2 V to 3.6 V PARAMETER fclk_dbg t1 t2 t3 t4 t5 t6 t7 t8 Debug clock frequency (see Figure 5) Allowed high pulse on clock (see Figure 5) Allowed low pulse on clock (see Figure 5) EXT_RESET_N low to first falling edge on debug clock (see Figure 7) Falling edge on clock to EXT_RESET_N high (see Figure 7) EXT_RESET_N high to first debug command (see Figure 7) Debug data setup (see Figure 6) Debug data hold (see Figure 6) Clock-to-data delay (see Figure 6) TEST CONDITIONS MIN TYP MAX 12 35 35 167 83 83 2 4 Load = 10 pF 30 UNIT MHz ns ns ns ns ns ns ns ns Figure 5. Debug Clock Basic Timing 14 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 TimeDEBUG_CLKP2_2t1t21/fclk_dbgT0436-01T0479-01SCKSSNMOSIMISOD0D1XD0Xt2t3Xt8t10t11t9 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 CC2541 Figure 6. Debug Enable Timing Figure 7. Data Setup and Hold Timing TIMER INPUTS AC CHARACTERISTICS TA = 40C to 85C, VDD = 2 V to 3.6 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input capture pulse duration Synchronizers determine the shortest input pulse that can be recognized. The synchronizers operate at the current system clock rate (16 MHz or 32 MHz). 1.5 tSYSCLK Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: CC2541 TimeDEBUG_CLKP2_2DEBUG_DATA(to CC2541)P2_1DEBUG_DATA(from CC2541)P2_1t6t8t7RESET_NTimeDEBUG_CLKP2_2t3t4t5T0437-01 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com DC CHARACTERISTICS TA = 25C, VDD = 3 V PARAMETER Logic-0 input voltage Logic-1 input voltage Logic-0 input current Logic-1 input current I/O-pin pullup and pulldown resistors Logic-0 output voltage, 4- mA pins Logic-1 output voltage, 4-mA pins Logic-0 output voltage, 20- mA pins Logic-1 output voltage, 20-mA pins TEST CONDITIONS Input equals 0 V Input equals VDD Output load 4 mA Output load 4 mA Output load 20 mA Output load 20 mA MIN 2.4 50 50 2.5 2.5 TYP MAX 0.5 20 50 50 0.5 0.5 UNIT V V nA nA k V V V V PIN DESCRIPTIONS The CC2541 pinout is shown in Figure 8 and a short description of the pins follows. DEVICE INFORMATION NOTE: The exposed ground pad must be connected to a solid ground plane, as this is the ground connection for the chip. Figure 8. Pinout Top View 16 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 CC2541RHAPackage(Top View)P0_1RESET_NP2_3 / OSC32K_Q2AVDD6NCR_BIASP0_2P0_0AVDD4P0_3AVDD1P0_4AVDD2P0_5RF_NP0_6RF_PP0_7AVDD3XOSC_Q1P1_0XOSC_Q2AVDD5P2_2P2_4 / OSC32K_Q1SCLP2_1SDAP2_0GNDP1_7P1_5P1_6P1_4DVDD1P1_3P1_1DCOUPLP1_2DVDD230129228327426525624227923218101820333117193432163515361437133812391140GNDGround Pad CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 PIN DESCRIPTIONS DESCRIPTION 2-V3.6-V analog power-supply connection 2-V3.6-V analog power-supply connection 2-V3.6-V analog power-supply connection 2-V3.6-V analog power-supply connection 2-V3.6-V analog power-supply connection 2-V3.6-V analog power-supply connection 1.8-V digital power-supply decoupling. Do not use for supplying external circuits. 2-V3.6-V digital power-supply connection 2-V3.6-V digital power-supply connection Connect to GND The ground pad must be connected to a solid ground plane. Not connected Port 0.0 Port 0.1 Port 0.2 Port 0.3 Port 0.4 Port 0.5 Port 0.6 Port 0.7 Port 1.0 20-mA drive capability Port 1.1 20-mA drive capability Port 1.2 Port 1.3 Port 1.4 Port 1.5 Port 1.6 Port 1.7 Port 2.0 Port 2.1 / debug data Port 2.2 / debug clock Port 2.3/32.768 kHz XOSC PIN TYPE Power (analog) Power (analog) Power (analog) Power (analog) Power (analog) Power (analog) Power (digital) Power (digital) Power (digital) Ground pin PIN 28 27 24 29 21 31 40 39 10 1 Ground 4 19 18 17 16 15 14 13 12 11 9 8 7 6 5 38 37 36 35 34 33 Unused pins Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O, Analog I/O 32 30 20 26 25 2 3 22 23 Digital I/O, Analog I/O Port 2.4/32.768 kHz XOSC Analog I/O Digital input RF I/O RF I/O I2C clock or digital I/O I2C clock or digital I/O Analog I/O Analog I/O External precision bias resistor for reference current Reset, active-low Negative RF input signal to LNA during RX Negative RF output signal from PA during TX Positive RF input signal to LNA during RX Positive RF output signal from PA during TX Can be used as I2C clock pin or digital I/O. Leave floating if not used. If grounded disable pull up Can be used as I2C data pin or digital I/O. Leave floating if not used. If grounded disable pull up 32-MHz crystal oscillator pin 1 or external clock input 32-MHz crystal oscillator pin 2 www.ti.com PIN NAME AVDD1 AVDD2 AVDD3 AVDD4 AVDD5 AVDD6 DCOUPL DVDD1 DVDD2 GND GND NC P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 P0_7 P1_0 P1_1 P1_2 P1_3 P1_4 P1_5 P1_6 P1_7 P2_0 P2_1/DD P2_2/DC P2_3/

OSC32K_Q2 P2_4/

OSC32K_Q1 RBIAS RESET_N RF_N RF_P SCL SDA XOSC_Q1 XOSC_Q2 Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links: CC2541 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com BLOCK DIAGRAM A block diagram of the CC2541 is shown in Figure 9. The modules can be roughly divided into one of three categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related modules. In the following subsections, a short description of each module is given. Figure 9. CC2541 Block Diagram 18 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 SFRbusSFRbusMEMORYARBITRATOR8051CPUCOREDMAFLASHSRAMFLASH CTRLDEBUGINTERFACERESETRESET_NP2_4P2_3P2_2P2_1P2_0P1_4P1_3P1_2P1_1P1_0P1_7P1_6P1_5P0_4P0_3P0_2P0_1P0_0P0_7P0_6P0_532.768-kHzCRYSTALOSC32-MHZCRYSTALOSCHIGH SPEEDRC-OSC32-kHzRC-OSCCLOCK MUXandCALIBRATIONRAMUSART0USART1TIMER1 (16-Bit)TIMER3(8-bit)TIMER2(BLELLTIMER)TIMER4(8-bit)AESENCRYPTIONandDECRYPTIONWATCHDOG TIMERIRQCTRLFLASHUNIFIEDRF_PRF_NSYNTHMODULATORPOWER-ON RESETBROWN OUTRADIOREGISTERSPOWER MGT.CONTROLLERSLEEPTIMERPDATAXRAMIRAMSFRXOSC_Q2XOSC_Q1DSADCAUDIO/DCDIGITALANALOGMIXEDVDD(2 V3.6 V)DCOUPLON-CHIPVOLTAGEREGULATORLink Layer EngineFREQUENCYSYNTHESIZERI2CDEMODULATORRECEIVETRANSMITOP-ANALOG COMPARATORI/OCONTROLLER1-KB SRAMRadioArbiterFIFOCTRLSDASCL CC2541 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 BLOCK DESCRIPTIONS A block diagram of the CC2541 is shown in Figure 9. The modules can be roughly divided into one of three categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related modules. In the following subsections, a short description of each module is given. CPU and Memory The 8051 CPU core is a single-cycle 8051-compatible core. It has three different memory access busses (SFR, DATA, and CODE/XDATA), a debug interface, and an 18-input extended interrupt unit. The memory arbiter is at the heart of the system, as it connects the CPU and DMA controller with the physical memories and all peripherals through the SFR bus. The memory arbiter has four memory-access points, access of which can map to one of three physical memories: an SRAM, flash memory, and XREG/SFR registers. It is responsible for performing arbitration and sequencing between simultaneous memory accesses to the same physical memory. The SFR bus is drawn conceptually in Figure 9 as a common bus that connects all hardware peripherals to the memory arbiter. The SFR bus in the block diagram also provides access to the radio registers in the radio register bank, even though these are indeed mapped into XDATA memory space. The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The SRAM is an ultralow-power SRAM that retains its contents even when the digital part is powered off (power mode 2 and mode 3). The 128/256 KB flash block provides in-circuit programmable non-volatile program memory for the device, and maps into the CODE and XDATA memory spaces. Peripherals Writing to the flash block is performed through a flash controller that allows page-wise erasure and 4-bytewise programming. See User Guide for details on the flash controller. A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA memory space, and thus has access to all physical memories. Each channel (trigger, priority, transfer mode, addressing mode, source and destination pointers, and transfer count) is configured with DMA descriptors that can be located anywhere in memory. Many of the hardware peripherals (AES core, flash controller, USARTs, timers, ADC interface, etc.) can be used with the DMA controller for efficient operation by performing data transfers between a single SFR or XREG address and flash/SRAM. Each CC2541 contains a unique 48-bit IEEE address that can be used as the public device address for a Bluetooth device. Designers are free to use this address, or provide their own, as described in the Bluetooth specfication. The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of which is associated with one of four interrupt priorities. I/O and sleep timer interrupt requests are serviced even if the device is in a sleep mode (power modes 1 and 2) by bringing the CC2541 back to the active mode. The debug interface implements a proprietary two-wire serial interface that is used for in-circuit debugging. Through this debug interface, it is possible to erase or program the entire flash memory, control which oscillators are enabled, stop and start execution of the user program, execute instructions on the 8051 core, set code breakpoints, and single-step through instructions in the code. Using these techniques, it is possible to perform in-

circuit debugging and external flash programming elegantly. The I/O controller is responsible for all general-purpose I/O pins. The CPU can configure whether peripheral modules control certain pins or whether they are under software control, and if so, whether each pin is configured as an input or output and if a pullup or pulldown resistor in the pad is connected. Each peripheral that connects to the I/O pins can choose between two different I/O pin locations to ensure flexibility in various applications. The sleep timer is an ultralow-power timer that can either use an external 32.768-kHz crystal oscillator or an internal 32.753-kHz RC oscillator. The sleep timer runs continuously in all operating modes except power mode 3. Typical applications of this timer are as a real-time counter or as a wake-up timer to get out of power mode 1 or mode 2. A built-in watchdog timer allows the CC2541 to reset itself if the firmware hangs. When enabled by software, the watchdog timer must be cleared periodically; otherwise, it resets the device when it times out. Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links: CC2541 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com Timer 1 is a 16-bit timer with timer/counter/PWM functionality. It has a programmable prescaler, a 16-bit period value, and five individually programmable counter/capture channels, each with a 16-bit compare value. Each of the counter/capture channels can be used as a PWM output or to capture the timing of edges on input signals. It can also be configured in IR generation mode, where it counts timer 3 periods and the output is ANDed with the output of timer 3 to generate modulated consumer IR signals with minimal CPU interaction. Timer 2 is a 40-bit timer. It has a 16-bit counter with a configurable timer period and a 24-bit overflow counter that can be used to keep track of the number of periods that have transpired. A 40-bit capture register is also used to record the exact time at which a start-of-frame delimiter is received/transmitted or the exact time at which transmission ends. There are two 16-bit output compare registers and two 24-bit overflow compare registers that can be used to give exact timing for start of RX or TX to the radio or general interrupts. Timer 3 and timer 4 are 8-bit timers with timer/counter/PWM functionality. They have a programmable prescaler, an 8-bit period value, and one programmable counter channel with an 8-bit compare value. Each of the counter channels can be used as PWM output. USART 0 and USART 1 are each configurable as either an SPI master/slave or a UART. They provide double buffering on both RX and TX and hardware flow control and are thus well suited to high-throughput full-duplex applications. Each USART has its own high-precision baud-rate generator, thus leaving the ordinary timers free for other uses. When configured as SPI slaves, the USARTs sample the input signal using SCK directly instead of using some oversampling scheme, and are thus well-suited for high data rates. The AES encryption/decryption core allows the user to encrypt and decrypt data using the AES algorithm with 128-bit keys. The AES core also supports ECB, CBC, CFB, OFB, CTR, and CBC-MAC, as well as hardware support for CCM. The ADC supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30-kHz to 4-kHz, respectively. DC and audio conversions with up to eight input channels (I/O controller pins) are possible. The inputs can be selected as single-ended or differential. The reference voltage can be internal, AVDD, or a single-

ended or differential external signal. The ADC also has a temperature-sensor input channel. The ADC can automate the process of periodic sampling or conversion over a sequence of channels. The I2C module provides a digital peripheral connection with two pins and supports both master and slave operation. I2C support is compliant with the NXP I2C specification version 2.1 and supports standard mode (up to 100 kbps) and fast mode (up to 400 kbps). In addition, 7-bit device addressing modes are supported, as well as master and slave modes. The ultralow-power analog comparator enables applications to wake up from PM2 or PM3 based on an analog signal. Both inputs are brought out to pins; the reference voltage must be provided externally. The comparator output is connected to the I/O controller interrupt detector and can be treated by the MCU as a regular I/O pin interrupt. 20 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 TYPICAL CHARACTERISTICS CC2541 RX CURRENT vs TEMPERATURE TX CURRENT vs TEMPERATURE Figure 10. Figure 11. RX SENSITIVITY TEMPERATURE vs TX POWER vs TEMPERATURE Figure 12. Figure 13. RX CURRENT vs SUPPLY VOLTAGE TX CURRENT vs SUPPLY VOLTAGE Figure 14. Figure 15. Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Links: CC2541 1616.51717.51818.51919.52022.22.42.62.833.23.43.6Voltage (V)Current (mA)1 Mbps GFSK 250 kHzStandard Gain SettingInput = 70 dBmTA = 25CG005 1616.51717.51818.51919.52022.22.42.62.833.23.43.6 Voltage (V)Current (mA)TX Power Setting = 0 dBmTA = 25CG006 92908886844020020406080Temperature (C)Level (dBm)1 Mbps GFSK 250 kHzStandard Gain SettingVCC = 3 VG003 4.02.00.02.04.04020020406080Temperature (C)Level (dBm)TX Power Setting = 0 dBmVCC = 3 VG004 16.51717.51818.5194020020406080Temperature (C)Current (mA)1 Mbps GFSK 250 kHzStandard Gain SettingInput = 70 dBmVCC = 3 VG001 1717.51818.51919.54020020406080Temperature (C)Current (mA)TX Power Setting = 0 dBmVCC = 3 VG002 CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) RX SENSITIVITY vs SUPPLY VOLTAGE TX POWER vs SUPPLY VOLTAGE Figure 16. Figure 17. RX SENSITIVITY vs FREQUENCY TX POWER vs FREQUENCY Figure 18. Figure 19. Table 1. Output Power(1)(2) TXPOWER Setting Typical Output Power (dBm) 0xE1 0xD1 0xC1 0xB1 0xA1 0x91 0x81 0x71 0x61 0x51 0x41 0x31 0 2 4 6 8 10 12 14 16 18 20 23

(1) Measured on Texas Instruments CC2541 EM reference design with TA = 25C, VDD = 3 V and fc = 2440 MHz. See SWRU191 for recommended register settings.

(2) 1 Mbsp, GFSK, 250-kHz deviation, Bluetooth low energy mode, 1% BER 22 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 9290888684240024102420243024402450246024702480Frequency (MHz)Level (dBm)1 Mbps GFSK 250 kHzStandard Gain SettingTA = 25CVCC = 3 VG009 42024240024102420243024402450246024702480Frequency (MHz)Level (dBm)TX Power Setting = 0 dBmTA = 25CVCC = 3 VG010 929088868422.22.42.62.833.23.43.6Voltage (V)Level (dBm)1 Mbps GFSK 250 kHz Standard Gain SettingTA = 25CG007 4202422.22.42.62.833.23.43.6Voltage (V)Level (dBm)TX Power Setting = 0 dBmTA = 25CG008 www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 Table 2. Output Power and Current Consumption Typical Output Power (dBm) 0 20 Typical Current Consumption

(mA)(1) 18.2 16.8 Typical Current Consumption With TPS62730 (mA)(2) 14.3 13.1 CC2541

(1) Measured on Texas Instruments CC2541 EM reference design with TA = 25C, VDD = 3 V and fc =

2440 MHz. See SWRU191 for recommended register settings.

(2) Measured on Texas Instruments CC2541 TPS62730 EM reference design with TA = 25C, VDD = 3 V and fc = 2440 MHz. See SWRU191 for recommended register settings. TYPICAL CURRENT SAVINGS WHEN USING TPS62730 Figure 20. Current Savings in TX at Room Temperature Figure 21. Current Savings in RX at Room Temperature The application note (SWRA365) has information regarding the CC2541 and TPS62730 combo board and the current savings that can be achieved using the combo board. Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Links: CC2541 Current Consumption RX SGCLKCONMOD 0xBF0510152025Current (mA)0510152025303540Current Savings (%)2.12.42.733.33.6Supply (V)DC/DC OFFDC/DC ONCurrent SavingsCurrent Consumption TX 0 dBm02.12.42.733.33.6Supply (V)0510152025Current (mA)0510152025303540Current Savings (%)DC/DC OFFDC/DC ONCurrent Savings CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 www.ti.com APPLICATION INFORMATION Few external components are required for the operation of the CC2541. A typical application circuit is shown in Figure 22.

(1) 32-kHz crystal is mandatory when running the BLE protocol stack in low-power modes, except if the link layer is in the standby state (Vol. 6 Part B Section 1.1 in [1]). NOTE: Different antenna alternatives will be provided as reference designs. Figure 22. CC2541 Application Circuit Table 3. Overview of External Components (Excluding Supply Decoupling Capacitors) Component Description C401 R301 Decoupling capacitor for the internal 1.8-V digital voltage regulator Precision resistor 1%, used for internal biasing Value 1 F 56 k Input/Output Matching When using an unbalanced antenna such as a monopole, a balun should be used to optimize performance. The balun can be implemented using low-cost discrete inductors and capacitors. See reference design, CC2541EM, for recommended balun. 24 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 GNDSCLSDANCP1_5DVDD2P1_1P1_2P1_3P1_42-V to 3.6-V Power SupplyR301XTAL1C221C231XTAL2C321C331C40132-kHzCrystal(1)CC2541DIEATTACHPADRBIASAVDD4AVDD1AVDD2RF_NAVDD5XOSC_Q1XOSC_Q2AVDD3RF_PP1_0P0_7P0_6P0_5P0_4RESET_NP0_0P0_1P0_2P0_3DCOUPLDVDD1P1_6P1_7P2_0AVDD6P2_4/XOSC32K_Q1P2_3/XOSC32K_Q2P2_2P2_1Antenna(50)W12345678910111213141516171819202122232425262728293031323334353637383940Power Supply Decoupling Capacitors are Not ShownDigital I/O Not Connected www.ti.com SWRS110D JANUARY 2012REVISED JUNE 2013 Crystal An external 32-MHz crystal, XTAL1, with two loading capacitors (C221 and C231) is used for the 32-MHz crystal oscillator. See 32-MHz CRYSTAL OSCILLATOR for details. The load capacitance seen by the 32-MHz crystal is given by:

CC2541

(1) XTAL2 is an optional 32.768-kHz crystal, with two loading capacitors (C321 and C331) used for the 32.768-kHz crystal oscillator. The 32.768-kHz crystal oscillator is used in applications where both very low sleep-current consumption and accurate wake-up times are needed. The load capacitance seen by the 32.768-kHz crystal is given by:

A series resistor may be used to comply with the ESR requirement. On-Chip 1.8-V Voltage Regulator Decoupling The 1.8-V on-chip voltage regulator supplies the 1.8-V digital logic. This regulator requires a decoupling capacitor

(C401) for stable operation. Power-Supply Decoupling and Filtering Proper power-supply decoupling must be used for optimum performance. The placement and size of the decoupling capacitors and the power supply filtering are very important to achieve the best performance in an application. TI provides a compact reference design that should be followed very closely.

(2) References 1. Bluetooth Core Technical Specification document, version 4.0 http://www.bluetooth.com/SiteCollectionDocuments/Core_V40.zip 2. CC253x System-on-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee Applications/CC2541 System-on-

Chip Solution for 2.4-GHz Bluetooth low energy Applications (SWRU191) 3. Current Savings in CC254x Using the TPS62730 (SWRA365). Additional Information Texas Instruments offers a wide selection of cost-effective, low-power RF solutions for proprietary and standard-

based wireless applications for use in industrial and consumer applications. Our selection includes RF transceivers, RF transmitters, RF front ends, and System-on-Chips as well as various software solutions for the sub-1- and 2.4-GHz frequency bands. In addition, Texas Instruments provides a large selection of support collateral such as development tools, technical documentation, reference designs, application expertise, customer support, third-party and university programs. The Low-Power RF E2E Online Community provides technical support forums, videos and blogs, and the chance to interact with fellow engineers from all over the world. With a broad selection of product solutions, end application possibilities, and a range of technical support, Texas Instruments offers the broadest low-power RF portfolio. We make RF easy!

The following subsections point to where to find more information. Copyright 20122013, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Links: CC2541 Lparasitic3213311CC11CC=++Lparasitic2212311CC11CC=++CC2541 SWRS110D JANUARY 2012REVISED JUNE 2013 Texas Instruments Low-Power RF Web Site Forums, videos, and blogs RF design help E2E interaction Join us today at www.ti.com/lprf-forum. www.ti.com Texas Instruments Low-Power RF Developer Network Texas Instruments has launched an extensive network of low-power RF development partners to help customers speed up their application development. The network consists of recommended companies, RF consultants, and independent design houses that provide a series of hardware module products and design services, including:

RF circuit, low-power RF, and ZigBee design services RF certification services and RF circuit manufacturing Need help with modules, engineering services or development tools?

Search the Low-Power RF Developer Network tool to find a suitable partner. www.ti.com/lprfnetwork Low-power RF and ZigBee module solutions and development tools Low-Power RF eNewsletter The Low-Power RF eNewsletter keeps you up-to-date on new products, news releases, developers news, and other news and events associated with low-power RF products from TI. The Low-Power RF eNewsletter articles include links to get more online information. Sign up today on www.ti.com/lprfnewsletter Spacer REVISION HISTORY Changes from Original (January 2012) to Revision A Page Changed data sheet status from Product Preview to Production Data ................................................................................ 1 Changes from Revision A (February 2012) to Revision B Page Changed the Temperature coefficient Unit value From: mV/C To: / 0.1C ....................................................................... 10 Changed Figure 22 text From: Optional 32-kHz Crystal To: 32-kHz Crystal

..................................................................... 24 Changes from Revision B (August 2012) to Revision C Page Changed the "Internal reference voltage" TYP value From 1.15 V To: 1.24 V .................................................................. 12 Changed pin XOSC_Q1 Pin Type From Analog O To: Analog I/O, and changed the Pin Description .............................. 17 Changed pin XOSC_Q2 Pin Type From Analog O To: Analog I/O .................................................................................... 17 Changes from Revision C (November 2012) to Revision D Page Changed the RF TRANSMIT SECTION, Output power TYP value From: 20 To: 23 ....................................................... 8 Changed the RF TRANSMIT SECTION, Programmable output power range TYP value From: 20 To: 23 ........................ 8 Added row 0x31 to Table 1 ................................................................................................................................................. 22 26 Submit Documentation Feedback Copyright 20122013, Texas Instruments Incorporated Product Folder Links: CC2541 www.ti.com PACKAGING INFORMATION Orderable Device CC2541F128RHAR Status

(1) ACTIVE Package Type Package Drawing VQFN CC2541F128RHAT ACTIVE VQFN CC2541F256RHAR ACTIVE VQFN CC2541F256RHAT ACTIVE VQFN PACKAGE OPTION ADDENDUM 23-Sep-2014 Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples RHA RHA RHA RHA 40 40 40 40 Qty 2500 250 2500 250

(2)

(6)

(3)

(4/5) Green (RoHS

& no Sb/Br) Green (RoHS

& no Sb/Br) Green (RoHS

& no Sb/Br) Green (RoHS

& no Sb/Br) CU NIPDAU Level-3-260C-168 HR

-40 to 85 CU NIPDAU Level-3-260C-168 HR

-40 to 85 CU NIPDAU Level-3-260C-168 HR

-40 to 85 CU NIPDAU Level-3-260C-168 HR

-40 to 85 CC2541 F128 CC2541 F128 CC2541 F256 CC2541 F256

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 23-Sep-2014 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF CC2541 :

Automotive: CC2541-Q1 NOTE: Qualified Version Definitions:

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2 www.ti.com 6-Dec-2014 PACKAGE MATERIALS INFORMATION TAPE AND REEL INFORMATION

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ CC2541F128RHAT CC2541F256RHAT VQFN VQFN RHA RHA 40 40 250 250 Reel Diameter

(mm) 180.0 180.0 Reel Width W1 (mm) A0

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1 Quadrant 16.4 16.4 6.3 6.3 6.3 6.3 1.5 1.5 12.0 12.0 16.0 16.0 Q2 Q2 Pack Materials-Page 1 www.ti.com 6-Dec-2014 PACKAGE MATERIALS INFORMATION

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CC2541F128RHAT CC2541F256RHAT VQFN VQFN RHA RHA 40 40 250 250 213.0 213.0 191.0 191.0 55.0 55.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as components) are sold subject to TIs terms and conditions of sale supplied at the time of order acknowledgment. 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