FCC ID: 2AD5E-MD5XR Bluetooth Module

Document NO. LAB1402-1 MD-5XR

(MD-5XRAH33) Application Note Copyright 2013 by MOVON, all rights reserved. 1 Document NO. LAB1402-1 Module Features

-Bluetooth system v3.0+EDR, 2.1+EDR, 2.0+EDR Compliant

-Class 2 Level Output Power Available

-UART Bypass Mode Support

-Scatternet Support

-Support of all Bluetooth packet types (voice and data)

-Support of low power modes: Park, Sniff and Hold

-UART, USB and PCM Interface Available

-Built-in Reference Clock: 26MHz

-High performance Stereo Codec

(Default : SBC, applicable : apt-X, AAC, MP3)

-16Mbits Flash Memory

-Enhanced Audibility and Noise Cancellation

-RoHS Compliant Applications

-High Quality Stereo Wireless Headsets

-Hands-Free Car Kits

-Wireless Speakers

-Analogue and USB Multimedia Dongles

-Bluetooth-Enabled Automotive wireless Gateways. Features

-Size (12.0 X 20.0 X 2.3 mm)

-Class2 Support

-Surface Mountable

-1.8V Power Supply for core

-3.3V Power Supply for Memory, USB, UART, GPIO

-Not built-in Antenna (Antenna gain: 0dBi) Caution 1. POP Noise issue I2S Audio . 2. If bag is opened and a module is not reflowed within 168 hours, then you must bake modules as below

- Module with Reel Packing : 45/ 12hours

- Module out of Reel Packing : 125/ 2hours Copyright 2013 by MOVON, all rights reserved. 2 Overview Document NO. LAB1402-1 Copyright 2013 by MOVON, all rights reserved. 3 Document NO. LAB1402-1 1. Electrical Characteristics Absolute Maximum Ratings Parameter Storage Temperature VCC VDD_USB Min

-40

-0.4

-0.4 Max

+85 2.7 3.6 Other Pin Voltage VSS-0.4 VDD_USB+0.4 Recommended Operating Conditions Parameter Operating Temperature Humidity VCC VDD_USB Min

-40

/

1.7 3.0 Power Consumption (+25) Typ

/

+85 1.8 3.3 Max

+85

/

1.95 3.6 Unit C V V V Unit C

%

V V Parameter Min Typ Max Unit Current Discoverable Stand-by VCC VDD_USB VCC VDD_USB HFP VCC

(with Alango) VDD_USB A2DP VCC VDD_USB

/

/

/

/

/

/

/

/

3.328 37.760 0.590 3.071 0.591 2.600 8.995 2.720 43.992 51.400 8.314 8.830 33.299 41.400 0.591 8.650 mA mA mA mA mA mA mA mA Copyright 2013 by MOVON, all rights reserved. 4 2. RF specification Transmitter Performance Document NO. LAB1402-1 Parameter Condition Min Typ Max Unit Output Power Normal/extreme test Power Density Normal/extreme test Power Control Normal/extreme test

-6

-

Frequency Range Normal/extreme test 2402 20dB Bandwidth Normal/extreme test Adjacent channel power Modulation Characteristics 2MHz 3MHz 4MHz F1avg F2max F2avg/F1avg Initial Carrier Frequency Tolerance Carrier Frequency Drift Three slot Packet(DH3) One slot Packet(DH1) Five slot Packet(DH5) Transceiver Performance

-

-

-

-

140 115

-

-75

-25

-40

-40 0

-

-

5 20 dBm dBm 2480 MHz 850 1000 KHz

-

-

-

-

-

-

-

-

-

-

-20

-40

-40 175

-

80 75 25 40 40 dBm dBm dBm KHz KHz

%

KHz KHz KHz KHz Parameter Condition Min Typ Max Unit Out-of Band spurious Emissions Receiver Performance 30MHz-1GHz 1GHz-12.75GHz 1.8GHz-5.3GHz 5.1GHz-5.3GHz

-

-

-

-

-

-

-

-

-36

-30

-47

-47 dBm dBm dBm dBm Parameter Condition Min Typ Max Unit Sensitivity level Single slot packets Sensitivity level Multi slot packets C/I performance C/I co-channel C/I1MHz(adjacent channel) C/I2MHz(2nd Adjacent channel) C/I3MHz(3rdadiacentchannel) 30MHz-2000MHz Blocking performance 2000MHz-2400MHz 2500MHz-3000MHz

-70

-70

-

-10

-27

-27

-83

-

9

-2

-34

-43

-

-

-

-

-

11 0

-30

-40

-

-

-

dBm dBm dB dB dB dB dBm dBm dBm Copyright 2013 by MOVON, all rights reserved. 5 3000MHz-12.75MHz N=5 Document NO. LAB1402-1

-10

-39

-20

-

-

-5

-

-

-

dBm dBm dBm Description Pad Type Programmable input/output line Bi-directional Programmable input/output line Bi-directional Programmable input/output line Bi-directional Programmable input/output line Bi-directional USB Data Plus with selectable internal 1.5K Pull-up resistor Bi-directional USB Data minus Bi-directional POWER FOR USB(3.3V) Power Intermodulation Performance Maximum Input Level 3. Pin Description PIO No. Pin Name PIO_11 PIO_12 PIO_13 PIO_14 USB_DP USB_DN VDD_USB UART_RTS UART request to send to active low Bi-directional UART_CTS UART request to clear to active low CMOS Input UART_TX UART_RX PIO_10 PIO_9 PIO_8 PIO_7 VSS PIO_6 PIO_5 PIO_4 PIO_3 SPI_MOSI SPI_CLK SPI_CSB SPI_MISO LED_1 LED_0 PCM_CLK PCM_SYNC UART Data Output UART Data Input Bi-directional CMOS input Programmable input/output line Bi-directional Programmable input/output line CMOS Output Programmable input/output line CMOS Input Programmable input/output line Bi-directional Common Ground Ground Programmable input/output line Bi-directional Programmable input/output line Bi-directional Programmable input/output line Bi-directional Programmable input/output line Bi-directional SPI data input SPI clock Chip select for SPI, active low CMOS input Input Input SPI data output CMOS output LED driver LED driver Open drain Open drain Synchronous data clock Bi-directional Synchronous data sync Bi-directional Copyright 2013 by MOVON, all rights reserved. 6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 PCM_IN PCM_OUT Synchronous data input CMOS Input Synchronous data output CMOS output Document NO. LAB1402-1 VBAT PIO_2 PIO_1 PIO_0 VCHG VCC MIC_BIAS MIC_B_P MIC_B_N MIC_A_P MIC_A_N SPKR_B_N SPKR_B_P SPKR_A_N SPKR_A_P VSS RF VSS AIO_1 AIO_0 RST#

VSS Battery Power Power Programmable input/output line Bi-directional Programmable input/output line Bi-directional Programmable input/output line Bi-directional Charging Power Core Power(1.8V) Microphone bias Microphone input positive, right Microphone input negative, right Microphone input positive, left Microphone input negative, left Speaker output negative, right Speaker output positive, right Speaker output negative, left Speaker output positive, left Common Ground Power Power Power Analogue Analogue Analogue Analogue Analogue Analogue Analogue Analogue Ground RF connection to Antenna Bi-directional Common Ground Ground Analogue programmable in/out line Bi-directional Analogue programmable in/out line Bi-directional Reset if low. Input debounced so must be low for>5ms to cause a reset CMOS Input Common Ground Ground 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

* If you want to use the MIC_BIAS of module, connect VBAT(31) to 3.3V.

(MIC_BIAS Voltage range: 1.7 ~ 3.3V) But we dont recommend using the Internal MIC_BIAS because of noise issue.

* VCHG(35) pin cant be used. Copyright 2013 by MOVON, all rights reserved. 7 Document NO. LAB1402-1 4. UART Interface This is a standard UART interface for communicating with other serial devices. MD-5XR UART interface provides a simple mechanism for communicating with other serial devices using the RS232 protocol. UART configuration parameters, such as baud rate and packet format, are set using MD-5XR firmware. 4.1 UART Bypass Mode To apply the UART bypass mode, a BCCMD command is issued to MD-5XR. Upon this issue, it switches the bypass to PIO[7:4] as shown in figure. When the bypass mode has been invoked, MD-5XR enters the Deep Sleep state indefinitely. Copyright 2013 by MOVON, all rights reserved. 8 Document NO. LAB1402-1 5. USB Interface This is a full speed (12Mbits/s) USB interface for communicating with other compatible digital devices. MD-5XR acts as a USB peripheral, responding to requests from a master host controller such as a PC. The USB interface is capable of driving a USB cable directly. No external USB transceiver is required. The device operates as a USB peripheral, responding to requests from a master host controller such as a PC. Both the OHCI and the UHCI standards are supported. As USB is a master/slave oriented system (in common with other USB peripherals), MD-5XR only supports USB Slave operation. 6. I2C Interface PIO[8:6] can be used to form a Master I2C interface. The interface is formed using software to drive these lines. Therefore it is suited only to relatively slow functions such as driving a dot matrix LCD, keyboard scanner or EEPROM.

<Example Connection>

Copyright 2013 by MOVON, all rights reserved. 9 Document NO. LAB1402-1 7. PCM Interface The audio PCM interface supports continuous transmission and reception of PCM encoded audio data over Bluetooth. PCM is a standard method used to digitize audio (particularly voice) for transmission over digital communication channels. Through its PCM interface, MD-5XR has hardware support for continual transmission and reception of PCM data, so reducing processor overhead. MD-5XR offers a bi-directional digital audio interface that route directly into the baseband layer of the on-

chip firmware. It does not pass through the HCI protocol layer. Parameter Possible Value Mode Slave, Master Clock Sync Master Mode : 128/256/512/1536/2400 KHz Slave Mode : up to 2400KHz Master Mode : 8 / 48kHz Slave Mode : 8 / 48kHz Sync format Long frame sync, Short frame sync Copyright 2013 by MOVON, all rights reserved. 10 Document NO. LAB1402-1 8. Audio Interface The audio interface circuit consists of:

Stereo audio codec Dual audio inputs and outputs A configurable PCM, I2S or SPDIF interface 8.1 Audio Input Output The audio input circuitry consists of a dual audio input that can be configured to be either single-

ended or fully differential and programmed for either microphone or line input. It has an analogue and digital programmable gain stage for optimization of different microphones. The audio output circuitry consists of a dual differential class A-B output stage. 8.2 Stereo Audio Codec Interface The Stereo audio codec uses a fully differential architecture in the analogue signal path, which results in low noise sensitivity and good power supply rejection while effectively doubling the signal amplitude. Copyright 2013 by MOVON, all rights reserved. 11 Document NO. LAB1402-1 The ADC consists of:

Two second-order Sigma Delta converters allowing two separate channels that are identical in functionality. Two gain stages for each channel, one of which is an analogue gain stage and the other is a digital gain stage. Each ADC supports the following sample rates:

8kHz 11.025kHz 16kHz 22.05kHz 24kHz 32kHz 44.1kHz The DAC consists of:

Two second-order Sigma Delta converters allowing two separate channels that are identical in functionality. Two gain stages for each channel, one of which is an analogue gain stage and the other is a digital gain stage. Each DAC supports the following samples rates:

8kHz 11.025kHz 12kHz 16kHz 22.050kHz 24kHz 32kHz 44.1kHz 48kHz Copyright 2013 by MOVON, all rights reserved. 12 Document NO. LAB1402-1 8.3 Digital Audio Interface (I2S) The digital audio interface supports the industry standard formats for I2S, left-justified or right-

justified. The interface shares the same pins as the PCM interface, which means each audio bus is mutually exclusive in its usage. The digital audio interface supports the industry standard formats for I2S, left-justified or right-

justified. The interface shares the same pins as the PCM interface, which means each audio bus is mutually exclusive in its usage. Table 8.3.1 lists these alternative functions. Figure 8.3.1 shows the timing diagram. PCM Interface I2S Interface PCM_OUT PCM_IN PCM_SYNC PCM_CLK SD_OUT SD_IN WS SCK Table 8.3.1 Alternative Functions of the Digital Audio Bus Interface on the PCM Interface Table 8.3.2 describes the values for the PS Key (PSKEY_DIGITAL_AUDIO_CONFIG) that is used to set-up the digital audio interface. For example, to configure an I2S interface with 16-bit SD data set PSKEY_DIGITAL_CONFIG to 0x0406. Table 8.3.2 PSKEY_DIGITAL_AUDIO_CONFIG Copyright 2013 by MOVON, all rights reserved. 13 Document NO. LAB1402-1 Figure 8.3.1: Digital Audio Interface Modes The internal representation of audio samples within MD-5XR is 16-bit and data on SD_OUT is limited to 16-bit per channel. Copyright 2013 by MOVON, all rights reserved. 14 Document NO. LAB1402-1 Table 8.3.3: Digital Audio Interface Slave Timing Figure 8.3.2: Digital Audio Interface Slave Timing Copyright 2013 by MOVON, all rights reserved. 15 Document NO. LAB1402-1 Table 8.3.4: Digital Audio Interface Master Timing Figure 8.3.3: Digital Audio Interface Master Timing Copyright 2013 by MOVON, all rights reserved. 16 Document NO. LAB1402-1 8.4 SPDIF(IEC 60958) Interface The SPDIF interface signals are SPDIF_IN and SPDIF_OUT and are shared on the PCM interface pins. The input and output stages of the SPDIF pins can interface to:

A 75 coaxial cable with an RCA connector (Figure 8.4.1) An optical link that uses Toslink optical components (Figure 8.4.2) PCM Interface SPDIF Interface PCM_OUT PCM_IN PCM_SYNC PCM_CLK SPDIF_OUT SPDIF_IN Figure 8.4.1 Example Circuit for SPDIF Interface (Co-Axial) Figure 8.4.2 Example Circuit for SPDIF Interface (Optical) Copyright 2013 by MOVON, all rights reserved. 17 Document NO. LAB1402-1 9. Power Sequence MD-5XR has two power ports, VDD_USB(3.3V) and Vcc(1.8V). VDD_USB

: Supply the power to internal I/O port and Flash Memory. VCC

: Supply the power to internal Low Voltage Regulator which generates 1.5V. 1.5V power is used on RF, Core, Audio block, etc. Upper graph shows recommended power sequence of MD-5XR.

: The time to required to stabilized the Flash Memory

: The time to required to set the internal Low Voltage Regulator.

: A reset performed between 1.5 and 4.0ms following RESETB being active. CSR recommends that RESETB be applied for a period greater than 5ms. For normal operation, VDD_USB must be stable before or at the same time as Vcc is powered up and make MD-5XR in reset mode after two power sources are stable. Note At power up, MD-5XR fetches its first instruction from the internal flash memory. It is essential that the flash memory is ready at this point. This means VDD_USB must be above the minimum operating voltage(3.0V). If the flash is not ready, it may return an invalid op code to CSR chip when read. This can crash the firmware or lead to unpredictable results. Copyright 2013 by MOVON, all rights reserved. 18 10. Co-existence with WLAN 10.1 2-wire Co-existence Document NO. LAB1402-1 As the name implies, CSRs 2-wire coexistence scheme uses only two wires. These two signals are BT_Priority and WLAN_Active. BT_Priority is an output from the Bluetooth device, which indicates to the WLAN device that it should stop transmitting immediately and remain silent until this signal is de-asserted. This signal is normally asserted for the following transactions:

Inquiry, Inquiry Scan and Inquiry Response Paging, Page Scanning and Page Response Master Poll and Slave Response LMP Data and Response SCO TX and RX data Broadcasts Park beacons plus Access Window Slots following the start of a sniff window PSkey Setting

# BT Priority (active high),

# PSKEY_CLOCK_REQUEST_Disable psset 0x0246 0x0000

# pskey_lc_combo_priority_pio_mask,

# use pio[3]

psset 0x0029 0x0008 0x0000

# pskey_lc_combo_disable_pio_mask,

# WLAN Active,

# use pio[6]

psset 0x0028 0x0040 0x0000 0x0000 Copyright 2013 by MOVON, all rights reserved. 19 WLANDeviceMD-5XRPIO_3PIO_6BT_PriorityWLAN_Active Document NO. LAB1402-1 10.2 Traditional 3-wire Co-existence The traditional 3-wire coexistence scheme is the same as the 2-wire scheme, mentioned in Section 2, with the addition of a third signal, BT_Active. BT_Active is an output from the BT device indicating activity which can take the form of a high or low priority transmission or reception. This signal is expected to be useful in designs where an antenna may be shared with another RF device (typically a WLAN device) and/or where a basic activity signal is required in addition to the priority signal already provided by the 2-wire coexistence scheme. PIO[0] by default and cannot be modified PSkey Setting

# BT Priority (active high),

# PSKEY_CLOCK_REQUEST_Disable psset 0x0246 0x0000

# pskey_lc_combo_priority_pio_mask,

# use pio[3]

psset 0x0029 0x0008 0x0000

# pskey_lc_combo_disable_pio_mask,

# WLAN Active,

# use pio[6]

psset 0x0028 0x0040 0x0000 0x0000

# txrx_pio_control to 0x1

# BT Active signal is made from pio[0] operation psset 0x0209 0x01 // PIO_0=High when receive data

# tx_avoid_pa_class1_pio psset 0x03b3 0x00 // PIO_0=High when transmit data

# Tx power table change (Add to original table) psset 0x0031 0x0000 0x0001 0x0000 0x0000 0x0800 Copyright 2013 by MOVON, all rights reserved. 20 WLANDeviceMD-5XRPIO_0PIO_3PIO_6WLAN_ActiveBT_PriorityBT_Active Document NO. LAB1402-1 10.3 Enhanced 3-wire (Packet Traffic Arbitration) Co-existence The Packet Traffic Arbitration (PTA), otherwise known as the enhanced 3-wire coexistence, signaling scheme is similar to the traditional 3-wire scheme. However, the timing diagrams for the enhanced scheme are more complex and contain more information regarding the transaction. This scheme should not be confused with the traditional 3-wire scheme. The enhanced 3-wire scheme consists of the signals, RF_Active, BT_State & WLAN_Active:

RF_Active is an output from the Bluetooth device that is asserted for all Bluetooth transmission and reception, high or low priority. This signal stays asserted for the entire Bluetooth transmit-

receive pair or receive-transmit pair. This signal differs from the BT_Active signal in that it stays asserted in between transmit-receive or receive-transmit slot pair gap. Due to hardware timing requirements, this signal is assigned to PIO[7] by default and cannot be modified. BT_State is an output from the Bluetooth device indicating if future transaction is a high or low priority and whether the operation is a transmission or reception. The conditions considered high priority are the same as the 2-wire coexistence scheme. Because of hardware timing requirements, this signal is assigned to PIO[5] by default and cannot be modified. PSkey Setting

# BT State, RF active

# pskey_lc_combo_dot11_channel_pio_base to 0x11 psset 0x002a 0x11

# pskey_lc_combo_disable_pio_mask,

# WLAN Active,

# use pio[6]

psset 0x0028 0x0040 0x0000 0x0000 Copyright 2013 by MOVON, all rights reserved. 21 WLANDeviceMD-5XRPIO_7PIO_5PIO_6WLAN_ActiveBT_StateRF_Active 11. Pin Map (TOP View) Document NO. LAB1402-1 Copyright 2013 by MOVON, all rights reserved. 22 12. Dimension 16 15 Document NO. LAB1402-1 1 52 26 27 41 42 13. Recommended PCB Pattern Copyright 2013 by MOVON, all rights reserved. 23 Document NO. LAB1402-1 FCC compliance Information FCC Information to User This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:

Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. Caution Modifications not expressly approved by the party responsible for compliance could void the users authority to operate the equipment. FCC Compliance Information : This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and

(2) this device must accept any interference received, including interference that may cause undesired operation This device is intended only for OEM integrators under the following conditions:

1) The transmitter module may not be co-located with any other transmitter or antenna, 2) OEM shall not supply any tool or info to the end-user regarding to Regulatory Domain change. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). IMPORTANT NOTE: In the event that these conditions can not be met (for example certain Copyright 2013 by MOVON, all rights reserved. 24 Document NO. LAB1402-1 laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. End Product Labeling To satisfy FCC exterior labeling requirements, the following text must be placed on the exterior of the end product : Contains Transmitter Module FCC ID : 2AD5E-MD5XR Manual Information To the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Copyright 2013 by MOVON, all rights reserved. 25