FCC ID: XMR2020BG95M2 LTE Cat M1 & Cat NB2 Module

LPWA Module Series BG95 Hardware Design Hardware BG95-M2 Design LPWA Module Series Date: 2020-04-21 Status: Preliminary Rev. BG95_Hardware_Design_V1.2_Preliminary20200421 BG95_Hardware_Design 1 / 88 LPWA Module Series BG95 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit:

http://www.quectel.com/support/sales.htm For technical support, or to report documentation errors, please visit:

http://www.quectel.com/support/technical.htm Or email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE FORBIDDEN WITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2020. All rights reserved. BG95_Hardware_Design 1 / 88 LPWA Module Series BG95 Hardware Design About the Document Revision History Version Date Author Description 1.0 2019-09-30 Lyndon LIU/

Garey XIE Initial 1.1 2020-02-28 Lyndon LIU/

Garey XIE 1. Updated the GNSS function into an optional feature. 2. Updated the LTE Power Class 5 to 21 dBm. 3. Added the parameters (power supply, operating frequency, output power, etc.) of BG95-M4 and BG95-M5. 4. Updated the transmitting power parameters in Table 5. Updated the pin name of pin 21 from NETLIGHT into 3 and Table 40. NET_STATUS. 6. Updated the block diagram in Figure 1. 7. Updated the power-on timing in Figure 8. 8. Updated the reference design of USB interface in Figure 16. 9. Updated the name of UART interface pins. 10. Added a recommended GNSS UART reference design (Dual-Transistor Solution) in Figure 19. 11. Added the timing of turning on the module with USB_BOOT in Figure 24. 12. Added the truth table of GRFC interfaces in Table 29. 13. Updated the GNSS performance in Table 30. 14. Updated the current consumption parameters in Chapter 6.4. 15. Updated the RF receiving sensitivity in Chapter 6.6. BG95_Hardware_Design 2 / 88 LPWA Module Series BG95 Hardware Design Contents About the Document ................................................................................................................................ 2 Contents .................................................................................................................................................... 3 Table Index ............................................................................................................................................... 6 Figure Index .............................................................................................................................................. 8 1 Introduction ....................................................................................................................................... 9 1.1. Safety Information .................................................................................................................. 10 1.2. FCC Certification Requirements. ........................................................................................... 11 1.3. IC Statement .......................................................................................................................... 13 2 Product Concept ............................................................................................................................. 15 2.1. General Description ................................................................................................................ 15 2.2. Key Features .......................................................................................................................... 17 2.3. Functional Diagram ................................................................................................................ 20 2.4. Evaluation Board .................................................................................................................... 21 3 Application Interfaces ..................................................................................................................... 22 3.1. Pin Assignment ...................................................................................................................... 23 3.2. Pin Description ....................................................................................................................... 24 3.3. Operating Modes .................................................................................................................... 32 3.4. Power Saving ......................................................................................................................... 33 3.4.1. Airplane Mode .............................................................................................................. 33 3.4.2. Power Saving Mode (PSM).......................................................................................... 34 3.4.3. Extended Idle Mode DRX (e-I-DRX) ............................................................................ 34 3.4.4. Sleep Mode.................................................................................................................. 35 3.4.4.1. UART Application .............................................................................................. 35 3.5. Power Supply ......................................................................................................................... 36 3.5.1. Power Supply Pins ....................................................................................................... 36 3.5.2. Decrease Voltage Drop ............................................................................................... 37 3.5.3. Monitor the Power Supply ............................................................................................ 38 3.6. Turn on and off Scenarios ...................................................................................................... 38 Turn on Module Using the PWRKEY Pin ..................................................................... 38 Turn off Module ............................................................................................................ 40 Turn off Module through PWRKEY .................................................................... 41 Turn off Module through AT Command ............................................................. 41 3.7. Reset the Module ................................................................................................................... 41 3.8. PON_TRIG Interface .............................................................................................................. 43 3.9.

(U)SIM Interface ..................................................................................................................... 44 3.10. USB Interface ......................................................................................................................... 46 3.11. UART Interfaces ..................................................................................................................... 48 3.12. PCM and I2C Interfaces* ........................................................................................................ 51 3.6.2.1. 3.6.2.2. 3.6.1. 3.6.2. BG95_Hardware_Design 3 / 88 LPWA Module Series BG95 Hardware Design 3.13. Network Status Indication ....................................................................................................... 52 3.14. STATUS ................................................................................................................................. 53 3.15. Behaviors of MAIN_RI ............................................................................................................ 54 3.16. USB_BOOT Interface ............................................................................................................. 55 3.17. ADC Interfaces ....................................................................................................................... 56 3.18. GPIO Interfaces* .................................................................................................................... 57 3.19. GRFC Interfaces .................................................................................................................... 58 4 GNSS Receiver ................................................................................................................................ 60 4.1. General Description ................................................................................................................ 60 4.2. GNSS Performance ................................................................................................................ 60 4.3. Layout Guidelines ................................................................................................................... 61 5 Antenna Interfaces .......................................................................................................................... 62 5.1. Main Antenna Interface .......................................................................................................... 62 5.1.1. Pin Definition ................................................................................................................ 62 5.1.2. Operating Frequency ................................................................................................... 62 5.1.3. Reference Design of Main Antenna Interface .............................................................. 63 5.1.4. Reference Design of RF Layout ................................................................................... 64 5.2. GNSS Antenna Interface ........................................................................................................ 66 5.3. Antenna Installation ................................................................................................................ 67 5.3.1. Antenna Requirements ................................................................................................ 67 5.3.2. Recommended RF Connector for Antenna Installation ................................................ 68 6 Electrical, Reliability and Radio Characteristics .......................................................................... 70 6.1. Absolute Maximum Ratings .................................................................................................... 70 6.2. Power Supply Ratings ............................................................................................................ 70 6.3. Operation and Storage Temperatures .................................................................................... 71 6.4. Current Consumption ............................................................................................................. 71 6.5. RF Output Power .................................................................................................................... 74 6.6. RF Receiving Sensitivity ......................................................................................................... 75 6.7. Electrostatic Discharge ........................................................................................................... 78 7 Mechanical Dimensions.................................................................................................................. 79 7.1. Top and Side Dimensions ...................................................................................................... 79 7.2. Recommended Footprint ........................................................................................................ 81 7.3. Top and Bottom Views ........................................................................................................... 82 8 Storage, Manufacturing and Packaging ........................................................................................ 83 8.1. Storage ................................................................................................................................... 83 8.2. Manufacturing and Soldering .................................................................................................. 84 8.3. Packaging ............................................................................................................................... 85 9 Appendix A References .................................................................................................................. 87 10 Appendix B GPRS Coding Schemes ............................................................................................. 90 11 Appendix C GPRS Multi-slot Classes ............................................................................................ 91 BG95_Hardware_Design 4 / 88 LPWA Module Series BG95 Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes .................................................................. 93 BG95_Hardware_Design 5 / 88 LPWA Module Series BG95 Hardware Design Table Index Table 1: Version Selection for BG95 Series Modules .............................................................................. 15 Table 2: Frequency Bands and GNSS Types of BG95 Series Modules .................................................. 15 Table 3: Key Features of BG95 Series Modules ..................................................................................... 18 Table 4: Definition of I/O Parameters ...................................................................................................... 24 Table 5: Pin Description .......................................................................................................................... 25 Table 6: Overview of BG95 Operating Modes ......................................................................................... 32 Table 7: VBAT and GND Pins ................................................................................................................. 36 Table 8: Pin Definition of PWRKEY ......................................................................................................... 38 Table 9: Pin Definition of RESET_N ........................................................................................................ 42 Table 10: Pin Definition of PON_TRIG Interface ..................................................................................... 43 Table 11: Pin Definition of (U)SIM Interface ............................................................................................ 44 Table 12: Pin Definition of USB Interface ................................................................................................ 46 Table 13: Pin Definition of Main UART Interface ..................................................................................... 48 Table 14: Pin Definition of Debug UART Interface .................................................................................. 49 Table 15: Pin Definition of GNSS UART Interface ................................................................................... 49 Table 16: Logic Levels of Digital I/O ........................................................................................................ 49 Table 17: Pin Definition of PCM and I2C Interfaces ................................................................................ 52 Table 18: Pin Definition of NET_STATUS ............................................................................................... 53 Table 19: Working State of NET_STATUS .............................................................................................. 53 Table 20: Pin Definition of STATUS ........................................................................................................ 54 Table 21: Default Behaviors of MAIN_RI Pin .......................................................................................... 54 Table 22: Pin Definition of USB_BOOT Interface .................................................................................... 55 Table 23: Pin Definition of ADC Interface ................................................................................................ 57 Table 24: Characteristics of ADC Interfaces ........................................................................................... 57 Table 25: Pin Definition of GPIO Interfaces ............................................................................................. 58 Table 26: Logic Levels of GPIO Interfaces .............................................................................................. 58 Table 27: Pin Definition of GRFC Interfaces ........................................................................................... 59 Table 28: Logic Levels of GRFC Interfaces ............................................................................................. 59 Table 29: Truth Table of GRFC Interfaces .............................................................................................. 59 Table 30: GNSS Performance ................................................................................................................. 60 Table 31: Pin Definition of Main Antenna Interface ................................................................................. 62 Table 32: BG95 Operating Frequency ..................................................................................................... 62 Table 33: Pin Definition of GNSS Antenna Interface ............................................................................... 66 Table 34: GNSS Frequency .................................................................................................................... 66 Table 35: Antenna Requirements ............................................................................................................ 67 Table 36: Absolute Maximum Ratings ..................................................................................................... 70 Table 37: Power Supply Ratings ............................................................................................................. 70 Table 38: Operation and Storage Temperatures ..................................................................................... 71 Table 39: BG95-M3 Current Consumption .............................................................................................. 72 Table 40: GNSS Current Consumption ................................................................................................... 74 Table 41: BG95 RF Output Power ........................................................................................................... 74 BG95_Hardware_Design 6 / 88 LPWA Module Series BG95 Hardware Design Table 42: Conducted RF Receiving Sensitivity of BG95-M1 ................................................................... 75 Table 43: Conducted RF Receiving Sensitivity of BG95-M2 ................................................................... 76 Table 44: Conducted RF Receiving Sensitivity of BG95-M3 ................................................................... 77 Table 45: Electrostatic Discharge Characteristics (25 C, 45% Relative Humidity) ................................. 78 Table 46: Recommended Thermal Profile Parameters ........................................................................... 84 Table 47: Packaging Specifications of BG95 .......................................................................................... 86 Table 48: Related Documents ................................................................................................................. 87 Table 49: Terms and Abbreviations ......................................................................................................... 87 Table 50: Description of Different Coding Schemes ................................................................................ 90 Table 51: GPRS Multi-slot Classes ......................................................................................................... 91 Table 52: EDGE Modulation and Coding Schemes ................................................................................. 93 BG95_Hardware_Design 7 / 88 LPWA Module Series BG95 Hardware Design Figure Index Figure 1: Functional Diagram .................................................................................................................. 21 Figure 2: Pin Assignment (Top View) ...................................................................................................... 23 Figure 3: Sleep Mode Application via UART ........................................................................................... 35 Figure 4: Power Supply Limits during Burst Transmission (BG95-M3/-M5) ............................................ 37 Figure 5: Star Structure of the Power Supply .......................................................................................... 38 Figure 6: Turn on the Module Using Driving Circuit ................................................................................. 39 Figure 7: Turn on the Module Using Keystroke ....................................................................................... 39 Figure 8: Power-on Timing ...................................................................................................................... 40 Figure 9: Power-off Timing ...................................................................................................................... 41 Figure 10: Reset Timing .......................................................................................................................... 42 Figure 11: Reference Circuit of RESET_N by Using Driving Circuit ........................................................ 42 Figure 12: Reference Circuit of RESET_N by Using Button .................................................................... 43 Figure 13: Reference Circuit of PON_TRIG ............................................................................................ 44 Figure 14: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector ........................ 45 Figure 15: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector .......................... 45 Figure 16: Reference Design of USB Interface ....................................................................................... 47 Figure 17: Main UART Reference Design (Translator Chip) ................................................................... 50 Figure 18: Main UART Reference Design (Transistor Circuit) ................................................................. 50 Figure 19: Reference Circuit with Dual-Transistor Circuit (Recommended for GNSS UART) ................. 51 Figure 20: Reference Circuit of PCM Application with Audio Codec ....................................................... 52 Figure 21: Reference Circuit of the Network Status Indicator .................................................................. 53 Figure 22: Reference Design of STATUS ............................................................................................... 54 Figure 23: Reference Design of USB_BOOT Interface ........................................................................... 55 Figure 24: Timing of Turning on Module with USB_BOOT ...................................................................... 56 Figure 25: Reference Design of Main Antenna Interface ......................................................................... 64 Figure 26: Microstrip Design on a 2-layer PCB ....................................................................................... 64 Figure 27: Coplanar Waveguide Design on a 2-layer PCB ..................................................................... 65 Figure 28: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) ................... 65 Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) ................... 65 Figure 30: Reference Circuit of GNSS Antenna Interface ....................................................................... 67 Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) .......................................................... 68 Figure 32: Mechanicals of U.FL-LP Connectors ...................................................................................... 69 Figure 33: Space Factor of Mated Connector (Unit: mm) ........................................................................ 69 Figure 34: Module Top and Side Dimensions ......................................................................................... 79 Figure 35: Module Bottom Dimensions (Bottom View) ............................................................................ 80 Figure 36: Recommended Footprint (Top View)...................................................................................... 81 Figure 37: Top View of the Module .......................................................................................................... 82 Figure 38: Bottom View of the Module .................................................................................................... 82 Figure 39: Recommended Reflow Soldering Thermal Profile .................................................................. 84 Figure 40: Tape Dimensions ................................................................................................................... 85 Figure 41: Reel Dimensions .................................................................................................................... 86 BG95_Hardware_Design 8 / 88 LPWA Module Series BG95 Hardware Design 1 Introduction This document defines BG95 module and describes its air interface and hardware interfaces which are connected with customers applications. This document helps customers quickly understand the interface specifications, electrical and mechanical details, as well as other related information of BG95. To facilitate application designs, it also includes some reference designs for customers reference. The document, coupled with application notes and user guides, makes it easy to design and set up mobile applications with BG95. BG95_Hardware_Design 9 / 88 LPWA Module Series BG95 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating BG95 module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for any users failure to observe these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as mobile phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. BG95_Hardware_Design 10 / 88 LPWA Module Series BG95 Hardware Design According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a 1.2. FCC Certification Requirements. mobile device. And the following conditions must be met:

1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time-

averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3.A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR2020BG95M2. 4.To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:8.000dBi Catm LTE Band5/26:12.541dBi Catm LTE Band12/85:11.798dBi Catm LTE Band13:12.214dBi NB LTE Band2/25:11.000dBi NB LTE Band4/66:8.000dBi NB LTE Band5:12.541dBi NB LTE Band12/85:11.798dBi NB LTE Band13:12.214dBi NB LTE Band71:11.687 dBi 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and BG95_Hardware_Design 11 / 88 LPWA Module Series BG95 Hardware Design conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 configurations. If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:

A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification (labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible;

then an additional permanent label referring to the enclosed module:Contains Transmitter Module FCC ID: XMR2020BG95M2 or Contains FCC ID: XMR2020BG95M2 must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance BG95_Hardware_Design 12 / 88 LPWA Module Series BG95 Hardware Design could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. 1.3. IC Statement IRSS-GEN

"This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device." or "Le prsent appareil est conforme aux CNR dIndustrie Canada applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes :

1) lappareil ne doit pas produire de brouillage; 2) lutilisateur de lappareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible den compromettre le fonctionnement."

Dclaration sur l'exposition aux rayonnements RF The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. L'autre utilis pour l'metteur doit tre install pour fournir une distance de sparation d'au moins 20 cm de toutes les personnes et ne doit pas tre colocalis ou fonctionner conjointement avec une autre antenne ou un autre metteur. To comply with IC regulations limiting both maximum RF output power and human exposure to RF BG95_Hardware_Design 13 / 88 LPWA Module Series BG95 Hardware Design radiation, maximum antenna gain (including cable loss) must not exceed:

Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:8.000dBi Catm LTE Band5/26:12.541dBi Catm LTE Band12/85:11.798dBi Catm LTE Band13:12.214dBi NB LTE Band2/25:11.000dBi NB LTE Band4/66:8.000dBi NB LTE Band5:12.541dBi NB LTE Band12/85:11.798dBi NB LTE Band13:12.214dBi NB LTE Band71:11.687 dBi The host product shall be properly labelled to identify the modules within the host product. The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host product; otherwise, the host product must be labeled to display the Innovation, Science and Economic Development Canada certification number for the module, preceded by the word Contains or similar wording expressing the same meaning, as follows:

Contains IC: 10224A-2020BG95M2 or where: 10224A-2020BG95M2 is the modules certification number. Le produit hte doit tre correctement tiquet pour identifier les modules dans le produit hte. L'tiquette de certification d'Innovation, Sciences et Dveloppement conomique Canada d'un module doit tre clairement visible en tout temps lorsqu'il est installdans le produit hte; sinon, le produit hte doit porter une tiquette indiquant le numro de certification d'Innovation, Sciences et Dveloppement conomique Canada pour le module, prcd du mot Contient ou d'un libell semblable exprimant la mme signification, comme suit:"Contient IC: 10224A-2020BG95M2 " ou "o: 10224A-2020BG95M2 est le numro de certification du module"

BG95_Hardware_Design 14 / 88 LPWA Module Series BG95 Hardware Design 2 Product Concept 2.1. General Description BG95 is a series of embedded IoT (LTE Cat M1, LTE Cat NB2 and EGPRS) wireless communication modules. It provides data connectivity on LTE-FDD and GPRS/EGPRS networks, and supports 1) functionality to meet half-duplex operation in LTE network. It also provides optional GNSS and voice*

customers specific application demands. Table 1: Version Selection for BG95 Series Modules Version Cat M1 Cat NB2 2) GSM Wi-Fi Positioning GNSS Optional Optional Optional Optional Optional Optional

BG95-M1 Support

BG95-M2 Support Support BG95-M3 Support Support Support BG95-N1

Support BG95-M4 Support Support BG95-M5 Support Support Support

BG95-MF

(Planning) Support Support Support Optional Table 2: Frequency Bands and GNSS Types of BG95 Series Modules Module Supported Bands LTE Bands Power Class GNSS (Optional) BG95-M1 Power Class 5 (21 dBm) Cat M1 Only:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/B18

/B19/B20/B25/B26/B27/B28/B66/

B85 GPS, GLONASS, BeiDou, Galileo, QZSS BG95_Hardware_Design 15 / 88 LPWA Module Series BG95 Hardware Design BG95-M2 Power Class 5 (21 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/

B27/B28/B66/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/

B28/B66/B71/B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

/B18/B19/B20/B25/B26/B27/

B28/B66/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25 /

B28/B66/B71/B85 EGPRS:

850/900/1800/1900 MHz Cat NB2 Only:

LTE FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/

B28/B66/B71/B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/B28/

B31/B66/B72/B73/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B31/B66/

B72/B73/B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/B28/

B66/B85 Cat NB2:

LTE-FDD:

BG95-M3 Power Class 5 (21 dBm) BG95-N1 Power Class 5 (21 dBm) BG95-M4 Power Class 5 (21 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS GPS, GLONASS, BeiDou, Galileo, QZSS GPS, GLONASS, BeiDou, Galileo, QZSS GPS, GLONASS, BeiDou, Galileo, QZSS BG95-M5 Power Class 3 (23 dBm) BG95_Hardware_Design 16 / 88 LPWA Module Series BG95 Hardware Design B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 EGPRS:

850/900/1800/1900 MHz Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/

B28/B66/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 Wi-Fi (For Positioning Only):

2.4 GHz BG95-MF

(Planning) NOTES Power Class 5 (21 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS 1. 1) BG95 series modules support VoLTE (Voice over LTE) under LTE Cat M1 and CS voice under GSM. 2) LTE Cat NB2 is backward compatible with LTE Cat NB1. 2. 3. BG95-MF is still under planning. Therefore, details of it is currently not included and will be added in a future release of this document. 4. GNSS function is optional. 5.

* means under development. With a compact profile of 23.6 mm 19.9 mm 2.2 mm, BG95 can meet almost all requirements for M2M applications such as smart metering, tracking system, security, wireless POS, etc. BG95 is an SMD type module which can be embedded into applications through its 102 LGA pads. It supports internet service protocols like TCP, UDP and PPP. Extended AT commands have been developed for customers to use these internet service protocols easily. 2.2. Key Features The following table describes the detailed features of BG95 series modules. BG95_Hardware_Design 17 / 88 LPWA Module Series BG95 Hardware Design Table 3: Key Features of BG95 Series Modules Features Details Power Supply Transmitting Power LTE Features BG95-M1/-M2/-N1:

Supply voltage 1): 2.64.8 V Typical supply voltage: 3.3 V BG95-M3/-M5:

Supply voltage: 3.34.3 V Typical supply voltage: 3.8 V BG95-M4:

Typical supply voltage: 3.8 V Class 5 (21 dBm +1.7/-3 dB) for LTE-FDD bands Class 3 (23 dBm 2 dB) for LTE-FDD bands Class 4 (33 dBm 2 dB) for GSM850 Class 4 (33 dBm 2 dB) for EGSM900 Class 1 (30 dBm 2 dB) for DCS1800 Class 1 (30 dBm 2 dB) for PCS1900 Class E2 (27 dBm 3 dB) for GSM850 8-PSK Class E2 (27 dBm 3 dB) for EGSM900 8-PSK Class E2 (26 dBm 3 dB) for DCS1800 8-PSK Class E2 (26 dBm 3 dB) for PCS1900 8-PSK Support 3GPP Rel. 14 Support LTE Cat M1 and LTE Cat NB2 Support 1.4 MHz RF bandwidth for LTE Cat M1 Support 200 KHz RF bandwidth for LTE Cat NB2 Cat M1: Max. 588 kbps (DL)/1119 kbps (UL) Cat NB2: Max. 127 kbps (DL)/158.5 kbps (UL) GPRS:

Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107 kbps (DL), Max. 85.6 kbps (UL) Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max. 296 kbps (DL), Max. 236.8 kbps (UL) GSM Features EDGE:

Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Support PPP/TCP/UDP/SSL/TLS/FTP(S)/HTTP(S)/NITZ/PING/MQTT/

Internet Protocol Features CoAP protocols Support PAP

(Password Authentication Protocol) and CHAP

(Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections BG95_Hardware_Design 18 / 88 LPWA Module Series BG95 Hardware Design SMS Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: ME by default

(U)SIM Interface Support 1.8 V USIM/SIM card only PCM Interface*

Support one digital audio interface: PCM interface USB Interface UART Interfaces Compliant with USB 2.0 specification (slave only) Support operations at low-speed and full-speed Used for AT command communication, data transmission, GNSS NMEA output, software debugging and firmware upgrade Support USB serial drivers for Windows 7/8/8.1/10, Linux 2.65.4, Android 4.x/5.x/6.x/7.x/8.x/9.x Main UART:

Used for data transmission and AT command communication 115200 bps baud rate by default The default frame format is 8N1 (8 data bits, no parity, 1 stop bit) Support RTS and CTS hardware flow control Debug UART:

Used for software debugging and log output Support 115200 bps baud rate GNSS UART:

Used for GNSS data and NMEA sentences output 115200 bps baud rate by default GNSS (Optional) AT Commands Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS) 1 Hz data update rate by default 3GPP TS 27.007 and 3GPP TS 27.005 AT commands, as well as Quectel enhanced AT commands Network Indication One NET_STATUS pin for network connectivity status indication Antenna Interfaces Main antenna (ANT_MAIN) and GNSS antenna (ANT_GNSS) interfaces Physical Characteristics Temperature Range Dimensions: (23.6 0.15) mm (19.9 0.15) mm (2.2 0.20) mm Weight: approx. 2.15 g Operation temperature range: -35 C to +75 C 1) Extended temperature range: -40 C to +85 C 2) Storage temperature range: -40 C to +90 C Firmware Upgrade USB interface, DFOTA*

RoHS All hardware components are fully compliant with EU RoHS directive BG95_Hardware_Design 19 / 88 LPWA Module Series BG95 Hardware Design NOTES 1. 1) For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. 2. 2) Within operation temperature range, the module is 3GPP compliant. 3. 3) Within extended temperature range, the module remains the ability to establish and maintain functions such as SMS and data transmission, without any unrecoverable malfunction. Radio spectrum and radio network will not be influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the temperature returns to the normal operation temperature levels, the module will meet 3GPP specifications again. 4. * means under development. 2.3. Functional Diagram The following figure shows a block diagram of BG95 and illustrates the major functional parts. Power management Baseband Radio frequency Peripheral interfaces BG95_Hardware_Design 20 / 88 LPWA Module Series BG95 Hardware Design NOTES Figure 1: Functional Diagram 1. eSIM function is optional. If eSIM is selected, then any external (U)SIM cannot be used. 2. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY should never be pulled down to GND permanently. 3. RESET_N is connected directly to PWRKEY inside the module. 4. ADC0 and ADC1 cannot be used simultaneously, as ADC1 is connected directly to ADC0 inside the module. BG95 supports use of only one ADC interface at a time: either ADC0 or ADC1. 2.4. Evaluation Board In order to facilitate application development with BG95 conveniently, Quectel supplies the evaluation board (EVB), USB to RS-232 converter cable, USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [1]. BG95_Hardware_Design 21 / 88 LPWA Module Series BG95 Hardware Design 3 Application Interfaces PON_TRIG Interface

(U)SIM interface BG95 is equipped with 102 LGA pads that can be connected to various cellular application platforms. The subsequent chapters will provide detailed descriptions of the following interfaces:

Power supply USB interface UART interfaces PCM and I2C interfaces*

Status indication interfaces USB_BOOT interface ADC interfaces GPIO interfaces*

GRFC interfaces NOTE

* means under development. BG95_Hardware_Design 22 / 88 LPWA Module Series BG95 Hardware Design 3.1. Pin Assignment The following figure shows the pin assignment of BG95. PSM_IND ADC1 GND PCM_CLK PCM_SYNC PCM_DIN PCM_DOUT USB_VBUS USB_DP USB_DM RESERVED RESERVED RESERVED RESERVED PWRKEY RESERVED RESET_N W_DISABLE#

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 I N A M _ T N A D N G D N G D N G D N G D E V R E S E R D E V R E S E R D N G D N G F R _ T A B V F R _ T A B V D E V R E S E R D N G 2 6 1 6 0 6 9 5 8 5 7 5 6 5 5 5 4 5 3 5 2 5 1 5 0 5 82 81 80 79 102 101 100 99 63 83 GRFC1 GPIO3 64 84 GRFC2 GPIO4 65 65 85 GPIO6 PON_TRIG 96 76 GPIO5 66 86 GPIO7 95 75 USB_BOOT 98 78 97 77 94 74 93 73 67 87 GPIO8 68 88 GPIO9 89 90 91 92 69 70 71 72 9 1 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 0 3 1 3 S U T A T S Y D A E R _ P A S U T A T S _ T E N 0 C D A D X R _ G B D D X T _ G B D I 1 O P G I 2 O P G D N G D X T _ S S N G T X E _ D D V D X R _ S S N G R T D _ N A M I 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 ANT_GNSS GND USIM_GND USIM_CLK USIM_DATA USIM_RST USIM_VDD USIM_DET I2C_SDA I2C_SCL MAIN_RI MAIN_DCD MAIN_RTS MAIN_CTS MAIN_TXD MAIN_RXD VBAT_BB VBAT_BB POWER USB UART

(U)SIM PCM ANT GND RESERVED OTHERS Figure 2: Pin Assignment (Top View) BG95_Hardware_Design 23 / 88 LPWA Module Series BG95 Hardware Design 1. ADC0 and ADC1 cannot be used simultaneously, as ADC1 is connected directly to ADC0 inside the module. The module supports use of only one ADC interface at a time: either ADC0 or ADC1. 2. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY should never be pulled down to GND permanently. 3. RESET_N is connected directly to PWRKEY inside the module. 4. GNSS_TXD (pin 27) and GRFC2 (pin 84) are BOOT_CONFIG pins. They should not be pulled up before startup. 5. BG95-M4 does not support GRFC interfaces. 6. Keep all RESERVED pins and unused pins unconnected. 7. GND pins should be connected to ground in the design. 3.2. Pin Description The following tables show the pin definition and description of BG95. Table 4: Definition of I/O Parameters Description Analog Input Analog Output Digital Input Digital Output Bidirectional Power Input Power Output NOTES Type AI AO DI DO IO PI PO BG95_Hardware_Design 24 / 88 BG95-M1/-M2/-N1:

Vmax = 4.8 V Vmin = 2.6 V Vnorm = 3.3 V BG95-M3/-M5:

Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V BG95-M4:

Vnorm = 3.8 V BG95-M1/-M2/-N1:

Vmax = 4.8 V Vmin = 2.6 V Vnorm = 3.3 V BG95-M3/-M5:

Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V BG95-M4:

Vnorm = 3.8 V Vnorm = 1.8 V IOmax = 50 mA LPWA Module Series BG95 Hardware Design Table 5: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT_BB 32, 33 PI Power supply for the modules baseband part Please refer to NOTE 1 VBAT_RF 52, 53 PI Power supply for the modules RF part Please refer to NOTE 1 VDD_EXT 29 PO 1.8 V output power supply for external circuits If unused, keep this pin open GND Ground 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 6774, 7982, 8991, 100102 Turn on/off Pin Name Pin No. I/O Description DC Characteristics Comment BG95_Hardware_Design 25 / 88 LPWA Module Series BG95 Hardware Design PWRKEY 15 DI Turn on/off the module Vnorm = 1.5 V VILmax = 0.45 V PWRKEY should never be pulled down to GND permanently. Reset Status Indication Pin Name Pin No. I/O Description DC Characteristics Comment RESET_N 17 DI Reset the module Vnorm = 1.5 V VILmax = 0.45 V Pin Name Pin No. I/O Description DC Characteristics Comment PSM_IND*

1 DO Power saving mode indication VOHmin = 1.35 V VOLmax = 0.45 V STATUS 20 DO NET_STATUS 21 DO Module operation status indication Indicate the modules network activity status VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment AI IO IO USB connection detection USB differential data (+) USB differential data (-) Vnorm = 5.0 V Typical 5.0 V Compliant with USB 2.0 standard specification. Require differential impedance of 90 . USB Interface USB_VBUS USB_DP 8 9 USB_DM 10

(U)SIM Interface Pin Name Pin No. I/O Description DC Characteristics Comment USIM_DET*

42 DI USIM_VDD 43 PO

(U)SIM card hot-plug detection

(U)SIM card power supply VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V Vmax = 1.9 V Vmin = 1.7 V 1.8 V power domain. If unused, keep this pin open. Only 1.8 V (U)SIM card is supported. BG95_Hardware_Design 26 / 88 LPWA Module Series BG95 Hardware Design USIM_RST 44 DO

(U)SIM card reset

(U)SIM card clock

(U)SIM card ground VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V USIM_DATA 45 IO

(U)SIM card data USIM_CLK 46 DO USIM_GND 47 Main UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V MAIN_DTR 30 DI Main UART data terminal ready MAIN_RXD 34 DI Main UART receive MAIN_TXD 35 DO Main UART transmit VOLmax = 0.45 V VOHmin = 1.35 V MAIN_CTS 36 DO Main UART clear to send VOLmax = 0.45 V VOHmin = 1.35 V MAIN_RTS 37 DI Main UART request to send MAIN_DCD 38 DO Main UART data carrier detect VOLmax = 0.45 V VOHmin = 1.35 V MAIN_RI 39 DO Main UART ring indication VOLmax = 0.45 V VOHmin = 1.35 V Debug UART Interface 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment BG95_Hardware_Design 27 / 88 LPWA Module Series BG95 Hardware Design DBG_RXD 22 DI Debug UART receive VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V DBG_TXD 23 DO Debug UART transmit VOLmax = 0.45 V VOHmin = 1.35 V GNSS UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment Pin Name Pin No. I/O Description DC Characteristics Comment GNSS_TXD 27 DO GNSS UART transmit VOLmax = 0.45 V VOHmin = 1.35 V GNSS_RXD 28 DI GNSS UART receive PCM Interface*

VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V PCM_CLK 4 DO PCM clock VOLmax = 0.45 V VOHmin = 1.35 V PCM_SYNC 5 DO PCM data frame sync VOLmax = 0.45 V VOHmin = 1.35 V PCM_DIN 6 DI PCM data input PCM_DOUT 7 DO PCM data output I2C Interface*

VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V Pin Name Pin No. I/O Description DC Characteristics Comment I2C_SCL 40 OD I2C serial clock

(for external codec) External pull-up resistor is required. 1.8 V only. BG95_Hardware_Design 28 / 88 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. LPWA Module Series BG95 Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment Pin Name Pin No. I/O Description DC Characteristics Comment I2C_SDA 41 OD I2C serial data

(for external codec) IO AI Main antenna interface GNSS antenna interface Antenna Interfaces ANT_MAIN 60 ANT_GNSS 49 GPIO Interfaces*

GPIO1 25 IO General-purpose input/output GPIO2 26 IO General-purpose input/output GPIO3 64 IO General-purpose input/output GPIO4 65 IO General-purpose input/output VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V If unused, keep this pin open. External pull-up resistor is required. 1.8 V only. If unused, keep this pin open. 50 impedance 50 impedance. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BG95_Hardware_Design 29 / 88 LPWA Module Series BG95 Hardware Design GPIO5 66 IO General-purpose input/output GPIO6 85 IO General-purpose input/output GPIO7 86 IO General-purpose input/output GPIO8 87 IO General-purpose input/output GPIO9 88 IO General-purpose input/output VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. ADC Interfaces ADC0 ADC1 24 2 Other Interface Pins Pin Name Pin No. I/O Description DC Characteristics Comment AI AI General-purpose ADC interface Voltage range:

0.11.8 V General-purpose ADC interface Voltage range:

0.11.8 V ADC0 and ADC1 cannot be used simultaneously. If unused, keep these pins open. Pin Name Pin No. I/O Description DC Characteristics Comment W_DISABLE#* 18 DI Airplane mode control VILmin = -0.3 V VILmax = 0.6 V 1.8 V power domain. Pulled up by default. BG95_Hardware_Design 30 / 88 LPWA Module Series BG95 Hardware Design VIHmin = 1.2 V VIHmax = 2.0 V When it is in low voltage level, the module can enter airplane mode. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. Rising-edge triggered. Pulled-down by default. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. If unused, keep this pin open. AP_READY*

19 DI USB_BOOT 75 DI Application processor sleep state detection Force the module into emergency download mode VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V PON_TRIG 96 DI Wake up the module from PSM GRFC Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment GRFC1 83 DO Generic RF controller VOLmax = 0.45 V VOHmin = 1.35 V GRFC2 84 DO Generic RF controller VOLmax = 0.45 V VOHmin = 1.35 V Pin Name Pin No. I/O Description DC Characteristics Comment RESERVED Reserved Keep these pins open. RESERVED Pins 1114, 16, 51, 56, 57, 63, 7678, 9295, 9799 BG95_Hardware_Design 31 / 88 LPWA Module Series BG95 Hardware Design NOTES 1. For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. 2. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY should never be pulled down to GND permanently. 3. RESET_N is connected directly to PWRKEY inside the module. 4. ADC0 and ADC1 cannot be used simultaneously, as ADC1 is connected directly to ADC0 inside the module. The module supports use of only one ADC interface at a time: either ADC0 or ADC1. 5. When PSM is enabled, the function of PSM_IND pin will be activated after the module is rebooted. When PSM_IND is in high voltage level, the module is in normal operation state, when it is in low voltage level, the module is in PSM. This function is under development currently. 6. GNSS_TXD (pin 27) and GRFC2 (pin 84) are BOOT_CONFIG pins. They should not be pulled up before startup. 7. BG95-M4 does not support GRFC interfaces. 8. Keep all RESERVED pins and unused pins unconnected. 9. * means under development. 3.3. Operating Modes The table below briefly summarizes the various operating modes of BG95. Table 6: Overview of BG95 Operating Modes Mode Details Normal Operation Connected Network has been connected. In this mode, the power consumption may vary with the network setting and data transfer rate. Idle Software is active. The module remains registered on network, and it is ready to send and receive data. Extended Idle Mode DRX

(e-I-DRX) BG95 module and the network may negotiate over non-access stratum signaling the use of e-I-DRX for reducing power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. Airplane Mode AT+CFUN=4 or W_DISABLE#* pin can set the module into airplane mode. In this case, RF function will be invalid. Minimum Functionality AT+CFUN=0 can set the module into a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. BG95_Hardware_Design 32 / 88 Mode Sleep Mode Power OFF Mode NOTES 2. Hardware:

Software:

NOTES LPWA Module Series BG95 Hardware Design In this mode, the current consumption of the module will be reduced to a lower level. During this mode, the module can still receive paging message, SMS and TCP/UDP data from the network normally. In this mode, the power management unit shuts down the power supply. The software is not active. The serial interfaces are not accessible. But the operating voltage

(connected to VBAT_RF and VBAT_BB) remains applied. Power Saving Mode

(PSM) The module may enter PSM to reduce its power consumption. PSM is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. 1. During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB interface will increase power consumption.

* means under development. 3.4. Power Saving 3.4.1. Airplane Mode When the module enters airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible. This mode can be set via the following ways. W_DISABLE#* is pulled up by default. Driving it low will let the module enter airplane mode. AT+CFUN=<fun> provides choice of the functionality level, through setting <fun> into 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode. RF function is disabled. 1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by AT+QCFG="airplanecontrol" command which is still under development. Details about the command will be provided in document [2]. BG95_Hardware_Design 33 / 88 LPWA Module Series BG95 Hardware Design 2. The execution of AT+CFUN command will not affect GNSS function. 3.

* means under development. 3.4.2. Power Saving Mode (PSM) BG95 module can enter PSM to reduce its power consumption. The mode is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. So BG95 in PSM cannot immediately respond users requests. When the module wants to use the PSM it shall request an Active Time value during every Attach and TAU procedures. If the network supports PSM and accepts that the module uses PSM, it will confirm the usage of PSM by allocating an Active Time value to the module. If the module wants to change the Active Time value, e.g. when the conditions are changed in the module, the module consequently requests the value it wants in the TAU procedure. If PSM is supported by the network, then it can be enabled via AT+CPSMS command. Either of the following methods will wake up the module from PSM:

A rising edge on PON_TRIG will wake up the module from PSM. (Recommended) Drive PWRKEY low will wake up the module. When the T3412_Ext timer expires, the module will be woken up automatically. NOTE Please refer to document [2] for details about AT+CPSMS command. 3.4.3. Extended Idle Mode DRX (e-I-DRX) The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX for reducing its power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or data transfers, and in particular they need to consider the delay tolerance of mobile terminated data. In order to negotiate the use of e-I-DRX, the UE requests e-I-DRX parameters during attach procedure and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX. In case the EPC accepts e-I-DRX, the EPC based on operator policies and, if available, the e-I-DRX cycle length value in the subscription data from the HSS, may also provide different values of the e-I-DRX parameters than what was requested by the UE. If the EPC accepts the use of e-I-DRX, the UE applies e-I-DRX based on the received e-I-DRX parameters. If the UE does not receive e-I-DRX parameters in the relevant accept message because the EPC rejected its request or because the request was received by BG95_Hardware_Design 34 / 88 LPWA Module Series BG95 Hardware Design EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception. If e-I-DRX is supported by the network, then it can be enabled by AT+CEDRXS=1 command. Please refer to document [2] for details about AT+CEDRXS command. NOTE 3.4.4. Sleep Mode 3.4.4.1. UART Application BG95 is able to reduce its current consumption to a lower value during the sleep mode. The following sub-chapters describe the power saving procedure of BG95. If the host communicates with the module via UART interface, the following preconditions can let the module enter sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Drive MAIN_DTR pin high. The following figure shows the connection between the module and the host. Figure 3: Sleep Mode Application via UART When BG95 has URC to report, MAIN_RI signal will wake up the host. Please refer to Chapter 3.15 for details about MAIN_RI behavior. Driving the host MAIN_DTR low will wake up the module. AP_READY* will detect the sleep state of the host (can be configured to high level or low level detection). Please refer to AT+QCFG="apready" command in document [2] for details. BG95_Hardware_Design 35 / 88 LPWA Module Series BG95 Hardware Design NOTE

* means under development. 3.5. Power Supply 3.5.1. Power Supply Pins BG95 provides the following four VBAT pins for connection with an external power supply. There are two separate voltage domains for VBAT. Two VBAT_RF pins for modules RF part. Two VBAT_BB pins for modules baseband part. The following table shows the details of VBAT pins and ground pins. Table 7: VBAT and GND Pins Pin Name Pin No. Description Module Min. Typ. Max. Unit VBAT_RF 52, 53 BG95-M3/-M5 3.3 3.8 4.3 Power supply for the modules RF part BG95-M1/-M2/-N1 1) 2.6 3.3 4.8 VBAT_BB 32, 33 BG95-M3/-M5 3.3 3.8 4.3 Power supply for the modules baseband part BG95-M4 3.8 BG95-M1/-M2/-N1 1) 2.6 3.3 4.8 BG95-M4 3.8 V V V V V V GND Ground

3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 6774, 7982, 8991, 100102 BG95_Hardware_Design 36 / 88 LPWA Module Series BG95 Hardware Design NOTE 1) For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. 3.5.2. Decrease Voltage Drop BG95-M1/-M2/-N1: The power supply range of BG95-M1/-M2/-N1 is from 2.6 V to 4.8 V. For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. Please assure the input voltage will never drop below 2.6 V. BG95-M3/-M5: The power supply range of the BG95-M3/-M5 is from 3.3 V to 4.3 V. Please assure the input voltage will never drop below 3.3 V. BG95-M4: The typical power supply of BG95-M4 is 3.8 V. The following figure shows the voltage drop during burst transmission in 2G network of BG95-M3/-M5. The voltage drop will be less in LTE Cat M1 and/or LTE Cat NB2 networks. Burst Transmission Burst Transmission VBAT Min.3.3V Drop Ripple Figure 4: Power Supply Limits during Burst Transmission (BG95-M3/-M5) To decrease voltage drop, a bypass capacitor of about 100 F with low ESR should be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing the MLCC array, and place these capacitors close to VBAT pins. The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 0.6 mm, and the width of VBAT_RF trace should be no less than 2 mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to get a stable power source, it is suggested to use a TVS with low leakage current and suitable reverse stand-off voltage, and also it is recommended to place it as close to the VBAT pins as BG95_Hardware_Design 37 / 88 LPWA Module Series BG95 Hardware Design possible. The following figure shows the star structure of the power supply.

VBAT R1 0R R2 0R

C1 D1 TVS C2 C3 C4 C5 C6 C7 C8 100uF 100nF 33pF 10pF 100uF 100nF 33pF 10pF VBAT_RF VBAT_BB Module Figure 5: Star Structure of the Power Supply 3.5.3. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.6. Turn on and off Scenarios 3.6.1. Turn on Module Using the PWRKEY Pin The following table shows the pin definition of PWRKEY. Table 8: Pin Definition of PWRKEY Pin Name Pin No. Description DC Characteristics Comment PWRKEY 15 Turn on/off the module Vnorm = 1.5 V VILmax = 0.45 V The output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. When BG95 is in power off mode, it can be turned on by driving PWRKEY low for 5001000 ms. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. BG95_Hardware_Design 38 / 88 LPWA Module Series BG95 Hardware Design Figure 6: Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. Figure 7: Turn on the Module Using Keystroke The power on scenario is illustrated in the following figure. BG95_Hardware_Design 39 / 88 LPWA Module Series BG95 Hardware Design Figure 8: Power-on Timing NOTES 30 ms. 1. Make sure that VBAT is stable before pulling down PWRKEY pin and keep the interval no less than 2. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY should never be pulled down to GND permanently. 3.6.2. Turn off Module Either of the following methods can be used to turn off the module:

Turn off the module through PWRKEY. Turn off the module through AT+QPOWD command. BG95_Hardware_Design 40 / 88 LPWA Module Series BG95 Hardware Design 3.6.2.1. Turn off Module through PWRKEY Driving PWRKEY low for 6501500 ms, the module will execute power-down procedure after PWRKEY is released. The power-off scenario is illustrated in the following figure. Figure 9: Power-off Timing 3.6.2.2. Turn off Module through AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module via PWRKEY. Please refer to document [2] for details about AT+QPOWD command. 3.7. Reset the Module RESET_N is used to reset the module. Due to platform limitations, the chipset has integrated the reset function into PWRKEY, and RESET_N is connected directly to PWRKEY inside the module. The module can be reset by driving RESET_N low for 23.8s. BG95_Hardware_Design 41 / 88 LPWA Module Series BG95 Hardware Design Table 9: Pin Definition of RESET_N Pin Name Pin No. Description DC Characteristics Comment RESET_N 17 Reset the module VILmax = 0.45 V The reset scenario is illustrated in the following figure. Multiplexed from PWRKEY

(connected directly to PWRKEY inside the module). The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N pin. VBA T 3.8 s 2 s RESET_N VIL 0.45 V Module Status Running Resetting Restart Figure 10: Reset Timing RESET_N 2s~3.8s Reset pulse 4.7K 47K Figure 11: Reference Circuit of RESET_N by Using Driving Circuit BG95_Hardware_Design 42 / 88 LPWA Module Series BG95 Hardware Design S2 TVS RESET_N Close to S2 Figure 12: Reference Circuit of RESET_N by Using Button NOTE Please assure that there is no large capacitance on RESET_N pin. 3.8. PON_TRIG Interface BG95 provides one PON_TRIG pin which is used to wake up the module from PSM. When the pin detects a rising edge, the module will be woken up from PSM. Table 10: Pin Definition of PON_TRIG Interface Pin Name Pin No. I/O Description Comment PON_TRIG 96 DI Wake up the module from PSM A reference circuit is shown in the following figure. Rising-edge triggered. Pulled-down by default. 1.8 V power domain. BG95_Hardware_Design 43 / 88 LPWA Module Series BG95 Hardware Design VDD_1V8 PON_TRIG_EXT 10K 10K 100K 100K PON_TRIG Figure 13: Reference Circuit of PON_TRIG NOTE VDD_1V8 is provided by an external LDO. 3.9. (U)SIM Interface BG95 supports 1.8 V (U)SIM card only. The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Table 11: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment USIM_DET*

42 DI

(U)SIM card hot-plug detection 1.8 V power domain. USIM_VDD 43 PO

(U)SIM card power supply Only 1.8 V (U)SIM card is supported. USIM_RST 44 DO

(U)SIM card reset 1.8 V power domain. USIM_DATA 45 IO

(U)SIM card data 1.8 V power domain. USIM_CLK 46 DO

(U)SIM card clock 1.8 V power domain. USIM_GND 47

(U)SIM card ground BG95_Hardware_Design 44 / 88 LPWA Module Series BG95 Hardware Design BG95 supports (U)SIM card hot-plug via the USIM_DET pin, and both high and low level detections are supported. The function is disabled by default, and please refer to AT+QSIMDET command in document

[2] for more details. The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM card connector. Figure 14: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. Figure 15: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector BG95_Hardware_Design 45 / 88 LPWA Module Series BG95 Hardware Design In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design:

Keep the placement of (U)SIM card connector as close to the module as possible. Keep the trace length as less than 200 mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5 mm to maintain the same electric potential. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1 F, and place it as close to (U)SIM card connector as possible. If the system ground plane is complete, USIM_GND can be connected to the system ground directly. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. USIM_RST should also be ground shielded. In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic capacitance not exceeding 15 pF. In order to facilitate debugging, it is recommended to reserve series resistors for the (U)SIM signals of the module. The 33 pF capacitors are used for filtering interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the

(U)SIM card connector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion are applied, and should be placed close to the (U)SIM card connector. 1. eSIM function is optional. If eSIM is selected, then the external (U)SIM cannot be used NOTES simultaneously. 2. * means under development. 3.10. USB Interface BG95 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports operation at low-speed (1.5 Mbps) and full-speed (12 Mbps) modes. The USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. The following table shows the pin definition of USB interface. Table 12: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment USB_VBUS AI USB connection detection Typical 5.0 V 8 9 USB_DP IO USB differential data (+) Require differential impedance of BG95_Hardware_Design 46 / 88 LPWA Module Series BG95 Hardware Design USB_DM IO USB differential data (-) 10 3 GND Ground 90 For more details about USB 2.0 specification, please visit https://www.usb.org/. The USB interface is recommended to be reserved for firmware upgrade in application designs. The following figure shows a reference design of USB interface. Figure 16: Reference Design of USB Interface In order to ensure the integrity of USB data line signal, components R1 and R2 should be placed close to the module. The extra stubs of trace must be as short as possible. The following principles should be complied with while designing the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with ground surrounded. The impedance of USB differential trace is 90 . Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and with ground planes above and below. Junction capacitance of the ESD protection device might cause influences on USB data lines, so please pay attention to the selection of the device. Typically, the stray capacitance should be less than 2 pF. Keep the ESD protection devices as close to the USB connector as possible. NOTE BG95 can only be used as a slave device. BG95_Hardware_Design 47 / 88 LPWA Module Series BG95 Hardware Design 3.11. UART Interfaces The module provides three UART interfaces: the main UART, debug UART and the GNSS UART interfaces. Features of them are illustrated below:

The main UART interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps, 230400 bps, 460800 bps and 921600 bps baud rates, and the default is 115200 bps. It is used for data transmission and AT command communication, and supports RTS and CTS hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit). The debug UART interface supports a fixed baud rate of 115200 bps, and is used for software The GNSS UART interface supports 115200 bps baud rate by default, and is used for GNSS data debugging and log output. and NMEA sentences output. The following tables show the pin definition of the three UART interfaces. Table 13: Pin Definition of Main UART Interface Pin Name Pin No. I/O Description Comment MAIN_DTR 30 Main UART data terminal ready 1.8 V power domain MAIN_RXD 34 Main UART receive 1.8 V power domain MAIN_TXD 35 Main UART transmit 1.8 V power domain MAIN_CTS 36 Main UART clear to send 1.8 V power domain MAIN_RTS 37 Main UART request to send 1.8 V power domain MAIN_DCD 38 Main UART data carrier detect 1.8 V power domain MAIN_RI 39 Main UART ring indication 1.8 V power domain DI DI DO DO DI DO DO NOTE AT+IPR command can be used to set the baud rate of the main UART interface, and AT+IFC command can be used to set the hardware flow control (the function is disabled by default). Please refer to document [2] for more details about these AT commands. BG95_Hardware_Design 48 / 88 LPWA Module Series BG95 Hardware Design Table 14: Pin Definition of Debug UART Interface Pin Name Pin No. I/O Description Comment DBG_RXD DBG_TXD 22 23 DI DO Debug UART receive 1.8 V power domain Debug UART transmit 1.8 V power domain Table 15: Pin Definition of GNSS UART Interface Pin Name Pin No. I/O Description Comment GNSS_TXD 27 DO GNSS UART transmit BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain GNSS_RXD 28 DI GNSS UART receive 1.8 V power domain GNSS_TXD is a BOOT_CONFIG pin. It should not be pulled up before startup. The logic levels of UART interfaces are described in the following table. Table 16: Logic Levels of Digital I/O Min.

-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V The module provides 1.8 V UART interfaces. A voltage-level translator should be used if customers application is equipped with a 3.3 V UART interface. The voltage-level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows a reference design of the main UART interface. NOTE Parameter VIL VIH VOL VOH BG95_Hardware_Design 49 / 88 LPWA Module Series BG95 Hardware Design VDD_EXT VCCA VCCB 0.1 F VDD_MCU 0.1uF 120K MAIN_RI MAIN_DCD MAIN_CTS MAIN_RTS MAIN_DTR MAIN_TXD MAIN_RXD OE A1 A2 A3 A4 A5 A6 A7 A8 Translator GND B1 B2 B3 B4 B5 B6 B7 B8 51K 51K RI_MCU DCD_MCU CTS_MCU RTS_MCU DTR_MCU TXD_MCU RXD_MCU Figure 17: Main UART Reference Design (Translator Chip) Please visit http://www.ti.com/ for more information. Another example with transistor translation circuit is shown as below. For the design of circuits in dotted lines, please refer to that of circuits in solid lines, but please pay attention to the direction of connection. VDD_EXT VDD_EXT 4.7K 1nF MCU/ARM 10K Module 10K 1nF VCC_MCU 4.7K VDD_EXT TXD RXD RTS CTS GPIO EINT GPIO GND MAIN_RXD MAIN_TXD MAIN_RTS MAIN_CTS MAIN_DTR MAIN_RI MAIN_DCD GND Figure 18: Main UART Reference Design (Transistor Circuit) NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. BG95_Hardware_Design 50 / 88 LPWA Module Series BG95 Hardware Design Figure 19: Reference Circuit with Dual-Transistor Circuit (Recommended for GNSS UART) NOTE GNSS_TXD is a BOOT_CONFIG pin (pin 27), therefore voltage-level translation IC solution with pull-up circuit or signal transistor/MOSFET circuit is not applicable to it. The dual-transistor circuit solution is recommended for GNSS UART. 3.12. PCM and I2C Interfaces*

BG95 provides one Pulse Code Modulation (PCM) digital interface and one I2C interface. The following table shows the pin definition of the two interfaces which can be applied on audio codec design. BG95_Hardware_Design 51 / 88 LPWA Module Series BG95 Hardware Design Table 17: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_CLK DO PCM clock 1.8 V power domain. PCM_SYNC DO PCM data frame sync 1.8 V power domain. PCM_DIN DI PCM data input 1.8 V power domain. PCM_DOUT DO PCM data output 1.8 V power domain. I2C_SCL I2C_SDA OD OD I2C serial clock (for external codec) I2C serial data (for external codec) Require external pull-up to 1.8 V. Require external pull-up to 1.8 V. The following figure shows a reference design of PCM and I2C interfaces with an external codec IC. 4 5 6 7 40 41 PCM_CLK PCM_SYNC PCM_DIN PCM_DOUT I2C_SCL I2C_SDA MICBIAS INP INN LOUTP LOUTN BCLK WCLK ADC DAC SCL SDA S A B I Module K 7

. 4 K 7

. 4 1.8V Codec Figure 20: Reference Circuit of PCM Application with Audio Codec NOTE

* means under development. 3.13. Network Status Indication BG95 provides one network status indication pin: NET_STATUS. The pin is used to drive a network status indication LED. The following tables describe the pin definition and logic level changes of NET_STATUS in different network activity status. BG95_Hardware_Design 52 / 88 LPWA Module Series BG95 Hardware Design Table 18: Pin Definition of NET_STATUS Pin Name Pin No. I/O Description Comment NET_STATUS 21 DO Module network activity status indication 1.8 V power domain Table 19: Working State of NET_STATUS Pin Name Logic Level Changes Network Status Flicker slowly (200 ms High/1800 ms Low) Network searching NET_STATUS Flicker slowly (1800 ms High/200 ms Low) Idle Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always high Voice calling A reference circuit is shown in the following figure. Module NET_STATUS 4.7K VBAT 2.2K 47K Figure 21: Reference Circuit of the Network Status Indicator 3.14. STATUS The STATUS pin is used to indicate the operation status of BG95. It will output high level when the module is powered on. The following table describes the pin definition of STATUS. BG95_Hardware_Design 53 / 88 LPWA Module Series BG95 Hardware Design Table 20: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Module operation status indication 1.8 V power domain The following figure shows a reference circuit of STATUS. Figure 22: Reference Design of STATUS State Idle URC NOTES 3.15. Behaviors of MAIN_RI AT+QCFG="risignaltype","physical" command can be used to configure MAIN_RI pin behavior. No matter on which port URC is presented, URC will trigger the behavior of MAIN_RI pin. The default behaviors of MAIN_RI pin are shown as below. Table 21: Default Behaviors of MAIN_RI Pin Response MAIN_RI keeps in high level. MAIN_RI outputs 120 ms low pulse when a new URC returns. The default MAIN_RI pin behaviors can be configured flexibly by AT+QCFG="urc/ri/ring" command. For more details about AT+QCFG*, please refer to document [2]. 1. URC can be outputted from UART port, USB AT port and USB modem port, through configuration via AT+QURCCFG command. The default port is USB AT port. BG95_Hardware_Design 54 / 88 LPWA Module Series BG95 Hardware Design 2. * means under development. 3.16. USB_BOOT Interface BG95 provides a USB_BOOT pin. During development or factory production, USB_BOOT can force the module to boot from USB port for firmware upgrade. Table 22: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description Comment USB_BOOT 75 DI Force the module into emergency download mode The following figure shows a reference circuit of USB_BOOT interface. 1.8 V power domain. Active high. If unused, keep it open. Figure 23: Reference Design of USB_BOOT Interface The following figure shows the timing of USB_BOOT. BG95_Hardware_Design 55 / 88 LPWA Module Series BG95 Hardware Design Figure 24: Timing of Turning on Module with USB_BOOT NOTES It is recommended to reserve the above circuit design during application design. 1. 2. Please make sure that VBAT is stable before pulling down PWRKEY. It is recommended that the time between powering up VBAT and pulling down PWRKEY is no less than 30 ms. 3. When using MCU to control the module entering emergency download mode, please follow the above timing sequence. Connecting the test points as shown in Figure 23 can manually force the module to enter download mode. 3.17. ADC Interfaces The module provides two analog-to-digital converter (ADC) interfaces but only one ADC interface can be used at a time. ADC1 is connected directly to ADC0 inside the module. AT+QADC=0 command can be used to read the voltage value on the ADC being used. For more details about the AT command, please refer to document [2]. In order to improve the accuracy of ADC voltage values, the trace of ADC should be ground surrounded. BG95_Hardware_Design 56 / 88 LPWA Module Series BG95 Hardware Design Table 23: Pin Definition of ADC Interface Pin Name Pin No. I/O Description Comment ADC0 ADC1 24 2 AI AI General-purpose ADC interface General-purpose ADC interface ADC0 and ADC1 cannot be used simultaneously. The following table describes the characteristics of ADC interfaces. Table 24: Characteristics of ADC Interfaces Min. 0.1 Typ. 64.979 500 4.8 Max. 1.8 Unit V V kHz MHz M Input Resistance 10 1. ADC input voltage must not exceed 1.8 V. 2. 3. It is prohibited to supply any voltage to ADC pin when VBAT is removed. It is recommended to use resistor divider circuit for ADC application, and the divider resistor accuracy should be no less than 1%. 4. ADC0 and ADC1 cannot be used simultaneously, as ADC1 is connected directly to ADC0 inside the Parameter Voltage Range Resolution (LSB) Analog Bandwidth Sample Clock NOTES module. 3.18. GPIO Interfaces*

The module provides nine general-purpose input and output (GPIO) interfaces. AT+QCFG="gpio"*

command can be used to configure the status of GPIO pins. For more details about the AT command, please refer to document [2]. BG95_Hardware_Design 57 / 88 LPWA Module Series BG95 Hardware Design Table 25: Pin Definition of GPIO Interfaces Pin Name Pin No. Description 25 26 64 65 66 85 86 87 88 General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output The following table describes the characteristics of GPIO interfaces. Table 26: Logic Levels of GPIO Interfaces GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 Parameter VIL VIH VOL VOH NOTE Min.

-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V

* means under development. 3.19. GRFC Interfaces The module provides two generic RF control interfaces for the control of external antenna tuners. BG95_Hardware_Design 58 / 88 LPWA Module Series BG95 Hardware Design Table 27: Pin Definition of GRFC Interfaces Pin Name Pin No. Description Comments GRFC1 83 Generic RF controller 1.8 V power domain. GRFC2 84 Generic RF controller BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. Table 28: Logic Levels of GRFC Interfaces Parameter VOL VOH Min. 0 1.35 Max. 0.45 1.8 Unit V V Table 29: Truth Table of GRFC Interfaces GRFC1 Level GRFC2 Level Frequency Range (MHz) Band Low Low High Low High Low 8802200 B1, B2, B3, B4, B8, B25, B66 791894 698803 B5, B18, B19, B20, B26, B27 B12, B13, B28, B85 High High 617698 B71 NOTES 1. GRFC2 (pin 84) is a BOOT_CONFIG pin. It should not be pulled up before startup. 2. BG95-M4 does not support GRFC interfaces. BG95_Hardware_Design 59 / 88 LPWA Module Series BG95 Hardware Design 4 GNSS Receiver 4.1. General Description BG95 includes a fully integrated global navigation satellite system solution that supports Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). The module supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, BG95 GNSS engine is switched off. It has to be switched on via AT command. For more details about GNSS engine technology and configurations, please refer to document [3]. 4.2. GNSS Performance The following table shows the GNSS performance of BG95. Table 30: GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) TTFF

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous Cold start

@open sky Warm start

@open sky Autonomous XTRA enabled Autonomous XTRA enabled Typ.

-146

-157

-157 TBD TBD TBD TBD Unit dBm dBm dBm s s s s BG95_Hardware_Design 60 / 88 LPWA Module Series BG95 Hardware Design Hot start

@open sky CEP-50 Autonomous XTRA enabled Autonomous

@open sky TBD TBD

< 3 s s m Accuracy

(GNSS) NOTES 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. 4.3. Layout Guidelines The following layout guidelines should be taken into account in application designs. Maximize the distance between GNSS antenna and main antenna. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar should be kept away from the antennas. isolation and protection. Keep 50 characteristic impedance for ANT_GNSS trace. Please refer to Chapter 5 for GNSS antenna reference design and antenna installation information. BG95_Hardware_Design 61 / 88 LPWA Module Series BG95 Hardware Design 5 Antenna Interfaces BG95 includes a main antenna interface and a GNSS antenna interface. The antenna ports have an impedance of 50 . 5.1. Main Antenna Interface 5.1.1. Pin Definition The pin definition of main antenna interface is shown below. Table 31: Pin Definition of Main Antenna Interface 5.1.2. Operating Frequency Table 32: BG95 Operating Frequency Pin Name Pin No. I/O Description Comment ANT_MAIN 60 IO Main antenna interface 50 characteristic impedance 3GPP Band Transmit Receive LTE-FDD B1 19201980 21102170 LTE-FDD B2, PCS1900 18501910 19301990 LTE-FDD B3, DCS1800 17101785 18051880 LTE-FDD B4 17101755 21102155 LTE-FDD B5, GSM850 824849 LTE-FDD B8, EGSM900 880915 LTE-FDD B12 699716 869894 925960 729746 Unit MHz MHz MHz MHz MHz MHz MHz BG95_Hardware_Design 62 / 88 LPWA Module Series BG95 Hardware Design LTE-FDD B25 18501915 19301995 452.5457.5 462.5467.5 LTE-FDD B66 17101780 21102180 777787 815830 830845 832862 814849 807824 703748 663698 451456 450455 698716 746756 860875 875890 791821 859894 852869 758803 617652 461466 460465 728746 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B26 1) LTE-FDD B27 1) LTE-FDD B28 LTE-FDD B31 3) LTE-FDD B71 2) LTE-FDD B72 3) LTE-FDD B73 3) LTE-FDD B85 NOTES 1. 1) LTE-FDD B26 and B27 are supported by Cat M1 only. 2. 2) LTE-FDD B71 is supported by Cat NB2 only. 3. 3) LTE-FDD B31, B72 and B73 are supported by BG95-M4 only. 4. * means under development. 5.1.3. Reference Design of Main Antenna Interface A reference design of main antenna interface is shown as below. It is recommended to reserve a -type matching circuit for better RF performance, and the -type matching components (R1/C1/C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. BG95_Hardware_Design 63 / 88 LPWA Module Series BG95 Hardware Design Figure 25: Reference Design of Main Antenna Interface 5.1.4. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, height from the reference ground to the signal layer (H), and the clearance between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 26: Microstrip Design on a 2-layer PCB BG95_Hardware_Design 64 / 88 LPWA Module Series BG95 Hardware Design Figure 27: Coplanar Waveguide Design on a 2-layer PCB Figure 28: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) BG95_Hardware_Design 65 / 88 LPWA Module Series BG95 Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 . connected to ground. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times as wide as RF signal traces (2 W). For more details about RF layout, please refer to document [4]. 5.2. GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNSS antenna interface. Table 33: Pin Definition of GNSS Antenna Interface Pin Name Pin No. I/O Description Comment ANT_GNSS 49 AI GNSS antenna interface 50 impedance Table 34: GNSS Frequency GLONASS 1597.51605.8 Frequency 1575.42 1.023 1575.42 2.046 1561.098 2.046 1575.42 1.023 Unit MHz MHz MHz MHz MHz Type GPS Galileo BeiDou QZSS BG95_Hardware_Design 66 / 88 LPWA Module Series BG95 Hardware Design A reference design of GNSS antenna interface is shown as below. 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. If the module is designed with a passive antenna, then the VDD circuit is not needed. Figure 30: Reference Circuit of GNSS Antenna Interface NOTES GNSS 1) 5.3. Antenna Installation 5.3.1. Antenna Requirements Table 35: Antenna Requirements Antenna Type Requirements The following table shows the requirements on main antenna and GNSS antenna. Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Active antenna gain: > 0 dBi Active antenna embedded LNA gain: < 17 dB LTE/GSM VSWR: 2 Efficiency: > 30%

BG95_Hardware_Design 67 / 88 LPWA Module Series BG95 Hardware Design Max Input Power: 50 W Input Impedance: 50 Cable Insertion Loss: < 1 dB

(LTE B5/B8/B12/B13/B18/B19/B20/B26/B27/B28/B71/B72/B73/B85, GSM850/EGSM900) Cable Insertion Loss: < 1.5 dB

(LTE B1/B2/B3/B4/B25/B66, DCS1800/PCS1900) NOTE 1) It is recommended to use a passive GNSS antenna when LTE B13 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance. 5.3.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connectors provided by HIROSE. Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) BG95_Hardware_Design 68 / 88 LPWA Module Series BG95 Hardware Design U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 32: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 33: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com/. BG95_Hardware_Design 69 / 88 LPWA Module Series BG95 Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 36: Absolute Maximum Ratings Parameter VBAT_BB VBAT_RF USB_VBUS Voltage at Digital Pins Min.

-0.5

-0.3

-0.3

-0.3 6.2. Power Supply Ratings Table 37: Power Supply Ratings Max. Unit 6.0 6.0 5.5 2.09 V V V V Parameter Description Conditions Module Min. Typ. Max. Unit VBAT VBAT_BB/

VBAT_RF The actual input voltages must be kept between the minimum and the maximum values. BG95-M1/

BG95-M2/

BG95-N1 BG95-M3/

BG95-M5 2.6 3.3 4.8 V 3.3 3.8 4.3 V BG95_Hardware_Design 70 / 88 LPWA Module Series BG95 Hardware Design IVBAT Peak supply current (during transmission slot) Maximum power control level on EGSM900 BG95-M4 3.8 V 1.8 2.0 A BG95-M3/

BG95-M5 BG95-M1/

BG95-M2/

BG95-M3/

BG95-N1/

BG95-M4/

BG95-M5 USB_VBUS USB detection 5.0 V 6.3. Operation and Storage Temperatures The operation and storage temperatures of the module are listed in the following table. Table 38: Operation and Storage Temperatures Parameter Min. Max. Unit Operation Temperature Range 1)

-35 Extended Temperature Range 2)

-40 Storage Temperature Range

-40 Typ.

+25

+75

+85

+90 C C C NOTES 1. 2. 1) Within operation temperature range, the module is 3GPP compliant. 2) Within extended temperature range, the module remains the ability to establish and maintain functions such as SMS and data transmission, without any unrecoverable malfunction. Radio spectrum and radio network will not be influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the temperature returns to the normal operation temperature levels, the module will meet 3GPP specifications again. 6.4. Current Consumption The following table shows current consumption of BG95. BG95_Hardware_Design 71 / 88 LPWA Module Series BG95 Hardware Design Table 39: BG95-M3 Current Consumption Description Conditions Average Max. Unit Leakage 1) PSM 2) Power Saving Mode Power-off @ USB and UART disconnected 14.5 Rock Bottom AT+CFUN=0 @ Sleep mode Sleep Mode

(USB disconnected) LTE Cat M1 DRX = 1.28 s @ Paging = 24 ms LTE Cat NB1 DRX = 1.28 s @ Paging = 24 ms LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 20.48 s, DRX = 2.56 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 20.48 s, DRX = 2.56 s LTE Cat M1 data transfer

(GNSS OFF) Band 1 @ 21.03 dBm Band 2 @ 21.13 dBm Band 3 @ 21.42 dBm Band 4 @ 21.27 dBm Band 5 @ 21.22 dBm Band 8 @ 21.11 dBm Band 12 @ 20.98 dBm Band 13 @ 21.05 dBm Band 14 @ 20.43 dBm Band 18 @ 21.05 dBm Band 19 @ 20.9 dBm Band 20 @ 20.94 dBm Band 25 @ 20.09 dBm Band 26 @ TBD Band 27 @ 21.12 dBm

A A mA 3.9 0.7 1.65 106 mA 1.56 80 mA 0.85 117 mA 0.81 85 mA 186 187 184 182 192 190 185 199 192 193 191 192 186 412 402 403 387 422 413 412 450 425 434 430 429 416 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA TBD 193 TBD 437 BG95_Hardware_Design 72 / 88 LPWA Module Series BG95 Hardware Design Band 28A @ 20.99 dBm Band 28B @ 20.97 dBm Band 66 @ 20.95 dBm Band 85 @ 21.06 dBm Band 1 @ 21.19 dBm Band 2 @ 21.43 dBm Band 3 @ 21.4 dBm Band 4 @ 21.48 dBm Band 5 @ 21.54 dBm Band 8 @ 21.13 dBm Band 12 @ 21.43 dBm Band 13 @ 21.62 dBm Band 18 @ 21.5 dBm Band 19 @ 21.48 dBm Band 20 @ 21.55 dBm Band 25 @ 21.61 dBm Band 28 @ 21.45 dBm Band 66 @ 21.5 dBm Band 71 @ 20.71 dBm Band 85 @ 21.82 dBm LTE Cat NB1 data transfer

(GNSS OFF) GPRS data transfer (GNSS OFF) GPRS GSM850 4UL/1DL @ 28 dBm GPRS GSM900 4UL/1DL @ 28 dBm GPRS DCS1800 4UL/1DL @ 25 dBm GPRS PCS1900 4UL/1DL @ 25 dBm EDGE data transfer (GNSS OFF) EDGE GSM850 4UL/1DL @ 23 dBm EDGE GSM900 4UL/1DL @ 21 dBm 188 190 181 185 149 151 144 145 165 155 150 172 164 164 165 153 158 145 132 154 518 528 375 387 511 507 431 425 382 405 373 384 360 364 423 399 385 442 427 431 423 389 410 376 329 395 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 1054 mA 1081 mA 725 750 mA mA 1194 mA 1161 mA Band 26 @ TBD TBD TBD BG95_Hardware_Design 73 / 88 LPWA Module Series BG95 Hardware Design EDGE DCS1800 4UL/1DL @ 21 dBm EDGE PCS1900 4UL/1DL @ 21 dBm 423 426 857 887 mA mA NOTES 1. 1) The current consumption in PSM is much lower than that in power off mode, and this is because of the following two designs:

More internal power supplies are powered off in PSM. Also the internal clock frequency is reduced in PSM. 2. 2) The modules USB and UART are disconnected and GSM network does not support PSM. Table 40: GNSS Current Consumption Description Conditions Typ. Unit Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Cold start @ Instrument Cold start @ Real network with half sky, Active Antenna Instrument Environment @ DPO off Instrument Environment @ DPO on Half Sky @ Real network, Active Antenna, DPO off 71 71 56 21 56 mA mA mA mA mA 6.5. RF Output Power The following table shows the RF output power of BG95. Table 41: BG95 RF Output Power Frequency Max. Min. LTE-FDD B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/

B25/B261)/B27 1)/B31 3)/B28/B66/B71 2)/ B72 3)/B73 3)/B85 21 dBm +1.7/-3 dB

< -39 dBm GSM850/EGSM900 DCS1800/PCS1900 33 dBm 2 dB 5 dBm 5 dB 30 dBm 2 dB 0 dBm 5 dB BG95_Hardware_Design 74 / 88 LPWA Module Series BG95 Hardware Design GSM850/EGSM900 (8-PSK) 27 dBm 3 dB 5 dBm 5 dB DCS1800/PCS1900 (8-PSK) 26 dBm 3 dB 0 dBm 5 dB NOTES 1. 2. 3. 1) LTE-FDD B26 and B27 are supported by Cat M1 only. 2) LTE-FDD B71 is supported by Cat NB2 only. 3) LTE-FDD B31, B72 and B73 are supported by BG95-M4 only. 6.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of BG95. Table 42: Conducted RF Receiving Sensitivity of BG95-M1 Network Band Primary Diversity Sensitivity (dBm) Cat M1/3GPP Cat NB2 LTE Supported Not Supported Not Supported LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25

-108/-102.3

-108.4/-100.3

-108.4/-99.3

-108/-102.3

-107.6/-100.8

-108/-99.8

-108.6/-99.3

-107/-99.3

-108/-102.3

-108/-102.3

-108/-99.8

-108.2/-100.3 BG95_Hardware_Design 75 / 88 LPWA Module Series BG95 Hardware Design Table 43: Conducted RF Receiving Sensitivity of BG95-M2 Network Band Primary Diversity LTE-FDD B26 LTE-FDD B27 LTE-FDD B28 LTE-FDD B66 LTE-FDD B71 LTE-FDD B85 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26

-108.2/-100.3

-108.4-100.8

-106.8/-100.8

-107.8/-101.8 Not Supported

-108.4/-99.3 Sensitivity ( dBm) Cat M1/3GPP Cat NB2 1)/3GPP

-107/-102.3

-114/-107.5

-107/-100.3

-116/-107.5

-107/-99.3

-113/-107.5

-107/-102.3

-114/-107.5

-107/-100.8

-115/-107.5

-107/-99.8

-113/-107.5

-107/-99.3

-114/-107.5

-107/-102.3

-116/-107.5

-107/-102.3

-116/-107.5

-107/-99.8

-115/-107.5

-107/-100.3

-115/-107.5

-107/-100.3

-115/-107.5 LTE LTE-FDD B12 Supported

-107/-99.3

-116/-107.5 Not Supported BG95_Hardware_Design 76 / 88 LPWA Module Series BG95 Hardware Design Table 44: Conducted RF Receiving Sensitivity of BG95-M3 Network Band Primary Diversity

-107/-100.8 Not Supported

-107/-100.8

-115/-107.5

-107/-101.8

-115/-107.5 Not Supported

-115/-107.5

-107/-99.3

-115/-107.5 Sensitivity ( dBm) Cat M1/3GPP Cat NB2 1)/3GPP

-104.7/-102.3

-113/-107.5

-105/-100.3

-114/-107.5

-104.2/-99.3

-114/-107.5

-104.7/-102.3

-114/-107.5

-104.2/-100.8

-115/-107.5

-104.2/-99.8

-114/-107.5

-104.7/-99.3

-115/-107.5

-104.4/-102.3

-115/-107.5

-104.4/-102.3

-115/-107.5

-104.2/-99.8

-114/-107.5

-104.4/-100.3

-114/-107.5

-104.4/-100.3

-115/-107.5

-104.4/-100.8 Not Supported

-103.7/-100.8

-115/-107.5 LTE-FDD B27 LTE-FDD B28 LTE-FDD B66 LTE-FDD B71 LTE-FDD B85 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B27 LTE-FDD B28 LTE LTE-FDD B13 Supported

-104.7/-99.3

-115/-107.5 Not Supported BG95_Hardware_Design 77 / 88 LPWA Module Series BG95 Hardware Design LTE-FDD B66 LTE-FDD B71 LTE-FDD B85

-104.1/-101.8

-114/-107.5 Not Supported

-115/-107.5

-104.1/-99.3

-115/-107.5 Sensitivity ( dBm) Network Band Primary Diversity GSM GSM850/EGSM900 DCS1800/PCS1900 Supported Not Supported GSM/3GPP

-107/-102

-107/-102 NOTES 1. 1) LTE Cat NB2 receiving sensitivity without repetitions. 2. * means under development. 6.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the electrostatic discharge characteristics of BG95. Table 45: Electrostatic Discharge Characteristics (25 C, 45% Relative Humidity) Tested Interfaces Contact Discharge Air Discharge Unit VBAT, GND Main/GNSS Antenna Interfaces 10 5 12 5 kV kV BG95_Hardware_Design 78 / 88 LPWA Module Series BG95 Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are 0.05 mm unless otherwise specified. 7.1. Top and Side Dimensions 19.90.15 2.20.2 Pin 1 5 1

. 0 6

. 3 2 Figure 34: Module Top and Side Dimensions BG95_Hardware_Design 79 / 88 LPWA Module Series BG95 Hardware Design 19.900.15 0.25 1.10 0.55 1.95 1.10 5.10 1.00 0 5

. 8 0.85 1.70 5 1

. 0 0 6

. 3 2 1.00 1.70 1.00 1.70 0.70 1.00 1.00 0.25 Pin 1 1.90 1.10 0.50 0.25 1.10 0.25 0.55 40x1.0 62x0.7 40x1.0 62x1.10 Figure 35: Module Bottom Dimensions (Bottom View) BG95_Hardware_Design 80 / 88 LPWA Module Series BG95 Hardware Design 7.2. Recommended Footprint 9.95 9.15 7.45 1.10 19.900.15 9.95 9.15 7.15 1.95 0.55 1.10 0.25 1.00 1.00 Pin 1 1.10 1.70 2.50 1.70 1.70 0.85 5 1

. 0 0 6

. 3 2 0.25 1.70 0.15 1.70 0.85 1

. 7 0 2.55 0.85 1.00 1.10 1.00 0.70 1.10 0.25 1.10 2.50 1.10 4.25 5.95 62x0.7 4.25 5.95 40x1.0 62x1.10 40x1.0 0.25 0

. 2 0 1

. 9 0 5

. 9 5

. 4 2 5 4

. 2 5 5

. 9 5

. 1 1 8 0 1 1 0 0

. 9

. 7 0

. 7 6 5 7

. 6 5 9

. 6 0 1 1

. 0 0 1 1

. 8 0 Figure 36: Recommended Footprint (Top View) NOTES 1. For easy maintenance of the module, please keep about 3 mm between the module and other components on the motherboard. 2. All RESERVED pins must be kept open. 3. For stencil design requirements of the module, please refer to document [5]. BG95_Hardware_Design 81 / 88 LPWA Module Series BG95 Hardware Design 7.3. Top and Bottom Views Figure 37: Top View of the Module Figure 38: Bottom View of the Module NOTE These are renderings of BG95 module. For authentic appearance, please refer to the module that you receive from Quectel. BG95_Hardware_Design 82 / 88 LPWA Module Series BG95 Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage BG95 is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are listed below. 1. Shelf life in the vacuum-sealed bag: 12 months at < 40 C/90% RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:

Mounted within 168 hours at the factory environment of 30 C/60% RH. Stored at < 10% RH. 3. Devices require baking before mounting, if any circumstance below occurs. When the ambient temperature is 23 5 C and the humidity indication card shows the humidity is > 10% before opening the vacuum-sealed bag. Device mounting cannot be finished within 168 hours at factory conditions of 30 C/60% RH. If baking is required, devices may be baked for 8 hours at 120 5 C. As the plastic package cannot be subjected to high temperature, it should be removed from devices before high temperature (120 C) baking. If shorter baking time is desired, please refer to IPC/JEDECJ-STD-033 for baking procedure. 4. NOTE BG95_Hardware_Design 83 / 88 LPWA Module Series BG95 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.130.15 mm. For more details, please refer to document [5]. It is suggested that the peak reflow temperature is 238245 C, and the absolute maximum reflow temperature is 245 C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 39: Recommended Reflow Soldering Thermal Profile Factor Soak Zone Max slope Table 46: Recommended Thermal Profile Parameters Recommendation 1 to 3 C/sec Soak time (between A and B: 150 C and 200 C) 60 to 120 sec BG95_Hardware_Design 84 / 88 LPWA Module Series BG95 Hardware Design Reflow Zone Max slope Reflow time (D: over 220 C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle 8.3. Packaging 2 to 3 C/sec 40 to 60 sec 238 to 245 C 1 to 4 C/sec 1 BG95 is packaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until the devices are ready to be soldered onto the application. The reel is 330 mm in diameter and each reel contains 250 modules. The following figures show the packaging details, measured in millimeter (mm). Figure 40: Tape Dimensions BG95_Hardware_Design 85 / 88 LPWA Module Series BG95 Hardware Design Figure 41: Reel Dimensions Table 47: Packaging Specifications of BG95 MOQ for MP Minimum Package: 250 Minimum Package 4 = 1000 250 Size: 370 mm 350 mm 56 mm N.W: 0.61 kg G.W: 1.35 kg Size: 380 mm 250 mm 365 mm N.W: 2.45 kg G.W: 6.28 kg BG95_Hardware_Design 86 / 88 LPWA Module Series BG95 Hardware Design 9 Appendix A References Table 48: Related Documents SN Document Name Remark

[1] Quectel_UMTS&LTE_EVB_User_Guide UMTS&LTE EVB User Guide

[2] Quectel_BG95&BG77_AT_Commands_Manual BG95/BG77 AT Commands Manual

[3] Quectel_BG95&BG77_GNSS_Application_Note BG95/BG77 GNSS Application Note

[4] Quectel_RF_Layout_Application_Note RF Layout Application Note

[5] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 49: Terms and Abbreviations Abbreviation Description Adaptive Multi-rate Bits Per Second Coding Scheme Clear To Send Challenge Handshake Authentication Protocol Delta Firmware Upgrade Over The Air Downlink Data Terminal Ready Discontinuous Transmission Extended Idle Mode Discontinuous Reception Evolved Packet Core AMR bps CHAP CS CTS DFOTA DL DTR DTX e-I-DRX EPC BG95_Hardware_Design 87 / 88 LPWA Module Series BG95 Hardware Design ESD FDD FR GMSK GSM HSS I/O Inorm LED LNA LTE MO MS MT PAP PCB PDU PPP PSM RF RHCP Rx SISO SMS TDD Electrostatic Discharge Frequency Division Duplex Full Rate Gaussian Minimum Shift Keying Global System for Mobile Communications Home Subscriber Server Input/Output Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution Mobile Originated Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Power Saving Mode Radio Frequency Right Hand Circularly Polarized Receive Single Input Single Output Short Message Service Time Division Duplexing BG95_Hardware_Design 88 / 88 LPWA Module Series BG95 Hardware Design Transmitting Direction Uplink User Equipment Unsolicited Result Code Maximum Voltage Value Normal Voltage Value Minimum Voltage Value

(Universal) Subscriber Identity Module Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio TX UL UE URC

(U)SIM Vmax Vnorm Vmin VIHmax VIHmin VILmax VILmin VImax VImin VOHmax VOHmin VOLmax VOLmin VSWR BG95_Hardware_Design 89 / 88 LPWA Module Series BG95 Hardware Design 10 Appendix B GPRS Coding Schemes Table 50: Description of Different Coding Schemes Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits Data Rate Kb/s Radio Block excl.USF and BCS 181 268 CS-1 CS-2 CS-3 CS-4 2/3 3/4 1/2 3 3 40 4 456 0 3 6 16 4 588 132 9.05 13.4 1 3 12 428 16

456 21.4 3 6 312 16 4 676 220 15.6 BG95_Hardware_Design 90 / 88 LPWA Module Series BG95 Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 51: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA 1 1 2 1 2 2 3 1 2 2 3 4 3 4 BG95_Hardware_Design 91 / 88 LPWA Module Series BG95 Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 BG95_Hardware_Design 92 / 88 LPWA Module Series BG95 Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 52: EDGE Modulation and Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot GMSK GMSK GMSK GMSK GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK

C B A C B A B A A 9.05 kbps 18.1 kbps 36.2 kbps 13.4 kbps 26.8 kbps 53.6 kbps 15.6 kbps 31.2 kbps 62.4 kbps 21.4 kbps 42.8 kbps 85.6 kbps 8.80 kbps 17.60 kbps 35.20 kbps 11.2 kbps 22.4 kbps 44.8 kbps 14.8 kbps 29.6 kbps 59.2 kbps 17.6 kbps 35.2 kbps 70.4 kbps 22.4 kbps 44.8 kbps 89.6 kbps 29.6 kbps 59.2 kbps 118.4 kbps 44.8 kbps 89.6 kbps 179.2 kbps 54.4 kbps 108.8 kbps 217.6 kbps 59.2 kbps 118.4 kbps 236.8 kbps Coding Schemes CS-1 CS-2 CS-3 CS-4 MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 BG95_Hardware_Design 93 / 88

QUECTEL BG95-M2 a1-axox LA BG95M2LA-64-SGNS SN 2QXOQOOOQOOOOOXXKXK IMEI:XXXXXXXXXXXXXXK FCC ID: XMR2020BG95M2 IC: 10224A-2020BG95M2 Of Dl c nw aH art ORs seca wy

Quectel Wireless Solutions Company Limited FCC CIIPC Letter LTE Cat M1 & Cat NB2 Module XMR2020BG95M2 BG95-M2 Description of Permissive Change Product:

FCC ID:

Model No.:

Requirement:

We, Quectel Wireless Solutions Company Limited to request a Class II permissive change for FCC ID: XMR2020BG95M2 in order to enable LTE Band 8 via software, here is not any hardware change. This software is authorized and controlled by Quectel, all the other third-parties can't modify the software. For reference, Original FCC grant was issues on 05/28/2020. If you have any questions regarding this application, please feel free to contact me Sincerely, ________________ Name: Jean Hu Title: Manager Email: jean.hu@quectel.com Date: 2022-02-08

Quectel Wireless Solutions Company Limited Confidentiality Request Letter Federal Communications Commission Authorization and Evaluation Division FCC ID: XMR2020BG95M2 Pursuant to Sections 0.457 and 0.459 of the Commissions Rules, we hereby request confidential treatment of information accompanying this application as outlined below:

Tune-up Procedure The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these matters might be harmful to the applicant and provide unjustified benefits to its competitors. The applicant understands that pursuant to Rule 0.457, disclosure of this application and all accompanying documentation will not be made before the date of the Grant for this application. Sincerely, _________________ Name: Jean Hu Title: Manager Email: jean.hu@quectel.com Date: 2022-01-21

Quectel Wireless Solutions Company Limited Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Request for Modular/Limited Modular Approval Date: 2022.01.21 Subject: Manufacturers Declaration for Confidentiality Request for: XMR2020BG95M2

- Modular Approval

- Split Modular Approval

- Limited Modular Approval - Limited Split Modular Approval 8 Basic Requirements FCC Part 15.212(a)(1) For Items Marked NO(*), the Limited Module Description Must be Filled Out on the Following Pages Modular Approval Requirement 1. The modular transmitter must have its own RF shielding. This is intended to ensure that the module does not have to rely upon the shielding provided by the device into which it is installed in order for all modular transmitter emissions to comply with FCC limits. It is also intended to prevent coupling between the RF circuitry of the module and any wires or circuits in the device into which the module is installed. Such coupling may result in non-compliant operation. The physical crystal and tuning capacitors may be located external to the shielded radio elements. 15.212(a)(1)(i) Details: <example The module contains a metal shield which covers all RF components and circuitry. The shield is located on the top of the board next to antenna connector>

Requirement Met

- YES - NO(*) 2. The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with FCC requirements under conditions of excessive data rates or over-modulation. 15.212(a)(1)(ii) Details: <example Data to the modulation circuit is buffered as described in the operational description provided with the application>

- YES - NO(*) 3. The modular transmitter must have its own power supply regulation on the module. This is intended to ensure that the module will comply with FCC requirements regardless of the design of the power supplying circuitry in the device into which the module is installed. 15.212(a)(1)(iii) Details: <example The module contains its own power supply regulation. Please refer to schematic filed with this application>

- YES - NO(*) 4. The modular transmitter must comply with the antenna and transmission system requirements of 15.203, 15.204(b), 15.204(c), 15.212(a), and 2.929(b). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph 15.212(b). 15.212(a)(1)(iv) Details: <example The module connects to its antenna using an UFL connector which is considered a non-

standard connector. A list of antennas tested and approved with this device may be found in users manual provided with the application>

- YES - NO(*) 5. The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing. This is intended to demonstrate that the module is capable of complying with Part 15 emission limits regardless of the device into which it is eventually installed. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with the module (see Section 15.27(a)). The length of these lines shall be length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified or commercially available (see Section 15.31(i)). 15.212(a)(1)(v) Details: <example The module was tested stand-alone as shown in test setup photographs filed with this application>

- YES - NO(*) 6. The modular transmitter must be labeled with its own FCC ID number, or use an electron Modular Approval Requirement Requirement Met display (see KDB Publication 784748). If using a permanently affixed label with its own FCC ID number, if the FCC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains Transmitter Module FCC ID:

XMR2020BG95M2 or Contains FCC ID: XMR2020BG95M2 Any similar wording that expresses the same meaning may be used. The Grantee may either provide such a label, an example of which must be included in the application for equipment authorization, or, must provide adequate instructions along with the module which explain this requirement. In the latter case, a copy of these instructions must be included in the application for equipment authorization. If the modular transmitter uses an electronic display of the FCC identification number, the information must be readily accessible and visible on the modular transmitter or on the device in which it is installed. If the module is installed inside another device, then the outside of the device into which the module is installed must display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains FCC certified transmitter module(s). Any similar wording that expresses the same meaning may be used. The user manual must include instructions on how to access the electronic display. A copy of these instructions must be included in the application for equipment authorization. 15.212(a)(1)(vi) Details: <example There is a label on the module as shown in the labeling exhibit filed with this application. Host specific labeling instructions are shown in the installation manual .filed with this application.>

- YES - NO(*) 7. The modular transmitter must comply with all specific rule or operating requirements applicable to the transmitter, including all the conditions provided in the integration instructions by the grantee. A copy of these instructions must be included in the application for equipment authorization. For example, there are very strict operational and timing requirements that must be met before a transmitter is authorized for operation under Section 15.231. For instance, data transmission is prohibited, except for operation under Section 15.231(e), in which case there are separate field strength level and timing requirements. Compliance with these requirements must be assured. 15.212(a)(1)(vii) Details: <example The module complies with FCC Part 15C requirements. Instructions to the OEM installer are provided in the installation manual filed with this application.>

- YES - NO(*) 8. The modular transmitter must comply with any applicable RF exposure requirements. For example, FCC Rules in Sections 2.1091, 2.1093 and specific Sections of Part 15, including 15.319(i), 15.407(f), 15.253(f) and 15.255(g), require that Unlicensed PCS, UNII and millimeter wave devices perform routine environmental evaluation for RF Exposure to demonstrate compliance. In addition, spread spectrum transmitters operating under Section 15.247 are required to address RF Exposure compliance in accordance with Section 15.247(b)(4). Modular transmitters approved under other Sections of Part 15, when necessary, may also need to address certain RF Exposure concerns, typically by providing specific installation and operating instructions for users, installers and other interested parties to ensure compliance. 15.212(a)(1)(viii) Details: < The module meets RF exposure in mobile configuration.>

- YES - NO(*) 070920-02b Limited Module Description When Applicable

* If a module does NOT meet one or more of the above 8 requirements, the applicant may request Limited Modular Approval

(LMA). This Limited Modular Approval (LMA) is applied with the understanding that the applicant will demonstrate and will retain control over the final installation of the device, such that compliance of the end product is always assured. The operating condition(s) for the LMA; the module is only approved for use when installed in devices produced by grantee. A description regarding how control of the end product, into which the module will be installed, will be maintained by the applicant/manufacturer, such that full compliance of the end product is always ensured should be provided here. Details: <example - N/A>

Software Considerations KDB 594280 / KDB 442812 (One of the following 2 items must be applied) Requirement 1. For non-Software Defined Radio transmitter modules where software is used to ensure compliance of the device, technical description must be provided about how such control is implemented to ensure prevention of third-party modification; see KDB Publication 594280. Details: <example The firmware of the device can not be modified or adjusted by the end user as described in a separate cover letter filed with this application. >

- Provided in Separate Cover Letter Requirement Met

- N/A 2. For Software Defined Radio (SDR) devices, transmitter module applications must provide a software security description; see KDB Publication 442812.

- Provided in Separate Cover Letter

- N/A Details: <example N/A>

Requirement 1. For split modular transmitters, specific descriptions for secure communications Provided in Manual Split Modular Requirements between front-end and control sections, including authentication and restrictions on third-party modifications; also, instructions to third-party integrators on how control is maintained. Details: <example N/A >

- Provided in Separate Cover Letter

- N/A 070920-02b OEM Integration Manual Guidance KDB 996369 D03 Section 2 Clear and Specific Instructions Describing the Conditions, Limitations, and Procedures for third-parties to use and/or integrate the module into a host device. Requirement Is this module intended for sale to third parties?

- YES

- No, If No, and LMA applies, the applicant can optionally choose to not make the following detailed info public. However there still needs to be basic integration instructions for a users manual and the information below must still be included in the operational description. If the applicant wishes to keep this info confidential, this will require a separate statement cover letter explaining the module is not for sale to third parties and that integration instructions are internal confidential documents. Items required to be in the manual See KDB 996369 D03, Section 2 As of May 1, 2019, the FCC requires ALL the following information to be in the installation manual. Modular transmitter applicants should include information in their instructions for all these items indicating clearly when they are not applicable. For example information on trace antenna design could indicate Not Applicable. Also if a module is limited to only a grantees own products and not intended for sale to third parties, the user instructions may not need to be detailed and the following items can be placed in the operational description, but this should include a cover letter as cited above.

- All Items shown to the left are provided in the Modular Integration Guide (or UM) for Full Modular Approval (MA) or LMA.

- An LMA applies and is approved ONLY for use by the grantee in their own products, and not intended for sale to 3rd parties as provided in a separate cover letter. Therefore the information shown to the left is found in the theory of operation. 1. List of applicable FCC rules. KDB 996369 D03, Section 2.2 a. Only list rules related to the transmitter. 2. Summarize the specific operational use conditions. KDB 996369 D03, Section 2.3 a. Conditions such as limits on antennas, cable loss, reduction of power for point to 3. Limited Module Procedures. KDB 996369 D03, Section 2.4 point systems, professional installation info a. Describe alternative means that the grantee uses to verify the host meets the necessary limiting conditions b. When RF exposure evaluation is necessary, state how control will be maintained such that compliance is ensured, such as Class II for new hosts, etc. 4. Trace antenna designs. KDB 996369 D03, Section 2.5 a. Layout of trace design, parts list, antenna, connectors, isolation requirements, tests for design verification, and production test procedures for ensuring compliance. If confidential, the method used to keep confidential must be identified and information provided in the operational description. 5. RF exposure considerations. KDB 996369 D03, Section 2.6 a. Clearly and explicitly state conditions that allow host manufacturers to use the module. Two types of instructions are necessary: first to the host manufacturer to define conditions (mobile, portable xx cm from body) and second additional text needed to be provided to the end user in the host product manuals. 6. Antennas. KDB 996369 D03, Section 2.7 a. List of antennas included in the application and all applicable professional installer instructions when applicable. The antenna list shall also identify the antenna types (monopole, PIFA, dipole, etc note that omni-directional is not considered a type) 7. Label and compliance information. KDB 996369 D03, Section 2.8 a. Advice to host integrators that they need to provide a physical or e-label stating Contains FCC ID: with their finished product 8. Information on test modes and additional testing requirements. KDB 996369 D03, Section 2.9 a. Test modes that should be taken into consideration by host integrators including clarifications necessary for stand-alone and simultaneous configurations. b. Provide information on how to configure test modes for evaluation 9. Additional testing, Part 15 Subpart B disclaimer. KDB 996369 D03, Section 2.10 Sincerely, Jean Hu Quectel Wireless Solutions Company Limited. TEL: +86-21-51086236 ext 6511 070920-02b

Quectel Wireless Solutions Company Limited Declaration of Authorization We Name: Quectel Wireless Solutions Company Limited Address: Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Declare that:

Name Representative of agent: Marlin Chen Agent Company name:

Address:

MRT Technology (Suzhou) Co., Ltd D8 Building, Youxin Industrial Park, No.2 Tian'edang Rd., Wuzhong Economic Development Zone Suzhou China City:

Country:

is authorized to apply for Certification of the following product(s):

LTE Cat M1 & Cat NB2 Module XMR2020BG95M2 BG95-M2 Product:

FCC ID:

Model No.:

Sincerely, ________________ Name: Jean Hu Title: Manager Email: jean.hu@quectel.com Date: 2022-01-21

Quectel Wireless Solutions Company Limited Request for Confidentiality Date: _2020/2/11_ Subject: Confidentiality Request for: _____ FCC ID: XMR2020BG95M2______ Pursuant to FCC 47 CRF 0.457(d) and 0.459 and IC RSP-100, Section 10, the applicant requests that a part of the subject FCC application be held confidential. Type of Confidentiality Requested Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Permanent Permanent*1 Permanent Permanent Permanent Permanent Permanent*

Exhibit Block Diagrams External Photos Internal Photos Operation Description/Theory of Operation Parts List & Placement/BOM Tune-Up Procedure Schematics Test Setup Photos Users Manual

*Note: ______(Insert Explanation as Necessary)______ ______ FCC ID: XMR2020BG95M2 has spent substantial effort in developing this product and it is one of the first of its kind in industry. Having the subject information easily available to "competition" would negate the advantage they have achieved by developing this product. Not protecting the details of the design will result in financial hardship. Permanent Confidentiality:

The applicant requests the exhibits listed above as permanently confidential be permanently withheld from public review due to materials that contain trade secrets and proprietary information not customarily released to the public. Short-Term Confidentiality:

The applicant requests the exhibits selected above as short term confidential be withheld from public view for a period of ______ days from the date of the Grant of Equipment Authorization and prior to marketing. This is to avoid premature release of sensitive information prior to marketing or release of the product to the public. Applicant is also aware that they are responsible to notify TCB in the event information regarding the product or the product is made available to the public. TCB will then release the documents listed above for public disclosure pursuant to FCC Public Notice DA 04-1705. NOTE for Industry Canada Applications:

The applicant understands that until such time that IC distinguishes between Short Term and Permanent Confidentiality, either type of marked exhibit above will simply be marked Confidential when submitted to IC. Sincerely, By:

(Signature/Title2)

(Print name) Jean Hu 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, ChinaEmail: info@quectel.comWebsite: www.quectel.compage 1

Quec ctel Wirel ess Solu utions Co ompany Limited aration of the Modu lar Approv val antee cant / Gra ID:

el:

Quectel W XMR2020B BG95M2 ireless Solut G95M2 tions Compa any Limited Decla Appli FCC I Mode The s requi single mod rements u dule trans under Part smitter has t 15C Sect s been eva tion 212 a aluated th s below:

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(if such y with part e will comply data rates f excessive buffered m provided) to 15 requirem or over-mod modulation/da o ensure tha ments under dulation.

(a)

(b)

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(d) The w with the ante S Sections 15. m must either b a antenna cou a and the ante in nstallation p m modules but p paragraph (b must modular enna and tra 203, 15.204 be permanen pler (at all enna, includ provision of S can apply to

) of this sect r transmitter ansmission sy ystem requir 5.204(c). The 4(b) and 15 d or employ a ntly attached between th connections ing the cab ble). The pr 03 is not ap Section 15.2 o limited mo odular approv ion. comply rements of e antenna a unique he module rofessional plicable to vals under modu

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(see Section e the length known, at le coupling betw equipment. A pment conne nmodified a m be smitter must he module m ration, i.e., th uring testing g for compli nsmitter mod nless the tran the AC line c comply with 07. AC or D Section 15.2 put lines con nnected to th y will be mar unless they The length n 15.27(a)). h typical of actual use timeters to in east 10 cent ase of the m ween the ca Any access ories, perip ected to the module duri nd commer rcially availa tested must not be iance with dule will be conducted DC power he module rketed with h of these or, if that nsure that odule and herals, or ing testing able (see tnotbeinsidea anotherdevic ceduringtesti ng. he mo equipped w be capable identification odular with either a p e of elect n number. transmitter permanently tronically d be must l or must affixed labe it ts FCC displaying

(f)Th

(g) The modula with any sp ordinarily ap manufacture with the mod of these inst equipmenta ntendeduse/

ar transmitter ecific rules o pply to a com er must provi dule to expla tructions mus uthorizationr

/configuratio r must compl or operating r mplete transm ide adequate ain any suchr st be include requirements ons. y requirements s that e mitter and the s along e instructions requirements s. A copy lication for ed in the app s,whichareba asedonthei A permanen antenna con licensed mo ntly attached nnector is no odules. antenna or ot a requirem unique ment for YE ES The BG96-M alone config extender. P M2 was teste guration via a lease see sp ed in a stand a PCMCIA purious set d up YE ES arly ule then The label po indicated. If cannot be s the host lab Contains FC Please see The BG95-M applicable F are given in 95-M2 is clea osition ofBG9 of the modu f the FCC ID is installed, t seen when it ude the text:

bel must inclu CC ID: XMR2 2020BG95M2 f the label.pdf M2 is complia ant with all Detail instruct FCC rules. D the User Ma anual. 2. tions YE ES YE ES

(h)T he modular t w with any appl transmitter m licable RF ex must comply xposure requ uirements in its final The BG95-M the applicab M2 is approv ble RF expos ved to comply sure requirem y with ment, ES YE 7th Floor, Ho ngye Building, No.1 1801 Hongmei Roa ad, Xuhui District, S Shanghai 200233, C ChinaEmail: info@q quectel.comWebsite e: www.quectel.com mpage 2 Quec ctel Wirel ess Solu utions Co ompany Limited please see as the dista the MPE eva nce restrictio aluation with on. 20cm c configuration

. Dated By:

2020/2 2/11 Sign nature Jean n Hu Pri rinted Title:

Project M Manager Limited) On beh half of :

(Quectel l Wirele ess Sol utions Teleph one:

+862 2151086236 6ext6511 7th Floor, Ho ngye Building, No.1 1801 Hongmei Roa ad, Xuhui District, S Shanghai 200233, C ChinaEmail: info@q quectel.comWebsite e: www.quectel.com mpage 3

Quectel Wireless Solutions Company Limited POWER OF ATTORNEY DATE: February 11, 2020 To:

Federal Communications Commission, Authorization & Evaluation Division, 7435 Oakland Mills Road, Columbia, MD 21046 We, the undersigned, hereby authorize TA Technology (Shanghai) Co., Ltd.

/Han jinnan on our behalf, to apply to FCC on our equipment for FCC ID:

XMR2020BG95M2. Any and all acts carried out by TA Technology (Shanghai) Co., Ltd. / Han jinnan on our behalf shall have the same effect as acts of our Signature:

Print name: Jean Hu | Certification Section Company: Quectel Wireless Solutions Company Limited own. Sincerely, 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, ChinaEmail: info@quectel.comWebsite: www.quectel.compage 1

Quectel Wireless Solutions Co., Ltd Statement We Quectel Wireless Solutions Co., Ltd declare the following models. Product Name: LTE Cat M1 & Cat NB2 & EGPRS Module Model Number: BG95-M3, BG95-M2 Hardware Version: R2.1 Module Category SupportedBand BG95-M3 CatM1/NBIoT/EGP RS Cat NB2:

Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/B14/B18/B19/B20/

B25/B26/B27/ B28/B66/B85 LTE-FDD:B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/ B28/B66/B71/B85 EGPRS: 850/900/1800/1900MHz Cat M1:

LTE-FDD:B1/B2/B3/B4/B5/B8/B12/B13/B18/B1 9/B20/B25/B26/ B27/B28/B66/B85 LTE-FDD:B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/B85 BG95-M2 CatM1/NBIoT Cat NB2:

BG95-M3 and BG95-M2 share the same HW design, onlydodeletion on the hardware network according to the model requirementof the product definition,BG95-M2 deletes the 2G part on the basis of BG95-M3. Also, BG95-M2 closed LTE CatM1 Band14 and NB-IoT Band26 through software. Q Quectel Wire eless Solut tions Co., L td De esignator U6 602 U6 603 U5 502 U5 504 The Sinc cerely, BG95-

M3 BG G95-M2 3 scription) BG95-M3

(Part Des NA BG95-M

(Part D IC RF Coupler 1.0x0.5m M2 escription)

) M Directiona THIN-FILM 450M MHz-3800MH mm H0.3mm R RO al Hz IC RF SW Qualband 5 WITCH SP1 5.3x5.5mm H 10T + GSM M H0.905mm RO O LOW PAS Hz 1.0x0.5m SS FILTER R mm H0.4mm m IC RF 698-960MH RO NA NA IC RF T 1.0x0.5mm TX LPF 16 695-2180MH O m H0.5mm RO z NA e change wil ll not impac ct RF perfor rmance of C CatM1 and N NB-IoT. You ur assistance e on this ma atter is high ly appreciat ted. Nam me:Jean Hu u Titl le:Certificat tion Section n

Quectel Wireless Solutions Company Limited BG95M3originalcertifite:192180902AA00,dateofgrant:10/17/2019 XMR2020BG95M2coverletter BG95M3andBG95M2sharethesameHWdesign,onlydodeletiononthehardware networkaccordingtothemodelrequirementoftheproductdefinition,BG95M2deletesthe2G partonthebasisofBG95M3. Pleaseseeallreportupdatesbelow:

BG95M2(ReportNo.:R1907A0448R1V2)isavariantmodelofBG95M3(ReportNo.:

R1907A0446R1V1).Testvaluespartialduplicatedfromoriginalforvariant.Thereisonlytested RFpoweroutput,EffectiveRadiatedPower,OccupiedBandwidthandRadiatesSpuriousEmission forvariantinthisreport.ForRadiatesSpuriousEmission,onlytestedtheworstchannelof original. BG95M2(ReportNo.:R1907A0448R2V2)isavariantmodelofBG95M3(ReportNo.:

R1907A0446R2).Testvaluespartialduplicatedfromoriginalforvariant.ThereisonlytestedRF poweroutput,EffectiveRadiatedPower,OccupiedBandwidthandRadiatesSpuriousEmissionfor variantinthisreport.ForRadiatesSpuriousEmission,onlytheworstchanneloforiginalLTEB2is tested. BG95M2(ReportNo.:R1907A0448R3V2)isavariantmodelofBG95M3(ReportNo.:

R1907A0446R3V1).Testvaluespartialduplicatedfromoriginalforvariant.Thereisonlytested RFpoweroutput,EffectiveRadiatedPower,OccupiedBandwidthandRadiatesSpuriousEmission forvariantinthisreport.ForRadiatesSpuriousEmission,onlytestedtheworstband(LTEB85)of original. BG95M2(ReportNo.:R1907A0448R4V2)isavariantmodelofBG95M3(ReportNo.:

R1907A0446R4).Testvaluespartialduplicatedfromoriginalforvariant.ThereisonlytestedRF poweroutput,EffectiveRadiatedPower,OccupiedBandwidth,BandEdgeComplianceand RadiatesSpuriousEmissionforvariantinthisreport.ForRadiatesSpuriousEmission,onlytested theworstchanneloforiginal. BG95M2(ReportNo.:R1907A0448R5V2)isavariantmodelofBG95M3(ReportNo.:

R1907A0446R5).Testvaluespartialduplicatedfromoriginalforvariant.ThereisonlytestedRF poweroutput,EffectiveRadiatedPower,OccupiedBandwidth,BandEdgeComplianceand RadiatesSpuriousEmissionforvariantinthisreport.ForRadiatesSpuriousEmission,onlythe worstchanneloforiginalNBIOTBand2istested. BG95M2(ReportNo.:R1907A0448R6V2)isavariantmodelofBG95M3(ReportNo.:

R1907A0446R6V1).Testvaluespartialduplicatedfromoriginalforvariant.Thereisonlytested RFpoweroutput,EffectiveRadiatedPower,OccupiedBandwidth,BandEdgeComplianceand RadiatesSpuriousEmissionforvariantinthisreport.ForRadiatesSpuriousEmission,onlythe worstband(NBIOTBand13)oforiginalistested. BG95M2(ReportNo.:R1907A0448R7V2)isavariantmodelofBG95M3(ReportNo.:

R1907A0446R7).Testvaluespartialduplicatedfromoriginalforvariant.ThereisonlytestedRF poweroutput,EffectiveRadiatedPower,OccupiedBandwidthandRadiatesSpuriousEmissionfor variantinthisreport.ForRadiatesSpuriousEmission,onlytestedtheworstchanneloforiginal. 5M2(Repor 07A0446R8) weroutput,Ef rtNo.:R1907A

.Testvalues ffectiveRadia A0448R8V2) partialduplic atedPower,O

)isavariantm catedfromor OccupiedBan modelofBG9 riginalforvar dwidthandE 95M3(Repo riant.Thereis EmissionMas rtNo.:

sonlytested sksforvarian RF tin BG9 R190 pow this report. GNATURE:

SIG JeanH Hu O Originalwritten signatureofau uthorizedsigne er Date(Month,D Day,Year) 05/20 0/2020 Projec ctManager Typed/pri intednameofa authorizedsign ner Ti itleofauthorize edsigner