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BG G96 6Ha ardw war re DDessig n LTEM Module S Series Rev. BG96_Ha ardware_ _Design_ _V1.4 Date:
2019-03 3-13 Statu s: Releas sed www.quec ctel.com LTE Module Series BG96 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:
Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email:info@quectel.com Or our local office. For more information, please visit:
http://quectel.com/support/sales.htm For technical support, or to report documentation errors, please visit:
http://quectel.com/support/technical.htm Or email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE FORBIDDEN WITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2019. All rights reserved. BG96_Hardware_Design 1 / 81 LTE Module Series BG96 Hardware Design About the Document History Revision Date Author Description 1.0 2017-08-04 Lyndon LIU/
Daryl DU Initial 1. Modified GSM features in Table 2. 2. Added a note for e-I-DRX in Chapter 3.3. 3. Elaborated the description of e-I-DRX in Chapter 3.4.3. 4. Updated RF receiving sensitivity in Chapter 6.6. 1. Added the storage temperature of the module in Table 2 and Chapter 6.3. 2. Updated transmitting power values in Table 2. 3. Added the description of sleep mode in Table 5 and Chapter 3.4.4. 4. Added the description of ADC interfaces in Chapter 3.16. 5. Updated the GNSS performance in Table 21. 6. Updated the peak supply current values in Table 28. 7. Updated the current consumption valuesin Chapter 6.4. 8. Updated RF output power values inTable 34. 9. Updated LTE Cat NB1 RF receiving sensitivityvalues
(without repetitions) in Table 35. 10. Updated the recommended footprintin Chapter 7.2. 1. Updated the timing of turning on module in Figure 8. 2. Updated theUSB interfacereference design(Figure 15). 3. Added the description of GPIO interfaces (Chapter 3.17). 4. Updated GNSS performance parameters in Table 25. 5. Updated the GNSS antenna interface reference design
(Figure 27). 1.1 2017-08-31 Daryl DU 1.2 2017-12-22 Lyndon LIU/
Daryl DU 1.3 2018-07-12 Lyndon LIU/
Daryl DU/
Hyman DING BG96_Hardware_Design 2 / 81 LTE Module Series BG96 Hardware Design 6. Updated GNSS current consumption parameters in Table 35. 7. Updated the modules baking temperatureand baking hours in Chapter 8.1. 1. Updated the general description in Chapter 2.1. 2. Updated and added the BG96-M module in Table 1. 3. Updated the internal protocol features and USB interface in Table 2. 4. Updated the functional diagram in Figure 1. 5. Opened the W_DISABLE# pin function in the related Chapters. 6. Updated the DC characteristics of PWRKEY pin in Table 4. 1.4 2019-03-13 Lyndon LIU/
Rex WANG 7. Updated the description and star structure of the power supply figure in Chapter 3.5.2 8. Updated the timing of turning on module in Figure 8. 9. Updated the Characteristics of ADC interfaces in Table 22. 10. Updated BG96 module info and added BG96-M module in Chapter 5.1.2. 11. Updated the GNSS frequency in Table 29. 12. Updated theantenna requirements in Table 30. 13. Updated the current consumption in Table 34. 14. Added B25 output power in Table 36. 15. Updated BG96 and added BG96-Mconducted RF receiving sensitivity in Chapter 6.6. 16. Updated the reel packaging info in Table 40. BG96_Hardware_Design 3 / 81 LTE Module Series BG96 Hardware Design Contents About the Document ................................................................................................................................ 2 Contents .................................................................................................................................................... 4 Table Index ............................................................................................................................................... 6 Figure Index .............................................................................................................................................. 8 1 Introduction ....................................................................................................................................... 9 1.1. Safety Information .................................................................................................................. 10 1.2. FCC/ISED Regulatory notices ................................................................................................ 12 2 Product Concept ............................................................................................................................. 14 2.1. General Description ................................................................................................................ 14 2.2. Key Features .......................................................................................................................... 15 2.3. Functional Diagram ................................................................................................................ 17 2.4. Evaluation Board .................................................................................................................... 18 3 Application Interfaces ..................................................................................................................... 20 3.1. Pin Assignment ....................................................................................................................... 21 3.2. Pin Description ....................................................................................................................... 23 3.3. Operating Modes .................................................................................................................... 30 3.4. Power Saving ......................................................................................................................... 31 3.4.1. Airplane Mode .............................................................................................................. 31 3.4.2. Power Saving Mode(PSM)........................................................................................... 31 3.4.3. Extended Idle Mode DRX(e-I-DRX) ............................................................................. 32 3.4.4. Sleep Mode.................................................................................................................. 34 3.4.4.1. UART Application ............................................................................................... 34 3.5. Power Supply ......................................................................................................................... 35 3.5.1. Power Supply Pins ....................................................................................................... 35 3.5.2. Decrease Voltage Drop ................................................................................................ 35 3.5.3. Monitor the Power Supply ............................................................................................ 37 3.6. Turn on and off Scenarios ...................................................................................................... 37 Turn on Module Using the PWRKEY Pin ..................................................................... 37 Turn off Module ............................................................................................................ 39 Turn off Module Using the PWRKEY Pin ........................................................... 39 Turn off Module Using AT Command ................................................................. 40 3.7. Reset the Module ................................................................................................................... 40 3.8.
(U)SIM Interface ..................................................................................................................... 42 3.9. USB Interface ......................................................................................................................... 45 3.10. UART Interfaces ..................................................................................................................... 46 3.11. PCM* and I2C* Interfaces ...................................................................................................... 49 3.12. Network Status Indication ....................................................................................................... 50 3.13. STATUS .................................................................................................................................. 52 3.6.2.1. 3.6.2.2. 3.6.1. 3.6.2. BG96_Hardware_Design 4 / 81 LTE Module Series BG96 Hardware Design 3.14. Behaviors of RI ....................................................................................................................... 52 3.15. USB_BOOT Interface ............................................................................................................. 53 3.16. ADC Interfaces ....................................................................................................................... 54 3.17. GPIOInterfaces ....................................................................................................................... 55 4 GNSS Receiver ................................................................................................................................ 57 4.1. General Description ................................................................................................................ 57 4.2. GNSS Performance ................................................................................................................ 57 4.3. Layout Guidelines ................................................................................................................... 58 5 Antenna Interfaces .......................................................................................................................... 59 5.1. MainAntenna Interface ........................................................................................................... 59 5.1.1. Pin Definition ................................................................................................................ 59 5.1.2. Operating Frequency ................................................................................................... 59 5.1.3. Reference Design of RF Antenna Interface ................................................................. 61 5.1.4. Reference Design of RF Layout ................................................................................... 61 5.2. GNSS Antenna Interface ........................................................................................................ 64 5.3. Antenna Installation ................................................................................................................ 65 5.3.1. Antenna Requirements ................................................................................................ 65 5.3.2. Recommended RF Connector for Antenna Installation ................................................ 66 6 Electrical, Reliability and RadioCharacteristics ........................................................................... 69 6.1. Absolute Maximum Ratings .................................................................................................... 69 6.2. Power Supply Ratings ............................................................................................................ 69 6.3. Operation and StorageTemperatures ..................................................................................... 70 6.4. Current Consumption ............................................................................................................. 71 6.5. RF Output Power .................................................................................................................... 75 6.6. RF Receiving Sensitivity ......................................................................................................... 76 6.7. Electrostatic Discharge ........................................................................................................... 78 7 Mechanical Dimensions.................................................................................................................. 79 7.1. Mechanical Dimensions of the Module ................................................................................... 79 7.2. Recommended Footprint ........................................................................................................ 81 7.3. Design Effect Drawings of the Module .................................................................................... 82 8 Storage, Manufacturing and Packaging ........................................................................................ 84 8.1. Storage ................................................................................................................................... 84 8.2. Manufacturing and Soldering .................................................................................................. 85 8.3. Packaging ............................................................................................................................... 86 9 Appendix A References .................................................................................................................. 88 10 Appendix B GPRS Coding Schemes ............................................................................................. 91 11 Appendix C GPRS Multi-slot Classes ............................................................................................ 92 12 Appendix D EDGE Modulationand Coding Schemes ................................................................... 94 BG96_Hardware_Design 5 / 81 LTE Module Series BG96 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF BG96 MODULE ...................................................................................... 14 TABLE 2: KEY FEATURES OF BG96 MODULE ............................................................................................... 15 TABLE 3: DEFINITION OF I/O PARAMETERS ................................................................................................. 23 TABLE 4: PIN DESCRIPTION ........................................................................................................................... 23 TABLE 5: OVERVIEW OF OPERATING MODES ............................................................................................. 30 TABLE 6: VBAT AND GND PINS ....................................................................................................................... 35 TABLE 7: PIN DEFINITION OF PWRKEY ........................................................................................................ 37 TABLE 8: RESET_N PIN DESCRIPTION ......................................................................................................... 40 TABLE 9: PIN DEFINITION OF (U)SIM INTERFACE ....................................................................................... 42 TABLE 10: PIN DEFINITION OF USB INTERFACE ......................................................................................... 45 TABLE 11: PIN DEFINITION OF UART1 INTERFACE ..................................................................................... 47 TABLE 12: PIN DEFINITION OF UART2 INTERFACE ..................................................................................... 47 TABLE 13: PIN DEFINITION OF UART3 INTERFACE ..................................................................................... 47 TABLE 14:LOGIC LEVELS OF DIGITAL I/O ..................................................................................................... 48 TABLE 15: PIN DEFINITION OF PCM AND I2C INTERFACES ....................................................................... 49 TABLE 16: PIN DEFINITION OF NETLIGHT .................................................................................................... 51 TABLE 17: WORKING STATE OF NETLIGHT .................................................................................................. 51 TABLE 18: PIN DEFINITION OF STATUS ........................................................................................................ 52 TABLE 19: DEFAULT BEHAVIORS OF RI ........................................................................................................ 53 TABLE 20: PIN DEFINITION OF USB_BOOT INTERFACE ............................................................................. 54 TABLE 21: PIN DEFINITION OF ADC INTERFACES ....................................................................................... 55 TABLE 22: CHARACTERISTICS OF ADC INTERFACES ................................................................................ 55 TABLE 23: PIN DEFINITION OF GPIO INTERFACES ..................................................................................... 56 TABLE 24:LOGIC LEVELS OF GPIO INTERFACES ........................................................................................ 56 TABLE 25: GNSS PERFORMANCE ................................................................................................................. 57 TABLE 26: PIN DEFINITION OF MAIN ANTENNA INTERFACE ...................................................................... 59 TABLE 27: BG96 OPERATING FREQUENCY .................................................................................................. 59 TABLE 28: PIN DEFINITION OF GNSS ANTENNA INTERFACE ..................................................................... 64 TABLE 29: GNSS FREQUENCY ....................................................................................................................... 64 TABLE 30: ANTENNA REQUIREMENTS .......................................................................................................... 66 TABLE 31: ABSOLUTE MAXIMUM RATINGS .................................................................................................. 69 TABLE 32: POWER SUPPLY RATINGS ........................................................................................................... 70 TABLE 33: OPERATION AND STORAGE TEMPERATURES .......................................................................... 70 TABLE 34: BG96 CURRENT CONSUMPTION ................................................................................................. 71 TABLE 35: GNSS CURRENT CONSUMPTION ................................................................................................ 75 TABLE 36: RF OUTPUT POWER ..................................................................................................................... 75 TABLE 37: BG96 CONDUCTED RF RECEIVING SENSITIVITY ..................................................................... 76 TABLE 38: ELECTROSTATIC DISCHARGE CHARACTERISTICS ................................................................. 78 TABLE 39: RECOMMENDED THERMAL PROFILE PARAMETERS ............................................................... 85 TABLE 40: REEL PACKAGING ......................................................................................................................... 87 TABLE 41: RELATED DOCUMENTS ................................................................................................................ 88 BG96_Hardware_Design 6 / 81 LTE Module Series BG96 Hardware Design TABLE 42: TERMS AND ABBREVIATIONS ...................................................................................................... 88 TABLE 43: DESCRIPTION OF DIFFERENT CODING SCHEMES .................................................................. 91 TABLE 44: GPRS MULTI-SLOT CLASSES ...................................................................................................... 92 TABLE 45: EDGE MODULATION AND CODING SCHEMES ........................................................................... 94 BG96_Hardware_Design 7 / 81 LTE Module Series BG96 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 18 FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 22 FIGURE 3: SLEEP MODE APPLICATION VIA UART ....................................................................................... 34 FIGURE 4: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ...................................................... 36 FIGURE 5: STAR STRUCTURE OF THE POWER SUPPLY ............................................................................ 37 FIGURE 6: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................... 38 FIGURE 7: TURN ON THE MODULE USING KEYSTROKE ........................................................................... 38 FIGURE 8: TIMING OF TURNING ON MODULE ............................................................................................. 39 FIGURE 9: TIMING OF TURNING OFF MODULE ........................................................................................... 40 FIGURE 10: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 41 FIGURE 11: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ....................................................... 41 FIGURE 12: TIMING OF RESETTING MODULE ............................................................................................. 42 FIGURE 13: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 43 FIGURE 14: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR . 44 FIGURE 15: REFERENCE CIRCUIT OF USB INTERFACE ............................................................................ 45 FIGURE 16: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 48 FIGURE 17: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 49 FIGURE 18: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC .................................... 50 FIGURE 19: REFERENCE CIRCUIT OF THE NETWORK STATUS INDICATOR ........................................... 51 FIGURE 20: REFERENCE CIRCUIT OF STATUS ........................................................................................... 52 FIGURE 21: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 54 FIGURE 22: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE ............................................................. 61 FIGURE 23: MICROSTRIP LINE DESIGN ON A 2-LAYER PCB ...................................................................... 62 FIGURE 24: COPLANAR WAVEGUIDE LINE DESIGN ON A 2-LAYER PCB .................................................. 62 FIGURE 25: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND) .................................................................................................................................................. 63 FIGURE 26: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND) .................................................................................................................................................. 63 FIGURE 27: REFERENCE CIRCUIT OF GNSS ANTENNA INTERFACE ........................................................ 65 FIGURE 28: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ................................................ 67 FIGURE 29: MECHANICALS OF U.FL-LP CONNECTORS ............................................................................. 67 FIGURE 30: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) ........................................................... 68 FIGURE 31: MODULE TOP AND SIDE DIMENSIONS ..................................................................................... 79 FIGURE 32: MODULE BOTTOM DIMENSIONS (BOTTOM VIEW) ................................................................. 80 FIGURE 33: RECOMMENDED FOOTPRINT (TOP VIEW) .............................................................................. 81 FIGURE 34: TOP VIEW OF THE MODULE ...................................................................................................... 82 FIGURE 35: BOTTOM VIEW OF THE MODULE .............................................................................................. 82 FIGURE 36: RECOMMENDED REFLOW SOLDERING THERMAL PROFILE ................................................ 85 FIGURE 37: TAPE DIMENSIONS ..................................................................................................................... 87 FIGURE 38: REEL DIMENSIONS ..................................................................................................................... 87 BG96_Hardware_Design 8 / 81 LTE Module Series BG96 Hardware Design 1 Introduction This document defines BG96module and describes its air interface and hardware interfaces which are connected with customers applications. This document can help customers quickly understand interface the specifications, electrical and mechanical details, as well as other related information of BG96.To facilitate its application in different fields, reference design is also provided for customers reference. Associated with application notes and user guides, customers can use the module to design and set up mobile applications easily. Model: BG96, BG96 MINIPCIE FCC IDXMR201707BG96 IC: 10224A-201709BG96 Model: BG96-M FCC IDXMR201901BG96M BG96_Hardware_Design 9 / 81 LTE Module Series BG96 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating BG96. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be given to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If the device offers an Airplane Mode, then it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on boarding the aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals,clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. BG96_Hardware_Design 10 / 81 LTE Module Series BG96 Hardware Design In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as your phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. BG96_Hardware_Design 11 / 81 LTE Module Series BG96 Hardware Design 1.2. FCC/ISED Regulatory notices Modification statement Quectel has not approved any changes or modifications to this device by the user. Any changes or modifications could void the users authority to operate the equipment. Quectel napprouve aucune modification apporte lappareil par lutilisateur, quelle quen soit la nature. Tout changement ou modification peuvent annuler le droit dutilisation de lappareil par lutilisateur. Interference statement This device complies with Part 15 of the FCC Rules and Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Le prsent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorise aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement. RF exposure This equipment complies with FCC and ISED radiation exposure limits set forth for an uncontrolled environment. The antenna should be installed and operated with minimum distance of 20 cm between the radiator and your body. Antenna gain must be below:
Antenna Gain Frequency Band FCC ID: XMR201707BG96 Model: BG96,BG96MINIPCIE 10.446dBi 12.030dBi 9.0dBi 7.0dBi 10.416dBi 9.734dBi 10.173dBi 8.0dBi FCC ID: XMR201901BG96M Model: BG96-M NA NA 8dBi 5dBi 9.42dBi 8.73dBi 9.17dBi 8dBi GSM850 GSM1900 LTE band2 LTE band4 LTE band5 LTE band12 LTE band13 LTE band25 This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Cet appareil est conforme aux limites d'exposition aux rayonnements de lISED pour un environnement non contrl. L'antenne doit tre install de faon garder une distance minimale de 20 centimtres entre la source de rayonnements et votre corps. Gain de l'antenne doit tre ci-dessous:
Gain de lantenne GSM850:7.13dBi GSM1900:12.03dBi LTE Band2:9.0dBi LTE Band4:7.0dBi BG96_Hardware_Design 12 / 81 LTE Module Series BG96 Hardware Design LTE Band5:7.1dBi LTE Band12:6.61dBi LTE Band13:6.93dBi L TE Band25:8.0dBi L'metteur ne doit pas tre colocalis ni fonctionner conjointement avec autre antenne ou autre metteur. FCC Class B digital device notice This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. Labelling Requirements for the Host device The host device shall be properly labelled to identify the modules within the host device. The certification label of the module shall be clearly visible at all times when installed in the host device, otherwise the host device must be labelled to display the FCC ID and ISED of the module, preceded by the words "Contains transmitter module", or the word "Contains", or similar wording expressing the same meaning, as follows:
Model: BG96, BG96 MINIPCIE Contains FCC IDXMR201707BG96 Contains IC: 10224A-201709BG96 Model: BG96-M Contains FCC IDXMR201901BG96M L'appareil hte doit tre tiquet comme il faut pour permettre l'identification des modules qui s'y trouvent. L'tiquette de certification du module donn doit tre pose sur l'appareil hte un endroit bien en vue en tout temps. En l'absence d'tiquette, l'appareil hte doit porter une tiquette donnant le FCC ID et lISED du module, prcd des mots Contient un module d'mission , du mot Contient ou d'une formulation similaire exprimant le mme sens, comme suit :
Model: BG96, BG96 MINIPCIE Contient FCC IDXMR201707BG96 Contient IC: 10224A-201709BG96 CAN ICES-3 (B) / NMB-3 (B) This Class B digital apparatus complies with Canadian ICES-003. Cet appareil numrique de classe B est conforme la norme canadienne ICES-003. BG96_Hardware_Design 13 / 81 LTE Module Series BG96 Hardware Design 2 Product Concept 2.1. General Description BG96isa series ofembeddedIoT(LTE Cat.M1/LTE Cat.NB1/EGPRS) wireless communication module.It provides data connectivity on LTE-TDD/LTE-FDD/GPRS/EGPRSnetworks, and supports half-duplex operation in LTE networks. It also provides GNSS1)and voice2)functionalityto meet customersspecific application demands.BG96 contains two variants: BG96 and BG96-M. Customers can choose a dedicated type based on the region or operator. The following table shows the frequency bands of BG96 modules. Table 1: Frequency Bands of BG96 Modules Module LTE Bands GSM3) Rx-diversity GNSS1) Cat M1& NB1:
LTE-FDD:
B1/B2/B3/B4/B5/B8/B12/
B13/B18/B19/B20/B254)/
B265)/B28 LTE-TDD:
B39
(for Cat M1 only) Cat M1 only:
LTE-FDD:
B1/B2/B3/B4/B5/B8/B12/
B13/B18/B19/B20/B25 4)/
B265)/B28 LTE-TDD:
B39 (for Cat M1 only) BG96 BG96-M NOTES GSM850/EGSM900/
DCS1800/PCS1900 Not Supported GPS, GLONASS,BeiDo u/Compass, Galileo, QZSS Not Supported Not Supported GPS, GLONASS,BeiDo u/Compass, Galileo, QZSS BG96_Hardware_Design 14 / 81 LTE Module Series BG96 Hardware Design 1) GNSS function is optional. 2) BG96 supports VoLTE(Voice over LTE) under LTECat M1 network. 3)BG96 GSM only supports Packet Switch. 4)B25 will be supported on BG96 modules with R1.2 hardware version. 5)B26 is under development. 1. 2. 3. 4. 5. With a compact profile of 26.5mm 22.5mm 2.3mm, BG96 can meet almost all requirements forM2M applications such as smart metering, tracking system, security, wireless POS, etc. BG96 is an SMD type module which can be embedded into applications through its 102 LGA pads.BG96supports internet service protocols like TCP, UDP and PPP. Extended AT commands have been developed for customers to use these internet service protocols easily. 2.2. Key Features The following table describes the detailed features of BG96 modules. Table 2: Key Features of BG96Modules Features Details Power Supply Transmitting Power LTE Features Supply voltage: 3.3V~4.3V Typical supply voltage: 3.8V Class 3 (23dBm2dB) for LTE-FDD bands Class 3 (23dBm2dB) for LTE-TDD bands Class 4 (33dBm2dB) for GSM850 Class 4 (33dBm2dB) for EGSM900 Class 1 (30dBm2dB) for DCS1800 Class 1 (30dBm2dB) for PCS1900 Class E2 (27dBm3dB) for GSM850 8-PSK Class E2 (27dBm3dB) for EGSM900 8-PSK Class E2 (26dBm3dB) for DCS1800 8-PSK Class E2 (26dBm3dB) for PCS1900 8-PSK Support LTE Cat M1 and LTE Cat NB1 Support 1.4MHz RF bandwidth for LTE Cat M1 Support 200KHz RF bandwidth for LTE Cat NB1 Support SISO in DL direction BG96_Hardware_Design 15 / 81 LTE Module Series BG96 Hardware Design Cat M1: Max. 375Kbps (DL)/375Kbps (UL) Cat NB1: Max. 32Kbps (DL)/70Kbps (UL) GPRS:
Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107Kbps (DL), Max. 85.6Kbps (UL) EDGE:
Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max. 296Kbps (DL), Max. 236.8Kbps (UL) Support PPP/TCP/UDP/SSL/TLS/FTP(S)/HTTP(S)/NITZ/PING/MQTTprotocols Support PAP (Password Authentication Protocol) and CHAP (Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: ME by default GSMFeatures Internet Protocol Features SMS
(U)SIM Interface Support USIM/SIM card: 1.8V, 3.0V Audio Feature*
Support one digital audio interface: PCM interface USB Interface UART Interfaces AT Commands forWindows 7/8/8.1/10, Windows CE Compliant with USB 2.0 specification (slave only) and the data transfer rate can reach up to 480Mbps Used for AT command communication, data transmission, GNSS NMEA output, software debugging and firmware upgrade SupportUSB serial drivers 5.0/6.0/7.0, Linux 3.x(3.4 or later)/4.1~4.14, Android 4.x/5.x/6.x/7.x/8.x. UART1:
Used for data transmission and AT command communication 115200bps by default The default frame format is 8N1 (8 data bits, no parity, 1 stop bit) Support RTS and CTS hardware flow control UART2:
Used for module debugging and log output 115200bps baud rate UART3:
Used for outputting GNSS data or NMEA sentences 115200bps baud rate 3GPP TS 27.007 and 3GPP TS 27.005 AT commands, as well as Quectel enhanced AT commands BG96_Hardware_Design 16 / 81 LTE Module Series BG96 Hardware Design Network Indication OneNETLIGHT pin for network connectivity status indication Antenna Interfaces Physical Characteristics Temperature Range Including main antenna (ANT_MAIN) and GNSS antenna (ANT_GNSS) interfaces Size: (26.50.15)mm(22.50.15)mm (2.30.2)mm Weight: approx. 3.1g Operation temperature range: -35C ~ +75C1) Extended temperature range: -40C ~ +85C2) Storage temperature range: -40C ~ +90C Firmware Upgrade USB interface, DFOTA RoHS All hardware components are fully compliant with EU RoHS directive NOTES 1. * means under development. 2. 1) Within operation temperature range, the module is 3GPP compliant. 3. 2) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to the normal operating temperature levels, the module will meet 3GPP specificationsagain. 2.3. Functional Diagram The following figure shows a block diagram of BG96 and illustrates the major functional parts. Power management Baseband DDR+NAND flash Radio frequency Peripheral interfaces BG96_Hardware_Design 17 / 81 LTE Module Series BG96 Hardware Design VBAT_RF VBAT_BB PWRKEY RESET_N STATUS NETLIGHT ADCs ANT_MAIN ANT_GNSS PA
(4G) PA
(2G+ASM) Tx Rx SAW LNA GNSS Transceiver NAND DDR2 SDRAM IQ Control Baseband PMIC Control 19.2M XO VDD_EXT USB (U)SIM PCM*
UARTs I2C*
GPIOs Figure 1: Functional Diagram NOTE
* means under development. 2.4. Evaluation Board In order to help customers develop applications conveniently with BG96, Quectel supplies theevaluation board (EVB), USB to RS-232converter cable, USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [1]. BG96_Hardware_Design 18 / 81 LTE Module Series BG96 Hardware Design BG96_Hardware_Design 19 / 81 LTE Module Series BG96 Hardware Design 3 Application Interfaces
(U)SIMinterface BG96is equipped with 102 LGA pads that can be connected to customers cellular application platforms. The following sub-chapters will provide detailed description of interfaces listed below:
Power supply USB interface UART interfaces PCM* and I2C* interfaces Status indication USB_BOOT interface ADC interfaces GPIO interfaces NOTE
* means under development. BG96_Hardware_Design 20 / 81 LTE Module Series BG96 Hardware Design The following figure showsthe pin assignment of BG96. 3.1. Pin Assignment BG96_Hardware_Design 21 / 81 LTE Module Series BG96 Hardware Design I N A M _ T N A D N G D N G D N G D N G D E V R E S E R D E V R E S E R F R _ T A B V F R _ T A B V D E V R E S E R D N G D N G D N G 6 2 6 1 6 0 5 9 5 8 5 7 5 6 5 5 5 4 5 3 5 2 5 1 5 0 PSM_IND ADC1 GND PCM_CLK*
PCM_SYNC*
PCM_IN*
PCM_OUT*
USB_VBUS USB_DP USB_DM RESERVED RESERVED RESERVED RESERVED PWRKEY1) RESERVED RESET_N W_DISABLE#
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 63 GPIO64 64 65 66 67 68 83 84 85 86 87 88 82 81 80 102 101 100 79 99 89 69 90 70 91 71 92 72 98 97 96 95 94 93 78 77 76 75 USB_BOOT 74 73 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 ANT_GNSS GND USIM_GND USIM_CLK USIM_DATA USIM_RST USIM_VDD USIM_PRESENCE I2C_SDA*
I2C_SCL*
RI DCD RTS CTS TXD RXD VBAT_BB VBAT_BB 9 1 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 0 3 1 3 Y D A E R _ P A S U T A T S I T H G L T E N D X R _ G B D D X T _ G B D 0 C D A 6 2 O P G I D E V R E S E R D X T _ 3 T R A U D X R _ 3 T R A U T X E _ D D V R T D D N G POWER USB UART
(U)SIM PCM ANT GND RESERVED OTHERS Figure 2: Pin Assignment (Top View) NOTES 1. Keep all RESERVEDpins and unused pins unconnected. 2. GND pads should be connected to ground in the design. BG96_Hardware_Design 22 / 81 LTE Module Series BG96 Hardware Design 1)PWRKEY output voltage is 0.8V because of the diode drop in the Qualcomm chipset.
* means under development. 3. 4. 3.2. Pin Description The following tables show the pin definition and description of BG96. Table 3: Definition of I/O Parameters Type IO DI DO PI PO AI AO OD Description Bidirectional Digital input Digital output Power input Power output Analog input Analog output Open drain Table 4: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT_BB 32, 33 VBAT_RF 52,53 Power supply for the modules baseband part Power supply for the Vmax=4.3V Vmin=3.3V Vnorm=3.8V Vmax=4.3V Vmin=3.3V PI PI BG96_Hardware_Design 23 / 81 LTE Module Series BG96 Hardware Design VDD_EXT 29 PO modules RF part Provide 1.8V for external circuit Vnorm=3.8V Vnorm=1.8V IOmax=50mA Power supply for external GPIOs pull-up circuits. 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~102 GND Turn on/off Ground Pin Name Pin No. I/O Description DC Characteristics Comment PWRKEY 15 RESET_N 17 Status Indication DI DI Turnon/off the module Vnorm=0.8V VILmax=0.5V Resetthe module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The output voltage is0.8V because of thediode drop in theQualcomm chipset. If unused, keep this pin open. Pin Name Pin No. I/O Description STATUS 20 NETLIGHT 21 USB Interface DO DO Indicate the modulesoperat ionstatus Indicate the modulesnetwor k activity status Pin Name Pin No. I/O Description USB_VBUS 8 PI USB detection USB_DP 9 IO USB differential data bus(+) DC Characteristics VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V Comment 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. DC Characteristics Vmax=5.25V Vmin=3.0V Vnorm=5.0V Compliant with USB 2.0 standard specification. Comment Require differential impedance of 90. BG96_Hardware_Design 24 / 81 LTE Module Series BG96 Hardware Design USB_DM 10 IO
(U)SIM Interface USB differential data bus (-) Compliant with USB 2.0 standard specification. Require differential impedance of 90. Pin Name Pin No. I/O Description USIM_ PRESENCE 42 DI
(U)SIM card insertion detection USIM_VDD 43 PO Power supply for (U)SIM card USIM_RST 44 DO Reset signal of
(U)SIM card USIM_DATA 45 IO Data signal of
(U)SIM card USIM_CLK 46 DO Clock signal of
(U)SIM card BG96_Hardware_Design 25 / 81 DC Characteristics VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V For 1.8V(U)SIM:
Vmax=1.9V Vmin=1.7V For 3.0V(U)SIM:
Vmax=3.05V Vmin=2.7V IOmax=50mA For 1.8V (U)SIM:
VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM:
VOLmax=0.45V VOHmin=2.55V For 1.8V (U)SIM:
VILmax=0.6V VIHmin=1.2V VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM:
VILmax=1.0V VIHmin=1.95V VOLmax=0.45V VOHmin=2.55V For 1.8V (U)SIM:
VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM:
VOLmax=0.45V VOHmin=2.55V Comment 1.8V power domain. If unused, keep this pin open. Either 1.8V or 3.0V is supported by the module automatically. LTE Module Series BG96 Hardware Design USIM_GND 47 UART1 Interface Specified ground for
(U)SIM card Pin Name Pin No. I/O Description DTR RXD TXD CTS RTS DCD RI 30 34 35 36 37 38 39 DI Data terminal ready(sleepmo de control) DI Receive data DO Transmit data DO Clear to send DI Request to send DC Characteristics VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V DO Data carrier detection VOLmax=0.45V VOHmin=1.35V DO Ring indicator VOLmax=0.45V VOHmin=1.35V Comment 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. UART2 Interface Pin Name Pin No. I/O Description DBG_RXD 22 DI Receive data DBG_TXD 23 DO Transmit data UART3 Interface DC Characteristics VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V Comment 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. BG96_Hardware_Design 26 / 81 LTE Module Series BG96 Hardware Design Pin Name Pin No. I/O Description UART3_TXD 27 DO Transmit data UART3_RXD 28 DI Receive data PCM* Interface Pin Name Pin No. I/O Description PCM_CLK*
4 PCM_SYNC*
5 DO DO PCMclock output PCMframe synchronization output PCM_IN*
6 DI PCMdata input DC Characteristics VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V DC Characteristics VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V PCM_OUT*
7 I2C* Interface DO PCMdata output VOLmax=0.45V VOHmin=1.35V Comment 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. Comment 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment External pull-up resistor is required. 1.8V only. If unused, keep this pin open. External pull-up resistor is required. 1.8V only. If unused, keep this pin open. I2C_SCL*
40 OD I2C_SDA*
41 OD I2C serial clock. Used for external codec. I2C serial data. Used for external codec. BG96_Hardware_Design 27 / 81 LTE Module Series BG96 Hardware Design Antenna Interfaces Pin Name Pin No. I/O Description 60 49 ANT_MAIN ANT_GNSS Other Pins IO AI Main antenna interface GNSS antenna interface DC Characteristics Comment 50impedance 50impedance If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment PSM_IND1) 1 DO Power saving mode indicator VOLmax=0.45V VOHmin=1.35V W_DISABLE#
18 DI Airplane mode control AP_READY 19 USB_BOOT 75 DI DI GPIO26 26 IO GPIO64 64 IO Application processor sleep state detection Force the module to enter into emergency download mode General-
purpose input/
output interface General-
purpose input/
output interface VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep this pin open. 1.8V power domain. Pull-up by default. In low voltage level, the module can enter into airplane mode. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. BG96_Hardware_Design 28 / 81 LTE Module Series BG96 Hardware Design ADC Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment ADC1 2 AI ADC0 24 AI RESERVED Pins General purpose analog to digital converter interface General purpose analog to digital converter interface Voltage range:
0.3V to 1.8V If unused, keep this pin open. Voltage range:
0.3V to 1.8V If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment 11~14, 16, 25, 51, 57, 56, 63, 65,66, 76~78, 83~88, 92~99 RESERVED NOTES Reserved Keep these pins open. 1. * means under development. 2. 1) When PSM is enabled and then reboot the module, the function of PSM_IND pin will be activated. This pin outputs a high level voltage when the module is in normal operation state, and outputs a low level voltage when the module enters into PSM. 3. Keep all RESERVED pins and unused pins unconnected. BG96_Hardware_Design 29 / 81 LTE Module Series BG96 Hardware Design 3.3. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Details Normal Operation Talk/Data Idle Network connection is ongoing. In this mode, the power consumption is decided by network settingand data transfer rate. Software is active. The module hasregistered onnetwork, and it is ready to send and receive data. Extended Idle Mode DRX
(e-I-DRX) Airplane Mode Minimum Functionality Mode Sleep Mode Power Saving Mode
(PSM) BG96 module and the network may negotiate over non-access stratum signaling the use of e-I-DRX for reducing power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. AT+CFUN command or W_DISABLE# pin can set the module into airplane mode. In this case, RF function will be invalid. AT+CFUN command can set the module into a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. In this mode, the current consumption of the module will be reduced to a lower level. During this mode, the module can still receive paging message, SMS and TCP/UDP data from the network normally. BG96 module may enter into Power Saving Mode for reducing its power consumption. PSM is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. In this mode, the power management unit shuts down the power supply. Software is not active. The serial interfacesare not accessible. Butoperating voltage (connected to VBAT_RF and VBAT_BB) remains applied. Power OFF Mode NOTES BG96_Hardware_Design 30 / 81 LTE Module Series BG96 Hardware Design During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB interface will increase power consumption. 3.4.1. Airplane Mode 3.4. Power Saving When the module enters into airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible. This mode can be set via the following ways. Hardware:
W_DISABLE# is pulled up by default.Driving it to low level will let the module enter into airplane mode. Software:
AT+CFUN=<fun>command provides choice of the functionality level, through setting <fun> into 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode. RF function is disabled. NOTES 1. Airplane mode control viaW_DISABLE# is disabled in firmware by default. It can be enabled by AT+QCFG=airplanecontrol command. 2. The execution of AT+CFUN command will not affect GNSS function. 3.4.2. Power Saving Mode(PSM) BG96 module can enter into PSM for reducing its power consumption. The BG96_Hardware_Design 31 / 81 LTE Module Series BG96 Hardware Design mode is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections.So BG96 in PSM cannot immediately respond users requests. When the module wants to use the PSM it shall request an Active Time value during every Attach and TAU procedures. If the network supports PSM and accepts that the module uses PSM, the network confirms usage of PSM by allocating an Active Time value to the module. If the module wants to change the Active Time value, e.g. when the conditions are changed in the module, the module consequently requests the value it wants in the TAU procedure. If PSM is supported by the network, then it can be enabled via AT+CPSMScommand. Either of the following methods will wake up the module from PSM:
Drive PWRKEY pin to low level will wake up the module. When the T3412_Exttimer expires, the module will be automatically woken up. NOTE Please refer to document [2] for details about AT+CPSMScommand. 3.4.3. Extended Idle Mode DRX(e-I-DRX) The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX for reducing its power consumption, while being available for mobile terminating data and/or network originated procedures BG96_Hardware_Design 32 / 81 LTE Module Series BG96 Hardware Design within a certain delay dependent on the DRX cycle value. Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or data transfers, and in particular they need to consider the delay tolerance of mobile terminated data. In order to negotiate the use of e-I-DRX, the UE requests e-I-DRXparameters during attach procedure and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX. In case the EPC accepts e-I-DRX, the EPC based on operator policies and, if available, the e-I-DRXcycle length value in the subscription data from the HSS, may also provide different values of the e-I-DRXparameters than what was requested by the UE. If the EPC accepts the use of e-I-DRX, the UE applies e-I-DRX based on the received e-I-DRXparameters. If the UE does not receive e-I-DRXparameters in the relevant accept message because the EPC rejected its request or because the request was received by EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception. Ife-I-DRX is supported by the network, then it can be enabled by AT+CEDRXS=1command. NOTE BG96_Hardware_Design 33 / 81 LTE Module Series BG96 Hardware Design Please refer to document [2] for details about AT+CEDRXScommand. 3.4.4. Sleep Mode BG96 is able to reduce its current consumption to a lower value during the sleep mode. The following sub-chapters describe the power saving procedure of BG96 module. 3.4.4.1. UART Application If the host communicates with module via UART interface, the following preconditions can let the module enter into sleep mode. Execute AT+QSCLK=1command to enable sleep mode. Drive DTR to high level. The following figure shows the connection between the module and the host. Figure 3: Sleep Mode Application via UART Driving the host DTR to low level will wake up the module. When BG96 has URC to report, RI signal will wake up the host. Please refer to Chapter 3.14 for details about RI behavior. AP_READY will detect the sleep state of the host (can be configured to high level or low level detection). Please refer to AT+QCFG=apready command in document [2] for details. BG96_Hardware_Design 34 / 81 LTE Module Series BG96 Hardware Design 3.5. Power Supply 3.5.1. Power Supply Pins BG96 provides the following four VBAT pins for connection with anexternal power supply. There are two separate voltage domains for VBAT. Two VBAT_RF pins for modulesRF part. Two VBAT_BB pins for modules baseband part. The following table shows the details of VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 52,53 VBAT_BB 32,33 Power supply for the modules RF part Power supply for the modules baseband part 3.3 3.3 3.8 3.8 4.3 4.3 3, 31, 48,50, 54, 55,58, 59, 61,62, 67~74, 79~82,89~91,100
~102 GND 3.5.2. Decrease Voltage Drop Ground
-
-
-
V V
-
The power supply range of the module is from 3.3Vto4.3V. Please make sure that the input voltage will never drop below 3.3V.The following figure shows the voltage drop during burst transmission in 2G network. The voltage drop will be less in LTE CatM1 and LTE CatNB1 networks. BG96_Hardware_Design 35 / 81 LTE Module Series BG96 Hardware Design Figure 4: Power Supply Limits during Burst Transmission To decrease voltage drop, a bypass capacitor of about 100F with low ESRshould be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR.It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT pins.The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 0.5mm, and the width of VBAT_RF trace should be no less than 2mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to get a stable power source, it is suggested to use a TVS with suitable reverse stand-off voltageand lower leakage current. and place it as close to the VBATpins as possible. The following figure shows the star structure of the power supply. BG96_Hardware_Design 36 / 81 LTE Module Series BG96 Hardware Design VBAT D1 TVS
+
C1 100uF C2 100nF C3 33pF C4 10pF
+
C5 100uF C7 C6 C8 100nF 33pF 10pF VBAT_RF VBAT_BB Module Figure 5: Star Structure of the Power Supply 3.5.3. Monitor the Power Supply AT+CBC command can be usedto monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.6. Turn on and off Scenarios 3.6.1. Turn on Module Using the PWRKEY Pin The following table shows the pin definition of PWRKEY. Table 7: Pin Definition of PWRKEY Pin Name Pin No. Description DC Characteristics Comment PWRKEY 15 Turn on/off the module Vnorm=0.8V VILmax=0.5V The output voltage is0.8V because of thediode drop in theQualcomm chipset. When BG96 is in power off mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level for at least 500ms. It is recommended to BG96_Hardware_Design 37 / 81 LTE Module Series BG96 Hardware Design use an open drain/collector driver to control the PWRKEY.After STATUS pin outputting a high level, PWRKEY pin can be released. A simple reference circuit is illustrated in the following figure. 500ms Turn on pulse 4.7K PWRKEY 10nF 47K Figure 6: Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger. Therefore, aTVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shownin the following figure. Figure 7: Turn on the Module Using Keystroke The turn on scenario is illustrated in the following figure. BG96_Hardware_Design 38 / 81 LTE Module Series BG96 Hardware Design NOTE VBAT PWRKEY RESET_N STATUS
(DO) USB URAT 500ms VIL0.5V Inactive Inactive 4.8s 4.2s 4.9s Active Active Figure 8: Timing of Turning on Module NOTE 1. Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms. 2. Customers should expect to see ~0.8V on the PWRKEY pin, because of there is pulled up to an internal voltage minus a diode drop in the Qualcomm chipset. 3.6.2. Turn off Module Either of the following methods can be used to turn off the module:
Normal power down procedure: Turn off the module using the PWRKEY pin. Normal power down procedure: Turn off the module using AT+QPOWDcommand. 3.6.2.1. Turn off Module Using the PWRKEY Pin Driving the PWRKEY pin to a low level voltagefor at least 650ms, the module will execute power-down procedure after the PWRKEY is released. The power-down scenario is illustrated inthe following figure. BG96_Hardware_Design 39 / 81 LTE Module Series BG96 Hardware Design Figure 9: Timing of Turning off Module 3.6.2.2. Turn off Module Using AT Command It is also a safe way to use AT+QPOWDcommandto turn off the module, which is similar to turning off the module via PWRKEY pin. Please refer todocument [2] for details about AT+QPOWDcommand. 3.7. Reset the Module The RESET_N pin can be used to reset the module.The module can be reset by driving RESET_N to a low level voltage for time between 150ms and 460ms. Table 8: RESET_N Pin Description Pin Name Pin No. Description DC Characteristics Comment RESET_N 17 Resetsignal of the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N. BG96_Hardware_Design 40 / 81 LTE Module Series BG96 Hardware Design Figure 10: Reference Circuit of RESET_N by Using Driving Circuit Figure 11: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated inthe following figure. BG96_Hardware_Design 41 / 81 LTE Module Series BG96 Hardware Design Figure 12: Timing of Resetting Module NOTES 1. Use RESET_N only when turning off the module by AT+QPOWDcommand and PWRKEY pin both failed. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.8. (U)SIM Interface The(U)SIM interface circuitrymeets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards are supported. Table 9: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment USIM_ PRESENCE USIM_VDD USIM_RST USIM_DATA USIM_CLK USIM_GND 42 43 44 45 46 47 DI
(U)SIM card insertion detection PO Power supply for (U)SIM card Either 1.8V or 3.0V is supported by the module automatically. DO Reset signal of (U)SIM card IO Data signal of (U)SIM card DO Clock signal of (U)SIM card Specified ground for (U)SIM card BG96_Hardware_Design 42 / 81 LTE Module Series BG96 Hardware Design BG96 supports (U)SIM card hot-plug via the USIM_PRESENCEpin. The function supports low level and high level detections, andisdisabled by default. Please refer to document [2] about AT+QSIMDETcommand for details. The following figure shows a reference design of (U)SIM interface with an 8-pin
(U)SIM cardconnector. Figure 13: Reference Circuit of (U)SIM Interface withan 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. Areference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated inthe following figure. BG96_Hardware_Design 43 / 81 LTE Module Series BG96 Hardware Design Figure 14: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design:
Keep placement of (U)SIM card connector as close to the module as possible. Keep the trace length as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1uF, and place it as close to (U)SIM card connector as possible. If the system ground plane is complete, USIM_GND can be connected to the systemground directly. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them awayfromeach other and shield them with surrounded ground. USIM_RST should also be ground shielded. In order to offer good ESD protection, it is recommended to add a TVSdiode array with parasitic capacitance not exceeding15pF. In order to facilitate debugging, it is recommended to reserve series resistors for the (U)SIM signals of the module.The 33pFcapacitors are used for filtering interference of GSM900MHz.Please note that the (U)SIM peripheral circuit should be close to the (U)SIM cardconnector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion areapplied, and should be placed close to the (U)SIM cardconnector. BG96_Hardware_Design 44 / 81 LTE Module Series BG96 Hardware Design 3.9. USB Interface BG96 contains one integrated Universal Serial Bus (USB) interfacewhich complies with the USB 2.0 specification and supports high-speed (480Mbps) and full-speed (12Mbps)modes. The USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. The following table shows the pin definition of USB interface. Table 10: Pin Definitionof USB Interface Pin Name Pin No. I/O Description Comment USB_VBUS USB_DP USB_DM GND 8 9 10 3 PI IO IO USB connection detection Typically 5.0V USB differential data bus (+) USB differential data bus (-) Ground Require differential impedance of 90 Require differential impedance of 90 For more details about USB 2.0 specification, please visithttp://www.usb.org/home. The USB interface is recommended to be reserved for firmware upgrade in customersdesigns. The following figure shows areference circuit of USB interface. Figure 15: Reference Circuit of USB Interface A common mode choke L1 is recommended to be added in series between the module and customers MCU in order to suppress EMI spurious transmission. Meanwhile, the 0 resistors (R3 and R4) should be BG96_Hardware_Design 45 / 81 LTE Module Series BG96 Hardware Design added in series between the module and the test points so as to facilitate debugging, and the resistors are not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components must be placed close to the module, and also these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles should be complied with when design the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90. Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer with ground shielding onnot only upper and lower layers but also right and left sides. Pay attention to the influence of junction capacitance of ESD protection components on USB data lines. Typically, the capacitance value should be less than 2pF. Keep the ESD protection componentsas close to the USB connector as possible. NOTE BG96 module can only be used as a slave device. 3.10. UART Interfaces The module provides threeUART interfaces: UART1,UART2 and UART3interfaces. The following are theirfeatures. UART1 supports 9600bps,19200bps,38400bps,57600bps,115200bps,230400bps,460800bps and921600bpsbaud rates, and the default is 115200bps. Itis used for data transmission and AT command communication. interface UART2 interface supports 115200bpsbaud rate, and is used formodule debugging and log output. UART3interface supports 115200bps baud rate, and is used for outputting GNSS dataandNMEA sentences. The following tables show the pin definition of the three UART interfaces. BG96_Hardware_Design 46 / 81 LTE Module Series BG96 Hardware Design Table 11: Pin Definition of UART1Interface Pin Name Pin No. I/O Description Comment 30 34 35 36 37 38 39 DI DI DO DO DI DO DO Data terminal ready. Sleepmode control 1.8V power domain Receive data 1.8V power domain Transmit data 1.8V power domain Clear to send 1.8V power domain Request to send 1.8V power domain Data carrier detection 1.8V power domain Ring indicator 1.8V power domain DTR RXD TXD CTS RTS DCD RI Table 12: Pin Definition of UART2Interface Pin Name Pin No. DBG_RXD DBG_TXD 22 23 I/O DI DO Description Receive data Comment 1.8V power domain Transmit data 1.8V power domain Table 13: Pin Definition of UART3Interface Pin Name Pin No. UART3_TXD 27 UART3_RXD 28 I/O DO DI Description Comment Transmit data 1.8V power domain Receive data 1.8V power domain The logic levels are described in the following table. BG96_Hardware_Design 47 / 81 LTE Module Series BG96 Hardware Design Table 14:Logic Levels of Digital I/O Parameter VIL VIH VOL VOH Min.
-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V The module provides 1.8V UART interface. A level translator should be used if customersapplication is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instrumentsis recommended. The following figure shows a reference design. Figure 16: Reference Circuit with Translator Chip Please visit http://www.ti.comformore information. Another example with transistor translation circuit is shown as below. Thecircuitdesign of dotted line section can refer to thatof solid line section, in BG96_Hardware_Design 48 / 81 LTE Module Series BG96 Hardware Design terms of both module input and output circuit designs, but please pay attention to the direction of connection. Figure 17: Reference Circuit with Transistor Circuit NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 3.11. PCM* and I2C* Interfaces BG96 provides one Pulse Code Modulation (PCM)digital interface and one I2C interface. The following table shows the pin definition of the two interfaces which can be applied on audio codec design. Table 15: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_CLK*
PCM_SYNC*
4 5 DO PCM clock output 1.8V power domain DO PCMframe synchronization output 1.8V power domain BG96_Hardware_Design 49 / 81 LTE Module Series BG96 Hardware Design PCM_IN*
PCM_OUT*
I2C_SCL*
I2C_SDA*
6 7 40 41 DI PCM data input 1.8V power domain DO PCM dataoutput 1.8V power domain OD I2C serial clock Require external pull-up to 1.8V OD I2C serial data Require external pull-up to 1.8V The following figure shows a reference design of PCM and I2Cinterfaces with an external codec IC. Figure 18: Reference Circuit of PCM Application with Audio Codec NOTE
* means under development. 3.12. Network Status Indication BG96 provides one network status indication pin:NETLIGHT. The pin is used to drive a network status indication LED. The following tables describe the pin definition and logic level changes ofNETLIGHT in different network activity status. BG96_Hardware_Design 50 / 81 LTE Module Series BG96 Hardware Design Table 16: Pin Definition of NETLIGHT Pin Name Pin No. I/O Description Comment NETLIGHT 21 DO Indicate the modulesnetwork activity status 1.8V power domain Table 17: Working State of NETLIGHT Pin Name Logic Level Changes Network Status NETLIGHT Flicker slowly (200ms High/1800ms Low) Network searching Flicker slowly (1800ms High/200ms Low) Idle Flicker quickly (125ms High/125ms Low) Data transfer is ongoing Always high Voice calling A reference circuit is shown in the following figure. Figure 19: Reference Circuit of the Network Status Indicator BG96_Hardware_Design 51 / 81 LTE Module Series BG96 Hardware Design 3.13. STATUS The STATUS pin is used to indicate the operation status of BG96 module. It will output high level when the module is poweredon. The following table describes the pin definition of STATUS. Table 18: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the modules operation status 1.8V power domain The following figure shows a reference circuit of STATUS. Figure 20: Reference Circuit of STATUS AT+QCFG=risignaltype,physicalcommand can be used to configure RI behavior. 3.14. Behaviors of RI BG96_Hardware_Design 52 / 81 LTE Module Series BG96 Hardware Design No matter on which port URC is presented, URC will trigger the behavior of RI pin. NOTE URC can be outputted from UART port, USB AT port and USB modem port, through configuration viaAT+QURCCFGcommand. The default port is USB AT port. The default behaviors of RI areshown as below. Table 19:Default Behaviors of RI State Idle URC Response RI keeps in high level. RI outputs 120ms low pulse when new URC returns. The default RI behaviors can be configured flexibly by AT+QCFG=urc/ri/ringcommand.For more details, please refer to document [2]. 3.15. USB_BOOT Interface BG96 provides a USB_BOOT pin. During development or factory production, USB_BOOT can force the module to boot from USB port for firmware upgrade. BG96_Hardware_Design 53 / 81 LTE Module Series BG96 Hardware Design Table 20: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description Comment USB_BOOT 75 DI Force the module to enter into emergency download mode 1.8V power domain. Active high. If unused, keep it open. The following figure shows a reference circuit of USB_BOOT interface. Figure 21: Reference Circuit of USB_BOOT Interface NOTE It is recommended to reserve the above circuit design during application design. 3.16. ADC Interfaces The module provides two analog-to-digital converter (ADC) interfaces.AT+QADC=0 command can be used to read the voltage value on ADC0 pin. AT+QADC=1 command can be used to read the voltage value on ADC1 pin. For more details about these AT commands, please refer todocument [2]. In order to improve the accuracy of ADCvoltage values, the trace of ADC should be surrounded by ground. BG96_Hardware_Design 54 / 81 LTE Module Series BG96 Hardware Design Table 21: Pin Definition of ADCInterfaces Pin Name Pin No. Description ADC0 ADC1 24 2 General purpose analog to digital converter interface General purpose analog to digital converter interface The following table describes the characteristics of ADC interfaces. Table 22: Characteristics of ADC Interfaces Parameter ADC0 Voltage Range ADC1 Voltage Range ADC Resolution ADC Analog-input Bandwidth ADC Sampling Rate Min. 0.3 0.3 Typ. Max. 100 2.4 1.8 1.8 15 Unit V V bits kHz MHz NOTES 1. ADC input voltage must not exceed 1.8V. 2. 3. It is prohibited to supply any voltage to ADC pins when VBAT is removed. It is recommended to use resistor divider circuit for ADC application, andthe divider resistor accuracy should be no less than 1%. 3.17. GPIOInterfaces The module provides two general-purpose input and output(GPIO) interfaces. AT+QFWD* command can be used toconfigure corresponding GPIO pins status. For more details about the AT command, please refer to document [2]. BG96_Hardware_Design 55 / 81 LTE Module Series BG96 Hardware Design Table 23: Pin Definition of GPIOInterfaces Pin Name Pin No. Description GPIO26 GPIO64 26 64 General purpose input and output interface General purpose input and output interface The following table describes the characteristics of GPIOinterfaces. Table 24:Logic Levels of GPIO interfaces Min.
-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V Parameter VIL VIH VOL VOH NOTE
* means under development. BG96_Hardware_Design 56 / 81 LTE Module Series BG96 Hardware Design 4 GNSS Receiver 4.1. General Description BG96 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou/Compass, Galileo and QZSS). BG96 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USBinterface by default. By default, BG96 GNSS engine is switched off. It has to be switched on via AT command. For more details about GNSS engine technology and configurations, please refer to document [3]. 4.2. GNSS Performance The following table shows the GNSS performance of BG96. Table 25: GNSS Performance Parameter Description Sensitivity
(GNSS) Cold start Conditions Autonomous Typ.
-146
-157 Unit dBm dBm Reacquisition Autonomous BG96_Hardware_Design 57 / 81 LTE Module Series BG96 Hardware Design Tracking Cold start
@open sky Warm start
@open sky Hot start
@open sky CEP-50 Autonomous Autonomous XTRA enabled Autonomous XTRA enabled Autonomous XTRA enabled Autonomous
@open sky
-157 31 11.54 21 2.52 2.7 1.82
< 2.5 dBm s s s s s s m TTFF
(GNSS) Accuracy
(GNSS) NOTES 1. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. 2. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock. 3. Cold start sensitivity: the lowest GNSS signal value at the antenna port on which the module fixes position within 3 minutes after executing cold start command. 4.3. Layout Guidelines The following layout guidelines should be taken into account in customers designs. Maximize the distance between GNSS antenna and main antenna. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card should be kept away from the antennas. Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar isolation and protection. Keep 50characteristic impedance for the ANT_GNSS trace. Please refer to Chapter 5 for GNSS antenna reference design and antenna installation information. BG96_Hardware_Design 58 / 81 LTE Module Series BG96 Hardware Design 5 Antenna Interfaces BG96 includes a main antenna interface andaGNSS antennainterface. The antenna portshave an impedance of 50. 5.1. MainAntenna Interface 5.1.1. Pin Definition The pin definition of main antenna interface is shown below. Table 26: Pin Definition of Main Antenna Interface Description Comment Main antennainterface 50characteristicimpedance Pin Name Pin No. ANT_MAIN 60 I/O IO 5.1.2. Operating Frequency Table 27: BG96 Operating Frequency 3GPP Band LTE-FDD B1 Transmit 1920~1980 Receive 2110~2170 LTE-FDD B2, PCS1900 LTE-FDD B3,DCS1800 LTE-FDD B4 1850~1910 1930~1990 1710~1785 1805~1880 1710~1755 2110~2155 Unit MHz MHz MHz MHz BG96_Hardware_Design 59 / 81 LTE Module Series BG96 Hardware Design LTE-FDD B5,GSM850 LTE-FDD B8,EGSM900 LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B28 LTE-TDD B39 824~849 869~894 880~915 925~960 699~716 777~787 815~830 830~845 832~862 729~746 746~756 860~875 875~890 791~821 1850~1915 1930~1995 814~849 703~748 859~894 758~803 1880~1920 1880~1920 Table 28: BG96-M Operating Frequency 3GPP Band LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12 Transmit 1920~1980 1850~1910 1710~1785 1710~1755 824~849 880~915 699~716 BG96_Hardware_Design 60 / 81 Receive 2110~2170 1930~1990 1805~1880 2110~2155 869~894 925~960 729~746 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz LTE Module Series BG96 Hardware Design 777~787 815~830 830~845 832~862 746~756 860~875 875~890 791~821 1850~1915 1930~1995 814~849 703~748 859~894 758~803 1880~1920 1880~1920 MHz MHz MHz MHz MHz MHz MHz MHz LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B28 LTE-TDD B39 5.1.3. Reference Design of RF Antenna Interface Areference design of mainantenna padis shown as below. A -type matching circuit should be reservedfor better RF performance, and the -type matching components (R1/C1/C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. Figure 22: Reference Circuit of RF Antenna Interface 5.1.4. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled as 50. The impedance of the RF traces is usually determined by BG96_Hardware_Design 61 / 81 LTE Module Series BG96 Hardware Design the trace width (W), the materials dielectric constant, the distance between signal layer and reference ground (H), and the clearance between RF trace and ground(S). Microstrip line or coplanar waveguide line is typically used in RF layout for characteristic impedance control. The following are reference designs of microstrip line or coplanar waveguide linewithdifferent PCB structures. Figure 23: Microstrip Line Designon a 2-layer PCB Figure 24: Coplanar Waveguide Line Design on a 2-layer PCB BG96_Hardware_Design 62 / 81 LTE Module Series BG96 Hardware Design Figure 25: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 26: Coplanar Waveguide Line Designon a4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:
Use impedance simulation tool to control the characteristic impedanceof RF tracesas 50. The GND pins adjacent to RF pins should not bedesigned as thermal relief pads, and should be fully connected to ground. The distance between the RF pinsand the RFconnectorshould be as short as possible, and all the right angle tracesshould be changed to curved ones. There should be clearance area under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground viasaround RF traces and the reference ground could help to improve RF performance. The distance between BG96_Hardware_Design 63 / 81 LTE Module Series BG96 Hardware Design theground viasand RF traces should be no less than two times the width of RF signal traces (2*W). For more details about RF layout, please refer to document [4]. 5.2. GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNSS antenna interface. Table 28: Pin Definition of GNSS Antenna Interface Pin Name Pin No. I/O Description Comment ANT_GNSS 49 AI GNSS antennainterface 50impedance Table 29: GNSS Frequency Type GPS GLONASS Galileo BeiDou QZSS Frequency 1575.421.023 1597.5~1605.8 1575.422.046 1561.0982.046 1575.42 Unit MHz MHz MHz MHz MHz A reference design of GNSS antenna interfaceis shown as below. BG96_Hardware_Design 64 / 81 LTE Module Series BG96 Hardware Design Figure 27: Reference Circuit of GNSS Antenna Interface NOTES If the module is designed with a passive antenna, then the VDD circuit is not needed. 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. 5.3. Antenna Installation 5.3.1. Antenna Requirements The following table shows the requirements on main antennaand GNSS antenna. BG96_Hardware_Design 65 / 81 LTE Module Series BG96 Hardware Design Table 30: Antenna Requirements Antenna Type Requirements GNSS1) Frequency range: 1559MHz ~1609MHz Polarization: RHCP or linear VSWR: <2 (Typ.) Passive antenna gain: >0dBi Active antenna noise figure: <1.5dB Active antenna gain: > 0dBi Active antenna embedded LNA gain: < 17dB VSWR: 2 Efficiency: > 30%
Max Input Power (W): 50 Input Impedance (): 50 Cable Insertion Loss: <1dB LTE/GSM
(LTE B5/B8/B12/B13/B18/B19/B20/B26/B28, GSM850/EGSM900) Cable Insertion Loss: <1.5dB
(LTE B1/B2/B3/B4/B25/B39,DCS1800/PCS1900) NOTE 1)It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance. 5.3.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMTconnector provided by HIROSE. BG96_Hardware_Design 66 / 81 LTE Module Series BG96 Hardware Design Figure 28: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 29:Mechanicals of U.FL-LP Connectors BG96_Hardware_Design 67 / 81 BG LTE Mod G96 Hardw dule Series s ware Design n The followin ng figure des scribes the s space factor r of mated c onnector. Figure 30:S Space Facto or of Mated d Connector r (Unit: mm m) e details, For more please v isithttp://w www.hiro ose.com. dware_Desi ign BG96_Hard 68 / 81 LTE Module Series BG96 Hardware Design 6 Electrical, Reliability and RadioCharacteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 31: Absolute Maximum Ratings Parameter VBAT_BB VBAT_RF USB_VBUS Voltage at Digital Pins Min.
-0.5
-1.2
-0.3
-0.3 Max. Unit 6 6 5.5 2.3 V V V V 6.2. Power Supply Ratings BG96_Hardware_Design 69 / 81 LTE Module Series BG96 Hardware Design Table 32: Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT VBAT_BB and VBAT_RF IVBAT Peak supply current
(during transmissionslot) The actual input voltages must stay between the minimum and maximum values. Maximum power control level on EGSM900 3.3 3.8 4.3 V 1.8 2.0 A USB_VBUS USB detection 3.0 5.0 5.25 V 6.3. Operation and StorageTemperatures The operation and storagetemperatures of the modulearelisted in the following table. Table 33: Operation and StorageTemperatures Parameter OperationTemperature Range1) Extended Temperature Range2) Storage Temperature Range Min.
-35
-40
-40 Typ.
+25 Max. Unit
+75
+85
+90 C C C NOTES 1. 1)Withinoperation temperature range, the module is 3GPP compliant. 2. 2)Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature BG96_Hardware_Design 70 / 81 LTE Module Series BG96 Hardware Design returns to the normal operating temperature levels, the module will meet 3GPP specifications again. 6.4. Current Consumption The following table shows current consumption of BG96 module. Table 34: BG96Current Consumption Parameter Description Conditions Typ.1) Unit IVBAT Leakage Current PSM Rock bottom Sleep2) Power off mode Power Saving Mode @Real Network AT+CFUN=0@Sleep State DRX=1.28s @ Instrument DRX=1.28s @ Instrument Sleep State 3) e-I-DRX=20.48s @ Instrument e-I-DRX=20.48s @ Instrument
@Real 2G Network DRX=1.28s @ Instrument DRX=1.28s @Instrument Idle State e-I-DRX=20.48s @ Instrument e-I-DRX=20.48s @ Instrument
@Real 2G Network LTE Cat M1 data transfer
(GNSS OFF) LTE-FDD B1 @23.31dBm LTE-FDD B2 @23.05dBm BG96_Hardware_Design 71 / 81 8 10 0.8 1.5 1.96 1.2 1.1 2.0 15 15 15 15 15 220 208 uA uA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE Module Series BG96 Hardware Design LTE-FDD B3 @23.09dBm LTE-FDD B4 @23.19dBm LTE-FDD B5 @23.22dBm LTE-FDD B8 @21.83dBm LTE-FDD B12 @21.88dBm LTE-FDD B13 @21.96dBm LTE-FDD B18 @23.04dBm LTE-FDD B19 @23.13dBm LTE-FDD B20 @23.07dBm LTE-FDD B25 @23.01dBm LTE-FDD B26 @22.81dBm LTE-FDD B28 @22.52dBm LTE-TDD B39 @TBD LTE-FDD B1 @22.8dBm LTE-FDD B2 @22.6dBm LTE-FDD B3 @22.6dBm LTE-FDD B4 @22.6dBm LTE-FDD B5 @22.9dBm LTE-FDD B8 @22.7dBm LTE-FDD B12 @23dBm LTE-FDD B13 @22.9dBm LTE Cat NB1 data transfer
(GNSS OFF) 214 214 210 203 215 197 212 211 209 211 214 215 TBD 170 171 161 161 156 170 170 167 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG96_Hardware_Design 72 / 81 LTE Module Series BG96 Hardware Design LTE-FDD B18 @23.1dBm LTE-FDD B19 @22.9dBm LTE-FDD B20 @22.7dBm LTE-FDD B25 @23dBm LTE-FDD B26 @22.8dBm LTE-FDD B28 @22.5dBm GSM850 4UL1DL @30.17dBm GSM850 3UL2DL @32dBm GSM850 2UL3DL @32.74dBm GSM850 1UL4DL @32.52dBm EGSM900 4UL1DL @30.54dBm EGSM900 3UL2DL @31.36dBm EGSM9002UL3DL @32.62dBm EGSM9001UL4DL @32.75dBm DCS18004UL1DL @29.81dBm DCS18003UL2DL @30.09dBm DCS18002UL3DL @30.1dBm DCS18001UL4DL @30.34dBm PCS1900 4UL1DL @29.64dBm PCS1900 3UL2DL @29.86dBm PCS1900 2UL3DL @29.7dBm 159 155 157 165 162 163 575 533 402 220 586 556 399 228 543 426 301 182 516 404 281 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA GPRS data transfer
(GNSS OFF) BG96_Hardware_Design 73 / 81 LTE Module Series BG96 Hardware Design PCS1900 1UL4DL @29.94dBm GSM850 4UL1DL @26.02dBm GSM850 3UL2DL @26.11dBm GSM850 2UL3DL @26.57dBm GSM850 1UL4DL @26.92dBm EGSM900 4UL1DL @25.92dBm EGSM900 3UL2DL @26.11dBm EGSM9002UL3DL @26.16dBm EGSM9001UL4DL @26.88dBm DCS1800 4UL1DL @24.7dBm DCS18003UL2DL @25.97dBm DCS18002UL3DL @25.03dBm DCS18001UL4DL @25.03dBm PCS1900 4UL1DL @24.92dBm PCS1900 3UL2DL @24.86dBm PCS1900 2UL3DL @25.17dBm PCS1900 1UL4DL @25.31dBm EDGE data transfer
(GNSS OFF) LTE Voice
(GNSS OFF) Voice @LTE Cat M1 network 171 403 312 224 136 391 301 217 133 373 286 208 127 375 288 207 127 108 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA NOTES 1. 1)means the average value. 2. 2)means the operation is performed with AT+CFUN=0 and AT+QSLCK=1(DTR pin at high level). 3. 3)Sleep state with UART connected and USB disconnected. The module can enter into sleep state BG96_Hardware_Design 74 / 81 LTE Module Series BG96 Hardware Design through executing AT+QSCLK=1 command via UART interface and then controlling the modules DTR pin. For details, please refer to Chapter 3.4.4. Table 35: GNSSCurrent Consumption Description Conditions Searching
(AT+CFUN=0) Cold Start @Passive Antenna Lost State @Passive Antenna Tracking
(AT+CFUN=0) Instrument Environment Open Sky @Passive Antenna Open Sky @Active Antenna Typ. 41.7 42 21.7 36 35 Unit mA mA mA mA mA 6.5. RF Output Power The following table shows the RF output power of BG96 module. Table 36: RF Output Power Frequency LTE-FDD Max. Min. B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/B25/
23dBm2dB
<-39dBm B26/B28 LTE-TDD B39 GSM850/EGSM900 DCS1800/PCS1900 BG96_Hardware_Design 75 / 81 23dBm2dB
<-39dBm 33dBm2dB 5dBm5dB 30dBm2dB 0dBm5dB LTE Module Series BG96 Hardware Design GSM850/EGSM900 (8-PSK) DCS1800/PCS1900 (8-PSK) 27dBm3dB 5dBm5dB 26dBm3dB 0dBm5dB 6.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of BG96 module. Table 37: BG96 Conducted RF Receiving Sensitivity Network Band Primary Diversity Not Supported LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE LTE-FDD B12 Supported LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 BG96_Hardware_Design 76 / 81 Sensitivity(dBm) Cat M1/3GPP Cat NB11)/3GPP
-107.0/-102.7
-112.5/-107.5
-106.7/-100.3
-112.5/-107.5
-106.8/-99.3
-113/-107.5
-106.9/-102.3
-112.5/-107.5
-107.0/-100.8
-114/-107.5
-107.3/-99.8
-113/-107.5
-107.7/-99.3
-113.5/-107.5
-106.5/-99.3
-112/-107.5
-107.5/-102.3
-113.5/-107.5
-107.1/-102.3
-114/-107.5
-107.2/-99.8
-114/-107.5
-106/-100.3
-112/-107.5
-107.1/-100.3
-113/-107.5 LTE Module Series BG96 Hardware Design LTE-FDD B28 LTE-TDD B39 Network Band Primary Diversity GSM850/EGSM900 DCS1800/PCS1900 Supported Not Supported GSM Table 38: BG96-M Conducted RF Receiving Sensitivity
-107.2/-100.8
-113/-107.5 TBD /-103 Not Supported Sensitivity (dBm) GSM/3GPP
-109/-102
-108.5/-102 Network Band Primary Diversity Sensitivity(dBm) Cat M1/3GPP LTE LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B28 Supported
-107.0/-102.7
-106.7/-100.3
-106.8/-99.3
-106.9/-102.3
-107.0/-100.8
-107.3/-99.8
-107.7/-99.3 Not Supported
-106.5/-99.3
-107.5/-102.3
-107.1/-102.3
-107.2/-99.8
-106/-100.3
-107.1/-100.3
-107.2/-100.8 BG96_Hardware_Design 77 / 81 LTE Module Series BG96 Hardware Design LTE-TDD B39 TBD /-103 NOTE 1)LTE Cat NB1 receiving sensitivity without repetitions. 6.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the electrostatic discharge characteristics of BG96 module. Table 38: Electrostatic Discharge Characteristics Tested Points Contact Discharge Air Discharge VBAT, GND Main/GNSS Antenna Interfaces 10 10 15 15 Unit kV kV BG96_Hardware_Design 78 / 81 LTE Module Series BG96 Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module.All dimensions are measured in mm, and the tolerances for dimensions without tolerance values are 0.05mm. 7.1. Mechanical Dimensions of the Module 22.500.15 2.30.2 5 1
. 0 0 5
. 6 2 Figure 31: Module Top and Side Dimensions BG96_Hardware_Design 79 / 81 LTE Module Series BG96 Hardware Design 22.500.15 7.15 7.45 0.92 1.65 1.10 0.55 1.95 1.10 5.10 1.00 0 5
. 8 0.85 1.70 0.85 1.00 1.00 1.70 1.70 0.70 0.92 1.50 1.90 1.10 0.50 0.55 1.15 1.65 40x1.0 62x0.7 40x1.0 62x1.15 Figure 32: Module Bottom Dimensions (Bottom View) 5 1
. 0 0 5
. 6 2 1.50 BG96_Hardware_Design 80 / 81 LTE Module Series BG96 Hardware Design 7.2. Recommended Footprint 0.92 0.92 1.50 0.15 1.90 1.10 22.500.15 9.18 7.45 9.18 7.15 1.10 1.95 0.55 1.10 2.55 2.55 5.10 1.00 1.70 0.85 0 5
. 8 0.85 0.85 1.00 0.85 0 7 1
. 0.50 0.70 1.70 1.00 1.65 1.15 0.55 1.65 3 0 1 1
. 0 7 9
. 5 6 7
. 5 9 5
. 5 2 4
. 5 2
. 4 5 9
. 5 5 6
. 7 0 6
. 9 3 0
. 1 1
. 5 1 0 0 5
. 6 2 4.25 5.95 4.25 5.95 1.50 62x0.7 40x1.0 62x1.15 40x1.0 Figure 33: Recommended Footprint (Top View) NOTES 1. For easy maintenance of the module, please keep about 3mm between the module and other components onthe host PCB. All reserved pins must be kept open. BG96_Hardware_Design 81 / 81 BG LTE Mod G96 Hardw dule Series s ware Design n For stenc cil design n requirem ments of the modu ule, pleas se refer to o docum ment [5]. 7.3 3. Desig gn Effect t Drawing gs of the e Module e F igure 34: T Top View of f the Modu ule Fig gure 35: Bo ottom View of the Mod ule dware_Desi ign BG96_Hard 82 / 81 LTE Module Series BG96 Hardware Design NOTE These are design effect drawings of BG96 module. For more accurate pictures, please refer to the module that you get from Quectel. BG96_Hardware_Design 83 / 81 LTE Module Series BG96 Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage BG96 is stored in avacuum-sealed bag. It is rated at MSL 3, and itsstorage restrictions are listed below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40C/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:
Mounted within 168 hours at the factory environment of 30C/60%RH. Stored at <10%RH. 3. Devices require baking before mounting, if any circumstance below occurs. When the ambient temperature is 23C5Cand the humidity indication card shows the humidity is >10% before opening the vacuum-sealed bag. Device mounting cannot be finished within 168 hours at factory conditions of 30C/60% RH. Stored at >10% RH after the vacuum-sealed bag is opened. 4. If baking is required, devices may be baked for 8 hours at 120C5C. NOTE As the plastic package cannot be subjected to high temperature, it should be removed from devices before high to temperature (120C) baking. IPC/JEDECJ-STD-033 for baking procedure. is desired, please refer If shorter baking time BG96_Hardware_Design 84 / 81 LTE Module Series BG96 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properlyso as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, thethickness of stencil for the module is recommended to be 0.18mm~0.20mm. For more details, please refer todocument [5]. It is suggested that the peak reflow temperature is 240~245C, and the absolute maximum reflow temperature is 245C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 36: Recommended Reflow Soldering Thermal Profile Table 39: Recommended Thermal Profile Parameters Factor Soak Zone Recommendation BG96_Hardware_Design 85 / 81 LTE Module Series BG96 Hardware Design Max slope 1 to 3C/sec Soak time (between A and B: 150C and 200C) 60 to 120 sec Reflow Zone Max slope Reflow time (D: over 220C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle 2 to 3C/sec 40 to 60 sec 240C ~ 245C 1 to 4C/sec 1 8.3. Packaging BG96 ispackaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until the devices are ready to be soldered onto the application. The reel is 330mm in diameter and each reel contains 250 modules.The following figures show the packaging details, measured in mm. BG96_Hardware_Design 86 / 81 LTE Module Series BG96 Hardware Design Figure 37: Tape Dimensions 48.5 0 0 1 13 44.5+0.20
-0.00 Cover tape Direction of feed Figure 38: ReelDimensions Table 40: Reel Packaging Model Name MOQ for MP MinimumPackage: 250pcs BG96 250pcs Size: 370mm 350mm 56mm N.W: 1.0kg G.W: 1.71kg Minimum Packagex4=1000pcs Size: 380mm 250mm 365mm N.W: 4.0kg G.W: 7.16kg BG96_Hardware_Design 87 / 81 LTE Module Series BG96 Hardware Design 9 Appendix A References Table 41: Related Documents SN Document Name Remark
[1] Quectel_UMTS<E_EVB_User_Guide UMTS<EEVB User Guide
[2] Quectel_BG96_AT_Commands_Manual BG96 AT Commands Manual
[3] Quectel_BG96_GNSS_AT_Commands_Manual BG96 GNSS AT Commands Manual
[4] Quectel_RF_Layout_Application_Note RF Layout Application Note
[5] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 42: Terms and Abbreviations Abbreviation Description AMR bps CHAP CS CTS DFOTA DL DTR DTX e-I-DRX EPC Adaptive Multi-rate Bits Per Second Challenge Handshake Authentication Protocol Coding Scheme Clear To Send Delta Firmware Upgrade Over The Air Downlink Data Terminal Ready Discontinuous Transmission Extended Idle Mode Discontinuous Reception Evolved Packet Core BG96_Hardware_Design 88 / 81 LTE Module Series BG96 Hardware Design ESD FDD FR GMSK GSM HSS I/O Inorm LED LNA LTE MO MS MT PAP PCB PDU PPP PSM RF RHCP Rx SISO SMS TDD Electrostatic Discharge Frequency Division Duplex Full Rate Gaussian Minimum Shift Keying Global System for Mobile Communications Home Subscriber Server Input/Output Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution Mobile Originated Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Power Saving Mode Radio Frequency Right Hand Circularly Polarized Receive Single Input Single Output Short Message Service Time Division Duplexing BG96_Hardware_Design 89 / 81 LTE Module Series BG96 Hardware Design TX UL UE URC
(U)SIM Vmax Vnorm Vmin VIHmax VIHmin VILmax VILmin VImax VImin VOHmax VOHmin VOLmax VOLmin VSWR Transmitting Direction Uplink User Equipment Unsolicited Result Code
(Universal) Subscriber Identity Module Maximum Voltage Value Normal Voltage Value Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio BG96_Hardware_Design 90 / 81 LTE Module Series BG96 Hardware Design 10 Appendix B GPRS Coding Schemes Table 43: Description of Different Coding Schemes Scheme Code Rate USF Pre-coded USF CS-1 1/2 3 3 Radio Block excl.USF and BCS 181 BCS Tail Coded Bits Punctured Bits Data Rate Kb/s 40 4 456 0 9.05 CS-2 2/3 3 6 268 16 4 588 132 13.4 CS-3 3/4 3 6 312 16 4 676 220 15.6 CS-4 1 3 12 428 16
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456
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21.4 BG96_Hardware_Design 91 / 81 LTE Module Series BG96 Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 44: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 1 2 1 2 2 3 1 2 2 3 4 3 4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 BG96_Hardware_Design 92 / 81 2 3 3 4 4 4 4 5 5 5 5 5 NA NA LTE Module Series BG96 Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 BG96_Hardware_Design 93 / 81 LTE Module Series BG96 Hardware Design 12 Appendix D EDGE Modulationand Coding Schemes Table 45: EDGE Modulation and Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot GMSK GMSK GMSK GMSK GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK
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C B A C B A B A A 9.05kbps 18.1kbps 36.2kbps 13.4kbps 26.8kbps 53.6kbps 15.6kbps 31.2kbps 62.4kbps 21.4kbps 42.8kbps 85.6kbps 8.80kbps 17.60kbps 35.20kbps 11.2kbps 22.4kbps 44.8kbps 14.8kbps 29.6kbps 59.2kbps 17.6kbps 35.2kbps 70.4kbps 22.4kbps 44.8kbps 89.6kbps 29.6kbps 59.2kbps 118.4kbps 44.8kbps 89.6kbps 179.2kbps 54.4kbps 108.8kbps 217.6kbps 59.2kbps 118.4kbps 236.8kbps Coding Schemes CS-1:
CS-2:
CS-3:
CS-4:
MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 BG96_Hardware_Design 94 / 81
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