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BLE112 PRELIMINARY DATA SHEET Friday, 19 August 2011 Version 1.0 Copyright 2000-2011 Bluegiga Technologies All rights reserved. Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual. Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications detailed here at any time without notice and does not make any commitment to update the information contained here. Bluegigas products are not authorized for use as critical components in life support devices or systems. The WRAP is a registered trademark of Bluegiga Technologies The Bluetooth trademark is owned by the Bluetooth SIG Inc., USA and is licensed to Bluegiga Technologies. All other trademarks listed herein are owned by their respective owners. Bluegiga Technologies Oy VERSION HISTORY Version 0.1 0.9 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1.0 Comment First draft Preproduction information Prerelease Reference schematic added Description updated Design guide updates, characteristics updates, I/O descriptions updates Layout fixes Small updates Figure 10 corrected Recommended land pattern, land width added Soldering recommendations added Certification information updated. Layout guide for BLE112-N added. Bluegiga Technologies Oy TABLE OF CONTENTS 1 BLE112 Product numbering ......................................................................................................................... 6 2 Pinout and Terminal Description .................................................................................................................. 7 3 Electrical Characteristics ............................................................................................................................ 10 Absolute Maximum Ratings ................................................................................................................ 10 3.1 3.2 Recommended Operating Conditions ................................................................................................. 10 Antenna characteristics ....................................................................................................................... 10 3.3 4 Design Guidelines ...................................................................................................................................... 15 4.1 General Design Guidelines ................................................................................................................. 15 Layout Guide Lines ............................................................................................................................. 16 4.2 4.3 BLE112-A Layout Guide ..................................................................................................................... 16 BLE112-N Layout Guide ..................................................................................................................... 17 4.4 5 Soldering Recommendations ..................................................................................................................... 19 6 Block diagram ............................................................................................................................................. 20 7 Certifications ............................................................................................................................................... 23 Bluetooth ............................................................................................................................................. 23 7.1 7.2 FCC and IC ......................................................................................................................................... 23 7.3 CE ....................................................................................................................................................... 26 7.4 Qualified Antenna Types for BLE112-E and BLE112-N ..................................................................... 26 8 Contact Information .................................................................................................................................... 27 Bluegiga Technologies Oy BLE112 Bluetooth low energy single mode module DESCRIPTION flexible hardware BLE112, Bluetooth low energy single mode module is a single mode device targeted for low power sensors and accessories. BLE112 offers all Bluetooth low energy features: radio, stack, profiles and application space for customer applications, so no external processor is needed. The module also provides to connect sensors, simple user interfaces or even displays directly to the module. BLE112 can be powered directly with a standard 3V coin cell batteries or pair of AAA batteries. In lowest power sleep mode it consumes only 400nA and will wake up in few hundred microseconds. APPLICATIONS:
interfaces Heart rate sensors Pedometers Watches Blood pressure and glucose meters Weight scales Key fobs Households sensors and collector devices Security tags Wireless keys (keyless go) Proximity sensors HID keyboards and mice Indoor GPS broadcasting devices KEY FEATURES:
Bluetooth v.4.0, single mode compliant o Supports master and slave modes o 4+ simultaneous connection in master mode Integrated Bluetooth low energy stack o GAP, GATT, L2CAP, SMP o Bluetooth low energy profiles Radio performance o TX power: +3dBm to -23dBm o RX sensitivity: -87dBm to -
93dBm Ultra low current consumption o Transmit: 27mA (0dBm) o Sleep mode 3: 0.4uA Programmable 8051 processor embedding full applications for Bluetooth end product, CE, FCC and IC and Telec qualified Bluegiga Technologies Oy 1 BLE112 Product numbering Antenna:
A E N
= Internal
= External
= RF pin BLE112-A-X Generation:
1 = 1st 2 = 2nd 3 = 3rd Type:
1 = Single mode 2 = Dual mode 3 = Reseved Class:
1 = class 1 2 = class 2 3 = class 3 Firmware revision
- 1.0
- 2.1
- 3.2 Available products and product codes Product code Description BLE112-A-v1 BLE112-N-v1 BLE112-E-v1 BLE112 with integrated chip antenna and software version 1.0 BLE112 with RF pin and software version 1.0 BLE112 with U.FL connector and software version 1.0 Bluegiga Technologies Oy Preliminary information subject to change Page 6 of 27 2 Pinout and Terminal Description 2 3 1 3 F R D N G F R 1 2 3 4 5 6 7 8 9 10 11 12 13 GND AVDD AVDD P2_2 P2_1 P2_0 P1_7 P1_6 VDD_USB GND USB+
USB P1_5 GND RESET P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 30 29 28 27 26 25 24 23 22 4 _ 1 P 4 1 3 _ 1 P 2 _ 1 P 1 _ 1 P 0 _ 1 P 7 _ 0 P 5 1 6 1 7 1 8 1 9 1 D D V D 0 2 D N G 1 2 Figure 1: BLE112 PAD TYPE DESCRIPTION Active low reset. GND GND RESET GND RF RFGND PIN NUMBER 29 1, 10, 21, 30 31 32 RF (*
GND RF output/input for BLE112-N. With BLE112-A and BLE112-E do not connect. RF ground. Connected to GND internally in the module. With BLE112-A and BLE112-E leave floating or connect to a solid GND plane. Supply voltage 2V - 3.6V Supply voltage 2V - 3.6V Supply voltage 2V - 3.6V DVDD AVDD VDD_USB
*) RF pin is not connected in BLE112-A and BLE112-E. To use RF pin with BLE112-B please see the design guide. Supply voltage Supply voltage Supply voltage 20 2, 3 9 Table 1: Supply and RF Terminal Descriptions Bluegiga Technologies Oy Preliminary information subject to change Page 7 of 27 PIN NUMBER PIN NAME PIN TYPE DESCRIPTION 4 5 6 7 8 11 12 13 14 15 16 17 18 19 22 23 24 25 26 27 28 P2_2 P2_1 P2_0 P1 7 P1_6 USB+
USB-
P1_5 P1_4 P1_3 P1_2 P1_1 P1_0 P0_7 P0_6 P0_5 P0_4 P0_3 P0_2 P0_1 P0_2 Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O USB+
USB-
Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Digital I/O Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 USB data plus USB data minus Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port with 20mA driving capability, See table 3 Configurable I/O port with 20mA driving capability, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3 Configurable I/O port, See table 3
*)BLE112 is configurable as either SPI master or SPI slave Table 2: Terminal Descriptions Bluegiga Technologies Oy Preliminary information subject to change Page 8 of 27 PERIPHERAL /
FUNCTION ADC Operational amplifier Analog comparator USART 0 SPI Alt. 2 USART 0 UART Alt.2 USART 1 SPI Alt.2 USART 1 UART Alt.2 TIMER 1 Alt.2 TIMER 3 Alt.2 TIMER 4 Alt.2 DEBUG OBSSEL P0 P1 6 0 7 A7 A6 A5 A4 A3 A2 A1 A0 5 4 3 2 1 7 6 5 4 3 2 1 0 2 P2 1 0 O
-
+
-
+
C SS MO MI RT CT TX RX MI MO C SS RX TX RT CT 3 2 1 0 4 4 3 MO MI C SS TX RX RT CT MI MO C SS RX TX RT CT 0 1 0 1 0 5 4 3 2 1 1 1 2 0 0 0 DC DD Table 3:Peripheral I/O Pin Mapping Bluegiga Technologies Oy Preliminary information subject to change Page 9 of 27 Electrical Characteristics 3 3.1 Absolute Maximum Ratings Rating Storage Temperature AVDD,DVDD, VDD_USB Other Terminal Voltages Min
-40
-0.4 Max 85 3.6 VSS-0.4 VDD+0.4 3.2 Recommended Operating Conditions Table 4: Absolute Maximum Ratings Rating Operating Temperature Range AVDD, DVDD, VDD_USB Max 85 3.6
*) VDD_PA has an effect on the RF output power. Min
-40 2.0 Unit C V V Unit C V Table 5: Recommended Operating Conditions 3.3 Antenna characteristics The antenna radiation pattern is depends on the mother board layout. Following characteristics are measured from a test board based on the layout guide given in chapter 4. Efficiency 33% (-4.8 dB) Peak gain 0 dBi Bluegiga Technologies Oy Preliminary information subject to change Page 10 of 27 Figure 2: Radiation pattern of BLE112, top view Figure 3: Radiation pattern of BLE112, front view Bluegiga Technologies Oy Preliminary information subject to change Page 11 of 27 Figure 4: Radiation pattern of BLE112, side view Bluegiga Technologies Oy Preliminary information subject to change Page 12 of 27 Physical Dimensions Figure 5: Physical dimensions and pinout (top view) 18.10mm a n n e t n A U.fl m m 5 0 2 1
. Figure 6: Physical dimensions (top view) 2.1mm 18.1mm Figure 7: Physical dimensions (side view) 2.3mm Bluegiga Technologies Oy Preliminary information subject to change Page 13 of 27 Figure 8: Recommended land pattern for BLE112-A and BLE112-E Bluegiga Technologies Oy Preliminary information subject to change Page 14 of 27 4 Design Guidelines 4.1 General Design Guidelines BLE112 can be used directly with a coin cell battery. Due to relatively high internal resistance of a coin cell battery it is recommended to place a 100uF capacitor in parallel with the battery. The internal resistance of a coin cell battery is initially in the range of 10 ohms but the resistance increases rapidly as the capacity is used. Basically the higher the value of the capacitor the higher is the effective capacity of the battery and thus the longer the life time for the application. The minimum value for the capacitor depends on the end application and the maximum transmit power used. The leakage current of a 100uF capacitor in in the range of 0.5 uA to 3 uA and generally ceramic capacitors have lower leakage current than tantalum or aluminum electrolytic capacitors. Optionally TIs TPS62730 can be used to reduce the current consumption during TX/RX and data processing stages. TPS62730 is an ultra low power DC/DC converter with by-pass mode and will reduce the current consumption during transmission nominally by ~20% when using 3V coin cell battery. A ferrite bead is recommended to be used to filter any excessive noise in the power supply lines to guarantee the radio performance. VBAT OPTIONAL DC/DC C10 2.2uF/10V/X5R P1_7/DCDC U5 3 VIN 5 ON/BYP D N G TPS62730 4 SW VOUT STAT 2 6 1 L1 2.2H20%, 130mA, 0.43ohm C11 2.2uF/10V/X5R C3 1uF/16V/X5R P2_2 P2_1 P1_7/DCDC C6 1uF/16V/X5R C15 100uF/6.3V/X5R U4 BATTERYHOLDER_SMD_CR2032 1 2 1 GND 2 AVDD 3 AVDD 4 P2_2 5 P2_1 6 P2_0 7 P1_7 8 P1_6 9 DVDD_USB 10 GND 11 USB+
12 USB-
13 P1_5 MOD2 BLE112-A GND RESET P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 30 29 28 27 26 25 24 23 22 RESET_N P2_2 RESET_N 2V...3V3_SW P2_1 J1 1 3 5 7 9 2 4 6 8 10 HEADER_2X5_SMD_1.27MM PROGRAMMING INTERFACE 4 _ 1 P 3 _ 1 P 2 _ 1 P 1 _ 1 P 0 _ 1 P 7
:
0 P D D V D D N G 4 1 5 1 6 1 7 1 8 1 9 1 0 2 1 2 C5 1uF/16V/X5R Figure 9: Example schematic for BLE112 with a coin cell battery L4 FB 1kohm CON-MINIUSB-SOCKET-SMD J10 VBUS D-
D+
NC GND 1 2 3 4 5 9 78 6 0 2 C R 5 X
/
V 3
. 6
/
F u 7 4
. 0 1 3 C R 5 X
/
V 0 1
/
F u 2
. 2 MCP1700T-3302E/T P1 3 VIN VOUT 2 D N G 1 2 3 C R 5 X
/
V 0 1
/
F u 2
. 2 1 GND 2 AVDD 3 AVDD 4 P2_2 5 P2_1 6 P2_0 7 P1_7 8 P1_6 9 DVDD_USB 10 GND 11 USB+
12 USB-
13 P1_5 MOD3 BLE112-A GND RESET P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 30 29 28 27 26 25 24 23 22 RESET C7 1uF/16V/X5R C9 1uF/16V/X5R 4 _ 1 P 3 _ 1 P 2 _ 1 P 1 _ 1 P 0 _ 1 P 7
:
0 P D D V D D N G 4 1 5 1 6 1 7 1 8 1 9 1 0 2 1 2 C8 1uF/16V/X5R R15 1.5K, 50V, 0.063W 2 1 R13 1 2 33R, 50V, 0.063W R14 1 2 33R, 50V, 0.063W C127 47pF/50V/C0G C128 47pF/50V/C0G Figure 10: Example schematic for BLE112 with USB Bluegiga Technologies Oy Preliminary information subject to change Page 15 of 27 4.2 Layout Guide Lines Use good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog signal traces. If using overlapping ground planes use stitching vias separated by max 3 mm to avoid emission from the edges of the PCB. Connect all the GND pins directly to a solid GND plane and make sure that there is a low impedance path for the return current following the signal and supply traces all the way from start to the end. A good practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to supply voltage planes and traces and route all the signals on top and bottom layers of the PCB. This arrangement will make sure that any return current follows the forward current as close as possible and any loops are minimized. Signals GND Power Signals Figure 11: Typical 4-layer PCB construction Overlapping GND layers without GND stitching vias Overlapping GND layers with GND stitching vias shielding the RF energy Figure 12: Use of stitching vias to avoid emissions from the edges of the PCB 4.3 BLE112-A Layout Guide For optimal performance of the antenna place the module at the corner of the PCB as shown in the figure 13. Do not place any metal (traces, components, battery etc.) within the clearance area of the antenna. Connect all the GND pins directly to a solid GND plane. Place the GND vias as close to the GND pins as possible. Use good layout practices to avoid any excessive noise coupling to signal lines or supply voltage lines. Avoid placing plastic or any other dielectric material closer than 5 mm from the antenna. Any dielectric closer than 5 mm from the antenna will detune the antenna to lower frequencies. Bluegiga Technologies Oy Preliminary information subject to change Page 16 of 27 T Figure 13: Recommended layout for BLE112-A 4.4 BLE112-N Layout Guide Use 50 ohm transmission line to trace the signal from RF pin to an external RF connector. Figure 14 shows a layout example for BLE112-N with an external SMA connector. Boardedge GNDcontactforthe RFtrace 50ohmtrace GNDstitchingvias separatedbymax3mm Figure 14: Example layout for BLE112-N Bluegiga Technologies Oy Preliminary information subject to change SMAconnector Page 17 of 27 A transmission line impedance calculator, such as TX-Line made by AWR, can be used to approximate the dimensions for the 50 ohm transmission line. Figure 15 shows an example for two different 50 ohm transmission lines. CPWGround W=0.15mm G=0.25mm RFGROUND h=0.076mm GNDstitchingvias MICROSTRIP W=1.8mm h=1mm RFGROUND Prepreg,r =3.7 RFGROUND FR4,r =4.6 FR4,r =4.6 RFGROUND Figure 15: Example cross section of two different 50 ohm transmission line Bluegiga Technologies Oy Preliminary information subject to change Page 18 of 27 5 Soldering Recommendations BLE112 is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations. Bluegiga Technologies will give following recommendations for soldering the module to ensure reliable solder joint and operation of the module after soldering. Since the profile used is process and layout dependent, the optimum profile should be studied case by case. Thus following recommendation should be taken as a starting point guide.
- Refer to technical documentations of particular solder paste for profile configurations
- Avoid using more than one flow.
- Reliability of the solder joint and self-alignment of the component are dependent on the solder volume. Minimum of 150m stencil thickness is recommended.
- Aperture size of the stencil should be 1:1 with the pad size.
- A low residue, no clean solder paste should be used due to low mounted height of the component. Bluegiga Technologies Oy Preliminary information subject to change Page 19 of 27 6 Block diagram BLE112 is based on TIs CC2540 chip. Embedded 32 MHz and 32.678 kHz crystals are used for clock generation. Matched balun and low pass filter provide optimal radio performance with extremely low spurious emissions. Small ceramic chip antenna gives good radiation efficiency even when the module is used in layouts with very limited space. I/O I
/
O c o n t r o l l e r 32MHz XTAL 32.768 kHzXTAL 2V 3.6V Reset Clock Voltageregulator Reset Debuginterface Poweronreset 8051CPUcoreandmemoryarbitrator Analogcomparator IRQcontroller DMA CC2540 SRAM Flash OPAMP ADC USB USART0 USART1 TIMER1 TIMER2 TIMER3 TIMER4 Radioarbiter Radioregisters Linklayerengine SRAM Demodulator Synth Modulator Receive Frequency synthetisizer Transmit Balun+
LPF Ant Figure 16: Simplified block diagram of BLE112 CPU and Memory The 8051 CPU core is a single-cycle 8051-compatible core. It has three different memory access buses (SFR, DATA, and CODE/XDATA), a debug interface, and an 18-input extended interrupt unit. The memory arbiter is at the heart of the system, as it connects the CPU and DMA controller with the physical memories and all peripherals through the SFR bus. The memory arbiter has four memory-access points, access of which can map to one of three physical memories: an SRAM, flash memory, and XREG/SFR registers. It is responsible for performing arbitration and sequencing between simultaneous memory accesses to the same physical memory. Bluegiga Technologies Oy Preliminary information subject to change Page 20 of 27 The SFR bus is a common bus that connects all hardware peripherals to the memory arbiter. The SFR bus also provides access to the radio registers in the radio register bank, even though these are indeed mapped into XDATA memory space. The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The SRAM is an ultralow-power SRAM that retains its contents even when the digital part is powered off (power modes 2 and 3). The 128/256 KB flash block provides in-circuit programmable non-volatile program memory for the device, and maps into the CODE and XDATA memory spaces. Peripherals Writing to the flash block is performed through a flash controller that allows page-wise erasure and 4-bytewise programming. A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA memory space, and thus has access to all physical memories. Each channel (trigger, priority, transfer mode, addressing mode, source and destination pointers, and transfer count) is configured with DMA descriptors that can be located anywhere in memory. Many of the hardware peripherals (AES core, flash controller, USARTs, timers, ADC interface, etc.) can be used with the DMA controller for efficient operation by performing data transfers between a single SFR or XREG address and flash/SRAM. Each CC2540 contains a unique 48-bit IEEE address that can be used as the public device address for a Bluetooth device. Designers are free to use this address, or provide their own, as described in the Bluetooth specification. The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of which is associated with one of four interrupt priorities. I/O and sleep timer interrupt requests are serviced even if the device is in a sleep mode (power modes 1 and 2) by bringing the CC2540 back to the active mode. The debug interface implements a proprietary two-wire serial interface that is used for in-circuit debugging. Through this debug interface, it is possible to erase or program the entire flash memory, control which oscillators are enabled, stop and start execution of the user program, execute instructions on the 8051 core, set code breakpoints, and single-step through instructions in the code. Using these techniques, it is possible to perform in-circuit debugging and external flash programming elegantly. The I/O controller is responsible for all general-purpose I/O pins. The CPU can configure whether peripheral modules control certain pins or whether they are under software control, and if so, whether each pin is configured as an input or output and if a pullup or pulldown resistor in the pad is connected. Each peripheral that connects to the I/O pins can choose between two different I/O pin locations to ensure flexibility in various applications. The sleep timer is an ultra low power timer that uses an external 32.768-kHz crystal oscillator. The sleep timer runs continuously in all operating modes except power mode 3. Typical applications of this timer are as a real-
time counter or as a wake-up timer to exit power modes 1 or 2. A built-in watchdog timer allows the CC2540 to reset itself if the firmware hangs. When enabled by software, the watchdog timer must be cleared periodically; otherwise, it resets the device when it times out. Timer 1 is a 16-bit timer with timer/counter/PWM functionality. It has a programmable prescaler, a 16-bit period value, and five individually programmable counter/capture channels, each with a 16-bit compare value. Each of the counter/capture channels can be used as a PWM output or to capture the timing of edges on input signals. It can also be configured in IR generation mode, where it counts timer 3 periods and the output is ANDed with the output of timer 3 to generate modulated consumer IR signals with minimal CPU interaction. Timer 2 is a 40-bit timer used by the Bluetooth low energy stack. It has a 16-bit counter with a configurable timer period and a 24-bit overflow counter that can be used to keep track of the number of periods that have transpired. A 40-bit capture register is also used to record the exact time at which a start-of-frame delimiter is received/transmitted or the exact time at which transmission ends. There are two 16-bit timer-compare registers and two 24-bit overflow-compare registers that can be used to give exact timing for start of RX or TX to the radio or general interrupts. Bluegiga Technologies Oy Preliminary information subject to change Page 21 of 27 Timer 3 and timer 4 are 8-bit timers with timer/counter/PWM functionality. They have a programmable prescaler, an 8-bit period value, and one programmable counter channel with an 8-bit compare value. Each of the counter channels can be used as PWM output. USART 0 and USART 1 are each configurable as either an SPI master/slave or a UART. They provide double buffering on both RX and TX and hardware flow control and are thus well suited to high-throughput full-duplex applications. Each USART has its own high-precision baud-rate generator, thus leaving the ordinary timers free for other uses. When configured as SPI slaves, the USARTs sample the input signal using SCK directly instead of using some oversampling scheme, and are thus well-suited for high data rates. The AES encryption/decryption core allows the user to encrypt and decrypt data using the AES algorithm with 128-bit keys. The AES core also supports ECB, CBC, CFB, OFB, CTR, and CBC-MAC, as well as hardware support for CCM. The ADC supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30-kHz to 4-kHz, respectively. DC and audio conversions with up to eight input channels (I/O controller pins) are possible. The inputs can be selected as single-ended or differential. The reference voltage can be internal, AVDD, or a single-ended or differential external signal. The ADC also has a temperature-sensor input channel. The ADC can automate the process of periodic sampling or conversion over a sequence of channels. The operational amplifier is intended to provide front-end buffering and gain for the ADC. Both inputs as well as the output are available on pins, so the feedback network is fully customizable. A chopper-stabilized mode is available for applications that need good accuracy with high gain. The ultralow-power analog comparator enables applications to wake up from PM2 or PM3 based on an analog signal. Both inputs are brought out to pins; the reference voltage must be provided externally. The comparator output is connected to the I/O controller interrupt detector and can be treated by the MCU as a regular I/O pin interrupt. RF front end RF front end includes combined matched balun and low pass filter, and ceramic chip antenna with matching network. Optimal matching combined with effective low pass filter provides extremely low in-band spurious emissions and harmonics. Optionally as a module assembly variant RF can be traced either to an embedded u.fl connector or to the RF pin of the module. Bluegiga Technologies Oy Preliminary information subject to change Page 22 of 27 7 Certifications BLE112 is compliant to the following specifications. 7.1 Bluetooth BLE112 Bluetooth low energy module is Bluetooth qualified and listed as a controller subsystem and it is Bluetooth compliant to the following profiles of the core spec version v.4.0:
RF PHY HCI LL The maximum antenna gain specified for BLE112 is 2.3 dBi. Bluetooth qualification is valid for any antenna with gain less than 2.3 dBi. 7.2 FCC and IC This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) this device may not cause harmful interference, and
(2) this device must accept any interference received, including interference that may cause undesired operation. FCC RF Radiation Exposure Statement:
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End users must follow the specific operating instructions for satisfying RF exposure compliance. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. IC Statements:
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. If detachable antennas are used:
Bluegiga Technologies Oy Preliminary information subject to change Page 23 of 27 This radio transmitter (identify the device by certification number, or model number ifCategory II) has been approved by Industry Canada to operate with the antenna types listed below with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. See table 7 for the approved antennas for BLE112. OEM Responsibilities to comply with FCC and Industry Canada Regulations The BLE112 module has been certified for integration into products only by OEM integrators under the following condition:
The transmitter module must not be co-located or operating in conjunction with any other antenna or transmitter. As long as the condition above is met, further transmitter testing will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). IMPORTANT NOTE: In the event that these conditions can not be met (for certain configurations or co-
location with another transmitter), then the FCC and Industry Canada authorizations are no longer considered valid and the FCC ID and IC Certification Number can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC and Industry Canada authorization. End Product Labeling The BLE112 module is labeled with its own FCC ID and IC Certification Number. If the FCC ID and IC Certification Number are not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. In that case, the final end product must be labeled in a visible area with the following:
Contains Transmitter Module FCC ID: QOQBLE112 Contains Transmitter Module IC: 5123A-BGTBLE112 or Contains FCC ID: QOQBLE112 Contains IC: 5123A-BGTBLE112 The OEM of the BLE112 module must only use the approved antenna(s) listed in table 7, which have been certified with this module. The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product. Dclaration dIC :
Ce dispositif est conforme aux normes RSS exemptes de licence dIndustrie Canada. Son fonctionnement est assujetti aux deux conditions suivantes : (1) ce dispositif ne doit pas provoquer de perturbation et (2) ce Bluegiga Technologies Oy Preliminary information subject to change Page 24 of 27 dispositif doit accepter toute perturbation, y compris les perturbations qui peuvent entraner un fonctionnement non dsir du dispositif. Selon les rglementations dIndustrie Canada, cet metteur radio ne doit fonctionner quavec une antenne dune typologie spcifique et dun gain maximum (ou infrieur) approuv pour lmetteur par Industrie Canada. Pour rduire les ventuelles perturbations radiolectriques nuisibles dautres utilisateurs, le type dantenne et son gain doivent tre choisis de manire ce que la puissance isotrope rayonne quivalente
(P.I.R.E.) nexcde pas les valeurs ncessaires pour obtenir une communication convenable. Si des antennes amovibles sont utilises :
Cet metteur radio (identifier le dispositif laide de son numro de certification ou de son numro de modle sil appartient la Catgorie II) a t approuv par Industrie Canada pour fonctionner avec les types dantenne numrs ci-dessous, avec le gain admissible maximum et limpdance dantenne requise pour chaque type dantenne indiqu. Les types dantennes qui ne figurent pas dans cette liste ont un gain suprieur au gain maximum indiqu pour ce type ; il est donc strictement dfendu de les utiliser avec ce dispositif. Consulter le tableau 7 pour dcouvrir les antennes approuves pour BLE112. Responsabilits des OEM quant la conformit avec les rglementations de FCC et dIndustrie Canada Le module BLE112 a t certifi pour tre intgr des produits fabriqus uniquement par les intgrateurs OEM dans les conditions suivantes :Le module de lmetteur ne doit pas tre situ prs dune autre antenne ou dun autre metteur ni ou fonctionner conjointement avec ceux-ci. Dans la mesure o cette condition est observe, il ne sera pas ncessaire de soumettre lmetteur des essais supplmentaires. Cependant, lintgrateur OEM est charg de tester son produit final pour sassurer quil respecte toutes les autres exigences de conformit requises avec ce module install (par exemple :
missions du dispositif numrique, exigences priphriques de lordinateur, etc.). REMARQUE IMPORTANTE : En cas dinobservance de ces conditions (en ce qui concerne certaines configurations ou lemplacement du dispositif proximit dun autre metteur), les autorisations de FCC et dIndustrie Canada ne seront plus considres valables et lidentification de FCC et le numro de certification dIC ne pourront pas tre utiliss sur le produit final. Dans ces cas, lintgrateur OEM sera charg dvaluer nouveau le produit final (y compris lmetteur) et dobtenir une autorisation indpendante de FCC et dIndustrie Canada. tiquetage du produit final Le module BLE112 est tiquet avec sa propre identification FCC et son propre numro de certification IC. Si lidentification FCC et le numro de certification IC ne sont pas visibles lorsque le module est install lintrieur dun autre dispositif, la partie externe du dispositif dans lequel le module est install devra galement prsenter une tiquette faisant rfrence au module inclus. Dans ce cas, le produit final devra tre tiquet sur une zone visible avec les informations suivantes :
Contient module metteur identification FCC : QOQBLE112 Contient module metteur IC : 5123A-BGTBLE112 ou Contient identification FCC : QOQBLE112 Contient IC : 5123A-BGTBLE112 Bluegiga Technologies Oy Preliminary information subject to change Page 25 of 27 LOEM du module BLE112 ne doit utiliser que la ou les antennes approuves numres dans le tableau 7, qui ont t certifies avec ce module. Dans le guide dutilisation du produit final, lintgrateur OEM doit sabstenir de fournir des informations lutilisateur final portant sur les procdures suivre pour installer ou retirer ce module RF ou pour changer les paramtres RF. 7.3 CE BLE112 is in conformity with the essential requirements and other relevant requirements of the R&TTE Directive (1999/5/EC). The product is conformity with the following standards and/or normative documents. EMC (immunity only) EN 301 489-17 V.1.3.3 in accordance with EN 301 489-1 V1.8.1 Radiated emissions EN 300 328 V1.7.1 7.4 Qualified Antenna Types for BLE112-E and BLE112-N This device has been designed to operate with a standard 2.14 dBi dipole antenna. Any antenna of the same type and the same or less gain can be used without additional application to FCC. Table 7 lists approved antennas for BLE112. Any approved antenna listed in table 7 can be used directly with BLE112 without any additional approval. Any antenna not listed in table 7 can be used with BLE112 as long as detailed information from that particular antenna is provided to Bluegiga for approval. Specification of each antenna used with BLE112 will be filed by Bluegiga. Please, contact support@bluegiga.com for more information. Item Manufacturer Manufacturerspartnumber Pulse W1030 LinxTechnologiesInc ANT2.4CWCTSMA EAD Antenova Litecon EA79A B4844/B6090 CARATR187001 1 2 3 4 5 Specifie dGain
(dBi) 2dBi 2dBi 2dBi 2dBi 2dBi Measure dGain
(dBi) 1 1.3 0.4 1.4 0.8 MeasureTotal Efficiency(%) 7080 77 60 7682 6070 Table 6: Approved Antennas For BLE112-E and BLE112-N Bluegiga Technologies Oy Preliminary information subject to change Page 26 of 27 8 Contact Information Sales:
Technical support:
sales@bluegiga.com support@bluegiga.com http://techforum.bluegiga.com orders@bluegiga.com Orders:
WWW:
Head Office / Finland:
Postal address / Finland:
Sales Office / USA:
Sales Office / Hong-Kong:
www.bluegiga.com www.bluegiga.hk Phone: +358-9-4355 060 Fax: +358-9-4355 0660 Sinikalliontie 5A 02630 ESPOO FINLAND P.O. BOX 120 02631 ESPOO FINLAND Phone: +1 770 291 2181 Fax: +1 770 291 2183 Bluegiga Technologies, Inc. 3235 Satellite Boulevard, Building 400, Suite 300 Duluth, GA, 30096, USA Phone: +852 3182 7321 Fax: +852 3972 5777 Bluegiga Technologies, Inc. 19/F Silver Fortune Plaza, 1 Wellington Street, Central Hong Kong Bluegiga Technologies Oy Preliminary information subject to change Page 27 of 27
This product uses the FCC Data API but is not endorsed or certified by the FCC