The UI and DSP tools are available for download from the Microchip web site at. www.microchip.com/BM FIGURE 1-1:
APPLICATION USING BM64 MODULE 7 ia Microphone 1s2064GM pha, UART Crystal Aux_in FIGURE 1-2: SOUNDBAR AND SUBWOOFER APPLICATIONS USING BM64 MODULE Subwoofer FIGURE 1-3:
SOUNDBAR AND SUBWOOFER APPLICATIONS USING BM64 MODULE AND SMARTPHONE smanchone Soundbar
, Prater 4 sSubwooter FIGURE 1-4:
SOUNDBAR AND SUBWOOFER APPLICATIONS USING BM64 MODULE AND SMARTPHONE smanchone Soundbar
, Prater 4 sSubwooter TABLE 1-1: BM62/64 KEY FEATURES Feature BM64CLASS2 | BM64CLASS1 Application Multi-speaker/Soundbar/Subwoofer Stereo/mono Stereo Stereo Pin count 43 43 Dimensions (mm2) 15x 32 15x32 PCB antenna Yes Yes Tx power (typical) 2dBm 15 dBm Audio DAC output 2 Channel 2 Channel DAC (single-ended) SNR at 2.8V (dB) -98 -98 DAC (capless) SNR at 2.8V (dB) -98 -98 ADC SNR at 2.8V (dB) -92 -92 12S digital interface Yes Yes Analog AUX-In Yes Yes Mono MIC 1 1 Extemal audio amplifier interface Yes Yes UART Yes Yes USB Yes Yes LED driver 2 2 Internal DC-DC step down regulator Yes Yes DC 5V adapter input Yes Yes Battery charger (350 mA max) Yes Yes ADC for thermal charger protection Yes Yes Undervoltage protection (UVP) Yes Yes GPIO 12 12 Button support 6 6 NFC (triggered by external NFC) Yes Yes EEPROM Yes Yes Feature BM64 CLASS 2 BM64 CLASS 1 Customized voice prompt 8K Sampling Rate, Stored in EEPROM with approximately 800 bytes/second Multitone| Yes Yes DSP sound effect Yes Yes BLE Yes Yes Bluetooth profiles HFP. 1.6 1.6 AVRCP 16 1.6 A2DP 13 13 HSP 12 1.2 SPP. 1.2 1:2 FIGURE 1-5: BM64 MODULE PIN DIAGRAM DRO 4 43 GND RFSO 2 42 P27 SCLKO 3 41 P20 oro 4 40 P02 AOHPR 5 39 P36 AOHPM. 6 38 P33 AOHPL 7 37 P34 MIC_N1 8 36 P30 micP1 9 35 POS mic_Bias 10 34 OP AIR 14 33 DM AIL 12 32 EAN RST.N 13, 31 PO_0 GND 14 30 P36 P12 15 29 P3_T P1_3 16 28 LED1 PO_4 17 27 LED2 SeRnNRaee ggozzere reEaiaeae eoS8ssgua 2zr- "aks ae BM64 MODULE PIN DESCRIPTION Pin No Pin Type Pin Name Description 1 i) DRO _ [IPS interface: digital left/right data 2 vO RFSO__ |S interface: leftiright clock 3 vO SCLKO__|/S interface: bit clock 4 i) DTO _|[?S interface: digital left/right data 5 oO AOHPR __[Right-channel, analog headphone output 6 oO AOHPM [Headphone common mode output/sense input 7 0 AOHPL _ |Left-channel, analog headphone output 22 P BAT_IN | Battery input. Voltage range: 3.2V to 4.2V. When an external power supply is connected to the ADAP_IN pin, the BAT_IN pin can be left open if battery is not connected 23 P ADAP_IN _|5V power adapter input 24 P SYS_PWR_ [System power output derived from ADAP_IN or BAT_IN 25 P AMB_DET [Analog input for ambient temperature detection 26 1 MFB [+ Multi-Function Button and power-on key
+ UART RX_IND, active-high (used by host MCU to wakeup the Bluetooth system) 27 j LED2 [LED driver2 28 1 LED1 [LED driver 1 BM64 MODULE PIN DESCRIPTION (CONTINUED) Pin No Pin Type Pin Name Description 29 vo P37 Configurable control or indication pin
(Intemally pulled-up, if configured as an input) UART TX_IND, active-low (used by Bluetooth system to wakeup the host MCU) 30 P35 Configurable control or indication pin
(Internally pulled-up, if configured as an input)
+ Slide switch detector, active-high 31 PO_0 Configurable control or indication pin
(Internally pulled-up, if configured as an input)
+ Slide switch detector, active-high, Out_Ind_0 32 EAN External address bus negative System configuration pin along with the P2_0 and P2_4 pins used to set the module in any one of these modes:
+ Application mode (for normal operation)
+ Test mode (to change EEPROM values)
+ Write Flash mode (to load a new firmware into the mod-
ule) refer to Table 5-1 Flash: must be pulled-down with 4.7 kOhm to GND. 33 vo. DM Differential data-minus USB 34 vo DP Differential data-plus USB vo POS Configurable control or indication pin
(Internally pulled-up, if configured as an input) Volume-down key (default), active-low 36 P30 Configurable control or indication pin
(Internally pulled-up, if configured as an input) AUX-In detector, active-low 37 P34 Configurable control or indication pin
(Internally pulled-up, if configured as an input) REV key (default), active-low 38 P33 Configurable control or indication pin
(Internally pulled-up, if configured as an input) FWD key (default), active-low 39 P36 Configurable control or indication pin
(Internally pulled-up, if configured as an input) Multi-SPK Master/Slave mode control (FW dependent) 40 PO_2 Configurable control or indication pin
(Internally pulled-up, if configured as an input) Play/Pause key (default) 41 P20 System configuration pin along with P2_4 and EAN pins used to set the module in any one of the following modes:
+ Application mode (for normal operation)
+ Test mode (to change EEPROM values)
+ Write Flash mode (to load a new firmware into the mod-
ule), refer to Table 5-1 42 P27 Configurable control or indication pin
(Intemally pulled-up, if configured as an input) Volume-up key (default), active-low 43 GND Ground reference FIGURE 2-1: SPEECH SIGNAL PROCESSING mee ea ema ma Heb a i SSansac }+H REG Rese] fre} TA tipo v FIGURE 2-2: AUDIO SIGNAL PROCESSING BM62/64 Antenna DSP wou LL secmne Loe ]+f wes | fone |}
Decoders Effect +| TTS TT] amp Foe The DSP tool and /S206X DSP Applica-
tion Note document, are available for download from the Microchip web site at www.microchip.com/BM64. Note: The internal codec supports 16-bit resolu-
tion, by adding trailing zeros in LSBs 24-bit IS port requirements can be met FIGURE 2-3: CODEC DAC DYNAMIC RANGE Single16Q_CH1 Single16Q_CH2 RMS(dBv) 8 Capless16Q_CH1 Capless16Q_CH2 tt tt
-100 -90 -80 -70 -60 -50 -40 -30 -20 -10 O Input power (dBFS) Note: The data corresponds to the 16 Ohm load with 2.8V operating voltage at +25C room temperature FIGURE 2-4:
CODEC DAC THD+N VERSUS INPUT POWER THD+N (dBV) Note:
0
-10
-20
-30 497 Single16Q_CH1
-50 + Single160_CH2 s60T Capless160Q_CH1
-70 a = Capless16Q_CH2 390; a a
~60 -55 -50 -45 -40 -35 -30 -25 -20-15-10 -5 O Input power (dBFS) The data corresponds to the 16 Ohm load with 2.8V operating voltage at +25C room temperature Smete [eaves]
Wexatenan [re]
sumelerres [iow]
Funct Ch dBV 100) 1k Frequency/ Hz Pe ls =
ek Teminst irk Taranto Gen rena She Wang tae | aworae | comet |/ water [tom [feemenie Ce FIGURE 2-6: CODEC DAC FREQUENCY RESPONSE (SINGLE-ENDED MODE) im Rotide Schwarz Audio Analyzer UPY:
eranere foscoms Seto [eaveon x]
a wordengn [See =
Semele Freq [ious]
ok Rata Foxmat 6 a
= s
= 2 6 6 2 8 2 2
[Fo0000
[om P__ : 1k Fao axes Frequency! Hz
[rere 5]
Me Me Z iki Terminated fev Terminated Gon Rueing Sweep Watihg Restart Mina Trace | Autoseaie | cursor | Marker | zoom _| Reset (|
Note: The DAC frequency response corresponds to single-ended mode with a 47 wF DC block capacitor. FIGURE 2-7: ANALOG SPEAKER OUTPUT CAPLESS MODE BM62/64 k AOHPR J
~ AOHPM AOHPL ie 16/32 Ohm Speaker FIGURE 2-8: ANALOG SPEAKER OUTPUT SINGLE-ENDED MODE Ke BM62/64 AOHPR N Audio Amplifier FIGURE 4-1:
BATTERY CHARGING CURVE CY Voltage 4.20 Recharge Voltage aly CC current 0.5 CC Voltage 3.0 Recharge current 0.25 Precharge Voltage 25v Precharge Current ou Reviving Current 2mA Reviving | precharge Mode Mode Constant Voltage Mode Recharge Mode FIGURE 4-2: LED DRIVER BM62/64 SYS_PWR 4
=a LED1 Thermistor must be placed close to the battery in the user application for accurate temperature measurements and to enable thermal shutdown feature. FIGURE 4-3: AMBIENT DETECTION VDD_IO R1 1M/1%
AMB_DET cl a 1pF,16V 7 vW R2 86.6K/1%
TR1 100K Thermistor: Murata NCP15WF104F FIGURE 5. HOST MCU INTERFACE OVER UART MCU MCU_WAKE UP. UART_RX UART_TX BT_WAKE UP UART Interface ns UART Interface rs BM62/64 PO_0 (for BM62) P3_7 (for BM64) HCI_TXD HCI_RXD MFB The UART Command set tool (SPKCom-
mandSetTool v160.xx) and UART_Com-
mandSet document are available for download from the Microchip web site at:
www.microchip.com/BM64. FIGURE 5-2:
POWER-ON/OFF SEQUENCE BAT_IN SYS_PWR MCU state MFB (PWR) BK_OUTILDO31_VO RST.N MCU sends UART command
(6M64 UART_RX) BM62I64 response UART state
(M64 UART_TX) ie pe
See = Se ei 400 mp et. L e jo ol om
| Koop al B64 1 ae ak seco connection to. _ ies aa eae x |
Poworen AK | ack |
(See Figure 5-3) (See Figure 5-4) Set Power-on Directly boot BIMG4 disconnect and auto power-off FIGURE 5-3: TIMING SEQUENCE OF RX INDICATION AFTER POWER-ON STATE Resume 32 kHz mode MFB pulse must be longer than the UART command slot time 150 ms +
MFB (PWR) MCU sends UART command +
UART Command 2ms 2ms Enter 32 kHz mode 1ms FIGURE 5-4: TIMING SEQUENCE OF POWER-OFF STATE BM62/64 sends power-off ACK BAT_IN +4V MFB (PWR) MCU sends RST_N BK_OUT LD031_vo UART bus 28 Note 1: EEPROM clock = 100 KHz. 2: Fora byte write: 0.01 ms x 22 clock x 2= 640 us. 3: It is recommended to have ramp-down time more than 640 us during the power-off sequence to ensure safe operation of the device. FIGURE 5-5: TIMING SEQUENCE OF POWER-ON (NACK) BATIN 4 SYS_PWR ee Poveran MCU state veal 400 me 200 ms sl ainjle
MFB (PWR) +
BK_OUTILDO31_VO yt toms were ne MCU sends UART command e leon
(8M62164 UART_RX) me
'BM62/6 rasponse UART state s
(eMezie4 UART Tx) 7 Rety, if ACKis ot received Set Power-on Directly" boot Maxim: 5 times (15) FIGURE 5-7: TIMING SEQUENCE OF POWER DROP PROTECTION Power i BAT_IN+4V Reset IC RST_N from Reset IC <1] {our von) GND MCU Reset Note 1: Itis recommended to use the battery to provide the power supply at BAT_IN in to the module, 2: fan external power source or a power adapter is utlized to provide power to the module (ADAP_IN), it is recommended to use a voltage supervisor IC. 3: The Reset IC output pin, RST_N, must be Open drain" with delay time = 10 ms and the recommended part is G691L293T73, FIGURE 5-8:
BM64 MODULE IN IfS MASTER MODE External DSP/
Codec BCLK DACLRC ADCDAT |_________+}
DACDAT |<__________+
BM64 SCLKO RFSO DRO DTO Note: The EEPROM and Flash tools are avail able for download from the Microchip web www.microchip.com/BM64, FIGURE 5-15:
BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION EOP
RELL K A DRO RFSO SCLKO oT AQHPR AOQHPM AOHPL MICN4 micP1 8 2 z io p lalo!atala halo MIC_BIAS BUBBRIVy eeds53 MICBIAS DP AIR oM ob. AIL EAN S54 BM64 RST_N GND
= = P12
= P13 Poa 47w10v a 3. My CODEC vo PWR(MFB) syYs_PwR AMB_DET ADAP_IN OADAP_IN FIGURE 5-16:
BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION HCI_RXD 1 amo HCT_TxD 1 sone
~ TPS, P20 a ae ani EAN a ma tei a sa a RESET 9 +1 S50N_ mai MIC1 T. P11 TEST POINTs 0 1 Mic.Nt GPIO Description AORPLIN TP, ; MFB | UART_RX_IND; MFB ADAP +. J TP4 P0_2 | PLAY / PAUSE GND ot I BATLN as P27 | VOL+
BAT+ 1 J an Po_5 | VOL-
a ! Po_0 | SLIDE SWITCH woe P0_4 | AMP_EN; NFC TPs vpp_to. 1 __| P3_0 | AUXIN Detection P14 SPEAKER ret ee P3_1 | REV OUTPUT = 1 AoHPL _ P3_3 | FWD P3_7 | UART_TX_IND P1_5 | AMP_EN; SLIDE SWITCH Single / Double setting P3_6 | Single / Double setting P2_0 | System Configuration EAN | System Configuration FIGURE 5-17:
BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION AMB_DET vopIo R23 A196 AMB_DET Ke R28 cw Bskev1%
tuiey NCP15WF104F03 MEB RESET
* 2 = OSYS_PWR fi Z i|trl2 NEB a) EE [4
* > Bi wi owe Dea OW-TACT R19 Sw-TacT KIA a S MMBT3904 apa No PLAY /PAUS Po 2. swe 4 3 C58
* : la 1sprsov.
SWoTACT REV FWD pig 2 sw ews 4 3 i ne he ae x oS SWoTACT SWATACT VoL- VoL+t pat ewe sw?
4 3 4 =rcer
= 2| tes * 3 18p/50V x *
WAAC SWATACT STEREO AUX LINE INPUT Dt * ca
#30 Low Active Se Sreosr2 2 RE RaiOpsI foc Line In Detect ie =
outey I we e in 2 A a aw | 10 P KG ria] Sawiov P-seero-si2s toe 22 Chev 03 speoste Sreoor,f Smo erop/s0v STEREO SPK JACK Pe Pu-z001-sk 3 PKL emecmal PKR ot 2 2.28.30 2. 2W8.3V Re ik RT 1k 2 1 Mic elas mic PI Pit Ta 3 ca outustey TP3,_1 T zttersow Pa Mic Nt FIGURE 5-18: | BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION SYS_PWR SLIDE SWITCH al Pen a a swe |||
SW-1BIT vop_lo e 9
= 100K 7 ~RIT
> 10k a a RESERVE For BLUETOOTH DEBUG P20 1 ss 2. BAT_INC-ggqg,3-]
a ADAP_IN O-
[[ococooom]]
STS2301_s,2 SLIDE Sw ato s STS2306 MFB 3. Pis BLUE 101_2 A LeD2 vena 2 | Totunev rep Gi] |
UART CONTROL we
| pos x UART_RXD HCI_RXD 2 UART_TXD HCI-TXD ne RESET _n RSTN OG Audio AMP Enable ei RX_IND al TX_IND a 2
sige
= UP 1x8 nei nea Other NEC P04 tla spk Mops Ps 2| 8 SPK MODE P36 3 | 5 ae Fc ie pig sa 26 Ria Bye CHG/AUX-IN_Ind. P37 TAS RMB DET 8] 8
JP6 IP AB DC POWER SOURCE 7 UCB02SB3021-99R ADAP_IN 4 ?
z DM T 1 ES DP
= en =e otutev | tu/tev 125 INTERFACE Receive frame synchronization Transmit frame synchronization Serial Serial data Serial data transmit receive _ORO 1, BATTERY 4 a JP4 SUP 1x2 R233 RI 33 es RFSO1 2 clock _ SCLKO!
Dt nryrS 2 BM 12 eoop0com CONNECTOR BAT_IN g CR =H Ciy Oawiev | twtev er