| submitted | available | document details (if available) | source link |
|---|---|---|---|
| July 24 2023 | January 21 2024 |
| various | User Manual | Users Manual | 4.88 MiB | July 24 2023 / January 21 2024 | delayed release |
FG101-NA(FCC IDZMOFG101NA) Hardware Guide V1.1 Disclaimer This document serves as a guide for the use of products. Customers must design their products according to the information provided in the document. The Company shall not be liable for any damage caused by failure to comply with relevant operation or design specifications or safety rules. Due to product version upgrade or other reasons, the Company reserves the right to modify any information in this document at any time without prior notice and any responsibility. Unless otherwise agreed, all statements, information and suggestions in this document do not constitute any express or implied guarantee. Copyright Notice Copyright 2022 Fibocom Wireless Inc. All rights reserved. Unless specially authorized by the Company, the recipient of the documents shall keep the documents and information received confidential, and shall not use them for any purpose other than the implementation and development of this project. Without the written permission of the Company, no unit or individual shall extract or copy part or all of the contents of this document without authorization, or transmit them in any form. The Company has the right to investigate legal liabilities for any offense and tort in connection with violation of confidentiality obligations, or unauthorized use or malicious use of the said documents and information in other illegal forms. Trademark Statement The trademark is registered and owned by Fibocom Wireless Inc. Other trademarks, product names, service names and company names appearing in this document are owned by their respective owners. Contact Information Website: https://www.fibocom.com Address: 10/F-14/F, Block A, Building 6, Shenzhen International Innovation Valley, Dashi First Road, Xili Community, Xili Subdistrict, Nanshan District, Shenzhen Tel: 0755-26733555 Safety Instructions Do not operate wireless communication products in areas where the use of radio is not recommended without proper equipment certification. These areas include environments that may generate radio interference, such as flammable and explosive environments, medical devices, aircraft or any other equipment that may be subject to any form of radio interference. The driver or operator of any vehicle shall not operate wireless communication products while controlling the vehicle. Doing so will reduce the driver's or operator's control and operation of the vehicle, resulting in safety risks. Wireless communication devices do not guarantee effective connection under any circumstances, such as when the (U) SIM card is invalid or the device is in arrears. In an emergency, please use the emergency call function when the device is turned on, and ensure that the device is located in an area with sufficient signal strength. Contents Contents Change History .................................................................................................. 5 1 Foreword ......................................................................................................... 6 1.1 Document Description ............................................................................................... 6 1.2 Safety Instructions ........................................................................................................ 6 1.3 Waring ............................................................................................................................. 7 1.3.1 Important Notice to OEM integrators ............................................................... 7 1.3.2 FCC Statement ........................................................................................................ 9 2 Product Overview ......................................................................................... 12 2.1 Product Introduction ................................................................................................. 12 2.2 Product Specifications ............................................................................................... 12 2.2.1 Radio Frequency Features ................................................................................. 12 2.2.2 Other Key Features ............................................................................................. 13 2.3 Supported CA Combinations ................................................................................... 15 2.4 Functional Block Diagram ........................................................................................ 22 2.5 Evaluation Board ........................................................................................................ 24 3 Pin Definition ................................................................................................ 25 3.1 Pin Distribution .......................................................................................................... 25 3.2 Pin Function ................................................................................................................. 27 4 Electrical Characteristics ............................................................................. 37 4.1 Limit Voltage Range .................................................................................................. 37 4.1.1 Absolute Limit Voltage ........................................................................................ 37 4.1.2 Operating Limit Voltage ..................................................................................... 37 4.2 Power Consumption .................................................................................................. 38 5 Functional Interface ..................................................................................... 42 5.1 Power Supply .............................................................................................................. 42 5.1.1 Power Input ........................................................................................................... 43 5.1.2 Power Ouput ......................................................................................................... 44 5.2 Control Interface ......................................................................................................... 45 5.2.1 Power on/off .......................................................................................................... 46 Copyright Fibocom Wireless Inc. 1 Contents 5.2.1.1 Power-on .......................................................................................................... 46 5.2.1.2 Power-on Sequence ...................................................................................... 47 5.2.1.3 Power-off.......................................................................................................... 48 5.2.2 Reset ........................................................................................................................ 49 5.3 Network Status Indication Interface ...................................................................... 51 5.4 (U)SIM Card Interface ................................................................................................ 52 5.4.1 (U)SIM Pin Definition ........................................................................................... 53 5.4.2 (U)SIM Interface Circuit ...................................................................................... 53 5.4.3 (U)SIM Card Hot Plug ......................................................................................... 54 5.4.4 (U)SIM Design Requirements ........................................................................... 55 5.5 USB Interface ............................................................................................................... 56 5.5.1 USB Interface Circuit ........................................................................................... 56 5.5.2 USB Routing Rules .............................................................................................. 57 5.5.2.1 USB 2.0 Routing Rules ................................................................................. 57 5.5.2.2 USB 3.0 Routing Rules ................................................................................. 58 5.6 UART Interface and Application .............................................................................. 58 5.7 ADC Interface ............................................................................................................... 60 2 5.8 I C Interface ................................................................................................................ 61 5.9 PCM Digital Audio Interface..................................................................................... 61 5.9.1 PCM Interface Definition .................................................................................... 61 5.9.2 PCM Application Circuit ...................................................................................... 62 5.10 SDIO Interface ........................................................................................................... 62 5.10.1 SDIO Pin Definition ........................................................................................... 62 5.10.2 SDIO Interface Routing Rules ........................................................................ 63 5.10.3 SDIO Interface Application Circuit ................................................................. 64 5.11 SPI Interface .............................................................................................................. 64 5.12 PCIe Interface ............................................................................................................ 65 5.12.1 PCIe Routing Rules ........................................................................................... 66 5.12.2 PCIe Application Circuit .................................................................................... 67 5.13 GPIO Interface .......................................................................................................... 68 5.14 Flight Mode Control Interface .............................................................................. 69 Copyright Fibocom Wireless Inc. 2 Contents 5.15 Sleep/Wakeup Interface ......................................................................................... 70 6 RF Interface ................................................................................................... 71 6.1 Operating Bands ........................................................................................................ 71 6.2 Transmitting Power .................................................................................................... 72 6.3 Receiving Sensitivity ................................................................................................... 72 6.4 GNSS Receiving Performance ................................................................................. 74 6.5 Antenna indicators ..................................................................................................... 75 6.6 PCB Routing Design .................................................................................................. 75 6.6.1 Routing Rules ........................................................................................................ 75 6.6.2 Impedance Design .............................................................................................. 77 6.6.3 3W Principle .......................................................................................................... 77 6.6.4 Impedance Design for Four-layer Board ...................................................... 77 6.7 Main Antenna Design ................................................................................................ 79 6.7.1 External Antenna .................................................................................................. 79 6.7.2 Internal Antenna ................................................................................................... 80 6.7.2.1 Design Principle of Internal Antenna ....................................................... 80 6.7.2.2 Internal Antenna Classification .................................................................. 81 6.7.3 Surrounding Environment Design of Internal Antenna ............................ 86 6.7.3.1 Handling of Speaker ..................................................................................... 86 6.7.3.2 Handling of Metal Structural Parts ........................................................... 86 6.7.3.3 Handling of Battery ....................................................................................... 86 6.7.3.4 Location of Large Components in Antenna Area.................................. 87 6.7.4 Common Problems of Internal Antenna Overall Design ........................... 87 6.8 Diversity and MIMO Antenna Design ................................................................... 88 6.9 GNSS Antenna Design ............................................................................................... 89 6.10 Other Interfaces ....................................................................................................... 89 7 Thermal Design ............................................................................................ 90 8 Electrostatic Protection ............................................................................... 91 9 Structural Specifications ............................................................................. 92 9.1 Product Appearance ................................................................................................. 92 9.2 Structural Dimensions ............................................................................................... 92 Copyright Fibocom Wireless Inc. 3 9.3 PCB Pad and Stencil Design .................................................................................... 93 9.4 SMT ................................................................................................................................. 93 9.5 Packaging and Storage ............................................................................................. 93 Appendix A: Acronyms and Abbreviations .................................................. 94 Contents Copyright Fibocom Wireless Inc. 4 Change History Change History V1.1 (2022-09-15) Added band information and NON-PRO notes corresponding to CA band. V1.0 (2022-05-24) Initial version. Copyright Fibocom Wireless Inc. 5 1 Foreword 1 Foreword 1.1 Document Description This document describes the electrical characteristics, RF performance, dimensions and application environment, etc. of the FG101-NA wireless module. With the assistance of this document and other related documents, application developers can quickly understand the hardware functions of the FG101-NA module and develop product hardware. 1.2 Safety Instructions By following the safety guidelines below, you can ensure your personal safety and help protect the product and work environment from potential damage. Product manufacturers need to communicate the following safety instructions to end users. Fibocom Wireless does not assume any responsibility for the consequences caused by users' misuse because they do not comply with these safety rules. Road safety first! When you are driving, do not use any handheld mobile device even if it has a hand-free feature. Stop the car before making a call. Please turn off the mobile device before boarding. The wireless feature of the mobile device is not allowed on the aircraft to prevent interference with the aircraft communication system. Ignoring this note may result in flight safety issue or even violate the law. When in a hospital or health care facility, please be aware of restrictions on the use of mobile devices. Radio frequency interference may cause medical equipment to malfunction, so it may be necessary to turn off the mobile device. Copyright Fibocom Wireless Inc. 6 1 Foreword The mobile device does not guarantee that an effective connection can be made under any circumstances, for example, when there is no prepayment for the mobile device or (U)SIM is invalid. When you encounter the above situation in an emergency, please remember to use emergency calls, and ensure that your device is turned on and in an area with strong signal. Your mobile device receives and transmits RF signals when it is powered on. Your mobile device will receive and transmit RF signals when it is turned on. RF interference occurs when it is near a TV, radio, computer, or other electronic device. Keep mobile device away from flammable gases. Turn off the mobile device when you are near to gas stations, oil depots, chemical plants or explosive workplaces. There are potential safety hazards when operating electronic equipment in any potentially explosive area. 1.3 Waring 1.3.1 Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart Copyright Fibocom Wireless Inc. 7 1 Foreword B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed. Important Note notice that any deviation(s) from the defined parameters of the antenna trace, as described by the instructions, require that the host product manufacturer must notify to Fibocom Wireless Inc. that they wish to change the antenna trace design. In this case, a Class II permissive change application is required to be filed by the USI, or the host manufacturer can take responsibility through the change in FCC ID
(new application) procedure followed by a Class II permissive change application. End Product Labeling When the module is installed in the host device, the FCC/IC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text: Contains FCC ID: ZMOFG101NA The FCC ID can be used only when all FCC compliance requirements are met. Antenna Installation
(1) The antenna must be installed such that 20 cm is maintained between the antenna and users, Copyright Fibocom Wireless Inc. 8 1 Foreword
(2) The transmitter module may not be co-located with any other transmitter or antenna.
(3) Only antennas of the same type and with equal or less gains as shown below may be used with this module. Other types of antennas and/or higher gain antennas may require additional authorization for operation.
(4)The max allowed antenna gain is 4.07dBi for external monopole antenna. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. 1.3.2 FCC Statement Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide Copyright Fibocom Wireless Inc. 9 1 Foreword reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:
- Reorient or relocate the receiving antenna.
- Increase the separation between the equipment and receiver.
- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
- Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Copyright Fibocom Wireless Inc. 10 1 Foreword Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator & your body. Copyright Fibocom Wireless Inc. 11 2 Product Overview 2 Product Overview 2.1 Product Introduction Fibocom FG101-NA series modules support Cat 6, Cat 12, and Cat 13 three network levels, and support CA network architecture. FG101-NA integrates Baseband, Memory, PMIC, Transceiver, PA and other core devices, supporting long-distance communication modes of FDD-LTE, TDD-LTE and WCDMA. The maximum downlink rate supported in CA mode is 600 Mbps, and the maximum uplink rate is 150 Mbps. FG101-NA is designed with LGA package and is applicable to various scenarios such as CPE, VR/AR, gateway, Internet TV set-top box, and intelligent monitoring. 2.2 Product Specifications 2.2.1 Radio Frequency Features Table 1. Operating Band System WCDMA FG101-NA(CAT12) Band 2/4/5 FDD-LTE Band2/4/5/7/12/13/14/17/25/26/29/30/66/71 TDD-LTE Band 41 (194M) /46/48 Table 2. Transmission Capacity System FG101-NA WCDMA Downlink peak rate is 42Mbps Uplink peak rate is 5.76Mbps Downlink peak rate is 600Mbps LTE Uplink peak rate is 150Mbps Downlink 4 4 MIMO Copyright Fibocom Wireless Inc. 12 2 Product Overview Table 3. Modulation Features System FG101-NA WCDMA modulation characteristics:
WCDMA Support 3GPP R9/DC-HSDPA/HSPA+/HSDPA/HSUPA/WCDMA Support QPSK modulation LTE modulation characteristics:
Support 3GPP R12 Support Maximu 3DLCA 2DLCA LTE Support downlink 256QAM, 64QAM, 16QAM and QPSK modulation Support uplink 64QAM16QAMQPSK modulation Support RF bandwidth 1.4 MHz to 20 MHz 2.2.2 Other Key Features Table 4. Other Key Features Item Description Power supply DC: 3.4 V4.3 V Typical voltage: 3.8 V Storage 2Gb LPDDR2 + 2Gb NAND Flash Supported systems Linux/Android/Windows Class 3 (23.5dBm 2dBm) for WCDMA bands Power class Class 3 (23dBm 2dBm) for LTE bands Class 2 (26dBm 2dBm) for LTE band41 HPUE Satellite GPS/GLONASS/Galileo/BDS Copyright Fibocom Wireless Inc. 13 2 Product Overview positioning SMS Support Audio interface Support PCM digital audio interface A set of USB 3.0 superspeed (SS) interfaces with data transmission rate up to 5 Gbps Compatible with USB 2.0 highspeed (HS) interfaces, with data USB interface transmission rate up to 480 Mbps Used for AT command transmission, data transmission, software debugging, software upgrading, etc. PCIe interface SIM interface PCIe Gen2 1Lane, the maximum transmission rate is 5GT/s, and RC mode is supported 2 sets of SIM card interfaces, supporting dual SIM single standby Support USIM: 1.8 V and 3 V I2C interface A set of I2C with a maximum speed of 3.4 Mbps Dimensions: 39.5 mm x 37 mm x 2.8 mm Physical characteristic Packaging: 299-pin LGA Weight: 8.54g 0.5g Temperature range Operating temperature: 30C to 75C The module works normally within this temperature range, and the related performance meets the requirements of 3GPP standards. Extended temperature: 40C to 85C The module works normally within this temperature range, and the baseband and RF functions are normal. However, some indicators may exceed the range of 3GPP standards. When the temperature returns to the normal working range of the module, all the indicators Copyright Fibocom Wireless Inc. 14 2 Product Overview of the module meet the requirements of 3GPP standards. Storage temperature: 40C to 90C The storage temperature range of the module when the module is powered off. Software upgrade Environmental standards Through USB interface/FOTA RoHS and halogen-free 2.3 Supported CA Combinations Table 5. CA combinations supported by FG101-NA Combi nation CA Configuration ULCA 4x4 MIMO Notes CA_2A-4A CA_2A-5A CA_2A-12A CA_2A-13A CA_2A-14A CA_2A-29A CAT12_2DLCA CA_2A-30A CA_2A-66A CA_4A-5A CA_4A-12A CA_4A-13A CA_4A-29A CA_4A-30A
2A,4A 2A 2A 2A 2A 2A 30A,2A 2A,66A 4A 4A 4A 4A 4A,30A
Copyright Fibocom Wireless Inc. 15 2 Product Overview CA_5A-30A CA_5A-66A CA_12A-30A CA_13A-66A CA_14A-30A CA_14A-66A CA_29A-30A CA_2A-2A CA_4A-4A CA_25A-25A CA_25A-26A CA_25A-41A CA_26A-41A CA_41A-41A CA_66A-66A CA_2C CA_5B CA_41C CA_66C CA_2A-46A CA_4A-46A CA_13A-46A CA_25A-46A CA_46A-66A CA_5A-46A CA_12A-66A CA_29A-66A
5B 41C
30A 66A 30A 66A 30A 66A 30A
4A
25A 25A,41A 41A
66A
2A 4A
25A 66A
66A 66A
Copyright Fibocom Wireless Inc. 16 2 Product Overview CA_30A-66A CA_66B CA_4A-71A CA_2A-71A CA_66A-71A CA_48C CA_2A-48A CA_5A-48A CA_13A-48A CA_48A-66A CA_2A-7A CA_4A-7A CA_7A-7A CA_7A-12A CA_7A-66A CA_5A-5A CA_12A-12A CA_12A-25A CA_12A-46A CA_12B CA_26A-46A CA_5A-25A CA_5A-41A CA_5A-7A CA_7A-46A CA_7B CA_7C
7C 30A,66A
4A 2A 66A
2A
66A 2A,7A 4A,7A
7A 66A,7A
25A
25A 41A 7A 7A
Copyright Fibocom Wireless Inc. 17 CA_2A-4A-4A CA_2A-4A-5A CA_2A-4A-12A CA_2A-4A-13A CA_2A-5A-30A CA_2A-12A-30A CA_2A-29A-30A CA_2A-5A-66A CA_2A-13A-66A CA_2A-14A-30A CA_2A-14A-66A CA_2A-30A-66A CA_2A-66A-66A CAT12-3DLCA CA_4A-5A-30A CA_4A-12A-30A CA_4A-29A-30A CA_2A-2A-5A CA_2A-2A-12A CA_2A-2A-13A CA_2A-2A-30A CA_2A-2A-66A CA_4A-4A-5A CA_4A-4A-12A CA_4A-4A-13A CA_13A-66A-66A CA_14A-30A-66A CA_2A-5B
2 Product Overview
Copyright Fibocom Wireless Inc. 18 CA_2A-66C CA_5A-66A-66A CA_5B-30A CA_5B-66A CA_25A-41C CA_26A-41C CA_41A-41C CA_66A-66C CA_41D CA_2A-5A-46A CA_2A-13A-46A CA_2A-46A-66A CA_2A-46C CA_4A-46C CA_5A-46A-66A CA_13A-46A-66A CA_13A-46C CA_5A-46C CA_2A-12A-66A CA_2A-66B CA_5A-30A-66A CA_5A-66B CA_12A-30A-66A CA_12A-66A-66A CA_13A-66B CA_29A-30A-66A CA_29A-66A-66A
2 Product Overview
Copyright Fibocom Wireless Inc. 19 CA_30A-66A-66A CA_46C-66A CA_2A-2A-46A CA_46A-66A-66A CA_2A-4A-71A CA_4A-4A-71A CA_2A-2A-71A CA_13A-48C CA_5A-48C CA_48D CA_48A-66C CA_2A-48A-66A CA_2A-48C CA_48C-66A CA_2A-5A-48A CA_2A-13A-48A CA_5A-48A-66A CA_13A-48A-66A CA_12A-66C CA_66A-66A-71A CA_2A-66A-71A CA_2A-2A-4A CA_4A-5B CA_5A-5A-66A CA_5A-66C CA_13A-66C CA_48A-66A-66A
2 Product Overview
(NON-PRO)
(NON-PRO)
(NON-PRO)
(NON-PRO) Copyright Fibocom Wireless Inc. 20 CA_48A-66B CA_4A-48C CA_2A-2A-14A CA_14A-66A-66A CA_2C-66A CA_66C-71A CA_2A-4A-30A CA_12A-46C CA_12A-66B CA_25A-25A-26A CA_25A-25A-41A CA_25A-25A-46A CA_25A-26A-41A CA_25A-41A-41A CA_25A-46C CA_26A-41A-41A CA_2A-12A-12A CA_2A-12A-46A CA_2A-12B CA_2A-29A-66A CA_2A-2A-29A CA_2A-4A-29A CA_2A-4A-7A CA_2A-7A-12A CA_2A-7A-66A CA_2A-7A-7A CA_2A-7C
2 Product Overview
(NON-PRO)
(NON-PRO)
Copyright Fibocom Wireless Inc. 21 2 Product Overview CA_2C-12A CA_2C-29A CA_2C-30A CA_2C-5A CA_4A-12A-12A CA_4A-12B CA_4A-4A-29A CA_4A-4A-30A CA_4A-4A-7A CA_4A-7A-12A CA_4A-7A-7A CA_4A-7C CA_5A-7A-46A CA_5A-7A-7A CA_5A-7C CA_66A-66B CA_66D CA_7A-46C CA_7A-66A-66A
2.4 Functional Block Diagram Functional block diagram shows the main hardware features of the FG101-NA series module, including the baseband and RF features. Baseband section CPU PMIC Copyright Fibocom Wireless Inc. 22 2 Product Overview LPDDR2 NAND USB, PCIe, (U)SIM, PCM, I2C, SPI, UART, SDIO, GPIOs, ADCs WCDMA/LTE TDD/LTE FDD controller RF section RF Transceiver RF PA RF Switch RF filter Antenna Figure 1. Functional Block Diagram Copyright Fibocom Wireless Inc. 23 2 Product Overview 2.5 Evaluation Board Fibocom provides EVB-LGA-F01 and ADP-FG101-NA evaluation boards to facilitate module debug and use. For details about usage, see Fibocom_FG101_Hardware_Guide_EVB and Fibocom_ADP-FG101-NA_Hardware_Guide. Copyright Fibocom Wireless Inc. 24 3 Pin Definition 3 Pin Definition 3.1 Pin Distribution The FG101-NA series module uses LGA packaging and have 299 pins in total. The following figure shows a top perspective view of the pin distribution. Figure 2. Pin Distribution The pin details on the left and upper side of the module are shown in the following figure. Copyright Fibocom Wireless Inc. 25 3 Pin Definition Figure 3. Pin Details (1) The pin details on the right side and below the module are shown in the following figure. Copyright Fibocom Wireless Inc. 26 3 Pin Definition Figure 4. Pin Details (2) 3.2 Pin Function The pin functions of FG101-NA series module are shown in the following table. Table 6. LGA Pin Function Description Pin Number Pin Name I/O Power Reset Domain Status Pin Description 1 RESET_N DI 1.8V PU and no external pull-up is Module reset signal, active low required Copyright Fibocom Wireless Inc. 27 3 Pin Definition Module power on/off signal. Pull down it for more than 1.6s to 2 PWRKEY DI 1.8V PU power on. For details, refer to Control Interface section. No external pull-up is required 3 4 5 6 7 8 9 BT_EN*
DO 1.8V PD BT function enable pin, reserved PON_1 DI 1.8V PD startup, used for automatic Module startup signal, high level startup function WLAN_PWR_EN* DO 1.8V PD WLAN power enable, reserved SPI_MOSI DIO 1.8V SPI_MISO DIO 1.8V SPI_CS DIO 1.8V SPI_CLK DIO 1.8V
SPI data output SPI data input SPI chip selection signal SPI clock signal Reset output signal, which is 12 SD_RESET_N*
DO 1.8V
connected to eMMC chip and 14 SYSTEM_READY DO 1.8V
SD_PWR_EN DO 1.8V PD reserved Module sleep status detection signal External SD card power switch control signal AP_READY DI 1.8V USIM1_DET DI 1.8V
Host sleep status detection signal
(U)SIM card hot plug detection Copyright Fibocom Wireless Inc. 28 15 18 25 3 Pin Definition
(U)SIM power supply, the 26 USIM1_VDD PO 1.8V/3V
module automatically identifies 1.8 V or 3.0 V (U)SIM card 27 28 29 32 33 34 36 USIM1_CLK DO 1.8V/3V
(U)SIM clock signal line USIM1_RST DO 1.8V/3V
(U)SIM reset signal line USIM1_DATA DIO 1.8V/3V
(U)SIM data signal line USB_VBUS DI
USB_DM AIO - -
USB_DP AIO - -
USB_ID*
DI 1.8V
USB insertion detection USB 2.0 differential data signal () USB 2.0 differential data signal (+) OTG identification signal, which is reserved. 37 USB_SS_TX_M AO
38 USB_SS_TX_P AO
40 USB_SS_RX_P AI
41 USB_SS_RX_M AI
42 I2C_SDA OD 1.8V PU 43 I2C_SCL OD 1.8V PU USB 3.0 differential transmitting signal () USB 3.0 differential transmitting signal (+) USB 3.0 differential receiving signal (+) USB 3.0 differential receiving signal () I2C interface data signal, which is pulled up internally I2C interface clock signal, which is pulled up internally Copyright Fibocom Wireless Inc. 29 46 SD_VIO*
PO 1.8V/3V
3 Pin Definition SD card IO power supply, 3.0V or 1.8V adaptive, which is reserved for SDIO pull-up. SD card needs external power supply 47 48 49 50 51 52 53 56 57 58 SD_DATA2 DIO 1.8V/3V
SD card data signal SD_DATA3 DIO 1.8V/3V
SD card data signal SD_DATA0 DIO 1.8V/3V
SD card data signal SD_DATA1 DIO 1.8V/3V
SD card data signal SD_CMD DIO 1.8V/3V
SD card command signal SD_ DET DI 1.8V
SD card hot plug detection signal SD_CLK DO 1.8V/3V
SD card clock signal UART1_RTS*
DO 1.8V UART1_CTS*
DI 1.8V UART1_RXD*
DI 1.8V
Request to send data, reserved Clear to send, reserved Module receives data, reserved 59 UART1_DCD*
DO 1.8V
Module outputs carrier detection, reserved 60 61 62 UART1_TXD*
DO 1.8V UART1_RI DO 1.8V
Module transmits data, reserved Module outputs ring indicator UART1_DTR*
DI 1.8V
65 PCM_SYNC DIO 1.8V
Ready, sleep mode control, reserved PCM data synchronization signal by default Copyright Fibocom Wireless Inc. 30 66 67 68 71 3 Pin Definition PCM_IN DI 1.8V PCM_CLK DO 1.8V PCM_OUT DO 1.8V
PCM data input signal by default PCM clock signal by default PCM output signal by default RFFE_CLK*
DO 1.8V
73 RFFE_DATA*
DIO 1.8V
RFFE clock signal, used to control external tuner, reserved RFFE data signal, used to control external tuner, reserved
(U)SIM2 power supply, the 74 USIM2_VDD PO 1.8V/3V
module automatically identifies 77 USIM2_DATA DIO 1.8V/3V
78 USIM2_DET DI 1.8V
79 USIM2_RST DO 1.8V/3V
80 USIM2_CLK DO 1.8V/3V
85~88 VBAT_RF PI
101 ANT_MIMO1 AI
107 ANT_DIV AI
113 ANT_MIMO2 AI
119 ANT_GNSS AI
1.8 V or 3.0 V (U)SIM card
(U)SIM2 data signal line by default, SPI_MOSI (reserved)
(U)SIM2 card hot plug detection, SPI_MISO (reserved)
(U)SIM reset signal line by default, SPI_CS (reserved)
(U)SIM2 clock signal line by default, SPI_CLK (reserved) RF power input (3.4 V4.3 V) MIMO1 antenna Diversity antenna MIMO2 antenna GNSS antenna Copyright Fibocom Wireless Inc. 31 127 ANT_MAIN AIO - -
136 DBG_RXD DI 1.8V 137 DBG_TXD DO 1.8V 138 GPIO_1 DIO 1.8V 139 GPIO_2 DIO 1.8V
3 Pin Definition Main antenna DEBUG serial port receives data DEBUG serial port transmits data General GPIO General GPIO Emergency download, active 140 USB_BOOT DI 1.8V PD high. It is recommended to reserve test points. 143 OTG_PWR_EN*
DO 1.8V PD OTG power enabling, reserved 144 SLEEP_IND DO 1.8V
Sleep status indicator 145 COEX_UART_TXD* DO 1.8V
146 COEX_UART_RXD* DI 1.8V
147 NET_MODE DO 1.8V
LTE and WLAN share a serial port transmission signal line, reserved LTE and WLAN share a serial port receiving signal line, reserved Indicator of registered network mode, reserved 149 WLAN_EN*
DO 1.8V
Wake up WLAN module, reserved 150 WAKEUP_IN DI 1.8V
active low by default. The External device wake-up module, 151 W_DISABLE_N DI 1.8V PU pulled up by default. Low level enables the module to enter software can be configured Module flight mode control, Copyright Fibocom Wireless Inc. 32 152 I2S_MCLK DO 1.8V
155,156 VBAT_BB PI
159 GPIO_3 DIO 1.8V
160 WLAN_WAKE*
DI 1.8V
161 GPIO_4 DIO 1.8V
162 VDD_RF_2V8 PO
163 UART2_TXD*
DO 1.8V
164 UART2_RTS*
DO 1.8V
165 UART2_RXD*
DI 1.8V
166 UART2_CTS*
DI 1.8V
168 VDD_EXT_1V8 PO
169 WLAN_SLP_CLK* DO 1.8V
3 Pin Definition flight mode Reserved, I2S function is not developed currently Baseband power input (3.4V 4.3V) General GPIO. Interrupt triggering is supported WLAN chip wakes up module, reserved General GPIO. Interrupt triggering is supported 2.7 V voltage output, 100 nF capacitance to ground is required Bluetooth serial port transmits data, reserved Bluetooth serial port requests to send data, reserved Bluetooth serial port receives data, reserved Bluetooth serial port clear to send data, reserved 1.8V power output WLAN sleep clock signal, reserved Copyright Fibocom Wireless Inc. 33 170 NET_STATUS DO 1.8V PD 171 STATUS DO 1.8V PD 172 GPIO_5 DIO 1.8V 173 ADC0 AI 1.8V 175 ADC1 AI 1.8V 179 PCIE_CLK_P AO
180 PCIE_CLK_M AO
182 PCIE_TX_M AO
183 PCIE_TX_P AO
185 PCIE_RX_M AI
186 PCIE_RX_P AI
3 Pin Definition Network connection status indicator (default) System operation status indicator, reserved General GPIO Analog to digital input port 0 Analog to digital input port 1 PCIe reference clock signal positive PCIe reference clock signal negative PCIe data transmitting signal negative PCIe data transmitting signal positive PCIe data receiving signal negative PCIe data receiving signal positive 188 PCIE_CLKREQ DIO 1.8V OD PCIe clock request signal PCIE_HOST_RST_ 189 N DO 1.8V PD PCIe reset signal 190 PCIE_WAKE DI 1.8V OD PCIe wake-up signal Copyright Fibocom Wireless Inc. 34 3 Pin Definition 192 PCIE_RESET_N*
DI 1.8V PD 211 TUNER_1*
DO 1.8V
212 TUNER_2*
DO 1.8V
213 TUNER_3*
DO 1.8V
EP mode PCIe reset signal, reserved General RF control signal, reserved General RF control signal, reserved General RF control signal, reserved Table 7. LGA Pin Function Description Pin Number Pin Name I/O Pin Description 10, 13, 16, 17, 24, 30, 31, 35, 39, 44, 45, 54, 55, 63, 64, 69, 70, 75, 76,81~84, 89, 90, 92~94, 96~100, 102~106, 108~112, 114~118, 120~126, 128~133, 141, 142, 148, GND G GND 153, 154, 157, 158, 167, 174, 177, 178, 181, 184, 187, 191, 196, 202~208, 214~299 11, 19~23, 72, 91, 95, 134, 135, 176, 193~195, 197~201, NC
209, 210 Pins marked with * are reserved functions or under development. Leave unused pins floating. Table 8. I/O Parameter Description Type PI Description Power input Copyright Fibocom Wireless Inc. 35 3 Pin Definition PO DI DO DIO AI AO AIO OD Power output Digital input Digital output Digital input/output Analog input Analog output Analog input/output Open drain Copyright Fibocom Wireless Inc. 36 4 Electrical Characteristics 4 Electrical Characteristics 4.1 Limit Voltage Range The limit voltage includes the absolute limit voltage and the operating limit voltage. The absolute limit voltage is the maximum voltage that the module can bear, beyond which the module may be damaged. The operating limit voltage is the normal operating voltage range of the module, beyond which the module will have an abnormal performance. 4.1.1 Absolute Limit Voltage The following table describes the absolute limit voltage ranges of FG101-NA series module. Table 9. Absolute Limit Voltage Range Parameter Description Minimum Value (V) Maximum Value (V) VBAT Power supply 0.3 GPIO Digital IO level supply voltage 0.3 6 2.3 4.1.2 Operating Limit Voltage Table 10. Operating Limit Voltage (Signal) Logical low level Logical high level Signal Minimum Value Maximum Minimum Value Maximum
(V) Value (V)
(V) Value (V) Digital input
-0.3 Digital output 0 RESET_N
-0.3 0.36 0.45 0.5 0.7 VDD VDD + 0.3 VDD - 0.45 VDD 1.25 1.89 Copyright Fibocom Wireless Inc. 37 4 Electrical Characteristics PWRKEY PON_1
-0.3
-0.3 0.5 0.5 1.25 1.25 1.89 1.89 Table 11. Operating Limit Voltage (Power Supply) Parameter I/O Minimum Typical Value Maximum VBAT USIM1_VDD USIM2_VDD SD_VIO USB_VBUS PI PO PO PO PI Value (V) Value (V) 3.4 3.8 4.3 1.75/2.8 1.8/2.85 1.85/2.928 1.75/2.8 1.8/2.85 1.85/2.928 1.75/2.8 1.8/2.85 1.85/2.928 2.4 5.0 5.25 4.2 Power Consumption The power consumption of FG101-NA series module measured under 3.8 V power supply is described in the following table. For AT commands used for USB sleep and wakeup, see Fibocom_FG101_AT Commands User Manual. The USB used in the power consumption test is USB3.0. Table 12. Power Consumption Parameter Mode Status Ioff Power off Module power-off WCDMA DRX8 (USB sleep) Average Current Typical Value (mA) TBD TBD Isleep FDD-LTE Paging Cycle #64 (USB sleep) TBD FDD-LTE Paging Cycle #256 (USB sleep) TBD Copyright Fibocom Wireless Inc. 38 4 Electrical Characteristics TDD-LTE Paging Cycle #64 (USB sleep) TBD TDD-LTE Paging Cycle #256 (USB sleep) TBD Radio Off AT+CFUN=4 (USB sleep) WCDMA DRX6 (USB sleep) DRX6 (USB wakeup) TBD TBD TBD Iidle FDD-LTE TDD-LTE Paging Cycle #64 (USB sleep) TBD Paging Cycle #64 (USB wakeup) TBD Paging Cycle #64 (USB sleep) TBD Paging Cycle #64 (USB wakeup) TBD Band2 @+23.5dBm IWCDMA-RMS WCDMA Band4 @+23.5dBm ILTE-RMS(10MHz 1RB) FDD-LTE Band5 @+23.5dBm Band2 @+23dBm Band4 @+23dBm Band5 @+23dBm Band7 @+23dBm Band12 @+23dBm Band13 @+23dBm 700 700 650 700 700 650 850 650 650 Copyright Fibocom Wireless Inc. 39 4 Electrical Characteristics Band14 @+23dBm Band17 @+23dBm Band25 @+23dBm Band26 @+23dBm Band30 @+23dBm Band66 @+23dBm Band71 @+23dBm Band41 @+26dBm Band48 @+23dBm 650 650 700 650 850 700 650 650 480 TDD-LTE Table 13. 2CA Power Consumption 2CA Typical Combination Transmitting Band@FRB@Data Transmission Status Typical Current (mA) 2A-5A 2A-12A 2A-13A 2A-14A 71A-66A 30A-4A 66A-7A B2+B5 @+21dBm B2+B12 @+21dBm B2+B13 @+21dBm B2+B14 @+21dBm B71+B66 @+21dBm B30+B4 @+21dBm B66+B7 @+21dBm 750 750 750 750 750 900 900 Copyright Fibocom Wireless Inc. 40 3CA Typical Combination 2A-4A-5A 2A-4A-12A 2A-4A-13A Table 14. 3CA Power Consumption Transmitting Band@FRB@Data Transmission Status B2+B4+B5 @+21dBm B2+B4+B12 @+21dBm B2+B4+B13 @+21dBm 2A-14A-30A B2+B14+B30 @+21dBm 2A-14A-66A B2+B14+B66 @+21dBm 2A-66A-66A B2+B66+B66 @+21dBm 4A-29A-30A B4+B29+B30 @+21dBm 4A-5A-30A B4+B5+B30 @+21dBm 4 Electrical Characteristics Typical Current (mA) 750 750 790 900 750 750 900 900 Copyright Fibocom Wireless Inc. 41 5 Functional Interface 5 Functional Interface 5.1 Power Supply The following table describes the power interface of FG101-NA series module. Table 15. Power Interface Pin Name I/O Pin Number Description VBAT_RF PI 85, 86, 87, 88 3.4V4.3V, 3.8V is Module RF power supply, VBAT_BB PI 155, 156 supply, 3.4V4.3V, 3.8V is recommended Module baseband power VDD_EXT_1V8 PO 168 VDD_RF_2V8 PO 162 recommended LDO power supply output, 1.8V/50mA is output LDO power supply output, 2.7V/50mA is output 10, 13, 16, 17, 24, 30, 31, 35, 39, 44, 45, 54, 55, 63, 64, 69, 70, 75, 76, 81~84, 89, 90, 92~94, 96~100, 102~106, GND G 108~112, 114~118, 120~126, Ground 128~133, 141, 142, 148, 153, 154, 157, 158, 167, 174, 177, 178, 181, 184, 187, 191, 196, 202~208, 214~299 Copyright Fibocom Wireless Inc. 42 5 Functional Interface In this document, VBAT includes VBAT_RF and VBAT_BB. The supply voltage of VBAT_RF and VBAT_BB must be consistent. 5.1.1 Power Input The FG101-NA series module is powered on through the VBAT pin. The following figure shows the recommended power supply design. Figure 5. Recommended Power Supply Design The filter capacitor design of power supply is shown in the following table. Table 16. Power Supply Filter Capacitor Design Recommended Capacitor Application Description 330uF x 2 Voltage stabilizing capacitor To reduce the power supply fluctuation when the module works, it is required to adopt low ESR capacitor, which is not less than 440uF, and the Copyright Fibocom Wireless Inc. 43 5 Functional Interface driving capacity of VBAT power supply current is not less than 2.0 A. Filter out interference caused by clock and digital signals. Filter out low band RF interference 1uF, 100nF Digital signal noise 33pF 850 MHz/900 MHz band 8.2pF 1800/1900/2100/2300/2500/2600MHz Filter out middle/high band RF band interference. Stable power supply ensures proper operating of the module. During design, ensure that the power supply ripple is less than 300 mV (circuit ESR < 100 m). When the module is working in maximum load, ensure that the power supply voltage is not lower than 3.4 V. Otherwise, the module may power off or restart. The position of that ESD device can be use for placing ESD or surge protection device according to the requirements of the whole machine test. When the module is working in Burst transmit state, the power limit is shown in the following figure. Figure 6. Power Supply Limit 5.1.2 Power Ouput FG101-NA series module outputs a 1.8 V voltage through the VDD_EXT_1V8 for the Copyright Fibocom Wireless Inc. 44 5 Functional Interface internal digital circuit of module to use. The voltage is the logic level of the module and can be used to instruct module power-on/off, or used by external low current (<
50 mA) circuits. FG101-NA series module outputs a 2.7V level through the VDD_RF_2V8 for the external RF or other circuits to use, with an output current < 50 mA. Leave the signal floating if not used. The logic level of VDD_EXT_1V8 and VDD_RF_2V8 is defined in the following table. Table 17. Power Voltage of VDD_EXT_1V8 and VDD_RF_2V8 Parameter Minimum Value (V) Typical Value (V) Maximum Value (V) VDD_EXT_1V8 1.75 VDD_RF_2V8 2.65 1.8 2.7 1.85 2.85 5.2 Control Interface The module has three control signals for power on/off and reset of the module. The pins are defined in the following table. Table 18. Control Signal Pin Name I/O Pin Number Description RESET_N DI 1 and then release it. The module is reset. In the power-on state, pull down RESET_N for 0.5s to 3s, The chip is internally pulled up. In the power-off state, pull down PWRKEY for 1.6s to 3s, and then release it. The module is started. In the PWRKEY DI 2 power-on state, pull down the PWRKEY for 3s7s, and then release it. The module is powered off. The chip is internally pulled up. Copyright Fibocom Wireless Inc. 45 5 Functional Interface Module on/off signal, pull up to power on. In the power-off state, pull up the PON_1 for more than 1.2s. The module is powered on. There is a 64k pull-down inside the chip and a high level of 1.8V, so external partial voltage needs to be considered. PON_1 DI 4 5.2.1 Power on/off 5.2.1.1 Power-on FG101-NA has the following power-on methods:
When the module is in power-off mode, pull down the PWRKEY for 1.6s to 3s to power on the module. It is recommended to use OC/OD drive circuit to control PWRKEY pin. The reference circuit is shown in the following figure. Figure 7. OC Drive Power-on Reference Circuit Use a button switch to control PWRKEY to power on/off the module and place a TVS
(ESD9X5VL-2/TR is recommended) near the button for ESD protection. The reference circuit is shown in the following figure. Copyright Fibocom Wireless Inc. 46 5 Functional Interface Figure 8. Button Power-on Reference Circuit When PWR_ON is normally pulled high, the module will be powered on automatically. The reference circuit is shown in the following figure. Figure 9. Automatic Power-on Reference Circuit 5.2.1.2 Power-on Sequence The following figure shows the power-on sequence. Copyright Fibocom Wireless Inc. 47 Figure 10. Power-on Sequence (PWRKEY) 5 Functional Interface Figure 11. Power-on Sequence (PON_1) Before pulling down PWRKEY pin, make sure the VBAT voltage is stable. It is recommended to control the interval from power-up by VBAT to PWRKEY pin pull-down no less than 30ms. It takes about 40s to power on the module. Other operations can be performed only after the power-on is completed. 5.2.1.3 Power-off The module supports the following three power-off modes. Table 19. Power-off Modes Power-off Mode Power-off Method Applicable Scenario Low voltage power off The module will power off when the VBAT voltage is too low or power down occurs The normal power-off process is not performed Hardware power off Pull down PWRKEY for 3s to 7s and Hardware power off then release normally Copyright Fibocom Wireless Inc. 48 5 Functional Interface AT command power off AT+CPWROFF Software power off normally The power-off sequence is shown in the following figure. Figure 12. Power-off Sequence When the module is working properly, do not cut off the power supply of the module immediately to avoid damaging the internal Flash. It is recommended to shut down the module by the PWRKEY pin or AT command before cutting off the power supply. When using the AT command to power off the module, make sure that the PWRKEY pin is always at the high level after the shutdown command is executed, otherwise the module will automatically power on again. During the power-off process, it takes about 6 seconds from the release of PWRKEY to the complete power-off of VDD_EXT. Other operations such as power-on, reset, etc. can be performed only after the power-off is completed. 5.2.2 Reset FG101-NA series module can be reset by hardware and software. Copyright Fibocom Wireless Inc. 49 5 Functional Interface Table 20. Reset Methods Reset Method Action Hardware reset Pull down the RESET_N pin for 0.5s to 3s, and then release Software reset Send the AT+CFUN=15 command Figure 13. OC Drive Reset Reference Circuit Figure 14. Button Reset Reference Circuit Figure 15. Reset Sequence Copyright Fibocom Wireless Inc. 50 5 Functional Interface It is recommended to wait at least 20 seconds between two reset operations. The RESET pin can be internally pulled up, without external pull-
up. Keep the pin floating when it is not used. 5.3 Network Status Indication Interface FG101-NA series module provides three network status indication interfaces. The default pin 170 is the network status indicator pin. The pin definitions are shown in the following table. Table 21. Network Status Indication Pin Name NET_MODE I/O DO Pin Number Description 147 Indicator of registered network mode, reserved NET_STATUS DO 170 Network connection status indicator (default) STATUS DO 171 System operation status indicator, reserved Network status indication interface drives the network status indicators and is used to describe the network status of the module. The following table describes the working status of the network status indicator. Table 22. Working Status of the Network Status Indicators Mode Level Status of Network Indication Pin Indicator Status Description Copyright Fibocom Wireless Inc. 51 1 600 ms high/600 ms low Quick flash 600 ms on/600 ms off 5 Functional Interface No SIM card SIM PIN Registering with the network (T < 15s) Registration failed 2 3 4 5 75 ms low/3000 ms high 75 ms off/3000 ms on Standby 75 ms high/75 ms low Low High Speed flash 75 ms on/75 ms Data chaining off Off On establishment Voice call Sleep mode The three status indicators of the module can be designed with reference to the circuit shown in the following figure. Figure 16. Reference Circuit of Network Status Indicators 5.4 (U)SIM Card Interface FG101-NA series module has built-in (U)SIM card interface, and supports 1.8 V and 3.0 V Copyright Fibocom Wireless Inc. 52 5 Functional Interface
(U)SIM cards. 5.4.1 (U)SIM Pin Definition
(U)SIM pin definition is described in the following table. Pin Name USIM1_DET USIM1_VDD I/O DI PO USIM1_DATA DIO USIM1_CLK USIM1_RST USIM2_VDD DO DO PO USIM2_DATA DIO USIM2_DET USIM2_RST USIM2_CLK DI DO DO Table 23. (U)SIM Pin Definition Pin Number Description 25 26 29 27 28 74 77 78 79 80
(U)SIM1 hot plug detection
(U)SIM1 power supply
(U)SIM1 data signal
(U)SIM1 clock signal
(U)SIM1 reset signal
(U)SIM2 power supply
(U)SIM2 data signal
(U)SIM2 hot plug detection
(U)SIM2 reset signal
(U)SIM2 clock signal 5.4.2 (U)SIM Interface Circuit
(U)SIM Card Slot with Card Detection Signal.
(U)SIM card slot should be selected for (U)SIM design. It is recommended to use
(U)SIM card slot with hot plug detection function. The following figure shows the reference design circuit. When (U)SIM card is inserted, USIM_DET pin is at high level, when (U)SIM card is removed, USIM_DET pin is at Copyright Fibocom Wireless Inc. 53 low level. 5 Functional Interface Figure 17. (U)SIM Card Slot with Card Detection Signal 5.4.3 (U)SIM Card Hot Plug The FG101-NA series module supports the (U)SIM card hot plug function. The module detects the status of the USIM1_DET/USIM2_DET pin to determine whether a (U)SIM card is inserted or removed. USIM1_DET/USIM2_DET is active high by default (if the card is at high level, the card is inserted; otherwise, the card is removed). The hot plug detection can be enabled/disabled by the AT command as follows. Table 24. (U)SIM Card Hot Plug Function Configuration AT Command Function Remark Copyright Fibocom Wireless Inc. 54 5 Functional Interface AT+MSMPD=1
(U)SIM card hot plug detection is enabled Default setting AT+MSMPD=0
(U)SIM card hot plug detection is disabled Effective after restart 5.4.4 (U)SIM Design Requirements
(U)SIM circuit design must meet EMC standards and ESD requirements, and at the same time, EMS capability must be improved to ensure that the (U)SIM can work stably. The following points need to be strictly observed in the design:
(U)SIM card slot should be located as close to the module as possible, and kept away from the RF antenna, DCDC power, clock signal lines and other strong interference sources.
(U)SIM card slot is covered by metal shield shell to improve EMS. The routing length from the module to the (U)SIM card slot shall not exceed 100 mm. Longer cable will reduce signal quality. The USIM_CLK and USIM_DATA signal lines are grounded and isolated to avoid mutual interference. If conditions do not permit, at least the (U)SIM signal must be grounded as a set. The filter capacitor and ESD device of the (U)SIM card signal line are placed close to the
(U)SIM card slot. The total capacitance of the equivalent capacitance and the parallel filter capacitance of the ESD device is less than 27pF. USIM_DATA requires a pull-up resistor of 20K to USIM_VDD. Refer to the specification for PCB packaging design of (U)SIM card slot. The PCB surface layer under the 6 clips should be keepout to avoid short circuit caused by the clips scraping the green oil. Copyright Fibocom Wireless Inc. 55 5 Functional Interface 5.5 USB Interface FG101-NA module supports USB 3.0 (5 Gb/s) ultra-high-speed data transmission, and is also compatible with USB high-speed (480 Mb/s) for download, debugging, data transmission and other functions. Only USB 2.0 interface can be used for download and debug, so the USB 2.0 interface signal must be led out. USB pin definition is shown in the following table. Table 25. USB Pin Definition Pin Name I/O Pin Number Description USB_VBUS PI USB_DM USB_DP AIO AIO USB_ID*
DI USB_SS_TX_M AO USB_SS_TX_P AO USB_SS_RX_P AI USB_SS_RX_M AI 32 33 34 36 37 38 40 41 USB insertion detection signal USB 2.0 differential data signal () USB 2.0 differential data signal (+) USB ID detection pin, reserved USB 3.0 differential transmitting signal () USB 3.0 differential transmitting signal (+) USB 3.0 differential receiving signal (+) USB 3.0 differential receiving signal () USB_BOOT DI 140 Force USB download control signal; pull this pin up to VDD_EXT_1V8, and then power on, and the module enters the download mode OTG_PWR_EN DO 143 OTG mode external power enable control, reserved 5.5.1 USB Interface Circuit The USB interface reference circuit is shown in the following figure. Copyright Fibocom Wireless Inc. 56 5 Functional Interface Figure 18. Reference Design of USB Interface Circuit 5.5.2 USB Routing Rules 5.5.2.1 USB 2.0 Routing Rules Since the module supports USB 2.0 High-Speed, TVS tube equivalent capacitance on the USB_D+/D differential signal line must be less than 1 pF, and a 0.5 pF TVS is recommended. USB_D and USB_D+ are high speed differential signal lines with the maximum transmission rate of 480 Mbit/s. The following rules must be strictly followed in PCB layout:
USB_D and USB_D+ signal lines should have the differential impedance of 9010. USB_D and USB_D+ signal line difference must be less than 2mm in length and parallel, avoiding the right-angle routing. USB_D and USB_D+ signal lines should be routed on the layer that is closest to the ground layer, and protected with GND all around. Copyright Fibocom Wireless Inc. 57 5 Functional Interface 5.5.2.2 USB 3.0 Routing Rules USB_SS_RX_P/USB_SS_RX_M and USB_SS_TX_P/USB_SS_TX_M are two sets of differential signals, with differential impedance controlled at 907; the trace length difference within the differential pair is controlled to 0.15 mm, and the trace length difference between the differential sets is controlled to 10 mm. TVS tube equivalent capacitance on the differential signal line must be less than 0.5 pF. Minimize passages during high-speed cabling to ensure continuous impedance. USB 3.0 signals are super speed differential signal lines with the maximum theoretical transfer rate of 5Gbps. The following rules shall be followed carefully in PCB layout:
USB_SS_TX_P/USB_SS_TX_M and USB_SS_RX_P/ USB_SS_RX_M are two pairs of differential signal lines, and their differential impedance should be controlled as 907. Traces in the differential pair must be parallel with equal length, and the length difference should be controlled less than 0.15 mm, avoiding right-angle traces. Traces between differential pairs must be parallel with equal length, and the length difference should be controlled less than 10 mm, avoiding right-angle traces. The two pairs differential signal lines should be routed on the layer that is closest to the ground layer, and protected with GND all around. 5.6 UART Interface and Application FG101-NA series module supports 3-channel UART interface, with the maximum baud rate of 921600 bps and the default baud rate of 115200 bps. The following table describes pins of UART interface. Table 26. UART Pin Definition Pin Name I/O Pin Number Description Copyright Fibocom Wireless Inc. 58 5 Functional Interface UART1_RTS*
DO 56 Send data request, reserved UART1_CTS*
DI UART1_RXD*
DI 57 58 Clear to send, reserved Module receiving data, reserved UART1_DCD* DO 59 Module output carrier detection, reserved UART1_TXD*
DO 60 Module transmitting data, reserved UART1_RI DO 61 Module output ring indicator, which is host wakeup control signal UART1_DTR*
DI 62 Ready, sleep mode control, reserved DBG_RXD DI 136 Debug UART receiving signal DBG_TXD DO 137 Debug UART transmitting signal UART2_TXD*
DO 163 UART2 transmitting data signal, reserved UART2_RTS*
DO 164 UART2 request to send data signal, reserved UART2_RXD*
DI 165 UART2 receiving data signal, reserved UART2_CTS*
DI 166 UART2 clear to send data signal, reserved Pins marked with * are reserved functions or under development. The UART interface level of FG101-NA series module is 1.8 V, if the customer host system level is 3.3 V or other, a level conversion circuit needs to be added to the UART signal, and the UART level conversion reference circuit is shown in the following figure. Copyright Fibocom Wireless Inc. 59 5 Functional Interface Figure 19. UART Level Conversion Reference Circuit Transistor level conversion circuits cannot be used for applications whose baud rate exceeds 460kbps. Pay attention to the definition and connection direction of input and output for each signal to avoid reverse connection of input and output. The VDD_EXT_1V8 voltage domain is used for VDDs on one side of all serial modules. 5.7 ADC Interface FG101-NA series module supports two-channel ADC interface with minimum accuracy of 10mV. Run the AT+MMAD command to read the voltage value of ADC interface. The voltage range of ADC interface is 0V to 1.8V. Table 27. ADC Pin Definition Pin Name I/O Pin Number Description ADC0 ADC1 AI AI 173 175 ADC interface 0 ADC interface 1 Copyright Fibocom Wireless Inc. 60 5 Functional Interface It is recommended to ground ADC signal lines to improve ADC voltage measurement accuracy. 5.8 I2C Interface FG101-NA series module supports 1-way I2C interface, and the standard I2C specification, version 3.0 is applied. The I2C signal module is internally pull-up and does not need an external pull-up resistor. Table 28. I2C Pin Definition Pin Name Pin Number Type Description I2C_SDA I2C_SCL 42 43 OD OD I2C data signal I2C clock signal 5.9 PCM Digital Audio Interface The FG101-NA series module provides a digital audio interface for communication with external codec and other digital audio devices. 5.9.1 PCM Interface Definition PCM interface signals include transmission clock PCM_CLK, frame synchronization signal PCM_SYNC, and input and output PCM_IN/PCM_OUT. Table 29. PCM Pin Definition Pin Name PCM_SYNC PCM_IN I/O IO DI Pin Number Description 65 66 PCM sync signal PCM input signal Copyright Fibocom Wireless Inc. 61 5 Functional Interface PCM_CLK PCM_OUT IO DO 67 68 PCM clock signal PCM output signal Default transmission clock frequency is 2.048 MHz, sampling rate is 8 KHz, and resolution is 16 bit. 5.9.2 PCM Application Circuit The application reference circuit of the external codec chip of the PCM interface is shown in the following figure. Figure 20. Reference Circuit of the PCM Interface External codec Chip 5.10 SDIO Interface FG101-NA series module supports one SDIO interface. The standard is as follows: Physical Layer Specification version 3.0 and SDIO Card Specification version 3.0. 5.10.1 SDIO Pin Definition SDIO pin definition is described in the following table. Copyright Fibocom Wireless Inc. 62 5 Functional Interface Table 30. SDIO Pin Definition Pin Name I/O Pin Number Description SD_RESET_N DO 12 keep floating when SD card function is used;
Reset output signal; connected to eMMC chip;
reserved SD_PWR_EN DO 15 SD card external power switch control signal SD_VIO PO 46 reserved for SDIO pull-up use, external power SD card power supply, 3.0V or 1.8V adaptive, supply is required for SD card power supply. SD_DATA0 DIO 49 SDIO data signal bit0 SD_DATA1 DIO 50 SDIO data signal bit1 SD_DATA2 DIO 47 SDIO data signal bit2 SD_DATA3 DIO 48 SDIO data signal bit3 SD_CMD DIO 51 SDIO command signal SD_CLK DO 53 SDIO clock signal SD_ DET DI 52 SDIO hot plug detection signal 5.10.2 SDIO Interface Routing Rules SD card circuit design must meet EMC standards and ESD requirements, and at the same time, EMS capability must be improved to ensure that the SD card can work stably. The following principles must be strictly followed in the design:
If the routing length of signal lines is equal to or less than 50 mm, it is recommended to place the SD card connector as close to the SD signal pin of the module as possible because the internal cabling length of the module is 20 mm. If the routing length is Copyright Fibocom Wireless Inc. 63 5 Functional Interface equal to or less than 30 mm, the routing length difference of the clock signal line and data signal line should be controlled equal to or less than 1 mm. The SD signal line must be grounded all around and kept away from RF antenna, DCDC power supply, clock signal line and other strong interference sources. Reference ground must be installed for the SD signal line, and data line impedance must be controlled with 50 (10%). The total load capacitance on the SD signal lime must be smaller than 1 pF. 5.10.3 SDIO Interface Application Circuit For SDIO application circuit, please refer to the following figure. SD card connector detect pin is floating when no card is inserted, and is short to ground when a card is inserted. The detect pin is at low level when the SD card is inserted. The SD card needs to be powered by an external power supply. The voltage ranges from 2.7V to 3.6V, and the typical value is 2.95V. The output current must be greater than 800mA. Figure 21. SD Card Reference Circuit 5.11 SPI Interface The FG101-NA module supports one set SPI interface, and it works in Master mode by Copyright Fibocom Wireless Inc. 64 5 Functional Interface default, and the clock supports 50 MHz at most. Table 31. SPI Pin Definition Pin Name I/O Pin Number Description SPI_MOSI DO SPI_MISO DI SPI_CS SPI_CLK DO DO 6 7 8 9 5.12 PCIe Interface SPI interface output signal SPI interface input signal SPI interface chip selection signal SPI interface clock signal FG101-NA module supports a set of PCIe GEN 2.0 1 lane. Table 32. PCIe Pin Definition Pin Name I/O Pin Number Description PCIE_CLK_P AO 179 PCIe reference clock signal positive PCIE_CLK_M AO 180 PCIe reference clock signal negative PCIE_TX_M AO 182 PCIe data transmitting signal negative PCIE_TX_P AO 183 PCIe data transmitting signal positive PCIE_RX_M PCIE_RX_P AI AI 185 186 PCIe Data receiving signal negative PCIe Data receiving signal positive PCIE_CLKREQ DIO 188 PCIe clock request signal PCIE_HOST_RST_N DO 189 PCIe reset signal Copyright Fibocom Wireless Inc. 65 PCIE_WAKE PCIE_RESET_N DI DI 190 192 5.12.1 PCIe Routing Rules 5 Functional Interface PCIe wake-up signal PCIe EP mode reset signal, reserved FG101-NA module supports PCIe 2.0 1, including three differential pairs:
transmitting pair TXP/N, receiving pair RXP/N and clock pair CLKP/N. PCIe can achieve the maximum transmission rate of 5GT/s. The following rules must be strictly followed in PCB layout:
The differential signal pairs are required to be parallel wires with equal length, and the difference in length is less than 0.15 mm. The differential signal pair traces shall be as short as possible and be controlled within 15 inch (380 mm) for AP end. The impedance of differential signal pair traces is controlled to be 10010%. Avoid discontinuous reference ground, such as segment and space. When the differential signal traces go through different layers, the via hole of ground signal should be close to that of signal, and generally, each pair of signals require 1-3 ground signal via holes and the traces shall never cross the segment of plane. Try to avoid bended traces and avoid introducing common-mode noise in the system, which will influence the signal integrity and EMI of differential pairs. As shown in the following Figure, the bending angle of all traces should be equal to or greater than 135, the spacing between differential pair traces should be larger than 20mil, and the traces caused by bending should be greater than 1.5 times trace width at least. When a serpentine route is used for length match with another route, the bended length of each segment shall be at least 3 times the route width ( 3W). The largest spacing between the bended part of the serpentine trace and another one of the differential traces must be less than 2 times the spacing of normal differential traces (S1 < 2S). Copyright Fibocom Wireless Inc. 66 5 Functional Interface Figure 22. PCIe Routing Requirements The difference in length of two data lines in differential pair should be within 0.15 mm, and the length match must be met for all parts. When the length match is conducted for the differential lines, the designed position of correct match should be close to that of incorrect match, as shown in the following figure. However, there is no specific requirements for the length match of transmitting pair and receiving pair, that is, the length match is only required in the internal differential lines rather than between different differential pairs. The length match should be close to the signal pin and pass the small-angle bending routing design. Figure 23. Length Match Design of PCIe Difference Pair 5.12.2 PCIe Application Circuit Please refer to the following figure for PCIe application circuit, and FIBOCOM FG101-NA Reference Design for details. Copyright Fibocom Wireless Inc. 67 5 Functional Interface Figure 24. PCIe Application Circuit 5.13 GPIO Interface FG101-NA module reserves five GPIO interfaces for clients, with a voltage domain of 1.8V. Clients can use the interfaces as required and simply leave them floating when not in use. GPIO pin definition is described in the following table. Table 33. GPIO Pin Definition Pin Name I/O Pin Number Description Usage GPIO_1 IO 138 General Pull down inside the chip by input/output default. interface 1 GPIO_2 IO 139 General Pull down inside the chip by input/output default. Copyright Fibocom Wireless Inc. 68 5 Functional Interface interface 2 GPIO_3 IO 159 General Pull down inside the chip by input/output default. Interrupt wake-up is interface 3 supported. GPIO_4 IO 161 General Pull down inside the chip by input/output default. Interrupt wake-up is interface 4 supported. GPIO_5 IO 172 General Pull down inside the chip by input/output default. interface 5 5.14 Flight Mode Control Interface W_DISABLE_N pin is described in the following table. Table 34. W_DISABLE_N pin Description Pin Name I/O Pin Number Description W_DISABLE_N DI 151 Module flight mode control (internal pulled up by default) FG101-NA series module supports two ways as described in the following table to enter flight mode:
Table 35. Ways for Module to Enter Flight Mode 1 Hardware GPIO interface control Send AT+GTFMODE=1 to turn on the hardware control flight mode function; pulled up or float the pin The module is in normal mode when W_DISABLE# pin is pulled up by default. When this pin is pulled down, the module enters flight mode. Copyright Fibocom Wireless Inc. 69 5 Functional Interface The module uses software to control the flight mode by default. AT command When AT+GTFMODE=0:
2 control run the AT+CFUN=0 command to enter flight mode. run the AT+CFUN=1 command to enter normal mode. 5.15 Sleep/Wakeup Interface When the module is in sleep mode, the module can be awakened by pulling down WAKEUP_IN pin. When the module is in sleep mode and there is an incoming call or short message, the signal output by the UART1_RI pin wakes up the host. Table 36. Sleep/Wakeup Interface Pin Name I/O Pin Number Description WAKEUP_IN DI 150 External device wake-up module, active low by default. Wake-up host control signal, which is pulled UART1_RI DO 61 high by default, and pulled low to wake up module. The module supports setting wake-up mode and waking up active level through AT commands. For details of configuration method, see Fibocom_FG101_AT Commands User Manual . Copyright Fibocom Wireless Inc. 70 6 RF Interface 6 RF Interface The FG101 series module has five antenna interfaces, and the pin definitions are described in the following table. Table 37. Antenna Interface Pin Name I/O Pin Number Description ANT_MIMO1 ANT_DIV ANT_MIMO2 ANT_GNSS AI AI AI AI ANT_MAIN AIO 101 107 113 119 127 6.1 Operating Bands MIMO1 antenna Diversity antenna MIMO2 antenna GNSS antenna Main antenna Band Band 2 Band 4 Band 5 Band 7 Band12 Band 13 Band 14 Band 17 Band 25 Table 38. Operating Band Mode Transmit (MHz) Receive (MHz) LTE FDD/WCDMA 1850~1910 1930~1990 LTE FDD/WCDMA 1710~1755 2110~2155 LTE FDD/WCDMA 824~849 869~894 LTE FDD LTE FDD LTE FDD LTE FDD LTE FDD LTE FDD 2500~2570 2620~2690 699~716 729~746 777~787 746~756 788~798 758~768 704~716 734~746 1850~1915 1930~1995 Copyright Fibocom Wireless Inc. 71 Band 26 Band 29 Band 30 Band 41 Band 46 Band 48 Band 66 Band 71 GPS L1 GLONASS L1 BDS Galileo LTE FDD LTE FDD LTE FDD LTE TDD LTE TDD LTE TDD LTE FDD LTE FDD
6 RF Interface 814~849 859~894
717~728 2305~2315 2350~2360 2496~2690 2496~2690 5150~5925 5150~5925 3550~3700 3550~3700 1710~1780 2110~2180 663~698 617~652
1575.42 1.023 1602.5625 4 1561.098 2.046 15591592 6.2 Transmitting Power The following table describes the RF output power of FG101-NA series module. Table 39. Output Power Band Minimum Value Maximum Value WCDMA LTE FDD LTE TDD
< -50dBm
< -40dBm
< -40dBm 6.3 Receiving Sensitivity 23.5dBm 2dB 23dBm 2dB 23dBm 2dB Table 40. FG101-NA Dual Antenna Receiving Sensitivity Mode Band 3GPP Requirement Rx Sensitivity Typ Note Copyright Fibocom Wireless Inc. 72
(dBm) WCDMA Band 2
-104.7 Band 4
-106.7 Band 5
-104.7 Band 2
-94.3 Band 4
-96.3 Band 5
-94.3 Band 7
-94.3 Band 12
-93.3 Band 13
-93.3 LTE FDD Band 14
-93.3 Band 17
-93.3 Band 25
-92.8 Band 26
-93.8 Band 30
-95.3 Band 66
-95.8 Band 71
-93.5 Band 41
-94.3 Band 48
-95 LTE TDD
(dBm)
-113
-112.5
-113
-100
-100
-101
-100
-101
-101
-101
-101
-101
-101
-100
-100
-101
-98.5
-98.5 Table 41. FG101-NA Four Antenna Receiving Sensitivity 3GPP Requirement Rx Sensitivity Typ Mode Band
(dBm) LTE FDD Band 2
-97
(dBm)
-103 6 RF Interface
10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW Note 10MHz BW Copyright Fibocom Wireless Inc. 73 Band 4 Band7 Band 25 Band 30 Band66 Band 41 Band 48
-97
-97
-97
-97
-97
-97
-97 LTE TDD
-102
-102
-103
-102
-102
-100
-100 6 RF Interface 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 10MHz BW 6.4 GNSS Receiving Performance The GNSS of FG101-NA module supports GPS/GLONASS/BDS/GALILEO, and the performance parameters of GNSS are shown in the following table. Table 42. GNSS Performance Parameters Description Result Unit Indicator Performance Current Fixing,-130dBm/-122dBm 85 Tracking,-144dBm Cold start Sensitivity Acquisition Tracking Cold Start TTFF Warm Start Hot Start 80 39
-145
-156 40 35 3 mA mA dB-Hz dBm dBm s s s Copyright Fibocom Wireless Inc. 74 Static Accuracy Nominal accuracy 3 m 6 RF Interface The above data is an average value obtained by testing some samples at 25C. 6.5 Antenna indicators The antenna requirements for FG101-NA module are described in the following table. Table 43. Module Antenna Requirements FG101-NA series module main antenna requirements WCDMA/LTE VSWR: 2 Input power: > 28 dBm Input impedance: 50 Antenna gain: < 3.6dBi Antenna isolation: > 25dB Antenna correlation coefficient: < 0.5 Frequency range: 1559 MHz1609 MHz GNSS Polarization direction: right-circular or linear polarization VSWR: < 2:1 Passive antenna gain: > 0dBi 6.6 PCB Routing Design 6.6.1 Routing Rules For modules that dont have a RF connector, customers need to route a RF trace to Copyright Fibocom Wireless Inc. 75 6 RF Interface connect to the antenna feeding point or connector. It is recommended to use a microstrip line. The shorter the better. The insertion loss should be controlled less than 0.2dB; and impedance should be controlled within 50. Add a -type circuit (two parallel-component- grounded pins are connected directly to the main GND) between the module and antenna connector (or feeding point) for antenna debugging. Figure 25. Type Circuit This signal line impedance is controlled within 50 during PCB cabling, and the RF performance is closely related to this cabling. PCB parameters that will affect the cabling impedance include:
Trace width and thickness Dielectric constant and thickness of material Thickness of pad Distance from ground line Nearby traces Copyright Fibocom Wireless Inc. 76 6 RF Interface 6.6.2 Impedance Design The RF impedance of the two antennas interface should to be controlled at 50. In practical application, RF routing mode is designed according to other parameters of PCB, such as reference layer thickness, number of layers and stacking. Different reference GND layer will lead to different routing design. 6.6.3 3W Principle During antenna RF signal cabling design on PCB, the first thing you need to consider is to follow "3W principle". In order to reduce crosstalk between the lines, please ensure that line spacing is large enough. If the line spacing is at least 3 times of the line width, 70% of the electric field between the lines will not interfere with each other, and this is called "3W principle". Figure 26. 3W Principle 6.6.4 Impedance Design for Four-layer Board The thickness of four-layer board is 1.0 mm. RF line is routed on Lay 1, and reference layer is on Lay 2 (GND layer). The stacking varies with PCB vendor; the following figure is taken as an example. Copyright Fibocom Wireless Inc. 77 6 RF Interface Figure 27. Four Layers (1+2+1) Thickness Table 44. Four-layer Board Stacking Thickness Layer Material Thickness (um)
Lay1
Lay2
Lay3
Lay4
Solder Mask 0.33OZ + Plating PP 1080 0.5OZ + Plating
25 65 25 0.510mm(H/H OZ) 508 0.510mm + Plating PP 1080 0.33OZ + Plating Solder Mask 25 65 25
The thickness from Lay 1 to Lay 2 is 65 ums, RF trace is 4 mils, and the distance from RF to GND is greater than 3 times of RF line width. The blue area is Lay 1 and the red area is Lay 2, the highlighted part is RF line. Copyright Fibocom Wireless Inc. 78 6 RF Interface Figure 28. RF Traces 50 impedance calculation:
If the value of D1 exceeds 3 times of W1, it has weak effect on impedance. Figure 29. Impedance Calculation for Four-layer Board Top Layer Trace 6.7 Main Antenna Design 6.7.1 External Antenna The external antenna has good performance. The antenna is placed outside the complete machine, the antenna space is large, and the antenna performance is not easy to be affected by the internal environment of the complete machine, so that the antenna does not need to be independently designed for each project. The compatibility is good. Most of the interfaces of such antennas are SMA interfaces. Copyright Fibocom Wireless Inc. 79 6 RF Interface Figure 30. External Antenna 6.7.2 Internal Antenna 6.7.2.1 Design Principle of Internal Antenna Placement The antenna shall be arranged in the corners of the module. Avoid placing metal elements near the antenna. The shielding parts shall be as neat as possible. Do not use long strip shaped hole slots. Components with metal structure, such as horn, vibrator, and camera base plate shall be grounded. Avoid using long FPC. If a long FPC is required, add grounding shields on both sides. Routing When connecting RF routing, apply circular arc treatment at the turning, take grounding and pay attention to characteristic impedance. RF ground shall be designed properly, PCB board and edge of ground shall be provided with "ground wall", and antenna led from RF module shall be made into microstrip line. The antenna RF feeding point pad is a round rectangular pad with the size of 2 mm 3 Copyright Fibocom Wireless Inc. 80 6 RF Interface mm. All layers of PCB that include the pad and surrounding and that are equal to and greater than 0.8 mm are not covered with copper. The center distance between RF and ground pad shall be between 4 mm and 5 mm. 6.7.2.2 Internal Antenna Classification Internal Antenna Types There are three kinds of internal antennas: PIFA, IFA and monopole. Internal antennas may form interference and other potential problems in the product, so there are more requirements in the design. The following table describes the differences of these three types of antennas. Table 45. Antenna Differences Antenna Type Below Antenna Antenna Antenna Electrical SAR Projection Feed Volume Property PIFA Ground MONOPOLE No ground IFA Ground 2 1 2 Large Very good Low Small Good Slightly high Medium About good Medium PIFA antenna Antenna structure There are two feeding points between the antenna and main board, one is module output, and the other is RF ground. It is recommended to design the antenna on the top of the device. The distance between the signal point and GND point should be at least 4 mm to 5 mm. The signal point and GND point can be put in different places, and more GND points mean more choices during antenna design. Copyright Fibocom Wireless Inc. 81 6 RF Interface Figure 31. Location of the Signal Point and GND Point of PIFA Main board There is complete paving in the antenna projection area. Do not place any component in the antenna area. The recommended length of PCB board should be 90 mm to 110 mm. The antenna performance is better if the board length is 105 mm. Structure of PIFA antenna Bracket The antenna consists of plastic bracket and metal sheet (radiator). Plastic bracket and metal sheet are fixed by hot melt method. The plastic is made of BS or PC material, the metal sheet is beryllium copper, phosphor copper, or stainless steel. If you want to use FPC, add two pins in the main board, which boasts a higher cost. Attached Attach the metal sheet (radiator) to the back cover of the module. Feed point of PIFA antenna The feeding point must be greater than 2mm 3mm. Try to place it at the edge of the PCB board, and adopt round shape. Square with rounded corners is also preferred. The distance between feeding point pad and ground should be equal to or greater than 1mm. Copyright Fibocom Wireless Inc. 82 6 RF Interface Figure 32. Pad Design Requirement Requirements on height and area Operating Band LTE TDD/FDD Height
> 6mm Area
> 15mm 40mm LTE TDD/FDD
> 6.5mm
> 17mm 40mm LTE TDD/FDD
> 8mm
> 20mm 45mm For details about WCDMA/LTE antenna design, refer to the area requirement of GSM antenna. Monopole antenna Antenna structure There is one feeding point between the antenna and main board, which is module output. It is recommended to design the antenna on the top of the device. The following figure shows the monopole antenna design. Copyright Fibocom Wireless Inc. 83 6 RF Interface Figure 33. Antenna Location Main board There should be no paving or PCB in the antenna projection area. Do not place any component in the antenna area. The recommended length of PCB board should be 80 mm to 100 mm. The antenna performance is improved if the board length is 95mm. Figure 34. Requirements for Antenna Projection Area Structure of monopole antenna For details, see Structure of PIFA antenna . Feed point of monopole antenna For details, see Feed point of PIFA antenna . The height and area requirements for monopole antenna are described in the following table. Operating Band Height Area GSM/DCS
> 5mm
> 35mm 7mm Copyright Fibocom Wireless Inc. 84 GSM/DCS/PCS
> 6mm
> 35mm 8mm GSM850/GSM900/DCS1800/PCS1900 > 6mm
> 40mm 10mm 6 RF Interface For details about WCDMA/LTE antenna design, refer to the area requirement of GSM antenna. IFA antenna IFA antenna shares similarity with Monopole antenna and PIFA antenna. IFA antenna has two feeding branches, and allows ground under the antenna. The antenna has better stability than Monopole antenna, and the antenna space requirement is between Monopole antenna and PIFA antenna. Figure 35. Location of Signal Point and GND Point Antenna space requirement: monopole < IFA < PIFA. For other requirements, refer to the PIFA and monopole requirements. Copyright Fibocom Wireless Inc. 85 6 RF Interface 6.7.3 Surrounding Environment Design of Internal Antenna 6.7.3.1 Handling of Speaker Connecting beads or inductors on speaker can reduce the impact on RF. 6.7.3.2 Handling of Metal Structural Parts All the metal structural parts must be grounded correctly and reliably, and the circuit part must be shielded. 6.7.3.3 Handling of Battery The battery should be far away from antenna. Monopole antenna: The distance between battery and antenna is equal to or greater than 5 mm. PIFA antenna: The distance between battery and antenna is equal to or greater than 3 mm. Do not put the battery connector right beside the antenna. Copyright Fibocom Wireless Inc. 86 6 RF Interface 6.7.3.4 Location of Large Components in Antenna Area Do not place large metal components such as oscillator, speaker, and receiver around the antenna; they may greatly affect the electrical performance of antenna. Do not spray the cover of the antenna with conductive paint; be cautious when you use plating. Figure 36. Location of Large Components 6.7.4 Common Problems of Internal Antenna Overall Design Factors that would affect transmitting performance As the internal antenna is sensitive to the nearby medium, so the design of shell is closely related to antenna performance. Copyright Fibocom Wireless Inc. 87 6 RF Interface Poor speaker layout will affect antenna performance. Poor battery layout will affect antenna performance. Factors that would affect receiving performance If both the conductive performance of module and the radiated power of antenna meet requirement, then low sensitivity may be caused by main board design issue. Poor coupling sensitivity is caused by poor circuit design of LCD, LDO, and DC/DC. Device receiving performance is affected by VCXO or TXVCO harmonic of 19.2MHZ, 26MHZ, and 38.4MHZ systems. Poor coupling sensitivity is caused by SIM card clock. Poor FPC layout affects the receiving performance of the device. Factors that would affect electromagnetic compatibility (EMC) Poor FPC layout affects EMC performance of the device. The metal element may absorb the antenna radiated power and produce a certain amount of secondary radiation, and coupling frequency is associated with the size of metal parts. Therefore, this kind of component should have a good grounding to eliminate or reduce secondary radiation. 6.8 Diversity and MIMO Antenna Design Diversity receiving technology is a main anti fading technology, which can greatly improve the transmission reliability in multipath fading channels. Its essence is to use two or more different methods to receive the same signal to overcome the fading and improve the receiving performance of the system. Diversity antenna can also multiplex different transmission paths in space using division multiplexing technology and receive data from the multiple different paths in parallel to improve the receiving throughput. Copyright Fibocom Wireless Inc. 88 6 RF Interface The function of MIMO antenna is similar to that of diversity antenna, and they both can resist against fading and improve throughput. The customer is recommended to design the corresponding antenna according to the antenna requirements of each module antenna port. The design method of diversity antenna and MIMO antenna is consistent with that of main antenna. It is recommended to control the difference of the efficiency of diversity antenna and MIMO antenna from that of main antenna by no more than 3dB. The isolation of each antenna shall be greater than 25dB, and the antenna correlation coefficient shall be less than 0.5. High isolation does not mean good correlation coefficient. Customers need to evaluate two indexes separately. The isolation and correlation coefficient of antenna generally depend on:
Antenna isolation Antenna type Antenna directivity 6.9 GNSS Antenna Design GNSS supports passive antenna. For antenna design requirements, refer to Table30 Module Antenna Requirements. 6.10 Other Interfaces For the application of other interfaces, please refer to the recommended design. If the application scenario and the recommended design are not consistent, please contact FIBOCOM technicians for confirmation. Copyright Fibocom Wireless Inc. 89 7 Thermal Design 7 Thermal Design FG101-NA module is designed to be workable on an extended temperature range, to make sure the module can work properly for a long time and achieve a better performance under extreme temperatures or extreme working conditions, such as high temperatures and high speed data transfer, refer to the following thermal design guidelines:
Heat devices and other heat sources on the motherboard are as far away from the module as possible. The ground plane of the motherboard under the module is as complete as possible, and as many ground holes are drilled as possible to increase heat dissipation capability. The motherboard should have sufficient size or sufficient heat dissipation capacity, otherwise it is recommended to add heat sinks. Copyright Fibocom Wireless Inc. 90 8 Electrostatic Protection 8 Electrostatic Protection Although the ESD problem has been considered and ESD protection has been completed in the FG101-NA module design, the ESD problem may also occur in transportation and secondary development. Developers should consider ESD protection in the final product. In addition to ESD in packaging, customers should consider the recommended circuit of the interface design in the document during module application. The following table describes the ESD discharge range allowed by the FG101-NA series module. Table 46. Allowed ESD Discharge Range Location Air Discharge Contact Discharge VBAT, GND 15KV Antenna interface 15KV Other interfaces 2KV 8KV 8KV 1KV Copyright Fibocom Wireless Inc. 91 9 Structural Specifications 9 Structural Specifications 9.1 Product Appearance The appearance of the FG101-NA series module is shown in the following figure. Figure 37. Product Appearance 9.2 Structural Dimensions The structural dimension of the FG101-NA series module is shown in the following figure. The unit is mm. Copyright Fibocom Wireless Inc. 92 9 Structural Specifications Figure 38. Structural Dimensions 9.3 PCB Pad and Stencil Design For PCB pad and stencil design, please refer to FIBOCOM FG101 Series SMT Design Guide. 9.4 SMT For SMT production process parameters and related requirements, please refer to FIBOCOM FG101 Series SMT Design Guide. 9.5 Packaging and Storage For package and storage requirements, please refer to FIBOCOM FG101 Series SMT Design Guide. Copyright Fibocom Wireless Inc. 93 Appendix A: Acronyms and Abbreviations Appendix A: Acronyms and Abbreviations Bits Per Second Carrier Aggregation Downlink Carrier Aggregation Discontinuous Reception Frequency Division Duplexing High Speed Down Link Packet Access Maximum Load Current Light Emitting Diode Long Term Evolution Mobile Equipment Mobile Station Mobile Terminated Printed Circuit Board Protocol Data Unit Radio Frequency Root Mean Square Real Time Clock Receive Short Message Service Terminal Equipment Copyright Fibocom Wireless Inc. 94 bps CA DLCA DRX FDD HSDPA Imax LED LTE ME MS MT PCB PDU RF RMS RTC Rx SMS TE TX TDD UART UMTS
(U)SIM Vmax Vnorm Vmin VIHmax VIHmin VILmax VILmin VImax VImin VOHmax VOHmin VOLmax VOLmin VSWR WCDMA Appendix A: Acronyms and Abbreviations Transmitting Direction Time Division Duplexing Universal Asynchronous Receiver & Transmitter Universal Mobile Telecommunications System
(Universal) Subscriber Identity Module Maximum Voltage Value Normal Voltage Value Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio Wideband Code Division Multiple Access Copyright Fibocom Wireless Inc. 95
This product uses the FCC Data API but is not endorsed or certified by the FCC