933CLD AI7 User G uide Version Doc No Date B 912-13903 2022/06/22 AcSiP Technology Corp www.acsip.com.tw PRODUCT USER GUIDE www.acsip.com.tw Document History Date Revised Contents Revised By Version 2022/04/29 Initial Version 2022/06/22 Add FCC Statement Ivan Ivan A B Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 1 /29 PRODUCT USER GUIDE www.acsip.com.tw INDEX 1. 2. 3. 4. Introduction ...................................................................................... 4 1.1 General Description ......................................................................................................... 4 Get started with the HDK ................................................................... 5 2.1 2.2 Configuring the EK-AI7933CLD ....................................................................................... 5 Installing the FTDI drivers on Microsoft Windows .......................................................... 6 Hardware Features ............................................................................ 8 3.1 Features Description ....................................................................................................... 8 Hardware Feature Configuration ...................................................... 10 4.1 Microcontroller .............................................................................................................. 10 4.2 4.3 4.4 4.5 4.6 4.7 4.8 Power supply ................................................................................................................ 10 Audio ............................................................................................................................. 13 Buttons .......................................................................................................................... 14 RGB LED ......................................................................................................................... 14 SD card .......................................................................................................................... 15 Extension connectors..................................................................................................... 16 RTC ................................................................................................................................ 26 Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 2 /29 PRODUCT USER GUIDE www.acsip.com.tw Lists of Tables and Figures Table 1 Jumper settings for system power input through USB connection ............................. 11 Table 2 Audio related function ................................................................................................. 13 Table 3 Buttons ......................................................................................................................... 14 Table 4 GPIO pin-out extension connectors ............................................................................. 17 Table 5 GPIO pin multi-function definition .............................................................................. 18 Figure 1. Front view of EK-AI7933CLD ........................................................................................ 4 Figure 2. Jumpers and connectors on the EK-AI7933CLD ........................................................... 5 Figure 3. COM port associated with the EK-AI7933CLD ............................................................. 7 Figure 4. Default power jumper plot ........................................................................................ 10 Figure 5. Power up the HDK using an AA or AAA Battery (J25) .............................................. 12 Figure 6 . Audio Jumper and connector Locations ................................................................... 13 Figure 7. RGB LED ...................................................................................................................... 14 Figure 8. SD card slot rework .................................................................................................... 15 Figure 9. GPIO pin-out extension connectors ............................................................................. 16 Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 3 /29 PRODUCT USER GUIDE www.acsip.com.tw 1. Introduction 1.1 General Description AI7933CLD is a highly integrated IoT module that features an ARM Cortex-M33 application processor, a low power 1x1 802.11a/b/g/n/ac/ax dual-band Wi-Fi subsystem, a Bluetooth v5.2 subsystem, an Audio subsystem with Cadence Tensilica HiFi4 processor and a Power Management Unit (PMU). The Wi-
Fi subsystem and a Bluetooth v5.2 subsystem offer feature-rich wireless connectivity at high standards, and deliver reliable, cost-effective throughput from an extended distance. The AI7933CLD is designed to support standard based features in the areas of security, quality of service and international regulations, giving end users the greatest performance any time and in any circumstance. The AI7933CLD is based on ARM Cortex-M33 with floating point microcontroller (MCU) including SRAM/ROM memory. The module also supports rich peripheral interfaces, including USB2.0, SDIO, SPI master, I2C, I2S, IR input, UART, AUXADC, PWM, and GPIOs. These features are used to download and debug a project on EK-AI7933CLD. The front view of the EK-AI7933CLD including AI7933CLD module in Figure 1. Figure 1. Front view of EK-AI7933CLD Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 4 /29 PRODUCT USER GUIDE www.acsip.com.tw 2. Get started with the HDK Before commencing the application development, you need to configure the development platform. 2.1 Configuring the EK-AI7933CLD The top view of the EK-AI7933CLD is shown in Figure 2. Figure 2. Jumpers and connectors on the EK-AI7933CLD The description of pins (Figure 2) and their functionality is provided below. 1) CON8 transfer USB interface to UART interface, can debug through UART, transmit, and receive a signal form PC. 2) CON8 is a USB 5V power for EK-AI7933CLD, or you can use external 5V power at J1. 3) CON6 is a USB OTG function com port. 4) Press SW1 to reset the system. For SW2~SW5 more detail, please see section 4.4. Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 5 /29 PRODUCT USER GUIDE www.acsip.com.tw 5) For Wi-Fi and BT function AI7933CLD module reserve a Wi-Fi + BT IPEX connector. Please connect external antenna to transmit and receive RF signals. 6) U8 and U9 are on-board AMICs which can catch voice command. 7) U54/U56 are RGB LEDs and these RGB LED will be controlled by SPIM interface. 8) J28 and J87 support multifunction GPIO interface, for more detail please refer to section 4.7. 9) J10 and J11 is audio speaker pin header which can connect 8ohm/2W speaker to achieve voice assistant function. 2.2 Installing the FTDI drivers on Microsoft Windows To configure the EK-AI7933CLD:
1) Connect the EK-AI7933CLD CON8 to the computer using a micro-USB cable. 2) Check your PC is x86 or x64 system. And download and install FTDI Windows serial port driver from Here.
(The red block showed the download file at below figure) 3) If your OS is Windows7 or 10, please open Windows Control Panel then click System and enter Device Manager. 4) In Device Manager, navigate to Ports (COM & LPT) (see Figure 3). 5) A new COM device should appear under Ports (COM & LPT) in Device Manager, as shown in Figure 3. Note the COMx port number of the serial communication port, this information is needed to send command and receive logs from the COM port. Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 6 /29 PRODUCT USER GUIDE www.acsip.com.tw Due to the com port numbers (COMx) are different at different PC. As red block in Figure 3. showed, means CM33 UART. Figure 3. COM port associated with the EK-AI7933CLD Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 7 /29 PRODUCT USER GUIDE www.acsip.com.tw 3. Hardware Features This section provides the main supported features of the EK-AI7933CLD. The detailed description of the features is provided in the upcoming sections. 3.1 Features Description 3.1.1 Technology and Package AI7933CLD LGA-104 module, 32mm X 32mm X 2.7mm (Typ.) 3.1.2 Power Management and Clock Source Integrates high efficiency power management unit with single 3.3V power supply input Integrates 26MHz crystal clock with low power operation in idle mode Integrates 32KHz crystal oscillator or low power sleep mode 3.1.3 Platform ARM Cortex-M33 MCU with FPU with up to 300MHz clock speed Embedded 1MB SRAM and 8MB PSRAM Embedded 16MB serial flash with eXecute In Place (XIP) and on-the-fly AES Supports Hardware crypto engines including AES, DES/3DES, SHA, ECC, TRNG for network security Supports up to 46 General Purpose IOs, which are multiplexed with SDIO, SPI, UART, I2C, I2S, AUXADC, PWM and GPIO interfaces Supports 12 DMA channels Support USB2.0 OTG Support RTC Mode 3.1.4 Audio Cadence Tensilica HiFi4 processor with 600MHzclock speed Audio Codec with 2 ADC and 1 DAC channels On-board headphone jack for external active speaker Embedded 256KB SRAM memory Supports Voice Activity Detection (VAD) and Keyword detection Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 8 /29 PRODUCT USER GUIDE www.acsip.com.tw 3.1.5 Wi-Fi Supports 1x1 20MHz bandwidth, MCS0~8(256-QAM) in 2.4G/5GHz band Support uplink MU-OFDMA TX and downlink MU-OFDMA RX Support Rx STBC Support Tx LDPC (Low-density parity check) IEEE 802.11 1T1R a/b/g/n/ax 5GHz and 2.4GHz Wi-Fi security WFA WPA/WPA2/WPA3 personal, WPS2.0 QOS supports of WFA WMM, WMM PS Support CSI (Channel Signal Information) Support 11ax TWT low power Support antenna diversity 3.1.6 Bluetooth BT5.2 2M_PHY / Long Range / Advertising Extension / SAM / CS#2 / High Duty Cycle Non-Connectable ADV BT4.2 Link Layer Privacy / LE Secure Connection / LE Data Packet Length Extension / Link Layer Extended Scanner Filter Policies Scatternet support: Up to 7 piconets simultaneously with background inquiry/page scan BT4.1 Link Layer Topology / Secure Connection BR/EDR and BLE dual mode concurrent BT4.0 and below BR/EDR Up to 4 BT link + 8 BLE link Packet loss concealment Supports BT/Wi-Fi coexistence Channel quality driven data rate adaptation Channel assessment and WB RSSI for AFH Support SCO and eSCO link with re-transmission 3.1.7 Miscellaneous Embedded eFuse to store specific device information and RF calibration data Advanced TDD mode Wi-Fi/Bluetooth coexistence scheme Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 9 /29 PRODUCT USER GUIDE www.acsip.com.tw 4. Hardware Feature Configuration 4.1 Microcontroller The AI7933CLD features an ARM Cortex-M33 processor, which is the most energy efficient ARM processor currently available. It supports the clock rates up to 200MHz when core power is 0.7V and 300MHz when core power is 0.8V. The MCU executes the Thump-2 instruction set for optimal performance and code size, including hardware division, single cycle multiplication and bit-field manipulation. The AI7933CLD includes a Memory Protection Unit (MPU) in Cortex-M33 MCU to detect unexpected memory access and provides other memory protection features. The AI7933CLD also includes FPU in Cortex-M33 MCU. 4.2 Power supply EK-AI7933CLD supports two types of power supply. 1) Power up with a micro-USB connector. An on-board switching regulator provides voltage of 3.3V for the EK-AI7933CLD, if the power is supplied from an on-board micro-USB connector CON8 (Figure 2). This supply can be isolated from the switching regulator using the jumpers. Note: that the jumpers J2, J3, J4, J5, J27 pin1 and pin2. JP1, JP2, JP5 pin1 and pin2 are required to be set on. More details on the jumpers can be found in Table 1. Figure 4. Default power jumper plot Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 10 /29 PRODUCT USER GUIDE www.acsip.com.tw Table 1 Jumper settings for system power input through USB connection Jumper Usage Comments J1 J2 J3 J4 J5 External 5V power supply transfer to DC-3V3 current DC-5V source Use external power source to supply 5V voltage to EK-AI7933CLD PCB. Pin 1 is 5V source. Pin2 is GND. Current measurement (3V3) Measures the current flow in AI7933CLD module. 3V3 for EEPROM power EEPROM has no parts. 3V3 for external components J25 AVDD33_VRTC battery power supply Use AA or AAA battery for RTC 3V3 power. Pin1 is positive endpoint, Pin2 is GND. J26 Current measurement in RTC mode Measures the current flow in RTC mode for EK-AI7933CLD. J27 3V3 for SD_CARD power JP1 Switch VCCIO_L to 3V3 power domain or 1V8 power domain Select pin 1 & 2, means VCCIO_L use 3V3 power domain Select pin 2 & 3, means VCCIO_L use 1V8 power domain JP2 Switch VCCIO to 3V3 power domain or 1V8 power domain Select pin 1 & 2, means VCCIO use 3V3 power domain Select pin 2 & 3, means VCCIO use 1V8 power domain Caution: The flash of AI7933CLD default using 3V3 power domain, if you want to change VCCIO to 1V8 power domain please rework flash to 1V8 power domain flash (eq. W25Q128JWPIQ) Switch 1V8 VCCIO PHYLDO or external LDO from internal Select pin 2 & 3, means 1V8 VCCIO from internal PHYLDO Select pin 1 & 2, means 1V8 VCCIO from external Buck component Switch RTC 3V3 AVDD33_VRTC from DC-3V3 or Select pin 1 & 2, means RTC_3V3 use DC-3V3 Select pin 2 & 3, means RTC_3V3 use AVDD33_VRTC Switch SD Card to 3V3 power domain or 1V8 power domain Select pin 1 & 2, means SD_CARD power use 1V8 power domain Select pin 2 & 3, means SD_CARD power use 3V3 power domain Switch EEPROM(NC) to 3V3 power domain or 1V8 power domain Select pin 1 & 2, means EEPROM power use 3V3 power domain Select pin 2 & 3, means EEPROM power use 1V8 power domain 5V for (U10) Audio AMP power Pin 1 is EXUSB_5V JP3 JP5 JP7 JP9 J88 J89 5V for (U10) Audio AMP using Pin 1 is EXUSB_5V Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 11 /29 PRODUCT USER GUIDE www.acsip.com.tw 2) Power up using an AA or AAA battery. Connect an external AA or AAA battery to battery pin header (J25) to supply power to the system, as shown in Figure 5. When using RTC mode, please note that remove jumper J2 and plug in jumper J26. Jumper JP5 should be switched to pin2 and pin3. Figure 5. Power up the HDK using an AA or AAA Battery (J25) Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 12 /29 PRODUCT USER GUIDE www.acsip.com.tw 4.3 Audio The EK-AI7933CLD has onboard audio connector associated with different functionalities of the board. The detail of audio related function can refer to Table 2. item J8 J6 Table 2 Audio related function Detail 3.5mm audio jack for external active speaker. Audio-Left_P switch , Pin(3,2,1) Pin define (Amp_L_in_P , Module_audio_out_L, Audio jack_L_in) Select pin 2 & 1, The audio is output by audio jack. Select pin 3 & 2, The audio is output by speaker (J10) J24 Audio-Right_P switch, Pin(3,2,1) Pin define (Audio jack_R_in , Module_audio_out_R ,Amp_R_in_P) Select pin 3 & 2, The audio is output by audio jack. Select pin 2 & 1, The audio is output by speaker (J11) J85 J86 J10 J11 U8 U9 SW2 SW3 Audio-Left_N , Pin(1,2) Pin define (Audio_L_N,GND) Audio-Right_N, Pin(1,2) Pin define (GND, Audio_R_N) Audio header for left speaker Audio header for right speaker AMIC for left channel (the microphone hole is set at back side of EK-AI7933CLD ) AMIC for right channel (the microphone hole is set at back side of EK-AI7933CLD ) Audio volume up button Audio volume down button Figure 6 . Audio Jumper and connector Locations Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 13 /29 PRODUCT USER GUIDE www.acsip.com.tw 4.4 Buttons The EK-AI7933CLD is equipped with buttons with the following functionality. The push buttons are shown in Figure 2. The detail of buttons can refer to Table 3. Button Name Detail Table 3 Buttons SW1 SW2 SW3 SW4 SW5 SYSRST Press SW1 to restart the EK-AI7933CLD Vol+
Vol-
Audio volume up button Audio volume down button RTC_EINT Press SW4 to enable RTC mode Force DL mode Press SW5 to trigger strapping mode (download mode) 4.5 RGB LED As Figure7 showed, the EK-AI7933CLD has on-board RGB LEDs (U54/U56) which be controlled by SPIM interface. Please note that ensure jumper J79 and J80 are connected before using RGB LED function If you want to cascade more RGB LED, you can connect to J78 Figure 7. RGB LED Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 14 /29 PRODUCT USER GUIDE www.acsip.com.tw 4.6 SD Card The EK-AI7933CLD reserve a SD card slot to provide user to save data into a SD card. And note that there are some registers which placed need to be reworked before using SD card. Please refer to figure.6 and switch R756 to R757; switch R745 to R751; switch R744 to R750; switch R746 to R747; switch R748 to R749; switch R754 to R755; switch R752 to R753. Figure 8. SD card slot rework Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 15 /29 PRODUCT USER GUIDE www.acsip.com.tw 4.7 Extension connectors The EK-AI7933CLD provides similar pin-out extension connectors for various sensor and device connectivity, as shown in Figure.7 and described in Table 4. The board has 46 GPIOs multiplexed with other interfaces. Depending on the use case, user can configure each I/O functionality. GPIO-39 Default to NC Note: GPIO-12 & GPIO-C_12 is the same circuit Figure 9. GPIO pin-out extension connectors Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 16 /29 PRODUCT USER GUIDE www.acsip.com.tw Table 4 GPIO pin-out extension connectors Signal Name Connector Pin Number Signal Name Connector Pin Number GPIO_0 Reserve for flash GPIO_1 Reserve for flash GPIO_2 Reserve for flash GPIO_3 Reserve for flash GPIO_4 Reserve for flash GPIO_5 Reserve for flash GPIO_27 J87 - 18 GPIO_28 J87 - 20 GPIO_29 J28 - 15 GPIO_30 J28 - 17 GPIO_31 J28 - 19 Reserve for USB OTG GPIO_32 J28 - 21 Reserve for USB OTG GPIO_6 J28 - 2 Reserve for Arduino: SPI0_SCK GPIO_33 J28 - 23 Reserve for USB OTG GPIO_7 J28 - 4 Reserve for Arduino: SPI0_CSN GPIO_34 J28 - 25 Reserve for USB OTG GPIO_8 J28 - 6 Reserve for Arduino: SPI0_MISO GPIO_35 J28 - 18 GPIO_9 J28 - 8 Reserve for Arduino: SPI0_MOSI GPIO_36 J28 - 20 GPIO_10 J28 - 10 GPIO_11 J28 - 12 GPIO_12 J87 - 5 GPIO_13 J87 - 7 GPIO_14 J87 - 9 GPIO_15 J87 - 11 GPIO_17 J87 - 13 GPIO_18 J87 - 15 GPIO_37 J28 - 22 GPIO_38 J28 - 24 GPIO_39 J28 - 29 Default for AU_AMP_MUTE GPIO_40 J28 - 27 GPIO_41 J28 - 1 GPIO_42 J28 - 30 Reserve for Arduino: UART1_RX GPIO_43 J28 - 3 GPIO_44 J28 - 28 Reserve for Arduino: UART1_TX GPIO_19 J87 - 17 Reserve for Arduino: I2C1_SDA GPIO_45 J28 - 5 GPIO_20 J87 - 19 Reserve for Arduino: I2C1_SCL GPIO_46 J28 - 7 GPIO_21 J87 - 21 GPIO_22 J87 - 23 GPIO_23 J87 - 25 GPIO_24 J87 - 12 GPIO_25 J87 - 14 GPIO_26 J87 - 16 GPIO_47 J87 - 2 GPIO_48 J87 - 6 Reserve for CM33 UART GPIO_49 J87 - 4 GPIO_50 J87 - 8 Reserve for CM33 UART GPIO_51 J28 - 9 GPIO_52 J28 - 11 Note: GPIO_39 is AU_AMP_MUTE by default. When using pin headers J28-29pin, resistor R161 needs to be switched to Location of R160. Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 17 /29 PRODUCT USER GUIDE www.acsip.com.tw Table 5 GPIO pin multi-function definition IO Name CR Value Default*
Name Dir PAD_SYSRST_B NA PAD_SYSRST_B SDIO_CLK SDIO_CMD SDIO_DAT0 SDIO_DAT1 SDIO_DAT2 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 GPIO[6]
SDIO_CLK MSDC0_CLK SPIM0_SCK CM33_GPIO_EINT0 DEBUG_0 ANT_SEL0 BGF_EINT_10_B GPIO[7]
SDIO_CMD MSDC0_CMD SPIM0_CS_N CM33_GPIO_EINT1 DEBUG_1 ANT_SEL1 PINMUX_EXT_INT_N_IN GPIO[8]
SDIO_DAT0 MSDC0_DAT0 SPIM0_MISO UART0_RTS DEBUG_2 ANT_SEL2 CM33_GPIO_EINT0 GPIO[9]
SDIO_DAT1 MSDC0_DAT1 SPIM0_MOSI UART0_CTS DEBUG_3 ANT_SEL3 CM33_GPIO_EINT1 GPIO[10]
SDIO_DAT2 MSDC0_DAT2 I2SIN_DAT0 UART0_RX DEBUG_4 I2C0_SCL CM33_GPIO_EINT2 I/O I O O I O O I I/O I/O I/O O I O O I I/O O I/O I O O O I I/O I/O I/O O I O O I I/O I/O I/O I I O I/O I Default Dir PU/PD PU I PD Description Chip hardware GPIO 6 SDIO Clock MSDC Clock SPI0 (Master) Clock CM33 EINT0 Debug signal Antenna Select 0 GPIO 7 SDIO Command I PU SPI0 (Master) Chip Select CM33 EINT1 Debug signal Antenna Select 1 GPIO 8 SDIO Data[0]
MSDC0 data0 I PU SPI0 (Master) Input Debug signal Antenna Select 2 CM33 EINT0 GPIO 9 SDIO Data[1]
MSDC0 data1 SPI0 (Master) Output UART0 Control Debug signal Antenna Select 3 CM33 EINT1 GPIO 10 SDIO Data[2]
MSDC0 data2 UART0 RX Debug signal CM33 EINT2 I PU I PU Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 18 /29 PRODUCT USER GUIDE www.acsip.com.tw IO Name CR Value Default*
Name Dir Default Dir PU/PD Description SDIO_DAT3 GPIO_B_0 GPIO_B_1 GPIO_B_2 GPIO_B_3 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 GPIO[11]
SDIO_DAT3 MSDC0_DAT3 I2SO_DAT0 UART0_TX DEBUG_5 I2C0_SDA CM33_GPIO_EINT3 GPIO[12]
0001 *
CONN_BGF_UART0_TXD 0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 MSDC0_RST CONN_BT_TXD WIFI_TXD DEBUG_6 ANT_SEL3 CM33_GPIO_EINT4 GPIO[13]
USB_IDDIG SPIM1_SCK I2SO_BCK UART1_RX DEBUG_7 ANT_SEL4 CM33_GPIO_EINT5 GPIO[14]
USB_DRV_VBUS SPIM1_MOSI I2SO_LRCK DEBUG_8 ANT_SEL5 CM33_GPIO_EINT6 GPIO[15]
USB_OC SPIM1_MISO I2SO_MCK I2SIN_MCK DEBUG_9 ANT_SEL6 CM33_GPIO_EINT7 GPIO[17]
0001 *
CONN_BGF_UART0_RXD GPIO_B_5
(AUXADC) 0010 0011 0100 0101 0110 0111 UART0_RX TDMIN_MCLK DMIC_CLK0 DEBUG_11 ANT_SEL8 CM33_GPIO_EINT9 I/O I/O I/O O O O I I I/O O O O O O O I I/O I O O I O O I I/O O O O O O I I/O I I O O O O I I/O I I I O O O I GPIO 11 SDIO Data[3]
I2SO Data UART0 TX Debug signal I2C0 Data CM33 EINT3 GPIO 12 MSDC0 reset I PU O PU Debug signal Antenna Select 3 CM33 EINT4 GPIO 13 USB OTG ID pin SPIM1 (Master) Clock I PU I2SO BCK UART1 RX Antenna Select 4 CM33 EINT5 GPIO 14 USB OTG host mode SPI1 (Master) Output I2SO LRCK Debug signal Antenna Select 5 CM33 EINT6 GPIO 15 USB Host mode over-
SPI1 (Master) Input I2STX MCLK I2SRX MCK Debug signal Antenna Select 6 CM33 EINT7 GPIO 17 UART0 RX DMIC CLK0 Debug signal Antenna Select 8 CM33 EINT9 O PD I PD I PU Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 19 /29 PRODUCT USER GUIDE www.acsip.com.tw IO Name CR Value Default*
Name GPIO_B_6
(AUXADC) GPIO_B_7
(AUXADC) GPIO_B_8
(AUXADC) GPIO_B_9
(AUXADC) GPIO_B_10
(AUXADC) GPIO_B_11
(AUXADC) 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 GPIO[18]
CONN_BT_TXD UART0_TX TDMIN_BCK DMIC_DAT0 UART1_RX IR_IN CM33_GPIO_EINT10 GPIO[19]
WIFI_TXD UART0_RTS I2C1_SDA I2SIN_LRCK UART1_TX PTA_EXT_IF_FREQ CM33_GPIO_EINT11 GPIO[20]
CONN_WF_MCU_AICE_TCK UART0_CTS I2C1_SCL I2SIN_BCK DEBUG_12 PTA_EXT_IF_FACT CM33_GPIO_EINT12 GPIO[21]
CONN_WF_MCU_AICE_TMS PTA_EXT_IF_PRI TDMIN_LRCK DMIC_DAT1 DEBUG_13 ANT_SEL9 CM33_GPIO_EINT13 GPIO[22]
CONN_BGF_MCU_AICE_TCK PTA_EXT_IF_WLAN_ACT TDMIN_DI DMIC_DAT2 DEBUG_14 ANT_SEL10 CM33_GPIO_EINT14 GPIO[23]
CONN_BGF_MCU_AICE_TM DSP_URXD0 I2C0_SDA DMIC_DAT3 DEBUG_15 ANT_SEL11 CM33_GPIO_EINT15 Dir I/O O O I I I I I I/O O O I O O I I I/O I I I O O I I I/O I/O I/O I/O I O O I I/O I O I I O O I I/O I/O I I/O I O O Default Dir PU/PD Description O PU O PD I PD I PU I PD I PU GPIO 18 UART0 TX DMIC DAT0 UART1 Control CM33 EINT10 GPIO 19 UART0 Control I2C1 Data I2SRX LRCK UART1 TX CM33 EINT11 GPIO 20 UART0 Control I2C1 clock I2SRX BCK Debug signal CM33 EINT12 GPIO 21 DMIC DAT1 Debug signal Antenna Select 9 CM33 EINT13 GPIO 22 DMIC Data2 Debug signal Antenna Select 10 CM33 EINT14 GPIO 23 I2C0 Data DMIC Data3 Debug signal Antenna Select 11 CM33 EINT15 Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 20 /29 PRODUCT USER GUIDE www.acsip.com.tw IO Name CR Value Default*
Name Dir Default Dir PU/PD Description GPIO_B_12
(AUXADC) GPIO_B_13 GPIO_B_14 GPIO_B_15 GPIO_B_16 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 GPIO[24]
ADSP_JTAG_TDO DSP_UTXD0 I2C0_SCL DMIC_CLK1 CM33_UART_TX ANT_SEL12 CM33_GPIO_EINT16 GPIO[25]
ADSP_JTAG_TCK CM33_UART_RX UART0_RX SPIM0_SCK UART1_RX CM33_GPIO_EINT17 GPIO[26]
ADSP_JTAG_TRST CM33_UART_TX UART0_TX SPIM0_CS_N UART1_TX CM33_GPIO_EINT18 GPIO[27]
ADSP_JTAG_TDI CM33_UART_RTS UART0_RTS SPIM0_MISO UART1_RTS CM33_GPIO_EINT19 GPIO[28]
ADSP_JTAG_TMS CM33_UART_CTS UART0_CTS SPIM0_MOSI SPIS_MISO UART1_CTS CM33_GPIO_EINT20 I/O O O I/O O O O I I/O I I I O I I I O O O O I I/O I O O I O I I/O I I I O O I I O PU I PD I PU I PU I PU GPIO 24 DSP JTAG I2C0 clock DMIC CLK1 CM33 UART TX Antenna Select 12 CM33 EINT16 GPIO 25 DSP JTAG CM33 UART RX UART0 Control SPIM0 clock UART1 RX CM33 EINT17 (SPIS_SCK) GPIO 26 DSP JTAG CM33 UART TX UART0 TX SPIM0 CS UART1 TX CM33 EINT18 (SPIS_SC_N) GPIO 27 DSP JTAG CM33 UART RTS UART0 RTS SPIM0 MISO UART1 Control CM33 EINT19 (SPIS_MOSI) GPIO 28 DSP JTAG CM33 UART CTS UART0 Control SPIM0 MOSI SPIS MISO UART1 Control CM33 EINT20 (GPIO) Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 21 /29 PRODUCT USER GUIDE www.acsip.com.tw IO Name CR Value Default*
Name Dir Default Dir PU/PD Description GPIO_R_0 GPIO_R_1 GPIO_R_2 GPIO_R_3 GPIO_R_4 GPIO_R_5 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 GPIO[29]
DSP_URXD0 ADSP_JTAG_TDO PWM_0 PTA_EXT_IF_PRI CONN_WF_MCU_TDO CM33_RSVD1 CM33_GPIO_EINT21 GPIO[30]
DSP_UTXD0 ADSP_JTAG_TCK PWM_1 PTA_EXT_IF_WLAN_ACT CONN_WF_MCU_TCK CM33_RSVD3 CM33_GPIO_EINT22 GPIO[31]
USB_DRV_VBUS ADSP_JTAG_TRST PWM_2 PTA_EXT_IF_FREQ CONN_WF_MCU_TDI CM33_RSVD0 CM33_GPIO_EINT23 GPIO[32]
USB_OC ADSP_JTAG_TDI PWM_3 PTA_EXT_IF_ACT CONN_WF_MCU_TRSR_B CM33_RSVD2 CM33_GPIO_EINT24 GPIO[33]
USB_VBUS_VALID ADSP_JTAG_TMS PWM_4 I2C1_SDA CONN_WF_MCU_TMS CM33_RSVD4 CM33_GPIO_EINT25 GPIO[34]
USB_IDDIG I2C0_SCL PWM_5 I2C1_SCL EXT_CK DEBUG_0 CM33_GPIO_EINT26 I/O I O O I/O O I I I/O O I O O I I/O I I/O O I O I I I I I/O I I O I I I I I/O I I O I I O I I/O I I O I I O I GPIO29 DSP JTAG PWM0 CM33 EINT21 GPIO 30 DSP JTAG PWM 1 I PU O PD CM33 EINT22 GPIO 31 USB Host mode VBUS driving DSP JTAG PWM2 O PD CM33 EINT23 GPIO 32 USB Host mode over-current DSP JTAG PWM3 I PD CM33 EINT24 GPIO 33 USB device mode VBUS detect I PD DSP JTAG PWM 4 I2C1 Data I PU CM33 EINT25 GPIO 34 USB OTG ID pin I2C0 clock PWM 5 I2C1 clock Debug signal CM33 EINT26 Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 22 /29 PRODUCT USER GUIDE www.acsip.com.tw IO Name CR Value Default*
Name GPIO_R_6 GPIO_R_7 GPIO_R_8 GPIO_R_9 GPIO_R_10 GPIO_R_11 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 *
0001 0010 0011 0100 0101 0110 0111 GPIO[35]
UART0_TX CM33_UART_RTS PWM_6 PWM_2 CONN_BGF_MCU_TDO DEBUG_1 CM33_GPIO_EINT27 GPIO[36]
DBSYS_NTRST CM33_UART_CTS PWM_7 PWM_3 CONN_BGF_MCU_TCK DEBUG_2 CM33_GPIO_EINT28 0000 *
GPIO[37]
0001 0010 0011 0100 0101 0110 0111 0000 *
0001 0010 0011 0100 0101 0110 0111 0000 *
0001 0010 0011 0100 0101 0110 0111 0000 *
0001 0010 0011 0100 0101 0110 0111 DBSYS_SWCLK_TCLK I2C1_SDA PWM_8 I2C0_SDA CONN_BGF_MCU_TDI DEBUG_3 CM33_GPIO_EINT29 GPIO[38]
DBSYS_TDI CM33_UART_TX PWM_9 I2C0_SDA CONN_BGF_MCU_TRST_B I2C1_SCL CM33_GPIO_EINT30 GPIO[39]
DBSYS_SWDIO_TMS I2C0_SDA PWM_10 DSP_URXD0 CONN_BGF_MCU_TMS ANT_SEL0 BGF_EINT_10_B GPIO[40]
DBSYS_TDO CM33_UART_RX PWM_11 DSP_UTXD0 UART0_RX ANT_SEL1 PINMUX_EXT_INT_N_IN Dir I/O O O O O O O I I/O I I O O I O I I/O I I O I O I I/O I O O I/O I I/O I I/O I/O I O I I O I I/O O I O O I O I Default Dir PU/PD Description O PD I PD GPIO 35 UART0 TX CM33 UART RTS PWM 6 PWM 2 Debug signal CM33 EINT27 GPIO 36 CM33 UART CTS PWM 7 PWM 3 Debug signal CM33 EINT28 GPIO 37 I PD I2C1 PWM 8 I2C 0 I PD I PD Debug signal CM33 EINT29 GPIO 38 CM33 UART TX PWM 9 I2C0 Data I2C1 CM33 EINT30 GPIO 39 I2C0 Data PWM 10 Antenna Select 0 GPIO 40 O PU PWM 11 UART0 RX Antenna Select 1 Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 23 /29 PRODUCT USER GUIDE www.acsip.com.tw IO Name CR Value Default*
Name GPIO_T_0 GPIO_T_1 GPIO_T_2 GPIO_T_3 GPIO_T_4 GPIO_T_5 0000 0001 0010 *
0011 0100 0101 0110 0111 0000 0001 GPIO[41]
CM33_RSVD0 DBSYS_NTRST I2C0_SDA CONN_BGF_UART0_RXD I2C1_SDA ANT_SEL2 CM33_GPIO_EINT0 GPIO[42]
CM33_RSVD1 0010 *
DBSYS_SWCLK_TCLK 0011 0100 0101 0110 0111 0000 0001 0010 *
0011 0100 0101 0110 0111 0000 0001 UART1_RX UART0_RX DSP_URXD0 ANT_SEL3 CM33_GPIO_EINT1 GPIO[43]
CM33_RSVD2 DBSYS_TDI I2C0_SCL CONN_BGF_UART0_TXD I2C1_SCL ANT_SEL4 CM33_GPIO_EINT17 GPIO[44]
CM33_RSDV3 0010 *
DBSYS_SWDIO_TMS 0011 0100 0101 0110 0111 0000 0001 0010 *
0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 UART1_TX UART0_TX DSP_UTXD0 ANT_SEL5 CM33_GPIO_EINT18 GPIO[45]
CM33_RSVD4 DBSYS_TDOO I2C1_SDA WIFI_TXD PWM_0 ANT_SEL6 CM33_GPIO_EINT19 GPIO[46]
SPIM0_SCK CM33_TRACE_CLK I2C1_SCL ONN_WF_MCU_AICE_TCKC PWM_1 ANT_SEL7 I I I I 1 O I I/O I I I I I O I I/O I I I O 1 O I I/O I/O I O O O O I I/O O O I O O O I I/O O O I I O O Default Dir PU/PD Dir I/O I PD Description GPIO 41 CM33 JTAG I2C0 Data I2C1 Data Antenna Select 2 CM33 EINT0 GPIO 42 CM33 JTAG, CM33_SWD I PD UART1 RX UART0 RX I PD Antenna Select 3 CM33 EINT1 GPIO 43 CM33 JTAG I2C0 clock I2C1 clock Antenna Select 4 CM33 EINT17 GPIO 44 CM33 JTAG, CM33_SWD I PD UART1 TX UART0 TX O PU Antenna Select 5 CM33 EINT18 GPIO 45 CM33 JTAG I2C1 Data PWM0 Antenna Select 6 CM33 EINT19 GPIO 46 SPIM0 SCK O PU I2C1 PWM 1 Antenna Select 7 Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 24 /29 PRODUCT USER GUIDE www.acsip.com.tw IO Name CR Value default*
Name Dir Default Dir PU/PD Description GPIO_T_6 GPIO_T_7 GPIO_T_8 GPIO_T_9 GPIO_T_10 GPIO_T_11 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 0000 0001 *
0010 0011 0100 0101 0110 0111 GPIO[47]
SPIM0_CS_N CM33_TRACE_D3 KEYPAD_KPROW_0 CONN_WF_MCU_AICE_TMSC PWM_2 ANT_SEL8 CM33_GPIO_EINT2 GPIO[48]
CM33_UART_RX CM33_TRACE_D2 KEYPAD_KPROW_1 DSP_URXD0 PWM_3 ANT_SEL9 AUDIO_DEBUG_IN_0 GPIO[49]
CM33_UART_TX CM33_TRACE_D1 KEYPAD_KPROW_2 CONN_BT_TXD PWM_4 ANT_SEL10 AUDIO_DEBUG_IN_1 GPIO[50]
CM33_UART_TX CM33_TRACE_D0 KEYPAD_KPCOL_0 DSP_UTXD0 PWM_5 ANT_SEL11 AUDIO_DEBUG_IN_2 GPIO[51]
SPIM0_MISO CM33_SWO KEYPAD_KPCOL_1 CONN_BGF_MCU_AICE_TCKC PWM_6 ANT_SEL12 AUDIO_DEBUG_IN_3 GPIO[52]
SPIM0_MOSI CM33_UART_RX KEYPAD_KPCOL_2 I/O O O I/O I/O O O I I/O I O I/O I O O I I/O O O I/O O O O I I/O O O I O O O I I/O I O I I O O I I/O O I I CONN_BGF_MCU_AICE_TCKC I/O PWM_7 UART1_TX AUDIO_DEBUG_IN_4 O O I O PU I PU O PU O PU I PD O PU GPIO 47 SPIM0 CS PWM 2 Antenna Select 8 CM33 EINT2 GPIO 48 PWM 3 Antenna Select 9 GPIO 49 PWM 4 Antenna Select 10 GPIO 50 PWM 5 Antenna Select 11 GPIO 51 SPIM0 MISO PWM 6 Antenna Select 12 GPIO 52 SPIM0 MOSI CM33 UART RX PWM 7 UART1 TX Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 25 /29 PRODUCT USER GUIDE www.acsip.com.tw 4.8 RTC The AI7933CLD features a RTC module The clock source operates at 32.768kHz crystal oscillator. The RTC has built-in accurate timer to wake up the system when the user-defined timer expires. The RTC uses a different power source from the Power Management Unit (PMU). In retention mode, the PMU is turned off while the RTC module remains powered on. The RTC module only consumes 3A in retention mode. Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 26 /29 PRODUCT USER GUIDE www.acsip.com.tw Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:
Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. FCC Caution: Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. IMPORTANT NOTE:
FCC Radiation Exposure Statement:
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator &
your body. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Country Code selection feature to be disabled for products marketed to the US/CANA Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 27 /29 PRODUCT USER GUIDE www.acsip.com.tw Integration instructions for host product manufacturers Applicable FCC rules to module FCC Part 15.247 FCC Part 15.407 Summarize the specific operational use conditions The module is must be installed in mobile device. This device is intended only for OEM integrators under the following conditions:
1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. IMPORTANT NOTE: In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Limited module procedures Not applicable Trace antenna designs Not applicable RF exposure considerations Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 28 /29 PRODUCT USER GUIDE www.acsip.com.tw 20 cm separation distance and co-located issue shall be met as mentioned in Summarize the specific operational use conditions. Product manufacturer shall provide below text in end-product manual This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator & your body. Antennas Brand Name Model Name Antenna Type Antenna Gain Antenna Connector SINBON SINBON IAHA202205004 IAHA202205005 PCB Dipole FPC Dipole 4.99 dBi 4.36 dBI RF Mini Plug RF Mini Plug Label and Compliance Information Product manufacturers need to provide a physical or e-label stating Contains FCC ID: 2ADWC-AI7933CLD with finished product Information on Test Modes and Additional Testing Requirements Test tool: termite-3.3 shall be used to set the module to transmit continuously. Additional Testing, Part 15 Subpart B Disclaimer The module is only FCC authorized for the specific rule parts listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification. The final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed. Product Name Version Doc No Date Page EK-AI7933CLD B 912-13903-
2022/06/22 29 /29