FCC ID: VNR-E32ED-X5B-00 2.4GHz IEEE802.15.4 compliant antenna diversity radio transceiver

Atmel AVR2092: REB232ED - Hardware User Manual Features High-performance, 2.4GHz, RF-CMOS Atmel AT86RF232 radio transceiver Industry leading 104dB link budget targeted for IEEE 802.15.4, ZigBee, and ISM applications

- Ultra-low current consumption

- Ultra-low supply voltage (1.8V to 3.6V) Hardware supported antenna diversity RF reference design and high-performance evaluation platform Board information EEPROM Interfaces to several of the Atmel microcontroller development platforms

- MAC address

- Board identification, features, and serial number

- Crystal calibration values 8-bit Atmel Microcontrollers Application Note 1 Introduction This manual describes the REB232ED radio extender board supporting antenna diversity in combination with the Atmel AT86RF232 radio transceiver. Detailed information is given in the individual sections about the board functionality, the board interfaces, and the board design. The REB232ED connects directly to the REB controller base board (REB-CBB), or can be used as an RF interface in combination with one of the Atmel microcontroller development platforms. The REB232ED together with a microcontroller forms a fully functional wireless node. Figure 1-1. Top (with removed RF shield) and bottom views of the REB232ED. Rev. 8427A-AVR-10/11 2 Disclaimer Typical values contained in this application note are based on simulations and testing of individual examples. Any information about third-party materials or parts was included in this document for convenience. The vendor may have changed the information that has been published. Check the individual vendor information for the latest changes. 2 Atmel AVR2092 8427A-AVR-10/11 3 Overview Atmel AVR2092 The radio extender board is assembled with an Atmel AT86RF232 radio transceiver

[1] and two ceramic antennas, and demonstrates the unrivaled hardware-based antenna diversity feature, which significantly improves radio link robustness in harsh environments. The radio extender board was designed to interface to the Atmel microcontroller development or evolution platforms. The microcontroller platform in combination with the REB provides an ideal way to:

Evaluate the outstanding radio transceiver performance, such as the excellent receiver sensitivity achieved at ultra-low current consumption Test the radio transceivers comprehensive hardware support of the IEEE 802.15.4 standard Test the radio transceivers enhanced feature set, which includes antenna diversity, AES, high data rate modes and other functions The photograph in Figure 3-1 shows a development and evaluation setup using the REB controller base board (REB-CBB) [2] in combination with the REB232ED radio extender board. Figure 3-1. The REB232ED (with removed RF shield) connected to a REB-CBB. 8427A-AVR-10/11 3 4 Functional description The block diagram of the REB232ED radio extender board is shown in Figure 4-1. The power supply pins and all digital I/Os of the radio transceiver are routed to the 2 x 20-pin expansion connector to interface to a power supply and a microcontroller. The Atmel AT86RF232 antenna diversity (AD) feature supports the control of two antennas (ANT0/ANT1). A digital control pin (DIG1) is used to control an external RF switch selecting one of the two antennas. During the RX listening period, the radio transceiver switches between the two antennas autonomously, without the need for microcontroller interaction, if the AD algorithm is enabled. Once an IEEE 802.15.4 synchronization header is detected, an antenna providing sufficient signal quality is selected to receive the remaining frame. This ensures reliability and robustness, especially in harsh environments with strong multipath fading effects. Board-specific information such as board identifier, the node MAC address, and production calibration values are stored in an ID EEPROM. The SPI bus of the EEPROM is shared with the radio transceivers interface. Figure 4-1. REB232ED block diagram. ANT0 ANT1 50Ohm

F R h c t i w S TP6 TP7 l n u a B DIG3 DIG4 RFP RFN DIG1 2 G D I X T A L 1 X T A L 2 XTAL JP1 Protection VDD VSS RSTN DIG2 IRQ SLPTR CLKM 4 SPI ID EEPROM 1 D N A P X E 4.1 Interface connector specification The REB is equipped with a 2 x 20-pin, 100mil expansion connector. The pin assignment enables a direct interface to the REB-CBB [2]. Further, the interface connects to the Atmel STK500/501 microcontroller development platform to enable support for various Atmel 8-bit AVR microcontrollers. The REB is preconfigured to interface to an STK501 with an Atmel ATmega1281. If an Atmel ATmega644 is used as the microcontroller, the 0 resistors R10 through R18 must be removed and re-installed on the board manually as resistors R20 through R28 (see exhibit Appendix A). Other microcontroller development platforms need to be interfaced using a special adapter board. 4 Atmel AVR2092 8427A-AVR-10/11 4.1.1 Atmel ATmega1281 configuration Atmel AVR2092 Table 4-1. Default expansion connector mapping (ATmega1281 configuration). Pin# Function 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 GND n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. Vcc GND PB6 (open) PB4 (SLPTR) PB2 (MOSI) PB0 (SEL) PD6 (MCLK) PD4 (DIG2) PD2 (open) PD0 (IRQ) EE#WP (write protect EEPROM) Pin# Function 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 GND n.c. n.c. n.c. n.c. n.c. n.c. n.c. XT1 (MCLK) Vcc GND PB7 (open) PB5 (RSTN) PB3 (MISO) PB1 (SCLK) PD7 (TP1) PD5 (TP2) PD3 (TP3) PD1 (TP4) GND 4.1.2 Atmel ATmega644 configuration Table 4-2. Expansion connector mapping when assembled for ATmega644. Pin# Function 1 3 5 7 9 11 13 15 17 19 21 23 25 27 Pin# Function 2 4 6 8 10 12 14 16 18 20 22 24 26 28 GND n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. Vcc GND PB6 (MISO) PB4 (SEL) PB2 (RSTN) GND n.c. n.c. n.c. n.c. n.c. n.c. n.c. XT1 (MCLK) Vcc GND PB7 (SCLK) PB5 (MOSI) PB3 (open) 8427A-AVR-10/11 5 4.2 ID EEPROM Pin# Function 29 31 33 35 37 39 PB1 (MCLK) PD7 (SLPTR) PD5 (TP2) PD3 (TP3) PD1 (TP4) GND Pin# Function 30 32 34 36 38 40 PB0 (open) PD6 (DIG2) PD4 (open) PD2 (IRQ) PD0 (open) EE#WP (write protect EEPROM) To identify the board type by software, an optional identification (ID) EEPROM is populated. Information about the board, the node MAC address and production calibration values are stored here. An Atmel AT25010A [8] with 128 x 8-bit organization and SPI bus is used because of its small package and low-voltage / low-

power operation. The SPI bus is shared between the EEPROM and the transceiver. The select signal for each SPI slave (EEPROM, radio transceiver) is decoded with the reset line of the transceiver, RSTN. Therefore, the EEPROM is addressed when the radio transceiver is held in reset (RSTN = 0) (see Figure 4-2). Figure 4-2. EEPROM access decoding logic (Atmel ATmega1281 configuration). PB 5 ( RSTN) RSTN PB 0 ( SEL ) PB 1 ..3 (SPI ) SEL#

SPI

>1

>1

/RST Transceiver AT86RF232

/SEL On-Board EEPROM

#CS The EEPROM data are written during board production testing. A unique serial number, the MAC address1, and calibration values are stored. These can be used to optimize system performance. Final products do not require this external ID EEPROM. All data can be stored directly within the microcontrollers internal EEPROM. 1 Note: MAC addresses used for this package are Atmel property. The use of these MAC addresses for development purposes is permitted. 8427A-AVR-10/11 6 Atmel AVR2092 Atmel AVR2092 Type Description Table 4-3 shows a detailed description of the EEPROM data structure. Table 4-3. ID EEPROM mapping. Address Name 0x00 0x08 0x10 0x11 0x14 MAC address uint64 MAC address for the 802.15.4 node, little endian byte order Serial number uint64 Board serial number, little endian byte order Board family uint8 Revision Feature uint8[3] Board revision number ##.##.##

uint8 Board features, coded into seven bits Internal board family identifier 7 6 5 4 3 2 1 0 Reserved Reserved External LNA External PA Reserved Diversity Antenna SMA connector RF232 XTAL calibration value, register XTAL_TRIM Atmel ATmega1281 internal RC oscillator calibration value @

3.6V, register OSCCAL ATmega1281 internal RC oscillator calibration value @ 2.0V, register OSCCAL Antenna gain [resolution 1/10dBi]. For example, 15 will indicate a gain of 1.5dBi. The values 00h and FFh are per definition invalid. Zero or

-0.1dBi has to be indicated as 01h or FEh 0x15 0x16 uint8 Cal OSC 16MHz Cal RC 3.6V uint8 0x17 Cal RC 2.0V uint8 0x18 Antenna gain int8 0x20 0x3E Board name char[30] Textual board description CRC uint16 16-bit CRC checksum, standard ITU-T generator polynomial G16(x) = x16 + x12 + x5 + 1 Figure 4-3. Example EEPROM dump.

-----| EEPROM dump |--------------

0000 - 49 41 17 FF FF 25 04 00 D6 11 00 00 2A 00 00 00 IA...%......*... 0010 - 02 04 01 01 06 02 A8 A9 01 FF FF FF FF FF FF FF ................ 0020 - 52 61 64 69 6F 45 78 74 65 6E 64 65 72 32 33 32 RadioExtender232 0030 - 45 44 00 00 00 00 00 00 00 00 00 00 00 00 8D 9B ED.............. 0040 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 0050 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 0060 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 0070 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................

8427A-AVR-10/11 7 4.3 Supply current sensing The power supply pins of the radio transceiver are protected against overvoltage stress and reverse polarity at the EXPAND1 pins (net CVTG, net DGND) using a Zener diode (D1) and a thermal fuse (F1) (see Exhibit Appendix A). This is required because the Atmel STK500 will provide 5V as default voltage, and the board can also be mounted with reverse polarity. Depending on the actual supply voltage, the diode D1 can consume several milliamperes. This has to be considered when the current consumption of the whole system is measured. In such a case, D1 should be removed from the board. To achieve the best RF performance, the analog (EVDD) and digital (DEVDD) supply are separated from each other by a CLC PI-filter. Digital and analog ground planes are connected together on the bottom layer, underneath the radio transceiver IC. Further details are described in Section 5, page 10. A jumper, JP1, is placed in the supply voltage trace to offer an easy way for current sensing to occur. All components connected to nets DEVDD/EVDD contribute to the total current consumption. While in radio transceiver SLEEP state, most of the supply current is drawn by the 1M pull-up resistor, R9, connected to the ID EEPROM and the EEPROM standby current. Figure 4-4. Power supply routing. NOTE 4.4 Radio transceiver reference clock The integrated radio transceiver is clocked by a 16MHz reference crystal. The 2.4GHz modulated signal is derived from this clock. Operating the node according to IEEE 802.15.4 [4], the reference frequency must not exceed a deviation of 40ppm. The absolute frequency is mainly determined by the external load capacitance of the crystal, which depends on the crystal type and is given in its datasheet. The radio transceiver reference crystal, Q1, shall be isolated from fast switching digital signals and surrounded by a grounded guard trace to minimize disturbances of the oscillation. Detailed layout considerations can be found in Section 5.3, page 12. The REB uses a Siward CX4025 crystal with load capacitors of 10pF and 12pF. The imbalance between the load capacitors was chosen to be as close as possible to the desired resonance frequency with standard components. To compensate for fabrication and environment variations, the frequency can be further tuned using the radio transceiver register XOSC_CTRL (0x12) (refer to [1], Section References, page 36). The REB production test guarantees a tolerance of within +20ppm and -5ppm. The correction value, to be applied to TRX register XOSC_CTRL (0x12), is stored in the onboard EEPROM (see Section 4.2, page 6). 8 Atmel AVR2092 8427A-AVR-10/11 NOTE 4.5 RF section Atmel AVR2092 The reference frequency is also available at pin CLKM of the radio transceiver and, depending on the related register setting; it is divided by an internal prescaler. CLKM clock frequencies of 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 250kHz, or 62.5kHz are programmable (refer to [1]). The CLKM signal is filtered by a low-pass filter to reduce harmonic emissions within the 2.4GHz ISM band. The filter is designed to provide a stable 1MHz clock signal with correct logic level to a microcontroller pin with sufficiently suppressed harmonics. CLKM frequencies above 1MHz require a redesign of R8 and C36. In case of RC cut-off frequency adjustments, depending on the specific load and signal routing conditions, one may observe performance degradation of channel 26. Channel 26 (2480MHz) is affected by the following harmonics: 155 x 16MHz or 310 x 8MHz. By default, CLKM is routed to a microcontroller timer input; check the individual configuration resistors in the schematic drawing. To connect CLKM to the microcontroller main clock input, assemble R3 with a 0 resistor. The Atmel AT86RF232 radio transceiver incorporates all RF and BB critical components necessary to transmit and receive signals according to IEEE 802.15.4 or proprietary ISM data rates. A balun, B1, performs the differential to single-ended conversion of the RF signal to connect the AT86RF232 to the RF switch, U1. The RF switch is controlled by the radio transceiver output, DIG1, and selects one of the two antennas. The signal is routed to the ceramic antenna, passing a tuning line. Solder pads located along the tuning line allow for the optimization of antenna matching without the need for redesigning the REB. Detailed information about the antenna diversity feature is given in [1] and [3]. Optionally, one or if conducted measurements are to be performed. Refer to the schematic and populate coupling capacitors C11/C12 and C18/C19 accordingly. two SMA connectors can be assembled 8427A-AVR-10/11 9 5 PCB layout description This section describes critical layout details to be carefully considered during a PCB design. The PCB design requires an optimal solution for the following topics:

Create a solid ground plane for the antenna. The PCB has to be considered as a part of the antenna; it interacts with the radiated electromagnetic wave Isolate digital noise from the antenna and the radio transceiver to achieve optimum range and RF performance Isolate digital noise from the 16MHz reference crystal to achieve optimum transmitter and receiver performance Reduce any kind of spurious emissions below the limits set by the individual regulatory organizations The REB232ED PCB design further demonstrates a low-cost, two-layer PCB solution without the need of an inner ground plane. The drawing in Figure 5-1 shows critical sections using numbered captions. Each caption number has its own subsection below with detailed information. Figure 5-1. Board layout RF section. 10 Atmel AVR2092 8427A-AVR-10/11 5.1 PCB detail 1 balanced RF pin fan out Figure 5-2. Board layout RF pin fan out. Atmel AVR2092 The Atmel AT86RF232 antenna port should be connected to a 100 load with a small series inductance of 1nH to 2nH. This is achieved with the connection fan out in between the IC pins and the filter balun combination B1. The trace width is kept small at 0.2mm for a length of approximately 1.5mm. The REB232ED is a two-layer FR4 board with a thickness of 1.5mm. Therefore, the distributed capacitance between top and bottom is low, and transmission lines are rather inductive. B1 has the DC blocking built in. Only pin 2 requires DC blocking within its GND connection since this is considered as bias access pin. The distance of 1.5mm also allows GND vias for pin 3 and pin 6 of the AT86RF232. Such a low inductance GND connection is really desirable for the RF port. 8427A-AVR-10/11 11 5.2 PCB detail 2 RF switch Figure 5-3. Board layout RF switch. RF RF RF The RF switch requires a solid grounding to achieve the full isolation and RF filter capacitors for the control pins. A parasitic inductance within the ground connection may reduce the RF isolation of the switch in the off state. To achieve a hard, low-impedance ground connection, vias are placed on each side of the ground pad. Additionally, the ground pad is connected to the top layer ground plane. Blocking capacitors C24 and C25 are placed as close as possible to the RF switch to short any control line noise. Noise interfering on the control pins may cause undesired modulation of the RF signal. C11 and C12 will block any DC voltage on the RF line. On the input side, C28, next to the balun provides the required DC blocking. 5.3 PCB detail 3 crystal routing to minimize external The reference crystal PCB area requires optimization interference and to keep any radiation of 16MHz harmonics low. Since the board design incorporates a shield, the crystal housing has been tied hard to ground. This method will minimize the influence of external impairments such as burst and surge. Against board internal crosstalk, the crystal signal lines are embedded within ground areas. Special care has to be taken in the area between the IRQ line and the crystal. Depending on the configuration, the interrupt may be activated during a frame receive. Crosstalk into the crystal lines will increase the phase noise and therefore reduce the signal to noise ratio. 12 Atmel AVR2092 8427A-AVR-10/11 Figure 5-4. Board layout XTAL section. Atmel AVR2092 The reference crystal and load capacitors C36/37 form the resonator circuit. These capacitors are to be placed close to the crystal. The ground connection in between the capacitors should be a solid copper area right underneath the crystal, including the housing contacts. 5.4 PCB detail 4 transceiver analog GND routing With the Atmel AT86RF232, consider pins 3, 6, 27, 30, 31, and 32 as analog ground pins. Analog ground pins are to be routed to the paddle underneath the IC. The trace width has to be similar to the pad width when connecting the pads, and increase, if possible, in some distance from the pad. Each ground pin should be connected to the bottom plane with at least one via. Move the vias as close to the IC as possible. It is always desired to integrate the single-pin ground connections into polygon structures after a short distance. Top, bottom, and, on multilayer boards, the inner ground planes, should be tied together with a grid of vias. When ground loops are smaller than one tenth of the wavelength, it is safe to consider this as a solid piece of metal. 8427A-AVR-10/11 13 Figure 5-5. Board layout transceiver GND. 7 6 3 12 16 18 21 32 31 30 27 The soldering technology used allows the placement of small vias (0.15mm drill) within the ground paddle underneath the chip. During reflow soldering, the vias get filled with solder, having a positive effect on the connection cross section. The small drill size keeps solder losses within an acceptable limit. During the soldering process vias should be open on the bottom side to allow enclosed air to expand. 5.5 PCB detail 5 digital GND routing and shielding With the Atmel AT86RF232, consider pins 7, 12, 16, 18, and 21 as digital ground pins. Digital ground pins are not directly connected to the paddle. Digital ground pins may carry digital noise from I/O pad cells or other digital processing units within the chip. In case of a direct paddle connection, impedances of the paddle ground vias could cause a small voltage drop for this noise and may result in an increased noise level transferred to the analog domain. There is a number of pros and cons when it comes to the shielding topic. The major cons are:

Cost of the shield Manufacturing effort The number of pros might be longer but the cost argument is often very strong. However, the reasons to add the shield for this reference design are:

Shield is required for a certification in Japan Shield is recommended for FCC certification in North America Inaccessibility for test and repair Increased performance 14 Atmel AVR2092 8427A-AVR-10/11 Figure 5-6. Board layout GND and shield. Atmel AVR2092 Besides the function to provide supply ground to the individual parts, the ground plane has to be considered as a counterpart for the antenna. Such an antenna base plate is required to achieve full antenna performance. It has to be a continuous, sustained metal plate for that purpose. The shield, covering the electronic section will help to form this antenna base plate. For that reason, any unused surface should be filled with a copper plane and connected to the other ground side using sufficient through hole contacts. Larger copper areas should also be connected to the other side layer with a grid of vias. This will form kind of a RF sealing for the FR4 material. Any wave propagation in between the copper layers across the RF4 will become impossible. This way, for an external electromagnetic field, the board will behave like a coherent piece of metal. When a trace is cutting the plane on one side, the design should contain vias along this trace to bridge the interrupted ground on the other side. Place vias especially close to corners and necks to connect lose polygon ends. The pads where the shield is mounted also need some attention. The shield has to be integrated in the ground planes. Vias, in a short distance to the pads, will ensure low impedance integration and also close the FR4 substrate as mentioned above. 5.6 PCB detail 6 transceiver RF tuning The REB232ED implements a tuning structure to optimize the transceiver matching. A transmission line in combination with a capacitor is used to vary the load impedance. The capacitance value and the position of the capacitor can be changed to tune the system. To vary the position along that line, the tuning capacitor can be assembled on to the footprint of C23, C26 or C27. To measure the tuning result, U1 has to be removed and a piece of rigid 50 cable can be soldered to its pin 5. The measurement using X2 is not impossible but much harder to calibrate and a way to control U1 has also to be found. 15 8427A-AVR-10/11 Figure 5-7. Board layout transceiver RF tuning. During tuning, the best compromise in between RX and TX performance has to be found. Tuning should be done for the receiver first. First step should be to verify the 50 matching at U1, pin 5. After that, the capacitor position and value can be slightly varied. The reception performance should be measured using a packet error test. Typical tuning capacitor values are 1pF 0.5pF. To simplify the tuning, the receiver input power should be adjusted to a value where a PER of ~1% can be measured. For the measurement 5000 to 10.000 Frames should be used to get a clear PER value. After a board tuning change the PER should be measured with the same environment as before. Now the new sensitivity can be evaluated based on a simple rule of thumb. A PER change by one decimal power

(from 1% up to 10%, or down to 0.1%) corresponds in average with a 1dB change in sensitivity. The tuning measurements have to take the whole frequency band into account. The matching point for best sensitivity can, but may not be identical with the best S11 matching point. The matching point for the lowest noise figure will be different from the best S11 matching point that can be measured. When satisfying reception sensitivity was achieved, the transmitter performance should be tested. Main parameters are transmitting power, EVM, spurious emissions and performance flatness over the whole frequency band. 5.7 Ceramic antenna 5.7.1 Antenna design study Part of the diversity board development was the evaluation of the antenna setup. A dedicated board was designed to determine the key design parameters for a diversity antenna configuration. 16 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Because the antenna has to operate in an environment different from that of the manufacturers evaluation board, the correct frequency tuning has to be verified. The antenna distance, required for optimum diversity operation, provides enough board space to use a low-cost tuning method based on a transmission line and capacitors. The actual tuning procedure is explained in Section 5.7.3, page 20. Figure 5-8. Initial antenna tuning and test board. Besides the antenna tuning, the test board was used to measure the diversity effect and the coupling between the two antennas. The better the two antennas are isolated from each other, the higher is the diversity advantage for the receiver. It has to be considered that the unused antenna is operating against an open line end because the RF switch, U1, has high impedance in the off position. A low coupling in between the antennas is therefore required. Direct coupling measurement results between both antennas are shown in Figure 5-9, page 18. Over the operating frequency range, the antenna separation is >15dB. That is achieved mainly with the 45-degree installation. The 90-degree turn between left and right antennas causes orthogonal radiation patterns and minimal coupling. Because the polarization of a received wave is not deterministic in a multipath environment, this setup is also capable of selecting the optimum polarization match for an incoming wave. The other design aspect is the antenna distance. The antenna distance has to be large enough to ensure only one of the two antennas is present in a local fading minimum. Figure 5-10, page 19, shows the field strength plot for both antennas, dependent on the board position. For this test, the antenna board was moved along a workbench using a stepper motor. The transmitter was positioned several meters away on another workbench. No direct line of sight connection is ensured using a 17 8427A-AVR-10/11 large metal plate. The graph shows receive signal strength variations caused by the interference of reflected waves reaching the receiver via different propagation paths. From Figure 5-10, page 19 one can conclude key parameters for such an indoor scenario:

1. For one antenna, multipath fades can exceed 30dB. 2. For the 2.4GHz ISM band, a local fading minimum is typically below 5cm (~2in). This number is expected considering the wavelength. Conclusion: an antenna diversity design should place antennas at a distance larger than that. 3. For almost all positions, only one antenna is in a deep fade. The setup prepared for this test demonstrates the advantage of using antenna diversity. Figure 5-9. Coupling between left and right antennas. If practical situations are further analyzed (see Figure 5-10, page 19), one can derive a practical antenna gain for the diversity setups. To ensure robust and reliable communication, a single antenna system has to consider at least a 30dB link margin as fade margin. Considering the multipath setup used for the experiment, a signal level of -70dBm is the worst case receiver signal strength when operating on antenna diversity. A single antenna system could get into a spot where the receive power is as low as -85dBm. It might be too optimistic in an indoor environment to take the 15dB and state that an antenna diversity system has four times the range compared to a non-antenna diversity system. But antenna diversity cuts deep fades and strongly increases the stability of a radio link. This is essential for radio nodes that get installed in a fixed position, as with wall mounted equipment. The location of deep fades can move over time due to small changes inside the room or building as there are doors, windows, furniture, and people that may move. 8427A-AVR-10/11 18 Atmel AVR2092 Figure 5-10. Local fading effects in an indoor multipath environment. Atmel AVR2092 5.7.2 Antenna design-in This section describes the antenna design-in and the implementation of the antenna tuning structure. An overview of the layout can be found in Figure 5-11. Figure 5-11. Antenna PCB environment and tuning structure. 2 1 4 3 The antenna is available from two sources:

1. Johanson 2450AT45A100. 2. Wrth 7488910245. 8427A-AVR-10/11 19 The antenna test board, as specified by the manufacturers, has a ground plane size of 20mm x 40mm, an antenna placed in a 12mm x 20mm FR4 area, and an FR4 substrate height of 0.8mm. This is the expected environment where the antenna performance should be equivalent to the datasheet values. On the REB232ED, the environment differs considerably because the FR4 height is 1.5mm, the antenna is placed in a triangular corner and the ground plane geometry is different, too. To compensate for the larger substrate height, a 2mm not-plated drill hole is placed underneath the antenna ceramic core (see Figure 5-11, detail 1). The PCB ground is designed with a 45 degree angle along the red line (Figure 5-11, detail 2), forming an optimum antenna ground reference. The antenna tuning requires two more elements, a series capacitor at the antenna feed point (Figure 5-11, detail 3) and a capacitor that can be moved in position along the feed line (Figure 5-11, detail 4). The series capacitor must be placed at the antenna feed point. Under normal conditions, only one capacitor is required within the detail 4 section of the PCB. By choosing the correct footprint, the capacitor can be moved along the line. The impedance transformation across the transmission line depends on the distance between the antenna feed point and the capacitor in detail 4, resulting in the tuning effect. The tuning procedure is explained in Section 5.7.3. The first step for the measurements is a board rework to access the RF line with a 50 coaxial cable. In the case of the REB232ED, the balun, B1, was removed and a small, rigid 50 cable with an SMA connector was connected to the balun pin 1 pad. The ground planes next to this feed point where used to create a solid ground connection for this cable. This feed point will allow the measurement of both antennas because of the on-board RF switch. The RF switch was controlled by applying the correct voltage levels from a lab power supply. Figure 5-12. Antenna feed line short for extended length calibration. 5.7.3 Antenna tuning 20 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 The second step is to calibrate the network analyzer (NWA) to the 50 connector as usual. After normal calibration, the reference point for the NWA is at the cable SMA connection. To determine the tuning elements, the reference point has to be moved to the antenna feed point using the extended length parameter inside the NWA. To determine this parameter, a hard short is required at the antenna feed line end. Remove the solder resist on the left and right sides of the feed line end and short the line end to ground with two solder bumps (see Figure 5-12). Do not use any wires to create a ground connection. The calibration procedure will only work when the short is exactly at the line end and has a minimum of parasitic inductance. Now the NWA extended length parameter can be adjusted until the NWAs Smith chart displays a nice short for the desired frequency range. In the third step, the antenna behavior can be measured without any tuning elements. To see the real antenna behavior, the board must be placed in a position similar that of the final application. If the final application has a housing installed, then all these measurements must be done with the housing attached. Any piece of metal or plastic can tune the antenna to a different frequency. In the case of small boards with an edge length of less than 10cm, the connected RF cable is often a source of measurement errors. The outer conductor of the coaxial cable could interact with the field radiated by the antenna and, therefore, create an additional counterpart ground for the antenna. To avoid this effect, the coaxial cable can be fed through several ferrite beads. The ferrite beads need to be placed close to the test board. The initial measurement shows that the antenna is already working nicely in the desired frequency band. The feed resistance is a bit low, and the antenna has an inductive behavior. 8427A-AVR-10/11 21 Figure 5-13. Antenna without tuning elements. The first tuning step will use the series capacitor to tune the band center down to a pure resistive behavior. The band center is crossing the 30 degree (1/3 x Z0) line. Therefore, the tuning capacitor can be determined by:

C

1 fXc 2

1 3 50*

Ohm with Xc f = 2.450GHz We get a capacitance of 3.89pF, and can simply use a 3.9pF value. The result of this tuning step can be seen in Figure 5-14, page 23. 22 Atmel AVR2092 8427A-AVR-10/11 Figure 5-14. Antenna tuning with series capacitor. Atmel AVR2092 The final tuning step will use a shunt capacitor to correct the antenna load impedance. A 0.5pF capacitor has been used to tune the antenna resonance frequency to the band center. If the antenna resonance frequency is too low, the capacitor needs to be moved towards the antenna, and vice versa. Figure 5-15. Final tuning. 8427A-AVR-10/11 23 Figure 5-15, page 23, and Figure 5-16 show the final result as a diagram and on the board. Figure 5-16. Antenna tuning with series and shunt capacitor. In most cases, it is beneficial to tune the antenna a little towards higher frequencies. The reason is that environmental changes in most cases tune the antenna down to lower frequencies. Such environmental changes can be any kind of object that is situated near the antenna, such as a housing or table surface. The tuning determined in this example is only valid for the antenna example board. The REB232ED, with its different ground plane design and many more differences, may have other parts assembled. 5.7.4 Final board antenna radiation pattern The actual radiation pattern for the final board is rather complicated and very difficult to describe. Traditional radiation diagrams where the device under test is turned in all three axes and the received power for a vertical and a horizontal antenna are shown in a polar diagram do not provide a correct picture. Due to the antenna placement in a 45deg angle, the polarization changes dramatically for such a turn. To see the full RF power the RX Antenna would require maintaining the correct polarization angel for such a measurement. No matter what problems this setup creates when measuring the radiated power, such a radiation pattern is exactly what is required to reduce fading effects in indoor 24 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 multipath environments. The dual antenna setup has access to many more propagation modes than a single antenna. By switching from one antenna to the other, the physical antenna location is changing because of the antenna distance and on top of that the wave polarization is changing as well. The achieved propagation path effect of this switch was already illustrated in Figure 5-10, page 19. Figure 5-17. Radiated measurement for Azimut -50deg, Phi -35deg, Polarization 65deg. The measurement setup inside of an anechoic chamber is shown in Figure 5-17. A measurement position is characterized by three angels. There is the azimuth angle, where the whole test device carrier is turning around a vertical axis. The turning angle of the test board around a horizontal axis is called Phi. In Addition the receive antenna can be turned to adjust the polarization angle. The following 3D models show the board and the radiation properties for some of the main radiation directions. The cylinders point into the measured radiation direction, the arrows at the end of each pointer indicate the wave polarization direction. The yellow pointers belong to antenna A1 while the green pointers indicate radiations from A2. Please refer to Figure 5-1 for the antenna reference markers A1 and A2 or have a look at the physical board. 8427A-AVR-10/11 25 Figure 5-18. Some main radiation directions with polarization angle, seen from Antenna A1. All three figures show the same 3D model from different directions. The board has a rather smooth radiation characteristic but these spots have been selected to show the varying polarization. Figure 5-19. Some main radiation directions with polarization angle, seen from Antenna A2. 26 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Figure 5-20. Some main radiation directions with polarization angle, seen from the PCB bottom side. There is one radiation direction where no diversity effect exists. The direction is A=0, F=180 and P=0. For that case both antennas have a polarization that is turned by 180deg against each other. However, it is still horizontal and the antenna gain is similar for both antennas. Table 5-1. Measured radiation power for different radiation directions. Antenna Azimuth (A) Phi (F) Polarization (P) dBm EIRP A1 A2 A1 A2 A1 A1 A2 A1 A2

-60

-15 0 0 70 105 110 110 110 135 25 180 180 55 180 85

-90

-90 45

-30 0 0

-70 0 65 45

-45 4 5.8 5.9 6.6 7 3.7 4.3 4.5 5.5 According to the manufacturer datasheet, the antenna has a typical average gain of 1dBi with a peak gain of 3dBi. Considering the fact that the RF232 provides 3dBm of transmitting power after the balun, these measurements prove the maximum TX performance. 8427A-AVR-10/11 27 6 Mechanical description The REB232ED is manufactured using a low-cost, two-layer printed circuit board. All components and connectors are mounted on the top side of the board. The format was defined to fit the EXPAND1 connector on the Atmel AVR STK500 /

STK501 microcontroller evaluation board. The upright position was chosen for best antenna performance. Table 6-1. REB232ED mechanical dimensions. Dimension Width x Width y Value 57mm 61mm 28 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 7 Electrical characteristics 7.1 Absolute maximum ratings Stresses beyond the values listed in Table 7-1 may cause permanent damage to the board. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this manual are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. For more details about these parameters, refer to individual datasheets of the components used. Parameter Table 7-1. Absolute maximum ratings. No. 7.1.1 Storage temperature range 7.1.2 Humidity 7.1.3 Supply voltage 7.1.4 EXT I/O pin voltage 7.1.5 Supply current from batteries 7.1.6 Battery charge current (1) Note:

1. Keep power switch off or remove battery from REB-CBB when external power is supplied. Condition Non-condensing Sum over all power pins

-0.3

-0.3

-40

+85 90

+3.6 C

% r.H. V Vcc + 0.3 V A mA

-0.5 0 Minimum Typical Maximum Unit Parameter 7.2 Recommended operating range Table 7-2. Recommended operating range. No. 7.2.1 Operating temperature range 7.2.2 7.2.3 7.2.4 Supply voltage (Vcc) Condition Plain REB-CBB REB plugged on REB-CBB Serial flash access in usage Minimum Typical Maximum Unit

-20 1.6 1.6 2.3 3.0 3.0 3.0

+70 3.6 3.6 3.6 C V V V 7.3 Current consumption Test conditions (unless otherwise stated):

VDD = 3.0V, TOP = 25C Table 7-3 lists current consumption values for typical scenarios of a complete system composed of REB-CBB and REB232. The Zener diode has been removed as described above. Table 7-3. Current consumption of REB-CBB populated with REB232. No. Parameter Condition MCU @ power down, transceiver in state SLEEP, serial flash in Deep-Sleep MCU @ 2MHz, transceiver in state TRX_OFF MCU @ 16MHz (int. RC 32MHz), transceiver in state TRX_OFF Minimum Typical Maximum Unit 17 3 15 A mA mA 29 7.3.1 Supply current 7.3.2 Supply current 7.3.3 Supply current 8427A-AVR-10/11 No. Parameter 7.3.4 Supply current 7.3.5 Supply current Condition MCU @ 16MHz (int. RC 32MHz), transceiver in state TRX_ON MCU @ 16MHz (int. RC 32MHz), transceiver in state BUSY_TX Minimum Typical Maximum Unit 28 26 mA mA 30 Atmel AVR2092 8427A-AVR-10/11 8 Abbreviations Atmel AVR2092 AD AES BB CBB/REB-CBB ETSI EVM FCC ISM LNA MAC NWA PA PDI PER R&TTE REB RF RX SMA SPI TX USART XTAL

Antenna diversity Advanced encryption standard Baseband Controller base board European Telecommunications Standards Institute Error Vector Magnitude Federal Communications Commission Industrial, scientific and medical (frequency band) Low-noise amplifier Medium access control Network analyzer Power amplifier Program/debug interface Packet error rate Radio and Telecommunications Terminal Equipment

(Directive of the European Union) Radio extender board Radio frequency Receiver Sub-miniature-A (connection) Serial peripheral interface Transmitter Universal synchronous/asynchronous receiver/transmitter Crystal 8427A-AVR-10/11 31 Appendix A PCB design data A.1 Schematic Figure 8-1. REB232ED schematic. A B C D 7 6 5 8 z H G 5 4 2

. 8 3 8 3 2 A 1 2 A nc 2 8 7 1 5 2 0 1 C 3 p 3 m m 0 3 4

. 1 5

. 9 5

. 7 6

. 5 7

. 3 8

. 1 9

. e l a c S e n i L g n i n u T a n n e t n A z H G 5 4 2

. 9 5 8 3 2 1 U J3 2 GND J2 V2 J1 V1 V

H

H 1 V 6 5 4 9 CC N 0 8 CC N 0 7 CC 0 N 6 C C 0 N 2 2 C C 0 N 1 2 CC N 0 0 0 7 0 2 0 2 C 6 5 p 0 M H O 0 5 L P C G

e m a N s s a C l s s a l C t e N i 2 1 C 8 6 7 9 1 p 2 2 D N G 1 1 C 8 6 7 9 1 p 2 2 1 2 3 5 7 8 3 1 7 2 R k 0 1 M H O 0 5 L P C G

e m a N s s a C l s s a l C t e N 1 N I GND GND T U O 3 4 6 0

5

0 5 1

8 5 3 L C 5 9 5 0 3 2 X m h O 0 5 e s o r i H 2 i 4 C C 0 N 3 C C 0 N 2 C C 0 N 6 1 C C 0 N 0 0 7 0 2 6 5 p 0 5 1 C 4 1 C C 0 N 3 1 C C 0 N 8 7 1 5 2 1 C 3 p 3 m m 1 9

. 3 8

. 5 7

. 7 6

. 9 5

. 1 5

. 3 4 0 e l a c S e n i L g n i n u T a n n e t n A

. 1 0 0 5 2 0 0 8 3 9 4 4 5 9 4 9 2 3 B C P 8 3 C 4 7 6 6 1 p 0 1 d r a w S i 3 1 5 9 1 z H M 6 1 4 2 3 1 Q 1 D N G 7 3 C 4 7 6 6 1 p 0 1 6 3 C 2 4 9 6 2 F u 1 D N G 1 3 C 1 6 7 9 1 n 0 0 1 D D V E 6 P T 7 P T D N G 2 3 2 F R 6 8 T A 6 3 4 8 2 3 U 2 3 1 3 0 3 9 2 8 2 7 2 6 2 5 2 3 3 4 3 D N G D N G DIG3 DIG4 AVSS RFP RFN AVSS DVSS RSTN 1 2 3 4 5 6 7 8 S S V A S S V A S S V A D D V A D D V E S S V A 1 L A T X 2 L A T X 2 3 2 F R 6 8 T A 2 3 F L M E I D IRQ SEL MOSI DVSS MISO SCLK DVSS 1 G D I 2 G D I R T _ P L S S S V D D D V D D D V D CLKM S S V D D D V E D 24 23 22 21 20 19 18 17 I S M B _ d e h S i l 7 1 5 6 2 1 S 1 B C P D N G 1 5 2 C 8 6 7 9 1 p 2 2 D N G 2 W S F R D N G C N 0 6 2 C ClassName: GCPL50OHM i s s a l C t e N 9 6 8 6 2 C N 0 7 2 C 1 0 0 0 L 5 1 B F 0 5 4 2 I C J D N G 6 c n GND Balanced P2 unbalanced DC_GND Balanced P1 9 4 9 6 2 1 B D N G 8 6 7 9 1 8 2 C p 2 2 5 1 2 3 2 C D N G 2 p 1 D N G 4 2 C 8 6 7 9 1 p 2 2 D N G D N G 8 6 7 9 1 p 2 2 9 2 C 1 W S F R 2 W S F R 6 0 6 8 3 2 4 0 V W 7 C N A 2 U 6 1 1 W S F R 4 C C V D N G B 2 U 1 5 2 3 4 0 V W 7 C N 0 6 8 3 2 D D V D 8 4 8 3 2 2 k 2 8 R 0 3 C 1 6 7 9 1 n 0 0 1 D N G N T S R 8 4 8 3 2 2 k 2 5 1 R D N G 5 P T 9 0 1 1 1 2 1 3 1 4 1 5 1 6 1 5 3 C 2 4 9 6 2 F u 1 D N G D D V D 1 G D I 2 G D I R T P L S 2 3 C 1 6 7 9 1 n 0 0 1 D D V E D D N G D D V E 4 3 C 1 6 7 9 1 n 0 0 1 D N G n e d s e r D 9 9 0 1 0 1 6 e s s a r t s d n a L r e k c e u r b s g n e o K B C P J R P 0 1

. i

. 7 V _ 2 3 2 B E R y n a m r e G 1 f o 1 t e e h S 1 0

n o i s i v e R

t c e j o r P c o D h c S 0

. 1 1 0 2 7 0 9 1

. 3 A

. 1 7 V _ 2 3 2 B E R

e z i S

e t a D

e l i F D N G D N G D N G D N G K L C M IRQ SEL_TRX MOSI MISO SCK 4 6 7 9 1 0 7 4 5 2 R H b m G y n a m r e G L E M T A

F R S O M C

. 0 1 7 V D E 2 3 2 B E R e l t i T 0 4 C 7 4 8 3 2 2 p 2 D N G t o n d n a p o t n o e n a l p e l d d a p e h t o t y l t c e r i d o t s n i p S S V D e t u o R C I e h t h t a e n r e d n u 1 6 7 9 1 n 0 0 1 9 3 C D N G K C S I S O M D N G D N G D N G D D V E D 4 z H G 5 4 2

. 8 3 8 3 2 A 1 1 A nc 2 2 1 5 9 1 g i f n o c 1 8 2 1 a g e m T A g i f n o c 4 4 6 a g e m T A 1 D N A P X E

1 0 5 K T S 3 2 1 D N G G T V C D N G 6 B P 4 B P 2 B P 0 B P 6 D P 4 D P 2 D P 0 D P P W

E E 2 4 6 8 0 1 2 1 4 1 6 1 8 1 0 2 2 2 4 2 6 2 8 2 0 3 2 3 4 3 6 3 8 3 0 4 1 3 5 7 9 1 1 3 1 5 1 7 1 9 1 1 2 3 2 5 2 7 2 9 2 1 3 3 3 5 3 7 3 9 3 1 X D N G h t i

, D O B f o e s u e k a m o T w o i d a r d i o v a o t 0 M 1 a f o e s a c n i p u e k a w s r o t s i s e r e l b m e s s a

. n o i t i d n o c t e s e r D O B G T V C D N G 1 T X 7 B P 5 B P 3 B P 1 B P 7 D P 5 D P 3 D P 1 D P D N G 3 R C N 1 P T 2 P T 3 P T 4 P T K L C M N T S R R T P L S 2 R 1 R C N C N D D V E D A N T S R 2 G D I R T P L S K L C M K C S O S I M I S O M L E S Q R I 2 4 9 9 2 4 9 9 2 4 9 9 2 4 9 9 2 4 9 9 2 4 9 9 2 4 9 9 2 4 9 9 5 R R 0 7 R 0 1 R R 0 2 1 R R 0 4 1 R R 0 7 1 R R 0 9 1 R R 0 1 2 R R 0 3 2 R R 0 2 4 9 9 R 0 5 B P 4 D P 4 B P 6 D P 1 B P 3 B P 2 B P 0 B P 0 D P z H M 0 0 1

m h O 0 2 2 1 1 4 4 1 1 L 3 3 C 1 6 7 9 1 n 0 0 1 D D V E D 1 P J 8 2 4 4 1 6 5 3 3 J 8 7 6 5 C C V D L O H

I S K C S S C

O S P W

D N G A 0 1 0 5 2 T A 5 U 1 2 3 4 E E _ L E S O S I M P W

E E

, d n u o r G l a t i g i d

g o l a n a m o t t o b n o e n o d e b o t e h t h t a e n r e d n u r e y a l n o i t c e n n o C C I o i d a r 6 2 R 9 4 8 3 2 M 1 4 A 0 1 0 5 2 T A 1 5 5 0 3 D N G X R T _ L E S 3 C C V D N G B 4 U 1 2 3 P W 7 C N 1 6 8 3 2 D N G 2 3 P W 7 C N A 4 U 7 1 6 8 3 2 1 7 1 2 N T S R 2 G D I R T P L S K L C M K C S O S I M I S O M L E S Q R I 4 1 5 9 1 1 D 1 2 8 4 6 5 D N G D D V E D C N 6 R 4 R C N C N C N C N C N C N C N C N 9 R 1 1 R 3 1 R 6 1 R 8 1 R 0 2 R 2 2 R 2 B P 6 D P 7 D P 1 B P 7 B P 6 B P 5 B P 4 B P 2 D P B C 1 F 9 2 2 2 G T V C N T S R 4 2 R M 1 9 4 8 3 2 D N G D D V E D T S R 6 4 0 6 8 3 2 A 6 U 6 1 C C V D N G B 6 U 1 5 2 3 4 0 V W 7 C N 4 0 V W 7 C N 0 6 8 3 2 D N G D N G D D V E D L E S 2 F R 1 F R D N S

r N S N S

C A M 8 7 6 5 3 2 1 32 Atmel AVR2092 8427A-AVR-10/11 A.2 Assembly drawing Figure 8-2. REB232ED assembly drawing. Atmel AVR2092 33 8427A-AVR-10/11 A.3 Bill of materials Table 8-1. Bill of materials. Qty. Designator 1 1 1 1 1 2 1 1 9 1 2 1 2 1 1 1 1 1 1 2 2 6 2 6 2 1 1 1 2 X2 X1 U5 U4 U3 U2, U6 U1 S1 R5, R7, R10, R12, R14, R17, R19, R21, R23 R25 R8, R15 R27 R24, R26 Q1 L1 JP1 F1 D1 C35 C37, C38 C35, C36 C30, C31, C32, C33, C34, C39 C15, C20 C11, C12, C24, C25, C28, C29 C1, C10 C40 C23 B1 A1, A2 Description RF Connector MS-147 Pin header 2x20 90 degree EEPROM Logic gate 802.15.4 2.4GHz radio transceiver Dual INV, ULP RF switch SMT RF Shield Resistor Resistor Resistor Resistor Resistor Crystal 16MHz SMT ferrite bead Jumper 2-pol. PTC fuse Z-Diode Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Balun Footprint Manuf. Part#

Manufacturer Comment MS147 CL358-150-5-06 Hirose JP_2x20_90_ 1007-121-40 Top_Invers MiniMap-8-2X3 AT25010AY6-

10YH-1.8 NV7WP32K8X MO-187 MLF-32 CAB Atmel Fairchild NC7WP32K8X AT86RF232 Atmel AT86RF232 Build in antenna switch, 50 HEADER-20X2 AT25010A SC-70/6 SC-70/6 Shield-BMIS NC7WV04P6X AS222-92 LT08AD4303 Fairchild SkyWorks Laird NC7WV04 AS222-92 Frame&Lid 0603H0.4 Generic 0 0402A 0402A 0402A 0402A XTAL_4X2_5_ small 0603H0.8 JP_2x1 1812 DO-214AC 0402A 0402A 0603H0.8 XTL551150NLE-

16MHz-9.0R 74279263 1001-121-002 miniSMDC020 BZG05C3V9 Generic Generic Generic Generic Siward Wrth CAB Raychem Vishay Generic C0G Generic C0G Generic X5R 470 2.2k 10k 1M CX-4025 16MHz 220@100MHz JP-2 miniSMDC020 BZG05C3V9 12pF/5%

10pF/5%

1F 0402A 0402A 0402A 0402A 0402A 0402A 0805-6 Generic X7R 100n Generic C0G 0.56pF Generic C0G 22pF Generic C0G Generic C0G Generic C0G 3.3pF 2.2pF 1.2pF Johanson 2.4GHz Filtered Balun Ceramic antenna ANT_AT45_45 deg 2450AT45A100 JTI 2.45GHz 2450FB15L0001 JTI 34 Atmel AVR2092 8427A-AVR-10/11 Appendix B Radio certification Atmel AVR2092 B.1 United States (FCC) The REB232ED, mounted on a REB controller base board (REB-CBB), has received regulatory approvals for modular devices in the United States and European countries. Compliance Statement (Part 15.19) The device complies with Part 15 of the FCC rules. To fulfill FCC Certification requirements, an Original Equipment Manufacturer (OEM) must comply with the following regulations:

The modular transmitter must be labeled with its own FCC ID number, and, if the FCC ID is not visible when the module is installed inside another device, the outside of the device into which the module is installed must also display a label referring to the enclosed module This exterior label can use wording such as the following. Any similar wording that expresses the same meaning may be used Contains FCC-ID: VNR-E32ED-X5B-00 This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Use in portable exposure conditions (FCC 2.1093) requires separate equipment authorization. Modifications not expressly approved by this company could void the user's authority to operate this equipment (FCC Section 15.21). Compliance Statement (Part 15.105(b)) This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

Reorient or relocate the receiving antenna Connect the equipment into an outlet on a circuit different from that to which the Increase the separation between the equipment and receiver to radio communications. However, is no guarantee there receiver is connected Consult the dealer or an experienced radio/TV technician for help Warning (Part 15.21) Changes or modifications not expressly approved by this company could void the users authority to operate the equipment. 8427A-AVR-10/11 35 B.2 Europe (ETSI) References If the device is incorporated into a product, the manufacturer must ensure compliance of the final product to the European harmonized EMC and low-voltage/safety standards. A Declaration of Conformity must be issued for each of these standards and kept on file as described in Annex II of the R&TTE Directive. The manufacturer must maintain a copy of the device documentation and ensure the final product does not exceed the specified power ratings, and/or installation requirements as specified in the user manual. If any of these specifications are exceeded in the final product, a submission must be made to a notified body for compliance testing to all required standards. The CE marking must be affixed to a visible location on the OEM product. The CE mark shall consist of the initials "CE"

taking the following form:

If the CE marking is reduced or enlarged, the proportions given in the above graduated drawing must be respected The CE marking must have a height of at least 5mm except where this is not possible on account of the nature of the apparatus The CE marking must be affixed visibly, legibly, and indelibly More detailed information about CE marking requirements you can find at

"DIRECTIVE 1999/5/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL" on 9 March 1999 at section 12. AT86RF232: Low Power, 2.4GHz Transceiver for ZigBee, IEEE 802.15.4, 6LoWPAN, RF4CE, and ISM Applications; Datasheet; Rev. 8321A-MCU Wireless-10/11; Atmel Corporation AVR2042: REB Controller Base Board Hardware User Guide; Application Note; Rev. 8334A-AVR-08/10; Atmel Corporation AVR2021: AT86RF232 Antenna Diversity; Application Note; Rev. 8158B-AVR-

07/08; Atmel Corporation IEEE Std 802.15.4-2006: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (LR-WPANs) FCC Code of Federal Register (CFR); Part 47; Section 15.35, Section 15.205, Section 15.209, Section 15.232, Section 15.247, and Section 15.249. United States. ETSI EN 300 328, Electromagnetic Compatibility and Radio Spectrum Matters

(ERM); Wideband Transmission Systems; Data transmission equipment operating in the 2.4GHz ISM band and using spread spectrum modulation techniques; Part 1-3. ARIB STD-T66, Second Generation Low Power Data Communication System/Wireless LAN System 1999.12.14 (H11.12.14) Version 1.0. AT25010A; SPI Serial EEPROM; Datasheet; Rev. 3348J SEEPR 8/06; Atmel Corporation.

[1]

[2]

[3]

[4]

[5]

[6]

[7]

[8]

36 Atmel AVR2092 8427A-AVR-10/11 EVALUATION BOARD/KIT IMPORTANT NOTICE Atmel AVR2092 This evaluation board/kit is intended for use for FURTHER ENGINEERING, DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY. It is not a finished product and may not (yet) comply with some or any technical or legal requirements that are applicable to finished products, including, without limitation, directives regarding electromagnetic compatibility, recycling (WEEE), FCC, CE or UL

(except as may be otherwise noted on the board/kit). Atmel supplied this board/kit AS IS, without any warranties, with all faults, at the buyers and further users sole risk. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies Atmel from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the users responsibility to take any and all appropriate precautions with regard to electrostatic discharge and any other technical or legal concerns. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER USER NOR ATMEL SHALL BE LIABLE TO EACH OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. No license is granted under any patent right or other intellectual property right of Atmel covering or relating to any machine, process, or combination in which such Atmel products or services might be or are used. Mailing Address: Atmel Corporation, 2325 Orchard Parkway, San Jose, CA 95131 Copyright 2009, Atmel Corporation 8427A-AVR-10/11 37 9 Table of contents Features............................................................................................... 1 1 Introduction...................................................................................... 1 2 Disclaimer......................................................................................... 2 3 Overview........................................................................................... 3 4 Functional description..................................................................... 4 4.1 Interface connector specification......................................................................... 4 4.1.1 Atmel ATmega1281 configuration ............................................................................. 5 4.1.2 Atmel ATmega644 configuration ............................................................................... 5 4.2 ID EEPROM ........................................................................................................ 6 4.3 Supply current sensing........................................................................................ 8 4.4 Radio transceiver reference clock....................................................................... 8 4.5 RF section ........................................................................................................... 9 5 PCB layout description ................................................................. 10 5.1 PCB detail 1 balanced RF pin fan out ............................................................ 11 5.2 PCB detail 2 RF switch................................................................................... 12 5.3 PCB detail 3 crystal routing............................................................................ 12 5.4 PCB detail 4 transceiver analog GND routing................................................ 13 5.5 PCB detail 5 digital GND routing and shielding.............................................. 14 5.6 PCB detail 6 transceiver RF tuning ................................................................ 15 5.7 Ceramic antenna ............................................................................................... 16 5.7.1 Antenna design study.............................................................................................. 16 5.7.2 Antenna design-in ................................................................................................... 19 5.7.3 Antenna tuning ........................................................................................................ 20 5.7.4 Final board antenna radiation pattern...................................................................... 24 6 Mechanical description ................................................................. 28 7 Electrical characteristics............................................................... 29 7.1 Absolute maximum ratings................................................................................ 29 7.2 Recommended operating range........................................................................ 29 7.3 Current consumption ......................................................................................... 29 8 Abbreviations................................................................................. 31 Appendix A PCB design data........................................................ 32 A.1 Schematic..................................................................................................... 32 A.2 Assembly drawing ........................................................................................ 33 A.3 Bill of materials ............................................................................................. 34 Appendix B Radio certification..................................................... 35 B.1 United States (FCC) ..................................................................................... 35 38 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 B.2 Europe (ETSI)............................................................................................... 36 References......................................................................................... 36 EVALUATION BOARD/KIT IMPORTANT NOTICE ........................... 37 9 Table of contents ........................................................................... 38 8427A-AVR-10/11 39 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Milennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Atmel Japan Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 16F, Shin Osaki Kangyo Bldg. 1-6-4 Osaki Shinagawa-ku Tokyo 104-0032 JAPAN Tel: (+81) 3-6417-0300 Fax: (+81) 3-6417-0370 2011 Atmel Corporation. All rights reserved. Atmel, Atmel logo and combinations thereof, AVR, STK, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. 8427A-AVR-10/11

Atmel AVR2042: REB Controller Base Board -

Hardware User Manual 8-bit Atmel Microcontrollers Application Note Features High-performance, low-power Atmel 8/16-bit AVR XMEGA microcontroller ATxmega256A3

- 256KB in-system, self-programmable flash

- 8KB boot code section with independent lock bits

- 16KB internal SRAM

- 4KB EEPROM 2Mb serial flash for support of over-the-air (OTA) upgrades Programming interface Fully functional wireless node in combination with the Atmel Radio Extender Board

(REB) Powered by two AAA batteries for stand-alone operation 1 Introduction This application note describes the Atmel REB Controller Base Board (REB-CBB). Detailed information about its functionality, its interfaces, the microcontroller programming, and the PCB design is given in the individual sections. The REB-CBB is intended to serve as a microcontroller platform for the Atmel Radio Extender Board (REB) family. The REB connected to a REB-CBB forms a battery powered, fully functional, and portable wireless node. Figure 1-1. REB controller base board. Rev. 8334A-AVR-05/11 2 Disclaimer Typical values contained in this application note are based on simulations and on testing of individual examples. Any information about third-party materials or parts is included in this document for convenience. The vendor may have changed the information that has been published. Check the individual vendor information for the latest changes. 2 Atmel AVR2042 8334A-AVR-05/11 3 Overview Atmel AVR2042 The Atmel REB-CBB is designed to interface directly to a radio extender board. The combination of the two boards form a battery powered, fully functional, portable wireless node. The setup provides an ideal platform to:

Evaluate the outstanding performance of the Atmel radio transceivers Test the unique radio transceiver hardware support for the IEEE 802.15.4 standard [3]

Test the enhanced radio transceiver feature set Develop applications capable of hosting a ZigBee stack The following table lists the available radio extender boards and related radio transceivers. Table 3-1. Supported radio extender boards. Board name REB230 REB231 REB231ED REB212 Comment Radio transceiver SMA connector AT86RF230 SMA connector AT86RF231 Antenna diversity AT86RF231 SMA connector AT86RF212 The REB-CBB is assembled with an Atmel 8-bit AVR ATxmega256A3 microcontroller. It offers a connector for programming and debugging, suitable to connect an Atmel JTAGICE mkII programmer. A connector to attach an asynchronous serial interface allows interfacing to a PC host for control and data exchange tasks. Figure 3-1 shows a development and evaluation setup using the REB-CBB in combination with the REB231ED radio extender board. 8334A-AVR-05/11 3 Figure 3-1. Atmel REB-CBB connected to an Atmel REB231ED with an RS232 cable plugged in and an Atmel JTAGICE mkII programming interface. 4 Atmel AVR2042 8334A-AVR-05/11 4 Mechanical description Atmel AVR2042 The REB-CBB is manufactured using a two-layer printed circuit board (PCB). All active components are mounted on the bottom side, and all connectors and user I/Os are located on the top side using through-hole components. The radio extender board is plugged into the 2 x 20 female header, Expand1, vertically. Figure 4-1. Mechanical outline. m m 0 6 m m 0 7 m m 8 1 57mm m m 5 m m 5 Table 4-1. REB-CBB mechanical dimensions. Dimension Width x Width y PCB standoff height Height without REB Value 57mm 60mm 5mm 18mm Height with REB231ED plugged in 70mm 8334A-AVR-05/11 5 5 Functional description The Atmel REB-CBB carries a high-performance Atmel AVR XMEGA microcontroller, which connects to the radio extender board and various peripheral units (see Figure 5-1). It is powered by two AAA batteries or optionally by applying an external voltage source. Figure 5-1. REB-CBB block diagram. 5.1 Power supply The board is powered by two AAA batteries. The power switch, SW1, disconnects batteries from the entire board. External power is not routed through the power switch. For debugging and test purposes, power can also be supplied at pin header PWR. NOTE There is no protection against over voltage. Take care when applying power from an external source. Refer to Section 7.1 for allowable input voltage range. Exceeding these limits may destroy the board. In addition, avoid applying reverse currents into batteries by switching SW1 to the off position, or by removing the batteries when using external power Figure 5-2. Power supply of the REB-CBB. 5.2 Microcontroller The Atmel XMEGA A3 is a family of low-power, highperformance, and peripheral-

rich CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the Atmel XMEGA A3 achieves throughputs of up to 1 million instructions per second (MIPS) per MHz, allowing the system designer to optimize power consumption versus processing 6 Atmel AVR2042 8334A-AVR-05/11 speed. A detailed description of the Atmel ATxmega256A3 can be found in the datasheet [2]. Atmel AVR2042 Table 5-1. ATxmega256A3 ordering information. Ordering code Flash EEPROM SRAM Speed (MHz) Power supply Package Temperature ATxmega256A3-AU 256KB + 8KB 4KB 16KB 32 1.6V 3.6V 64A TQFP-64

-40C 85C 5.3 Clock sources The XMEGA has a flexible clock system, supporting a large number of clock sources. It incorporates both calibrated integrated oscillators and external crystal oscillators, and resonators. The Atmel AVR XMEGA family allows dynamic switching between the clock sources. Internal clock sources are:

32kHz RC oscillator 2MHz RC oscillator 32MHz RC oscillator The 2/32MHz oscillators can be calibrated using an automatic runtime calibration feature. In addition to the internal clock sources, two different external clock sources are supported:

The 32.768kHz crystal oscillator connected to TOSC1/2 delivers an accurate clock for a real-time counter, or optionally a system clock for XMEGA The transceiver clock, CLKM, can be used as an accurate clock derived from the 16MHz radio transceiver oscillator. This signal is routed to the controller input at pin 59 (PR1) A crystal oscillator failure monitor can be enabled to issue a non-maskable interrupt and switch to internal oscillator if the external oscillator fails. A high frequency phase-locked loop (PLL) and a clock prescaler are available to generate a wide range of clock frequencies. After reset, the device will always start up running from the 2MHz internal oscillator. During normal operation, the system clock source and prescalers can be changed from software at any time. The 32.768kHz crystal oscillator is a low-power oscillator using an external crystal. The oscillator can be used as a clock source for the system clock, the RTCs, and as a reference clock for the PLL. A low-power mode with reduced voltage swing on TOSC2 is available. The 32kHz crystal is connected to PE6,7. 5.3.1 32kHz crystal oscillator NOTE These pins cannot be used as general purpose I/O on header PORTE. 8334A-AVR-05/11 7 Figure 5-3. 32kHz crystal connection. Table 5-2. 32kHz crystal connection. ATxmega256A3 32kHz crystal PE6 (42) PE7 (43) TOSC2 TOSC1 5.3.2 Transceiver clock (CLKM) To make use of the transceiver clock, CLKM, an Atmel REB has to be connected to the Atmel REB-CBB and the radio transceiver has to be set up properly on the REB. The transceiver delivers a 1MHz clock frequency after power on. Although it is possible to set the clock frequency up to 16MHz by writing to the transceiver register, no frequencies above 1MHz should be used to drive the microcontroller. This is because the signal is filtered directly at the output pin for EMI suppression to ensure the best RF performance of the REB. To reach a system clock frequency higher than 1MHz, the Atmel XMEGA internal PLL should be used. Table 5-3. Transceiver clock (CLKM) connection. ATxmega256A3 Clock source PD0 (26) CLKM 1MHz The REB has to be modified to deliver the CLKM signal to PD0. Therefore, the appropriate solder jumper (0 resistor) has to be mounted. Designators of the 0 resistor are different for REB variants, and they are listed in the following table. Table 5-4. REB specific CLKM solder jumpers. REB name Solder jumper designator (REB) REB230 REB231 REB231ED REB212 R02 R02 R3 R3 5.4 User I/O For simple applications and debugging purposes, or just to deliver status information, a basic user interface is provided directly on the board consisting of three LEDs and a pushbutton. 8 Atmel AVR2042 8334A-AVR-05/11 Figure 5-4. User I/Os. Atmel AVR2042 The LEDs are connected to PB0..2 for active-high operation. The key will pull PB3 to GND. The key is intended to be used in combination with the internal pull-up resistor. Table 5-5. LED/Button connection. ATxmega256A3 PB0 (6) PB1 (7) PB2 (8) PB3 (9) I/O D1 D2 D3 T1 To get full accessibility to all I/O pins of the Atmel ATxmega256A3, three 8-bit ports are routed to 10-pin headers. Each header provides additional pins for VTG and GND. Figure 5-5 shows the pin-out for a single port. Figure 5-5. General pin-out of I/O port headers. Table 5-6. PORTA header connection. Header PORTA ATxmega256A3 1 2 3 4 5 6 7 8 9 10 PA0 (62) PA1 (63) PA2 (64) PA3 (1) PA4 (2) PA5 (3) PA6 (4) PA7 (5) GND VTG 8334A-AVR-05/11 9 PB2PB1PB0PB3 Table 5-7. PORTE header connection. Header PORTE ATxmega256A3 1 2 3 4 5 6 7 8 9 10 PE0 (62) PE1 (63) PE2 (64) PE3 (1) PE4 (2) PE5 (3) GND VTG Table 5-8. PORTF header connection. Header PORTF ATxmega256A3 1 2 3 4 5 6 7 8 9 10 PF0 (62) PF1 (63) PF2 (64) PF3 (1) PF4 (2) PF5 (3) PF6 (4) PF7 (5) GND VTG 5.5 Serial flash The Atmel REB-CBB flash device (Atmel AT25DF041A) for persistent data storage. It is capable of storing one complete firmware image of the Atmel ATxmega256A3, which makes it suitable for over-the-air upgrades (OTA). It is connected to SPID PD4..7. is populated with a 2MB serial Table 5-9. Serial flash connection. ATxmega256A3 AT25DF041A PD4 (30) PD5 (31) PD6 (32) PD7 (33)

#CS SI SO SCK The AT25DF041A supports SPI frequencies of up to 50MHz at supply voltages down to 2.3V. When operating the board below 2.3V, the serial flash cannot be accessed, see datasheet [3] for more information. 10 Atmel AVR2042 8334A-AVR-05/11 Table 5-10. AT25DF041A ordering information. Ordering code Flash Maximum freq. Power supply Package Temperature AT25DF041A 256KB + 8KB 50MHz 2.3V 3.6V 8S1 SOP-8

-40C 85C Atmel AVR2042 5.6 UART/USART The signal lines for asynchronous serial operation, using USARTD0, of the Atmel ATxmega256A3 are connected to header USARTD0. In addition, the MCU reset line is connected to pin 5 of this header. This can be used to work with a serial boot loader. No level conversion is done; therefore, an external RS232/TTL conversion circuit is required. The header pin-out mates with the available RS232/TTL converter (art. no. de28560). Table 5-11. Connection of USARTD0. ATxmega256A3 Header USARTD0 Description PD2 (28) PD3 (29) RxD (4) TxD (1) Asynchronous serial in Asynchronous serial out RESET (57) RESET (5) MCU reset VTG (2) GND (6) Operating Voltage Ground Synchronous operation is not supported at this connector since the clock line at PD1(27) is already in use to control the TXCW pin when AT86RF230 is connected. However, in addition all interface pins for USARTE0 and USARTF0 are accessible for all operating modes including SPI. 8334A-AVR-05/11 11 6 Programming On the ATxmega256A3, both programming and debugging can be done through two physical interfaces. The primary interface is the program and debug interface (PDI). This is a two-pin interface using the reset pin for the clock input (PDI_CLK) and the dedicated test pin for data input and output (PDI_DATA). Programming and debugging can also be done through the four-pin JTAG interface. The JTAG interface is IEEE 1149.1 standard compliant and supports boundary scan. Any external programmer or on-chip debugger/emulator can be directly connected to these interfaces, and no external components are required. The Atmel REB-CBB provides a 10-pin header to connect the Atmel JTAGICE mkII probe. This connection can be used for both protocols, JTAG and PDI. Figure 6-1. Connection between JTAGICE mkII and REB-CBB. DBGSEL To select between one of the protocols, the jumper DBGSEL has to be set to the appropriate position. It routes test data input (signal TDI) to either TDI of the JTAG interface or PDI of the Atmel proprietary PDI interface. Figure 6-2. Debug interface. DBG 6 1 3 5 9 DBGSEL RST PDI PDI TDI TMS TDO TCK JTAG NOTE Atmel JTAGICE mkII units with hardware revision 0 do not have PDI capabilities. 12 Atmel AVR2042 8334A-AVR-05/11 Atmel AVR2042 Table 6-1. Connection of header DBG. DBG Connector DBGSEL=JTAG DBGSEL=PDI TMS (5) TDI (9) TCK (1) TDO (3) PB4 (10) PB5 (11) PB6 (12) PB7 (13) PB4 (10) unused PDI (56) PB6 (12) unused PB7 (13) unused nSRST (6) RESET (57) RESET (57) 8334A-AVR-05/11 13 7 Electrical characteristics 7.1 Absolute maximum ratings Stresses beyond those listed under Absolute maximum ratings may cause permanent damage to the board. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this manual are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. For more details about these parameters, refer to individual datasheets of the components used. Table 7-1. Absolute maximum ratings. No. Parameter Condition Minimum Typical Maximum Unit 7.1.1 Storage temperature range 7.1.2 Relative Humidity Non-condensing 7.1.3 Supply voltage 7.1.4 EXT I/O pin voltage 7.1.5 7.1.6 Supply current from batteries Battery charge current (1) Sum over all power pins

-40

-0.3

-0.3

+85 90

+3.6 Vcc + 0.3

-0.5 0 C

% r.H. V V A mA Note:

1. Keep power switch off or remove batteries from REB-CBB when external power is supplied. 7.2 Recommended operating range Table 7-2. Recommended operating range. No. Parameter Condition Minimum Typical Maximum Unit 7.2.1 Temperature range 7.2.2 Plain REB-CBB 7.2.3 Supply voltage (Vcc) REB plugged on REB-CBB 7.2.4 Serial flash access in usage

-10 1.6 1.8 2.3 3.0 3.0 3.0

+60 C 3.6 3.6 3.6 V V V 7.3 Current consumption Test conditions (unless otherwise stated):

VDD = 3.0V, TOP = 25C The following table lists current consumption values for typical scenarios of a complete system composed of Atmel REB-CBB and Atmel REB231. The Z-diode has been removed as described below. Table 7-3. Current consumption of REB-CBB populated with REB231. No. Parameter Condition Minimum Typical Maximum Unit 7.3.1 Supply current MCU @ power-down, transceiver in state SLEEP, serial flash in Deep-Sleep 7.3.2 Supply current MCU @ 2MHz, transceiver in state TRX_OFF 7.3.3 Supply current MCU @ 16MHz (int. RC 32MHz), transceiver in state TRX_OFF 14 Atmel AVR2042 17 3 15 A mA mA 8334A-AVR-05/11 No. Parameter Condition Minimum Typical Maximum Unit 7.3.4 Supply current MCU @ 16MHz (int. RC 32MHz), transceiver in state RX_ON 7.3.5 Supply current MCU @ 16MHz (int. RC 32MHz), 28 26 mA mA Atmel AVR2042 transceiver in state BUSY_TX For current consumption measurements, please regard the Z-diode mounted on the REB. It prevents applying overvoltage stress to the radio transceiver circuit as well as protection against reverse polarity. Figure 7-1. REB overvoltage protection mechanism. The Z-diode draws approximately 6mA at 3.0V (type: BZG05-C3V9), which should be considered in overall current consumption. The Z-diode shall be removed for low-

power designs or in case of current measurements. 8334A-AVR-05/11 15 8 Abbreviations CLKM DBG EMI JTAG MCU OTA PDI PLL REB REB-CBB RTC SPI UART USART

Transceiver clock Debug (interface) Electromagnetic interference Joint Test Action Group Microcontroller Unit Over-the-air (upgrades) Program/debug interface Phase-locked loop Radio extender board REB controller base board Real time counter Serial peripheral interface Universal asynchronous receiver/transmitter Universal synchronous/asynchronous receiver/transmitter 16 Atmel AVR2042 8334A-AVR-05/11 Appendix A - PCB design data A.1 Schematic Atmel AVR2042 8334A-AVR-05/11 17 A.2 Assembly drawing Figure 8-1. Assembly top. Figure 8-2. Assembly bottom. 18 Atmel AVR2042 8334A-AVR-05/11 Atmel AVR2042 Manufacturer Part number Comment A.3 Bill of materials Designator Description BT1 C2 Battery holder Capacitor C3, C4 Capacitor C5, C6, C7, C8, C9, C10, C11 C12, C13, C14, C15 Capacitor Capacitor D1, D2, D3 LED D4 Schottky diode Header 5 x 2 100mil DBG, PORTA, PORTE, PORTF DBGSEL Header 3 x 1 100mil Expand1 Header female 20 x 2 100mil L1 PWR Q1 Inductor Header 2 x 1 100mil Quartz R1, R2, R3 Resistor R4 Resistor RST, T1 Pushbutton SW1 Switch, single-pole Value 2 x AAA 10nF 2.2pF 100nF 10F red 32.768kHz 470 10k BH 421-3 WU-2-69HD/LC Vishay BAS40-00 (43) U1 U2 8/16-bit AVR XMEGA microcontroller ATxmega256A3 Atmel ATxmega256A3-MH 2 MB SPI serial flash memory AT25DF041A Atmel AT25DF041A USARTD0 Header 3 x 2 100mil X1 Z1 Z2 Z3 Z10, Z11, Z12, Z13, Z14 Jumper 100mil Nut Countersink screw Nylon washer M2.5 Rubber foot 8.0 x 2.5mm M2.5 M2.5 x 8 2.7mm 8mm 8334A-AVR-05/11 DIN965/4.8/gal ZN DIN125 19 EVALUATION BOARD/KIT IMPORTANT NOTICE This evaluation board/kit is intended for use for FURTHER ENGINEERING, DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY. It is not a finished product and may not (yet) comply with some or any technical or legal requirements that are applicable to finished products, including, without limitation, directives regarding electromagnetic compatibility, recycling (WEEE), FCC, CE or UL

(except as may be otherwise noted on the board/kit). Atmel supplied this board/kit AS IS, without any warranties, with all faults, at the buyers and further users sole risk. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies Atmel from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the users responsibility to take any and all appropriate precautions with regard to electrostatic discharge and any other technical or legal concerns. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER USER NOR ATMEL SHALL BE LIABLE TO EACH OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. No license is granted under any patent right or other intellectual property right of Atmel covering or relating to any machine, process, or combination in which such Atmel products or services might be or are used. Mailing Address: Atmel Corporation, 2325 Orchard Parkway, San Jose, CA 95131 Copyright 2009, Atmel Corporation 20 Atmel AVR2042 8334A-AVR-05/11 References Atmel AVR2042

[1]

[2]

[3]

Atmel ATxmega256A3; High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller; Datasheet; Rev. 8068P 02/10; Atmel Corporation Atmel AT25DF021; 2-Megabit 2.3-volt or 2.7-volt Minimum SPI Serial Flash Memory; Datasheet; Revision D April 2009; Atmel Corporation IEEE Std 802.15.4-2006: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (LR-

WPANs) 8334A-AVR-05/11 21 Table of contents Features ............................................................................................... 1 1 Introduction ...................................................................................... 1 2 Disclaimer ......................................................................................... 2 3 Overview ........................................................................................... 3 4 Mechanical description ................................................................... 5 5 Functional description .................................................................... 6 5.1 Power supply ....................................................................................................... 6 5.2 Microcontroller ..................................................................................................... 6 5.3 Clock sources ...................................................................................................... 7 5.3.1 32kHz crystal oscillator .............................................................................................. 7 5.3.2 Transceiver clock (CLKM) ......................................................................................... 8 5.4 User I/O ............................................................................................................... 8 5.5 Serial flash ......................................................................................................... 10 5.6 UART/USART .................................................................................................... 11 6 Programming .................................................................................. 12 7 Electrical characteristics ............................................................... 14 7.1 Absolute maximum ratings ................................................................................ 14 7.2 Recommended operating range ........................................................................ 14 7.3 Current consumption ......................................................................................... 14 8 Abbreviations ................................................................................. 16 Appendix A PCB design data ........................................................ 17 A.1 Schematic ..................................................................................................... 17 A.2 Assembly drawing ........................................................................................ 18 A.3 Bill of materials ............................................................................................. 19 EVALUATION BOARD/KIT IMPORTANT NOTICE ........................... 20 References......................................................................................... 21 Table of contents .............................................................................. 22 22 Atmel AVR2042 8334A-AVR-05/11 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Milennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chou-ku, Tokyo 104-0033 JAPAN Tel: (+81) 3523-3551 Fax: (+81) 3523-7581 2011 Atmel Corporation. All rights reserved. Atmel, Atmel logo and combinations thereof, AVR, AVR logo, XMEGA and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. 8334A-AVR-05/11