FCC ID: 2A3TP-BLE0001 biobebbed Bluetooth Low Energy Module

FIRMENSSITZ Tersteegenstr. 15 D 46045 Oberhausen GESCHFTSSITZ Am Wiesenbusch 1 D 45966 Gladbeck GESCHFTSFHRER Dipl.-Ing. Andreas Hilburg Dipl.-Ing. Matthias Krzizan Fon: 02043 945 137 Fax: 02043 945 100 info@biobedded.de www.biobedded.de Integration Guide ProSmap Module BLE0001 (-A / -B) version: V1.0 date: 12.01.2022 manufacturer: Biobedded Systems GmbH Integration Guide 12.01.2022 page 1 Version history Version 1.0 Comment Integration Guide BLE0001-A / BLE0001-B Inhaltsverzeichnis 1 Purpose..........................................................................................................................................2 2 Module Description......................................................................................................................2 3 RF-Characteristics........................................................................................................................2 4 Integration into Host Products......................................................................................................3 5 Antenna Information.....................................................................................................................3 6 End Product Labeling...................................................................................................................4 FCC / Host Product User Guide Text..........................................................................................4 ISED / Host Product User Guide Text........................................................................................4 7 INTEGRATION INFORMATION FOR THE OEM....................................................................5 8 Host Product Labelling.................................................................................................................5 9 E-Labeling....................................................................................................................................5 Changes in Usage Conditions of this Module.............................................................................5 9 Product Foto......................................................................................................................................6 1 Purpose The purpose of this document is to provide information on how to use a the ProSmap Module BLE0001-A (-B) as a radio module when integrating into a host product. Incorrect integration or use may infringe compliance rules meaning recertification may be required. 2 Module Description The ProSmap Module BLE0001-A (-B) has a Bluetooth LE module based on the SoC CC2652R1 (o. CC2652RB) from Texas Instruments. The Version (-A) can connecteble on a external Antenna whith a UF.L Connector. The module version (-B) contains a Chip antenna on the PCB. 3 RF-Characteristics Rating frequency band Number of channels Channel Bandwidth Modulation: GFSK Min 2402 1 Max 2483,5 40 2 Unit MHz MHz Integration Guide 12.01.2022 page 2 4 Integration into Host Products The modul will be reflow soldered in to a host system. The module is physically attached and held in place by solder Pins. All Signal will be connected on solder pins. BLE0001-A: connect an external Antenne via UF.L connector BLE0001-B: The module with internal antenna requires space for shielded components of the host system. 5 Antenna Information BLE0001-A: The external Antenna (e.g. 2108792-1, TE-Connectivity) is placed in a suitable place inside the host product to ensure optimal operation. Qualified Antenna Types Manufacturer: TE-Connectivity PartNr.: 2108792-1 for more details: see Datasheet 2108792-1 BLE0001-B: The antenna on board is a 2.4GHz Chip antenna with Peak Gain: 2.7 dBi @2.4 GHz. It is important that the module is placed in a suitable place inside the host product to ensure optimal operation. Do not place close to metal casing. Specification Chip-antenna for more details: see Datasheet PS-2119640001 Integration Guide 12.01.2022 page 3 6 End Product Labeling A label is to be fitted to the exterior of all products containing the ProSmap module. The label must contain the words Contains FCC ID: 2A3TB-BLE0001 (for FCC) and Contains IC: 28044-BLE0001 (for ISED). FCC / Host Product User Guide Text This device complies with Part 15 of FCC Rules, Operation is Subject to following two conditions:

(1) This device may not cause harmful interference, and

(2) This device must accept any interference received including interference that cause undesired operation. Caution: Any changes or modifications to the equipment not expressly approved by the party responsible for compliance could void user s authority to operate the equipment. This equipment has been tested and found to comply within the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: Re-orient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a different circuit from that to which the receiver is connected Consult the dealer or an experienced radio/TV technician for help. This device and its antenna(s) must not be co-located or operation in conjunction with any other antenna or transmitter except in accordance with FCCs multi-transmitter procedures. IMPORTANT NOTE: FCC Radiation Exposure Statement; Co-location of this module with other transmitter that operate simultaneously are required to be evaluated using the FCC multi-transmitter procedures. This device complies with FCC RF radiation exposure limits set forth for an uncontrolled environment. This device complies with the safety requirements for RF exposure for portable use conditions in accordance with FCC rule part 2.1093 ISED / Host Product User Guide Text This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Le prsent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorise aux deux conditions suivantes :(1) l'appareil ne doit pas produire de brouillage, et

(2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement. This device and its antenna(s) must not be co-located with any other transmitters except in accordance with IC multi-transmitter product procedures. Cet appareil et son antenne (s) ne doit pas tre co-localiss ou fonctionnement en association avec une autre antenne ou transmetteur. Integration Guide 12.01.2022 page 4 IMPORTANT NOTE:

IC Radiation Exposure Statement:

This equipment complies with ISED Canada RSS-102 radiation exposure limits set forth for the general population. This equipment complies with the safety requirements for RF exposure in accordance with RSS-102 Issue 5 for portable use conditions. Cet quipement est conforme aux limites d'exposition au rayonnement de la norme CNR-102 d'ISDE Canada tablies pour la population gnrale. Cet quipement est conforme aux exigences de scurit relatives l'exposition aux radiofrquences conformment la norme CNR-102 version 5 pour les conditions d'utilisation portables. 7 INTEGRATION INFORMATION FOR THE OEM It is the responsibility of the OEM / Host product manufacturer to ensure continued compliance to FCC and ISED Canada certification requirements once the module is integrated in to the Host product. Please refer to the Datasheet for additional information. The module is subject to the following FCC rule parts: 15.207, 15.209, 15.247 8 Host Product Labelling The host product must be labelled with the following information:

Contains FCC ID: 2A3TB-BLE0001 (for FCC) Contains IC: 28044-BLE0001 (for ISED) This device complies with Part 15 of FCC Rules, Operation is Subject to following two conditions:

(1) This device may not cause harmful interference, and

(2) This device must accept any interference received including interference that cause undesired operation. Important Notice to OEMs:

The FCC Part 15 text must go on the Host product unless the product is too small to support a label with the text on it. It is not acceptable just to place the text in the user guide. 9 E-Labeling It is possible for the Host product to use E-labeling providing the Host product supports the requirements of FCC KDB 784748 D02 E-labeling and ISED Canada RSS-Gen, section 4.4. E-labeling would be applicable for the FCC ID, ISED Canada certification number and the FCC Part 15 text. Changes in Usage Conditions of this Module If the device is co-located with multiple antennas, the module could be subject to a FCC Class 2 Permissive Change and a ISED Canada Class 4 Permissive Change policy in accordance with FCC KDB 996396 D01 and ISED Canada RSP-100. In accordance with FCC KDB 996369 D03, section 2.9, test mode configuration information is available from the Module manufacturer for the Host (OEM) product manufacturer. Integration Guide 12.01.2022 page 5 9 Product Foto Integration Guide 12.01.2022 page 6

CC2652RB SimpleLink Crystal-less BAW Multiprotocol 2.4 GHz Wireless MCU CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com 1 Features Microcontroller Powerful 48-MHz Arm Cortex-M4F processor EEMBC CoreMark score: 148 352KB of in-system programmable flash 256KB of ROM for protocols and library functions 8KB of cache SRAM (alternatively available as general-purpose RAM) 80KB of ultra-low leakage SRAM. The SRAM is protected by parity to ensure high reliability of operation. 2-pin cJTAG and JTAG debugging Supports over-the-air (OTA) update Ultra-low power sensor controller with 4KB of SRAM Sample, store, and process sensor data Operation independent from system CPU Fast wake-up for low-power operation TI-RTOS, drivers, bootloader, Bluetooth 5.2 low energy controller, and IEEE 802.15.4 MAC in ROM for optimized application size RoHS-compliant package 7-mm 7-mm RGZ VQFN48 (31 GPIOs) Peripherals Digital peripherals can be routed to any GPIO 4 32-bit or 8 16-bit general-purpose timers 12-bit ADC, 200 kSamples/s, 8 channels 2 comparators with internal reference DAC

(1 continuous time, 1 ultra-low power) Programmable current source 2 UART 2 SSI (SPI, MICROWIRE, TI) I2C and I2S Real-time clock (RTC) AES 128- and 256-bit cryptographic accelerator ECC and RSA public key hardware accelerator SHA2 accelerator (full suite up to SHA-512) True random number generator (TRNG) Capacitive sensing, up to 8 channels Integrated temperature and battery monitor External system Integrated bulk acoustic wave (BAW) resonator generating accurate clock with fast startup time of 80 s for system and RF On-chip buck DC/DC converter Low power Wide supply voltage range Normal operation: 1.8 to 3.8 V External regulator mode: 1.7 to 1.95 V Active mode RX: 7.3 mA Active mode TX 0 dBm: 7.9 mA Active mode TX 5 dBm: 10.2 mA Active mode MCU 48 MHz (CoreMark):

3.4 mA (71 A/MHz) Sensor controller, low power-mode, 2 MHz, running infinite loop: 30.8 A Sensor controller, active mode, 24 MHz, running infinite loop: 808 A Standby: 0.94 A (RTC on, 80KB RAM and CPU retention) Radio section 2.4 GHz RF transceiver compatible with Bluetooth 5.2 Low Energy and earlier LE specifications and IEEE 802.15.4 PHY and MAC 3-wire, 2-wire, 1-wire PTA coexistence mechanisms Excellent receiver sensitivity:

-100 dBm for 802.15.4 (2.4 GHz),

-102 dBm for Bluetooth 5 Low Energy Coded Programmable output power up to +5 dBm Suitable for systems targeting compliance with worldwide radio frequency regulations EN 300 328, (Europe) EN 300 440 Category 2 FCC CFR47 Part 15 ARIB STD-T66 (Japan) Wireless protocols Thread, Zigbee, Bluetooth 5.2 Low Energy, IEEE 802.15.4, IPv6-enabled smart objects

(6LoWPAN), proprietary systems, SimpleLink TI 15.4 stack (2.4 GHz), and dynamic multiprotocol manager (DMM) driver. Development Tools and Software CC2652RB LaunchPad Development Kit SimpleLink CC13x2 and CC26x2 Software Development Kit SmartRF Studio for simple radio configuration Sensor Controller Studio for building low-power sensing applications Copyright 2021 Texas Instruments Incorporated An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, Submit Document Feedback intellectual property matters and other important disclaimers. PRODUCTION DATA. 1 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 2 Applications 2400 to 2480 MHz ISM and SRD systems 1 with down to 4 kHz of receive bandwidth Building automation Building security systems motion detector, electronic smart lock, door and window sensor, garage door system, gateway HVAC thermostat, wireless environmental sensor, HVAC system controller, gateway Fire safety system smoke and heat detector, fire alarm control panel (FACP) Video surveillance IP network camera Elevators and escalators elevator main control panel for elevators and escalators Grid infrastructure Smart meters water meter, gas meter, electricity meter, and heat cost allocators Grid communications wireless communications Long-range sensor applications Other alternative energy energy harvesting 3 Description www.ti.com Industrial transport asset tracking Factory automation and control Medical Electronic point of sale (EPOS) Electronic Shelf Label (ESL) Personal electronics Wired networking wireless LAN or Wi-Fi access points, edge router, small business router Portable electronics RF smart remote control Home theater & entertainment smart speakers, smart display, set-top box, streaming media player Connected peripherals consumer wireless module, wireless data access card Gaming electronic and robotic toys Wearables (non-medical) smart trackers The SimpleLink CC2652RB device is the industrys first multiprotocol 2.4 GHz wireless crystal-less microcontroller (MCU) with integrated TI Bulk Acoustic Wave (BAW) resonator technology supporting Thread, Zigbee, Bluetooth 5.2 Low Energy, IEEE 802.15.4, IPv6-enabled smart objects (6LoWPAN), proprietary systems, including the TI 15.4-Stack (2.4 GHz), and concurrent multiprotocol operation through the Dynamic Multiprotocol Manager (DMM) software driver. Integrated BAW resonator technology eliminates the need for external crystals without compromising latency or frequency stability. The device is optimized for low-power wireless communication and advanced sensing in building security systems, HVAC, medical, power tool, wired networking, portable electronics, home theater & entertainment, and connected peripherals markets. The highlighted features of TI Bulk Acoustic Wave (BAW) resonator technology include:

Unparalleled RF performance with high-performance frequency stability (40 PPM) across temperature

(-40C to 85C) and full operating voltage (1.8 V to 3.8 V), ultra-low jitter and phase noise to meet various wireless communication standards clock requirements. Efficient development and production cycles by eliminating crystal oscillator sourcing and reducing costly board re-designs and re-certification due to external crystal layout and assembly issues. Optimized Bill of Material (BOM) and PCB area savings (12% average). Superior long-term clock stability and aging performance (10 years) in comparison with most standard quartz crystal (longest 5 years aging) enables longer product lifecycles. Robust vibration and mechanical shock resistance (3 lower PPM variance versus external crystal) reduces product replacement costs from external crystal failure and allows for operation in harsh environments, such as in motors or heavy machinery. Mitigation of potential timing related side channel attacks from external clock tampering. 1 See RF Core for additional details on supported protocol standards, modulation formats, and data rates. 2 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com

(SDK). The highlighted features of the SimpleLink MCU platform include:

Wide flexibility of protocol stack support in the SimpleLink CC13x2 and CC26x2 Software Development Kit Industrial temperature ready with lowest standby current of 5.6 A at 85C. Longer battery life wireless applications with low standby current of 0.84 A and full RAM retention. Advanced sensing with a programmable, autonomous ultra-low power Sensor Controller CPU with fast wake-

up capability. As an example, the sensor controller is capable of 1-Hz ADC sampling at 1 A system current. Low SER (Soft Error Rate) FIT (Failure-in-time) for long operation lifetime with no disruption for industrial markets with always-on SRAM parity against corruption due to potential radiation events. Dedicated software-defined radio controller (Arm Cortex-M0) providing flexible low-power RF transceiver capability to support multiple physical layers and RF standards. The CC2652RB device is part of the SimpleLink MCU platform, which consists of Wi-Fi, Bluetooth Low Energy, Thread, Zigbee, Sub-1 GHz MCUs, and host MCUs that all share a common, easy-to-use development environment with a single core software development kit (SDK) and rich tool set. A one-time integration of the SimpleLink platform enables you to add any combination of the portfolios devices into your design, allowing 100 percent code reuse when your design requirements change. For more information, visit SimpleLink MCU platform. PART NUMBER(1) CC2652RB1FRGZ Device Information PACKAGE VQFN (48) BODY SIZE (NOM) 7.00 mm 7.00 mm

(1) For the most current part, package, and ordering information for all available devices, see the Package Option Addendum in Section 12, or see the TI website. Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 4 Functional Block Diagram www.ti.com Figure 4-1. CC2652RB Block Diagram 4 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB CC2652RBGeneral Hardware Peripherals and ModulesMain CPUUp to 352KBFlashwith 8KB CacheSensor InterfacecJTAG Up to80KBSRAM256KBROMArmCortex-M4F ProcessorBAW, LDO, Clocks, and ReferencesOptional DC/DC ConverterRF CoreArmCortex-M0 ProcessorDSP Modem16KB SRAMROMULP Sensor ControllerLow-Power Comparator12-bit ADC, 200 ks/sConstant Current SourceSPI-I2C Digital Sensor IF4KB SRAMTime-to-Digital Converter4 32-bit Timers2 SSI (SPI)Watchdog TimerTemperature and Battery MonitorRTCI2C and I2S2 UART32 ch. DMA31 GPIOsAES-256, SHA2-512ECC, RSAADCADCDigital PLL48 MHz69 A/MHz2.4 GHzTRNG www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 2 3 Description.......................................................................2 4 Functional Block Diagram.............................................. 4 5 Revision History.............................................................. 6 6 Device Comparison......................................................... 7 7 Terminal Configuration and Functions..........................8 7.1 Pin Diagram RGZ Package (Top View)....................8 7.2 Signal Descriptions RGZ Package...........................9 7.3 Connections for Unused Pins and Modules..............10 8 Specifications................................................................ 11 8.1 Absolute Maximum Ratings ..................................... 11 8.2 ESD Ratings .............................................................11 8.3 Recommended Operating Conditions ...................... 11 8.4 Power Supply and Modules ..................................... 12 8.5 Power Consumption - Power Modes........................ 12 8.6 Power Consumption - Radio Modes......................... 13 8.7 Nonvolatile (Flash) Memory Characteristics ............ 13 8.8 Thermal Resistance Characteristics ........................ 13 8.9 RF Frequency Bands ............................................... 14 8.10 Bluetooth Low Energy - Receive (RX).................... 14 8.11 Bluetooth Low Energy - Transmit (TX).................... 17 8.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX.....................18 8.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX.................... 19 8.14 Timing and Switching Characteristics..................... 19 8.15 Peripheral Characteristics.......................................25 8.16 Typical Characteristics............................................ 33 9 Detailed Description......................................................49 9.1 Overview................................................................... 49 9.2 System CPU............................................................. 49 9.3 Radio (RF Core)........................................................50 9.4 Memory..................................................................... 50 9.5 Sensor Controller...................................................... 51 9.6 Cryptography............................................................ 52 9.7 Timers....................................................................... 53 9.8 Serial Peripherals and I/O.........................................54 9.9 Battery and Temperature Monitor............................. 54 9.10 DMA...................................................................... 54 9.11 Debug......................................................................54 9.12 Power Management................................................55 9.13 Clock Systems........................................................ 56 9.14 Network Processor..................................................56 10 Application, Implementation, and Layout................. 57 10.1 Reference Designs................................................. 57 11 Device and Documentation Support..........................58 11.1 Tools and Software..................................................58 11.2 Documentation Support.......................................... 60 11.3 Support Resources................................................. 61 11.4 Trademarks............................................................. 61 11.5 Electrostatic Discharge Caution.............................. 61 11.6 Glossary.................................................................. 61 12 Mechanical, Packaging, and Orderable Information.................................................................... 62 12.1 Packaging Information............................................ 62 Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from August 12, 2020 to February 12, 2021 (from Revision C (August 2020) to Revision D (February 2021)) Page Updated the numbering format for tables, figures, and cross-references throughout the document..................1 Updated to Bluetooth 5.2 throughout the document........................................................................................... 1 Added 3-wire, 2-wire, and 1-wire PTA coexistence mechanisms to the "Radio Section" list in Section 1 Features .............................................................................................................................................................1 Added Wireless protocols to Section 1 .............................................................................................................. 1 Changed the frequency of the input tone for 14-bit and 15-bit mode in Section 8.15.1.1 ................................25 Added PTA description in Section 9.3, Radio (RF Core) ................................................................................. 50 Added the paragraph that begins "Integrated matched filter-balun devices can be used" in Section 10.1, Reference Designs .......................................................................................................................................... 57 6 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com 6 Device Comparison DEVICE CC1312R CC1352P RADIO SUPPORT Table 6-1. Device Family Overview FLASH

(KB) RAM

(KB) GPIO PACKAGE SIZE Sub-1 GHz 352 80 30 RGZ (7-mm 7-mm VQFN48) 352 80 26 RGZ (7-mm 7-mm VQFN48) Multiprotocol Sub-1 GHz Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats

+20-dBm high-power amplifier Multiprotocol Sub-1 GHz Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats Multiprotocol Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats Multiprotocol Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats Multiprotocol Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats

+19.5-dBm high-power amplifier CC1352R 352 80 28 RGZ (7-mm 7-mm VQFN48) CC2642R Bluetooth 5.2 Low Energy 2.4 GHz proprietary FSK-based formats CC2642R-Q1 Bluetooth 5.2 Low Energy RGZ (7-mm 7-mm VQFN48) RTC (7-mm 7-mm VQFN48) 352 352 352 80 80 80 31 31 31 CC2652R RGZ (7-mm 7-mm VQFN48) CC2652RB 352 80 31 RGZ (7-mm 7-mm VQFN48) CC2652P 352 80 26 RGZ (7-mm 7-mm VQFN48) CC1310 Sub-1 GHz 32128 1620 1031 CC1350 Sub-1 GHz Bluetooth 4.2 Low Energy 128 20 1031 CC2640R2F Bluetooth 5.1 Low Energy 2.4 GHz proprietary FSK-based formats 128 20 1031 RGZ (7-mm 7-mm VQFN48) RHB (5-mm 5-mm VQFN32) RSM (4-mm 4-mm VQFN32) RGZ (7-mm 7-mm VQFN48) RHB (5-mm 5-mm VQFN32) RSM (4-mm 4-mm VQFN32) RGZ (7-mm 7-mm VQFN48) RHB (5-mm 5-mm VQFN32) RSM (4-mm 4-mm VQFN32) YFV (2.7-mm 2.7-mm DSBGA34) CC2640R2F-Q1 Bluetooth 5.1 Low Energy 2.4 GHz proprietary FSK-based formats 128 20 31 RGZ (7-mm 7-mm VQFN48) Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 7 Terminal Configuration and Functions 7.1 Pin Diagram RGZ Package (Top View) www.ti.com Figure 7-1. RGZ (7-mm 7-mm) Pinout, 0.5-mm Pitch (Top View) The following I/O pins marked in Figure 7-1 in bold have high-drive capabilities:

The following I/O pins marked in Figure 7-1 in italics have analog capabilities:

Pin 10, DIO_5 Pin 11, DIO_6 Pin 12, DIO_7 Pin 24, JTAG_TMSC Pin 26, DIO_16 Pin 27, DIO_17 Pin 36, DIO_23 Pin 37, DIO_24 Pin 38, DIO_25 Pin 39, DIO_26 Pin 40, DIO_27 Pin 41, DIO_28 Pin 42, DIO_29 Pin 43, DIO_30 8 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB 4039383721222324DCDC_SW33DIO_1834RESET_N35DIO_2336X32K_Q24X32K_Q13RF_N2RF_P1DIO_2232DIO_2131DIO_2030DIO_1929DIO_05DIO_16DIO_278282726JTAG_TCKC2591011124142434420DIO_1519DIO_1418174546474816151413DIO_17DIO_16VDDS_DCDCDIO_12DIO_13VDDS2DIO_11DIO_10DIO_5DIO_6DIO_7DIO_3DIO_4DIO_8DIO_9VDDS3DCOUPLJTAG_TMSCDIO_25DIO_24VDDRVDDR_RFDIO_26X48M_PX48M_NDIO_28DIO_29DIO_30DIO_27VDDS www.ti.com 7.2 Signal Descriptions RGZ Package Table 7-1. Signal Descriptions RGZ Package CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 PIN NAME DCDC_SW DCOUPL NO. 33 23 DESCRIPTION Output from internal DC/DC converter. Tie to ground for external regulator mode (1.7-V to 1.95-V operation). (1) For decoupling of internal 1.27 V regulated digital-supply (2) I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 21 26 27 28 29 30 31 32 36 37 38 39 40 41 42 43 24 25 35 1 2 TYPE Power Power Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital GND Digital Digital Digital RF RF DIO_0 DIO_1 DIO_2 DIO_3 DIO_4 DIO_5 DIO_6 DIO_7 DIO_8 DIO_9 DIO_10 DIO_11 DIO_12 DIO_13 DIO_14 DIO_15 DIO_16 DIO_17 DIO_18 DIO_19 DIO_20 DIO_21 DIO_22 DIO_23 DIO_24 DIO_25 DIO_26 DIO_27 DIO_28 DIO_29 DIO_30 EGP JTAG_TMSC JTAG_TCKC RESET_N RF_P RF_N GPIO, high-drive capability GPIO, high-drive capability GPIO, high-drive capability GPIO, JTAG_TDO, high-drive capability GPIO, JTAG_TDI, high-drive capability GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Ground exposed ground pad(3) JTAG TMSC, high-drive capability JTAG TCKC Reset, active low. No internal pullup resistor Positive RF input signal to LNA during RX Positive RF output signal from PA during TX Negative RF input signal to LNA during RX Negative RF output signal from PA during TX Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com Table 7-1. Signal Descriptions RGZ Package (continued) I/O TYPE DESCRIPTION PIN NO. NAME VDDR VDDR_RF VDDS VDDS2 VDDS3 VDDS_DCDC X48M_N X48M_P X32K_Q1 X32K_Q2 45 48 44 13 22 34 46 47 3 4 Power Power Power Power Power Power Analog Analog Analog Analog Internal supply, must be powered from the internal DC/DC converter or the internal LDO. For external regulator mode (1.7-V to 1.95-V operation), connect to external regulator and internal DC-

DC cannot be used. (2) (4) (6) Internal supply, must be powered from the internal DC/DC converter or the internal LDO(2) (5) (6) 1.8-V to 3.8-V main chip supply. For external regulator mode (1.7-V to 1.95-V operation), connect to external regulator and internal DC-

DC cannot be used. (1) 1.8-V to 3.8-V DIO supply(1) 1.8-V to 3.8-V DIO supply(1) 1.8-V to 3.8-V DC/DC converter supply. Tie to ground for external regulator mode (1.7-V to 1.95-V operation). 48-MHz crystal oscillator pin 1. Do not connect if not in use.

(Optional)(7) 48-MHz crystal oscillator pin 2. Do not connect if not in use.

(Optional)(7) 32-kHz crystal oscillator pin 1 32-kHz crystal oscillator pin 2 For more details, see technical reference manual listed in Section 11.2.

(1)

(2) Do not supply external circuitry from this pin.

(3) EGP is the only ground connection for the device. Good electrical connection to device ground on printed circuit board (PCB) is imperative for proper device operation. If internal DC/DC converter is not used, this pin is supplied internally from the main LDO. If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the main LDO.

(4)

(5)

(6) Output from internal DC/DC and LDO is trimmed to 1.68 V.

(7) The X48M_N and X48M_P pins can be used to connect an external 48-MHz crystal. This clock can be used instead of the internal BAW clock. However, it is not required for the device standard operation. 7.3 Connections for Unused Pins and Modules FUNCTION SIGNAL NAME PIN NUMBER ACCEPTABLE PRACTICE(1) PREFERRED PRACTICE(1) Table 7-2. Connections for Unused Pins GPIO DIO_n 32.768-kHz crystal DC/DC converter(2) 48-MHz crystal X32K_Q1 X32K_Q2 DCDC_SW VDDS_DCDC X48M_N X48M_P 512 1421 2632 3643 3 4 33 34 46 47 NC or GND NC or GND NC NC NC NC NC NC NC NC VDDS (GND)(3) VDDS (GND)(3)

(1) NC = No connect

(2) When the DC/DC converter is not used, the inductor between DCDC_SW and VDDR can be removed. VDDR and VDDR_RF must still be connected and the 22 uF DCDC capacitor must be kept on the VDDR net.

(3) When operating in external regulator mode. 10 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Vin Tstg

(1)

(2)

(3)

(4)

(5) 8 Specifications 8.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) (2) VDDS(3) Supply voltage VDDS and VDDR(5) Supply voltage (External regulator mode) Voltage on any digital pin(4) Voltage scaling enabled Voltage on ADC input Voltage scaling disabled, internal reference Voltage scaling disabled, VDDS as reference Storage temperature MIN 0.3 0.3 0.3 0.3 0.3 0.3 0.3 40 VDDS + 0.3, max 4.1 MAX UNIT 4.1 2.25 V V V V V VDDS 1.49 VDDS / 2.9 5 dBm 150 C Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X48M_N and X48M_P VDDR + 0.3, max 2.25 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to ground, unless otherwise noted. VDDS_DCDC, VDDS2 and VDDS3 must be at the same potential as VDDS. Including analog capable DIOs. VDDR, VDDS, VDDS2 and VDDS3 must be at the same potential. 8.2 ESD Ratings VESD Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) All pins All pins

(1)

(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process VALUE UNIT 2000 500 V V 8.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Operating ambient temperature Operating supply voltage (VDDS and VDDR), external regulator mode For operation in 1.8-V systems

(VDDS and VDDR pins connected on PCB, internal DC-DC cannot be used) Operating supply voltage (VDDS) Rising supply voltage slew rate Falling supply voltage slew rate(1) MIN 40 MAX UNIT 85 C V V 1.7 1.95 1.8 0 0 3.8 100 mV/s 20 mV/s

(1) For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-F VDDS input capacitor must be used to ensure compliance with this slew rate. Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: CC2652RB PARAMETER MIN MAX UNIT CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.4 Power Supply and Modules over operating free-air temperature range (unless otherwise noted) VDDS Power-on-Reset (POR) threshold VDDS Brown-out Detector (BOD) (1) VDDS Brown-out Detector (BOD) External regulator mode VDDS Brown-out Detector (BOD) (1) VDDS Brown-out Detector (BOD) External regulator mode Rising threshold Rising threshold Falling threshold Falling threshold VDDS Brown-out Detector (BOD), before initial boot (2) Rising threshold

(1)

(2) For boost mode (VDDR =1.95 V), TI drivers software initialization will trim VDDS BOD limits to maximum (approximately 2.0 V) Brown-out Detector is trimmed at initial boot, value is kept until device is reset by a POR reset or the RESET_N pin 8.5 Power Consumption - Power Modes When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled unless otherwise noted. PARAMETER TEST CONDITIONS TYP UNIT Core Current Consumption Reset and Shutdown Reset. RESET_N pin asserted or VDDS below power-on-reset threshold Standby without cache retention Standby with cache retention Shutdown. No clocks running, no retention RTC running, CPU, 80KB RAM and (partial) register retention. RCOSC_LF RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF RTC running, CPU, 80KB RAM and (partial) register retention. RCOSC_LF RTC running, CPU, 80KB RAM and (partial) register retention. XOSC_LF Icore Iperi Supply Systems and RAM powered RCOSC_HF MCU running CoreMark at 48 MHz RCOSC_HF Peripheral Current Consumption Peripheral power domain Delta current with domain enabled Serial power domain Delta current with domain enabled Delta current with power domain enabled, clock enabled, RF core idle Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle(3) Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle(1) CRYPTO (AES) Delta current with clock enabled, module is idle(2) Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle Sensor Controller Engine Consumption Idle Active RF Core DMA Timers I2C I2S SSI UART PKA TRNG www.ti.com TYP 1.1 -

1.55 1.77 1.64 1.70 1.75 1.63 V V V V V V A 150 150 nA 0.94 A 1.09 A 3.2 A 3.3 A 675 A 3.39 mA 97.7 7.2 210.9 63.9 81.0 10.1 26.3 82.9 167.5 25.6 84.7 35.6 12 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 8.5 Power Consumption - Power Modes (continued) CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled unless otherwise noted. PARAMETER TEST CONDITIONS ISCE Active mode 24 MHz, infinite loop Low-power mode 2 MHz, infinite loop

(1) Only one UART running

(2) Only one SSI running

(3) Only one GPTimer running 8.6 Power Consumption - Radio Modes When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.6 V with DC/DC enabled unless otherwise noted. PARAMETER TEST CONDITIONS Radio receive current 2440 MHz Radio transmit current 0 dBm output power setting 2440 MHz

+5 dBm output power setting 2440 MHz 8.7 Nonvolatile (Flash) Memory Characteristics Over operating free-air temperature range and VDDS = 3.0 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TYP UNIT 808.5 30.1 A TYP UNIT 7.3 mA 7.9 mA 10.2 mA Flash sector size Supported flash erase cycles before failure, full bank(1)

(5) Supported flash erase cycles before failure, single sector(2) Maximum number of write operations per row before sector erase(3) Flash retention 105 C Flash sector erase current Flash sector erase time(4) Flash write current Flash write time(4) Average delta current Zero cycles Average delta current, 4 bytes at a time 4 bytes at a time 10.7 10 6.2 21.6 A full bank erase is counted as a single erase cycle on each sector

(1)

(2) Up to 4 customer-designated sectors can be individually erased an additional 30k times beyond the baseline bank limitation of 30k cycles Each wordline is 2048 bits (or 256 bytes) wide. This limitation corresponds to sequential memory writes of 4 (3.1) bytes minimum per write over a whole wordline. If additional writes to the same wordline are required, a sector erase is required once the maximum number of write operations per row is reached. This number is dependent on Flash aging and increases over time and erase cycles Aborting flash during erase or program modes is not a safe operation.

(3)

(4)

(5) 30 60 11.4 8 KB k Cycles k Cycles 83 Write Operations Years at 105 C mA ms mA s PACKAGE RGZ

(VQFN) 48 PINS 23.4 13.3 UNIT C/W(2) C/W(2) 8.8 Thermal Resistance Characteristics THERMAL METRIC(1) RJA RJC(top) Junction-to-ambient thermal resistance Junction-to-case (top) thermal resistance Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.8 Thermal Resistance Characteristics (continued) THERMAL METRIC(1) RJB JT JB Junction-to-board thermal resistance Junction-to-top characterization parameter Junction-to-board characterization parameter RJC(bot) Junction-to-case (bottom) thermal resistance www.ti.com UNIT C/W(2) C/W(2) C/W(2) C/W(2) PACKAGE RGZ

(VQFN) 48 PINS 8.0 0.1 7.9 1.7

(1)

(2) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics. C/W = degrees Celsius per watt. 8.9 RF Frequency Bands Over operating free-air temperature range (unless otherwise noted). PARAMETER Frequency bands MIN 2360 TYP MAX 2500 UNIT MHz 8.10 Bluetooth Low Energy - Receive (RX) When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 125 kbps (LE Coded) Receiver sensitivity Receiver saturation Frequency error tolerance Data rate error tolerance Data rate error tolerance Co-channel rejection(1) Selectivity, 1 MHz(1) Selectivity, 2 MHz(1) Selectivity, 3 MHz(1) Selectivity, 4 MHz(1) Selectivity, 6 MHz(1) Differential mode. BER = 103 Differential mode. BER = 103 Difference between the incoming carrier frequency and the internally generated carrier frequency Difference between incoming data rate and the internally generated data rate (37-byte packets) Difference between incoming data rate and the internally generated data rate (255-byte packets) Wanted signal at 79 dBm, modulated interferer in channel, BER = 103 Wanted signal at 79 dBm, modulated interferer at 1 MHz, BER = 103, measured at input level 82 dBm Wanted signal at 79 dBm, modulated interferer at 2 MHz, BER = 103, measured at input level 82 dBm Wanted signal at 79 dBm, modulated interferer at 3 MHz, BER = 103, measured at input level 82 dBm Wanted signal at 79 dBm, modulated interferer at 4 MHz, BER = 103, measured at input level 82 dBm Wanted signal at 79 dBm, modulated interferer at 6 MHz, BER = 103, measured at input level 82 dBm 102

>5

> (300 / 300)

> (240 / 240)

> (125 / 125) 1.5 8 / 2(2) 44 / 39(2) 46 / 44(2) 44 / 46(2) 48 / 44(2) dBm dBm kHz ppm ppm dB dB dB dB dB dB 14 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 8.10 Bluetooth Low Energy - Receive (RX) (continued) CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Selectivity, 7 MHz Selectivity, Image frequency(1) Selectivity, Image frequency 1 MHz(1) 500 kbps (LE Coded) Receiver sensitivity Receiver saturation Frequency error tolerance Data rate error tolerance Data rate error tolerance Co-channel rejection(1) Selectivity, 1 MHz(1) Selectivity, 2 MHz(1) Selectivity, 3 MHz(1) Selectivity, 4 MHz(1) Selectivity, 6 MHz(1) Selectivity, 7 MHz Selectivity, Image frequency(1) Selectivity, Image frequency 1 MHz(1) 1 Mbps (LE 1M) Receiver sensitivity Wanted signal at 79 dBm, modulated interferer at 7 MHz, BER = 103, measured at input level 82 dBm Wanted signal at 79 dBm, modulated interferer at image frequency, BER = 103, measured at input level 82 dBm Note that Image frequency + 1 MHz is the Co-

channel 1 MHz. Wanted signal at 79 dBm, modulated interferer at 1 MHz from image frequency, BER = 103, measured at input level 82 dBm Differential mode. BER = 103 Differential mode. BER = 103 Difference between the incoming carrier frequency and the internally generated carrier frequency Difference between incoming data rate and the internally generated data rate (37-byte packets) Difference between incoming data rate and the internally generated data rate (255-byte packets) Wanted signal at 72 dBm, modulated interferer in channel, BER = 103 Wanted signal at 72 dBm, modulated interferer at 1 MHz, BER = 103, measured at input level 75 dBm Wanted signal at 72 dBm, modulated interferer at 2 MHz, BER = 103, measured at input level 75 dBm Wanted signal at 72 dBm, modulated interferer at 3 MHz, BER = 103, measured at input level 75 dBm Wanted signal at 72 dBm, modulated interferer at 4 MHz, BER = 103, measured at input level 75 dBm Wanted signal at 72 dBm, modulated interferer at 6 MHz, BER = 103, measured at input level 75 dBm Wanted signal at 72 dBm, modulated interferer at 7 MHz, BER = 103, measured at input level 75 dBm Wanted signal at 72 dBm, modulated interferer at image frequency, BER = 103, measured at input level 75 dBm Note that Image frequency + 1 MHz is the Co-

channel 1 MHz. Wanted signal at 72 dBm, modulated interferer at 1 MHz from image frequency, BER = 103, measured at input level 75 dBm 51 / 45(2) 39 2 / 44 (2) 100

> 5

> (300 / 300)

> (450 / 450)

> (175 / 175) 3.5 5 / -1(2) 44 / 37(2) 46 / 46(2) 45 / 47(2) 46 / 45(2) 49 / 45(2) 37

-1 / 46(2) dB dB dB dBm dBm kHz ppm ppm dB dB dB dB dB dB dB dB dB Differential mode. BER = 103 97 dBm Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.10 Bluetooth Low Energy - Receive (RX) (continued) www.ti.com When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN MAX UNIT Receiver saturation Differential mode. BER = 103 Frequency error tolerance Data rate error tolerance Co-channel rejection(1) Selectivity, 1 MHz(1) Selectivity, 2 MHz(1) Selectivity, 3 MHz(1) Selectivity, 4 MHz(1) Selectivity, 5 MHz or more(1) Selectivity, image frequency(1) Selectivity, image frequency 1 MHz(1) Difference between the incoming carrier frequency and the internally generated carrier frequency Difference between incoming data rate and the internally generated data rate (37-byte packets) Wanted signal at 67 dBm, modulated interferer in channel, BER = 103 Wanted signal at 67 dBm, modulated interferer at 1 MHz, BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at 2 MHz, BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at 3 MHz, BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at 4 MHz, BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at 5 MHz, BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at image frequency, BER = 103, measured at input level 70 dBm Note that Image frequency + 1 MHz is the Co-

channel 1 MHz. Wanted signal at 67 dBm, modulated interferer at 1 MHz from image frequency, BER = 103, measured at input level 70 dBm Out-of-band blocking(3) 30 MHz to 2000 MHz Out-of-band blocking 2003 MHz to 2399 MHz Out-of-band blocking 2484 MHz to 2997 MHz Out-of-band blocking 3000 MHz to 12.75 GHz Intermodulation Spurious emissions, 30 to 1000 MHz(4) Spurious emissions, 1 to 12.75 GHz(4) RSSI dynamic range RSSI accuracy 2 Mbps (LE 2M) Receiver sensitivity Receiver saturation Wanted signal at 2402 MHz, 64 dBm. Two interferers at 2405 and 2408 MHz respectively, at the given power level Measurement in a 50- single-ended load. Measurement in a 50 single-ended load. Differential mode. Measured at SMA connector, BER = 103 Differential mode. Measured at SMA connector, BER = 103 TYP

> 5

> (350 / 350)

> (750 / 750) 6 7 / 4(2) 39 / 33(2) 36 / 41(2) 36 / 45(2) 4 / 41(2) 40 33 10 18 12 2 42 70 4 92

> 5

< 59

< 47 dBm kHz ppm dB dB dB dB dB dB dB dB dBm dBm dBm dBm dBm dBm dBm dB dB dBm dBm 16 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 8.10 Bluetooth Low Energy - Receive (RX) (continued) CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Frequency error tolerance Data rate error tolerance Co-channel rejection(1) Selectivity, 2 MHz(1) Selectivity, 4 MHz(1) Selectivity, 6 MHz(1) Selectivity, image frequency(1) Selectivity, image frequency 2 MHz(1) Difference between the incoming carrier frequency and the internally generated carrier frequency Difference between incoming data rate and the internally generated data rate (37-byte packets) Wanted signal at 67 dBm, modulated interferer in channel, BER = 103 Wanted signal at 67 dBm, modulated interferer at 2 MHz, Image frequency is at 2 MHz BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at 4 MHz, BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at 6 MHz, BER = 103, measured at input level 70 dBm Wanted signal at 67 dBm, modulated interferer at image frequency, BER = 103, measured at input level 70 dBm Note that Image frequency + 2 MHz is the Co-

channel. Wanted signal at 67 dBm, modulated interferer at 2 MHz from image frequency, BER =

103, measured at input level 70 dBm Out-of-band blocking(3) 30 MHz to 2000 MHz Out-of-band blocking 2003 MHz to 2399 MHz Out-of-band blocking 2484 MHz to 2997 MHz Out-of-band blocking 3000 MHz to 12.75 GHz Intermodulation Wanted signal at 2402 MHz, 64 dBm. Two interferers at 2408 and 2414 MHz respectively, at the given power level

> (500 / 500)

> (700 / 750) 7 8 / 4(2) 36 / 36(2) 37 / 36(2) 7 / 36(2) 4 16 21 15 12 38 kHz ppm dB dB dB dB dB dB dBm dBm dBm dBm dBm

(1) Numbers given as I/C dB

(2)

(3)

(4) X / Y, where X is +N MHz and Y is N MHz Excluding one exception at Fwanted / 2, per Bluetooth Specification Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan) 8.11 Bluetooth Low Energy - Transmit (TX) When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. TEST CONDITIONS MIN TYP MAX UNIT Differential mode, delivered to a single-ended 50 load through a balun Differential mode, delivered to a single-ended 50 load through a balun Differential mode, delivered to a single-ended 50 load through a balun 5 26 dBm dB PARAMETER General Parameters Max output power Output power programmable range Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.11 Bluetooth Low Energy - Transmit (TX) (continued) www.ti.com When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Spurious emissions and harmonics Spurious emissions(1) Harmonics (1) f < 1 GHz, outside restricted bands f < 1 GHz, restricted bands ETSI f < 1 GHz, restricted bands FCC

+5 dBm setting

+5 dBm setting

+5 dBm setting f > 1 GHz, including harmonics +5 dBm setting Second harmonic Third harmonic

+5 dBm setting

+5 dBm setting

(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan). 8.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. TEST CONDITIONS MIN TYP MAX UNIT PARAMETER General Parameters Output power programmable range Max output power Differential mode, delivered to a single-ended 50- load through a balun Differential mode, delivered to a single-ended 50- load through a balun Spurious emissions and harmonics Spurious emissions(1)

(2) Harmonics(1) f < 1 GHz, outside restricted bands f < 1 GHz, restricted bands ETSI f < 1 GHz, restricted bands FCC f > 1 GHz, including harmonics Second harmonic Third harmonic IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) Error vector magnitude

+5 dBm setting

+5 dBm setting

(1)

(2) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan). To ensure margins for passing FCC band edge requirements at 2483.5 MHz, a lower than maximum output-power setting or less than 100% duty cycle may be used when operating at 2480 MHz. 2

< 36

< 54

< 55

< 42

< 42

< 42 5 26

< -36

< -47

< -55

< 42

< -42

< -42 dBm dBm dBm dBm dBm dBm dBm dB dBm dBm dBm dBm dBm dBm 18 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX When measured on the CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, fRF = 2440 MHz with DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN MAX UNIT Receiver sensitivity Receiver saturation PER = 1%

PER = 1%

Adjacent channel rejection Alternate channel rejection Channel rejection, 15 MHz or more Wanted signal at 82 dBm, modulated interferer at 5 MHz, PER = 1%

Wanted signal at 82 dBm, modulated interferer at 10 MHz, PER = 1%

Wanted signal at 82 dBm, undesired signal is IEEE 802.15.4 modulated channel, stepped through all channels 2405 to 2480 MHz, PER = 1%

Blocking and desensitization, 5 MHz from upper band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Blocking and desensitization, 10 MHz from upper band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Blocking and desensitization, 20 MHz from upper band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Blocking and desensitization, 50 MHz from upper band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Blocking and desensitization, 5 MHz from lower band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Blocking and desensitization, 10 MHz from lower band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Blocking and desensitization, 20 MHz from lower band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Blocking and desensitization, 50 MHz from lower band edge Wanted signal at 97 dBm (3 dB above the sensitivity level), CW jammer, PER = 1%

Spurious emissions, 30 MHz to 1000 MHz Spurious emissions, 1 GHz to 12.75 GHz Frequency error tolerance Symbol rate error tolerance RSSI dynamic range RSSI accuracy Measurement in a 50- single-ended load Measurement in a 50- single-ended load Difference between the incoming carrier frequency and the internally generated carrier frequency Difference between incoming symbol rate and the internally generated symbol rate 8.14 Timing and Switching Characteristics 8.14.1 Reset Timing PARAMETER TYP 100

> 5 36 57 59 57 63 63 66 60 60 63 64 66 53

> 350

> 1000 95 4 dBm dBm dB dB dB dB dB dB dB dB dB dB dB dBm dBm ppm ppm dB dB RESET_N low duration 8.14.2 Wakeup Timing MCU, Reset to Active(1) MCU, Shutdown to Active(1) Measured over operating free-air temperature with VDDS = 3.0 V (unless otherwise noted). The times listed here do not include software overhead. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT MIN TYP MAX UNIT 1 s 850 - 4300 850 - 4300 s s Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.14.2 Wakeup Timing (continued) MCU, Standby to Active MCU, Active to Standby MCU, Idle to Active Measured over operating free-air temperature with VDDS = 3.0 V (unless otherwise noted). The times listed here do not include software overhead. PARAMETER TEST CONDITIONS MIN MAX UNIT www.ti.com TYP 160 36 14 s s s

(1) The wakeup time is dependent on remaining charge on VDDR capacitor when starting the device, and thus how long the device has been in Reset or Shutdown before starting up again. 20 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 8.14.3 Clock Specifications CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.14.3.1 48 MHz Bulk Acoustic Wave (BAW) Oscillator Measured on CC26x2RBEM-7ID reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. TYP PARAMETER MIN Clock frequency (1) Start-up time(3) Compensated clock frequency for RF PLL and Modem (2)

-40 MAX UNIT 40 MHz ppm s 48 80

(1) Compensated clock frequency used by RF PLL and Modem. Non-RF domain (MCU and Peripherals) uncompensated frequency has variation upto +/- 0.4% in offset and +/- 200 ppm across temperature. Across operational temperature range, including 10 year aging at 30C. Compensation parameters are measured in TI production and stored in device for clock compensation. Start-up time using the TI-provided power driver.

(2)

(3) 8.14.3.2 48 MHz Crystal Oscillator (XOSC_HF) Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted.(1) PARAMETER MIN TYP MAX UNIT ESR ESR LM CL Crystal frequency Equivalent series resistance 6 pF < CL 9 pF Equivalent series resistance 5 pF < CL 6 pF Start-up time(2) Motional inductance, relates to the load capacitance that is used for the crystal (CL in Farads)(5) Crystal load capacitance(4) 5

< 3 1025 / CL 2 Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device. Start-up time using the TI-provided power driver. Start-up time may increase if driver is not used.

(1)

(2)

(3) On-chip default connected capacitance including reference design parasitic capacitance. Connected internal capacitance is changed through software in the Customer Configuration section (CCFG). Adjustable load capacitance is integrated into the device. The crystal manufacturer's specification must satisfy this requirement for proper operation.

(4)

(5) 8.14.3.3 48 MHz RC Oscillator (RCOSC_HF) Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. MIN TYP MAX 48 20 7(3) 200 60 80 9 MHz H pF s Frequency Uncalibrated frequency accuracy Calibrated frequency accuracy(1) Start-up time

(1) Accuracy relative to the calibration source (XOSC_HF) 8.14.3.4 2 MHz RC Oscillator (RCOSC_MF) Calibrated frequency Start-up time Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. MIN TYP MAX 48 1 5 0.25 2 5 UNIT MHz

s UNIT MHz s Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.14.3.5 32.768 kHz Crystal Oscillator (XOSC_LF) Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. Crystal frequency ESR Equivalent series resistance CL Crystal load capacitance used. Calibrated frequency Temperature coefficient.

(1) Default load capacitance using TI reference designs including parasitic capacitance. Crystals with different load capacitance may be 8.14.3.6 32 kHz RC Oscillator (RCOSC_LF) Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. www.ti.com MIN 6 TYP 32.768 30 7(1) MAX UNIT kHz k pF 100 12 MIN MAX UNIT TYP 32.8 (1) 50 kHz ppm/C

(1) When using RCOSC_LF as source for the low frequency system clock (SCLK_LF), the accuracy of the SCLK_LF-derived Real Time Clock (RTC) can be improved by measuring RCOSC_LF relative to XOSC_HF and compensating for the RTC tick speed. This functionality is available through the TI-provided Power driver. 22 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.14.4 Synchronous Serial Interface (SSI) Characteristics 8.14.4.1 Synchronous Serial Interface (SSI) Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER NO. S1 S2(1) S3(1) tclk_per tclk_high tclk_low SSIClk cycle time SSIClk high time SSIClk low time PARAMETER TYP MAX UNIT MIN 12 65024 System Clocks (2) 0.5 0.5 tclk_per tclk_per

(1) Refer to SSI timing diagrams Figure 8-1, Figure 8-2, and Figure 8-3

(2) When using the TI-provided Power driver, the SSI system clock is always 48 MHz. Figure 8-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement Figure 8-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: CC2652RB SSIClkSSIFssSSITxSSIRxMSBLSBS2S3S14to16bits0SSIClkSSIFssSSITxSSIRxMSBLSBMSBLSBS2S3S18-bitcontrol4to16bitsoutputdata CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com Figure 8-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1 8.14.5 UART 8.14.5.1 UART Characteristics UART rate over operating free-air temperature range (unless otherwise noted) PARAMETER MIN TYP MAX 3 UNIT MBaud 24 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB SSIClk(SPO = 1)SSITx(Master)SSIRx(Slave)LSBSSIClk(SPO = 0)S2S1SSIFssLSBS3MSBMSB www.ti.com 8.15 Peripheral Characteristics 8.15.1 ADC CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.15.1.1 Analog-to-Digital Converter (ADC) Characteristics Tc = 25 C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1) Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers. TEST CONDITIONS TYP MAX UNIT MIN 0 VDDS 200 PARAMETER Input voltage range Resolution Sample Rate Offset Gain error DNL(4) Differential nonlinearity INL Integral nonlinearity ENOB Effective number of bits THD Total harmonic distortion SINAD, SNDR Signal-to-noise and distortion ratio SFDR Spurious-free dynamic range Internal 4.3 V equivalent reference(2) Internal 4.3 V equivalent reference(2) Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone, DC/DC enabled VDDS as reference, 200 kSamples/s, 9.6 kHz input tone Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone Internal reference, voltage scaling disabled, 14-bit mode, 200 kSamples/s, 600 Hz input tone (5) Internal reference, voltage scaling disabled, 15-bit mode, 200 kSamples/s, 150 Hz input tone (5) Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone VDDS as reference, 200 kSamples/s, 9.6 kHz input tone Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone VDDS as reference, 200 kSamples/s, 9.6 kHz input tone Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone VDDS as reference, 200 kSamples/s, 9.6 kHz input tone Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone 12 0.24 7.14

>1 4 9.8 9.8 10.1 11.1 11.3 11.6 65 70 72 60 63 68 70 73 75 50 0.42 0.6 V Bits ksps LSB LSB LSB LSB Bits dB dB dB mA mA Conversion time Serial conversion, time-to-output, 24 MHz clock Clock Cycles Current consumption Internal 4.3 V equivalent reference(2) Current consumption VDDS as reference Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com 8.15.1.1 Analog-to-Digital Converter (ADC) Characteristics (continued) Tc = 25 C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1) Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Reference voltage Reference voltage Equivalent fixed internal reference (input voltage scaling enabled). For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/offset compensation factors stored in FCFG1 Fixed internal reference (input voltage scaling disabled). For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/offset compensation factors stored in FCFG1. This value is derived from the scaled value

(4.3 V) as follows:

Vref = 4.3 V 1408 / 4095 Reference voltage VDDS as reference, input voltage scaling enabled Reference voltage VDDS as reference, input voltage scaling disabled 4.3(2) (3) 1.48 VDDS VDDS /

2.82(3) V V V V Input impedance 200 kSamples/s, voltage scaling enabled. Capacitive input, Input impedance depends on sampling frequency and sampling time

>1 M Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V Applied voltage must be within Absolute Maximum Ratings (see Section 8.1) at all times

(1) Using IEEE Std 1241-2010 for terminology and test methods

(2)

(3)

(4) No missing codes

(5) ADC_output = (4n samples ) >> n, n = desired extra bits 26 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT www.ti.com 8.15.2 DAC General Parameters Resolution VDDS Supply voltage FDAC Clock frequency Voltage output settling time External capacitive load External resistive load Short circuit current ZMAX Max output impedance Vref = VDDS, buffer ON, CLK 250 kHz Any load, any VREF, pre-charge OFF, DAC charge-

pump ON External Load(4), any VREF, pre-charge OFF, DAC charge-pump OFF Any load, VREF = DCOUPL, pre-charge ON Buffer ON (recommended for external load) Buffer OFF (internal load) VREF = VDDS, buffer OFF, internal load VREF = VDDS, buffer ON, external capacitive load = 20 pF(3) 1.8 2.0 2.6 16 16 10 3.8 3.8 3.8 250 1000 20 200 400 VDDS = 3.8 V, DAC charge-pump OFF VDDS = 3.0 V, DAC charge-pump ON VDDS = 3.0 V, DAC charge-pump OFF VDDS = 2.0 V, DAC charge-pump ON VDDS = 2.0 V, DAC charge-pump OFF VDDS = 1.8 V, DAC charge-pump ON VDDS = 1.8 V, DAC charge-pump OFF Internal Load - Continuous Time Comparator / Low Power Clocked Comparator Differential nonlinearity DNL Differential nonlinearity VREF = VDDS, load = Continuous Time Comparator or Low Power Clocked Comparator FDAC = 250 kHz VREF = VDDS, load = Continuous Time Comparator or Low Power Clocked Comparator FDAC = 16 kHz Offset error(2) Load = Continuous Time Comparator Offset error(2) Load = Low Power Clocked Comparator VREF = VDDS = 3.8 V VREF = VDDS= 3.0 V VREF = VDDS = 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS= 3.8 V VREF = VDDS = 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF Bits V kHz pF M A k 1 / FDAC LSB(1) LSB(1) LSB(1) 8 13 13.8 50.8 51.7 53.2 48.7 70.2 46.3 88.9 1 1.2 0.64 0.81 1.27 3.43 2.88 2.37 0.78 0.77 3.46 3.44 4.70 4.11 Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com 8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics (continued) Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN MAX UNIT VREF = VDDS = 3.8 V VREF = VDDS = 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS= 3.8 V VREF =VDDS= 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS = 3.8 V, code 1 VREF = VDDS = 3.8 V, code 255 VREF = VDDS= 3.0 V, code 1 VREF = VDDS= 3.0 V, code 255 VREF = VDDS= 1.8 V, code 1 VREF = VDDS = 1.8 V, code 255 Max code output voltage variation(2) Load = Continuous Time Comparator Max code output voltage variation(2) Load = Low Power Clocked Comparator Output voltage range(2) Load = Continuous Time Comparator VREF = DCOUPL, pre-charge OFF, code 1 VREF = DCOUPL, pre-charge OFF, code 255 VREF = DCOUPL, pre-charge ON, code 1 VREF = DCOUPL, pre-charge ON, code 255 VREF = ADCREF, code 1 VREF = ADCREF, code 255 VREF = VDDS = 3.8 V, code 1 VREF = VDDS= 3.8 V, code 255 VREF = VDDS= 3.0 V, code 1 VREF = VDDS= 3.0 V, code 255 VREF = VDDS = 1.8 V, code 1 VREF = VDDS = 1.8 V, code 255 VREF = DCOUPL, pre-charge OFF, code 1 VREF = DCOUPL, pre-charge OFF, code 255 VREF = DCOUPL, pre-charge ON, code 1 VREF = DCOUPL, pre-charge ON, code 255 VREF = ADCREF, code 1 VREF = ADCREF, code 255 Output voltage range(2) Load = Low Power Clocked Comparator External Load (Keysight 34401A Multimeter) INL Integral nonlinearity VREF = DCOUPL, FDAC = 250 kHz VREF = VDDS, FDAC = 250 kHz VREF = ADCREF, FDAC = 250 kHz DNL Differential nonlinearity VREF = VDDS, FDAC = 250 kHz TYP 1.53 1.71 2.10 6.00 3.85 5.84 2.92 3.06 3.91 7.84 4.06 6.94 0.03 3.62 0.02 2.86 0.01 1.71 0.01 1.21 1.27 2.46 0.01 1.41 0.03 3.61 0.02 2.85 0.01 1.71 0.01 1.21 1.27 2.46 0.01 1.41 1 1 1 1 LSB(1) LSB(1) V V LSB(1) LSB(1) 28 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics (continued) Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN MAX UNIT VREF = VDDS= 3.8 V VREF = VDDS= 3.0 V VREF = VDDS = 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS= 3.8 V VREF = VDDS= 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS = 3.8 V, code 1 VREF = VDDS = 3.8 V, code 255 VREF = VDDS = 3.0 V, code 1 VREF = VDDS= 3.0 V, code 255 VREF = VDDS= 1.8 V, code 1 VREF = VDDS = 1.8 V, code 255 Offset error Max code output voltage variation Output voltage range Load = Low Power Clocked Comparator VREF = DCOUPL, pre-charge OFF, code 1 VREF = DCOUPL, pre-charge OFF, code 255 VREF = DCOUPL, pre-charge ON, code 1 VREF = DCOUPL, pre-charge ON, code 255 VREF = ADCREF, code 1 VREF = ADCREF, code 255 LSB(1) LSB(1) V TYP 0.20 0.25 0.45 1.55 1.30 1.10 0.60 0.55 0.60 3.45 2.10 1.90 0.03 3.61 0.02 2.85 0.02 1.71 0.02 1.20 1.27 2.46 0.02 1.42

(1)

(2)

(3)

(4) 1 LSB (VREF 3.8 V/3.0 V/1.8 V/DCOUPL/ADCREF) = 14.10 mV/11.13 mV/6.68 mV/4.67 mV/5.48 mV Includes comparator offset A load > 20 pF will increases the settling time Keysight 34401A Multimeter Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: CC2652RB Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(1) The temperature sensor is automatically compensated for VDDS variation when using the TI-provided driver. Measured on a Texas Instruments reference design with Tc = 25 C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.15.3 Temperature and Battery Monitor 8.15.3.1 Temperature Sensor Resolution Accuracy Accuracy Supply voltage coefficient(1) 8.15.3.2 Battery Monitor Integral nonlinearity (max) Resolution Range Accuracy Offset error Gain error

-40 C to 0 C 0 C to 105 C VDDS = 3.0 V www.ti.com C C C C/V mV V mV mV mV

2 4.0 2.5 3.6 25 23 22.5

-32

-1 1.8 3.8 30 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com 8.15.4 Comparators 8.15.4.1 Low-Power Clocked Comparator Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS Input voltage range Clock frequency Internal reference voltage(1) Offset Decision time Using internal DAC with VDDS as reference voltage, DAC code = 0 - 255 Measured at VDDS / 2, includes error from internal DAC Step from 50 mV to 50 mV

(1) The comparator can use an internal 8 bits DAC as its reference. The DAC output voltage range depends on the reference voltage selected. See Section 8.15.2.1 PARAMETER TEST CONDITIONS MIN TYP UNIT 8.15.4.2 Continuous Time Comparator Tc = 25C, VDDS = 3.0 V, unless otherwise noted. Input voltage range(1) Offset Decision time Measured at VDDS / 2 Step from 10 mV to 10 mV Current consumption Internal reference

(1) The input voltages can be generated externally and connected throughout I/Os or an internal reference voltage can be generated using the DAC 8.15.5 Current Source 8.15.5.1 Programmable Current Source Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. Current source programmable output range

(logarithmic range) Resolution PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 0.25 - 20 0.25 A A MIN 0 TYP MAX UNIT VDDS SCLK_LF 0.024 -

2.865 5 1 V V mV Clock Cycle 0 MAX VDDS 5 0.78 8.6 V mV s A Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 31 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.15.6 GPIO 8.15.6.1 GPIO DC Characteristics PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25 C, VDDS = 1.8 V GPIO VOH at 8 mA load GPIO VOL at 8 mA load GPIO VOH at 4 mA load GPIO VOL at 4 mA load GPIO pullup current GPIO pulldown current GPIO input hysteresis TA = 25 C, VDDS = 3.0 V GPIO VOH at 8 mA load GPIO VOL at 8 mA load GPIO VOH at 4 mA load GPIO VOL at 4 mA load TA = 25 C, VDDS = 3.8 V GPIO pullup current GPIO pulldown current GPIO input hysteresis TA = 25 C VIH VIL GPIO low-to-high input transition, with hysteresis GPIO high-to-low input transition, with hysteresis GPIO low-to-high input transition, with hysteresis GPIO high-to-low input transition, with hysteresis IOCURR = 2, high-drive GPIOs only IOCURR = 2, high-drive GPIOs only IOCURR = 1 IOCURR = 1 Input mode, pullup enabled, Vpad = 0 V Input mode, pulldown enabled, Vpad = VDDS IH = 1, transition voltage for input read as 0 1 IH = 1, transition voltage for input read as 1 0 IH = 1, difference between 0 1 and 1 0 points IOCURR = 2, high-drive GPIOs only IOCURR = 2, high-drive GPIOs only IOCURR = 1 IOCURR = 1 Input mode, pullup enabled, Vpad = 0 V Input mode, pulldown enabled, Vpad = VDDS IH = 1, transition voltage for input read as 0 1 IH = 1, transition voltage for input read as 1 0 IH = 1, difference between 0 1 and 1 0 points Lowest GPIO input voltage reliably interpreted as a High 0.8*VDDS Highest GPIO input voltage reliably interpreted as a Low 0.2*VDDS www.ti.com A A V V V V V V V V V V V V V V V V A A 1.56 0.24 1.59 0.21 73 19 1.08 0.73 0.35 2.59 0.42 2.63 0.40 282 110 1.97 1.55 0.42 32 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 8.16 Typical Characteristics 8.16.1 MCU Current All measurements in this section are done with Tc = 25 C and VDDS = 3.0 V, unless otherwise noted. See Recommended Operating Conditions, Section 8.3, for device limits. Values exceeding these limits are for reference only. CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Figure 8-4. Active Mode (MCU) Current vs. Supply Voltage (VDDS) Figure 8-5. Standby Mode (MCU) Current vs. Temperature Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 33 Product Folder Links: CC2652RB Voltage [V]Current [mA]Active Current vs. VDDSRunning CoreMark, SCLK_HF = 48 MHz RCOSC1.822.22.42.62.833.23.43.63.82.533.544.555.56D001Temperature [C]Current [A]Standby Current vs. Temperature80 kB RAM Retention, no Cache Retention, RTC OnSCLK_LF = 32 kHz XOSC-40-30-20-100102030405060708090100024681012D006 CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com Figure 8-6. Standby Mode (MCU) Current vs. Temperature (VDDS = 3.6 V) 34 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Temperature [C]Current [A]Standby Current vs. Temperature80 kB RAM Retention, no Cache Retention, RTC OnSCLK_LF = 32 kHz XOSC VDDS = 3.6 V-40-30-20-100102030405060708090100024681012 www.ti.com 8.16.2 RX Current CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Figure 8-7. RX Current vs. Temperature (BLE 1 Mbps, 2.44 GHz) Figure 8-8. RX Current vs. Supply Voltage (VDDS) (BLE 1 Mbps, 2.44 GHz) Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 35 Product Folder Links: CC2652RB Temperature [C]Current [mA]RX Current vs. TemperatureBLE 1 Mbps, 2.44 GHz-40-30-20-1001020304050607080856.56.66.76.86.977.17.27.37.47.57.67.77.87.988.18.28.38.48.5Voltage [V]Current [mA]RX Current vs. VDDSBLE 1 Mbps, 2.44 GHz1.822.22.42.62.833.23.43.63.85.566.577.588.599.51010.51111.512 CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.16.3 TX Current www.ti.com Figure 8-9. TX Current vs. Temperature (BLE 1 Mbps, 2.44 GHz) Figure 8-10. TX Current vs. Supply Voltage (VDDS) (BLE 1 Mbps, 2.44 GHz) 36 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Temperature [C]Current [mA]TX Current vs. TemperatureBLE 1 Mbps, 2.44 GHz, 0 dBm-40-30-20-10010203040506070808566.156.36.456.66.756.97.057.27.357.57.657.87.958.18.258.48.558.78.859Voltage [V]Current [mA]TX Current vs. VDDSBLE 1 Mbps, 2.44 GHz, 0 dBm1.822.22.42.62.833.23.43.63.866.577.588.599.51010.51111.51212.5 www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Table 8-1 shows typical TX current and output power for different output power settings. Table 8-1. Typical TX Current and Output Power CC2652RB at 2.44 GHz, VDDS = 3.0 V (Measured on CC26x2RBEM-7ID) txPower TX Power Setting (SmartRF Studio) Typical Output Power [dBm]

Typical Current Consumption [mA]

0x7217 0x4E63 0x385D 0x3259 0x2856 0x2853 0x12D6 0x0ACF 0x06CA 0x04C6 5 4 3 2 1 0

-5

-10

-15

-21 5.3 4.2 3.1 2.1 1.2 0.1

-5.0

-9.6

-14.8

-21.2 10.1 9.5 9 8.5 8.2 7.8 6.7 6.1 5.6 5.3 Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.16.4 RX Performance www.ti.com Figure 8-11. Sensitivity vs. Frequency (BLE 1 Mbps, 2.44 GHz) Figure 8-12. Sensitivity vs. Frequency IEEE 802.15.4 (OQPSK DSSS1:8, 250 kbps) 38 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Frequency [GHz]Sensitivity [GHz]Sensitivity vs. FrequencyBLE 1 Mbps2.42.4082.4162.4242.4322.442.4482.4562.4642.4722.48-102-101-100-99-98-97-96-95-94-93-92Frequency [GHz]Sensitivity [dBm]Sensitivity vs. FrequencyIEEE 802.15.4 (OQPSK DSSS1:8, 250 kbps)2.42.4082.4162.4242.4322.442.4482.4562.4642.4722.48-105-104-103-102-101-100-99-98-97-96-95 www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Figure 8-13. Sensitivity vs. Temperature (BLE 1 Mbps, 2.44 GHz) Figure 8-14. Sensitivity vs. Temperature IEEE 802.15.4 (OQPSK DSSS1:8, 250 kbps) Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 39 Product Folder Links: CC2652RB Temperature [C]Sensitivity [dBm]Sensitivity vs. TemperatureBLE 1 Mbps, 2.44 GHz-40-30-20-100102030405060708085-102-101-100-99-98-97-96-95-94-93-92Temperature [C]Sensitivity [dBm]Sensitivity vs. TemperatureIEEE 802.15.4 (OQPSK DSSS1:8, 250 kbps), 2.44 GHz-40-30-20-100102030405060708085-105-104-103-102-101-100-99-98-97-96-95 CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com Figure 8-15. Sensitivity vs. Supply Voltage (VDDS) (BLE 1 Mbps, 2.44 GHz) Figure 8-16. Sensitivity vs. Supply Voltage (VDDS) (BLE 1 Mbps, 2.44 GHz, DCDC Off) 40 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Voltage [V]Sensitivity [dBm]Sensitivity vs. VDDSBLE 1 Mbps, 2.44 GHz1.822.22.42.62.833.23.43.63.8-102-101-100-99-98-97-96-95-94-93-92Voltage [V]Sensitivity [dBm]Sensitivity vs. VDDSBLE 1 Mbps, 2.44 GHz, DCDC Off1.822.22.42.62.833.23.43.63.8-102-101-100-99-98-97-96-95-94-93-92 www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Figure 8-17. Sensitivity vs. Supply Voltage (VDDS) IEEE 802.15.4 (OQPSK DSSS1:8, 250 kbps) Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: CC2652RB Voltage [V]Sensitivity [dBm]Sensitivity vs. VDDSIEEE 802.15.4 (OQPSK DSSS1:8, 250 kbps), 2.44 GHz1.822.22.42.62.833.23.43.63.8-105-104-103-102-101-100-99-98-97-96-95 CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.16.5 TX Performance www.ti.com Figure 8-18. Output Power vs. Temperature (BLE 1 Mbps, 2.44 GHz, 0 dBm) Figure 8-19. Output Power vs. Temperature (BLE 1 Mbps, 2.44 GHz, +5 dBm) 42 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Temperature [C]Output Power [dBm]Output Power vs. TemperatureBLE 1 Mbps, 2.44 GHz, 0 dBm-40-30-20-100102030405060708085-2-1.8-1.6-1.4-1.2-1-0.8-0.6-0.4-0.200.20.40.60.811.21.41.61.82Temperature [C]Output Power [dBm]Output Power vs. TemperatureBLE 1 Mbps, 2.44 GHz, +5 dBm-40-30-20-10010203040506070808533.23.43.63.844.24.44.64.855.25.45.65.866.26.46.66.87 www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Figure 8-20. Output Power vs. Supply Voltage (VDDS) (BLE 1 Mbps, 2.44 GHz, 0 dBm) Figure 8-21. Output Power vs. Supply Voltage (VDDS) (BLE 1 Mbps, 2.44 GHz, +5 dBm) Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 43 Product Folder Links: CC2652RB Voltage [V]Output Power [dBm]Output Power vs. VDDSBLE 1 Mbps, 2.44 GHz, 0 dBm1.822.22.42.62.833.23.43.63.8-2-1.8-1.6-1.4-1.2-1-0.8-0.6-0.4-0.200.20.40.60.811.21.41.61.82Voltage [V]Output Power [dBm]Output power vs. VDDSBLE 1 Mbps, 2.44 GHz, +5 dBm1.822.22.42.62.833.23.43.63.833.23.43.63.844.24.44.64.855.25.45.65.866.26.46.66.87 CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com Figure 8-22. Output Power vs. Frequency (BLE 1 Mbps, 2.44 GHz, 0 dBm) Figure 8-23. Output Power vs. Frequency (BLE 1 Mbps, 2.44 GHz, +5 dBm) 44 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Frequency [GHz]Output Power [dBm]Output Power vs. FrequencyBLE 1 Mbps, 2.44 GHz, 0 dBm2.42.4082.4162.4242.4322.442.4482.4562.4642.4722.48-2-1.8-1.6-1.4-1.2-1-0.8-0.6-0.4-0.200.20.40.60.811.21.41.61.82Frequency [GHz]Output Power [dBm]Output Power vs. FrequencyBLE 1 Mbps, 2.44 GHz, +5 dBm2.42.4082.4162.4242.4322.442.4482.4562.4642.4722.4833.23.43.63.844.24.44.64.855.25.45.65.866.26.46.66.87 www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Figure 8-24. Compensated Frequency Accuracy vs. Temperature (2.44 GHz) Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 45 Product Folder Links: CC2652RB Temperature [C]Frequency Accuracy [ppm]Compensated Frequency Accuracy vs. TemperatureRF Frequency, 2.44 GHz-40-30-20-100102030405060708085-25-20-15-10-50510152025 CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 8.16.6 ADC Performance www.ti.com Figure 8-25. ENOB vs. Input Frequency Figure 8-26. ENOB vs. Sampling Frequency 46 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Frequency [kHz]ENOB [Bit]ENOB vs. Input Frequency0.20.30.50.7123456781020304050701009.69.910.210.510.811.111.4D061Internal Reference, No AveragingInternal Unscaled Reference, 14-bit ModeFrequency [kHz]ENOB [Bit]ENOB vs. Sampling FrequencyVin = 3.0 V Sine wave, Internal reference,Fin = Fs / 10123456781020304050701002009.89.859.99.951010.0510.110.1510.2D062 www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Figure 8-27. INL vs. ADC Code Figure 8-28. DNL vs. ADC Code Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 47 Product Folder Links: CC2652RB ADC CodeINL [LSB]INL vs. ADC CodeVin = 3.0 V Sine wave, Internal reference,200 kSamples/s040080012001600200024002800320036004000-1.5-1-0.500.511.5D064ADC CodeDNL [LSB]DNL vs. ADC CodeVin = 3.0 V Sine wave, Internal reference,200 kSamples/s040080012001600200024002800320036004000-0.500.511.522.5D065 CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com Figure 8-29. ADC Accuracy vs. Temperature Figure 8-30. ADC Accuracy vs. Supply Voltage (VDDS) 48 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB Temperature [C]Voltage [V]ADC Accuracy vs. TemperatureVin = 1 V, Internal reference,200 kSamples/s-40-30-20-10010203040506070809010011.0011.0021.0031.0041.0051.0061.0071.0081.0091.01D066Voltage [V]Voltage [V]ADC Accuracy vs. VDDSVin = 1 V, Internal reference,200 kSamples/s1.822.22.42.62.833.23.43.63.811.0011.0021.0031.0041.0051.0061.0071.0081.0091.01D067 www.ti.com 9 Detailed Description 9.1 Overview 9.2 System CPU Section 4 shows the core modules of the CC2652RB device. CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 The CC2652RB SimpleLink Wireless MCU contains an Arm Cortex-M4F system CPU, which runs the application and the higher layers of radio protocol stacks. The system CPU is the foundation of a high-performance, low-cost platform that meets the system requirements of minimal memory implementation, and low-power consumption, while delivering outstanding computational performance and exceptional system response to interrupts. Its features include the following:

ARMv7-M architecture optimized for small-footprint embedded applications Arm Thumb-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm core in a compact memory size Fast code execution permits increased sleep mode time Deterministic, high-performance interrupt handling for time-critical applications Single-cycle multiply instruction and hardware divide Hardware division and fast digital-signal-processing oriented multiply accumulate Saturating arithmetic for signal processing Memory Protection Unit (MPU) for safety-critical applications Full debug with data matching for watchpoint generation IEEE 754-compliant single-precision Floating Point Unit (FPU) Data Watchpoint and Trace Unit (DWT) JTAG Debug Access Port (DAP) Flash Patch and Breakpoint Unit (FPB) Trace support reduces the number of pins required for debugging and tracing Instrumentation Trace Macrocell Unit (ITM) Trace Port Interface Unit (TPIU) with asynchronous serial wire output (SWO) Optimized for single-cycle flash memory access Tightly connected to 8-KB 4-way random replacement cache for minimal active power consumption and wait states Ultra-low-power consumption with integrated sleep modes 48 MHz operation 1.25 DMIPS per MHz Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 49 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 9.3 Radio (RF Core) www.ti.com The RF Core is a highly flexible and future proof radio module which contains an Arm Cortex-M0 processor that interfaces the analog RF and base-band circuitry, handles data to and from the system CPU side, and assembles the information bits in a given packet structure. The RF core offers a high level, command-based API to the main CPU that configurations and data are passed through. The Arm Cortex-M0 processor is not programmable by customers and is interfaced through the TI-provided RF driver that is included with the SimpleLink Software Development Kit (SDK). The RF core can autonomously handle the time-critical aspects of the radio protocols, thus offloading the main CPU, which reduces power and leaves more resources for the user application. Several signals are also available to control external circuitry such as RF switches or range extenders autonomously. A Packet Traffic Arbitrator (PTA) scheme is available for the managed coexistence of BLE and a co-located 2.4-

GHz radio. This is based on 802.15.2 recommendations and common industry standards. The 3-wire coexistence interface has multiple modes of operation, encompassing different use cases and number of lines used for signaling. The radio acting as a slave is able to request access to the 2.4-GHz ISM band, and the master to grant it. Information about the request priority and TX or RX operation can also be conveyed. The various physical layer radio formats are partly built as a software defined radio where the radio behavior is either defined by radio ROM contents or by non-ROM radio formats delivered in form of firmware patches with the SimpleLink SDKs. This allows the radio platform to be updated for support of future versions of standards even with over-the-air (OTA) updates while still using the same silicon. 9.3.1 Bluetooth 5.2 Low Energy The RF Core offers full support for Bluetooth 5.2 Low Energy, including the high-sped 2-Mbps physical layer and the 500-kbps and 125-kbps long range PHYs (Coded PHY) through the TI provided Bluetooth 5.2 stack or through a high-level Bluetooth API. The Bluetooth 5.2 PHY and part of the controller are in radio and system ROM, providing significant savings in memory usage and more space available for applications. The new high-speed mode allows data transfers up to 2 Mbps, twice the speed of Bluetooth 4.2 and five times the speed of Bluetooth 4.0, without increasing power consumption. In addition to faster speeds, this mode offers significant improvements for energy efficiency and wireless coexistence with reduced radio communication time. Bluetooth 5.2 also enables unparalleled flexibility for adjustment of speed and range based on application needs, which capitalizes on the high-speed or long-range modes respectively. Data transfers are now possible at 2 Mbps, enabling development of applications using voice, audio, imaging, and data logging that were not previously an option using Bluetooth low energy. With high-speed mode, existing applications deliver faster responses, richer engagement, and longer battery life. Bluetooth 5.2 enables fast, reliable firmware updates. 9.3.2 802.15.4 (Thread, Zigbee, 6LoWPAN) Through a dedicated IEEE radio API, the RF Core supports the 2.4-GHz IEEE 802.15.4-2011 physical layer (2 Mchips per second Offset-QPSK with DSSS 1:8), used in Thread, Zigbee, and 6LoWPAN protocols. The 802.15.4 PHY and MAC are in radio and system ROM. TI also provides royalty-free protocol stacks for Thread and Zigbee as part of the SimpleLink SDK, enabling a robust end-to-end solution. 9.4 Memory The up to 352-KB nonvolatile (Flash) memory provides storage for code and data. The flash memory is in-

system programmable and erasable. The last flash memory sector must contain a Customer Configuration section (CCFG) that is used by boot ROM and TI provided drivers to configure the device. This configuration is done through the ccfg.c source file that is included in all TI provided examples. The ultra-low leakage system static RAM (SRAM) is split into up to five 16-KB blocks and can be used for both storage of data and execution of code. Retention of SRAM contents in Standby power mode is enabled by default and included in Standby mode power consumption numbers. Parity checking for detection of bit errors in memory is built-in, which reduces chip-level soft errors and thereby increases reliability. System SRAM is always initialized to zeroes upon code execution from boot. 50 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 To improve code execution speed and lower power when executing code from nonvolatile memory, a 4-way nonassociative 8-KB cache is enabled by default to cache and prefetch instructions read by the system CPU. The cache can be used as a general-purpose RAM by enabling this feature in the Customer Configuration Area

(CCFG). There is a 4-KB ultra-low leakage SRAM available for use with the Sensor Controller Engine which is typically used for storing Sensor Controller programs, data and configuration parameters. This RAM is also accessible by the system CPU. The Sensor Controller RAM is not cleared to zeroes between system resets. The ROM includes a TI-RTOS kernel and low-level drivers, as well as significant parts of selected radio stacks, which frees up flash memory for the application. The ROM also contains a serial (SPI and UART) bootloader that can be used for initial programming of the device. 9.5 Sensor Controller The Sensor Controller contains circuitry that can be selectively enabled in both Standby and Active power modes. The peripherals in this domain can be controlled by the Sensor Controller Engine, which is a proprietary power-optimized CPU. This CPU can read and monitor sensors or perform other tasks autonomously; thereby significantly reducing power consumption and offloading the system CPU. The Sensor Controller Engine is user programmable with a simple programming language that has syntax similar to C. This programmability allows for sensor polling and other tasks to be specified as sequential algorithms rather than static configuration of complex peripheral modules, timers, DMA, register programmable state machines, or event routing. The main advantages are:

Flexibility - data can be read and processed in unlimited manners while still ensuring ultra-low power 2 MHz low-power mode enables lowest possible handling of digital sensors Dynamic reuse of hardware resources 40-bit accumulator supporting multiplication, addition and shift Observability and debugging options Sensor Controller Studio is used to write, test, and debug code for the Sensor Controller. The tool produces C driver source code, which the System CPU application uses to control and exchange data with the Sensor Controller. Typical use cases may be (but are not limited to) the following:

Read analog sensors using integrated ADC or comparators Capacitive sensing Waveform generation Very low-power pulse counting (flow metering) Key scan Interface digital sensors using GPIOs, SPI, UART, or I2C (UART and I2C are bit-banged) The peripherals in the Sensor Controller include the following:

The low-power clocked comparator can be used to wake the system CPU from any state in which the comparator is active. A configurable internal reference DAC can be used in conjunction with the comparator. The output of the comparator can also be used to trigger an interrupt or the ADC. Capacitive sensing functionality is implemented through the use of a constant current source, a time-to-digital converter, and a comparator. The continuous time comparator in this block can also be used as a higher-

accuracy alternative to the low-power clocked comparator. The Sensor Controller takes care of baseline tracking, hysteresis, filtering, and other related functions when these modules are used for capacitive sensing. The ADC is a 12-bit, 200-ksamples/s ADC with eight inputs and a built-in voltage reference. The ADC can be triggered by many different sources including timers, I/O pins, software, and comparators. The analog modules can connect to up to eight different GPIOs Dedicated SPI master with up to 6 MHz clock speed The peripherals in the Sensor Controller can also be controlled from the main application processor. Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 51 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 9.6 Cryptography www.ti.com The CC2652RB device comes with a wide set of modern cryptography-related hardware accelerators, drastically reducing code footprint and execution time for cryptographic operations. It also has the benefit of being lower power and improves availability and responsiveness of the system because the cryptography operations runs in a background hardware thread. Together with a large selection of open-source cryptography libraries provided with the Software Development Kit (SDK), this allows for secure and future proof IoT applications to be easily built on top of the platform. The hardware accelerator modules are:

True Random Number Generator (TRNG) module provides a true, nondeterministic noise source for the purpose of generating keys, initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring oscillators that create unpredictable output to feed a complex nonlinear-combinatorial circuit. Secure Hash Algorithm 2 (SHA-2) with support for SHA224, SHA256, SHA384, and SHA512 Advanced Encryption Standard (AES) with 128 and 256 bit key lengths Public Key Accelerator - Hardware accelerator supporting mathematical operations needed for elliptic curves up to 512 bits and RSA key pair generation up to 1024 bits. Through use of these modules and the TI provided cryptography drivers, the following capabilities are available for an application or stack:

Key Agreement Schemes Elliptic curve DiffieHellman with static or ephemeral keys (ECDH and ECDHE) Elliptic curve Password Authenticated Key Exchange by Juggling (ECJ-PAKE) Signature Generation Curve Support Elliptic curve Diffie-Hellman Digital Signature Algorithm (ECDSA) Short Weierstrass form (full hardware support), such as:

NIST-P224, NIST-P256, NIST-P384, NIST-P521 Brainpool-256R1, Brainpool-384R1, Brainpool-512R1 secp256r1 Montgomery form (hardware support for multiplication), such as:

Curve25519 SHA2 based MACs HMAC with SHA224, SHA256, SHA384, or SHA512 Block cipher mode of operation AESCCM AESGCM AESECB AESCBC AESCBC-MAC True random number generation Other capabilities, such as RSA encryption and signatures as well as Edwards type of elliptic curves such as Curve1174 or Ed25519, can also be implemented using the provided hardware accelerators but are not part of the TI SimpleLink SDK for the CC2652RB device. 52 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 9.7 Timers CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 A large selection of timers are available as part of the CC2652RB device. These timers are:

Real-Time Clock (RTC) A 70-bit 3-channel timer running on the 32 kHz low frequency system clock (SCLK_LF) This timer is available in all power modes except Shutdown. The timer can be calibrated to compensate for frequency drift when using the LF RCOSC as the low frequency system clock. If an external LF clock with frequency different from 32.768 kHz is used, the RTC tick speed can be adjusted to compensate for this. When using TI-RTOS, the RTC is used as the base timer in the operating system and should thus only be accessed through the kernel APIs such as the Clock module. The real time clock can also be read by the Sensor Controller Engine to timestamp sensor data and also has dedicated capture channels. By default, the RTC halts when a debugger halts the device. General Purpose Timers (GPTIMER) The four flexible GPTIMERs can be used as either 4 32 bit timers or 8 16 bit timers, all running on up to 48 MHz. Each of the 16- or 32-bit timers support a wide range of features such as one-shot or periodic counting, pulse width modulation (PWM), time counting between edges and edge counting. The inputs and outputs of the timer are connected to the device event fabric, which allows the timers to interact with signals such as GPIO inputs, other timers, DMA and ADC. The GPTIMERs are available in Active and Idle power modes. Sensor Controller Timers The Sensor Controller contains 3 timers:

AUX Timer 0 and 1 are 16-bit timers with a 2N prescaler. Timers can either increment on a clock or on each edge of a selected tick source. Both one-shot and periodical timer modes are available. AUX Timer 2 is a 16-bit timer that can operate at 24 MHz, 2 MHz or 32 kHz independent of the Sensor Controller functionality. There are 4 capture or compare channels, which can be operated in one-shot or periodical modes. The timer can be used to generate events for the Sensor Controller Engine or the ADC, as well as for PWM output or waveform generation. Radio Timer A multichannel 32-bit timer running at 4 MHz is available as part of the device radio. The radio timer is typically used as the timing base in wireless network communication using the 32-bit timing word as the network time. The radio timer is synchronized with the RTC by using a dedicated radio API when the device radio is turned on or off. This ensures that for a network stack, the radio timer seems to always be running when the radio is enabled. The radio timer is in most cases used indirectly through the trigger time fields in the radio APIs and should only be used when running the accurate 48 MHz high frequency crystal is the source of SCLK_HF. Watchdog timer The watchdog timer is used to regain control if the system operates incorrectly due to software errors. It is typically used to generate an interrupt to and reset of the device for the case where periodic monitoring of the system components and tasks fails to verify proper functionality. The watchdog timer runs on a 1.5 MHz clock rate and cannot be stopped once enabled. The watchdog timer pauses to run in Standby power mode and when a debugger halts the device. Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 53 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 9.8 Serial Peripherals and I/O www.ti.com The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and TI's synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz. The SSI modules support configurable phase and polarity. The UARTs implement universal asynchronous receiver and transmitter functions. They support flexible baud-

rate generation up to a maximum of 3 Mbps. The I2S interface is used to handle digital audio and can also be used to interface pulse-density modulation microphones (PDM). The I2C interface is also used to communicate with devices compatible with the I2C standard. The I2C interface can handle 100 kHz and 400 kHz operation, and can serve as both master and slave. The I/O controller (IOC) controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a programmable pullup and pulldown function, and can generate an interrupt on a negative or positive edge

(configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs have high-drive capabilities, which are marked in bold in Section 7. All digital peripherals can be connected to any digital pin on the device. For more information, see the CC13x2, CC26x2 SimpleLink Wireless MCU Technical Reference Manual. 9.9 Battery and Temperature Monitor A combined temperature and battery voltage monitor is available in the CC2652RB device. The battery and temperature monitor allows an application to continuously monitor on-chip temperature and supply voltage and respond to changes in environmental conditions as needed. The module contains window comparators to interrupt the system CPU when temperature or supply voltage go outside defined windows. These events can also be used to wake up the device from Standby mode through the Always-On (AON) event fabric. 9.10 DMA The device includes a direct memory access (DMA) controller. The DMA controller provides a way to offload data-transfer tasks from the system CPU, thus allowing for more efficient use of the processor and the available bus bandwidth. The DMA controller can perform a transfer between memory and peripherals. The DMA controller has dedicated channels for each supported on-chip module and can be programmed to automatically perform transfers between peripherals and memory when the peripheral is ready to transfer more data. Some features of the DMA controller include the following (this is not an exhaustive list):

Highly flexible and configurable channel operation of up to 32 channels Transfer modes: memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-peripheral Data sizes of 8, 16, and 32 bits Ping-pong mode for continuous streaming of data 9.11 Debug The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface. The device boots by default into cJTAG mode and must be reconfigured to use 4-pin JTAG. 54 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 9.12 Power Management CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 To minimize power consumption, the CC2652RB supports a number of power modes and power management features (see Table 9-1). Table 9-1. Power Modes SOFTWARE CONFIGURABLE POWER MODES STANDBY SHUTDOWN RESET PIN HELD MODE CPU Flash SRAM Supply System Register and CPU retention SRAM retention 48 MHz high-speed clock

(SCLK_HF) 2 MHz medium-speed clock

(SCLK_MF) 32 kHz low-speed clock

(SCLK_LF) Peripherals Sensor Controller Wake-up on RTC Wake-up on pin edge Wake-up on reset pin Brownout detector (BOD) Power-on reset (POR) Watchdog timer (WDT) ACTIVE Active On On On Full Full Available Available Available Available On On On BAW or RCOSC_HF BAW or RCOSC_HF RCOSC_MF RCOSC_MF Available XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF IDLE Off Available On On Full Full Available Available Available Available On On On Off Off Retention Duty Cycled Partial Full Off Off Available Available Available Duty Cycled On On Off Off Off Off No No Off Off Off Off Off Off On Off Off Off Available Off Off Off Off No No Off Off Off Off Off Off Off On Off Off Off Available Available Paused In Active mode, the application system CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 9-1). In Idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event brings the processor back into active mode. In Standby mode, only the always-on (AON) domain is active. An external wake-up event, RTC event, or Sensor Controller event is required to bring the device back to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode. In Shutdown mode, the device is entirely turned off (including the AON domain and Sensor Controller), and the I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger. The CPU can differentiate between reset in this way and reset-by-reset pin or power-on reset by reading the reset status register. The only state retained in this mode is the latched I/O state and the flash memory contents. Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 55 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller independently of the system CPU. This means that the system CPU does not have to wake up, for example to perform an ADC sampling or poll a digital sensor over SPI, thus saving both current and wake-up time that would otherwise be wasted. The Sensor Controller Studio tool enables the user to program the Sensor Controller, control its peripherals, and wake up the system CPU as needed. All Sensor Controller peripherals can also be controlled by the system CPU. Note The power, RF and clock management for the CC2652RB device require specific configuration and handling by software for optimized performance. This configuration and handling is implemented in the TI-provided drivers that are part of the CC2652RB software development kit (SDK). Therefore, TI highly recommends using this software framework for all application development on the device. The complete SDK with TI-RTOS (optional), device drivers, and examples are offered free of charge in source code. 9.13 Clock Systems The CC2652RB device has several internal system clocks. The 48 MHz SCLK_HF is used as the main system (MCU and peripherals) clock. This can be driven by the internal 48 MHz RC Oscillator (RCOSC_HF), the internal BAW resonator, or an external 48 MHz crystal

(XOSC_HF). Radio operation requires either the internal BAW resonator or an external 48 MHz crystal. SCLK_MF is an internal 2 MHz clock that is used by the Sensor Controller in low-power mode and also for internal power management circuitry. The SCLK_MF clock is always driven by the internal 2 MHz RC Oscillator

(RCOSC_MF). The BAW oscillator clock frequency is actively compensated by the modem internal firmware to ensure frequency stability over temperature, voltage and device lifetime. Every time the PLL is tuned (wakeup of radio from idle/standby or tuned to a difference frequency) the modem firmware considers the BAW device characteristics stored on the device along with current temperature and voltage conditions and configures the PLL to compensate accordingly. The RF frequency accuracy around the desired center frequency is +/-40ppm across temperature. SCLK_LF is the 32.768 kHz internal low-frequency system clock. It can be used by the Sensor Controller for ultra-low-power operation and is also used for the RTC and to synchronize the radio timer before or after Standby power mode. SCLK_LF can be driven by the internal 32.8 kHz RC Oscillator (RCOSC_LF), a 32.768 kHz watch-type crystal, the internal BAW resonator, an external 48 MHz crystal, or a clock input on any digital IO. When using a crystal or the internal RC oscillator, the device can output the 32 kHz SCLK_LF signal to other devices, thereby reducing the overall system cost. 9.14 Network Processor Depending on the product configuration, the CC2652RB device can function as a wireless network processor

(WNP - a device running the wireless protocol stack with the application running on a separate host MCU), or as a system-on-chip (SoC) with the application and protocol stack running on the system CPU inside the device. In the first case, the external host MCU communicates with the device using SPI or UART. In the second case, the application must be written according to the application framework supplied with the wireless protocol stack. 56 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 10 Application, Implementation, and Layout Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TIs customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. For general design guidelines and hardware configuration guidelines, refer to the CC13xx/CC26xx Hardware Configuration and PCB Design Considerations Application Report. 10.1 Reference Designs The following reference designs should be followed closely when implementing designs using the CC2652RB device. Special attention must be paid to RF component placement, decoupling capacitors and DCDC regulator components, as well as ground connections for all of these. Integrated matched filter-balun devices can be used both at sub-1 GHz frequencies and at 2.4 GHz for the low-

power RF outputs. Refer to the "Integrated Passive Component" section in CC13xx/CC26xx Hardware Configuration and PCB Design Considerations for further information. CC26x2RBEM-7ID Design Files The CC26x2RBEM-7ID reference design provides schematic, layout and production files for the characterization board used for deriving the performance number found in this document. CC2652RB LaunchPad Development Kit Design Files The CC2652RB LaunchPad Design Files contain detailed schematics and layouts to build application specific boards using the CC2652RB device. Sub-1 GHz and 2.4 GHz Antenna Kit for LaunchPad Development Kit and SensorTag The antenna kit allows real-life testing to identify the optimal antenna for your application. The antenna kit includes 16 antennas for frequencies from 169 MHz to 2.4 GHz, including:

PCB antennas Helical antennas Chip antennas Dual-band antennas for 868 MHz and 915 MHz combined with 2.4 GHz The antenna kit includes a JSC cable to connect to the Wireless MCU LaunchPad development kits and SensorTags. Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 57 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 11 Device and Documentation Support www.ti.com TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed as follows. The CC2652RB device is supported by a variety of software and hardware development tools. 11.1 Tools and Software Development Kit CC2652RB LaunchPad Development Kit Software SimpleLink CC13x2 and CC26x2 Software Development Kit The CC2652RB LaunchPad Development Kit enables development of high-performance wireless applications that benefit from low-power operation. The kit features the CC2652RB SimpleLink Wireless MCU, which allows you to quickly evaluate and prototype 2.4-GHz wireless Bluetooth 5 Low Energy, Zigbee and Thread, plus combinations of these. The kit works with the LaunchPad ecosystem, easily enabling additional functionality like sensors, display and more. The built-in EnergyTrace software is an energy-based code analysis tool that measures and displays the applications energy profile and helps to optimize it for ultra-low-power consumption. See Table 6-1 for guidance in selecting the correct device for single-protocol products. The SimpleLink CC13x2 and CC26x2 Software Development Kit (SDK) provides a complete package for the development of Bluetooth-based applications for the CC2652RB wireless MCU. The SimpleLink CC13x2 and CC26x2 SDK is part of TIs SimpleLink MCU platform, offering a single development environment that delivers flexible hardware, software and tool options for customers developing wired and wireless applications. For more information about the SimpleLink MCU Platform, visit https://www.ti.com/simplelink. 58 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com Development Tools Code Composer Studio Integrated Development Environment

(IDE) Code Composer Studio Cloud IDE IAR Embedded Workbench for Arm SmartRF Studio CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor, project build environment, debugger, profiler, and many other features. The intuitive IDE provides a single user interface taking you through each step of the application development flow. Familiar tools and interfaces allow users to get started faster than ever before. Code Composer Studio combines the advantages of the Eclipse software framework with advanced embedded debug capabilities from TI resulting in a compelling feature-rich development environment for embedded developers. CCS has support for all SimpleLink Wireless MCUs and includes support for EnergyTrace software (application energy usage profiling). A real-time object viewer plugin is available for TI-RTOS, part of the SimpleLink SDK. Code Composer Studio is provided free of charge when used in conjunction with the XDS debuggers included on a LaunchPad Development Kit. Code Composer Studio (CCS) Cloud is a web-based IDE that allows you to create, edit and build CCS and Energia projects. After you have successfully built your project, you can download and run on your connected LaunchPad. Basic debugging, including features like setting breakpoints and viewing variable values is now supported with CCS Cloud. IAR Embedded Workbench is a set of development tools for building and debugging embedded system applications using assembler, C and C++. It provides a completely integrated development environment that includes a project manager, editor, and build tools. IAR has support for all SimpleLink Wireless MCUs. It offers broad debugger support, including XDS110, IAR I-jet and Segger J-Link. A real-time object viewer plugin is available for TI-RTOS, part of the SimpleLink SDK. IAR is also supported out-of-the-box on most software examples provided as part of the SimpleLink SDK. A 30-day evaluation or a 32 KB size-limited version is available through iar.com. SmartRF Studio is a Windows application that can be used to evaluate and configure SimpleLink Wireless MCUs from Texas Instruments. The application will help designers of RF systems to easily evaluate the radio at an early stage in the design process. It is especially useful for generation of configuration register values and for practical testing and debugging of the RF system. SmartRF Studio can be used either as a standalone application or together with applicable evaluation boards or debug probes for the RF device. Features of the SmartRF Studio include:

Link tests - send and receive packets between nodes Antenna and radiation tests - set the radio in continuous wave TX and RX states Export radio configuration code for use with the TI SimpleLink SDK RF driver Custom GPIO configuration for signaling and control of external switches Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 59 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 Sensor Controller Studio www.ti.com Sensor Controller Studio is used to write, test and debug code for the Sensor Controller peripheral. The tool generates a Sensor Controller Interface driver, which is a set of C source files that are compiled into the System CPU application. These source files also contain the Sensor Controller binary image and allow the System CPU application to control and exchange data with the Sensor Controller. Features of the Sensor Controller Studio include:

Ready-to-use examples for several common use cases Full toolchain with built-in compiler and assembler for programming in a C-like programming language Provides rapid development by using the integrated sensor controller task testing and debugging functionality, including visualization of sensor data and verification of algorithms CCS UniFlash CCS UniFlash is a standalone tool used to program on-chip flash memory on TI MCUs. UniFlash has a GUI, command line, and scripting interface. CCS UniFlash is available free of charge. 11.1.1 SimpleLink Microcontroller Platform The SimpleLink microcontroller platform sets a new standard for developers with the broadest portfolio of wired and wireless Arm MCUs (System-on-Chip) in a single software development environment. Delivering flexible hardware, software and tool options for your IoT applications. Invest once in the SimpleLink software development kit and use throughout your entire portfolio. Learn more on ti.com/simplelink. 11.2 Documentation Support To receive notification of documentation updates on data sheets, errata, application notes and similar, navigate to the device product folder on ti.com/product/CC2652RB . In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. The current documentation that describes the MCU, related peripherals, and other technical collateral is listed as follows. TI Resource Explorer Software examples, libraries, executables, and documentation are available for your device and development board. The silicon errata describes the known exceptions to the functional specifications for each silicon revision of the device and description on how to recognize a device revision. All application reports for the CC2652RB device are found on the device product folder at: ti.com/product/

CC2652RB/technicaldocuments . Technical Reference Manual (TRM) CC13x2, CC26x2 SimpleLink Wireless MCU TRM The TRM provides a detailed description of all modules and peripherals available in the device family. TI Resource Explorer Errata CC2652RB Silicon Errata Application Reports 60 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com 11.3 Support Resources CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 TI E2E support forums are an engineer's go-to source for fast, verified answers and design help straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 11.4 Trademarks SimpleLink, SmartRF, LaunchPad, EnergyTrace, Code Composer Studio, TI E2E are trademarks of Texas Instruments. I-jet is a trademark of IAR Systems AB. J-Link is a trademark of SEGGER Microcontroller Systeme GmbH. Arm, Cortex, and Arm Thumb are registered trademarks of Arm Limited (or its subsidiaries). CoreMark is a registered trademark of Embedded Microprocessor Benchmark Consortium. Bluetooth are registered trademarks of Bluetooth SIG Inc. Zigbee are registered trademarks of Zigbee Alliance Inc. Wi-Fi is a registered trademark of Wi-Fi Alliance. Eclipse is a registered trademark of Eclipse Foundation. IAR Embedded Workbench is a registered trademark of IAR Systems AB. Windows is a registered trademark of Microsoft Corporation. All trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 61 Product Folder Links: CC2652RB CC2652RB SWRS232D FEBRUARY 2019 REVISED FEBRUARY 2021 www.ti.com 12 Mechanical, Packaging, and Orderable Information 12.1 Packaging Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 62 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links: CC2652RB www.ti.com PACKAGING INFORMATION Orderable Device Status

(1) Package Type Package Drawing Pins Package Eco Plan Qty

(2) MSL Peak Temp Op Temp (C) Device Marking Samples

(3)

(4/5) Lead finish/

Ball material

(6) CC2652RB1FRGZR ACTIVE VQFN RGZ 48 2500 RoHS & Green NIPDAU Level-3-260C-168 HR

-40 to 85 CC2652 RB1F PACKAGE OPTION ADDENDUM 10-Dec-2020

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 www.ti.com 3-Sep-2020 PACKAGE MATERIALS INFORMATION TAPE AND REEL INFORMATION

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ A0

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1 Quadrant Reel Diameter

(mm) Reel Width W1 (mm) CC2652RB1FRGZR VQFN RGZ 48 2500 330.0 16.4 7.3 7.3 1.1 12.0 16.0 Q2 Pack Materials-Page 1 www.ti.com 3-Sep-2020 PACKAGE MATERIALS INFORMATION

*All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) CC2652RB1FRGZR VQFN RGZ 48 336.6 336.6 31.8 SPQ 2500 Pack Materials-Page 2 RGZ 48 7 x 7, 0.5 mm pitch GENERIC PACKAGE VIEW VQFN - 1 mm max height PLASTIC QUADFLAT PACK- NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224671/A www.ti.com RGZ0048A PACKAGE OUTLINE VQFN - 1 mm max height PLASTIC QUADFLAT PACK- NO LEAD B 7.1 6.9 A PIN 1 INDEX AREA

(0.1) TYP 7.1 6.9 SIDE WALL DETAIL OPTIONAL METAL THICKNESS

(0.45) TYP CHAMFERED LEAD CORNER LEAD OPTION 1 MAX 0.05 0.00 2X 5.5 44X 0.5 13 12 2X 5.5 5.150.1

(0.2) TYP C SEATING PLANE 0.08 C 24 25 SEE SIDE WALL DETAIL SYMM PIN1 ID

(OPTIONAL) 1 48 SEE LEAD OPTION SYMM 48X 0.5 0.3 36 37 48X 0.30 0.18 0.1 0.05 C A B C NOTES:

1. 2. 3. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. This drawing is subject to change without notice. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. 4219044/C 09/2020 www.ti.com EXAMPLE BOARD LAYOUT VQFN - 1 mm max height PLASTIC QUADFLAT PACK- NO LEAD 48X (0.6) 48 35 2X (6.8)

( 5.15) SYMM RGZ0048A 48X (0.24) 44X (0.5) 1 SYMM 2X

(5.5) 34 2X

(6.8) 2X

(1.26) 2X

(1.065) 23

(R0.05) TYP 12 21X (0.2) VIA TYP 13 2X (1.26) 2X (5.5) LAND PATTERN EXAMPLE SCALE: 15X 0.07 MIN ALL AROUND METAL 22 2X (1.065) SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK 0.07 MAX ALL AROUND EXPOSED METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED

(PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4219044/C 09/2020 NOTES: (continued) 4. 5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) . Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com RGZ0048A 48X (0.6) 48X (0.24) 44X (0.5) SYMM 2X

(5.5)

(R0.05) TYP EXAMPLE STENCIL DESIGN VQFN - 1 mm max height PLASTIC QUADFLAT PACK- NO LEAD 2X (6.8) SYMM

( 1.06) 2X

(6.8) 2X

(0.63) 2X

(1.26) NOTES: (continued) design recommendations. 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate 4219044/C 09/2020 2X (0.63) 2X (5.5) 2X

(1.26) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 67% PRINTED COVERAGE BY AREA SCALE: 15X www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES AS IS AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TIs products are provided subject to TIs Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TIs provision of these resources does not expand or otherwise alter TIs applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright 2021, Texas Instruments Incorporated

FIRMENSSITZ Tersteegenstr. 15 D 46045 Oberhausen GESCHFTSSITZ Am Wiesenbusch 1 D 45966 Gladbeck GESCHFTSFHRER Dipl.-Ing. Andreas Hilburg Dipl.-Ing. Matthias Krzizan Fon: 02043 945 137 Fax: 02043 945 100 info@biobedded.de www.biobedded.de Label ProSmap Module BLE0001 (-A / -B) version: V1.0 date: 12.01.2022 manufacturer: Biobedded Systems GmbH Label 12.01.2022 page 1 Label ProSmap Module BLE0001-A Scale 1:1 BLE0001-A

(a) IC: 28044-BLE0001 Scale 10:1 Outline Dimension: 12,7x11mm LASER PRINTABLE HIGH TEMPERATURE POLYIMIDE LABEL BLE0001-A

(a) IC: 28044-BLE0001 Fond-Size: 3,5pt BOLT Label 12.01.2022 page 2 Label ProSmap Module BLE0001-B Scale 1:1 Outline Dimension: 12mmx12mm LASER PRINTABLE HIGH TEMPERATURE POLYIMIDE LABEL BLE0001-B

(a) IC: 28044-BLE0001 Scale 10:1 BLE0001-B

(a) IC: 28044-BLE0001 Fond-Size: 3,5pt BOLT Label 12.01.2022 page 3 Label for outer packaging Outline Dimension: 80mmx80mm BLE0001-A

(a) FCC ID: 2A3TP-BLE0001 IC: 28044-BLE0001 biobedded systems GmbH Am Wiesenbusch 1 D-45966 Gladbeck Label 12.01.2022 page 4

biobedded systems GmbH Jan/12/2022 Telecommunication Certification Body UL International (UK) Ltd. Units 1-3, Horizon Wade Road Kingsland Business Park Basingstoke Hampshire RG24 8AH United Kingdom Subject: Authorisation Letter To whom it may concern Yours faithfully, Matthias Krzizan Managing Director This is to certify that biobedded systems GmbH hereby authorises UL International (UK) Ltd. to act as the TCB for the application of the ProSmap Module BLE0001, FCC ID: 2A3TP-BLE0001 to the FCC. We certify that we are not subject to a denial of Federal benefits, that include FCC benefits, pursuant to Section 5301 of the Anti-Drug Abuse Act of 1988, 21 U.S.C. 862 because of a conviction for possession or distribution of a controlled substance. See 47 CFR 1.2002(b) for the definition of a "party" for these purposes. biobedded systems GmbH Tersteegenstrae 15 46045 Oberhausen Amtsgericht Duisburg HRB 13365 St.-Nr. 124/5702/0868 Geschftsfhrung:

Dipl.-Ing. A. Hilburg Dipl.-Ing. M. Krzizan E-Mail: info@biobedded.de Internet: www.biobedded.de Seite 1 von 1 National Bank AG Essen IBAN: DE11 3602 0030 0008 8095 77 BIC: NBAG DE 3 E Ust-ID: DE 209026417

biobedded systems GmbH Jan/12/2022 Telecommunication Certification Body UL International (UK) Ltd. Units 1-3, Horizon Wade Road Kingsland Business Park Basingstoke Hampshire RG24 8AH United Kingdom Subject: FCC Single-Modular Approval Letter FCC ID: 2A3TP-BLE0001 To whom it may concern We, biobedded systems GmbH, hereby declare that the product, FCC ID: 2A3TP-BLE0001, has met the single-modular approval requirements of FCC rule part 15.212(a)(1) and this is shown in the table below. Requirement Compliance:

Yes or No along with a justification The radio elements must have the radio frequency circuitry shielded. Physical components and tuning capacitor(s) may be located external to the shield, but must be on the module assembly The module must have buffered modulation/data inputs to ensure that the device will comply with Part 15 requirements with any type of input signal Yes, see operational description. Yes, all GPIO-Pins are buffered from Main-

CPU to the RadioChip. (Main CPU and Radiochip are in the same Silicon) The module must contain power supply regulation on the module Yes, the module has a power supply on Chip. (1,8V-3,8V) The module must contain a permanently attached antenna, or contain a unique antenna connector, and be marketed and operated only with specific antenna(s), per Sections 15.203, 15.204(b), 15.204(c), 15.212(a), 2.929(b) Yes, the module works with permanently attached antennas. An integral Chip antenna or external antenna connected via a U.FL connector. The module must demonstrate compliance in a stand-alone configuration Yes, see test report Seite 1 von 2 biobedded systems GmbH Tersteegenstrae 15 46045 Oberhausen Amtsgericht Duisburg HRB 13365 St.-Nr. 124/5702/0868 Geschftsfhrung:

Dipl.-Ing. A. Hilburg Dipl.-Ing. M. Krzizan E-Mail: info@biobedded.de Internet: www.biobedded.de National Bank AG Essen IBAN: DE11 3602 0030 0008 8095 77 BIC: NBAG DE 3 E Ust-ID: DE 209026417 biobedded systems GmbH The module must be labelled with its permanently affixed FCC ID label, or use an electronic display (See KDB Publication 784748 about labelling requirements) Yes, due to the fact that there is not sufficient space for printing the FCC ID on the modules EMV-shield, only the FCC-

logo is stated on the EMV-shield. See photo documentation. On the modules packaging the FCC ID is printed. The module must comply with all specific rules applicable to the transmitter including all the conditions provided in the integration instructions by the grantee Yes, see test report, Integration Guide and Operational Description The module must comply with RF exposure requirements Yes, see RF exposure exhibit Yours faithfully, Matthias Krzizan Managing Director biobedded systems GmbH Tersteegenstrae 15 46045 Oberhausen Amtsgericht Duisburg HRB 13365 St.-Nr. 124/5702/0868 Geschftsfhrung:

Dipl.-Ing. A. Hilburg Dipl.-Ing. M. Krzizan E-Mail: info@biobedded.de Internet: www.biobedded.de Seite 2 von 2 National Bank AG Essen IBAN: DE11 3602 0030 0008 8095 77 BIC: NBAG DE 3 E Ust-ID: DE 209026417

Jan/12/2022 biobedded systems GmbH Telecommunication Certification Body UL International (UK) Ltd. Units 1-3, Horizon Wade Road Kingsland Business Park Basingstoke Hampshire RG24 8AH United Kingdom Subject: Permanent Confidentiality Request Certification Application FCC ID: 2A3TP-BLE0001 To whom it may concern Pursuant to Sections 0.457(d) and 0.459 of CFR 47 , biobedded systems GmbH request that the following information, provided to support the FCC application for the ProSmap Module BLE0001, FCC ID: 2A3TP-BLE0001 be held permanently confidential:

The above material contains trade secrets not customarily released to public that are judged to have the potential to cause detriment to the applicant and provide unjustified benefits to its competitors. This information should not be available for public disclosure for an indefinite period of time. Schematics Block Diagrams Parts List Operational Description Yours faithfully Matthias Krzizan Managing Director biobedded systems GmbH Tersteegenstrae 15 46045 Oberhausen Amtsgericht Duisburg HRB 13365 St.-Nr. 124/5702/0868 Geschftsfhrung:

Dipl.-Ing. A. Hilburg Dipl.-Ing. M. Krzizan E-Mail: info@biobedded.de Internet: www.biobedded.de Seite 1 von 1 National Bank AG Essen IBAN: DE11 3602 0030 0008 8095 77 BIC: NBAG DE 3 E Ust-ID: DE 209026417

Jan/12/2022 biobedded systems GmbH Telecommunication Certification Body UL International (UK) Ltd. Units 1-3, Horizon Wade Road Kingsland Business Park Basingstoke Hampshire RG24 8AH United Kingdom Subject: Short Term Confidentiality Request FCC ID: 2A3TP-BLE0001 To whom it may concern In accordance with 0.457 and 0.459 of CFR 47, biobedded systems GmbH requests the short term confidentiality of the items listed below until Jul/15/2022 for our device, FCC ID: 2A3TP-

BLE0001 External Photos Internal Photos Test Set Up Photos User Manual / Installation Guide These items contain proprietary information related to the design of the product which has not yet been released to the market. The public disclosure of this information prior to public launch may be harmful to biobedded systems GmbH and provide unjust benefits to its competitors. A period up to Jul/15/2022 is requested to protect this information before formal market launch. If the launch date is re-scheduled to be earlier than Jul/15/2022, biobedded systems GmbH will inform again to cancel this restriction. Please contact the undersigned if there are any further questions or additional information needed in this matter. Yours faithfully, Matthias Krzizan Managing Director biobedded systems GmbH Tersteegenstrae 15 46045 Oberhausen Amtsgericht Duisburg HRB 13365 St.-Nr. 124/5702/0868 Geschftsfhrung:

Dipl.-Ing. A. Hilburg Dipl.-Ing. M. Krzizan E-Mail: info@biobedded.de Internet: www.biobedded.de Seite 1 von 1 National Bank AG Essen IBAN: DE11 3602 0030 0008 8095 77 BIC: NBAG DE 3 E Ust-ID: DE 209026417