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BTS-16 81x63x102mm Axe Wireless Shower Speaker Lithium-ion battery (rechargeable) Capacity: 300mAh Input 5V 1A This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and
(2) this device must accept any interference received, including interference that may cause undesired operation. Brand Addition Ltd., M17 1DD, UK SO No. 2951048 Made in China 04/19 FCC ID: 2ALSKBTS-06B Model number: BTS-06B 22mm 79mm 22mm 22mm 61mm 22mm
1 | User Manual | Users Manual | 1.50 MiB |
50mm 70mm 70mm AXE wireless speaker, manual, English, USA author date version scale key colours nishes fonts fonts notes Harman Gill 26.04.2019 1 1:1 trim line bleed line safe line fold line none none none none by
1 | External Photos | External Photos | 390.55 KiB |
INTERTEK TESTING SERVICE Report No.: HK19030496 Equipment Photographs
(External) INTERTEK TESTING SERVICE Report No.: HK19030496 Equipment Photographs
(External)
1 | Internal Photos | Internal Photos | 1.28 MiB |
INTERTEK TESTING SERVICE Report No.: HK19030496 Equipment Photographs
(Internal) INTERTEK TESTING SERVICE Report No.: HK19030496 Equipment Photographs
(Internal) INTERTEK TESTING SERVICE Report No.: HK19030496 Equipment Photographs
(Internal) INTERTEK TESTING SERVICE Report No.: HK19030496 Equipment Photographs
(Internal)
1 | Technical Description | Operational Description | 1.11 MiB |
Technical Description The Equipment Under Test (EUT) is a Shower Speaker. The EUT operates at frequency range of 2402MHz to 2480MHz. There are total 79 channels with 1MHz channel spacing. The EUT can play wireless audio signal when paired with a Bluetooth device. The audio signal is then amplified and driving internal loudspeaker. The EUT is powered by a 3.7V internal rechargeable battery which can be charged via USB port. The applicant declared that Bluetooth 4.0 BLE is not used in the product. The USB port is for charging only. 2.4GHz Bluetooth Module:
Modulation Type: GFSK Antenna Type: Integral, Internal (PCB Trace) Frequency Range: 2402MHz - 2480MHz, 1MHz channel spacing, 79 channels EIRP range is -4dBm to 4dBm Antenna gain is 2dBi The main components are described below:
1. RDA5856E is the 2.4GHz Bluetooth RF radio core 2. X1 26MHz crystal is master clock for RDA5856E 3. 8002 is audio amplifier 4. TVS is Transient Voltage Suppressor for battery charger Channel Frequency Table of Bluetooth Module Bluetooth 3.0 Features Bluetooth v4.2 specification compliant, supports BR/EDR Bluetooth radio includes integrated balun Support A2DP 1.2, HFP 1.5 and AVRCP1.5 104MHz RISC MCU and 104MHz Voice Co-Processor(VoC) DSP core Internal MCU ROM and RAM, VoC memory and in-package serial flash memory. Various serial interfaces: USB OTG 2.0 HS, UART, I2C Master and SD Card Interface Support analog key Up to 4 PWM output One channel 16 bits voice ADC and 16 bits Independent powered Real-Time Clock stereo DAC Audio interfaces: analog stereo line in Support MP3/SBC/WMA/ACC decoder Support audio playback from SD/USB card Integrated broadcast FM tuner which can be tuned word-wide frequency band Debug host interface allowing non-intrusive in depth investigation GDB debugger Internal 32K OSC for standby, shutoff and sleep state Integrated LDO General Description RDA5856TE is a high performance, highly integrated multi-media system-on-chip solution with Bluetooth connectivity, which specialized in music and audio applications. Integrating all essential electronic components, including baseband, bluetooth transceiver, power management, FM receiver onto a single system on chip, RDA5856TE offers best in class bill of material, space requirement and cost/feature ratio for bluetooth music and audio application. RDA5856TE RDA5856TE High performance, highly integrated multi-media system-on-chip solution with bluetooth connectivity Applications Bluetooth speakers Bluetooth music box Bluetooth headset or headphone The 104MHz Voice Co-Processor supports various audio applications. The integrated audio codec supports two channels DAC and one channel ADC. Playback form SD card and USB card are also supported. Copyright@2016 RDA Microelectronics. CONFIDENTIAL 1 / 17 RDA5856TE Table of Contents Table of Contents ......................................................................................................................................... 2 Product Details ................................................................................................................................... 3 1. Package and Pinout ............................................................................................................................ 4 2. 2.1. Pin Assignment ........................................................................................................................... 4 2.2. Pin Description ............................................................................................................................ 4 2.3. Package Dimensions ................................................................................................................... 5 3. Function Block Diagram ..................................................................................................................... 6 4. Clock and reset ................................................................................................................................... 6 5. MCU .................................................................................................................................................... 6 USB ..................................................................................................................................................... 7 6. 7. VoC ..................................................................................................................................................... 7 Flash Controller .................................................................................................................................. 7 8. 9. DMA .................................................................................................................................................... 8 10. AIF ....................................................................................................................................................... 8 11. SDMMC Controller ............................................................................................................................. 8 12. Timer .................................................................................................................................................. 8 13. GPIO .................................................................................................................................................... 8 14. UART ................................................................................................................................................... 9 15. Debug Host ......................................................................................................................................... 9 16. I2C Master .......................................................................................................................................... 9 17. Calendar ........................................................................................................................................... 10 18. PWM ................................................................................................................................................. 10 19. Audio Codec ..................................................................................................................................... 10 20. Power Management ......................................................................................................................... 10 20.1. Power on/off control ............................................................................................................. 11 20.2. Power Mode .......................................................................................................................... 11 21. Bluetooth Transceiver ...................................................................................................................... 11 22. FM ..................................................................................................................................................... 12 Electrical Characteristics .................................................................................................................. 13 23. 23.1. BT RF Specifications ............................................................................................................... 13 23.2. FM RF Specifications ............................................................................................................. 15 23.3. Audio Characteristics............................................................................................................. 15 23.4. Recommended Operating Conditions ................................................................................... 15 24. Software ........................................................................................................................................... 16 25. Revision History ................................................................................................................................ 17 Copyright@2016 RDA Microelectronics. CONFIDENTIAL 2 / 17 RDA5856TE Fully compliant with Bluetooth radio Package Options Low power mode supported TSSOP24-EP 1. Product Details Bluetooth Radio specification 4.2 including basic rate and EDR. On-chip Balun which combines the balanced outputs of the PA on transmit and produces the balanced input signals for the LNA. Microcontrollers RDA in house developed 16/32 bit processor Reduced Instruction Set Architecture Efficient 6-stage instruction pipeline Voice Co-Processor RDA Internal designed Voice DSP core Two 16x16 -> 32 Multipliers Bi-MAC (two accumulations on the same register per cycle) Eight 16 bit general purpose registers and four 32 bit general purpose registers Audio Interface Audio codec with 16 bits stereo DAC and one channel 16 bits ADC Support sample rate of 8, 11.025, 12, 16, 22.05, 32, 44.1 and 48 KHz. Peripheral and Interfaces Debug host for debug and normal UART UART interface USB 2.0 OTG high speed interface, support USB audio SDMMC controller for SD card I2C master for internal and external modules access Up to 8 GPIOs Integrated Power Management Multiple LDOs Copyright@2016 RDA Microelectronics. CONFIDENTIAL 3 / 17 RDA5856TE 2. Package and Pinout 2.1. Pin Assignment 2.2. Pin Description Figure 1 Pin Assignment Pin Type I/O I O A, I A, O A, I/O PWR GND Table 1 Pin Types Description Digital input/output Digital input Digital output Analog input Analog output Analog input/output Power Ground Table 2 pin description PIN NO NAME 1 GPIO_3<7>
TYPE DESCRIPTION I/O 2 3 4 5 6 GPIO_4<0>
I/O SD_DAT/GPIO_4<3>
I/O SD_CLK/GPIO_4<4>
I/O SD_CMD/GPIO_4<5>
I/O AVDD_3V3 PWR Multiple functions configured by p37_cfg. 0: General purpose input/output 1: PWM output0 2: UART TXD 4: Debug Host TXD 7: GPIO interrupt input 6 Multiple functions configured by p40_cfg. 0: General purpose input/output 1: PWM output 1 4: Debug Host RXD 7: GPIO interrupt input 5 Multiple functions configured by p43_cfg. 0: Debug Host Clock 3: General purpose input/output 5: SD data 7: GPIO interrupt input 2 Multiple functions configured by p44_cfg. 0: Debug Host RXD 3: General purpose input/output 5: SD clock 7: GPIO interrupt input 1 Multiple functions configured by p45_cfg. 0: Debug Host TXD 3: General purpose input/output 5: SD command 7: GPIO interrupt input 0 Power of analogue 3.3V Copyright@2016 RDA Microelectronics. CONFIDENTIAL 4 / 17 GPIO_3<7>
GPIO_4<0>
SD_DAT/GPIO_4<3>
SD_CLK/GPIO_4<4>
SD_CMD/GPIO_4<5>
AVDD_3V3 AVSS_3V3 DVSS DVDD VBAT USB_DN/GPIO_0<0>
USB_DP/GPIO_0<1>
1 2 3 4 5 6 7 8 9 10 11 12 RDA5856TE TSSOP24-EP 24 23 22 21 20 19 18 17 16 15 14 13 XTAL2 XTAL1 KEYSENSE/
GPIO_0<4>
BT_ANT AVSS_RF AVDD_RF FM_ANT AVSS_CODEC AVDD_CODEC MIC_IN DACOUT LINEIN RDA5856TE AVSS_3V3 DVSS DVDD VBAT USB_DN/GPIO_0<0>
12 USB_DP/GPIO_0<1>
A, I LINEIN A, O DACOUT A, I MIC_IN PWR AVDD_CODEC GND AVSS_CODEC A, I FM_ANT PWR AVDD_RF GND AVSS_RF AI/O BT_ANT KEYSENSE/GPIO_0<4> A, I 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23 24 GND GND PWR PWR A, I/O Or I/O A, I/O Or I/O or I/O A, I A, O Ground of analogue 3.3V Ground of digital core Power of digital code Battery power supply Multiple functions configured by p00_cfg. 0: General purpose input/output 2: UART RXD 6: USB negative input 7: USB detect negative input Multiple functions configured by p01_cfg. 0: General purpose input/output 2: UART TXD 6: USB positive input 7: USB detect positive input Line input DAC output Microphone input Analogue power supply of headphone Analogue ground of headphone FM receiver input Analogue power supply of bluetooth RF Analogue ground of bluetooth RF Bluetooth transmitter output/receiver input Multiple functions configured by p04_cfg. 0: General purpose input/output 4: Debug Host RXD 5: Key input XTAL input XTAL output XTAL1 XTAL2 2.3. Package Dimensions Copyright@2016 RDA Microelectronics. CONFIDENTIAL 5 / 17 3. Function Block Diagram RDA5856TE Figure 2 RDA5856TE Block Diagram 4. Clock and reset RDA5856TE has a reference clock input from either a crystal or an external clock source. There are two internal PLL which use XTAL clock as reference. They are used for system and audio applications. RDA5856TE has several reset sources, as following:
POR Entire SoC is reset after power supply ramping from 0v to VBAT. Figure 3 Clock Structure External Pin Reset Entire SoC is reset except PMU. Warm Reset Global soft reset DBB can be reset by set soft reset register in system control register map. Watch Dog Reset DBB will be reset when watch dog timer expired. 5. MCU RDA RISC is a 16/32-bits processor which using a Reduced Instruction Set Architecture, an efficient 6-stage instruction pipeline, it provides high performance to the system. RDA RISC Core. 32x32-bit Multiplier. Copyright@2016 RDA Microelectronics. CONFIDENTIAL 6 / 17 HST_CLK UART UART SD PMW out x4 Debug Host UART SD/MMC PWM DP/DN USB 2.0 OTG Serial Flash Flash Controller DMA VOC MCU VOC MEM MCU RAM MCU RAM BT Baseband BT Radio BT_ANT PMU FM FM_ANT I2C Master GPIO AIF Analog Audio CODEC Line In MIC In DAC Out I2C GPIO XTAL SYSPLL clk_sys AUDPLL DIV clk_codec RDA5856TE 32x32-bit -> 64-bit Multiplier Accumulator (MAC) in 2 cycles (pipelined). Read / Write Buffer. 16/32 bit instruction set. 32 interrupt sources. TCM interface for ROM and flash code read 6. USB RDA5856TE has a high-speed USB OTG interface for communicating with other devices, such as PC or USB card. Bothe USB PHY and Link layer is integrated. It supports both host and device. USB role detection is included to support USB Type A. Operates either as the host/peripheral in point-to-point communications with another USB function or as a function controller for a USB peripheral Complies with the USB 2.0 standard for high-speed (480 Mbps) functions Supports point-to-point communications with one high-, full- or low-speed device Supports Control, Interrupt, Bulk and Isochronous transfer 5 Endpoint with FIFOs Integrated USB PHY with ESD protection circuits One Bi-directional Control Endpoint (EP0) Four soft configurable Bi-directional Endpoints Certified compliant with the On-The-Go supplement Supports Session Request Protocol (SRP) and Host Negotiation Protocol (HNP) 7. VoC The VoC is designed to process different vocoders. It is developed as a target-specific DSP core, including basic function-call support. It executes the code with very little control intervention from the MCU. It is controlled and configured by the CPU through the AMBA bus. Bi-MAC, single test/logic Computational Unit with two 16x16 -> 32-bit multipliers Eight 16-bit general purpose registers that can be combined in four 32-bit general purpose All 16-bit registers can be used as pointers; four of them are incremental (for easy array registers. addressing). Four 32-bit general purpose registers. Double stack with random access: for 32-bit & 16-bit values (push, pop). Functions call support (jal, return). Two zero-cycle loop counters. Pointer & Direct addressing modes. DMA sub-module for block transfers between external memory and VoC memories. 8. Flash Controller The Flash controller provides instruction/data management on serial Flash devices. A command poll is used to support variable commands for variable flash devices. Up to one 512/256Mb Flash or two 128Mb (16MB) Flash devices are supported using Standard, or Dual or Quad SPI. Besides the normal Flash read mode using register address through RX FIFO, the Flash controller provides an XIP mode, in which CPU can read Flash address range as RAMs. Flash size up to 512Mb x 1, or 256Mb x 1, or 128Mb x 2 Standard, Dual, Quad SPI. Copyright@2016 RDA Microelectronics. CONFIDENTIAL 7 / 17 RDA5856TE Up to 52MHz SPI clock. Command poll to support variable Flash commands, including advanced read commands. Normal Read & XIP mode. 9. DMA RDA5856TE support various DMA functions. It supports memory to memory, memory to peripheral, peripheral to memory transfers. For transfers between memory and peripheral, hardware handshake is supported and multiple DMA channels shared with peripherals. Support for linear memory transfers. Multiple DMA channels Support for word, half-word and byte aligned addresses. Burst transfer supported Can fill a part of the memory with a 32-bit pattern. Frame Check Sequence computation Interrupt generation at completion of the transaction. 10. AIF The Audio Interface (AIF) module is the audio interface between the system and internal audio codec. All common DTMF and Comfort Tones can be generated and gained from -15 dB to 0 dB Side Tone fully configurable: Mute or amplification from -36 dB to +6 dB Loop back capabilities for test purposes. 16-bit mono samples from ADC. 16-bit stereo samples to stereo DAC. Separate TX and RX strobe lines for synchronization. 11. SDMMC Controller This module connects inner bus and outer SD or MMC card. It receives the inner command and data, transfers it to outer SD or MMC card, and transfer response or data back. SD Card Specification Version 2.0 SDIO Version 1.10 MMC specification Version 3.1 Hot insertion and removal of media cards will be considered by GPIO module 12. Timer There are three different timers. 1 24-bit decremental timer for OS, ticks of 16384Hz. 1 32-bit incremental hardware delay timer, ticks of 16384Hz. 1 24-bit decremental watchdog timer, ticks of 32768Hz. Multiple IRQ sources: timers wrap, interval arrives. 13. GPIO GPIO module has configurable number of General Purpose Input or Output ports (GPIO). Up to 8 GPIOs configurable as input or output. Up to 5 GPIOs can generate interrupt. Various interrupt triggered mode. Copyright@2016 RDA Microelectronics. CONFIDENTIAL 8 / 17 RDA5856TE Rising/Falling edge. High/Low level. 14. UART RDA5856TE includes UART which can be used as a serial interface or as an IrDA interface. Smooth stop feature (the UART stops after the end of the current word transfer). Break generation and detection. Supports low speed IrDA 1.0 SIR mode by adding external hardware. DMA capabilities to allow fully automated data transfers. Wide selection of programmable interrupts to allow interrupt driven data transfer management. Loop Back capabilities for test purposes. 15. Debug Host Debug Host module contains 1 normal Universal Asynchronous Receiver Transmitter channels
(UART) and 1 Debug UART. The two UARTs share the same TX/RX engines, which sends and receives byte data from serial interface. Each UART has its own control sub-module and own APB interface. Debug Host module parses the incoming data from serial interface to switch between the normal UART and the Debug UART. Normal UART The normal UART can be used for traces and other purposes. For APB interface, it is exactly the same to the other UARTs in the system. However, if Debug UART is enabled, it should have the same serial interface configuration as the Debug UART. Some of its configuration options will be masked in this case. To adapt different clock frequency, the normal UART uses asynchronous FIFO, which uses gray code to represent the read and write pointer positions. Debug UART The Debug UART is specially designed for communicating debug information with a PC host. The serial interface of Debug UART is a simplified version of the normal UART and is less configurable. Each sample is sent serially, has 1 start bit (always zero), 8 data bits, and 1 stop bits (always one). Breaks (data line held low) can be generated and detected allowing resynchronizing the two devices. I2C Master 16. RDA5856TE has I2C master which supports 100Kbps and 400Kbps. Interrupt or bit-polling driven byte-by-byte data-transfers Compatible with Philips I2C standard Multi Master Operation Software programmable clock frequency Clock stretching and wait state generation Software programmable acknowledge bit Arbitration lost interrupt, with automatic transfer cancellation Start/Stop/Repeated Start/Acknowledge generation Start/Stop/Repeated Start detection Bus busy detection Supports 7 and 10bit addressing mode Operates from a wide range of input clock frequencies Copyright@2016 RDA Microelectronics. CONFIDENTIAL 9 / 17 RDA5856TE 17. Calendar The calendar module provides date and time information. It works on the 32.768 KHz oscillator with independent power supply. In addition to provide timing data, alarm interrupt is generated and it is also used to power-up the baseband core by sending wakeup signal. Independent power supply. Counters for second, minute, hour, day, month, year and day of week. Maxim day of each month stored in module, leap year supported. Alarm generate, wakeup triggered by alarm. Alarm IRQ. Periodical IRQ for certain intervals. 18. PWM The PWM module generates 4 independent PWM outputs, utilizing 3 specialized modulation schemes. All PWM outputs can be configured to PWL, PWT and LGP mode. Pulse Width Tone (PWT) Generates square wave output capable of driving piezo electric speaker Variable frequency between 349Hz and 5276Hz with 12 half-tone frequencies per octave Volume control Light Pulse Generation (LPG) Adjustable PWM frequency is from 0.01Hz ~ 6.5MHz Adjustable on-time/off-time is from 0.77us to 50s. Customized output mode for square wave Pulse Width Light (PWL) Pseudo random bit sequence with output on-time proportional to a programmed threshold value Minimizes flicker 19. Audio Codec The audio codec has one channel voice ADC and audio DAC, which supports mono voice input and stereo audio output. It also has flexible mixing and loopback paths to support variable scenario requirements, such as side tone, FM recording, etc. One channel 16 bits ADC and 16 bits stereo DAC Mono input for voice and audio band, input resistance is typically 4K. Integrated mic bias which dont need external load capacitor with configurable output voltage Stereo outputs are supported, could drive 16/32 headphone, or act as line-out. Support sample rate of 8, 11.025, 12, 16, 22.05, 32, 44.1 and 48 KHz. Configurable gain for audio input and output path, gains control is implemented in both digital and analog. Stereo FM playback. Flexible audio/voice path mixing/loopback. 20. Power Management PMU integrated multiple LDOs. Copyright@2016 RDA Microelectronics. CONFIDENTIAL 10 / 17 RDA5856TE 20.1. Power on/off control PMU performs a POR once battery is connected which resets all components in chip. PMU can be configured to support either hard mode power on or soft mode power on. Hard mode No power key implementation is needed. System is powered on once battery is connected. Soft mode An extra key press (i.e. Power on key pressed) is needed to power on the system. 20.2. Power Mode The PMU implements multiple power mode defining the LDOs activation in various modes. Power Off Mode Used when the system is off (system has been shut-off or first time battery is plugged...). In this case only V_RTC is provided. Power On Mode Active Power Mode Low Power Mode After Power Up sequence, all LDOs that have reset state ON are activated. Used once system has booted and decides to switch from Power On Mode. This mode is programmable. Used when the system goes to low-power mode. This mode is programmable. Figure 4 Principle schematic for Power-profile usage 21. Bluetooth Transceiver RDA5856TE integrated bluetooth baseband and radio which has been designed to provide low power, low cost and robust communications for Bluetooth application. It is fully compliant with Bluetooth radio specification 4.2 including basic rate, EDR to 3MHz. RDA5856TE contains an on-chip Balun which combines the balanced outputs of the PA on transmit and produces the balanced input signals for the LNA. Baseband The BT baseband core handles packet and bit stream processing including packing/unpacking for different packet types, error checking, whitening/de-whitening, error correction, and encryption/decryption and so on Compliant with Bluetooth 4.2 + EDR specification
- Support BR, EDR 2M/3M
- Support SCO/eSCO Bluetooth Piconet and Scatternet support Low power support and optimization
- Support AFH
- Sniff Subrating
- Enhance Inquiry Response Copyright@2016 RDA Microelectronics. CONFIDENTIAL 11 / 17 Power On Mode Power Off Mode Low Power Mode Active Power Mode PowerOn 1 0 1 0 LP_MODE To LDOs and DCDC control 0 1 Software control register:
Default value:0, reset to 0 when PowerOn goes low RDA5856TE
- Sleep on 32.768KHz clock Test Mode support
- BR/EDR Transmitter test and Loopback test
- Fixed pattern, PRBS-9, PRBS-15 or user defined pattern RF Receiver The receiver features a low-IF architecture that enables the channel select filters to be integrated onto the die. The down converted signal is digitalized by a sigma-delta AD and further processed by a digital demodulator. The receiver path provides a low noise figure, a high degree of linearity and an extended dynamic range. RF Transmitter The transmitter features a direct IQ modulator to minimize frequency drift during a packet, which results in a well-controlled modulation index. The digital modulator performs the data modulation and filtering required for the Bluetooth signal. The internal PA has a programmable output power that meets Class 2 and class3 Bluetooth radio requirements without an external RF PA. RF Synthesizer The radio synthesizer is fully integrated onto the die with no requirement for external LC resonators or loop filter. The synthesizer provides fast frequency locking and low phase noise to meet Bluetooth specification. 22. FM RDA5856TE integrates a broadcast FM stereo radio tuner with fully integrated synthesizer and MPX decoder. The tuner requires the least external component. It has a powerful low-IF digital audio processor, this make it has optimum sound quality with varying reception conditions. It can be tuned to the worldwide frequency band. Low Power Consumption Support worldwide frequency band 65-108MHz Digital low-IF tuner Image-reject down-converter High performance A/D converter Fully integrated digital frequency synthesizer Fully integrated on-chip RF and IF VCO Fully integrated on-chip loop filter Autonomous search tuning Auto gain control (AGC) Digital adaptive noise cancellation Mono/stereo switch Soft mute Soft blending Programmable de-emphasis (50/75 us) Receive signal strength indicator (RSSI) Bass boost Volume control 32.768 KHz Reference Clock Directly support 32 resistance loading I2C control bus interface Copyright@2016 RDA Microelectronics. CONFIDENTIAL 12 / 17 RDA5856TE 23. Electrical Characteristics 23.1. BT RF Specifications Receiver Characteristics --- Basic Data Rate (VBAT = 4.0 V, TA = +27, unless otherwise specified) SYMBOL PARAMETER CONDITION MIN TYP. MAX UNIT Inter-modulation
Transmitter Characteristics --- Basic Data Rate (VBAT = 4.0 V, TA = +27, unless otherwise specified) SYMBOL PARAMETER CONDITION MIN
-34 TYP. MAX UNIT General Specification Sensitivity @ 0.1% BER Maximum input @ 0.1% BER C/I co-channel Adjacent channel selectivity C/I Out-of-band blocking General Specification Max RF output power Power control step 20dB bandwidth Adjacent channel transmitter power f1avg Maximum modulation f2avg/f1avg ICFT Drift (1 slot packet)
/4 DQPSK Sensitivity @0.01% BER Maximum input @ 0.1% BER C/I co-channel Adjacent channel selectivity C/I F = F0 + 1 MHz F = F0 1 MHz F = F0 + 2 MHz F = F0 2 MHz F = F0 + 3 MHz F = F0 3 MHz F = F_image 30MHz2000MHz 2000MHz2400MHz 2500MHz3000MHz 3000MHz12.5GHz
|M N| = 2 MHz
|M N| >= 3 MHz
0
-10
-20
-20
-10
-3
-93
0.92 8 3
152 0.97
10
9
-12
-10
-40
-40
-45
-45
-10
-52
-55 10 dBm dBm dB dB dB dB dB dB dB dB dBm dBm dBm dBm dBm dBm dB MHz dBm dBm kHz
kHz kHz kHz dBm dBm dB dB dB F = F0 + 1 MHz F = F0 1 MHz
-92.5
10
-10
-8 Drift (5 slot packet) 10 Receiver Characteristics --- Enhanced Data Rate (VBAT = 4.0 V, TA = +27, unless otherwise specified) SYMBOL PARAMETER CONDITION MIN
TYP. MAX UNIT Copyright@2016 RDA Microelectronics. CONFIDENTIAL 13 / 17 RDA5856TE Transmitter Characteristics --- Enhanced Data Rate (VBAT = 4.0 V, TA = +27, unless otherwise specified) SYMBOL TYP. PARAMETER CONDITION MIN MAX UNIT F = F0 + 2 MHz F = F0 2 MHz F = F0 + 3 MHz F = F0 3 MHz F = F_image F = F0 + 1 MHz F = F0 1 MHz F = F0 + 2 MHz F = F0 2 MHz F = F0 + 3 MHz F = F0 3 MHz F = F_image RMS DEVM DEVM < 30%
Peak DEVM RMS DEVM DEVM < 30%
Peak DEVM
|M N| =1 MHz
|M N| =2 MHz
|M N| >= 3 MHz
|M N| =1 MHz
|M N| =2 MHz
|M N| >= 3 MHz 8DPSK Sensitivity @0.01% BER Maximum input @ 0.1% BER C/I co-channel Adjacent channel selectivity C/I General Specification Max RF output power Relative transmit power
/4 DQPSK max w0
/4 DQPSK max wi
/4 DQPSK max |wi + w0|
8DPSK max w0 8DPSK max wi 8DPSK max |wi + w0|
/4 DQPSK Modulation Accuracy 8DPSK Modulation Accuracy
/4 DQPSK In-band spurious emissions 8DPSK In-band spurious emissions EDR Differential Phase Coding
-82.5
-5
4
-1.5
-5 20 17
-2 17 17 10 100
10 99.8 100
-39
-39
-45
-45
-8
20
-2 0
-28
-28
-38
-38 0
24 22
-38
-36
-41
-37
-36
-40
dBm dBm dB dB dB dB dB dB dB dB dB dB dB dB dB dBm dB kHz kHz kHz kHz kHz kHz
dBc dBm dBm dBc dBm dBm
Copyright@2016 RDA Microelectronics. CONFIDENTIAL 14 / 17 RDA5856TE 23.2. FM RF Specifications
(VDD = 2,7 to 5,5V, TA = -25C to 85 C, unless otherwise specified) SYMBOL PARAMETER CONDITIONS General Parameters BAND=00 BAND=01 BAND=02 BAND=03
(S+N)/N=26dB Fin FM Input Frequency Sensitivity1,2,3 LNA Input Resistance7 LNA Input Capacitance7
(S+N)/N Maximum Signal Plus Noise to Noise Ratio 1,2 Audio Distortion1,3,6 Total Harmonic Vrf Rin Cin THD RL Pins LNAN, LNAP Vcom_rfin Vcom Pins LNAN and LNAP Input Common Mode Voltage Audio Output Common Mode Voltage Audio Output Loading Resistance Single-ended MIN TYP MAX UNIT 108 91 106 76 6
MHz MHz MHz MHz pF dB V EMF 87 76 76 65 2 55 0.15 0.2 150 2 4 60 32 0 1 0.95 1.05
V V Notes:
1. Fin=65 to 115MHz; Fmod=1KHz; de-emphasis=75 s; MONO=1; L=R unless noted otherwise;
2. f=22.5KHz; 3. BAF = 300Hz to 15KHz, RBW <=10Hz; 4. |f2-f1|>1MHz, f0=2xf1-f2, AGC disable, Fin=76 to 108MHz;
5. PRF=60dBUV; 6. F=75KHz,fpilot=10% 7. Measured at VEMF = 1 m V, f RF = 65 to 108MHz 8. At LOUT and ROUT pins 9. Adjustable 23.3. Audio Characteristics Parameter SNR THD Output Voltage Min
Typ 92.5
-80 590 Max
Unit dB dB mV rms 23.4. Recommended Operating Conditions Operating Condition Operating Temperature Range VBAT AVDDHP AVDD33 DVDD AVDD_RF Min
-20 3.4 2.22 2.88 1.02 2.23 Typ 20 3.8 2.48 3.25 1.2 2.37 Max 65 4.35 2.76 3.3 1.44 2.53 Unit V V V V V Copyright@2016 RDA Microelectronics. CONFIDENTIAL 15 / 17 RDA5856TE 24. Software The software development of RDA5856TE is support by RDA R-IOT SDK. R-IoT is the IOT development platform of RDA, it composed of SDK, Eclipse IDE and some other auxiliary tools for debugging and audio calibration, etc. The SDK provides all the necessary components and standard APIs for the platform. The SDK is based on Eclipse which includes the cross-compile tools, connector to deploy and debug your software on the chip, basic library and sample code needed for embedded software development. RDA has a variety of IoT chips for different requirements and scenarios. It has single bluetooth, WIFI chip; also it has SoC combined with bluetooth, WIFI and GSM for wireless network connection, and GPIO, I2C and etc. pins to connect sensor and peripheral device. Whats more, RDA IoT chip supports co-exist technology which allows bluetooth and WIFI work simultaneously. Via HAL (hardware abstract layer) R-IoT provides the support of all RDA IoT chips. Meanwhile, R-IoT offers micro-services style architecture to facilitate software development and maintenance. IoT applications are based on these micro-services, for instance, if we build a bluetooth music player, we need to program with BT micro-services. In most cases, these micro-services running in its own COS task and communicating with other services by sending or receiving COS event. The COS (Common OS) is an OS wrapper over C interface, it provides developers unified API so that developers could program with such interface without having to consider the native OS details. Below is the diagram of R-IoT software architecture:
Figure 5 R-IoT Software Architecture There are 5 layers:
Chip and Device Layer HAL Layer HAL is the module to configure chip and device; it tries to be common for all chips and devices, so the configuration must be very similar. OS and Driver Layer Copyright@2016 RDA Microelectronics. CONFIDENTIAL 16 / 17 RDA5856TE R-IoT tries to support more Oses like RT-Thread, etc. without jeopardizing high layer service and application by introducing Common OS wrapper. Drivers are all external chip driver as opposed to chip drivers. Service Layer These services are small building blocks, highly decoupled and provide user interface to application layer. Application Layer In conclusion, R-IoT is almost a turn-key platform for IoT application development. The original SDK already had rich features for many mainstream IoT applications including home appliances and automation, asset tracking systems and consumer electronics devices, this enables the customer to rapid delivery its unique product to the market. Beyond that, its modularized and scalable software architecture makes it easier to support more Oses, chip, micro-services and cloud vendors, all these bring not only technical advantages but cost advantages as well. For more information, please refer to RDA IOT SDK Development Manual and RDA IOT BT Development Manual. 25. Revision History Revision 0.01 0.02 0.03 Description Initial draft Date 2016/05/13 2016/07/12 Add Recommended Operation Conditions 2016/08/04 1. Update Package and Pinout 2. Update Audio Characteristics Copyright@2016 RDA Microelectronics. CONFIDENTIAL 17 / 17
frequency | equipment class | purpose | ||
---|---|---|---|---|
1 | 2019-05-21 | 2402 ~ 2480 | DXX - Part 15 Low Power Communication Device Transmitter | Original Equipment |
app s | Applicant Information | |||||
---|---|---|---|---|---|---|
1 | Effective |
2019-05-21
|
||||
1 | Applicant's complete, legal business name |
BRAND ADDITION LTD
|
||||
1 | FCC Registration Number (FRN) |
0026429126
|
||||
1 | Physical Address |
Trafford Wharf Road, Manchester, M17 1DD
|
||||
1 |
Manchester, N/A
|
|||||
1 |
United Kingdom
|
|||||
app s | TCB Information | |||||
1 | TCB Application Email Address |
T******@intertek.com
|
||||
1 | TCB Scope |
A2: Low Power Transmitters (except Spread Spectrum) and radar detectors operating above 1 GHz
|
||||
app s | FCC ID | |||||
1 | Grantee Code |
2ALSK
|
||||
1 | Equipment Product Code |
BTS-06B
|
||||
app s | Person at the applicant's address to receive grant or for contact | |||||
1 | Name |
S****** P********
|
||||
1 | Title |
Quality and Compliance Manager
|
||||
1 | Telephone Number |
44(0)********
|
||||
1 | Fax Number |
+44 (********
|
||||
1 |
S******@brandaddition.com
|
|||||
app s | Technical Contact | |||||
1 | Firm Name |
Intertek Testing Services Hong Kong Ltd.
|
||||
1 | Name |
T****** C********
|
||||
1 | Physical Address |
2/F., Garment Centre
|
||||
1 |
Hong Kong
|
|||||
1 | Telephone Number |
(852)********
|
||||
1 | Fax Number |
(852)********
|
||||
1 |
t******@intertek.com
|
|||||
app s | Non Technical Contact | |||||
1 | Firm Name |
Intertek Testing Services Hong Kong Ltd.
|
||||
1 | Name |
T******** C******
|
||||
1 | Physical Address |
2/F., Garment Centre
|
||||
1 |
Hong Kong
|
|||||
1 | Telephone Number |
(852)********
|
||||
1 | Fax Number |
(852)********
|
||||
1 |
t******@intertek.com
|
|||||
app s | Confidentiality (long or short term) | |||||
1 | Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | No | ||||
1 | Long-Term Confidentiality Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | No | ||||
if no date is supplied, the release date will be set to 45 calendar days past the date of grant. | ||||||
app s | Cognitive Radio & Software Defined Radio, Class, etc | |||||
1 | Is this application for software defined/cognitive radio authorization? | No | ||||
1 | Equipment Class | DXX - Part 15 Low Power Communication Device Transmitter | ||||
1 | Description of product as it is marketed: (NOTE: This text will appear below the equipment class on the grant) | Shower Speaker | ||||
1 | Related OET KnowledgeDataBase Inquiry: Is there a KDB inquiry associated with this application? | No | ||||
1 | Modular Equipment Type | Does not apply | ||||
1 | Purpose / Application is for | Original Equipment | ||||
1 | Composite Equipment: Is the equipment in this application a composite device subject to an additional equipment authorization? | No | ||||
1 | Related Equipment: Is the equipment in this application part of a system that operates with, or is marketed with, another device that requires an equipment authorization? | No | ||||
1 | Is there an equipment authorization waiver associated with this application? | No | ||||
1 | If there is an equipment authorization waiver associated with this application, has the associated waiver been approved and all information uploaded? | No | ||||
app s | Test Firm Name and Contact Information | |||||
1 | Firm Name |
Intertek Testing Services Hong Kong Ltd.
|
||||
1 | Name |
J**** H****
|
||||
1 | Telephone Number |
85221********
|
||||
1 | Fax Number |
85278********
|
||||
1 |
j******@intertek.com
|
|||||
Equipment Specifications | |||||||||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Line | Rule Parts | Grant Notes | Lower Frequency | Upper Frequency | Power Output | Tolerance | Emission Designator | Microprocessor Number | |||||||||||||||||||||||||||||||||
1 | 1 | 15C | 2402.00000000 | 2480.00000000 |
some individual PII (Personally Identifiable Information) available on the public forms may be redacted, original source may include additional details
This product uses the FCC Data API but is not endorsed or certified by the FCC