TigoAir 2 SOM TigoAir 2 SOM Data Sheet Revision 0.2 December 9, 2020 All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 1 of 26 TigoAir 2 SOM Approval Table Role Written By Reviewed By Approved By Name Yaniv Yardeni Version 0.2 Date 09/11/2020 Revision Control Author Name Yaniv Yardeni Yaniv Yardeni Description Creation Update to BMKs revision Revision Date 0.1 0.2 26/03/20 09/11/20 All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 2 of 26 TigoAir 2 SOM 2 2.4.1 Contents Approval Table .................................................................................................................................2 Revision Control ............................................................................................................................... 2 1 Overview ................................................................................................................................... 5 1.1 General Information ........................................................................................................... 5 1.2 Features .............................................................................................................................. 5 1.3 Block Diagram ................................................................................................................... 6 System Overview ...................................................................................................................... 7 2.1 SoC ..................................................................................................................................... 7 2.2 Antenna .............................................................................................................................. 7 2.3 TigoAir 2 SOM Interface ................................................................................................... 8 2.4 SOM Pinout ........................................................................................................................ 9 Pin Definitions .......................................................................................................... 10 2.5 Footprint to SoC Connectivity ......................................................................................... 11 2.6 USART / SPI .................................................................................................................... 12 2.7 I2C .................................................................................................................................... 12 2.8 Timers ............................................................................................................................... 12 2.9 Analog Inputs ................................................................................................................... 12 2.10 Analog Outputs ............................................................................................................. 12 2.11 User Interface ............................................................................................................... 13 2.12 GPIO ............................................................................................................................. 13 2.13 LESENCE ..................................................................................................................... 13 2.14 Programming ................................................................................................................ 13 2.15 Power ............................................................................................................................ 13 Electrical Characteristics......................................................................................................... 14 3.1 Absolute Maximum Ratings ............................................................................................. 14 3.2 Power ................................................................................................................................ 14 3.3 Analog .............................................................................................................................. 15 3.4 Digital ............................................................................................................................... 15 3.5 RF ..................................................................................................................................... 16 SOM Design ............................................................................................................................ 17 Schematics ........................................................................................................................ 17 4.1.1 BOM ......................................................................................................................... 18 4.2 Assembly .......................................................................................................................... 19 Top Assembly ........................................................................................................... 19 4.3 Mechanic .......................................................................................................................... 20 4.3.1 SOM Footprint .......................................................................................................... 20 4.3.2 Views ........................................................................................................................ 21 4.3.3 Side Views ................................................................................................................ 21 4.3.4 Top View .................................................................................................................. 22 4.3.5 Bottom View ............................................................................................................. 23 4.3.6 Front View ................................................................................................................ 23 4.3.7 Back View ................................................................................................................. 23 Literature ................................................................................................................................. 24 4.2.1 4.1 4 5 3 All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 3 of 26 TigoAir 2 SOM 6 Contact ....................................................................................................................................24 7 Guidelines and Regulations .................................................................................................... 25 7.1 RF Exposure Warnings .................................................................................................... 25 7.2 Class A Warnings ............................................................................................................. 25 7.3 Modification Statements .................................................................................................. 25 7.4 FCC Regulatory Notices .................................................................................................. 26 7.5 Limited Modular Approval .............................................................................................. 26 Figure 1 TioAir 2 SOM SOM Block Diagram ............................................................................... 6 Figure 2 - SOM Pinout ...................................................................................................................... 9 Figure 4 Schematics SoC .............................................................................................................17 Figure 5 Schematics Footprint ..................................................................................................... 18 Figure 6 Schematics BOM ........................................................................................................... 18 Figure 7 Top Assembly ................................................................................................................ 19 Figure 8 SOM Footprint............................................................................................................... 20 Figure 9 Side View 2 ................................................................................................................... 21 Figure 10 Top View ..................................................................................................................... 22 Figure 11 Bottom View ............................................................................................................... 23 Figure 12 Front View ...................................................................................................................23 Figure 13 Back View ................................................................................................................... 23 Table 1 - Pin Definitions ................................................................................................................. 10 Table 2 Footprint to SoC Connectivity ........................................................................................ 11 Table 13 - Absolute Maximum Ratings .......................................................................................... 14 Table 14 - Power specifications ...................................................................................................... 14 Table 15 - ADC Characteristics ...................................................................................................... 15 Table 17 - IO Static Characteristics ................................................................................................ 15 Table 7 RF Characteristics ........................................................................................................... 16 All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 4 of 26 TigoAir 2 SOM 1 Overview This document is a user guide explaining how to integrate TigoAir 2 SOM SOM into ones design for enabling IOLW wireless communication and also low power capabilities. Disclaimer: This data sheet is preliminary and should be treated as such. Information provided in this document is not final and subjected to change. 1.1 General Information The TigoAirLP is an integrated System-on-Module (SOM) that enables IO-Link Wireless connectivity for low power industrial applications. It is based on Silicon Labs low power SoC with integrated radio module. 1.2 Features Integrated low power radio transceiver for 2.4GHz ISM band EFR32FG13 32bit ARM Cortex-M4 Core up to 40MHz with 512KB Flash memory 64KB RAM Option for integrated internal chip antenna (BOM change) U.FL connector for external antenna (50) 2 x USART SPI Full duplex master\slave 2 x I2C buses 2 x Timer IO (1 low power timer) 2 x ADC inputs (or one differential) 2 x DAC outputs Dedicated push button input Dedicated LED control output SWD\ JTAG programming and debug 1 x IDAC output 3 x GPIO 2 x LESENCE (Low-Energy Sensor Interface) All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 5 of 26 TigoAir 2 SOM 1.3 Block Diagram Figure 1 TioAir 2 SOM SOM Block Diagram Figure 1 shows a high-level block diagram of the TigoAir 2 SOM wireless SOM. As shown, the primary interface to the TigoAir 2 SOM is through its footprint and from an internal\external antenna or from the footprint RF pad, for wireless communication. The footprint interface provides power, serial communication, analog inputs and output and other connectivity options. All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 6 of 26 TigoAir 2 SOM 2 System Overview 2.1 SoC The TigoAir 2 SOM SOM uses Silabs EFR32FG13P232F512GM48-D SoC for stack, IOLW radio communication, external interfaces and application development. The EFR32FG13P232F512GM48-D is 32bit ARM Cortex-M4 Core MCU, 512KB Flash, 64KB RAM, analog IOs, serial communication interfaces and GPIOs. For software development, CoreTigo supplies an SDK package that includes: IOLW stack, MCU peripherals usage example, and an example application. Additional information can be found in EFR32FG13P232F512GM48-D datasheet 2.2 Antenna The TigoAir 2 SOM supports three options for antenna selection, by different assembly options:
1. On-board U.FL[4] connector for external antenna 2. On-board ceramic chip antenna: Johansons 2450AT18D0100[2]
3. RF PAD to host board via the footprint All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 7 of 26 TigoAir 2 SOM 2.3 TigoAir 2 SOM Interface TigoAir 2 SOM interfaces are through its footprint on the bottom side of the board. It contains a total of 45 pads:
- Power 9 pads (2 VDD, 7 GND)
- Signal 35 pads (Communication buses, digital IOs, analog inputs, programming, and debug)
- RF 1 pad (RF transmission to the host board) The SoC pin-out configuration allows for operation of most pins as GPIOs/Analog inputs/Analog outputs when they are not used with any specific functionality (example: PB13 that is connected to pad 16 can be used as defined - USART1 RX function, or alternatively it can be set to be GPIO). Refer to SoC datasheet for additional information. For changing functionality/ pinout for your application please contact CoreTigos support. All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 8 of 26 TigoAir 2 SOM 2.4 SOM Pinout All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 9 of 26 Figure 2 - SOM Pinout USART0 Asynchronous transmit / Synchronous mode Master output / Slave input (MOSI) USART0 Asynchronous receive / Synchronous mode Master input / Slave output (MISO) USART1 Asynchronous transmit / Synchronous mode Master output / Slave input (MOSI) USART1 Asynchronous receive / Synchronous mode Master input / Slave output (MISO) TigoAir 2 SOM NC SWO RESET GPIO 1 SWCLK GND_F SWDIO I2C0 SCL ADC0 pos LETIMER0 USART1 CS USART1 TX USART0 TX USART1 RX USART0 RX USART0 CTS USART1 CLK Name GND_F 2.4.1 Pin Definitions Table 1 - Pin Definitions Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 LESENCE CH5 LESENCE CH5 USART1 RTS USART0 RTS USART1 CTS ADC0 neg I2C0 SDA I2C2 SDA PB_PAIR I2C2 SCL Timer1 GND_F GPIO 2 GPIO 3 Vcc IN Vcc IN DAC 1 DAC 2 LED0 NC NC NC Description GND power supply ground General purpose Input / output GND power supply ground Low energy timer output, channel 0 USART1 Chip select input / output I2C0 Serial clock line input / output Serial wire data input / output Serial wire clock input Serial wire viewer output Not connected SoC Reset input pin USART1 Clock input / output USART0 Clear to send hardware flow control input ADC0 Analog to digital external reference input positive pin Timer1 Capture compare input / output channel 1 USART Clear to send hardware flow control input ADC0 Analog to digital external reference input negative pin VCC power supply VCC power supply Push button input active high GND power supply ground I2C0 Serial data input / output Low energy sensor interface channel 5 LED control output active low USART0 Request to send hardware flow control output USART1 Request to send hardware flow control output Not connected Not connected DAC1 Digital to analog voltage convertor output DAC2 Digital to analog voltage convertor output I2C2 Serial clock line input / output I2C2 Serial data input / output Low energy sensor interface channel 5 General purpose Input / output General purpose Input / output Not connected All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 10 of 26 TigoAir 2 SOM 41 42 43 44 45 GND_F GND_F GND_F GND_F RF2p4GHz GND power supply ground GND power supply ground GND power supply ground GND power supply ground RF Port (PAD) - RF transmission to host board (special assembly variant) 2.5 Footprint to SoC Connectivity The following table describes all the signals on the footprint interface. If unused, debug pads should be left unconnected (alternatively they can be connected to a test-
point\header for debug purposes). Table 2 Footprint to SoC Connectivity SoC Pin Name Type Signal Name Main Function SoC Pin Number 0,14,15,16,37 7 0,14,15,16,37 25 26 24 36 30 2 1 3 NC 12 4 29 33 27 43 32 5 44 9,18,34,39,40-42 9,18,34,39,40-42 8 0,14,15,16,37 31 22 23 28 6 NC NC 46 45 VSS PF6 VSS PA0 PA1 PD15 PB15 PA5 PF1 PF0 PF2 NC RESETn PF3 PA4 PB13 PA2 PC6 PB12 PF4 PC7 VCC VCC PF7 VSS PB11 PD13 PD14 PA3 PF5 NC NC PC9 PC8 Power I/O Power Output Input Output Output I/O I/O Clock I/O NC Input Clock Output Input Output Input Output Output Input Power Power Input Power I/O I/O Output Input Power NC NC Output Output GND GPIO 1 GND USART0 TX USART0 RX LETIMER0 USART1 CS I2C0 SCL SWDIO SWCLK SWO NC RESET USART1 TX USART1 CLK USART1 RX USART0 CTS ADC0 pos Timer1 USART1 CTS ADC0 neg Vcc IN Vcc IN PB_PAIR GND I2C0 SDA LESENCE CH5 LED0 USART0 RTS USART1 RTS NC NC DAC 1 DAC 2 All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. TigoAir 2 SOM Pad Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 GND GPIO GND USART TX USART RX Low Power Timer USART CS I2C SCL SWD I/O SWD Clock SWO Not connected SoC Reset USART TX USART CLK USART RX USART CTS ADC Timer USART CTS ADC VCC VCC Pairing button GND I2C Data LESENCE LED USART RTS USART RTS Not connected Not connected DAC DAC Page 11 of 26 TigoAir 2 SOM 47 48 22 19 20 NC 0,14,15,16,37 0,14,15,16,37 0,14,15,16,37 0,14,15,16,37 17 PC10 PC11 PD13 PD10 PD11 NC VSS VSS VSS VSS 2G4RF_IOP I/O I/O I/O Output Output NC Power Power Power Power Input I2C2 SCL I2C2 SDA LESENCE CH5 GPIO 2 GPIO 3 NC GND GND GND GND RF2p4GHz 35 36 37 38 39 40 41 42 43 44 45 I2C SCL I2C Data LESENCE GPIO GPIO Not connected GND GND GND GND RF Port (PAD) 2.6 USART / SPI USART0 and USART1 are used as an external Synchronous/Asynchronous, full duplex serial interface with 2 wires or 4 wires (optional HW flow control) operation. Also, can be used for SPI, RS-485, MicroWire and 3-wire communication protocols. 2.7 I2C There are 2 separate I2C channels, I2C0 and I2C2, that can be used as an external serial interface. Each of the channels can be configured as master or slave device. 2.8 Timers Timer1 is a general purpose 16-bit timer. LETIMER0 is a general purpose. Low power, 16-bit timer Each timer channel can be configured to use an IO pin for input capture, output compare or PWM functionality. 2.9 Analog Inputs ADC0 is a 12-bit successive approximation analog to digital converter. Analog to digital conversion of the ADC0 channels can be performed in single, scan or continuous mode. Conversion time depends on configured resolution (6, 8, 10 or 12-bit) and sampling clock frequency. ADC0 inputs can be common mode or differential mode. 2.10 Analog Outputs DAC1 and DAC 2 are a 12-bit digital to voltage analog converter DACs outputs can be configured on SoC pins for external components or internally for use in other SoC internal peripherals. IDAC0 is a 12-bit digital to current analog convertor. All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 12 of 26 TigoAir 2 SOM 2.11 User Interface There are 3 dedicated SoC pins for 1) Push button input (pairing button for IOLW) 2) LED output 3) SoC reset 2.12 GPIO If some SoC peripherals are not used (for example: No I2C2) then the relevant pads can be used as GPIOs. 2.13 LESENCE Low energy sensor interface is a configurable sensor interface, capable of supporting a wide range of sensors and measurements schemes. 2.14 Programming The programming interface of the MCU supports SWD (2 or 3 wire) or JTAG (4 wire) and requires power and reset control. 2.15 Power The board is operated typically by 3.3V voltage supply. All power pins of the SoC (DVDD, VREGVDD, AVDD, PAVDD and RFVDD) are connected to the main power supply. All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 13 of 26 T3igoAir 2 SOM 3 Electrical Characteristics 3.1 Absolute Maximum Ratings Table 3 - Absolute Maximum Ratings Symbol VDD Min.
-0.3 V_IN V_INA I_DD SUM[I_IN]
I_IN RF T_op Parameter Operating supply voltage IO input voltage input Analog voltage Operating supply current (sum of all power lines) I/O current Sink /
source Sum of all IOs current Antenna input Operation temperature 3.2 Power Table 4 - Power specifications Symbol VDD V_IN I_DD (25C) I_ACTIVE Parameter Operating supply voltage IO input voltage 0 SOM Operating supply current in EM4S mode SOM current consumption in EM0 (all SoC peripherals disabled), 38.4MHz HFRCO (loop from flash)
-40 Min. 1.8
-0.3 0 IOVDD + 0.3 3.3 Max. 3.8 200 50 200 10 85 Unit V V V mA mA mA dBm C Typ. 3.3 0.04 Max. 3.8 VDD 0.085 Unit V V uA 3.72 4.07 mA All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 14 of 26 TigoAir 2 SOM 3.3 Analog Table 5 - ADC Characteristics Symbol V_REF V_REF+
V_REF-
f_ADC Throughput rate t_STAB Parameter Single ended Positive reference voltage Negative reference voltage ADC clock frequency 12-bit resolution Power-up time Min. Typ. Max. VFS VFS/2 Unit V V
-VFS/2 V 16 1 5 MHz Msps us 3.4 Digital Table 6 - IO Static Characteristics Symbol V_IL Min. Parameter IO input low level voltage IO input high level voltage V_IH 0.7 x VDD Typ. Max. 0.3 x VDD Unit V V All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 15 of 26 TigoAir 2 SOM Table - Output Voltage Characteristics Symbol Min. V_OL Parameter IO output low level voltage IO output high level voltage V_OH VCC*0.7 Typ. Max. VCC*0.3 Unit V V 3.5 RF Table 7 RF Characteristics Symbol PO_MAX Parameter Maximum TX power FREQ_RANGE Frequency SENS BW Min. Typ.
-90 1 Max. 10 2480 Unit dBm MHz dBm MHz 2401 range 10-9 PER sensitivity Modulation GFSK band width All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 16 of 26 TigoAir 2 SOM 4 SOM Design 4.1 Schematics Figure 3 Schematics SoC All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 17 of 26 TigoAir 2 SOM 4.1.1 BOM Figure 4 Schematics Footprint Figure 5 Schematics BOM All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 18 of 26 TigoAir 2 SOM 4.2 Assembly 4.2.1 Top Assembly Figure 6 Top Assembly All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 19 of 26 TigoAir 2 SOM 4.3 Mechanic 4.3.1 SOM Footprint All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 20 of 26 Figure 7 SOM Footprint TigoAir 2 SOM 4.3.2 Views 4.3.3 Side Views 2.212mm Figure Side View 1 Figure 8 Side View 2 All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 21 of 26 TigoAir 2 SOM 4.3.4 Top View Figure 9 Top View All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 22 of 26 TigoAir 2 SOM 4.3.5 Bottom View 4.3.6 Front View Figure 10 Bottom View 4.3.7 Back View Figure 11 Front View Figure 12 Back View All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 23 of 26 1. Silab SoC EFR32FG13P232F512GM48-D Datasheet
[https://www.silabs.com/documents/public/data-sheets/efr32fg13-datasheet.pdf]
2. Johanson Technology 2450AT18D0100 Antenna Datasheet
[https://www.johansontechnology.com/datasheets/2450AT18D0100/2450AT18D0100.pdf
TigoAir 2 SOM 5 Literature 6 Contact CoreTigo Sderot Giborei Israel 5 Entrance B, 2nd floor Netanya Israel 4250405 All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 24 of 26 TigoAir 2 SOM 7 Guidelines and Regulations FCC ID: 2ATSM-TAIR2 7.1 RF Exposure Warnings This device is only authorized for use in a mobile application. At least 20 cm of separation distance between the TigoAir 2 SOM module and the users body must always be maintained. 7.2 Class A Warnings The FCC Wants You to Know This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case the user will be required to correct the interference at his own expense. 7.3 Modification Statements CoreTigo LTD has not approved any changes or modifications to this device by the user. Any changes or modifications could void the users authority to operate the equipment. FCC Warning (Modification statement) All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 25 of 26 TigoAir 2 SOM 7.4 FCC Regulatory Notices This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Interference statement This device complies with FCC radiation exposure limits set forth for an uncontrolled environment and meets the FCC radio frequency (RF) Exposure Guideline. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Wireless notice 7.5 Limited Modular Approval Regulatory Module Integration Instructions This module has been granted Limited Modular Approval for mobile applications. OEM integrators for host products may use the module in their final products without additional FCC certifications if they meet the following conditions. Otherwise, additional FCC approvals must be obtained. The host product with the module installed must be evaluated for simultaneous transmission requirements. The users manual for the host product must clearly indicate the operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, the maximum antenna gain including cable loss in a mobile-only exposure condition must not exceed: https://www.inventeksys.com/2-4ghz-antenna-sma/
A label must be affixed to the outside of the host product with the following statement:
This device contains FCC ID: 2ATSM-TAIR2 The final host / module combinations may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 26 of 26 TigoAir 2 SOM The requirement for KDB 996369 D03:
List of applicable FCC rules FCC CFR Title 47 Part 15 Subpart C Section 15.247 Summarize the specific operational use conditions This module has been granted Limited Modular Approval for mobile applications. OEM integrators for host products may use the module in their final products without additional FCC certifications if they meet the following conditions. Otherwise, additional FCC approvals must be obtained. The host product with the module installed must be evaluated for simultaneous transmission requirements. The users manual for the host product must clearly indicate the operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, the maximum antenna gain including cable loss in a mobile-only exposure condition must not exceed:
https://www.inventeksys.com/2-4ghz-antenna-sma/
A label must be affixed to the outside of the host product with the following statement:
This device contains FCC ID: 2ATSM-TAIR2 The final host / module combinations may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. Information on test modes and additional testing requirements Date transfer module demo board can control the EUT work in RF test mode at specified test channel. Additional testing, Part 15 Subpart B disclaimer The module without unintentional-radiator digital circuit, so the module does not required an evaluation by FCC Part 15 Subpart B. The host should be evaluated by the FCC Subpart B. Limited module procedures The module has not its own antenna, the host meets the necessary requirements to satisfy the module limiting conditions. Trace antenna designs Not applicable. RF exposure considerations The host device manufacturer should confirm that a separation distance of 20 cm or more should be maintained between the antenna of this host device and persons during the host device operation. Antennas The device itself has no antenna, customer can use the PCB antenna, Ceramic antenna or FPC antenna with antenna gain less than 2.15dBi. Label and compliance information If this certified module is installed inside the host device, then the outside of the host must be labeled with Contains FCC ID: 2ATSM-TAIR2. All information presented in this document is confidential and for internal use only. Copyright 2019, CoreTigo Ltd. Page 27 of 26