FCC ID: WAP3072 AIROC Bluetooth LE Module

CYBLE-343072-02, CYBLE-333073-02, CYBLE-333074-02 A I R O C B l u etooth L E m o d u l e General description The CYBLE-3x307x-02 is a fully integrated Bluetooth smart ready wireless module. The CYBLE-3x307x-02 includes an onboard crystal oscillator, passive components, flash memory, and the CYW20835 silicon device. Refer to the CYW20835 datasheet for additional details on the capabilities of the silicon device used in this module. The CYBLE-3x307x-02 supports peripheral functions (ADC and PWM), UART, I2C, and SPI communication, and a PCM/I2S audio interface. The CYBLE-3x307x-02 includes a royalty-free Bluetooth stack compatible with Bluetooth 5.0 in a 13.31 21.89 1.95 mm package. The CYBLE-3x307x-02 includes 512 KB of onboard serial flash memory and is designed for standalone operation. The CYBLE-3x307x-02 uses an integrated power amplifier to achieve Class I or Class II output power capability. The CYBLE-3x307x-02 is fully qualified by Bluetooth SIG and is targeted at applications requiring cost-optimized Bluetooth wireless connectivity. The CYBLE-3x307x-02 is offered in four certified versions CYBLE-343072-02, CYBLE-333073-02, and CYBLE-333074-02. The CYBLE-343072-02 includes an integrated trace antenna. The CYBLE-333073-02 supports an external antenna through a RF solder pad output. The CYBLE-333074-02 supports an external antenna via a u-FL connector. Module descri pti on Module size: 13.31 21.89 1.95 mm Bluetooth 5.0 Qualified Smart Ready module

- QDID: TBD

- Declaration ID: TBD Certified to FCC, ISED, MIC, and CE regulations Castelated solder pad connections for ease-of-use 512-KB on-module serial flash memory Up to 24 GPIOs Temperature range: 30 C to +85 C Cortex-M4 32-bit processor Maximum TX output power

- +12 dBm for Bluetooth Low Energy Bluetooth LE connection range of up to 250 meters at 12 dBm[1]

RX receive sensitivity:

- Bluetooth Low Energy: 94.5 dBm Powe r consu mpti on Bluetooth LE Current Consumption

- RX current: 8 mA

- TX current: 18 mA @ 12 dBm

- Interval Bluetooth LE ADV average current consumption: 30 A

- HIDOFF (Deep Sleep): 1 A Functional capabilities 1x MIPI DMI-C interface 6x 16-bit PWMs Programmable key-scan matrix interface, up to 8 20 key scanning matrix Preliminary Datasheet www.infineon.com Please read the Important Notice and Warnings at the end of this document page 1 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Benefits Quadrature decoder Watchdog timer (WDT) 1x peripheral UART, 1x UART for programming and HCI 1x SPI (master or slave mode) 1x I2C master One ADC (10-ENoB for DC measurement and 12-ENOB for Audio measurement) Hardware security engine Benefits CYBLE-3x307x-02 provides all necessary components required to operate Bluetooth LE communication standards. Proven ready-to-use hardware design Cost optimized for applications without space constraints Nonvolatile memory for self-sufficient operation and over-the-air updates Bluetooth SIG listed with QDID and Declaration ID Fully certified module eliminates the time needed for design, development, and certification processes ModusToolbox provides an easy-to-use integrated design environment (IDE) to configure, develop, and program a Bluetooth application More information Infineon provides a wealth of data at www.cypress.com to help you to select the right module for your design, and to help you to quickly and effectively integrate the module into your design. References Overview: AIROC Bluetooth LE & Bluetooth portfolio, Module roadmap CYW20835 Bluetooth silicon datasheet Development kits:

- CYBLE-343072-EVAL, CYBLE-343072-02 evaluation board

- CYBLE-333074-EVAL, CYBLE-333074-02 evaluation board Test and debug tools:

- CYSmart, Bluetooth LE test and debug tool (Windows)

- CYSmart Mobile, Bluetooth LE test and debug tool (Android/iOS Mobile App) Knowledge base article

- KBA97095 - EZ-Bluetooth LE module placement

- TBD - TBD

- KBA213976 - FAQ for Bluetooth LE and regulatory certifications with EZ-BLE modules

- KBA210802 - Queries on Bluetooth LE qualification and declaration processes

- KBA218122 - 3D Model Files for EZ-BLE/EZ-BT modules

- TBD - Platform files for CYBLE-343072-EVAL and CYBLE-333074-EVAL

- KBA223428 - Programming an EZ-BT WICED module Note 1. Connection range tested module-to-module in full line-of-sight environment, free of obstacles or interfer-

ence sources with output power of +12.0 dBm. Actual range will vary based on end product design, environ-

ment, receive sensitivity, and transmit output power of the central device. Preliminary Datasheet 2 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Development environments Developmen t envi ronments ModusToolbox software is a modern, extensible development environment supporting a wide range of Infineon microcontroller devices. It provides a flexible set of tools and a diverse, high-quality collection of appli-

cation-focused software. These include configuration tools, low-level drivers, libraries, and operating system support, most of which are compatible with Linux, macOS, and Windows-hosted environments. Modus-

Toolbox software does not include proprietary tools or custom build environments. This means you choose your compiler, your IDE, your RTOS, and your ecosystem without compromising usability or access to our industry leading CAPSENSE, AIROC, Bluetooth, Wi-Fi, security, and low-power features. Technical support Cypress community: Whether you are a customer, partner, or a developer interested in the latest innovations, the developer community offers you a place to learn, share, and engage with both Infineon experts and other embedded engineers around the world. Frequently asked questions (FAQs): Learn more about our Bluetooth ecosystem. Visit our support page and create a technical support case or contact a local sales representatives. If you are in the United States, you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 2 at the prompt. Preliminary Datasheet 3 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Contents Contents General description ...........................................................................................................................1 Module description............................................................................................................................1 Power consumption...........................................................................................................................1 Functional capabilities.......................................................................................................................1 Benefits............................................................................................................................................2 More information ..............................................................................................................................2 References........................................................................................................................................2 Development environments ...............................................................................................................3 Technical support..............................................................................................................................3 Contents...........................................................................................................................................4 1 Overview .......................................................................................................................................6 1.1 Functional block diagram.......................................................................................................................................6 1.2 Module description .................................................................................................................................................6 1.2.1 Module dimensions and drawing........................................................................................................................6 2 Pad connection interface.................................................................................................................8 3 Recommended host PCB layout......................................................................................................10 4 Module connections ......................................................................................................................14 5 Connections and optional external components..............................................................................17 5.1 Power connections (VDDIN) .................................................................................................................................17 5.2 External reset (XRES) ............................................................................................................................................17 5.3 Critical components list........................................................................................................................................19 5.4 Antenna design .....................................................................................................................................................20 6 Functional description ..................................................................................................................21 6.1 Bluetooth baseband core ...................................................................................................................................21 6.1.1 Link control layer ...............................................................................................................................................21 6.1.2 Test mode support.............................................................................................................................................22 6.1.3 Frequency hopping generator ..........................................................................................................................22 6.2 Microcontroller unit ..............................................................................................................................................22 6.2.1 Floating point unit .............................................................................................................................................22 6.2.2 OTP memory ......................................................................................................................................................22 6.2.3 NVRAM configuration data and storage............................................................................................................22 6.2.4 Power-on reset (POR) ........................................................................................................................................23 6.3 External reset (XRES) ............................................................................................................................................23 6.3.1 Brownout detection...........................................................................................................................................23 7 Integrated radio transceiver ..........................................................................................................24 7.1 Transmitter path...................................................................................................................................................24 7.1.1 Digital modulator...............................................................................................................................................24 7.1.2 Power amplifier..................................................................................................................................................24 7.2 Receiver path ........................................................................................................................................................24 7.2.1 Digital demodulator and bit synchronizer........................................................................................................24 7.2.2 Receiver signal strength indicator ....................................................................................................................24 7.3 Local oscillator generation...................................................................................................................................24 7.4 Calibration.............................................................................................................................................................24 8 Peripheral and communication interfaces ......................................................................................25 8.1 I2C communication interface...............................................................................................................................25 8.2 HCI UART interface................................................................................................................................................25 8.3 Triac control ..........................................................................................................................................................26 8.4 Peripheral UART interface ....................................................................................................................................26 8.5 Serial peripheral interface....................................................................................................................................26 8.6 Infrared modulator ...............................................................................................................................................27 8.7 PDM microphone ..................................................................................................................................................27 Preliminary Datasheet 4 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Contents 8.8 Security engine .....................................................................................................................................................27 9 Keyboard scanner .........................................................................................................................29 9.1 Theory of operation ..............................................................................................................................................29 9.1.1 Idle ......................................................................................................................................................................29 9.1.2 Scan ....................................................................................................................................................................29 9.1.3 Scan End.............................................................................................................................................................29 9.2 Mouse quadrature signal decoder .......................................................................................................................29 9.3 Theory of operation ..............................................................................................................................................30 9.4 ADC port ................................................................................................................................................................30 10 Clock frequencies........................................................................................................................31 11 GPIO port ...................................................................................................................................32 12 PWM...........................................................................................................................................33 13 Power management unit .............................................................................................................34 13.1 RF power management ......................................................................................................................................34 13.2 Host controller power management .................................................................................................................34 13.3 BBC power management....................................................................................................................................34 14 Electrical characteristics .............................................................................................................35 15 Chipset RF specifications .............................................................................................................36 16 Timing and AC characteristics ......................................................................................................38 16.1 UART timing ........................................................................................................................................................38 16.2 SPI timing ............................................................................................................................................................39 16.3 I2C interface timing.............................................................................................................................................41 17 Environmental specifications.......................................................................................................44 17.1 Environmental compliance ................................................................................................................................44 17.2 RF certification ....................................................................................................................................................44 17.3 Safety certification..............................................................................................................................................44 17.4 Environmental conditions..................................................................................................................................44 17.5 ESD and EMI protection ......................................................................................................................................44 18 Regulatory information ...............................................................................................................45 18.1 FCC.......................................................................................................................................................................45 18.2 ISED......................................................................................................................................................................46 18.3 European declaration of conformity..................................................................................................................47 18.4 MIC Japan............................................................................................................................................................48 19 Packaging ..................................................................................................................................49 20 Ordering information ..................................................................................................................51 21 Acronyms ...................................................................................................................................52 22 Document conventions................................................................................................................56 22.1 Units of measure .................................................................................................................................................56 Revision History ..............................................................................................................................57 Preliminary Datasheet 5 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Overview 1 Overview 1.1 Functional block diagram Figure 1 illustrates the CYBLE-3x307x-02 functional block diagram. XRES UART SPI 12C PCM/12S ADC UPto6PWMs UPto24 GPIOs 32kHzLPO_In

(Optional) 1xMIPIDMIC interface CYW20835 Silicon Device Passive Components

(RES, CAP, IND) 512 KB SERIAL FLASH 24 MHz XTAL Figure 1 Functional block diagram (GPIOs) 1.2 The CYBLE-3x307x-02 module is a complete module designed to be soldered to the applications main board. Module description Module dimensions and drawing 1.2.1 Infineon reserves the right to select components from various vendors to achieve the Bluetooth module functionality. Such selections will still guarantee that all mechanical specifications and module certifications are maintained. Designs should be held within the physical dimensions shown in the mechanical drawings in Figure 2 on page 7. All dimensions are in millimeters (mm). Table 1 Module design dimensions Dimension item Specification Module dimensions Antenna connection location dimensions PCB thickness Shield height Maximum component height Total module thickness (bottom of module to highest component) Length (X) 13.31 0.15 mm Width (Y) 21.89 0.15 mm Length (X) 13.31 mm Width (Y) 4.65 mm Height (H) 0.50 0.05 mm Height (H) 1.45-mm typical Height (H) 1.45-mm typical Height (H) 1.95-mm typical Preliminary Datasheet 6 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Overview See Figure 2 for the mechanical reference drawing for CYBLE-3x307x-02. Figure 2 Module mechanical drawing Notes 2. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on recommended host PCB layout, see Recommended host PCB layout on page 10. 3. The CYBLE-343072-02, CYBLE-333073-02, CYBLE-333074-02 includes castellated pad connections, denoted as the circular openings at the pad location above. Preliminary Datasheet 7 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Pad connection interface 2 Pad connection interface As shown in the bottom view of Figure 2 on page 7, the CYBLE-3x307x-02 connects to the host board via solder pads on the backside of the module. Table 2 and Figure 3 detail the solder pad length, width, and pitch dimen-

sions of the CYBLE-3x307x-02 module. Table 2 Connection description Part number Name Connections Connection type CYBLE-343072-02 CYBLE-333073-02 CYBLE-333074-02 SP SP SP 43 45 43 Solder pads Solder pads Solder pads Pad length dimension Pad width dimension 1.02 mm 1.02 mm 1.02 mm 0.61 mm 0.61 mm 0.61 mm Pad pitch 0.90 mm 0.90 mm 0.90 mm Figure 3 Solder pad dimensions (seen from bottom) To maximize RF performance, the host layout should follow these recommendations:

1. Antenna Area Keepout: The host board directly below the antenna area of the module (see Figure 2 on page 7) must not contain ground or signal traces. This keepout area requirement applies to all layers of the host board. 2. Module Placement: The ideal placement of the Bluetooth module is in a corner of the host board with the PCB trace antenna located at the far corner. This placement minimizes the additional recommended keepout area stated in item 2. Refer to AN96841 for module placement best practices. Preliminary Datasheet 8 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Pad connection interface Figure 4 Recommended host PCB keepout area around the CYBLE-3x307x-02 antenna Preliminary Datasheet 9 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Recommended host PCB layout 3 Recommended host PCB layout Figure 5, Figure 6, Figure , and Table 3 provide details that can be used for the recommended host PCB layout pattern for the CYBLE-3x307x-02. Dimensions are in millimeters unless otherwise noted. Pad length of 1.26 mm

(0.64 mm from center of the pad on either side) shown in Figure 4 is the minimum recommended host pad length. The host PCB layout pattern can be completed using either Figure 5, Figure 6, or Figure . It is not necessary to use all figures to complete the host PCB layout pattern. Figure 5 CYBLE-3x307x-02 host layout (dimensioned) Preliminary Datasheet 10 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Recommended host PCB layout Figure 6 CYBLE-3x307x-02 host layout (relative to origin) Table 3 provides the center location for each solder pad on the CYBLE-3x307x-02. All dimensions are referenced to the center of the solder pad. Refer to Figure 7 for the location of each module solder pad. Table 3 Module solder pad location Solder pad

(center of pad) Location (X,Y) from origin (mm) Dimension from origin (mils) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

(0.38, 7.21)

(0.38, 8.12)

(0.38, 9.02)

(0.38, 9.92)

(0.38, 10.82)

(0.38, 11.72)

(0.38, 12.62)

(0.38, 13.53)

(0.38, 14.43)

(0.38, 15.33)

(0.38, 16.23)

(0.38, 17.13)

(0.38, 18.03)

(0.38, 18.94)

(0.38, 19.84)

(1.24, 21.51)

(14.96, 283.86)

(14.96, 319.68)

(14.96, 355.12)

(14.96, 390.55)

(14.96, 425.98)

(14.96, 461.42)

(14.96, 496.85)

(14.96, 532.68)

(14.96, 568.11)

(14.96, 603.54)

(14.96, 638.54)

(14.96, 674.41)

(14.96, 709.84)

(14.96, 745.67)

(14.96, 781.10)

(48.82, 846.85) Preliminary Datasheet 11 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Recommended host PCB layout Table 3 Module solder pad location (continued) Solder pad

(center of pad) Location (X,Y) from origin (mm) Dimension from origin (mils) 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

(2.15, 21.51)

(3.05, 21.51)

(3.95, 21.51)

(4.85, 21.51)

(5.75, 21.51)

(6.65, 21.51)

(7.56, 21.51)

(8.46, 21.51)

(9.36, 21.51)

(10.26, 21.51)

(11.16, 21.51)

(12.07, 21.51)

(12.93, 19.84)

(12.93, 18.94)

(12.93, 18.03)

(12.93, 17.13)

(12.93, 16.23)

(12.93, 15.33)

(12.93, 14.43)

(12.93, 13.53)

(12.93, 12.62)

(12.93, 11.72)

(12.93, 10.82)

(12.93, 9.92)

(12.93, 9.02)

(12.93, 8.12)

(12.93, 7.21)

(84.65, 846.85)

(120.08, 846.85)

(155.51, 846.85)

(190.94, 846.85)

(226.38, 846.85)

(261.81, 846.85)

(297.64, 846.85)

(333.07, 846.85)

(368.50, 846.85)

(403.94, 846.85)

(439.37, 846.85)

(475.20, 846.85)

(509.05, 781.10)

(509.05, 745.67)

(509.05, 709.84)

(509.05, 674.41)

(509.05, 638.98)

(509.05, 603.54)

(509.05, 568.11)

(509.05, 532.68)

(509.05, 496.85)

(509.05, 461.42)

(509.05, 425.98)

(509.05, 390.55)

(509.05, 355.12)

(509.05, 319.68)

(509.05, 283.86) Preliminary Datasheet 12 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Recommended host PCB layout Figure 7 Solder pad reference location Preliminary Datasheet 13 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Module connections 4 Module connections Table 4 details the solder pad connection definitions and available functions for the pad connections for the CYBLE-3x307x-02 module. Table 4 lists the solder pads on the CYBLE-3x307x-02 module, the silicon device pin, and denotes what functions are available for each solder pad. Table 4 Pin assignments Module pad name Pad number Silicon pin name I/O Power domain Description Microphone MIC_AVDD MIC_BIAS MIC_N MIC_P GND_A Power supply VDD Ground pins GND UART UART_CTS_N UART_RTS_N UART_RXD Microphone MIC_AVDD MICBIAS MICN MICP 24 27 25 26 I O I I MIC_AVDD Microphone supply MIC_AVDD Microphone bias supply MIC_AVDD Microphone negative input MIC_AVDD Microphone positive input 23 28 Analog ground for microphone 2 2.5V~3.6V Ground pins 1 19 22 43 HS-VSS I VSS Digital ground UART UART_CTS_N I, PU VDDO UART_RTS_N O, PU VDDO UART_RXD I VDDO 29 30 32 CTS for HCI UART interface: NC if unused. RTS for HCI UART interface. NC if unused. UART serial input. Serial data input for the HCI UART interface. UART serial input. Serial data input for the HCI UART interface. UART_TXD 31 UART_TXD O, PU VDDO Interface SPI_MISO NA NA NA Crystal NA NA XTALI_32K XTALO_32K Others NA Serial peripheral interface 33 NA NA NA SPI_MISO SPI_MOSI SPI_CSN SPI_CLK Crystal NA BT_XTALI NA 20 21 BT_XTALO XTALI_32K XTALO_32K Others NA DEFAULT_STRAP I O O O I O I O I VDDO VDDO VDDO VDDO SPI Master In Slave Out SPI Master Out Slave In SPI Chip Select SPI Clock PLLVDD1P2 Crystal oscillator input: see Crystal Oscillator on page 12 for options PLLVDD1P2 Crystal oscillator output VDDO VDDO Low-power oscillator input Low-power oscillator output VDDO Connect to VDDO Preliminary Datasheet 14 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Module connections Table 4 Pin assignments (continued) Module pad name Pad number Silicon pin name I/O Power domain Description HOST_WAKE 36 BT_HOST_WAKE O VDDO Host wake-up. This is a signal from the Bluetooth device to the host indicating that the Bluetooth device requires attention. Asserted: Host device must wake up or remain awake Deasserted: Host device may sleep when sleep awake criteria is met. The polarity of this signal is software configurable and can be asserted high or low. NA NA XRES NA NA 3 BT_RF JTAG_SEL RST_N I/O PAVDD2P5 RF antenna port I VDDO ARM JTAG debug mode control:

connect to GND for all applications Active-low system reset with open-drain output and internal pull-up resistor Table 5 GPIO pin descriptions Module pad name Pad number Silicon pin name Direction Default POR state Power domain Default alternate function description P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 10 9 34 35 37 38 39 40 41 17 P0 Input Floating VDDO GPIO: P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 A/D converter input 29 Note Not available during TM1 = 1. Input Floating VDDO GPIO: P1 A/D converter input 28 Input Input Input Input Input Input Input Floating VDDO GPIO: P2 Floating VDDO GPIO: P3 Floating VDDO GPIO: P4 Floating VDDO GPIO: P5 Floating VDDO GPIO: P6 Floating VDDO GPIO: P7 Floating VDDO GPIO: P8 Input Floating VDDO GPIO: P9 A/D converter input 27 A/D converter input 26 Notes 4. The CYBLE-3x307x-02 contains a single SPI (SPI1) peripheral supporting both master or slave configura-

tions. SPI2 is used for on-module serial memory interface. 5. In Master mode, any available GPIO can be configured as SPI1_CS. This function is not explicitly shown in Table 20. Preliminary Datasheet 15 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Module connections Table 5 GPIO pin descriptions (continued) Module pad name Pad number Silicon pin name Direction Default POR state Power domain Default alternate function description P10 P11 P12 P13 P14 P15 P16 P26 P27 16 15 14 13 42 20 18 6 5 P28 12 P29 11 P32 P34 P38 4 8 7 P10 Input Floating VDDO GPIO: P10 A/D converter input 25 P11 Input Floating VDDO GPIO: P11 A/D converter input 24 P12 Input Floating VDDO GPIO: P12 A/D converter input 23 P13 Input Floating VDDO GPIO: P13 A/D converter input 22 P14 Input Floating VDDO GPIO: P14 A/D converter input 21 P15 Input Floating VDDO GPIO: P15 A/D converter input 20 P16 Input Floating VDDO GPIO: P16 P26 PWM0 P27 PWM1 P28 PWM2 P29 PWM3 A/D converter input 19 Input Floating VDDO GPIO: P26 Current: 16 mA sink Input Floating VDDO GPIO: P27 Current: 16 mA sink Input Floating VDDO GPIO: P28 A/D converter input 11 Current: 16 mA sink Input Floating VDDO GPIO: P29 A/D converter input 10 Current: 16 mA sink P32 Input Floating VDDO GPIO: P32 P34 Input Floating VDDO GPIO: P34 A/D converter input 7 A/D converter input 5 P38 Input Floating VDDO GPIO: P38 A/D converter input 1 NA NA P39 Input Floating VDDO Reserved for system use. Leave this GPIO unconnected Preliminary Datasheet 16 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Connections and optional external components 5 Connections and optional external components Power connections (VDDIN) 5.1 The CYBLE-3x307x-02 contains one power supply connection, VDDIN, which accepts a supply input range of 2.5 V to 3.6 V for CYBLE-3x307x-02. Table 12 provides this specification. The maximum power supply ripple for this power connection is 100 mV, as shown in Table 12. It is not required to place any power supply decoupling or noise reduction circuitry on the host PCB. If desired, an external ferrite bead between the supply and the module connection can be included, but is not necessary. If used, the ferrite bead should be positioned as close as possible to the module pin connection and the recom-

mended ferrite bead value is 330 , 100 MHz. Considerations and Optional Components for Brown Out (BO) Conditions Power supply design must be completed to ensure that the CYBLE-3x307x-02 module does not encounter a Brown Out condition, which can lead to unexpected functionality, or module lock up. A Brown Out condition may be met if power supply provided to the module during power up or reset is in the following range:

VILVDDIN VIH Refer to Table 13 for the VIL and VIH specifications. System design should ensure that the condition above is not encountered when power is removed from the system. In the event that this cannot be guaranteed (that is, battery installation, high-value power capacitors with slow discharge), it is recommended that an external voltage detection device be used to prevent the Brown Out voltage range from occurring during power removal. Refer to Figure 8 for the recommended circuit design when using an external voltage detection IC. Figure 8 Reference circuit block diagram for external voltage detection IC In the event that the module does encounter a Brown Out condition, and is operating erratically or is not responsive, power cycling the module will correct this issue and once reset, the module should operate correctly. Brown Out conditions can potentially cause issues that cannot be corrected, but in general, a power-on-reset operation will correct a Brown Out condition. External reset (XRES) 5.2 The CYBLE-3x307x-02 has an integrated power-on reset circuit, which completely resets all circuits to a known power-on state. This action can also be evoked by an external reset signal, forcing it into a power-on reset state. The XRES signal is an active-low signal, which is an input to the CYBLE-3x307x-02 module (solder pad 3). The CYBLE-3x307x-02 module does not require an external pull-up resistor on the XRES input During power-on operation, the XRES connection to the CYBLE-3x307x-02 is required to be held low 50 ms after the VDD power supply input to the module is stable. This can be accomplished in the following ways:

The host device should connect a GPIO to the XRES of the CYBLE-3x307x-02 module and pull XRES low until VDD is stable. XRES is recommended to be released 50 ms after VDDIN is stable. Preliminary Datasheet 17 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Connections and optional external components If the XRES connection of the CYBLE-3x307x-02 module is not used in the application, a 10-F capacitor may be connected to the XRES solder pad of the CYBLE-3x307x-02 to delay the XRES release. The capacitor value for this recommended implementation is approximate, and the exact value may differ depending on the VDDIN power supply ramp time of the system. The capacitor value should result in an XRES release timing of 50 ms after VDDIN stability. The XRES release timing may be controlled by an external voltage detection IC. XRES should be released 50 ms after VDD is stable. Refer to Figure on page 23 for XRES operating and timing requirements during power-on events. Preliminary Datasheet 18 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Connections and optional external components Figure 9 illustrates the CYBLE-3x307x-02 schematic. Figure 9 CYBLE-3x307x-02 schematic diagram 5.3 Table 6 details the critical components used in the CYBLE-3x307x-02 module. Critical components list Table 6 Critical component list Component Reference designator description Silicon Silicon Crystal U1 U2 Y1 60-pin QFN Bluetooth/Bluetooth LE silicon device -

CYW20835 8-pin TDF8N, 512K Serial Flash 24.000 MHz, 12PF Preliminary Datasheet 19 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Connections and optional external components 5.4 Table 7 details trace antenna used in the CYBLE-3x307x-02 module. For more information, see Table 7. Antenna design Table 7 Trace antenna specifications Item Frequency range Peak gain Return loss 24002500 MHz 0.5-dBi typical 10-dB minimum Description Preliminary Datasheet 20 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Functional description 6 Functional description Bluetooth baseband core 6.1 The Bluetooth baseband core (BBC) implements all of the time-critical functions required for high-performance Bluetooth LE 5.0 operation. The BBC manages the buffering, segmentation, and routing of data for all connec-

tions. It also buffers data that passes through it, handles data flow control, schedules LL and TX/RX transactions, monitors Bluetooth LE 5.0 slot usage, optimally segments and packages data into baseband packets, manages connection status indicators, and composes and decodes HCI packets. In addition to these functions, it independently handles HCI event types, and HCI command types. Table 8 Bluetooth features Bluetooth Low Energy 4.1 Bluetooth Low Energy 4.2 Bluetooth Low Energy 5.0 Bluetooth Low Energy Data packet length extension Bluetooth LE 2 Mbps Low duty cycle advertising LE secure connection LE-HID LE master and slave Common profiles Common profiles Common profiles GATT ATT FMP HOGP HTP PXP GATT ATT FMP HOGP HTP PXP GATT, ATT MESH FMP HOGP HTP PXP Link control layer 6.1.1 The link control layer is part of the Bluetooth LE 5.0 link control functions that are implemented in dedicated logic in the link control unit (LCU). This layer consists of the command controller that takes commands from the software, and other controllers that are activated or configured by the command controller, to perform the link control tasks. Each task is performed in a different state or substate in the Bluetooth Low Energy Link Controller. Bluetooth LE states:

- Advertising

- Scanning

- Connection Major states:

- Standby

- Connection Substates:

- Page

- Page Scan

- Inquiry

- Inquiry Scan Preliminary Datasheet 21 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Functional description Test mode support 6.1.2 The CYBLE-3x307x-02 fully supports the Bluetooth Test mode as described in Part I:1 of the Specification of the Bluetooth System Version 3.0. This includes the transmitter tests, normal and delayed loopback tests, and reduced hopping sequence. In addition to the standard Bluetooth Test Mode, the CYBLE-3x307x-02 also supports enhanced testing features to simplify RF debugging and qualification and type-approval testing. These features include:

Fixed frequency carrier wave (unmodulated) transmission

- Simplifies some type-approval measurements (Japan)

- Aids in transmitter performance analysis Fixed frequency constant receiver mode

- Receiver output directed to I/O pin

- Allows for direct BER measurements using standard RF test equipment

- Facilitates spurious emissions testing for receive mode Fixed frequency constant transmission

- 8-bit fixed pattern or PRBS-9

- Enables modulated signal measurements with standard RF test equipment. Frequency hopping generator 6.1.3 The frequency hopping sequence generator selects the correct hopping channel number based on the link controller state, Bluetooth clock, and device address. Microcontroller unit 6.2 The CYW20835 microprocessor unit runs software from the link control (LC) layer up to the host controller interface (HCI). The microprocessor is a Cortex-M4 32-bit RISC processor with embedded ICE-RT debug and serial wire debug (SWD) interface units. The microprocessor also includes 2 MB of ROM memory for program storage and 384 KB of RAM for data scratch-pad. The internal ROM provides flexibility during power-on reset to enable the same device to be used in various configurations. At powerup, the lower-layer protocol stack is executed from internal ROM. External patches can be applied to the ROM-based firmware to provide flexibility for bug fixes and feature additions. The device also supports the integration of user applications and profiles. Floating point unit 6.2.1 CYW20835 includes the CM4 single precision IEEE-754 compliant floating point unit. For details, see the Cortex-M4 manual. OTP memory 6.2.2 The CYW20835 includes 2 KB of one-time programmable memory that can be used by the factory to store product-specific information. Note Use of OTP requires that a 3V supply be present at all times. 6.2.3 NVRAM contains configuration information about the customer application, including the following:

NVRAM configuration data and storage Fractional-N information BD_ADDR UART baud rate SDP service record Preliminary Datasheet 22 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Functional description File system information used for code, code patches, or data. The CYW20835 uses SPI Serial Flash for NVRAM storage. Power-on reset (POR) 6.2.4 The CYW20835 includes POR logic to allow the part to initialize correctly when power is applied. Figure 10 shows the sequence used by the CYW20835 during initialization. An small external cap may be used on RESET_N to add delay as VDDIO ramps up. External reset (XRES) 6.3 The CYBLE-3x307x-02 has an integrated power-on reset circuit that completely resets all circuits to a known power-on state. An external active low reset signal, XRES, can be used to put the CYBLE-3x307x-02 in the reset state. The XRES pin has an internal pull-up resistor and, in most applications, it does not require anything to be connected to it. Figure 10 Power-on reset timing Brownout detection 6.3.1 An external voltage detector reset IC may be used if brownout detection is required. The reset IC should release RESET_N only after the VDDO supply voltage level has been at or above a minimum operating voltage for 50 ms or longer. Preliminary Datasheet 23 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Integrated radio transceiver 7 Integrated radio transceiver The CYBLE-3x307x-02 has an integrated radio transceiver that has been optimized for use in 2.4-GHz Bluetooth wireless systems. It has been designed to provide low-power, low-cost, robust communications for applications operating in the globally available 2.4-GHz unlicensed ISM band. The CYBLE-3x307x-02 is fully compliant with the Bluetooth LE 5.0 Radio Specification and meets or exceeds the requirements to provide the highest communi-

cation link quality of service. Transmitter path 7.1 The CYBLE-3x307x-02 features a fully integrated transmitter. The baseband transmit data is GFSK modulated in the 2.4 GHz ISM band. Digital modulator 7.1.1 The digital modulator performs the data modulation and filtering required for the GFSK signal. The fully digital modulator minimizes any frequency drift or anomalies in the modulation characteristics of the transmitted signal. 7.1.2 The CYW20835 has an integrated power amplifier (PA) that can transmit up to +10 dBm for class 1 operations. Power amplifier Receiver path 7.2 The receiver path uses a low-IF scheme to downconvert the received signal for demodulation in the digital demodulator and bit synchronizer. The receiver path provides a high degree of linearity, an extended dynamic range to ensure reliable operation in the noisy 2.4 GHz ISM band. The front-end topology, with built-in out-of-band attenuation, enables the CYBLE-3x307x-02 to be used in most applications with minimal off-chip filtering. Digital demodulator and bit synchronizer 7.2.1 The digital demodulator and bit synchronizer take the low-IF received signal and perform an optimal frequency tracking and bit synchronization algorithm. Receiver signal strength indicator 7.2.2 The radio portion of the CYBLE-3x307x-02 provides a receiver signal strength indicator (RSSI) to the baseband. This enables the controller to take part in a Bluetooth power-controlled link by providing a metric of its own receiver signal strength to determine whether the transmitter should increase or decrease its output power. Local oscillator generation 7.3 The local oscillator (LO) provides fast frequency hopping (1600 hops/second) across the 39 maximum available channels. The LO generation sub-block employs an architecture for high immunity to LO pulling during PA operation. The CYBLE-3x307x-02 uses an internal loop filter. Calibration 7.4 The CYBLE-3x307x-02 radio transceiver features an automated calibration scheme that is fully self-contained in the radio. No user interaction is required during normal operation or during manufacturing to provide optimal performance. Calibration tunes the performance of all the major blocks within the radio to within 2% of optimal conditions, including gain and phase characteristics of filters, matching between key components, and key gain blocks. This takes into account process variation and temperature variation. Calibration occurs transparently during normal operation during the settling time of the hops, and calibrates for temperature variations as the device cools and heats during normal operation in its environment. Preliminary Datasheet 24 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Peripheral and communication interfaces 8 Peripheral and communication interfaces I2C communication interface 8.1 The CYBLE-3x307x-02 provides a 2-pin master I2C interface, which can be used to retrieve configuration infor-

mation from an external EEPROM or to communicate with peripherals such as track-ball or touch-pad modules, and motion tracking ICs used in mouse devices. This interface is compatible with I2C slave devices. I2C does not support multimaster capability or flexible wait-state insertion by either master or slave devices. The following transfer clock rates are supported by the I2C:

100 kHz 400 kHz 800 kHz (not a standard I2C-compatible speed.) 1 MHz (Compatibility with high-speed I2C-compatible devices is not guaranteed.) The following transfer types are supported by the I2C:

Read (Up to 8 bytes can be read) Write (Up to 8 bytes can be written) Read-then-Write (Up to 8 bytes can be read and up to 8 bytes can be written) Write-then-Read (Up to 8 bytes can be written and up to 8 bytes can be read) Hardware controls the transfers, requiring minimal firmware setup and supervision. The clock pad (I2C_SCL) and data pad 2 (I2C_SDA) are both open-drain I/O pins. Pull-up resistors, external to the CYBLE-3x307x-02, are required on both the SCL and SDA pad for proper operation. HCI UART interface 8.2 The UART physical interface is a standard, 4-wire interface (RX, TX, RTS, and CTS) with adjustable baud rates from 57600 bps to 6 Mbps. During initial boot, UART speeds may be limited to 750 kbps. The baud rate may be selected via a vendor-specific UART HCI command. The CYBLE-3x307x-02 has a 1040-byte receive FIFO and a 1040-byte transmit FIFO to support enhanced data rates. The interface supports the Bluetooth UART HCI (H4) specifi-

cation. The default baud rate for H4 is 115.2 kbaud. The UART clock default setting is 24 MHz, and can be configured to run as high as 48 MHz to support up to 6 Mbps. The baud rate of the CYBLE-3x307x-02 UART is controlled by two values. The first is a UART clock divisor (set in the DLBR register) that divides the UART clock by an integer multiple of 16. The second is a baud rate adjustment

(set in the DHBR register) that is used to specify a number of UART clock cycles to stuff in the first or second half of each bit time. Up to eight UART cycles can be inserted into the first half of each bit time, and up to eight UART clock cycles can be inserted into the end of each bit time. Table 9 contains example values to generate common baud rates with a 24 MHz UART clock. Table 9 Common baud rate examples, 24 MHz clock Baud rate (bps) Baud rate adjustment High nibble Low nibble Mode Error (%) 3M 2M 1M 921600 460800 230400 0xFF 0XFF 0X44 0x05 0x02 0x04 0xF8 0XF4 0XFF 0x05 0x02 0x04 High rate High rate Normal Normal Normal Normal Preliminary Datasheet 25 of 58 0.00 0.00 0.00 0.16 0.16 0.16 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Peripheral and communication interfaces Table 9 Common baud rate examples, 24 MHz clock (continued) Baud rate (bps) Baud rate adjustment High nibble Low nibble 115200 57600 38400 0x00 0x00 0x01 0x00 0x00 0x00 Mode Normal Normal Normal Table 10 contains example values to generate common baud rates with a 48 MHz UART clock. Table 10 Common baud rate examples, 48 MHz clock Baud rate (bps) High rate Low rate 6M 4M 3M 2M 1.5M 1M 921600 230400 115200 57600 0xFF 0xFF 0x0 0x44 0x0 0x0 0x22 0x0 0x1 0x1 0xF8 0xF4 0xFF 0xFF 0xFE 0xFD 0xFD 0xF3 0xE6 0xCC Mode High rate High rate Normal Normal Normal Normal Normal Normal Normal Normal Error (%) 0.16 0.16 0.00 Error (%) 0 0 0 0 0 0 0.16 0.16 0.08 0.04 Normally, the UART baud rate is set by a configuration record downloaded after reset. Support for changing the baud rate during normal HCI UART operation is included through a vendor-specific command that allows the host to adjust the contents of the baud rate registers. The CYBLE-3x307x-02 UART operates correctly with the host UART as long as the combined baud rate error of the two devices is within 2%. Triac control 8.3 The CYBLE-3x307x-02 includes hardware support for zero-crossing detection and trigger control for up to four triacs. The CYBLE-3x307x-02 detects zero-crossing on the AC zero detection line and uses that to provide a pulse that is offset from the zero crossing. This allows the CYBLE-3x307x-02 to be used in dimmer applications, as well as any other applications that require a control signal that is offset from an input event. The zero-crossing hardware includes an option to suppress glitches. Peripheral UART interface 8.4 The CYBLE-3x307x-02 has a second UART that may be used to interface to peripherals. This peripheral UART is accessed through the optional I/O ports, which can be configured individually and separately for each functional pin. The CYBLE-3x307x-02 can map the peripheral UART to any LHL GPIO. The peripheral UART clock is fixed at 24 MHz. Both TX and RX have a 256-byte FIFO (see Table 4 on page 14). Serial peripheral interface 8.5 The CYBLE-3x307x-02 has two independent SPI interfaces, both of which support single, dual, and quad mode SPI operations. Either interface can be a master or a slave. Each interface has a 64-byte transmit buffer and a 64-byte receive buffer. To support more flexibility for user applications, the CYBLE-3x307x-02 has optional I/O ports that can be configured individually and separately for each functional pin. The CYBLE-3x307x-02 acts as an Preliminary Datasheet 26 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Peripheral and communication interfaces SPI master device that supports 1.8 V or 3.3 V SPI slaves. The CYBLE-3x307x-02 can also act as an SPI slave device that supports a 1.8 V or 3.3 V SPI master. Note SPI voltage depends on VDDO/VDDM; therefore, it defines the type of devices that can be supported. Infrared modulator 8.6 The CYBLE-3x307x-02 includes hardware support for infrared TX. The hardware can transmit both modulated and unmodulated waveforms. For modulated waveforms, hardware inserts the desired carrier frequency into all IR transmissions. IR TX can be sourced from firmware-supplied descriptors, a programmable bit, or the peripheral UART transmitter. If descriptors are used, they include IR on/off state and the duration between 132767/s. The CYBLE-3x307x-02 IR TX firmware driver inserts this information in a hardware FIFO and makes sure that all descriptors are played out without a glitch due to under run (see Figure 11). CYBLE-3x307x-02 Figure 11 Infrared TX PDM microphone 8.7 The CYBLE-3x307x-02 accepts a -based one-bit pulse density modulation (PDM) input stream and outputs filtered samples at either 8 kHz or 16 kHz sampling rates. The PDM signal derives from an external kit that can process analog microphone signals and generate digital signals. The digital signal passes through the chip IO and MUX inputs using an aux ADC signal. The PDM shares the filter path with the aux ADC. Two types of data rates can be supported:

8 kHz 16 kHz The external digital microphone accepts a 2.4 MHz clock generated by the CYBLE-3x307x-02 and outputs a PDM signal which is registered by the PDM interface with either the rising or falling edge of the 2.4 MHz clock selectable through a programmable control bit. The design can accommodate two simultaneous PDM input channels, so stereo voice is possible. Security engine 8.8 The CYBLE-3x307x-02 includes a hardware security accelerator that greatly decreases the time required to perform typical security operations. These functions include:

Public key acceleration (PKA) cryptography AES-CTR/CBC-MAC/CCM acceleration SHA2 message hash and HMAC acceleration Preliminary Datasheet 27 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Peripheral and communication interfaces RSA encryption and decryption of modulus sizes up to 2048 bits Elliptic curve Diffie-Hellman in prime field GF(p) Generic modular math functions Preliminary Datasheet 28 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Keyboard scanner 9 Keyboard scanner The keyboard scanner is designed to autonomously sample keys and store them into buffer registers without the need for the host microcontroller to intervene. The scanner has the following features:

Ability to turn off its clock if no keys are pressed. Sequential scanning of up to 160 keys in an 8 20 matrix. Programmable number of columns from 1 to 20. Programmable number of rows from 1 to 8. 16-byte key code buffer (can be augmented by firmware). 128 kHz clock that allows scanning of full 160-key matrix in about 1.2 ms. N-key rollover with selective 2-key lockout if ghost is detected. Keys are buffered until host microcontroller has a chance to read it, or until overflow occurs. Hardware debouncing and noise/glitch filtering. Low-power consumption. Single-digit A-level sleep current. 9.1 The key scan block is controlled by a state machine with the following states: Idle, Scan, and Scan End. Theory of operation Idle 9.1.1 The state machine begins in the idle state. In this state, all column outputs are driven high. If any key is pressed, a transition occurs on one of the row inputs. This transition causes the 128 kHz clock to be enabled (if it is not already enabled by another peripheral) and the state machine to enter the scan state. Also in this state, an 8-bit row-hit register and an 8-bit key-index counter is reset to 0. Scan 9.1.2 In the scan state, a row counter counts from 0 up to a programmable number of rows minus 1. After the last row is reached, the row counter is reset and the column counter is incremented. This cycle repeats until the row and column counters are both at their respective terminal count values. At that point, the state machine moves into the Scan-End state. As the keys are being scanned, the key-index counter is incremented. This counter value is compared to the modifier key codes stored in RAM, or in the key code buffer if the key is not a modifier key. It can be used by the microprocessor as an index into a lookup table of usage codes. Also, as the nth row is scanned, the row-hit register is ORed with the current 8-bit row input values if the current column contains two or more row hits. During the scan of any column, if a key is detected at the current row, and the row-hit register indicates that a hit was detected in that same row on a previous column, then a ghost condition may have occurred, and a bit in the status register is set to indicate this. Scan End 9.1.3 This state determines whether any keys were detected while in the scan state. If yes, the state machine returns to the scan state. If no, the state machine returns to the idle state, and the 128 kHz clock request signal is made inactive. Note The microcontroller can poll the key status register. Mouse quadrature signal decoder 9.2 The mouse signal decoder is designed to autonomously sample two quadrature signals commonly generated by an optomechanical mouse. The decoder has the following features:

Three pairs of inputs for X, Y, and Z (typical scroll wheel) axis signals. Each axis has two options:

Preliminary Datasheet 29 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Keyboard scanner

- For the X axis, choose P2 or P32 as X0 and P3 or P33 as X1.

- For the Y axis, choose P4 or P34 as Y0 and P5 or P35 as Y1.

- For the Z axis, choose P6 or P36 as Z0 and P7 or P37 as Z1. Control of up to four external high-current GPIOs to power external optoelectronics:

- Turn-on and turn-off time can be staggered for each HC-GPIO to avoid simultaneous switching of high currents and having multiple high-current devices on at the same time.

- Sample time can be staggered for each axis.

- Sense of the control signal can be active high or active low.

- Control signal can be tristated for off condition or driven high or low, as appropriate. Theory of operation 9.3 The mouse decoder block has four 10-bit PWMs for controlling external quadrature devices and sampling the quadrature inputs at its core. The GPIO signals may be used to control such items as LEDs, external ICs that may emulate quadrature signals, photodiodes, and photodetectors. ADC port 9.4 The ADC block is a single switched-cap - ADC core for audio and DC measurement. It operates at the 12 MHz clock rate and has 32 DC input channels, including 28 GPIO inputs. The internal bandgap reference has 5%

accuracy without calibration. Different calibration and digital correction schemes can be applied to reduce ADC absolute error and improve measurement accuracy in DC mode. Preliminary Datasheet 30 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Clock frequencies 10 Clock frequencies The CYBLE-3x307x-02 has an integrated 24-MHz crystal on the module. There is no need to add an additional crystal oscillator. Preliminary Datasheet 31 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module GPIO port 11 GPIO port GPIO ports for this device is shown in Table 4-2. The CYBLE-3x307x-02 uses 24 general-purpose I/Os (GPIOs). All GPIOs support programmable pull-ups and are capable of driving up to 8 mA at 3.3 V or 4 mA at 1.8 V, except P26, P27, P28, and P29, which are capable of driving up to 16 mA at 3.3 V or 8 mA at 1.8 V. P28-P29, P32, P34, P38: all of these pins can be programmed as ADC inputs. Port 26-Port 29: All four of these pins are capable of sinking up to 16 mA for LEDs. These pins also have the PWM function, which can be used for LED dimming. Preliminary Datasheet 32 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module PWM 12 PWM The CYBLE-3x307x-02 has four PWMs. The PWM module consists of the following:

PWM0-5. Each of the six PWM channels contains the following registers:

- 16-bit initial value register (read/write)

- 16-bit toggle register (read/write)

- 16-bit PWM counter value register (read) PWM configuration register shared among PWM0-5 (read/write). This 18-bit register is used:

- To configure each PWM channel

- To select the clock of each PWM channel

- To change the phase of each PWM channel Figure 12 shows the structure of one PWM. Figure 12 PWM block diagram Preliminary Datasheet 33 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Power management unit 13 Power management unit The Power management unit (PMU) provides power management features that can be invoked by software through power management registers or packet-handling in the baseband core. RF power management 13.1 The BBC generates power-down control signals for the transmit path, receive path, PLL, and power amplifier to the 2.4-GHz transceiver, which then processes the power-down functions accordingly. Host controller power management 13.2 Power is automatically managed by the firmware based on input device activity. As a power-saving task, the firmware controls the disabling of the on-chip regulator when in Deep Sleep (HIDOFF) mode. 13.3 There are several low-power operations for the BBC:

BBC power management Physical layer packet handling turns RF on and off dynamically within packet TX and RX. Bluetooth-specified low-power connection mode. While in these low-power connection modes, the CYBLE-3x307x-02 runs on the low power oscillator and wakes up after a predefined time period. The CYBLE-3x307x-02 automatically adjusts its power dissipation based on user activity. The following power modes are supported:

Active mode Idle mode Sleep mode HIDOFF (Deep Sleep) mode The CYBLE-3x307x-02 transitions to the next lower state after a programmable period of user inactivity. Busy mode is immediately entered when user activity resumes. In HIDOFF (Deep Sleep) mode, the CYBLE-3x307x-02 baseband and core are powered off by disabling power to VDDC_OUT and PAVDD. The VDDO domain remains powered up and will turn the remainder of the chip on when it detects user events. This mode minimizes chip power consumption and is intended for long periods of inactivity. Preliminary Datasheet 34 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Electrical characteristics 14 Electrical characteristics Table 11 shows the maximum electrical rating for voltages referenced to VDDIN pad. Table 11 Maximum electrical rating Rating VDDIN Voltage on input or output pin Operating ambient temperature range Storage temperature range Symbol Topr Tstg Value 3.795 VSS 0.3 to VDD + 0.3 30 to +85 40 to +85 Unit V C Table 12 shows the power supply characteristics for the range TJ = 0 to 125 C. Table 12 Power supply Parameter VDDIN VDDIN_RIPPLE Description Power supply input (CYBLE-3x307x-02) Maximum power supply ripple for VDDIN input voltage Min[6]

2.5 Typ Max[6]

3.6 100 Unit V mV Table 13 shows the specifications for the digital voltage levels. Table 13 Digital Voltage Levels Characteristics Symbol Input low voltage Input high voltage Output low voltage Output high voltage Input capacitance (VDDMEM domain) VIL VIH VOL VOH CIN Table 14 shows the current consumption measurements Table 14 Bluetooth LE current consumption Min 2.0 VDDIN 0.4 Typ Max Unit 0.8 0.4 0.4 V pF Operational mode Conditions Typ Unit Receiving Receiver and baseband are both operating, 100% ON. Transmitting@12 dBm Transmitter and baseband are both operating, 100% ON. Advertising Scanning Connecting 1.28s direct advertising in low power idle mode TBD 1-second connection interval in low power idle mode HIDOFF (Deep Sleep) 8 18 30 TBD 25 1 mA A mA A Note 6. Overall performance degrades beyond minimum and maximum supply voltages.The voltage range speci-

fied is determined by the minimum and maximum operating voltage of the SPI Serial Flash included on the module. Preliminary Datasheet 35 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Chipset RF specifications 15 Chipset RF specifications All specifications in Table 15 are for industrial temperatures and are single-ended. Unused inputs are left open. Table 15 Receiver RF Specifications Parameter Min Typ[7]

Max Unit Frequency range RX sensitivity[8]

Maximum input TBD 30 MHz2000 MHz 20002399 MHz 24983000 MHz 3000 MHz12.75 GHz Intermodulation performance[10]

BT, Df = 4 MHz Spurious Emissions[11]

30 MHz to 1 GHz 1 GHz to 12.75 GHz 65 MHz to 108 MHz 746 MHz to 764 MHz 851894 MHz 925960 MHz 18051880 MHz 19301990 MHz 21102170 MHz Conditions General GFSK, 1 Mbps Interference performance 2402 Out-of-band blocking performance (CW)[9]

0.1% BER 0.1% BER 0.1% BER 0.1% BER FM RX CDMA CDMA EDGE/GSM EDGE/GSM PCS WCDMA 39.0 91.5 10.0 27 27 10.0 147 147 147 147 147 147 147 2480 20 MHz dBm dBm dBm dBm dBm/Hz 62 47 Notes 7. Typical operating conditions are 1.22-V operating voltage and 25C ambient temperature. 8. The receiver sensitivity is measured at BER of 0.1% on the device interface. 9. Meets this specification using front-end band pass filter. 10.f0=64 dBm Bluetooth-modulated signal, f1=39 dBm sine wave, f2=39 dBm Bluetooth-modulated signal, f0=2f1f2, and |f2 f1|=n*1MHz, where n is 3, 4, or 5. For the typical case, n = 4. 11.Includes baseband radiated emissions. Preliminary Datasheet 36 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Chipset RF specifications Table 16 Transmitter RF Specifications (TBD) Parameter Conditions Min Typ Max Unit General Frequency range Class 1: GFSK TX power Power control step Out-of-Band Spurious Emissions 30 MHz to 1 GHz 1 GHz to 12.75 GHz 1.8 GHz to 1.9 GHz 5.15 GHz to 5.3 GHz Notes 12.Maximum value is the value required for Bluetooth qualification. 13.Meets this spec using a front-end band-pass filter. Table 17 Bluetooth LE RF Specifications Parameter Frequency range RX sense[14]

TX power Mod Char: Delta F1 average Mod Char: Delta F2 max[15]

Mod Char: Ratio Conditions N/A GFSK, 0.1% BER, 1 Mbps N/A N/A N/A N/A 2402 2 Min 2402 225 99.9 0.8 10 4 2480 8 36.0[12]

30.0[13]

47.0 47.0 Typ 94.5 12 255 0.95 Max 2480 275 MHz dBm dB dBm Unit MHz dBm kHz

Notes 14.Dirty TX is OFF. 15.At least 99.9% of all delta F2 max frequency values recorded over 10 packets must be greater than 185 kHz. Preliminary Datasheet 37 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Timing and AC characteristics 16 Timing and AC characteristics In this section, use the numbers listed in the Reference column of each table to interpret the following timing diagrams. 16.1 Table 18 UART timing UART timing specifications Reference Characteristics 1 2 3 Delay time, UART_CTS_N low to UART_TXD valid Setup time, UART_CTS_N high before midpoint of stop bit Delay time, midpoint of stop bit to UART_RTS_N high Min Max 1.50 0.67 1.33 Unit Baud periods Figure 13 UART timing Preliminary Datasheet 38 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Timing and AC characteristics SPI timing 16.2 The SPI interface supports clock speeds up to 12 MHz Table 19 and Figure 14 show the timing requirements when operating in SPI Mode 0 and 2, and SPI Mode 1 and 3, respectively. Table 19 SPI mode 0 and 2 Reference Characteristics Min Max Unit 1 2 3 4 5 6 7 8 Time from slave assert SPI_INT to master assert SPI_CSN

(DirectRead) Time from master assert SPI_CSN to slave assert SPI_INT

(DirectWrite) Time from master assert SPI_CSN to first clock edge Setup time for MOSI data lines Hold time for MOSI data lines Time from last sample on MOSI/MISO to slave deassert SPI_INT Time from slave deassert SPI_INT to master deassert SPI_CSN 0 0 20 8 8 0 0 Idle time between subsequent SPI transactions 1 SCK SPI_CSN SPI_INT

(DirectWrite) SPI_INT

(DirectRead) SPI_CLK

(Mode 0) SPI_CLK

(Mode 2) 1 2 ns SCK SCK 100 5 3 4 SPI_MOSI First Bit Second Bit Last bit SPI_MISO Not Driven First Bit Second Bit Last bit Not Driven Figure 14 SPI timing mode 0 and 2 Preliminary Datasheet 39 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Timing and AC characteristics Table 20 and Figure 15 show the timing requirements when operating in SPI Mode 1 and 3. Table 20 SPI mode 1 and 3 Reference Characteristics Min Max Unit 1 2 3 4 5 Time from master assert SPI_CSN to first clock edge Hold time for MOSI data lines Time from last sample on MOSI/MISO to slave deassert SPI_INT Time from slave deassert SPI_INT to master deassert SPI_CSN Idle time between subsequent SPI transactions 45 12 0 0 1 SCK SCK 100 ns SPI_CSN SPI_INT

(DirectWrite) SPI_INT

(DirectRead) SPI_CLK

(Mode 1) SPI_CLK

(Mode 3) 1 2 5 3 4 SPI_MOSI Invalid bit First bit Last bit SPI_MISO Not Driven Invalid bit First bit Last bit Not Driven Figure 15 SPI timing mode 1 and 3 Preliminary Datasheet 40 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Timing and AC characteristics 16.3 Table 21 I2C interface timing I2C Interface Timing Specifications Reference Characteristics 1 2 3 4 5 6 7 8 9 10 Clock frequency START condition setup time START condition hold time Clock low time Clock high time Data input hold time[16]

Data input setup time STOP condition setup time Output valid from clock Bus free time[17]

Unit kHz ns Min 650 280 650 280 0 100 280 650 Max 100 400 800 1000 400 Notes 16.As a transmitter, 125 ns of delay is provided to bridge the undefined region of the falling edge of SCL to avoid unintended generation of START or STOP conditions. 17.Time that the bus must be free before a new transaction can start. Figure 16 I2C Interface timing diagram Preliminary Datasheet 41 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Timing and AC characteristics Table 22 Timing for I2S transmitters and receivers Transmitter Receiver Lower limit Upper limit Lower limit Upper limit Notes Clock Period T HIGH tHC LOWtLC HIGH tHC LOW tLC Rise time tRC Delay tdtr Hold time thtr Min Ttr Max Min Max Min Tr Max Master mode: Clock generated by transmitter or receiver 0.35Ttr 0.35Ttr Slave mode: Clock accepted by transmitter or receiver 0.35Ttr 0.35Ttr 0 0.35Ttr 0.35Ttr 0.15Ttr Transmitter 0.8T Receiver 0.35Ttr 0.35Ttr Min Max 18 19 19 20 20 21 22 21 Setup time tsr Hold time thr Notes 18.The system clock period T must be greater than Ttr and Tr because both the transmitter and receiver have 0.2Tr 0 23 22 to be able to handle the data transfer rate. 19.At all data rates in master mode, the transmitter or receiver generates a clock signal with a fixed mark/space ratio. For this reason, tHC and tLC are specified with respect to T. 20.In slave mode, the transmitter and receiver need a clock signal with minimum HIGH and LOW periods so that they can detect the signal. So long as the minimum periods are greater than 0.35Tr, any clock that meets the requirements can be used. 21.Because the delay (tdtr) and the maximum transmitter speed (defined by Ttr) are related, a fast transmitter driven by a slow clock edge can result in tdtr not exceeding tRC which means thtr becomes zero or negative. Therefore, the transmitter has to guarantee that thtr is greater than or equal to zero, so long as the clock rise-time tRC is not more than tRCmax, where tRCmax is not less than 0.15Ttr. 22.To allow data to be clocked out on a falling edge, the delay is specified with respect to the rising edge of the clock signal and T, always giving the receiver sufficient setup time. 23.The data setup and hold time must not be less than the specified receiver setup and hold time. Note The time periods specified in Figure 17 and Figure 18 are defined by the transmitter speed. The receiver specifications must match transmitter performance. Preliminary Datasheet 42 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Timing and AC characteristics Figure 17 I2S transmitter timing Figure 18 I2S receiver timing Preliminary Datasheet 43 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Environmental specifications 17 Environmental specifications Environmental compliance 17.1 This CYBLE-3x307x-02 Bluetooth LE module is produced in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen-Free (HF) directives. The Infineon module and components used to produce this module are RoHS and HF compliant. RF certification 17.2 The CYBLE-3x307x-02 module will be certified under the following RF certification standards at production release. FCC: TBD CE IC: TBD MIC: TBD 17.3 The CYBLE-3x307x-02 module complies with the following safety regulations:

Safety certification Underwriters Laboratories, Inc. (UL): Filing E331901 CSA TUV 17.4 Table 23 describes the operating and storage conditions for the Bluetooth LE module. Environmental conditions Table 23 Environmental conditions for CYBLE-3x307x-02 Description Minimum specification Maximum specification Operating temperature Operating humidity (relative, non-condensation) Thermal ramp rate Storage temperature Storage temperature and humidity ESD: Module integrated into end system Components[24]

Note 24.This does not apply to the RF pins (ANT). 30 C 5%

40 C 85 C 85%

3 C/minute 85 C 85 C at 85%

15 kV Air 2.0 kV Contact ESD and EMI protection 17.5 Exposed components require special attention to ESD and electromagnetic interference (EMI). A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance. Any openings in the enclosure near the module should be surrounded by a grounded conductive layer to provide ESD protection and a low-impedance path to ground. Device handling: Proper ESD protocol must be followed in manufacturing to ensure component reliability. Preliminary Datasheet 44 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Regulatory information 18 Regulatory information FCC 18.1 FCC NOTICE:

The device CYBLE-3x307x-02 complies with Part 15 of the FCC Rules. The device meets the requirements for modular transmitter approval as detailed in FCC public Notice DA00-1407.transmitter Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation. CAUTION:

The FCC requires the user to be notified that any changes or modifications made to this device that are not expressly approved by Infineon may void the user's authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communica-

tions. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help This module is only FCC authorized for the specific rule FCC 15.247 listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification, final host product requires Part 15 Subpart B compliance testing with the modular transmitter installed. LABELING REQUIREMENTS:

The Original Equipment Manufacturer (OEM) must ensure that FCC labeling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Infineon FCC identifier for this product as well as the FCC Notice above. The FCC identifier is FCC ID: WAP3072. In any case the end product must be labeled exterior with Contains FCC ID: WAP3072. ANTENNA WARNING:

This device is tested with a standard SMA connector and with the antenna listed in Table 7 on page 20. When integrated in the OEMs product, these fixed antennas require installation preventing end-users from replacing them with non-approved antennas. Any antenna not in the following table must be tested to comply with FCC Section 15.203 for unique antenna connectors and Section 15.247 for emissions. Preliminary Datasheet 45 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Regulatory information RF EXPOSURE:

To comply with FCC RF Exposure requirements, the Original Equipment Manufacturer (OEM) must ensure to install the approved antenna in the previous. The preceding statement must be included as a CAUTION statement in manuals, for products operating with the approved antenna in Table 7, to alert users on FCC RF Exposure compliance. Any notification to the end user of installation or removal instructions about the integrated radio module is not allowed. The radiated output power of CYBLE-3x307x-02 with the trace antenna is far below the FCC radio frequency exposure limits. Nevertheless, use CYBLE-3x307x-02 in such a manner that minimizes the potential for human contact during normal operation. End users may not be provided with the module installation instructions. OEM integrators and end users must be provided with transmitter operating conditions for satisfying RF exposure compliance. ISED 18.2 Innovation, Science and Economic Development Canada (ISED) Certification CYBLE-3x307x-02 is licensed to meet the regulatory requirements of Innovation, Science and Economic Devel-

opment Canada (ISED), License: IC: 7922A-3072 Manufacturers of mobile, fixed, or portable devices incorporating this module are advised to clarify any regulatory questions and ensure compliance for SAR and/or RF exposure limits. Users can obtain Canadian infor-

mation on RF exposure and compliance from www.ic.gc.ca. This device has been designed to operate with the antennas listed in Table 7 on page 20, having a maximum gain of 0.5 dBi. Antennas not included in this list or having a gain greater than 0.5 dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms. The antenna used for this transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. ISED NOTICE:

The device CYBLE-3x307x-02 including the built-in trace antenna complies with Canada RSS-GEN Rules. The device meets the requirements for modular transmitter approval as detailed in RSS-GEN. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation. L'appareil CYBLE-3x307x-02, y compris l'antenne intgre, est conforme aux Rgles RSS-GEN de Canada. L'appareil rpond aux exigences d'approbation de l'metteur modulaire tel que dcrit dans RSS-GEN. L'opration est soumise aux deux conditions suivantes: (1) Cet appareil ne doit pas causer d'interfrences nuisibles, et (2) Cet appareil doit accepter toute interfrence reue, y compris les interfrences pouvant entraner un fonctionnement indsirable. ISED INTERFERENCE STATEMENT FOR CANADA This device complies with Innovation, Science and Economic Development (ISED) Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and

(2) this device must accept any interference, including interference that may cause undesired operation of the device. Preliminary Datasheet 46 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Regulatory information Cet appareil est conforme la norme sur l'innovation, la science et le dveloppement conomique (ISED) norme RSS exempte de licence. L'exploitation est autorise aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement. ISED RADIATION EXPOSURE STATEMENT FOR CANADA This equipment complies with ISED radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with a minimum distance of 15 mm between the radiator and your body. Cet quipement est conforme aux limites d'exposition aux radiations ISED prvues pour un environnement incontrl. Cet quipement doit tre install et utilis avec un minimum de 15 mm de distance entre la source de rayonnement et votre corps. LABELING REQUIREMENTS:

The Original Equipment Manufacturer (OEM) must ensure that ISED labeling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Infineon IC identifier for this product as well as the ISED Notices above. The IC identifier is TBD. In any case, the end product must be labeled in its exterior with Contains IC: TBD European declaration of conformity 18.3 Hereby, Infineon declares that the Bluetooth module CYBLE-3x307x-02 complies with the essential require-

ments and other relevant provisions of Directive 2014. As a result of the conformity assessment procedure described in Annex III of the Directive 2014, the end-customer equipment should be labeled as follows:

All versions of the CYBLE-3x307x-02 in the specified reference design can be used in the following countries:

Austria, Belgium, Cyprus, Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Poland, Portugal, Slovakia, Slovenia, Spain, Sweden, The Netherlands, the United Kingdom, Switzerland, and Norway. Preliminary Datasheet 47 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Regulatory information MIC Japan 18.4 CYBLE-3x307x-02 is certified as a module with certification number 203-JNxxxx. End products that integrate CYBLE-3x307x-02 do not need additional MIC Japan certification for the end product. End product can display the certification label of the embedded module. TBD Figure 19 MIC label Preliminary Datasheet 48 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Packaging 19 Packaging Table 24 Solder Reflow peak temperature Module part number Package Maximum peak temperature Maximum time at peak temperature No. of cycles CYBLE-343072-02 43-pad SMT CYBLE-333073-02 45-pad SMT CYBLE-333074-02 43-pad SMT 260 C 260 C 260 C 30 seconds 30 seconds 30 seconds 2 2 2 Table 25 Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2 Module part number CYBLE-343072-02 CYBLE-333073-02 CYBLE-333074-02 Package 43-pad SMT 45-pad SMT 43-pad SMT MSL MSL 3 MSL 3 MSL 3 The CYBLE-3x307x-02 is offered in tape and reel packaging. Figure 20 details the tape dimensions used for the CYBLE-3x307x-02. Figure 20 CYBLE-3x307x-02 tape dimensions Figure 21 details the orientation of the CYBLE-3x307x-02 in the tape as well as the direction for unreeling. Figure 21 Component orientation in tape and unreeling direction Preliminary Datasheet 49 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Packaging Figure 22 details reel dimensions used for the CYBLE-3x307x-02. Figure 22 Reel dimensions The CYBLE-3x307x-02 is designed to be used with pick-and-place equipment in an SMT manufacturing environment. The center-of-mass for the CYBLE-3x307x-02 is detailed in Figure 23. TBD Figure 23 CYBLE-3x307x-02 center of mass Preliminary Datasheet 50 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Ordering information 20 Ordering information Table 26 lists the CYBLE-3x307x-02 part number and features. Table 27 lists the reel shipment quantities for the CYBLE-3x307x-02. Table 26 Ordering information Part number CPU speed

(MHz) Flash size

(KB) RAM size

(KB) UART I2C

(BSC) PWM Antenna Package Packaging CYBLE-343072-02 CYBLE-333073-02 CYBLE-333074-02 96 96 96 512 512 512 384 384 384 Yes Yes Yes Yes Yes Yes 6 6 6 Trace Pad u.FL 43-SMT 45-SMT 43-SMT Tape and reel Tape and reel Tape and reel Table 27 Tape and reel package quantity and minimum order amount Description Reel quantity Minimum order quantity

(MOQ) Order increment (OI) Minimum reel quantity Maximum reel quantity Comments 500 500 500 500 Ships in 500 unit reel quantities. The CYBLE-3x307x-02 is offered in tape and reel packaging. The CYBLE-3x307x-02 ships in a reel size of 500. For additional information and a complete list of Infineon Wireless products, contact your local Infineon sales representative. To locate the nearest Infineon office, visit our website. U.S. headquarters address U.S. headquarter contact info Website address 198 Champion Court, San Jose, CA 95134

(408) 943-2600 https://www.cypress.com Preliminary Datasheet 51 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Acronyms 21 Acronyms Table 28 Acronyms used in this document Acronym ADC ADV ALU analog-to-digital converter advertising arithmetic logic unit Description AMUXBUS analog multiplexer bus API Arm BLE application programming interface advanced RISC machine, a CPU architecture Bluetooth Low Energy Bluetooth SIG Bluetooth Special Interest Group BW CAN CE CMRR CPU CRC CSA ECC ECO bandwidth Controller Area Network, a communications protocol European Conformity common-mode rejection ratio central processing unit cyclic redundancy check, an error-checking protocol Canadian Standards Association error correcting code external crystal oscillator EEPROM electrically erasable programmable read-only memory EMI EMIF EOC EOF ESD FCC FET FIR FPB FS GPIO HCI HVI I/O electromagnetic interference external memory interface end of conversion end of frame electrostatic discharge Federal Communications Commission field-effect transistor finite impulse response, see also IIR flash patch and breakpoint full-speed general-purpose input/output, applies to a PSoC pin host controller interface high-voltage interrupt, see also LVI, LVD input/output, see also GPIO, DIO, SIO, USBIO I2C, or IIC Inter-Integrated Circuit, a communications protocol IC IC IDAC IDE IIR integrated circuit Industry Canada current DAC, see also DAC, VDAC integrated development environment infinite impulse response, see also FIR Preliminary Datasheet 52 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Acronyms Table 28 Acronyms used in this document (continued) Acronym Description ILO IMO INL IPOR IPSR IRQ ITM KC LCD LIN LNA LR LUT LVD LVI internal low-speed oscillator, see also IMO internal main oscillator, see also ILO integral nonlinearity, see also DNL initial power-on reset interrupt program status register interrupt request instrumentation trace macrocell Korea Certification liquid crystal display Local Interconnect Network, a communications protocol. low noise amplifier link register lookup table low-voltage detect, see also LVI low-voltage interrupt, see also HVI LVTTL low-voltage transistor-transistor logic MAC MCU MIC MISO NC NMI NRZ NVIC NVL multiply-accumulate microcontroller unit Ministry of Internal Affairs and Communications (Japan) master-in slave-out no connect nonmaskable interrupt non-return-to-zero nested vectored interrupt controller nonvolatile latch, see also WOL Opamp operational amplifier PA PAL PC PCB PGA PHUB PHY PICU PLA PLD PLL PMDD POR PRES power amplifier programmable array logic, see also PLD program counter printed circuit board programmable gain amplifier peripheral hub physical layer port interrupt control unit programmable logic array programmable logic device, see also PAL phase-locked loop package material declaration data sheet power-on reset precise power-on reset Preliminary Datasheet 53 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Acronyms Table 28 Acronyms used in this document (continued) Acronym Description PRS PS PSoC PSRR PWM QDID RAM RISC RMS RTC RTL RTR RX S/H SAR SC/CT SCL SDA SINAD SIO SMT SOC SOF SPI SR SRAM SRES STN SWD SWV TD THD TIA TN TRM TTL TUV TX pseudo random sequence port read data register Programmable System-on-Chip power supply rejection ratio pulse-width modulator qualification design ID random-access memory reduced-instruction-set computing root-mean-square real-time clock register transfer language remote transmission request receive sample and hold successive approximation register switched capacitor/continuous time I2C serial clock I2C serial data signal to noise and distortion ratio special input/output, GPIO with advanced features. See GPIO. surface-mount technology; a method for producing electronic circuitry in which the compo-

nents are placed directly onto the surface of PCBs start of conversion start of frame Serial Peripheral Interface, a communications protocol slew rate static random access memory software reset super twisted nematic serial wire debug, a test protocol single-wire viewer transaction descriptor, see also DMA total harmonic distortion transimpedance amplifier twisted nematic technical reference manual transistor-transistor logic Germany: Technischer berwachungs-Verein (Technical Inspection Association) transmit UART Universal Asynchronous Transmitter Receiver, a communications protocol Preliminary Datasheet 54 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Acronyms Table 28 Acronyms used in this document (continued) Acronym Description UDB USB USBIO VDAC WDT WOL WRES XRES XTAL universal digital block Universal Serial Bus USB input/output, PSoC pins used to connect to a USB port voltage DAC, see also DAC, IDAC watchdog timer write once latch, see also NVL watchdog timer reset external reset I/O pin crystal Preliminary Datasheet 55 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Document conventions 22 22.1 Table 29 Document conventions Units of measure Units of measure Symbol Unit of Measure C dB dBm fF Hz KB kbps Khr kHz k ksps LSB Mbps MHz M Msps A F H s V W mA ms mV nA ns nV pF ppm ps s sps sqrtHz V degrees Celsius decibel decibel-milliwatts femtofarads hertz 1024 bytes kilobits per second kilohour kilohertz kilo ohm kilosamples per second least significant bit megabits per second megahertz mega-ohm megasamples per second microampere microfarad microhenry microsecond microvolt microwatt milliampere millisecond millivolt nanoampere nanosecond nanovolt ohm picofarad parts per million picosecond second samples per second square root of hertz volt Preliminary Datasheet 56 of 58 002-33419 Rev. **

2021-07-22 AIROC Bluetooth LE module Revision History Revision History Document version Date of release

2021-07-22 Initial release Description of changes Preliminary Datasheet 57 of 58 002-33419 Rev. **

2021-07-22 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2021-07-22 Published by Infineon Technologies AG 81726 Munich, Germany 2021 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document?

Go to www.cypress.com/support Document reference 002-33419 Rev. **

IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (Beschaffenheitsgarantie). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customers compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customers products and any use of the product of Infineon Technologies in customers applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customers technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office

(www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. representatives of

CYBLE-343072-02 FCC ID:WAP3072 IC:7922A-3072 CYBLE-333073-02 FCC ID:WAP3072 IC:7922A-3072 CYBLE-333074-02 FCC ID:WAP3072 IC:7922A-3072 CYBLE-343176-02 FCC ID:WAP3072 IC:7922A-3072 203-JNXXXX 203-JNXXXX 203-JNXXXX 203-JNXXXX

Cypress Semiconductor Date2021-08-27 Federal Communications Commission Authorization and Evaluation Division FCC ID: WAP3072 Confidentiality Request Pursuant to Sections 0.457 and 0.459 of the Commissions Rules, the Applicant hereby requests confidential treatment of information accompanying this Application as outlined below:

1 2 3 Schematics Block Diagram Operational Description The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these matters might be harmful to the Applicant and provide unjustified benefits to its competitors. The Applicant understands that pursuant to Rule 0.457, disclosure of this Application and all accompanying documentation will not be made before the date of the Grant for this application. Sincerely, Xuejiao Zhang / xjzh@cypress.com Cypress Semiconductor

Cypress Semiconductor Cypress Semiconductor 198 Champion Court San Jose, CA 95134 United States USA We Name:

Address:

Country:

Declare that:

Agent Company name:

Address:

City:

Country DEKRA Testing and Certification (Suzhou) Co., Ltd. No.99 Hongye Rd., Suzhou Industrial Park , Suzhou China is authorized to apply for Certification of the following product(s):

AIROC Bluetooth LE Module Product description:

Type designation: CYBLE-343072-02, CYBLE-333073-02, CYBLE-333074-02, CYBLE-343176-02 Trademark:

Cypress FCC ID: WAP3072 IC ID 7922A-3072 on our behalf. Date:

2021-08-27 Name:

Xuejiao Zhang Function:

System Engineer Signature:

Notes:

Required for FCC & IC application

Difference Description Modules CYBLE-343072-02, CYBLE-333073-02 AND CYBLE-333074-02 have the same PCB, Bluetooth chip, periphery parts and the encapsulation of the main chip. The difference is the configuration of antenna:

CYBLE-343072-02, it is configured with PCB antenna on the module, antenna peak gain is -0.5 dBi. CYBLE-333073-02, it is configured with external antenna via RF pin on the bottom of the module CYBLE-333074-02, it is configured with external dipole antenna via UFL connector as below:

CYBLE-333073-02 and CYBLE-333074-02 use below antenna for certification. Manufacture Part Number Gain Pulse W1010 2.0dBi peak Module CYBLE-343176-02 shares the same PCB with CYBLE-343072-02 except that working temperature is changed from -40~85 to -40~105. Part of device P/N has changed to meet the working temperature requirement. 1 / 1

Date: 8/12/2021 Authorization letter for equipment authorization before FCC and/or IC Canada, Re: FCC ID: WAP3072 IC: 7922A-3072 To whom it may concern:

Please be advised that Cypress Semiconductor Corporation authorizes Xuejiao Zhang of Cypress Semiconductor Corporation, to act on our behalf on all matters relating to application for equipment authorization before the federal communication Commission and Industry Canada, including signing of documents related to these matters. Cypress Semiconductor Corporation, Certifies that neither the applicant nor any party to this application, as defined in 47CFR Ch.1.2002 (b), is subjected to denial to federal benefits that includes FCC benefits, pursuant to section 5301 of anti-drug abuse act of 1998, 21 U.S.C.835

(a). Sincerely Title: Senior Manager Cypress Semiconductor Corporation Phone:

Cypress Semiconductor 198 Champion Court, San Jose, CA, USA, 95134

RF_734_02 04 April 16 Modular Approval Request FCC (KDB 996369 D01 & Part 15.212) FCC ID: WAP3072 Items to be covered by Single modular transmitters. 1. The modular transmitter must have its own RF shielding. Answer from applicant YES The module contains a metal shield which covers all RF components and circuitry. The shield is located on the top of the board next to antenna connector 2. The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with Part 15 requirements under conditions of excessive data rates or over-modulation. YES Data to the modulation circuit is buffered as described in the operational description provided with the application 3. The modular transmitter must have its own power supply regulation. YES The module contains its own power supply regulation. Please refer to schematic filed with this application 4. The modular transmitter must comply with the antenna requirements of Section 15.203 and 15.204(b)(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). YES The module connects to its antenna using an UFL connector which is considered a non-

standard connector. A list of antennas tested and approved with this device may be found in users manual provided with the application 5. The modular transmitter must be tested in a stand-alone configuration, i.e., the YES module must not be inside another device during testing. This is intended to demonstrate that the module is capable of complying with Part 15 emission limits regardless of the device into which it is eventually installed. The module was tested stand-alone as shown in test setup photographs filed with this application 6. The modular transmitter must be equipped with either a permanently affixed label or must be capable of electronically displaying its FCC identification number in accordance with 15.212 (a)(1)(vi)(A) / (B). YES There is a label on the module as shown in the labeling exhibit filed with this application. Host specific labeling instructions are shown in the installation manual .filed with this application. 7. The modular transmitter must comply with any specific rule or operating requirements applicable to the transmitter and the manufacturer must provide adequate instructions along with the module to explain any such requirements. A copy of these instructions must be included in the application for equipment authorization. For example, there are very strict operational and timing requirements that must be met before a transmitter is authorized for operation under Section 15.231. For instance, data transmission is prohibited, except for operation under Section 15.231(e), in which case there are separate field strength level and timing requirements. Compliance with these requirements must be assured. 8. The module complies with FCC Part 15C requirements. Instructions to the OEM installer are provided in the installation manual filed with this application. The modular transmitter must comply with any applicable RF exposure requirements. For example, FCC Rules in Sections 1.1310, 2.1091, 2.1093, and specific Sections of Part 15, including 15.319(i), 15.407(f), 15.253(f) and 15.255(g), require that Unlicensed PCS, UNII and millimeter wave devices perform routine environmental evaluation for RF Exposure to demonstrate compliance. In addition, spread spectrum transmitters operating under Section 15.247 are required to address RF Exposure compliance. Modular transmitters approved under other Sections of Part 15, when necessary, may also need to address certain RF Exposure concerns, typically by providing specific YES YES RF_734_02 04 April 16 installation and operating instructions for users, installers and other interested parties to ensure compliance. The module meets Portable exclusion levels as shown in the RF exposure information filed with this application Items to be covered by Split modular transmitters. 1. The modular transmitter must comply with all requirements of a single modular transmitter except for items (1) & (5) of the above single modular approval requirements. Answer from applicant 2. Only the radio front end must be shielded. The physical crystal and tuning capacitors may be located external to the shielded radio elements. The interface between the split sections of the modular system must be digital with a minimum signalling amplitude of 150 mV peak-to-peak. 3. Control information and other data may be exchanged between the transmitter control elements and radio front end. 4. The sections of a split modular transmitter must be tested installed in a host device(s) similar to that which is representative of the platform(s) intended for use. 5. Manufacturers must ensure that only transmitter control elements and radio front end components that have been approved together are capable of operating together. The transmitter module must not operate unless it has verified that the installed transmitter control elements and radio front end have been authorized together. Manufacturers may use means including, but not limited to, coding in hardware and electronic signatures in software to meet these requirements, and must describe the methods in their application for equipment authorization. Note: A limited modular approval (LMA) may be granted for single or split modular transmitters that comply partially with the requirements above. Name and surname of applicant (or authorized representative): ___ Xuejiao Zhang __ Date: __2021/08/27______ ___________________________ Signature: