FN990 Family HW Design Guide 1VV0301752 Rev. 3 2022-10-07 Telit Technical Documentation FN990 Family Hardware Design Guide APPLICABILITY TABLE PRODUCTS Description FN990A28 FN990A40 3G / 4G (16 Layer) / Sub-6 (BW : 120MHz) cellular module 3G / 4G (20 Layer) / Sub-6 (BW : 200MHz) cellular module 1VV0301752 Rev. 3 Page 2 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide CONTENTS APPLICABILITY TABLE CONTENTS 1. INTRODUCTION Scope Audience Contact Information, Support Symbol Conventions Related Documents 2. GENERAL PRODUCT DESCRIPTION Overview Frequency Bands and CA / EN-DC Combinations 2.2.1. Frequency Bands 2.2.2. CA / MIMO / EN-DC Target Market Main Features 2.4.1. Configurations Pins Block Diagram RF Performance 2.6.1. Conducted Transmit Output Power 2.6.2. Conducted Receiver Sensitivity Mechanical Specifications 2.7.1. Dimensions 2.7.2. Weight Environmental Requirements 2.8.1. Temperature Range 2.8.2. RoHS Compliance 3. PINS ALLOCATION Pin-out FN990 Family Signals That Must be Connected Pin Layout 2 3 8 8 8 8 9 9 10 10 10 10 13 13 14 15 16 16 16 17 20 20 20 20 20 21 22 22 25 26 1VV0301752 Rev. 3 Page 3 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 4. POWER SUPPLY Power Supply Requirements Power Consumption General Design Rule 4.3.1. Electrical Design Guidelines 4.3.1.1.
+5V Source Power Supply Design Guidelines 4.3.2. Thermal Design Guidelines 4.3.3. Power Supply PCB Layout Guidelines RTC Reference Voltage Internal LDO for GNSS Bias 5. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings Not Optional Recommended Operating Conditions 6. DIGITAL SECTION Logic Levels 6.1.1. 1.8V Pins Absolute Maximum Ratings 6.1.2. 1.8V Standard GPIOs 6.1.3. 1.8V UIM1/UIM2 Pins 6.1.4. 2.95V Pins Absolute Maximum Ratings 6.1.5. 2.95V SIM Card Pins 6.1.6. VPH_PWR Level I/O Pins Power ON/OFF/RESET 6.2.1. Power On 6.2.1.1. Initialization and Activation State 6.2.2. Power Off 6.2.2.1. Graceful Shutdown 6.2.2.2. Fast Shutdown 6.2.3. Reset 6.2.3.1. Unconditional Hardware Reset Communication Ports 6.3.1. Host Interface 27 27 27 28 29 29 29 30 31 31 31 32 32 32 33 33 33 33 33 34 34 34 34 35 35 38 39 40 42 42 44 44 1VV0301752 Rev. 3 Page 4 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 6.3.1.1. Host Interface Switch Function 6.3.1.2. PCIe Interface 6.3.1.3. USB 3.1 Interface 6.3.2. SIM Interface 6.3.2.1. SIM Schematic Example 6.3.3. eSIM Interface 6.3.4. I2C Inter-integrated Circuit 6.3.5. Control Interface 6.3.5.1. WLAN/GNSS Disable 6.3.5.2. LED 6.3.5.3. Wake Host 6.3.5.4. DPR General Purpose I/O 6.4.1. Using a GPIO as INPUT 6.4.2. Using a GPIO as OUTPUT 7. RF SECTION Antenna Interface 7.1.1. Antenna Configuration Antenna Connector Antenna Requirements 7.3.1. Antenna Cable 7.3.2. Antenna Installation Guidelines GNSS Receiver 7.4.1. GNSS RF Front End Design GNSS Characteristics 8. MECHANICAL DESIGN General Finishing & Dimensions Drawing Solder Resist Opening Area and Keepout Area 9. APPLICATION GUIDE 44 45 48 50 51 51 52 52 52 53 54 54 55 55 56 57 57 57 61 62 62 63 63 64 65 66 66 66 66 66 68 1VV0301752 Rev. 3 Page 5 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Debug of the FN990 Family Module in Production Bypass Capacitor on Power Supplies EMC Recommendations 10. PACKAGING Tray 11. CONFORMITY ASSESTMENT ISSUES (TBD) Approvals Compliance Summary Americas Approvals 11.2.1. USA FCC 11.2.1.1. FCC Certificates 11.2.1.2. Applicable FCC Rules 11.2.1.3. FCC Regulatory Notices 11.2.1.4. FCC Antenna info 11.2.2. Canada ISED 11.2.2.1. ISED Database 68 68 69 70 70 72 72 73 73 73 73 73 75 77 77 11.2.2.2. Applicable ISED Rules / Liste des Rgles ISDE Applicables 77 11.2.2.3. ISED Regulatory Notices / Avis rglementaires d'ISDE APAC Approvals 11.3.1. Japan Approvals 11.3.1.1. JRL/JTBL Regulatory Notices EMEA Approvals 11.4.1. EU RED 11.4.1.1. EU Declaration of Conformity 11.4.1.2. RED Antennas RoHS and REACH Info 11.5.1. RoHS Info 11.5.2. REACH Info 12. PRODUCT AND SAFETY INFORMATION Copyrights and Other Notices 12.1.1. Copyrights 12.1.2. Computer Software Copyrights 77 81 81 82 82 82 82 82 84 84 84 85 85 85 85 1VV0301752 Rev. 3 Page 6 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Usage and Disclosure Restrictions 12.2.1. License Agreements 12.2.2. Copyrighted Materials 12.2.3. High Risk Materials 12.2.4. Trademarks 12.2.5. 3rd Party Rights 12.2.6. Waiwer of Liability Safety Recommendations 13. 14. GLOSSARY DOCUMENT HISTORY 86 86 86 86 87 87 87 88 89 91 1VV0301752 Rev. 3 Page 7 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 1. INTRODUCTION Scope This document introduces the Telit FN990 Family module and presents possible and recommended hardware solutions for the development of a product based on this module. All the features and solutions described in this document are applicable to all FN990 Family variants listed in the applicability table. This document cannot include every hardware solution or every product that can be designed. Where the suggested hardware configurations are not to be considered mandatory, the information provided should be used as a guide and starting point for the proper development of the product with the Telit FN990 Family module. Audience This document is intended for Telit customers, especially system integrators, about to implement their applications using the Telit FN990 Family module. Contact Information, Support For general contact, technical support services, technical questions and report of documentation errors contact Telit Technical Support at:
TS-EMEA@telit.com TS-AMERICAS@telit.com TS-APAC@telit.com TS-SRD@telit.com TS-ONEEDGE@telit.com Alternatively, use:
https://www.telit.com/support For detailed recommendations on accessories and components visit:
information about where you can buy the Telit modules or for https://www.telit.com Our aim is to make this guide as helpful as possible. Keep us informed of your comments and suggestions for improvements. Telit appreciates the user feedback on our information. 1VV0301752 Rev. 3 Page 8 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Symbol Conventions Danger: This information MUST be followed or catastrophic equipment failure or personal injury may occur. Warning: Alerts the user on important steps about the module integration. Note/Tip: Provides advice and suggestions that may be useful when integrating the module. Electro-static Discharge: Notifies the user to take proper grounding precautions before handling the product. Table 1: Symbol Conventions All dates are in ISO 8601 format, that is YYYY-MM-DD. Related Documents FN990 SW User Guide, 1VV0301750 FN990 AT Commands Reference Guide, 80691ST11097A Generic EVB HW User Guide, 1VV0301249 Telit EVB 2.0 HW User Guide, 1VV0301732 FN990 TLB HW User Guide, 1VV0301753 FN990 Thermal Design Guide, 1VV0301804 FN990 CA / EN-DC list, 30691NT12001A 1VV0301752 Rev. 3 Page 9 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 2. GENERAL PRODUCT DESCRIPTION Overview The aim of this document is to present the possible and recommended hardware solutions useful for developing a product with the Telit FN990 Family M.2 module. FN990 Family is Telits platform for the M.2 module for applications, such as M2M applications and industrial IoT device platforms, based on the following technologies:
5G sub-6 / 4G / 3G networks for data communication Designed for industrial grade quality Front-end for mobile products, offering mobile communication features to an external host CPU through its rich interfaces. FN990 Family is available in hardware variants as listed in the APPLICABILITY TABLE. The designated RF band set for each variant are detailed in Section 2.2. Frequency Bands and CA / EN-DC Combinations. Frequency Bands and CA / EN-DC Combinations 2.2.1. Frequency Bands Operating frequencies in 5G, LTE and WCDMA modes conform to 3GPP specifications. The table below lists the FN990 operating frequencies on 5G, LTE and WCDMA mode. 5G NR Sub-6 Bands Supportive NR BAND Duplex Mode Uplink Frequency (MHz) Downlink Frequency (MHz) n1 - 2100 FDD 1920 - 1980 2110 - 2170 n2 - 1900 PCS FDD 1850 - 1910 1930 - 1990 n3 - 1800 n5 - 850 n7 - 2600 n8 - 900 n20 - 800 n25 -1900+
FDD FDD FDD FDD FDD FDD 1710 - 1785 1805 - 1880 824 - 849 869 - 894 2500 - 2570 2620 - 2690 880 - 915 925 - 960 832 - 862 791 - 821 1850 - 1915 1930 - 1995 Channels Tx: 384000 - 396000 Rx: 422000 - 434000 Tx: 370000 - 382000 Rx: 386000 - 398000 Tx: 342000 - 357000 Rx: 361000 - 376000 Tx: 164800 - 169800 Rx: 173800 - 178800 Tx: 500000 - 514000 Rx: 524000 - 538000 Tx: 176000 - 183000 Rx: 185000 - 192000 Tx: 166400 - 172400 Rx: 158200 - 164200 Tx: 370000 - 383000 Rx: 386000 - 399000 SCS
(kHz) 15 15 15 15 15 15 15 15 1VV0301752 Rev. 3 Page 10 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide NR BAND Duplex Mode Uplink Frequency (MHz) Downlink Frequency (MHz) n28 - 700 APT FDD 703 - 748 758 - 803 n30 - WCS n38 - 2600 n40 - 2300 FDD TDD TDD 2305 - 2315 2350 - 2360 2570 - 2620 2300 - 2400 Channels Tx: 140600 - 149600 Rx: 151600 - 160600 Tx: 461000 - 463000 Rx: 470000 - 472000 SCS
(kHz) 15 15 T/Rx: 514000 - 524000 30 T/Rx: 460000 - 480000 30 n41 - 2600+
TDD 2496 - 2690 T/Rx: 499200 - 537996 30 n48 - 3600 TDD 3550 - 3700 T/Rx: 636668 - 646666 30 n66 - AWS-3 FDD 1710 - 1780 2110 - 2200 n71 - 600 FDD 663 - 698 617 - 652 Tx: 342000 - 356000 Rx: 422000 - 440000 Tx: 132600 - 139600 Rx: 123400 - 130400 n75 DL 1500+
SDL
1432 1517 Rx: 286400 - 303400 15 15 30 n77 - 3700 n78 - 3500 n79 - 4700 TDD TDD TDD 3300 - 4200 3300 - 3800 4400 - 5000 Table 2: 5G NR Sub-6 Bands supportive T/Rx: 620000 - 680000 30 T/Rx: 620000 - 653332 30 T/Rx: 693334 - 733332 30 LTE Bands supportive E-UTRA BAND Duplex Mode Uplink Frequency
(MHz) Downlink Frequency
(MHz) B1 - 2100 FDD 1920 - 1980 2110 - 2170 B2 - 1900 PCS FDD 1850 - 1910 1930 - 1990 B3 - 1800+
B4 - AWS-1 B5 - 850 B7 - 2600 FDD FDD FDD FDD 1710 - 1785 1805 - 1880 1710 - 1755 2110 - 2155 824 - 849 869 - 894 2500 - 2570 2620 - 2690 B8 - 900 GSM FDD 880 - 915 925 - 960 B12 - 700 a B13 - 700 c B14 - 700 PS B17 - 700 b FDD FDD FDD FDD 699 - 716 729 - 746 777 - 787 746 - 756 788 - 798 758 - 768 704 - 716 734 - 746 B18 - 800 Lower FDD 815 - 830 860 - 875 Channels Tx: 18000 - 18599 Rx: 0 - 599 Tx: 18600 - 19199 Rx: 600 - 1199 Tx: 19200 - 19949 Rx: 1200 - 1949 Tx: 19950 - 20399 Rx: 1950 - 2399 Tx: 20400 - 20649 Rx: 2400 - 2649 Tx: 20750 - 21449 Rx: 2750 - 3449 Tx: 21450 - 21799 Rx: 3450 - 3799 Tx : 23010 - 23179 Rx : 5010 - 5179 Tx : 23180 - 23279 Rx : 5180 - 5279 Tx : 23280 - 23379 Rx : 5280 - 5379 Tx: 23730 - 23849 Rx: 5730 - 5849 Tx: 23850 - 23999 Rx: 5850 - 5999 1VV0301752 Rev. 3 Page 11 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide E-UTRA BAND Duplex Mode Uplink Frequency
(MHz) Downlink Frequency
(MHz) B19 - 800 Upper FDD 830 - 845 875 - 890 B20 - 800 DD FDD 832 - 862 791 - 821 B25 - 1900+
B26 - 850+
FDD FDD 1850 - 1915 1930 - 1995 814 - 849 859 - 894 B28 - 700 APT FDD 703 - 748 B29 - 700 d FDD N/A 758 - 803 717 - 728 B30 - 2300 WCS FDD 2305 - 2315 2350 - 2360 Channels Tx: 24000 - 24149 Rx: 6000 - 6149 Tx: 24150 - 24449 Rx: 6150 - 6449 Tx: 26040 - 26689 Rx: 8040 - 8689 Tx: 26690 27039 Rx: 8690 - 9039 Tx: 27210 - 27659 Rx: 9210 - 9659 Rx: 9660 - 9769 Tx: 27660 - 27759 Rx: 9770 - 9869 N/A 1452 - 1496 Rx: 9920 - 10359 2010 2025 2570 - 2620 1880 - 1920 2300 - 2400 2496 - 2690 3400 - 3600 3600 3800 T/Rx: 36200 - 36349 T/Rx: 37750 - 38249 T/Rx: 38250 - 38649 T/Rx: 38650 - 39649 T/Rx: 39650 - 41589 T/Rx: 41590 - 43589 T/Rx: 43590 45589 5150 5925 (DL only) Rx: 46790 - 54539 3550 - 3700 1710 - 1780 2110 - 2200 663 - 698 617 - 652 T/Rx: 55240 - 56739 Tx: 131972 - 132671 Rx: 66436 - 67335 Tx: 133122 - 133471 Rx: 68586 - 68935 B32 - 1500 L B34 - 2000 B38 - 2600 B39 - 1900+
B40 - 2300 B41 - 2600+
B42 - 3500 B43 - 3700 B46 - 5200 B48 - 3600 B66 - AWS-3 B71 - 600 FDD TDD TDD TDD TDD TDD TDD TDD TDD TDD FDD FDD Table 3: LTE Bands supportive WCDMA Bands supportive UTRA BAND Duplex Mode Uplink Frequency
(MHz) Downlink Frequency
(MHz) B1 - 2100 FDD 1920 - 1980 2110 - 2170 B2 - 1900 PCS FDD 1850 - 1910 1930 - 1990 B4 - AWS-1 B5 - 850 FDD FDD 1710 - 1755 2110 - 2155 824 - 849 869 - 894 B6 - 850 Japan FDD 830 - 840 875 - 885 Channels Tx: 9612 - 9888 Rx: 10562 - 10838 Tx: 9262 - 9538 Rx: 9662 - 9938 Tx: 1312 - 1513 Rx: 1537 - 1738 Tx: 4132 - 4233 Rx: 4357 - 4458 Tx: 4162 - 4188 Rx: 4387 - 4413 1VV0301752 Rev. 3 Page 12 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide UTRA BAND Duplex Mode Uplink Frequency
(MHz) Downlink Frequency
(MHz) B8 - 900 GSM FDD 880 - 915 B19 - 800 Japan FDD 830 - 845 Table 4: WCDMA Bands supportive 925 - 960 875 - 890 Channels Tx: 2712 - 2863 Rx: 2937 - 3088 Tx: 312 - 363 Rx: 712 - 763 2.2.2. CA / MIMO / EN-DC The FN990 Family supports 2CA, 3CA, 4CA, 5CA, 6CA and 7CA for LTE CA combinations and EN-DC for NR FR1 configuration. Note: Refer to the FN990 Family CA / EN-DC list, 30691NT12001A for detailed combinations of CA and EN-DC. Target Market The FN990 Family can be used for telematics applications where tamper-resistance, confidentiality, integrity, and authenticity of end-user information are required, for example:
Industrial equipment Home network Internet connectivity 1VV0301752 Rev. 3 Page 13 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Main Features The FN990 Family of industrial grade cellular modules features 5G Sub-6, LTE and multi-
RAT module together with an on-chip powerful application processor and a rich set of interfaces. Main functions and features are listed below:
Function Features Physical M.2 Type 3052-S3-B Cellular technology FN990A28 5G: FR1(Sub 6G), Rel 16 4G: CAT. 19 (1.6Gbps) on DL, CAT. 18 (211Mbps) on UL, Rel 16 3G: HSPA+ Rel9 up to 42/5.7Mbps in DL/UL FN990A40 5G: FR1(Sub 6G), Rel 16 4G: CAT. 20 (2Gbps) on DL, CAT. 18 (211Mbps) on UL, Rel 16 3G: HSPA+ Rel9 up to 42/5.7Mbps in DL/UL 4x4 MIMO 5G: n1/n2/n3/n7/n25/n30/n38/n40/n41/n48/n66/n75/n77/n78/n79 4G: B1/B2/B3/B4/B7/B25/B30/B32/B34/B38/B39/B40/B41/B42/B43/B48/B66 Diversity/2nd Rx 4G: all operating bands 3G: all operating bands GNSS Upper L-band: GPS/Glonass/Beidou/Galileo USIM port Dual Voltage Two SIM support (UIM2 can be assigned as optional eSIM) Class B and Class C support Application processor Application processor to run customer application code 32 bit ARM s-A7 up to 1.8 GHz running the Linux operating system 4Gbit NAND Flash + 4Gbit LPDDR4 2133 MHz MCP is supported Main Interfaces PCIe Gen3 x 1-lane USB 3.1 Gen 2 Peripheral Ports GPIOs Antenna connection 4 x MHF-4 type Cellular/GNSS antenna connectors 1 x MHF-4 type Dedicated GNSS antenna connector From factor M.2 Form factor (30 * 52 * 2.25 mm), accommodating the multiple RF bands Environment and quality requirements The device is designed and qualified by Telit to satisfy environmental and quality requirements. Single supply module The module internally generates all its required internal supply voltages. 1VV0301752 Rev. 3 Page 14 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Function Features RTC Real time clock is supported. Operating temperature Range -40 degC to +85 degC
(conditions as defined in Section 2.8.1, Temperature Range) Table 5: Main Features 2.4.1. Configurations Pins Telit M.2 module indicates the main serial interface applicable on the combination of 4 configuration pins. FN990 Family is configured as an USB 3.1 Gen 2. Pin 21 69 75 1 Signal CONFIG_0 CONFIG_1 CONFIG_2 CONFIG_3 State GND GND NC NC Table 6: Configurations Pins Interface Type USB 3.1 Gen 2 Port Configuration 2
(Applicable to WWAN only) Note: On the platform side, each of the CONFIG_0 to CONFIG_3 signals must be equipped with a pull-up resistor. Based on the state of the configuration pins on the Add-in Card, being tied to GND or left No Connect (NC), the detected pins will create 4-bit logic state that required decoding. For more details, please refer to the PCI Express M.2 Specification document. 1VV0301752 Rev. 3 Page 15 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Block Diagram The figure below shows an overview of the internal architecture of the FN990 Family module. Figure 1: FN990 Family Block Diagram RF Performance The RF performance in 5G, LTE and WCDMA modes conforms to the 3GPP specifications. 2.6.1. Conducted Transmit Output Power TX power follows the measurement conditions and specifications defined in 3GPP. Band Power class RF Power (dBm) 5G NR Sub-6 n1, n2, n3, n5, n7, n8, n20, n25, n28, n30, n38, n40, n41, n48, n66, n71, n77, n78, n79 5G NR Sub-6 n41, n77, n78, n79 Supports Power Class 2 LTE All Bands 3 (0.2W) 23 (+2dB / -2dB) 2 (0.4W) 26 (+2dB / -2dB) B1, B2, B3, B4, B5, B7, B8, B12, B13, B14, B17, B18, B19, B20, B25, B26, 3 (0.2W) 23 (+2dB / -2dB) B28, B30, B34, B38, B39, B40, B41, B42, B43, B48, B66, B71 LTE B41 Supports Power Class 2 2 (0.4W) 26 (+2dB / -2dB) 1VV0301752 Rev. 3 Page 16 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Band Power class RF Power (dBm) 3G WCDMA B1, B2, B4, B5, B6, B8, B19 3 (0.2W) 23 (+2dB / -2dB) Table 7: Conducted Transmit Output Power 2.6.2. Conducted Receiver Sensitivity The Sensitivity of the receiver follows the measurement conditions and specifications defined in 3GPP. Technology 3GPP Compliance 5G NR Sub-6 4G LTE 3G WCDMA Throughput >95%
Throughput >95%
BER <0.1% 12.2 Kbps Table 8: 3GPP compliance for Conducted Receiver Sensitivity NR Band Typical Conducted Rx Sensitivity (dBm) *
SCS (kHz) BW (MHz) ANT0 ANT1 ANT2 ANT3 Combined NR FDD n1 NR FDD n2 NR FDD n3 NR FDD n5 NR FDD n7 NR FDD n8 NR FDD n20 NR FDD n25 NR FDD n28 NR FDD n30 NR TDD n38 NR TDD n40 NR TDD n41 NR TDD n48 NR FDD n66 15 15 15 15 15 15 15 15 15 15 30 30 30 30 15 20 20 20 20 20 20 20 20 20 10 20 80 100 40 20
-95
-95
-94
-96
-93
-96
-96
-94
-96
-96
-95
-88
-88
-91
-94
-94
-94
-94 NA
-94 NA NA
-94 NA
-96
-94
-88
-86
-91
-94
-96
-95
-96
-98
-94
-98
-98
-95
-98
-98
-94
-88
-87
-93
-95
-95
-95
-95 NA
-95 NA NA
-95 NA
-98
-94
-89
-87
-92
-97
-100
-100
-100
-99
-99
-99
-100
-100
-100
-102
-99
-93
-92
-97
-99 1VV0301752 Rev. 3 Page 17 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide NR Band NR FDD n71 NR TDD n75
(DL only) NR TDD n77 NR TDD n78 NR TDD n79 Typical Conducted Rx Sensitivity (dBm) *
15 30 30 30 30 20 30 100 100 100
-97
-92
-88
-88
-85 NA
-93
-89
-88
-90
-98
-92
-87
-87
-89 NA
-92
-87
-87
-88
-100
-97
-93
-93
-93 Table 9: Typical Conducted Receiver Sensitivity - NR Bands
*3.3 Voltage / Room temperature E-UTRA Band Typical Conducted Rx Sensitivity (dBm) *
LTE FDD B1 LTE FDD B2 LTE FDD B3 LTE FDD B4 LTE FDD B5 LTE FDD B7 LTE FDD B8 LTE FDD B12 LTE FDD B13 LTE FDD B14 LTE FDD B17 LTE FDD B18 LTE FDD B19 LTE FDD B20 LTE FDD B25 LTE FDD B26 LTE FDD B28 LTE FDD B29
(DL only) LTE FDD B30 ANT0
-97
-97
-97
-97
-99
-97
-99
-99
-99
-99
-99
-99
-99
-99
-97
-99
-99
-99
-96 ANT1
-96.5 ANT2
-96.5 ANT3
-96.5
-96
-96
-96 NA
-96 NA NA NA NA NA NA NA NA
-96 NA NA NA
-95
-96
-96
-96
-99
-96
-99
-99
-99
-99
-99
-99
-99
-99
-96
-99
-99
-99
-95
-96
-96
-96 NA
-96 NA NA NA NA NA NA NA NA
-96 NA NA NA
-95 Combined
-103
-103
-103
-103
-102
-103
-102
-102
-102
-102
-102
-102
-102
-102
-103
-102
-102
-101
-102 1VV0301752 Rev. 3 Page 18 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide E-UTRA Band LTE FDD B32
(DL only) LTE TDD B34 LTE TDD B38 LTE TDD B39 LTE TDD B40 LTE TDD B41 LTE TDD B42 LTE TDD B43 LTE TDD B46
(DL only) LTE TDD B48 LTE FDD B66 LTE FDD B71
-97
-96.5
-97
-97
-96.5
-96
-97
-97
-92
-97
-97
-99 Typical Conducted Rx Sensitivity (dBm) *
-97 NA
-96.5
-97
-96.5
-96
-96
-96 NA
-96
-96 NA
-97
-98
-96.5
-97
-96.5
-96
-96
-96
-90
-96
-96
-99
-97 NA
-96.5
-97
-96.5
-96
-96
-96 NA
-96
-96 NA Table 10: Typical Conducted Receiver Sensitivity - LTE Bands
*3.3 Voltage / Room temperature
-101
-100
-103
-103
-103
-102
-102
-102
-93
-103
-103
-102 UTRA Band Typical Conducted Rx Sensitivity (dBm) *
ANT0 ANT1 ANT2 ANT3 Combined WCDMA FDD B1 WCDMA FDD B2 WCDMA FDD B4 WCDMA FDD B5 WCDMA FDD B6 WCDMA FDD B8 WCDMA FDD B19
-110
-110
-110
-110
-110
-110
-110 NA NA NA NA NA NA NA
-109
-110
-109
-110
-110
-110
-110 NA NA NA NA NA NA NA Table 11: Typical Conducted Receiver Sensitivity - WCDMA Bands
*3.3 Voltage / Room temperature NA NA NA NA NA NA NA 1VV0301752 Rev. 3 Page 19 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: The sensitivity level has deviation of approximately +/- <2dB, device and channel because the level shows a typical value. The sensitivity level of the NR bands has a deviation of approximately
+/- <3dB depending on the EN-DC combinations, but the combined sensitivity performance meets the 3GPP requirements. LTE level is measured at BW 10 MHz except Band 46 B46 BW = 20 MHz Mechanical Specifications 2.7.1. Dimensions The overall dimensions of FN990 Family modems are:
Length: 52 mm Width: 30 mm Thickness: 2.25 mm 2.7.2. Weight The nominal weight of the FN990A40 is 8.2 grams. The nominal weight of the FN990A28 is 8.0 grams. Environmental Requirements 2.8.1. Temperature Range Mode Temperature Note Operating Temperature Range 20C ~ +55C 40C ~ +85C This range is defined by 3GPP (the global standard for wireless mobile communication). Telit guarantees that its modules comply with all 3GPP requirements and that it has the full functionality of the module in this range. Telit guarantees full functionality within this range as well. However, there may possibly be some performance deviations in this extended range related to 3GPP requirements, which means that some RF parameters may deviate 1VV0301752 Rev. 3 Page 20 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Mode Temperature Note from the 3GPP specification on the receiver or the maximum output power may be slightly degraded. Even so, all functionalities, such as connection to calls, SMS, USB communication, UART activation and so on, will be maintained, and the effect of such degradations will not lead to malfunctions. Storage and non-operating Temperature Range Table 12: Temperature Range 40C ~ +85C Warning: The application processor temperature which is in the FN990 Family must be kept below 95 degC for the best performance. Depending on the various application, a heat sink, thermal pad or other cooling system may be required to properly dissipate the heat. A large solder resist opening area is located on the bottom side of the module. Adding a TIM on that area with a heatsink is one of the best way to dissipate the heat well. The temperature can be read via AT commands. For more details, please refer to SW user guide or thermal design guideline. 2.8.2. RoHS Compliance As a part of the Telit corporate policy of environmental protection, the FN990 Family products comply with the RoHS (Restriction of Hazardous Substances) directive of the European Union (EU directive 2011/65/EU). 1VV0301752 Rev. 3 Page 21 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 3. PINS ALLOCATION Pin-out Pin Signal I/O Function Type Comment USB Communication Port 7 9 USB_HS_DP USB_HS_DM 29 USB_SS_TX_M 31 USB_SS_TX_P 35 USB_SS_RX_M 37 USB_SS_RX_P PCIe Communication Port 41 PCIE_TX0_M 43 PCIE_TX0_P 47 PCIE_RX0_M 49 PCIE_RX0_P 53 PCIE_REFCLK_M 55 PCIE_REFCLK_P 50 PCIE_RESET_N 52 54 PCIE_CLKREQ_N PCIE_WAKE_N SIM Card Interface 1 36 UIM1_VCC I/O USB 2.0 Data Plus Analog I/O USB 2.0 Data Minus Analog O O I I O O I I I I I O O O USB 3.1 super-
speed transmit Minus USB 3.1 super-
speed transmit Plus USB 3.1 super-
speed receive Minus Analog Analog Analog USB 3.1 super-
speed receive Plus Analog PCIe transmit 0 Minus PCIe transmit 0 Plus PCIe receive 0 Minus PCIe receive 0 Plus PCIe differential reference clock Minus PCIe differential reference clock Plus Functional reset to PCIe bus PCIe reference clock request signl Analog Analog Analog Analog Analog Analog VPH_PWR Default PU VPH_PWR Internal 100k PU PCIe wake-up VPH_PWR Internal 100k PU Supply output for an external UIM1 card 1.8V /
2.95V Power 1VV0301752 Rev. 3 Page 22 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Pin Signal I/O Function Type Comment 34 UIM1_DATA 32 UIM1_CLK 30 UIM1_RESET_N 66 UIM1_PRESENT SIM Card Interface 2 48 UIM2_VCC 42 UIM2_DATA 44 UIM2_CLK 46 UIM2_RESET_N 40 UIM2_PRESENT Miscellaneous Functions FULL_CARD_POWER_OFF_N W_DISABLE_N LED_N WAKE_ON_WAN_N VREG_L6B_1P8 SYS_RESIN_N TGPIO_01 TGPIO_02 TGPIO_03 TGPIO_04 6 8 10 23 65 67 68 25 62 64 20 22 I/O Data connection with an external UIM1 card Clock output to an external UIM1 card Reset output to an external UIM1 card UIM1 Card Present Detect 1.8V /
2.95V 1.8V /
2.95V 1.8V /
2.95V 1.8V Internal 20k PU Internal 100k PU Active LOW Supply output for an external UIM2 card 1.8V /
2.95V Power I/O Data connection with an external UIM2 card Clock output to an external UIM2 card Reset output to an external UIM2 card UIM2 Card Present Detect 1.8V /
2.95V 1.8V /
2.95V 1.8V /
2.95V 1.8V Internal 20k PU Internal 100k PU Active LOW Module On/Off 1.8V /
VPH_PWR Internal 47k PD RF disable VPH_PWR Internal 100k PU LED control Open Drain Wake Host 1.8V Default PU Reference Voltage 1.8V Power Reset Input 1.8V Internal 100k PU O O I O O O I I I O O O I I/O I/O General Purpose I/O Can be I2S_CLK 1.8V General Purpose I/O Can be DPR 1.8V I/O General Purpose I/O 1.8V I/O General Purpose I/O 1.8V USB_PCIE_SWITCH I Swich Host Interface 1.8V Internal 10k PU TGPIO_06 I/O General Purpose I/O Can be I2S_DIN 1.8V 1VV0301752 Rev. 3 Page 23 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Pin Signal 24 TGPIO_07 28 TGPIO_08 56 I2C_SDA 58 38 26 I2C_SCL 1PPS W_DISABLE2_N MIPI Control 61 63 RFFE0_DATA RFFE0_CLK Power Supply 2 4 70 72 74 VPH_PWR VPH_PWR VPH_PWR VPH_PWR VPH_PWR GROUND 3 5 11 27 33 39 45 51 57 71 73 GND GND GND GND GND GND GND GND GND GND GND Config 21 69 CONFIG_0 CONFIG_1 I/O I/O I/O I/O I/O O I Function Type Comment General Purpose I/O Can be I2S_DOUT 1.8V General Purpose I/O Can be I2S_WS 1.8V I2C Data Can be TGPIO_09 I2C Clock Can be TGPIO_10 1.8V Internal 2.2k PU 1.8V Internal 2.2k PU 1PPS/TSN 1.8V GNSS disable VPH_PWR Internal 100k PU I/O Data O Clock Power supply Power supply Power supply Power supply Power supply Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground I I I I I
1.8V 1.8V Power Power Power Power Power Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground 1VV0301752 Rev. 3 Page 24 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Pin 75 1 CONFIG_2 CONFIG_3 Signal I/O Function Type Comment
Floating Floating Reserved for Future Use 59 60 RFU RFU Table 13: FN990 Family Pin-out Information Warning: Reserved pins must not be connected. FN990 Family Signals That Must be Connected Below table specifies the FN990 Family signals that must be connected for debugging purposes, even if not used by the end application:
Pin 2, 4, 70, 72, 74 3, 5, 11, 27, 33, 39, 45, 51, 57, 71, 73 Signal VPH_PWR GND Notes 6 7 9 FULL_CARD_POWER_OFF_N USB_D+
USB_D-
If not used, connect to a test point or an USB connector If not used, connect to a test point or an USB connector Table 14: Mandatory Signals 1VV0301752 Rev. 3 Page 25 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Pin Layout Figure 2: FN990 Family Pin out 1VV0301752 Rev. 3 Page 26 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 4. POWER SUPPLY The power supply circuitry and board layout are very important areas of the whole product design, with critical impact on the overall product performance. Please follow carefully the following requirements and guidelines to ensure reliable and stable design. Power Supply Requirements The FN990 Family power requirements are as follows:
Power Supply Value Nominal Supply Voltage Supply Voltage Range Maximum ripple on module input supply Peak current consumption Table 15: Power Supply Requirements 3.3V 3.135 V 4.4 V 30 mV 3.3 V @ 4 A Power Consumption Mode Average
[Typ.]
Mode Description IDLE Mode CFUN=1 35mA No call connection USB is connected to a host Airplane Mode (PSMWDISACFG=1, W_DISABLE_N: Low) CFUN=4
< 3mA Tx and Rx are disabled; module is not registered on the network (Airplane mode) USB is disconnected Standby Mode (PSMWDISACFG=1, W_DISABLE_N: Low) CFUN=1
< 5mA Module cycles between wake and sleep USB is disconnected Operative Mode (WCDMA) WCDMA Voice 850mA WCDMA B1 voice call (Tx=23dBm) WCDMA HSPA 650mA WCDAM data call (DC-HSDPA up to 42Mbps, Max through-put) Operative Mode (LTE) Single mode
(1DL/1UL SISO) 800mA Non-CA ,B2 BW 10MHz, 1 RB, 23dBm, QPSK DL / QPSK UL 2DLCA (4x4MIMO) with 2ULCA(SISO)
(TBD) mA CA_2A-66A, BW 20MHz, Full RB, 256QAM DL / 256QAM UL(800Mbps DL / 170Mbps UL) 1VV0301752 Rev. 3 Page 27 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Mode 7DLCA (4x4,2x2MIMO) with 1UL(SISO) 5DLCA (4x4MIMO) with 1UL(SISO) Operative Mode (NR-FR1) Average
[Typ.]
1450mA 1150mA Mode Description CA_1A-3C-7C-20A-38A, Full RB, 256QAM DL/ 256QAM UL(1500Mbps DL / 103Mbps UL) CA_1A-3C-7C, Full RB, 256QAM DL/ 256QAM UL(2Gbps DL /
103Mbps UL) NSA mode 1CC+1FR1 NSA mode 6CC+1FR1 SA mode 1FR1 SA mode 2FR1 EN-DC_1A(1DL/UL SISO)-n78A(1DL/1UL SISO) 900 mA LTE : BW 20MHz, 1 RB, QPSK DL / QPSK UL, 23dBm FR1 : BW 100MHz, Inner RB 137(Number)@64(Position), QPSK DL / QPSK UL, 23 dBm EN-DC_1A(DL2x2/1UL SISO)-3C(DL4x4)-
7C(DL4x4)_28A(DL2x2) -n78(1DL 4x4MIMO/1UL SISO/60M) 2000mA LTE : BW 20MHz, Full RB, 256QAM DL / 256QAM UL(2Gbps DL
/ 103Mbps UL) FR1 : BW100MHz, Full RB, 256QAM DL / 256QAM UL(1.6Gbps DL/118Mbps) 380mA 730mA FR1(n78A) : BW100MHz, Full RB, 256QAM DL / 256QAM UL(1.89Gbps DL/1.25Mbps) FR1(CA_n78A_n78A) : BW200MHz, Full RB, 256QAM DL /
256QAM UL(3.8Gbps DL/1.25Mbps) Table 16: FN990 Family Current Consumption Note: Worst/best case current consumption values depend on mobile network configuration not under module control.
* Loop-back mode in call equipment
* 3.3 voltage / room temperature General Design Rule The principal guidelines for the Power Supply Design include three different design steps:
Electrical design Thermal design PCB layout 1VV0301752 Rev. 3 Page 28 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 4.3.1. Electrical Design Guidelines The electrical design of the power supply is highly dependent on the power source from which the power is drained. 4.3.1.1. +5V Source Power Supply Design Guidelines The desired power supply voltage output is 3.3V. Being the difference between the input source and the desired output moderate, a linear regulator can be used. A switching power supply is preferred to reduce power dissipation. When using a linear regulator, a proper heat sink must be provided to dissipate the power generated. A low ESR bypass capacitor of adequate capacity must be provided to cut the current absorption peaks close to the FN990 Family module. A 100 F tantalum capacitor is usually suitable on VPH_PWR. Make sure that the low ESR capacitor on the power supply output (usually a tantalum one) is rated at least 10V. A protection diode must be inserted close to the modem power input to protect the FN990 Family module from power polarity inversion. 4.3.2. Thermal Design Guidelines The aim of this paragraph is to provide thermal design guidelines useful for developing a product with a Telit FN990 modem. Proper thermal protection design protects against human or component damage under worst-case conditions. Furthermore, it reduces the probability of failure and does not adversely affect the use of the module, and greatly extents the operation time with maximum performance. For more details, please refer to the thermal design guidelines. Note: FN990 Family supports different RATs: 3G, 4G and 5G Sub-6. Based on the Radio Access Technology, the FN990 modem might exhibithigh current consumption, thus proper thermal designs are essential to dissipate heat well. 1VV0301752 Rev. 3 Page 29 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: There is the large solder resist opening area on the bottom side of the module. Adding a TIM on that area with a heatsink is highly recommended to ensure proper heat dissipation. The modem temperature vale can be read via AT command. Note: For optimal RF performance, thermal dissipation and mecahnical stability, the FN990 must be connected to the ground and metal chassis of the host board. The module shield and host device or metal chassis of the host device should be connected by means of conductive material. 4.3.3. Power Supply PCB Layout Guidelines As described in the electrical design guidelines, a low ESR capacitor should be connected to the power supply output to reduce current peaks. A protection diode on the modem power supply input should be connecte to protect the FN990 from spikes and polarity inversion. Placement of these components is crucial for correct operation: a misplaced component can badly affect power supply performance:
The bypass low ESR capacitor must be placed close to the FN990 power input pins or - if the power supply is of a switching type - it can be placed close to the inductor to reduce ripple, as long as the PCB trace from the capacitor to FN990 is wide enough to avoid significant voltage drop even during the 4A current peaks. The protection diode must be placed close to the modem connector. The PCB traces from the input connector to the power regulator IC must be wide enough to ensure that no voltage drops occur during the 4A current peaks. The PCB traces connecting the FN990 and bypass capacitor must be wide enough to avoid voltage drops even when 4A current absorbtion peaks occur. These traces should be kept as short as possible. The PCB traces connecting the switching output to the inductor and the switching diode must be kept as short as possible by placing the inductor and the diode as closed as possible to the power switching IC (only for the switching power supplies). This is done to reduce the radiated field (noise) at the switching frequency (usually 100-500 kHz). 1VV0301752 Rev. 3 Page 30 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Use a good common ground plane. Place the power supply on the board to ensure that the high current return paths in the ground plane do not overlap any noise sensitive circuitry, such as microphone amplifier/buffer or earphone amplifier. The power supply input cables must be kept separate from noise sensitive lines, such as microphone/earphone cables. RTC The RTC within the FN990 Family module does not have a dedicated RTC supply pin. The RTC block is supplied by the VPH_PWR supply. If the VPH_PWR power is removed, RTC is not maintained so if it is necessary to maintain an internal RTC, VPH_PWR must be supplied continuously. Reference Voltage The 1.8V regulated power supply output is supplied as the reference voltage to a host board. This output is active when the module is turned ON and turns OFF when the module is shutdown. This table lists the reference voltage of the FN990 Family modules. Pin 65 Signal VREG_L6B_1P8 I/O O Function Type Comment Reference Voltage Power 1.8V Table 17: FN990 Family Reference Voltage Internal LDO for GNSS Bias The LDO for GNSS bias is applied inside the FN990 Family model. The voltage supply is generated internally by the FN990 (LDO) and is fed to GNSS active antenna. This table below lists the LDO for GNSS bias of FN990 Family modules. Symbol Parameter VGNSS DC bias Voltage of internal LDO for GNSS bias IGNSS DC bias Current of internal LDO for GNSS bias Table 18: LDO for GNSS bias of FN990 Family Min 2.9
Typ 3.1 Max Unit 3.15
[V]
100
[mA]
1VV0301752 Rev. 3 Page 31 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 5. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings Not Optional Warning: A deviation from the value ranges listed below could damage the FN990 module. Symbol Parameter VPH_PWR Battery supply voltage on pin VPH_PWR Table 19: Absolute Maximum Ratings - Not optional Min
-0.3 Max Unit
+4.7
[V]
Recommended Operating Conditions Symbol Tamb Parameter Ambient temperature Min
-40 VPH_PWR Battery supply voltage on pin VPH_PWR 3.135 IVPH_PWR Peak current on pin VPH_PWR
Table 20: Recommended Operating Conditions Typ
+25 3.3
Max Unit
+85
[degC]
4.4 4
[V]
[A]
1VV0301752 Rev. 3 Page 32 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 6. DIGITAL SECTION Logic Levels Unless otherwise specified, all FN990 Family interface circuits are 1.8V CMOS logic. Only USIM interfaces are capable of dual voltage I/O. The following tables show the logic level specifications used in the FN990 interface circuits. The data specified in the tables below are valid throughout all drive strengths and the whole temperature range. Warning: Do not connect FN990 digital logic signal directly to the application digital logic signals with a voltage higher than 2.134V for 1.8V CMOS signals. 6.1.1. 1.8V Pins Absolute Maximum Ratings Parameter Input level on any digital pin when on Input voltage on analog pins when on Min
Table 21: Absolute Maximum Ratings - Not Functional Max
+2.134 V
+2.134 V 6.1.2. 1.8V Standard GPIOs VIH VIL VOH VOL Parameter Input high level Input low level Output high level Output low level Table 22: Operating Range - Interface Levels (1.8V CMOS) 6.1.3. 1.8V UIM1/UIM2 Pins VIH VIL Parameter Input high level Input low level Min 1.26
-0.3 1.35 0 Min 1.17
-0.3 Max Unit Comment 2.1 0.54 1.8 0.45
[V]
[V]
[V]
[V]
Max Unit Comment 2.1 0.63
[V]
[V]
1VV0301752 Rev. 3 Page 33 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide VOH VOL Parameter Output high level Output low level Min 1.35 0 Max Unit Comment 1.8 0.45
[V]
[V]
Table 23: Operating Range - UIM Pins Working at 1.8V 6.1.4. 2.95V Pins Absolute Maximum Ratings Parameter Input level on any digital pin when on Input voltage on analog pins when on Min
Table 24: Absolute Maximum Ratings - Not Functional 6.1.5. 2.95V SIM Card Pins Max
+3.344 V
+3.344 V Parameter Min Max Unit Comment VIH VIL VOH VOL Input high level Input low level Output high level 1.843
-0.3 2.21 3.25 0.73 2.95 Output low level 0 0.368
[V]
[V]
[V]
[V]
Table 25: Operating Range - UIM Pins Working at 2.95V 6.1.6. VPH_PWR Level I/O Pins VIH VIL VOH VOL Parameter Min Max Input high level 0.65 x VPH_PWR
Unit
[V]
Input low level
0.35 x VPH_PWR
[V]
Output high level 0.8 x VPH_PWR VPH_PWR
[V]
Output low level 0 0.2 x VPH_PWR
[V]
Table 26: Operating Range - I/O Pins Working at VPH_PWR Power ON/OFF/RESET The following tables show the description of power control pins. 1VV0301752 Rev. 3 Page 34 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Pin Signal I/O Function Type Comment 6 FULL_CARD_POWER_OFF_N I Module On/Off 1.8V /
VPH_PWR Internal 47k PD 67 SYS_RESIN_N I Reset Input 65 VREG_L6B_1P8 O Reference Voltage 1.8V 1.8V
BOOT_OK / Shutdown Indicator O Power ON/OFF Status Check 1.8V Internal 100k PU Power
* Can be assigned to GPIO Table 27: Power Interface Signals 6.2.1. Power On To turn on the FN990 data card, the FULL_CARD_POWER_OFF_N pin must be asserted high. Note: To turn on the FN990 module, the SYS_RESIN_N pin must not be asserted low. If asserted low for more than one second, the FN990 modem will be reset. Power on can be triggered by SYS_RESIN_N pin (low level) as well. Even so, please control the FN990 ON/OFF status by FULL_CARD_POWER_OFF_N pin. 6.2.1.1. Initialization and Activation State After turning on the FN990 module, the device is not yet fully functional because the software boot and initialization process takes some time to complete. For this reason, it is not recommended to start communicating with the FN990 module during the initialization phase. The AT command interface is accessible via USB or PCIe port. In general, as shown in figure below, the FN990 modems become fully operational (in the Activation state) at least 50 seconds after the FULL_CARD_POWER_OFF_N is asserted. 1VV0301752 Rev. 3 Page 35 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Figure 3: FN990 Family Power ON Sequence - USB mode (USB_PCIE_SWITCH: High, Default) 1VV0301752 Rev. 3 Page 36 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Figure 4: FN990 Family Power ON Sequence PCIe EP mode (USB_PCIE_SWITCH: Low) 1VV0301752 Rev. 3 Page 37 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: To verify if the FN990 Family has powered up properly, please follow the indications below:
* Power on trigger time is the interval between VPH_PWR to FULL_CARD_POWER_OFF_N: this could be null (0 ms) if the customer application requires turning on the module automatically.
** Monitoring BOOT_OK (Shutdown indicator) pin. When the status translates to high, the moduleboot-up process is complete. To use BOOT_OK (Shutdown indicator), the shutdown indication function must be enabled through the AT#SHDNIND command. (please refer to the AT Reference Guide document)
*** The stated total boot time is an approximate measure of the latest SW and HW combination. The boot time may be lengthened or shortened depending on the module configuration, firmware or hardware version. Note: Active low signals are labeled with a name ending with _N Note: To avoid a back-powering effect, it is recommended to prevent any HIGH logic level signals from being applied to the digital pins of the module when it is powered OFF or during an ON/OFF transition. Figure 5: Example Circuit for ON/OFF by FULL_CARD_POWER_N 6.2.2. Power Off Power off of the device can be done in two different ways:
1VV0301752 Rev. 3 Page 38 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Graceful shutdown by FULL_CARD_POWER_OFF_N Fast shutdown by GPIO triggered 6.2.2.1. Graceful Shutdown To shutdown the FN990 Family module safely, host can use the graceful shutdown function. The graceful shutdown can be triggered by:
FULL_CARD_POWER_OFF_N 6.2.2.1.1. Graceful Shutdown by FULL_CARD_OFF_N To gracefully shutdown the FN990 , FULL_CARD_POWER_OFF_N should be asserted to Low. Once FULL_CARD_POWER_N is asserted to Low, the FN990 enters finalization state, terminates active processes and prepares to turn off safely. As shown in the diagram below, VREG_L6B_1P8 will indicate when the module is ready to be turned off. Figure 6: Graceful Shutdown by FULL_CARD_POWER_OFF_N 1VV0301752 Rev. 3 Page 39 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: Graceful Shutdown triggered by FULL_CARD_POWER_OFF_N is only effective after module boots up completely.
* The stated total shutdown time is an approximate measure of the latest SW and HW combination. The shutdown time may be lengthened or shortened depending on the SW configuration, SW or HW version. 6.2.2.2. Fast Shutdown For quicker FN990 module shutdown, the host application can use the fast shutdown function, which can be triggered by:
GPIO (+ optional shutdown indicator) 6.2.2.2.1. Fast Shutdown by GPIO To leverage fast shutdown feature, one of the GPIO lines should be assigned as Fast Shutdown Trigger by means of the AT commands. Once the fast shutdown trigger senses a High to Low transition, fast shutdown is started:
the FN990 enters finalization state, terminates active processes and prepares to turn off safely. As shown in the figure below, when the module is ready to be turned off, it will be indicated via VREG_L6B_1P8. Please refer to the AT User Guide for more details on how to enable the shutdown indicator and fast shutdown trigger. Figure 7: Fast Shutdown by GPIO 1VV0301752 Rev. 3 Page 40 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: Using a fast shutdown without shutdown indicator function, FULL_CARD_POWER_N pin should be controlled to prevent the FN990 from rebooting. For more information, please refer to the AT commands reference guide and SW user guide document.
* The stated total shutdown time is an approximate measure of the latest SW and HW combination. The shutdown time may be lengthened or shortened depending on the SW configuration, SW or HW version. Figure 8: Fast Shutdown by GPIO (*SHDNIND Enable, Optional) Note: *Shutdown Indicator is an optional function and is disabled by default. The host can verify the module entered OFF state by monitoring the shutdown indicator pin status. To turn on the module after using a fast shutdown with shutdown indicator function, it should be re-powered or reboot. For more information, please refer to AT Commands Reference Guide and SW User Guide document. Note: Fast shutdown function is disabled by default. To use fast shutdown function, please refer to the AT Commands Reference Guide and SW User Guide document. 1VV0301752 Rev. 3 Page 41 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Warning: If the VPH_PWR is to be kept at a high status, the module will re-boot. (Not applicable to Shutdown Indicator function) Warning: Failure to follow recommended shut-down procedures might damage the device and consequently void the warranty. 6.2.3. Reset Device reset can be achieved as follows:
Unconditional reset using the SYS_RESIN_N 6.2.3.1. Unconditional Hardware Reset To unconditionally restart the FN990 Family module, the SYS_RESIN_N pin must be asserted low more than 1 second and then released. Figure 9: Unconditional Hardware Reset by SYS_RESIN_N 1VV0301752 Rev. 3 Page 42 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: *Shutdown Indicator is an optional function. If SHDIND is enabled, it can verify the status via SHDIND function. Please refer to the AT commands user guide document.
** The stated total reset time is an approximate measure of the latest SW and HW combination. The shutdown time may be lengthened or shortened depending on the SW configuration, SW or HW version. Note: Unconditional hardware reset must be used only as an emergency procedure, and not as a normal power-off operation. Note: Do not use any pull-up resistor on the RESET_N line or any totem pole digital output. Using a pull-up resistor may cause latch-
up problems on the FN990 Family power regulator and improper functioning on the module. The RESET_N line must be connected only in an open-collector configuration. Below figure shows a simple circuit for this action. Figure 10: Example Circuit for RESET by SYSTEM_RESET_N 1VV0301752 Rev. 3 Page 43 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Communication Ports The below table summarizes all the hardware interface of the FN990 Family module. PCIe USB USIM eSIM I2C I2S Interface Description Peripheral Component Interconnect Express Gen 4.0 USB 3.1 Gen 2 interface x2 dual voltage each (1.8V / 2.95V) Embeded SIM (optional) Inter-Integrated Circuit Inter-IC Sound Control Interfaces Antenna ports W_DISABLE_N, WAKE_ON_WAN_N, LED, DPR x4 Cellular, 1 for GNSS Table 28: FN990 Family Hardware Interfaces 6.3.1. Host Interface Note: FN990 M.2 data card supports USB 3.1 Gen 2 and PCIe Gen 4 respectively. This means USB 3.1 and PCIe 4.0 interface cannot be used at the same time. Basically, the host interface operates as USB 3.1 Gen 2: if the application requires to use PCIe Gen 4.0 host interface switch must be used. 6.3.1.1. Host Interface Switch Function This chapter describes the host interface switch functions. Pin Signal I/O Function Type Comment 20 USB_PCIE_SWITCH I Swich Host Interface 1.8V Internal 10k PU Table 29: Host Interface Switch Pin FN990 Family M.2 Card determines the host interface by checking the status of USB_PCIE_SWITCH pin at the beginning of the power on sequences. High(Default): USB 3.1 or USB 2.0 Low: PCIe 3.0 + (USB 3.1 or USB 2.0)*
1VV0301752 Rev. 3 Page 44 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide
*USB interface is only used as debugging purposes when USB/PCIe Switch pin is low. Figure 11: Example Circuit for HOST Interface Switch Function 6.3.1.2. PCIe Interface The FN990 Family module includes PCIe interface. PCIe needs AC coupling series capacitors on the TX lines in both directions. In order to interface PCIe with the application board that controls the modem, 0.22 uF capacitors should be installed on PCIE_RX_P/M lines of the FN990. The series capacitors are already placed on PCIE_TX_P/M lines inside the FN990. Internally, VPH_PWR level 100k pull-up resistor is already mounted on PCIE_WAKE_N and PCIE_CLKREQ_N. The suggested PCIe interface connection is shown in the diagram below:
1VV0301752 Rev. 3 Page 45 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Figure 12: Connection for PCIe Interface Note: The PCIe signals traces must be routed carefully: minimize trace lengths, number of vias, and capacitive loading. The impedance value should be as close as possible to 85 Ohm differential. Pin Signal I/O Function Type Comment 41 43 47 49 53 55 50 PCIE_TX0_M PCIE_TX0_P PCIE_RX0_M PCIE_RX0_P PCIE_REFCLK_M PCIE_REFCLK_P PCIE_RESET_N O O I I I I I PCIe transmit 0 Minus PCIe transmit 0 Plus PCIe receive 0 Minus PCIe receive 0 Plus Analog Analog Analog Analog PCIe differential reference clock Minus Analog PCIe differential reference clock Plus Analog Functional reset to PCIe bus VPH_PWR Default PU 52 PCIE_CLKREQ_N O PCIe reference clock request signl VPH_PWR 54 PCIE_WAKE_N O PCIe wake-up VPH_PWR Table 30: PCIe Interface Signals Internal 100k PU Internal 100k PU Note: Consider placing a low-capacitance ESD protection component to protect the FN990 against ESD strikes 1VV0301752 Rev. 3 Page 46 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Warning: FN990 data cards are not designed or intended to support Hot-Swap or Hot-Plug connection. Performing How-Swap or Hot-
Plug may pose danger to the FN990 Family module, to the host device, and to the person handling the device. 6.3.1.2.1. PCIe Layout Guidelines This guidelines will provide general guidelines for PCIe interface to improve signal integrity. All other sensitive/high-speed signals and cicuits must be protected from PCIe corruption PCIe signals must be protected from noisy signals (clocks, SMPS, and so forth) Pay extra attention to crosstalk, ISI, and intralane skew and impedance discontinuities. PCIe Tx AC copling capacitors are better placed close to the source or receiver side to keep good SI of route on PCB. To maintain impedance balance, maintain positive and negative traces as balanced as possible in terms of the signal and its return path. Trace length matching between the reference clock, Tx, and Rx pairs are not required. External capacitors also should keep differential traces. Ensure not to stagger the capacitors. This can affect the differential integrity of the design and can create EMI. Type of guidance Guideline Requirement General Data rate 8 Gbps*
Insertion loss at 4 GHz (dB)
-10 dB Impedance Bus length Length matching Intra pair match 85 ohms differential 285 mm**
< 0.7mm Spacing To all other signals
> 4 x line width Tx lane to Rx lane
> 4 x line width Component AC capacitance 220 nF Table 31: PCIe Routing Constraints
*Actual throughput at the system level could be lower due to overheads.
**PCIe trace length in FN990 Family: about 15 mm. 1VV0301752 Rev. 3 Page 47 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 6.3.1.3. USB 3.1 Interface The FN990 Family modules include super-speed USB 3.1 Gen 2 with high-speed USB 2.0 backward compatibility. It complies with the Universal Serial Bus Specification, revision 3.1 and can be used for control and data transfers as well as for diagnostic monitoring and firmware update. The USB port is typically the main interface between the FN990 Family module and application hardware. USB 3.1 needs AC coupling series capacitors on the TX lines in both directions. To interface USB 3.1 with the application board controlling the modem, it is necessary to install 220 nF capacitor on the USB_SS_RX_P/M lines of the FN990 Family. The series capacitors are already placed on USB_SS_TX_P/M lines inside FN990 module. Figure 13: Connection for USB Interface Note: The USB signal traces must be carefully routed: minimize trace lengths, number of vias, and capacitive loading. The impedance value should be as close as possible to 85 Ohm differential. Pin Signal 7 9 29 31 35 37 USB_HS_DP USB_HS_DM USB_SS_TX_M USB_SS_TX_P USB_SS_RX_M USB_SS_RX_P I/O I/O I/O O O I I Function Type Comment USB 2.0 Data Plus USB 2.0 Data Minus Analog Analog USB 3.1 super-speed transmit Minus Analog USB 3.1 super-speed transmit Plus USB 3.1 super-speed receive Minus USB 3.1 super-speed receive Plus Analog Analog Analog 1VV0301752 Rev. 3 Page 48 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Table 32: USB Interface Signals Note: Consider placing a low-capacitance ESD protection component to protect FN990 Family against ESD strikes. 6.3.1.3.1. USB Layout Guidelines If third-party components are required for signal improvement, place them closer to the USB connector. There are relatively fast edge rates, so must be routed away from sensitive circuits and signals (RF, audio and XO). Maintain good isolation between the USB connector and RF antennas (especially 2.4 GHz). Route the RF signals operating at a 2.4 GHz frequency with the highest isolation possible from USB_SS_TX/RX traces. USB SS Tx AC coupling capacitors are better placed close to source or the ESD/connector side to keep good SI of main route on PCB. Route differential pairs in the inner layers with a solid GND reference to have good impedance control and to minimize discontinuities. Keep isolation between the Tx pair, Rx pair, and DP/DM to avoid crosstalk. The SS-USB Tx and Rx differential pair maximum length is recommended to be less than 136 mm. For USB 2.0 signal, maximum trace length should be less than 234 mm. Type of guidance Guideline Requirement USB 3.1 Gen 2 USB 2.0 General Data rate 10 Gbps 480Mbps Insertion loss at 5 GHz (dB)
-7 dB N/A Impedance Bus length 85 ohms differential 136 mm 234 mm Length matching Intra pair match
< 0.7mm
< 2mm Spacing To all other signals
> 4 x line width
> 3 x line width Tx lane to Rx lane
> 4 x line width Component AC capacitance 220 nF Table 33: USB Routing Constraints N/A N/A 1VV0301752 Rev. 3 Page 49 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 6.3.2. SIM Interface The FN990 modem family supports an external SIM interface. (1.8 V or 2.95 V) Note: UIM2 can be assigned as optional eSIM. In that case, UIM2 cant be used as an external SIM interface. Pin Signal I/O Function Type Comment SIM Card Interface 1 36 UIM1_VCC O Supply output for an external UIM1 card 1.8V / 2.95V Power 34 UIM1_DATA I/O Data connection with an external UIM1 card 1.8V / 2.95V Internal 20k PU 32 UIM1_CLK 30 UIM1_RESET_N 66 UIM1_PRESENT SIM Card Interface 2 O O I Clock output to an external UIM1 card 1.8V / 2.95V Reset output to an external UIM1 card 1.8V / 2.95V UIM1 Card Present Detect 1.8V Internal 100k PU Active LOW*
48 UIM2_VCC O Supply output for an external UIM2 card 1.8V / 2.95V Power 42 UIM2_DATA I/O Data connection with an external UIM2 card 1.8V / 2.95V Internal 20k PU 44 UIM2_CLK 46 UIM2_RESET_N 40 UIM2_PRESENT O O I Clock output to an external UIM2 card 1.8V / 2.95V Reset output to an external UIM2 card 1.8V / 2.95V UIM2 Card Present Detect 1.8V Internal 100k PU Active LOW*
Table 34: SIM Interface Signals 1VV0301752 Rev. 3 Page 50 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: * Unlike the M.2 specicifcation, the UIM_PRESENT pin is set to active low (Inserted) by default for the Telit unified function. So FN990 will detect the SIM card insertion when UIM_PRESENT input is changed from a logic 1 to a logic 0. If user wants to change UIM_PRESENT pin to active high (inserted), please refer to AT#SIMINCFG of FN990 AT Commands Reference Guide. But if user wants to change the default value of the firmware itself to reduce unnecessary input of AT commands, please contact Telit technical support or sales. 6.3.2.1. SIM Schematic Example The diagram below shows in particular how the SIM part of the application interface should be designed. Figure 14: SIM Schematic Example Note: FN990 Family modems contain an internal pull-up resistor on SIMIO. It is not necessary to install external pull-up resistor. 6.3.3. eSIM Interface FN990 modems include pads for an optional embedded SIM (WLCSP package). 1VV0301752 Rev. 3 Page 51 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Customers interested in using an embedded SIM mounted on the FN990 can contact Telit Techical Support at:
TS-EMEA@telit.com TS-AMERICAS@telit.com TS-APAC@telit.com 6.3.4. I2C Inter-integrated Circuit The FN990 Family supports an I2C interface: the the table below lists the I2C signals of the modem. Pin Signal I2C_SDA 56 58 I2C_SCL I/O I/O I/O Function Type Comment I2C Data Can be TGPIO_08 I2C Clock Can be TGPIO_09 1.8V 1.8V Internal 2.2k PU Internal 2.2k PU Table 35: I2C Signal 6.3.5. Control Interface Pin Signal I/O Function Type Comment 8 W_DISABLE_N 26 10 23 25 W_DISABLE2_N LED_N WAKE_ON_WAN_N TGPIO_02 Table 36: Control Interface Pins I I O O WLAN disable VPH_PWR GNSS disable VPH_PWR LED control Wake Host I/O General Purpose I/O Can be DPR 1.8V 1.8V Internal 100k PU Internal 100k PU Open Drain Default PU 6.3.5.1. WLAN/GNSS Disable The W_DISABLE_N signal is provided to disable the WLAN/GNSS function:
W_DISABLE_N Low: Airplane mode High or Floating: Normal operation W_DISABLE2_N Low: GNSS Disable 1VV0301752 Rev. 3 Page 52 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide High or Floating: Normal operation Figure 15: Example Circuit for WLAN/GNSS Disable Function Please refer to the AT commands guide for setting the WLAN/GNSS disable function. 6.3.5.2. LED The LED signal drives the LED output. The recommended LED connection is the following:
Figure 16: Recommended LED Connection R1 and VDD determine the LED brightness and forward current. When VDD is 3.3V and LEDs forward voltage is 2.0V, the recommended R1 value ranges from 66 to 250 Ohm. However, the resistor value must be calculated considering the LED specifications. It is recommended to use VDD below VPH_PWR level. 1VV0301752 Rev. 3 Page 53 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: If the LED function is enabled and a LED is connected to the LED_N pin, current consumption may be slightly increased. And current sinking mode (up to 10mA) can be supported. 6.3.5.3. Wake Host WAKE_ON_WAN_N is active low signal and used to wake the Host when specific events occur. SMS Network de-registration Voice Call Please refer to the AT commands guide for setting Wake function. Figure 17: Recommended LED Connection 6.3.5.4. DPR This signal is an input directly to the FN990 module from a suitable SAR sensor. Then FN990 Family module will reduce output tx power. DPR function is not available yet: specific implementation will be determined on customer request. For further information on the DPR function on FN990 modem family, please contact Telit Techical Support at:
TS-EMEA@telit.com TS-AMERICAS@telit.com TS-APAC@telit.com 1VV0301752 Rev. 3 Page 54 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide General Purpose I/O The general-purpose I/O pins can be configured to act in four different ways:
Input Output Fast shutdown Dedicate function (Customer requirement) Input pins can only report digital values (high or low) present on the pin at the read time. Output pins can only be set or the pin level can be queried. Pin Signal I/O Function Type Comment General Purpose I/O 68 25 62 64 22 24 28 56 58 TGPIO_01 TGPIO_02 I/O I/O General Purpose I/O Can be I2S_CLK General Purpose I/O Can be DPR TGPIO_03 I/O General Purpose I/O TGPIO_04 I/O General Purpose I/O TGPIO_06 TGPIO_07 TGPIO_08 I2C_SDA I2C_SCL I/O I/O I/O I/O I/O General Purpose I/O Can be I2S_DIN General Purpose I/O Can be I2S_DOUT General Purpose I/O Can be I2S_WS I2C Data Can be TGPIO_09 I2C Clock Can be TGPIO_10 Table 37: General Purpose I/O 6.4.1. Using a GPIO as INPUT 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V Internal 2.2k PU Internal 2.2k PU GPIO pins, when used as inputs, can be tied to a digital output of another device and report its status, provided the device interface levels are compatible with the GPIO 1.8V CMOS levels. If a digital output of a device is tied to GPIO input, the pin has interface levels different than 1.8V CMOS. It can be buffered with an open collector transistor with a 47K ohm pull-
up resistor to 1.8V. 1VV0301752 Rev. 3 Page 55 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 6.4.2. Using a GPIO as OUTPUT GPIO pins, when used as output, can drive 1.8V CMOS digital devices or compatible hardware. When set as outputs, the pins have a push-pull output, and therefore the pull-
up resistor can be omitted. Figure 18: GPIO Output Pin Equivalent Circuit 1VV0301752 Rev. 3 Page 56 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 7. RF SECTION Antenna Interface The antenna connection is one of the most important aspect in the whole application design as it strongly affects the overall radio performance. Hence, please read and follow the requirements and the guidelines as carefully as possible. FN990 Family modules provide four MHF-4 type RF connectors covering the 5G FR1/LTE/WCDMA bands including GNSS and one MHF-4 type RF connector dedicated to GNSS. Warning: When connecting cellular and GNSS antennas to the module, pay special attention not to damage RF connectors. 7.1.1. Antenna Configuration Please refer to the picture below for connector position. Figure 19: Antenna Configration Refer to the following antenna configuration assigned. Antenna port Technology Tx Rx GNSS WCDMA B1, B2, B4, B5, B6, B8, B19 B1, B2, B4, B5, B6, B8, B19 LTE ANT 0 B1, B2, B3, B4, B5, B7, B8, B12, B13, B14, B17, B18, B19, B20, B25, B26, B28, B30, B34, B38, B39, B40, B41, B66, B71 5G NR FR1 n1, n2, n3, n5, n7, n8, n20, n25, n28, n30, n38, n40, n41, n66, n71 B1, B2, B3, B4, B5, B7, B8, B12, B13, B14, B17, B18, B19, B20, B25, B26, B28, B29(DL), B30, B32(DL), B34, B38, B39, B40, B41, B42, B43, B46(DL), B48, B66, B71 n1, n2, n3, n5, n7, n8, n20, n25, n28, n29(DL), n30, n38, n40, n41, n48, n66, n71, n75(DL), n77, n78, n79
1VV0301752 Rev. 3 Page 57 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Antenna port Technology Tx Rx GNSS WCDMA LTE
ANT 1 5G NR FR1 n48, n77, n78, n79 WCDMA ANT 2 LTE
5G NR FR1 n38, n41
B1, B2, B3, B4, B7, B25, B30, B32(DL), B34, B38, B39, B40, B41, B42, B43, B48, B66 n1, n2, n3, n7, n25, n30, n38, n40, n41, n48, n66, n75(DL), n77, n78, n79 B1, B2, B4, B5, B6, B8, B19 B1, B2, B3, B4, B5, B7, B8, B12, B13, B14, B17, B18, B19, B20, B25, B26, B28, B29(DL), B30, B32(DL), B34, B38, B39, B40, B41, B42, B43, B46(DL), B48, B66, B71 n1, n2, n3, n7, n25, n30, n38, n40, n41, n48, n66, n75, n77, n78, n79 WCDMA
ANT 3 LTE B42, B43, B48 5G NR FR1 n48, n77, n78, n79 B1, B2, B3, B4, B7, B25, B30, B32(DL), B34, B38, B39, B40, B41, B42, B43, B48, B66 n1, n2, n3, n7, n25, n30, n38, n40, n41, n48, n66, n75(DL), n77, n78, n79 ANT 4 GNSS
Table 38: Antenna Configuration Please refer to the tables below for antenna port on each supported band:
ANT0 NR FDD n1 PRx/Tx0 NR FDD n2 PRx/Tx0 NR FDD n3 PRx/Tx0 NR FDD n5 PRx/Tx0 NR Band ANT1 MIMO1 MIMO1 MIMO1 NA NR FDD n7 PRx/Tx0 MIMO1 NR FDD n8 PRx/Tx0 NR FDD n20 PRx/Tx0 NA NA NR FDD n25 PRx/Tx0 MIMO1 ANT2 DRx DRx DRx DRx DRx DRx DRx DRx GPS L1, Galileo E1, Beidou B1, Glonass G1
GPS L1, Galileo E1, Beidou B1, Glonass G1 ANT3 MIMO2 MIMO2 MIMO2 NA MIMO2 NA NA MIMO2 1VV0301752 Rev. 3 Page 58 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide NR FDD n28 PRx/Tx0 NR FDD n30 PRx/Tx0 NR TDD n38 DRx/Tx1 NR TDD n40 PRx/Tx0 NR TDD n41 DRx/Tx1 NR Band NA MIMO1 MIMO1 MIMO1 MIMO1 DRx DRx PRx/Tx0 DRx PRx/Tx0 NA MIMO2 MIMO2 MIMO2 MIMO2 NR TDD n48 DRx MIMO2/Tx1 MIMO1 PRx/Tx0 NR FDD n66 PRx/Tx0 MIMO1 NR FDD n71 PRx/Tx0 NA NR TDD n75
(DL only) NR TDD n77 NR TDD n78 NR TDD n79 PRx DRx DRx DRx MIMO1 MIMO2/Tx1 MIMO2/Tx1 MIMO2/Tx1 Table 39: 5G NR Sub-6 bands for Antenna Configuration ANT0 LTE FDD B1 PRx/Tx0 LTE FDD B2 PRx/Tx0 LTE FDD B3 PRx/Tx0 LTE FDD B4 PRx/Tx0 LTE FDD B5 PRx/Tx0 E-UTRA Band ANT1 MIMO1 MIMO1 MIMO1 MIMO1 NA LTE FDD B7 PRx/Tx0 MIMO1 LTE FDD B8 PRx/Tx0 LTE FDD B12 PRx/Tx0 LTE FDD B13 PRx/Tx0 LTE FDD B14 PRx/Tx0 LTE FDD B17 PRx/Tx0 LTE FDD B18 PRx/Tx0 NA NA NA NA NA NA DRx DRx DRx MIMO1 MIMO1 MIMO1 ANT2 DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx MIMO2 NA MIMO2 PRx/Tx0 PRx/Tx0 PRx/Tx0 ANT3 MIMO2 MIMO2 MIMO2 MIMO2 NA MIMO2 NA NA NA NA NA NA 1VV0301752 Rev. 3 Page 59 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide E-UTRA Band LTE FDD B19 PRx/Tx0 LTE FDD B20 PRx/Tx0 NA NA LTE FDD B25 PRx/Tx0 MIMO1 LTE FDD B26 PRx/Tx0 LTE FDD B28 PRx/Tx0 LTE FDD B29
(DL only) PRx LTE FDD B30 PRx/Tx0 LTE FDD B32
(DL only) PRx LTE TDD B34 PRx/Tx0 LTE TDD B38 PRx/Tx0 LTE TDD B39 PRx/Tx0 LTE TDD B40 PRx/Tx0 LTE TDD B41 PRx/Tx0 LTE TDD B42 LTE TDD B43 LTE TDD B46
(DL only) LTE TDD B48 DRx DRx PRx DRx LTE FDD B66 PRx/Tx0 LTE FDD B71 PRx/Tx0 Table 40: LTE for Antenna Configuration NA NA NA MIMO1 MIMO1 MIMO1 MIMO1 MIMO1 MIMO1 MIMO1 MIMO2 MIMO2 NA MIMO2 MIMO1 NA DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx MIMO1 MIMO1 DRx NA NA MIMO2 NA NA NA MIMO2 MIMO2 MIMO2 MIMO2 MIMO2 MIMO2 MIMO2 PRx/Tx0 PRx/Tx0 NA MIMO1 PRx/Tx0 DRx DRx MIMO2 NA UTRA Band ANT0 ANT1 ANT2 ANT3 WCDMA FDD B1 PRx/Tx0 WCDMA FDD B2 PRx/Tx0 WCDMA FDD B4 PRx/Tx0 WCDMA FDD B5 PRx/Tx0 WCDMA FDD B6 PRx/Tx0 NA NA NA NA NA DRx DRx DRx DRx DRx NA NA NA NA NA 1VV0301752 Rev. 3 Page 60 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide WCDMA FDD B8 PRx/Tx0 WCDMA FDD B19 PRx/Tx0 Table 41: WCDMA for Antenna Configuration UTRA Band NA NA DRx DRx NA NA Antenna Connector The FN990 Family is equipped with a set of 50 RF MHF-4 Receptacle from I-PEX 20449-001E. For more information about mating connectors, please consult https://www.i-pex.com Figure 20: MHF-4 RF connector Figure 21: MHF-4 Receptacle 1VV0301752 Rev. 3 Page 61 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Antenna Requirements Antennas for FN990 Family modules must meet the requirements listed in the table below. WCDMA/LTE/5G Sub-6 Antenna Requirements Item Value Frequency range Impedance Input power VSWR absolute max VSWR recommended Depending on the frequency band(s) provided by the network operator, the customer must use the most suitable antenna for that/those band(s). The bands supported by the FN990 Family is provided in Section 2.2 Frequency Bands and CA / EN-DC Combinations 50 Ohm
> 24 dBm average power in WCDMA & LTE & 5G Sub-6
<= 10:1
<= 2:1 Table 40: WCDMA / LTE / 5G Sub-6 Antenna Requirements 7.3.1. Antenna Cable Connecting cables between the module and LTE/Sub-6 antenna must have 50 Ohm impedance. If the impedance of the module does not match, RF performance is significantly reduced. Item Value Impedance Max cable loss 50 Ohm Less than 0.5 dB Avoid coupling with other signals. Table 413: Minimize Antenna Cable Recommendations Warning: Impedance of antenna connector and RF cable must be matched to 50 Ohm: mismatch will affect RF performance, especially high insertion loss of RF cable will cause Tx power and Rx sensitivity degradation. Warning: The FN990 should be located away from noise sources: RF cables and antennas should be installed away from noise sources such as SMPS, USB/PCIe interfaces, etc. 1VV0301752 Rev. 3 Page 62 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 7.3.2. Antenna Installation Guidelines Each antenna must be installed with 20dB isolation. Install the antenna in a location with access to the network radio signal. The Antenna must not be installed inside metal cases. The Antenna must be installed according to Antenna manufacturer instructions. Antenna integration should optimize the Radiation Efficiency. Efficiency values >
50% are recommended on all frequency bands. Antenna integration should not perturb the radiation pattern described in the Antenna manufacturer documentation. It is preferable to get an omnidirectional radiation pattern. To meet the related EIRP limitations, antenna gain must not exceed the values indicated in regulatory requirements, where applicable. The Typical antenna Gain in most M2M applications does not exceed 2dBi. If the device antenna is located farther than 20 cm from the human body and there are no co-located transmitters, then the Telit FCC/IC approvals can be re-used by the end product. If the device antenna is located closer than 20 cm from the human body or there are co-located transmitters, then additional FCC/IC testing may be required for the end product (Telit FCC/IC approvals cannot be reused). Note: GNSS receive path uses either the dedicated GNSS connector or the shared Secondary AUX antenna connector. GNSS Receiver The FN990 Family integrates a GNSS receiver that can be used either in Standalone or in A-GPS (assisted GPS) mode. FN990 modems support active GNSS antennas. 1VV0301752 Rev. 3 Page 63 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Item Value Frequency range Wide-band GNSS:
1559 1606 MHz recommended GPS:
2.046 MHz BW NB GPS (centered on 1575.42 MHz) Glonass (GLO):
~ 8.3 MHz BW (1597.05 ~ 1606 MHz) BeiDou (BDS):
4.092 MHz BW (1559.05 ~ 1563.14 MHz) Galileo (GAL):
4.092 MHz BW (centered on 1575.42 MHz) Passive Antenna Gain 1.5 dBi < Gain < 3dBi1 Impedance 50 Ohm External Amlification Gain 7.5 dB < Gain < 26 dB for nominal performance2,3 1.5 dB < Gain < 7.5 dB for nominal performance4,5 Supply Voltage 3.1 V Table 424: GNSS Receiver Notes:
1 Configured as AT$GPSANTPORT= 1 or 2 (Internal LNA Active in either configuration) 2 Configured as AT$GPSANTPORT= 3 (Internal LNA bypassed) 3 Must not exceed 26 dB 4 Configured as AT$GPSANTPORT= 4 (Internal LNA active) 5 Must not exceed 7.5 dB Total gain applied at FN990 RF input connector (Passive Antenna gain + External LNA gain-losses) 7.4.1. GNSS RF Front End Design The FN990 Family contains an integrated LNA and pre-select SAW filter. This allows the module to operate properly with a passive GNSS antenna. If the antenna cannot be located near the FN990, then an active antenna (that is, an antenna with a built-
in low noise amplifier) can be used with an external dedicated power supply circuit. GNSS receive path uses either the dedicated GNSS connector #4 or the shared antenna connector #1. 1VV0301752 Rev. 3 Page 64 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Note: Please refer to the FN990 Family AT Commands Reference Guide, 80691ST11097A information about GNSS operating modes and GNSS antenna selection. for detailed GNSS Characteristics The below table specifies the GNSS characteristics and expected performance:
Parameters Typical Measurement Notes Tracking Sensitivity
-161 dBm Standalone or MS based Sensitivity Acquisition Cold Start Hot Warm Cold TTFF Min update rate CEP Table 435: GNSS Characteristics
-148 dBm
-146 dBm 1 sec 27 sec 28 sec 1Hz
<2m Open Sky, mean TTFF Open Sky, mean TTFF Open Sky, mean TTFF Open sky conditions. Standalone 1VV0301752 Rev. 3 Page 65 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 8. MECHANICAL DESIGN General The FN990 Family module was designed to be compliant with a standard lead-free SMT process. Finishing & Dimensions The FN990 Family modules overall dimensions are:
Length:
52.00 mm Width:
30.00 mm Thickness: 2.25 mm Drawing This figure shows the mechanical dimensions of the FN990 Family module. Figure 22: FN990 Family Module Mechanical Dimensions Solder Resist Opening Area and Keepout Area The figure below shows the solder resist opening area and keep out area location on the FN990 bottom side. 1VV0301752 Rev. 3 Page 66 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Figure 23: Solder Resist Opening Area and Keep Out Area on Bottom Side In order to guarantee performance and longevity of the end product, the heat generated by the FN990 module must be dissipated. A large solder resist opening area (30*41.7 mm) is provided on the bottom of the FN990 modems for better heat dissipation. The addition of a TIM on the back of the FN990 Family is the most important factor from the thermal dissipation point of view. The recommended TIM size is 29 x 38 x 1.5 mm . Note: For more information on thermal design, refer to the FN990 Family Thermal Design Guide. Warning: The keep out area (30*2.27 mm) on the bottom side is only for debugging purposes. Please do not use this area for hardware design. 1VV0301752 Rev. 3 Page 67 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 9. APPLICATION GUIDE Debug of the FN990 Family Module in Production To test and debug the FN990 Family module integration, it is strongly recommended to add test pins on the host PCB for the following purposes:
Checking the connection between the FN990 Family itself and the application Testing the performance of the module by connecting it with an external computer Depending on the customer application these test pins include, but are not limited to, the following signals:
FULL_CARD_POWER_N, SYS_RESET_N, W_DISABLE_N, PCIE_WAKE_N VPH_PWR, GND VREG_L6B_1P8 USB_D +/-
USB_SS_TX/RX_M/P PCIE_TX/RX_M/P Bypass Capacitor on Power Supplies When a sudden voltage step is asserted to or a cut from the power supplies, the step transition causes effects such as overshoot and undershoot. This abrupt voltage transition can affect the device causing it to fail or to malfunction. Bypass capacitors are needed to alleviate this behavior, which can appear differently depending on the various applications. Integrators must pay special attention to this issue when they design their application board. The power lines length and width must be considered carefully, and capacitors value must be selected accordingly. The capacitor will also prevent power supplies ripple and the swiching noise caused in TDMA systems, such as GSM. Most important, a suitable bypass capacitor must be mounted on the following lines on the application board:
VPH_PWR Recommended value:
100 uF for VPH_PWR 1VV0301752 Rev. 3 Page 68 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide It must be taken into account that the capacitance mainly depends on the application board. Generally, additional capacitance is required when the power line is longer. Furthermore, if the fast power down function is used, additional bypass capacitor should be mounted on the application board. EMC Recommendations EMC protection on all FN990 pins should be designed on the application side according to customers requirement. ESD rating on all pins of FN990 Family:
Human Body Model (HBM): +/- 1000 V Charged Device Model (CDM): +/- 250 V All antenna pins up to +/- 4 kV Electro-static Discharge: Do not touch without proper electrostatic protective equipment. The product must be handled with care, avoiding any contact with the pins because electrostatic discharge may damage the product itself. 1VV0301752 Rev. 3 Page 69 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 10. PACKAGING Tray The FN990 Family modules are packaged on trays of 15 pieces each. These trays can be used in SMT processes for pick & place handling. Figure 24: Tray Packaging 1VV0301752 Rev. 3 Page 70 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Figure 25: Tray Construction 1VV0301752 Rev. 3 Page 71 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 11. CONFORMITY ASSESTMENT ISSUES Approvals Compliance Summary Region Americas Country &
Type Approval AR ENACOM BR ANATEL CA ISED CO CRC MX IFETEL PE MTC US FCC FN990A28 FN990A40 Table 44: Americas Approvals Compliance Summary Region APAC Country &
Type Approval AU RCM CH CCC JP JRL / JTBL SG IMDA TW NCC FN990A28 FN990A40 Table 47: APAC Approvals Compliance Summary EMEA EU RED UK UKCA Region Country &
Type Approval FN990A28 FN990A40 Table 48: EMEA Approvals Compliance Summary The equipment is compliant Type approval is in progress The equipment is not compliant 1VV0301752 Rev. 3 Page 72 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Americas Approvals 11.2.1. USA FCC 11.2.1.1. FCC Certificates The FCC Grants can be found here: https://www.fcc.gov/oet/ea/fccid 11.2.1.2. Applicable FCC Rules Model FN990A28 FN990A40 Applicable FCC Rules 47 CFR Part 2, 22, 24, 27, 90, 96 Table 45: Applicable FCC Rules 11.2.1.3. FCC Regulatory Notices Modification Statement Telit has not approved any changes or modifications to this device by the user. Any changes or modifications could void the users authority to operate the equipment. Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Wireless Notice This device complies with FCC radiation exposure limits set forth for an uncontrolled environment and meets the FCC radio frequency (RF) Exposure Guidelines. This transmitter must not be co-located or operate in conjunction with any other antenna or transmitter. The antenna should be installed and operated with a minimum distance of 20 cm between the radiator and your body FCC Class B digital device notice 1VV0301752 Rev. 3 Page 73 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide This equipment has been tested and found to comply with the limits for a Class B digital device, according to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used per the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by taking one or more of the following measures:
Reorient or relocate the receiving antenna. Connect the equipment into an outlet on a circuit different from that to which the Increase the separation between the equipment and the receiver. receiver is connected. Consult the dealer or an experienced radio/TV technician for help. Information for the OEMs and Integrators The following statement must be included with all versions of this document supplied to an OEM or integrator but should not be distributed to the end user. 1. This device is intended for OEM integrators only. 2. Please see the full Grant of Equipment document for other restrictions Manual Information to the End User The OEM integrator should be aware not to provide information to the end user on how to install or remove this RF module in the users manual of the end product which integrates include all required regulatory this module. The end user manual shall information/warming as shown in this manual Information on test modes and additional testing requirement The module has been evaluated in mobile stand-alone conditions. For operational in a host (multiple, conditions other than a stand-alone modular transmitter simultaneously transmitting modules or other transmitters in a host), additional testing may be required (collocation, retesting). If this module is intended for use in a portable device, you are responsible for separate approval to satisfy the SAR requirements of FCC Part 2.1093. Additional testing, Part 15 Subpart B disclaimer The modular transmitter is only authorized by the FCC for the specific rule parts (for example, FCC transmitter rules) listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host 1VV0301752 Rev. 3 Page 74 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide not covered by the modular transmitter grant of certification. If the grantee markets their product as being Part 15 Subpart B compliant (when it also contains unintentional-
radiator digital circuity), then the grantee shall provide a notice stating that the final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed. The end product with an embedded module may also need to pass the FCC Part 15 unintentional emission testing requirements and be properly authorized per FCC Part 15. 11.2.1.4. FCC Antenna info This radio transmitter has been approved by FCC to operate with the antenna types listed below with the maximum allowable gain indicated. Antenna types not included in this list, with a gain greater than the maximum gain indicated for that type, are strictly prohibited from use with this device. Model Antenna Type FN990A28 FN990A40 Omnidirectional Monopole Antenna Table 49: FCC Antenna Type UMTS Max Gain to meet FCC ERP/EIPP and MPE limit Max Gain to consider the same Frequency with LTE Max gain allowed Max Gain for FCC (dBi) B2 B4 B5 8.5 5.5 9.9 5.9 5.5 3.5 Table 5046: Max Antenna Gain for FCC in dBi WCDMA bands 5.9 5.5 3.5 Max Gain for FCC (dBi) Max Gain to meet FCC ERP/EIRP and MPE limit Max Gain to consider EN-DC Active Max gain allowed 9.0 6.0 10.4 9.0 9.7 5.9 5.5 3.5 3.8 3.6 5.9 5.5 3.5 3.8 3.6 LTE B2 B4 B5 B7 B12 1VV0301752 Rev. 3 Page 75 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Max Gain for FCC (dBi) Max Gain to meet FCC ERP/EIRP and MPE limit Max Gain to consider EN-DC Active Max gain allowed 10.2 10.2 9.7 9.0 10.4 1.0 9.0 5.5 0.5 0.5 0.5 6.0 9.0 3.9 3.9 3.6 5.9 3.5 1.0 3.8 3.8 0.5 0.5 0.5 5.5 2.9 3.9 3.9 3.6 5.9 3.5 1.0 3.8 3.8 0.5 0.5 0.5 5.5 2.9 LTE B13 B14 B17 B25 B26 B30 B38 B41 B42 B43 B48 B66 B71 Table 51: Max Antenna Gain for FCC in dBi LTE bands Max Gain for FCC (dBi) Max Gain to meet FCC ERP/EIRP and MPE limit Max Gain to consider EN-DC Active Max gain allowed 8.5 9.9 8.5 8.5 1.0 8.0 5.5 0.5 5.5 9.0 2.5 2.5 5.9 3.5 3.8 5.9 1.0 3.8 3.8 0.5 5.5 2.9 2.5 2.5 5.9 3.5 3.8 5.9 1.0 3.8 3.8 0.5 5.5 2.9 2.5 2.5 NR n2 n5 n7 n25 n30 n38 n41 n48 n66 n71 n77 n78 Table 52: Max Antenna Gain for FCC in dBi NR bands 1VV0301752 Rev. 3 Page 76 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Labelling requirements for the host device The host device shall be properly labelled to identify the modules within the host device. The certification label of the module shall be clearly visible at all times when installed in the host device, otherwise the host device must be labelled to display the FCC ID of the module, preceded by the words "Contains transmitter module", or the word "Contains", or similar wording expressing the same meaning, as in the below table. Model FN990A28 FN990A40 Table 53: Host device FCC Label 11.2.2. Canada ISED Host device FCC label Contains FCC ID: RI7FN990A28 Contains FCC ID: RI7FN990A40 11.2.2.1. ISED Database The products ISED certified can be found here:
Les produits certifis ISED peuvent tre trouvs ici :
https://sms-sgs.ic.gc.ca/equipmentSearch/searchRadioEquipments?execution=e1s1&lang=en 11.2.2.2. Applicable ISED Rules / Liste des Rgles ISDE Applicables Model Applicable ISED rules / Rgles ISDE applicables FN990A28 FN990A40 RSS: 130 Issue 2, 132 Issue 3, 133 Issue 6, 139 Issue 3, 140 Issue 1, 192 Issue 4, 195 Issue 2, 199 Issue 3;
RSS-102 Issue 5, RSS-Gen Issue 5 Table 47: Applicable ISED rules / Rgles ISDE applicables 11.2.2.3. ISED Regulatory Notices / Avis rglementaires d'ISDE Modification Statement / Dclaration de modification Telit has not approved any changes or modifications to this device by the user. Any changes or modifications could void the users authority to operate the equipment. Telit napprouve aucune modification apporte lappareil par lutilisateur, quelle quen soit la nature. Tout changement ou modification peuvent annuler le droit dutilisation de lappareil par lutilisateur. 1VV0301752 Rev. 3 Page 77 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Interference Statement / Dclaration d'interfrence This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Le prsent appareil est conforme aux applicables RSS standards d'Industrie Canada. L'exploitation est autorise aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement. Radio Exposure Notice / Avis d'exposition radio This device complies with ISED radiation exposure limits set forth for an uncontrolled environment and meets the RSS102 of the ISED radio frequency (RF) Exposure rules. Antenna gain must be less than the values reported in the table below:
Le prsent appareil est conforme l'exposition aux radiations FCC / ISED dfinies pour un environnement non contrl et rpond aux directives d'exposition de la frquence de la FCC radiofrquence (RF) et RSS102 de la frquence radio (RF) ISED rgles d'exposition. Gain de l'antenne doit tre ci-dessous:
Modle Type dAntenne FN990A28 FN990A40 Antenne monople omnidirectionnelle Table 55: ISED Antenna Type Gain maximum pour ISED (dBi) / Gain maximum pour ISDE (dBi) UMTS Max Gain to meet IC ERP/EIPP and MPE limit Max Gain to consider the same Frequency with LTE Max gain allowed B2 B4 B5 8.5 5.5 6.6 5.9 5.5 3.5 5.9 5.5 3.5 Table 5648: Max antenna gain for ISED in dBi / Gain d'antenne max pour ISED en dBi WCDMA bands 1VV0301752 Rev. 3 Page 78 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Gain maximum pour ISED (dBi) / Gain maximum pour ISDE (dBi) LTE Max Gain to meet IC ERP/EIRP and MPE limit Max Gain to consider EN-DC Active Max gain allowed B2 B4 B5 B7 B12 B13 B14 B17 B25 B26 B30 B38 B41 B42 B43 B48 B66 B71 9.0 6.0 7.1 9.0 6.6 6.9 7.0 6.7 9.0 7.1 1.0 9.0 5.5 0.5 0.5 0.5 6.0 6.0 5.9 5.5 3.5 3.8 3.6 3.9 3.9 3.6 5.9 3.5 1.0 3.8 3.8 0.5 0.5 0.5 5.5 2.9 5.9 5.5 3.5 3.8 3.6 3.9 3.9 3.6 5.9 3.5 1.0 3.8 3.8 0.5 0.5 0.5 5.5 2.9 Table 57: Max antenna gain for ISED in dBi / Gain d'antenne max pour ISED en dBi LTE bands Gain maximum pour ISED (dBi) / Gain maximum pour ISDE (dBi) Max Gain to meet IC ERP/EIRP and MPE limit Max Gain to consider EN-DC Active Max gain allowed 8.5 6.6 8.5 8.5 1.0 8.0 5.5 0.5 5.9 3.5 3.8 5.9 1.0 3.8 3.8 0.5 5.9 3.5 3.8 5.9 1.0 3.8 3.8 0.5 NR n2 n5 n7 n25 n30 n38 n41 n48 1VV0301752 Rev. 3 Page 79 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Gain maximum pour ISED (dBi) / Gain maximum pour ISDE (dBi) Max Gain to meet IC ERP/EIRP and MPE limit Max Gain to consider EN-DC Active Max gain allowed 5.5 6.0 0.5 0.5 5.5 2.9 0.5 0.5 5.5 2.9 0.5 0.5 NR n66 n71 n77 n78 Table 58: Max antenna gain for ISED in dBi / Gain d'antenne max pour ISED en dBi NR bands This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. L'metteur ne doit pas tre colocalis ni fonctionner conjointement avec autre antenne ou autre metteur. This equipment must be installed and operated in accordance with provided instructions and the antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. End-users and installers must be provided with antenna installation instructions and consider removing the no-collocation statement. Cet quipement doit tre install et utilis conformment aux instructions fournies et la ou les antennes utilises pour cet metteur doivent tre installes pour fournir une distance de sparation d'au moins 20 cm de toutes les personnes et ne doivent pas tre co-localises ou fonctionner en conjonction avec toute autre antenne ou metteur. Les utilisateurs finaux et les installateurs doivent recevoir les instructions d'installation de l'antenne et envisager de supprimer la dclaration de non-collocation. Information on test modes and additional testing requirement / Informations sur les modes de test et exigences de test supplmentaires The module has been evaluated in mobile stand-alone conditions. For operational in a host (multiple, conditions other than a stand-alone modular transmitter simultaneously transmitting modules or other transmitters in a host), additional testing may be required (collocation, retesting) If this module is intended for use in a portable device, you are responsible for separate approval to satisfy the SAR requirements IC RSS-
102. 1VV0301752 Rev. 3 Page 80 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Le module a t valu dans des conditions mobiles autonomes. Pour des conditions de fonctionnement autres qu'un metteur modulaire autonome dans un hte (plusieurs modules transmettant simultanment ou d'autres metteurs dans un hte), des tests supplmentaires peuvent tre ncessaires (colocalisation, retest) Si ce module est destin tre utilis dans un appareil portable , vous tes responsable de l'approbation spare pour satisfaire aux exigences SAR IC RSS-102. Labelling requirements for the host device / Exigences d'tiquetage pour le priphrique hte The host device shall be properly labelled to identify the modules within the host device. The certification label of the module shall be clearly visible at all times when installed in the host device, otherwise the host device must be labelled to display the IC of the module, preceded by the words "Contains transmitter module", or the word "Contains", or similar wording expressing the same meaning, as in the following table. L'appareil hte doit tre tiquet comme il faut pour permettre l'identification des modules qui s'y trouvent. L'tiquette de certification du module donn doit tre pose sur l'appareil hte un endroit bien en vue en tout temps. En l'absence d'tiquette, l'appareil hte doit porter une tiquette donnant le IC du module, prcd des mots Contient un module d'mission , du mot Contient ou d'une formulation similaire exprimant le mme sens, comme en tableau suivant. Model / HVIN Host device IC label / tiquette IC du dispositif hte FN990A28 FN990A40 Contains IC: 5131A-FN990A28 Contains IC: 5131A-FN990A40 Table 59: Host device IC label / tiquette IC du dispositif hte CAN ICES-3 (B) / NMB-3 (B) This Class B digital apparatus complies with Canadian ICES-003. Cet appareil numrique de classe B est conforme la norme canadienne ICES-003. APAC Approvals 11.3.1. Japan Approvals Telit strongly recommends to customers, deploying the module to Japan, the usage of AT#FWSWITCH command to select the right Japanese carrier profile. The carrier profile has been designed to enable the right LTE and WCDMA bands and also the required carrier settings. 1VV0301752 Rev. 3 Page 81 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 11.3.1.1. JRL/JTBL Regulatory Notices Antenna info According to Japan regulatory rule, module certification is valid only with the specific antennas registered to and approved by Japan Radio Law (JRL) certified body in relation to module certification. Customers who are going to use modules under JRL are responsible to contact Telit technical support or sales to get the list of these antennas. EMEA Approvals 11.4.1. EU RED 11.4.1.1. EU Declaration of Conformity In accordance with the above Approval Compliance Summary table, where applicable
(green ball), hereby, Telit Communications S.p.A declares that the equipment is in compliance with the Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address: https://www.telit.com/red Text of 2014/53/EU Directive (RED) requirements can be found here:
https://eur-lex.europa.eu/legal-content/EN/TXT/?uri=CELEX:32014L0053 11.4.1.2. RED Antennas This radio transmitter has been approved under RED to operate with the antenna types listed below with the maximum permissible gain indicated. The usage of a different antenna in the final hosting device may need a new assessment of host conformity to RED. Model Antenna Type FN990A28 FN990A40 Omnidirectional Monopole Antenna Table 60: RED Antenna Type 1VV0301752 Rev. 3 Page 82 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Max Gain for RED (dBi) UMTS Ant Gain to meet CE MPE limit Max Gain to consider same Frequency with LTE Max Gain to consider EN-DC Transmit with WLAN Max gain allowed B1 B3 B8 11.1 10.6 7.8 8.8 8.3 5.4 8.5 8.0 5.0 Table 61: Max Antenna Gain for RED in dBi WCDMA bands 8.5 8.0 5.0 Max Gain for RED (dBi) Ant Gain to meet CE MPE limit Max Gain to consider EN-DC Active Max Gain to consider EN-DC Transmit with WLAN Max gain allowed 11.8 11.3 12.0 8.5 8.2 7.5 12.0 12.0 12.0 15.0 8.8 8.3 9.0 5.4 5.1 4.4 9.0 9.0 9.0 8.5 8.0 8.6 5.0 4.8 4.0 8.6 8.6 8.6 8.5 8.0 8.6 5.0 4.8 4.0 8.6 8.6 8.6 12.0 11.0 11.0 LTE B1 B3 B7 B8 B20 B28 B38 B40 B42 B43 Table 62: Max Antenna Gain for RED in dBi LTE bands Max Gain for RED (dBi) Ant Gain to meet CE MPE limit Max Gain to consider EN-DC Active Max Gain to consider EN-DC Transmit with WLAN Max gain allowed 11.84 11.33 12.01 8.5 8.2 7.5 8.8 8.3 9 5.4 5.1 4.4 8.5 8 8.6 5.0 4.8 4.0 8.5 8.0 8.6 5.0 4.8 4.0 NR n1 n3 n7 n8 n20 n28 1VV0301752 Rev. 3 Page 83 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Max Gain for RED (dBi) Ant Gain to meet CE MPE limit Max Gain to consider EN-DC Active Max Gain to consider EN-DC Transmit with WLAN Max gain allowed 12.0 12.0 9.0 12.0 90.1 9.0 9.0 6.0 9.0 6.0 8.6 8.6 5.6 8.6 5.6 8.6 8.6 5.6 8.6 5.6 NR n38 n40 n41 n77 n78 Table 63: Max Antenna Gain for RED in dBi NR bands RoHS and REACH Info 11.5.1. RoHS Info Any requests on information related to RoHS certifications can be addressed to Chemical.Certifications@telit.com. 11.5.2. REACH Info Any requests on information related to REACH certifications can be addressed to Chemical.Certifications@telit.com. 1VV0301752 Rev. 3 Page 84 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 12. PRODUCT AND SAFETY INFORMATION Copyrights and Other Notices SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE Although reasonable efforts have been made to ensure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from the use of the information contained herein. The information contained in this document has been carefully checked and is believed to be reliable. Telit reserves the right to make changes to any of the products described herein, to revise it and to make changes from time to time without any obligation to notify anyone of such revisions or changes. Telit does not assume any liability arising from the application or use of any product, software, or circuit described herein; neither does it convey license under its patent rights or the rights of others. This document may contain references or information about Telits products (machines and programs), or services that are not announced in your country. Such references or information do not necessarily mean that Telit intends to announce such Telit products, programming, or services in your country. 12.1.1. Copyrights This instruction manual and the Telit products described herein may include or describe Telit copyrighted material, such as computer programs stored in semiconductor memories or other media. The laws in Italy and in other countries reserve to Telit and its licensors certain exclusive rights for copyrighted material, including the exclusive righ to copy, reproduce in any form, distribute and make derivative works of the copyrighted material. Accordingly, any of Telits or its licensors copyrighted material contained herein or described in this instruction manual, shall not be copied, reproduced, distributed, merged or modified in any way without the express written permission of the owner. Furthermore, the purchase of Telit products shall not be deemed to grant in any way, neither directly nor by implication, or estoppel, any license. 12.1.2. Computer Software Copyrights Telit and the Third Party supplied Software (SW) products, described in this instruction manual may include Telits and other Third Partys copyrighted computer programs stored in semiconductor memories or other media. The laws in Italy and in other countries reserve to Telit and other Third Party, SW exclusive rights for copyrighted 1VV0301752 Rev. 3 Page 85 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide computer programs, including but not limited to - the exclusive right to copy or reproduce in any form the copyrighted products. Accordingly, any copyrighted computer programs contained in Telits products described in this instruction manual shall not be copied (reverse engineered) or reproduced in any manner without the express written permission of the copyright owner, being Telit or the Third Party software supplier. Furthermore, the purchase of Telit products shall not be deemed to grant either directly or by implication, estoppel, or in any other way, any license under the copyrights, patents or patent applications of Telit or other Third Party supplied SW, except for the normal non-exclusive, royalty free license to use arising by operation of law in the sale of a product. Usage and Disclosure Restrictions 12.2.1. License Agreements The software described in this document is owned by Telit and its licensors. It is furnished by express license agreement only and shall be used exclusively in accordance with the terms of such agreement. 12.2.2. Copyrighted Materials The Software and the documentation are copyrighted materials. Making unauthorized copies is prohibited by the law. The software or the documentation shall not be reproduced, transmitted, transcribed, even partially, nor stored in a retrieval system, nor translated into any language or computer language, in any form or by any means, without prior written permission of Telit. 12.2.3. High Risk Materials Components, units, or third-party goods used in the making of the product described herein are NOT fault-tolerant and are NOT designed, manufactured, or intended for use as on-line control equipment in the following hazardous environments requiring fail-safe controls: operations of Nuclear Facilities, Aircraft Navigation or Aircraft Communication Systems, Air Traffic Control, Life Support, or Weapons Systems (High Risk Activities"). Telit and its supplier(s) specifically disclaim any expressed or implied warranty of fitness eligibility for such High Risk Activities. 1VV0301752 Rev. 3 Page 86 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 12.2.4. Trademarks TELIT and the Stylized T-Logo are registered in the Trademark Office. All other product or service names are property of their respective owners. 12.2.5. 3rd Party Rights The software may include Third Partys software Rights. In this case the user agrees to comply with all terms and conditions imposed in respect of such separate software rights. In addition to Third Party Terms, the disclaimer of warranty and limitation of liability provisions in this License, shall apply to the Third Party Rights software as well. TELIT HEREBY DISCLAIMS ANY AND ALL WARRANTIES EXPRESSED OR IMPLIED FROM ANY THIRD PARTY REGARDING ANY SEPARATE FILES, ANY THIRD PARTY MATERIALS INCLUDED IN THE SOFTWARE, ANY THIRD PARTY MATERIALS FROM WHICH THE SOFTWARE IS DERIVED (COLLECTIVELY OTHER CODES), AND THE USE OF ANY OR ALL OTHER CODES IN CONNECTION WITH THE SOFTWARE, INCLUDING (WITHOUT LIMITATION) ANY WARRANTIES OF SATISFACTORY QUALITY OR FITNESS FOR A PARTICULAR PURPOSE. NO THIRD PARTY LICENSORS OF OTHER CODES MUST BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING WITHOUT LIMITATION LOST OF PROFITS), HOWEVER CAUSED AND WHETHER MADE UNDER CONTRACT, TORT OR OTHER LEGAL THEORY, ARISING IN ANY WAY OUT OF THE USE OR DISTRIBUTION OF THE OTHER CODES OR THE EXERCISE OF ANY RIGHTS GRANTED UNDER EITHER OR BOTH THIS LICENSE AND THE LEGAL TERMS APPLICABLE TO ANY SEPARATE FILES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 12.2.6. Waiwer of Liability IN NO EVENT WILL TELIT AND ITS AFFILIATES BE LIABLE FOR AY DIRECT, INDIRECT, SPECIAL, GENERAL, INCIDENTAL, CONSEQUENTIAL, PUNITIVE OR EXEMPLARY INDIRECT DAMAGE OF ANY KIND WHATSOEVER, INCLUDING BUT NOT LIMITED TO REIMBURSEMENT OF COSTS, COMPENSATION OF ANY DAMAGE, LOSS OF PRODUCTION, LOSS OF PROFIT, LOSS OF USE, LOSS OF BUSINESS, LOSS OF DATA OR REVENUE, WHETHER OR NOT THE POSSIBILITY OF SUCH DAMAGES COULD HAVE BEEN REASONABLY FORESEEN, CONNECTD IN ANY WAY TO THE USE OF THE PRODUCT/S OR TO THE INFORMATION CONTAINED IN THE PRESENT DOCUMENTATION, EVEN IF TELIT AND/OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR THEY ARE FORESEEABLE OR FOR CLAIMS BY ANY THIRD PARTY. 1VV0301752 Rev. 3 Page 87 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide Safety Recommendations Make sure the use of this product is allowed in your country and in the environment required. The use of this product may be dangerous and has to be avoided in areas where:
it can interfere with other electronic devices, particularly in environments such as hospitals, airports, aircrafts, etc. there is a risk of explosion such as gasoline stations, oil refineries, etc. It is the responsibility of the user to enforce the country regulation and the specific environment regulation. Do not disassemble the product; any mark of tampering will compromise the warranty validity. We recommend following the instructions of the hardware user guides for correct wiring of the product. The product has to be supplied with a stabilized voltage source and the wiring has to be conformed to the security and fire prevention regulations. The product has to be handled with care, avoiding any contact with the pins because electrostatic discharges may damage the product itself. Same cautions have to be taken for the SIM, checking carefully the instruction for its use. Do not insert or remove the SIM when the product is in power saving mode. The system integrator is responsible for the functioning of the final product. Therefore, the external components of the module, as well as any project or installation issue, have to be handled with care. Any interference may cause the risk of disturbing the GSM network or external devices or having an impact on the security system. Should there be any doubt, please refer to the technical documentation and the regulations in force. Every module has to be equipped with a proper antenna with specific characteristics. The antenna has to be installed carefully in order to avoid any interference with other electronic devices and has to guarantee a minimum distance from the body (20 cm). In case this requirement cannot be satisfied, the system integrator has to assess the final product against the SAR regulation. The equipment is intended to be installed in a restricted area location. The equipment must be supplied by an external specific limited power source in compliance with the standard EN 62368-1:2014. The European Community provides some Directives for the electronic equipment introduced on the market. All of the relevant information is available on the European Community website:
https://ec.europa.eu/growth/sectors/electrical-engineering_en 1VV0301752 Rev. 3 Page 88 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 13. GLOSSARY CA CLK CMOS DTE EN-DC ESR Carrier aggregation Clock Complementary Metal Oxide Semiconductor Data Terminal Equipment E-UTRA NR Dual Connectivity Equivalent Series Resistance E-UTRA Evolved UMTS Terrestrial Radio Access FDD GPIO HS HSDPA HSUPA I/O I2C I2S LTE NR PCB PCIE RTC SIM SOC SMPS TDD TTSC UART UMTS USB VNA VSWR Frequency Division Duplex General Purpose Input Output High Speed High Speed Downlink Packet Access High Speed Uplink Packet Access Input Output Inter-integrated Circuit Inter-IC Sound Long Term Evolution New Radio Printed Circuit Board Peripheral Component Interconnect Express Real Time Clock Subscriber Identification Module System-on-Chip Switching Mode Power Supply Time Division Duplex Telit Technical Support Center Universal Asynchronous Receiver Transmitter Universal Mobile Telecommunication System Univeral Serial Bus Vector Network Analyzer Voltage Standing Wave Radio 1VV0301752 Rev. 3 Page 89 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide WDMA Wideband Code Division Muliple Access 1VV0301752 Rev. 3 Page 90 of 92 2022-10-07 Not Subject to NDA FN990 Family Hardware Design Guide 14. DOCUMENT HISTORY Revision Date Changes 3 2022-10-07 Section 2.2.1 Updated Frequency Bands Section 2.6 Updated RF Performance Section 2.4 PCIe Gen 4 -> PCIe Gen 3 Section 3.1 Updated 3.1 Pin-out Section 3.3 Updated 3.3 Pin Layout Section 4.2 Updated Power consumption Section 6.3.1.2.1 Added PCIe Layout Guidelines Section 6.3.1.3.1 Added USB Layout Guidelines Section 6.4 Updated General Purpose I/O Section 7.1.1 Updated Antenna Configuration Section 7.2 Updated Antenna Connector 2 1 Section 8.4 Solder Resist Opening Area and Keepout Area added Section 11. Updated CONFORMITY ASSESTMENT ISSUES Section 13. Updated Glossary 2022-06-09 Section 6.2 Updated Power ON/OFF/RESET 2022-04-22 Section 2.4, 6.3.2, 6.3.3 Updated eSIM description Section 4.2 Updated Power consumption Section 2.6.2 Conducted Receiver Sensitivity Section 2.4 Updated Processor Clock Section 3.1 Updated Pin-out Section 3.3 Updated Pin Layout Section 4.1 Updated Power Supply Requirements Section 4.2 Updated LPM Power Consumption Section 6.1 Updated I/O Operating Range Section 6.2 Updated Power ON/OFF/RESET Section 6.3 Added and updated information about interfaces 0 2021-12-16 First Draft From Mod.0818 rev.2 1VV0301752 Rev. 3 Page 91 of 92 2022-10-07 Not Subject to NDA