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Bluetrum Technology AB53XX Audio Player Microcontroller User Manual Bluetooth Speaker ARG-SP-3016BK Versions: 0.0.7 2018/09/27 Declaration Copyright 2018, www. bluetrum.com. All Rights Reserved. No Unauthorized Distribution. Bluetrum reserves the right to make changes without further notice to any products herein to improve reliability, function or design. For further information on the technology, product and business term, please contact Bluetrum Company. For sales or technical support, please send email to the address:
Sales: sales@bluetrum.com Technical: project@bluetrum.com Bluetrum Technology Appendix I Revision History Date 2018-07-03 2018-07-12 2018-08-13 2018-08-24 2018-09-11 2018-09-27 Version Comments Revised by 0.0.1 0.0.2 0.0.3 0.0.5 0.0.6 0.0.7 First draft Add PWM Add RTC Add QDID Update uart0baud description Remove package Leo Hugo Hugo Hugo Leo Leo Table of content 3 Table of Contents TABLE OF CONTENTS ............................................................................................................................................. 3 1 PRODUCT OVERVIEW.................................................................................................................................... 5 1.1 1.2 INTRODUCE .......................................................................................................................................................... 5 FEATURES ............................................................................................................................................................ 6 2 INTERRUPTS ................................................................................................................................................. 7 2.1 INTERRUPTS SPECIAL REGISTERS ............................................................................................................................... 8 3 GPIO MANAGEMENT .................................................................................................................................. 10 3.1 3.2 3.3 3.4 FEATURES .......................................................................................................................................................... 10 GPIO GENERAL CONTROL REGISTER ........................................................................................................................ 10 GPIO FUNCTION MAPPING ................................................................................................................................... 11 EXTERNAL PORT INTERRUPT WAKE UP ..................................................................................................................... 13 4 TIMER ......................................................................................................................................................... 15 4.1 4.2 4.3 FEATURES .......................................................................................................................................................... 15 TIMER0/1/2 SPECIAL FUNCTION REGISTERS ............................................................................................................ 15 TIMER3/4/5 SPECIAL FUNCTION REGISTERS ............................................................................................................ 16 5 PWM .......................................................................................................................................................... 18 5.1 5.2 FEATURES .......................................................................................................................................................... 18 SPECIAL FUNCTION REGISTERS ............................................................................................................................... 18 6 RTC ............................................................................................................................................................. 20 6.1 6.2 6.3 FEATURES .......................................................................................................................................................... 20 SPECIAL FUNCTION REGISTERS ............................................................................................................................... 20 INDEPENDENT POWER RTC REGISTERS .................................................................................................................... 21 7 UART0 ........................................................................................................................................................ 25 7.1 7.2 7.3 FEATURES .......................................................................................................................................................... 25 UART0 SPECIAL FUNCTION REGISTERS ................................................................................................................... 25 USER GUIDE ...................................................................................................................................................... 26 8 SPI1 ............................................................................................................................................................ 27 8.1 8.2 8.3 FEATURES .......................................................................................................................................................... 27 SPI1 SPECIAL FUNCTION REGISTERS ....................................................................................................................... 27 USER GUIDE ...................................................................................................................................................... 29 9 CHARACTERISTICS ....................................................................................................................................... 31 9.1 PMU PARAMETERS ............................................................................................................................................. 31 Copyright 2018, www. bluetrum.com. All Rights Reserved 3 Table of content 4 9.2 9.3 9.4 9.5 9.6 IO PARAMETERS ................................................................................................................................................. 31 AUDIO DAC PARAMETERS .................................................................................................................................... 32 AUDIO ADC PARAMETERS .................................................................................................................................... 32 BT PARAMETERS ................................................................................................................................................. 32 CURRENT PARAMETERS ........................................................................................................................................ 33 Copyright 2018, www. bluetrum.com. All Rights Reserved 4 1Product Overview 5 1 Product Overview 1.1 Introduce AB53XX is a 32 bits RISC microcontroller. It integrates advanced digital and analog peripherals to audio player applications. Copyright 2018, www. bluetrum.com. All Rights Reserved 5 PMU(Charger/Buck)CPUMemoryBluetoothADCDAC/PASPDIF RXIISFM RXFM TXSD/MMCUSB2.0IRKEYSPIUARTGPIO/PWMLEDPACODECOther ApplicationDSP ENGINE 1Product Overview 6 1.2 Features CPU and Flexible IO 32bit High performance CPU with DSP instruction Flexible GPIO pins with Programmable pull-up and pull-down resistors;
Support GPIO wakeup or interrupt;
Bluetooth Radio Compliant to Bluetooth specification (QDID: 115952);
5.0 and BLE TX output power +2db in typical;
RX Sensitivity with -90.5dBm @Basic Rate;
FM Tuner Support frequency band 76~108MHz;
Auto search tuning;
Programable de-emphasis(50/75uS);
Receive signal strength indicator (RSSI);
Audio Interface Audio codec with 16bit stereo DAC and two channel 16bit ADC;
Support flexible audio EQ adjust;
Support Sample rate 8, 11.025, 12, 16, 22.05, 32, 44.1 and 48KHz;
4 channel Stereo Analog MUX;
Two channel MIC amplifier input;
SNR, with headphone amplifier output;
Peripheral and Interfaces Three 32-bit timers;
Three multi-function 32-bit timers, support Capture and PWM mode;
WatchDog;
Three full-duplex UART;
Two SPI;
IR controller;
SD Card Host controller;
SPDIF receiver;
Audio interface IIS;
Full speed USB 2.0 HOST/DEVICE controller;
Sixteen Channels 10-bit SARADC;
Integrate IRTC;
Build in PMU, such as charger/buck/LDO;
Package LQFP48;
SSOP28L;
SSOP24L;
TSSOP24;
TSSOP20;
SOP16;
Temperature High performance Stereo audio ADC with 90dB SNR;
Operating temperature: -40 to +85;
High performance Stereo audio DAC with 95dB Storage temperature: -65 to +150;
Copyright 2018, www. bluetrum.com. All Rights Reserved 6 2Interrupts 7 2 Interrupts Support vectorized interrupts, exceptions on illegal instructions and exceptions on load and store instructions to invalid addresses. Exception vectors Interrupt number Address Description 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 Reset Low priority interrupt 0x80~0x280 High priority interrupt(see the following table) 0 1 2 3 4 5 6 7 8 High priority interrupt vectors Interrupt number Address Description 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 0x80 0x90 0xa0 0xb0 0xc0 Software interrupt Timer0 interrupt Timer1 interrupt Timer2 interrupt 0xd0 Timer4 interrupt Timer5 interrupt Timer3 interrupt IR receiver interrupt 0xe0 0xf0 0x100 0x110 0x120 0x130 0x140 0x150 UART0 interrupt 0x160 UART1 interrupt UART2 interrupt 0x170 0x180 0x190 0x1a0 0x1b0 0x1c0 0x1d0 0x1e0 0x1f0 0x200 0x210 0x220 0x230 0x240 0x250 Port interrupt Copyright 2018, www. bluetrum.com. All Rights Reserved 7 2Interrupts 8 Interrupt number 30 31 Address Description 0x260 0x270 2.1 Interrupts Special Registers Register 2-1PICCON: Peripheral interrupt control Register Mode Default Description Bit Name 31:17
-
16 GIEM 15:8 7:3
-
-
-
WR
-
-
2 1 0 HPINTEN WR LPINTEN WR GIE WR
-
1
-
-
0 0 0 Unused Global interrupt enable mask bit 0: disable interrupt 1: enable interrupt Unused Unused High priority interrupt enable bit 0: disable 1: enable Low priority interrupt enable bit 0: disable 1: enable Global interrupt enable bit 0: disable interrupt 1: enable interrupt Register 2-2PICCONSET: Peripheral interrupt control set Register Bit Name 31:17
-
16 15:8 7:3 2 1 0 GIEM
-
-
HPINTEN LPINTEN GIE Mode Default Description
-
W
-
-
W W W
-
0
-
-
0 0 0 Unused Write 1 enable Global interrupt enable mask Unused Unused Write 1 enable High priority interrupt Write 1 enable Low priority interrupt Write 1 enable Global interrupt Register 2-3PICCONCLR: Peripheral interrupt control clear Register Bit Name 31:17
-
16 15:8 7:3 2 1 0 GIEMDIS
-
-
HPINTDIS LPINTDIS GIEDIS Mode Default Description
-
W
-
-
W W W
-
0
-
-
0 0 0 Unused Write 1 disable Global interrupt enable mask Unused Unused Write 1 disable High priority interrupt Write 1 disable Low priority interrupt Write 1 disable Global interrupt Register 2-4PICEN: Peripheral interrupt enable Register Bit Name Mode Default Description 31:0 IntEN WR 0x0 Interrupt 31 to 0 enable bit 0: disable 1: enable Register 2-5PICENSET: Peripheral interrupt enable set Register Bit 31:0 Name IntEN Mode Default Description W 0x0 Write 1 enable Interrupt 31 to 0 Register 2-6PICENCLR: Peripheral interrupt enable clear Register Copyright 2018, www. bluetrum.com. All Rights Reserved 8 0 9 Bit 31:0 Name IntDIS Mode Default Description W 0x0 Write 1 disable Interrupt 31 to 0 Register 2-7PICPR: Peripheral high priority interrupt selection Register Bit Name Mode Default Description Interrupt 31 to 0 priority selection bit 31:0 IntPR WR 0x0 0: low priority interrupt 1: high priority interrupt Register 2-8PICADR: Peripheral interrupt address Register Bit Name 31:10 BADR 9:0
-
Mode Default Description WR
-
0x40 0x0 Interrupt entry address Register 2-9PICPND: Peripheral interrupt pending Register Bit Name Mode Default Description 31:3 IntPND[31:4]
R 0x0 0: no interrupt pending 1: interrupt pending Interrupt 31 to 4 pending bit 2 SWIPND WR 0 Software interrupt pending. Write 1 will clear software interrupt pending 1:0 IntPND[2:0]
R 0x0 0: no interrupt pending 1: interrupt pending Interrupt 2 to 0 pending bit Copyright 2018, www. bluetrum.com. All Rights Reserved 9 3GPIO Management 10 3 GPIO Management 3.1 Features 1. Control GPIO input/output direction by using direction register;
2. Internal pull-up/pull-down resistor by using pull-up/pull-down resistor control register;
3. Select suitable output driving current capability;
3.2 GPIO general control register Register 3-1GPIOA: Port A data Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused 7:0 GPIOA WR 0x00 0: PAx is input low state when read and output low at PAx when write;
1:PAx is input high state when read and output high at PAx when write PAx data. Valid when PAx is used as GPIO Register 3-2GPIOASET: Port A Set output data Register Bit 31:8 7:0 Name
-
GPIOASET Mode Default Description
-
WO
-
X Unused Set Pax output data. Write 1 set output data. Write 0 affect nothing. Register 3-3GPIOACLR: Port A clear output data Register Bit 31:8 7:0 Name
-
GPIOACLR Mode Default Description
-
WO
-
X Unused Clear Pax output data. Write 1 clear output data. Write 0 affect nothing. Register 3-4GPIOADIR: Port A direction Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused PAx direction control 7:0 GPIOADIR WR 0xFF 0: Output 1: Input Register 3-5GPIOAPU: Port A pull-up Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused PAx 10K pull-up resister control. Valid when PAx is used as input 7:0 GPIOAPU WR 0x0 0: disable 1: enable Register 3-6GPIOAPD: Port A pull-down resister Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused 7:0 GPIOAPD WR 0x0 0: disable 1: enable Register 3-7GPIOAPU200K: Port A pull-up resister Register PAx 10K pull-down resister control. Valid when PAx is used as input Copyright 2018, www. bluetrum.com. All Rights Reserved 10 3GPIO Management 11 Bit 31:8 Name
-
Mode Default Description
-
-
Unused PAx 200K pull-up resister control. Valid when PAx is used as input 7:0 GPIOAPU WR 0x0 0: disable 1: enable Register 3-8GPIOAPD200K: Port A pull-down resister Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused PAx 200K pull-down resister control. Valid when PAx is used as input 7:0 GPIOAPD WR 0x0 0: disable 1: enable Register 3-9GPIOAPU300: Port A pull-up resister Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused PAx 300 pull-up resister control. Valid when PAx is used as input 7:0 GPIOAPU WR 0x0 0: disable 1: enable Register 3-10GPIOAPD300: Port A pull-down resister Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused PAx 300 pull-down resister control. Valid when PAx is used as input 7:0 GPIOAPD WR 0x0 0: disable 1: enable Register 3-11GPIOADE: Port A digital function enable register Bit 31:8 Name
-
Mode Default Description
-
-
Unused 7:0 GPIOADE WR 0xFF 0: Port used as analog IO 1: Port used as digital IO PAx digital function enable Register 3-12GPIOAFEN: Port A function mapping enable register Bit 31:8 Name
-
Mode Default Description
-
-
Unused 7:0 GPIOAFEN WR 0xFF 0: Port used as GPIO 1: Port used as function IO PAx function mapping enable Register 3-13GPIOADRV: Port A output driving select Register Bit 31:8 Name
-
Mode Default Description
-
-
Unused 7:0 GPIOADRV WR 0x0 PAx output driving select 0: 8mA 1: 32mA 3.3 GPIO function mapping Register 3-14FUNCMCON0: Port function mapping control Register 0 Bit Name Mode Default Description 31:28 UT1RXMAP WR 0x0 UART1 RX mapping 0000: no affect 0001: map to G1 0010: map to G2 Copyright 2018, www. bluetrum.com. All Rights Reserved 11 3GPIO Management 12 Bit Name Mode Default Description 0011: map to TX pin by UT1TXMAP select 27:24 UT1TXMAP WR 0x0 1111: Clear these bits Others is reserved UART1 TX mapping 0000: no affect 0001: map to G1 0010: map to G2 1111: Clear these bits Others is reserved 23:20 19:16 15:12 UT0RXMAP WR 0x0 0100: map to G4 UART0 RX mapping 0000: no affect 0001: map to G1 0010: map to G2 0011: map to G3 0101: map to G5 0110: map to G6 0111: map to TX pin by UT0TXMAP select 1111: Clear these bits Others is reserved UART0 TX mapping 0000: no affect 0001: map to G1 0010: map to G2 0011: map to G3 11:8 UT0TXMAP WR 0x0 0100: map to G4 0101: map to G5 0110: map to G6 0111: map to G7 1111: Clear these bits Others is reserved SPI0 mapping 0000: no affect 0001: map to G1 7:4 SPI0MAP WR 0x0 0010: map to G2 3:0 SD0MAP WR 0x0 0011: map to G3 1111: Clear these bits Others is reserved SD0 mapping 0000: no affect 0001: map to G1 0010: map to G2 0011: map to G3 0100: map to G4 0101: map to G5 0110: map to G6 1111: Clear these bits Others is reserved Register 3-15FUNCMCON1: Port function mapping control Register 1 Bit Name Mode Default 31:28 27:24 23:20 19:16 15:12 11:8 UT2RXMAP WR 0x0 Description UART2 RX mapping 0000: no affect Copyright 2018, www. bluetrum.com. All Rights Reserved 12 3GPIO Management 13 Bit Name Mode Default Description 0001: map to G1 0010: map to G2 0011: map to TX pin by UT2TXMAP select 1111: Clear these bits Others is reserved UART2 TX mapping 0000: no affect 0001: map to G1 0010: map to G2 1111: Clear these bits Others is reserved 7:4 UT2TXMAP WR 0x0 3:0 Register 3-16FUNCMCON2: Port function mapping control Register 2 Bit Name Mode Default Description 31:24 23:20
-
-
-
Unused 19:16 TMR5MAP WR 0x0 0001: map to G1 Timer5 PWM mapping 0000: no affect 1111: Clear these bits Others is reserved Timer4 PWM mapping 0000: no affect 15:12 TMR4MAP WR 0x0 0001: map to G1 11:8 TMR3MAP WR 0x0 0001: map to G1 1111: Clear these bits Others is reserved Timer3 PWM mapping 0000: no affect 1111: Clear these bits Others is reserved Timer3 capture Pin mapping 0000: no affect 0001: map to G1 0010: map to G2 0011: map to G3 7:4 TMR3CPTMAP WR 0x0 0100: map to G4 3:0 0101: map to G5 0110: map to G6 0111: map to G7 1111: Clear these bits Others is reserved 3.4 External Port interrupt wake up Support eight wakeup source input, as the following table. Wakeup source PA7 PB1 PB2 PB3 PB4 WKO PORT_INT_FALL PORT_INT_RISE Wakeup circuit Wakeup circuit 0 Wakeup circuit 1 Wakeup circuit 2 Wakeup circuit 3 Wakeup circuit 4 Wakeup circuit 5 Wakeup circuit 6 Wakeup circuit 7 Copyright 2018, www. bluetrum.com. All Rights Reserved 13 3GPIO Management 14 Register 3-17WKUPCON: Wake up control Register Mode Default Description Bit Name 31:17
-
16 WKIE 15:8
-
-
WR
-
-
0
-
7:0 WKEN WR 0x0 Unused Wake up interrupt enable 0: disable 1: enable Unused Wake up input 7~0 enable 0: disable 1: enable Register 3-18WKUPEDG: Wake up edge select Register Bit Name 31:24
-
23:16 WKPND 15:8
-
Mode Default Description
-
R
-
-
Unused Wake up input 7~0 pending 0x0 0: no pending 1: wake up pending
-
Unused Wake up input 7~0 wakeup edge select 7:0 WKEDG WR 0x0 0: rising edge 1: falling edge Register 3-19WKUPCPND: Wake up clear pending Register Bit 31:8 Name
-
23:16 WKCPND 15:0
-
Mode Default Description
-
W
-
-
Unused Wake up input 7~0 clear pending 0x0 0: no affect 1: clear wake up pending
-
Unused Register 3-20PORTINTEN: Port interrupt enable Register Bit Name Mode Default Description 31:0 PORTINTEN WR 0x0 Port interrupt 0~31 enable bit 0: disable 1: enable Register 3-21PORTINTEDG: Port interrupt edge select Register Bit Name Mode Default Description 31:0 PORTINTEDG WR 0x0 Port interrupt 0~31 edge select bit 0: rise edge 1: fall edge Copyright 2018, www. bluetrum.com. All Rights Reserved 14 15 4Timer 4 Timer 4.1 Features 1. Timer0/1/2, only support 32bit timer function 2. Timer3/4/5, can be configured to Timer-mode, Counter-mode, Capture-mode and PWM-mode 4.2 Timer0/1/2 Special Function Registers Register 4-1TMR0CON/TMR1CON/TMR2CON: Timer0/1/2 Control Register Bit Name 31:10
-
9 8 7 6 TPND
-
TIE INCSRC 5:4
-
Mode Default Description
-
WR
-
WR WR
-
-
0
-
0 0
-
Unused Timer overflow pending 0: not overflow 1: overflow Unused Timer overflow interrupt enable 0: disable 1: enable Increase source select 0: select TMR_INC 1: select external PIN Unused Increase clock selection 00: System Clock 3:2 INCSEL WR 0x0 01: Counter input rising 1 0
-
TMREN
-
WR
-
0 10: Counter input falling 11: Counter input edge Unused Timer Enable Bit 0: Disable 1: Enable Register 4-2TMR0CPND/TMR1CPND/TMR2CPND: Timer0/1/2 clear pending Register Bit Name 31:16
-
9 TPCLR 8:0
-
Mode Default Description
-
W
-
-
0
-
Unused Timer overflow pending clear bit 0: inactive 1: clear pending Unused Register 4-3TMR0CNT/TMR1CNT/TMR2CNT: Timer0/1/2 counter Register Bit Name Mode Default Description 31:0 TMRCNT WR 0x0 Timer counter. TMRCNT will increase when timer is enabled. It overflows when TMRCNT =
TMRPR, TMRCNT will be clear to 0x0000 when overflow, and the interrupt flag will be set 1. Register 4-4TMR0PR/TMR1PR/TMR2PR: Timer0/1/2 period Register Bit 31:0 Name TMRPR Mode Default Description WR 0xffffffff Timer period = TMRPR + 1 Copyright 2018, www. bluetrum.com. All Rights Reserved 15 4Timer 16 4.3 Timer3/4/5 Special Function Registers Register 4-5TMR3CON/TMR4CON/TMR5CON: Timer3/4/5 Control Register Mode Default Description Bit Name 31:18
-
17 CPND 16 TPND 15:12
-
11 PWM2EN
-
WR WR
-
WR 10 PWM1EN WR 9 8 7 6 PWM0EN WR CIE TIE WR WR INCSRC WR
-
0 0
-
0 0 0 0 0 0 Unused Timer capture pending 0: not capture 1: capture Timer overflow pending 0: not overflow 1: overflow Unused Timer pwm2 enable bit 0: disable 1: enable Timer pwm1 enable bit 0: disable 1: enable Timer pwm0 enable bit 0: disable 1: enable Timer capture interrupt enable 0: disable 1: enable Timer overflow interrupt enable 0: disable 1: enable Increase source select 0: select TMR_INC 1: select external PIN Timer Capture edge select 00: No Capture 5:4 CPTEDSEL WR 0x0 01:Capture PIN rising edge 10: Capture PIN falling edge 11: Capture PIN edge Increase clock selection 00: System Clock 3:2 INCSEL WR 0x0 01: Counter input rising 1 0 CPTEN TMREN WR WR 0 0 10: Counter input falling 11: Counter input edge Timer capture Enable Bit 0: Disable 1: Enable Timer Enable Bit 0: Disable 1: Enable Register 4-6TMR3CPND/TMR4CPND/TMR5CPND: Timer3/4/5 clear pending Register Bit Name 31:18
-
17 CPCLR 16 TPCLR 15:0
-
Mode Default Description
-
W W
-
-
0 0
-
Unused Capture pending clear bit 0: inactive 1: clear pending Timer overflow pending clear bit 0: inactive 1: clear pending Unused Register 4-7TMR3CNT/TMR4CNT/TMR5CNT: Timer3/4/5 counter Register Copyright 2018, www. bluetrum.com. All Rights Reserved 16 4Timer 17 Bit Name Mode Default Description 31:0 TMRCNT WR 0x0 Timer counter. TMRCNT will increase when timer is enabled. It overflows when TMRCNT =
TMRPR, TMRCNT will be clear to 0x0000 when overflow, and the interrupt flag will be set 1. Register 4-8TMR3PR/TMR4PR/TMR5PR: Timer3/4/5 period Register Bit 31:0 Name TMRPR Mode Default Description WR 0xffffffff Timer period = TMRPR + 1 Register 4-9TMR3CPT/TMR4CPT/TMR5CPT: Timer3/4/5 capture value Register Bit 31:0 Name TMRCPT Mode Default Description R x Timer capture value Register 4-10TMR3DUTY0/TMR4DUTY0/TMR5DUTY0: Timer3/4/5 pwm0 duty Register Bit Name 31:16
-
15:0 TMRDUTY0 Mode Default Description
-
W
-
x Unused Timer pwm0 duty PWM0 low level length is TMRDUTY0+1 PWM 0 high level length is TMRPR-TMRDUTY0+1 Register 4-11TMR3DUTY1/TMR4DUTY1/TMR5DUTY1: Timer3/4/5 pwm1 duty Register Bit Name 31:16
-
15:0 TMRDUTY1 Mode Default Description
-
W
-
x Unused Timer pwm1 duty PWM1 low level length is TMRDUTY1+1 PWM1 high level length is TMRPR-TMRDUTY1+1 Register 4-12TMR3DUTY2/TMR4DUTY2/TMR5DUTY2: Timer3/4/5 pwm2 duty Register Bit Name 31:16
-
15:0 TMRDUTY2 Mode Default Description
-
W
-
x Unused Timer pwm2 duty PWM2 low level length is TMRDUTY2+1 PWM2 high level length is TMRPR-TMRDUTY2+1 Copyright 2018, www. bluetrum.com. All Rights Reserved 17 18 5PWM 5 PWM 5.1 Features Four channel PWM for Breathing-lamp 5.2 Special Function Registers Register 5-1 PWMCON: PMW Configure Register Bit 31:5 Name PWMIVN Mode Default WR 5 4 3 2 1 0 AUTOADJUST WR PWM3EN PWM2EN PWM1EN PWM0EN WR WR WR WR Description PWM invert enable 0: duty is high level 1: duty is low level PWM Auto Adjust enable 0: disable 1: enable PWM3 enable 0: disable 1: enable PWM2 enable 0: disable 1: enable PWM1 enable 0: disable 1: enable PWM0 enable 0: disable 1: enable Description 0 0 0 0 0 0 Register 5-2 PWMPR: PMW period Register Bit 31:16 15:0 Name PWMPR Mode Default WR 0xffff PWM period = (PWMPR+1) * Tpwmclk Register 5-3 PWM01DUT: PWM0/1 duty registers Bit 31:16 15:0 Name PWM1DUT PWM0DUT Mode Default Description WR WR 0x0 0x0 PWM1 duty register ; Duty = PWM1DUT/ PWMPR PWM0 duty register ; Duty = PWM0DUT/ PWMPR Register 5-4 PWM23DUT: PWM2/3 duty registers Bit 31:16 15:0 Name PWM3DUT PWM2DUT Mode Default Description WR WR 0x0 0x0 PWM3 duty register ; Duty = PWM3DUT/ PWMPR PWM2 duty register ; Duty = PWM2DUT/ PWMPR Register 5-5 PWMCYCNUM: PWM adjust cycle number register Bit Name Mode Default Description PWM3 Duty adjust cycle num 31:24 PWM3CYCNUM WR 0x0 When AUTOADJUST = 1, each PWM3CYCNUM Duty add
(PWM3STEP/ PWMPR) PWM2 Duty adjust cycle num 23:16 PWM2CYCNUM WR 0x0 When AUTOADJUST = 1, each PWM2CYCNUM Duty add 15:8 PWM1CYCNUM WR 0x0 When AUTOADJUST = 1, each PWM1CYCNUM Duty add 7:0 PWM0CYCNUM WR 0x0
(PWM1STEP/ PWMPR) PWM0 Duty adjust cycle num When AUTOADJUST = 1, each PWM0CYCNUM Duty add
(PWM2STEP/ PWMPR) PWM1 Duty adjust cycle num Copyright 2018, www. bluetrum.com. All Rights Reserved 18 5PWM 19 Bit Name Mode Default Description
(PWM0STEP/ PWMPR) Register 5-6 PWMSTEP: PWM Step register Bit 31:24 23:16 15:8 7:0 Name PWM3STEP PWM2STEP PWM1STEP PWM0STEP Mode Default Description 0x0 0x0 0x0 0x0 PWM3 Duty adjust step PWM2 Duty adjust step PWM1 Duty adjust step PWM0 Duty adjust step WR WR WR WR Copyright 2018, www. bluetrum.com. All Rights Reserved 19 20 6RTC 6 RTC 6.1 Features 1. Support 32bit Independent power supply real time counter 2. Support alarm interrupt and second interrupt 6.2 Special Function Registers Register 6-1RTCCON: RTC Control Register Mode Default Description Bit Name 31:13
-
20 VUSBONLINE 19 RTCWKP 18 RTC1SPND 17 ALMPND 16 RTCPND 15:9
-
-
R R R R R
-
8 7 6 5 4 3 ALM_WKEN WR RTC1S_WKEN WR VUSBRSTEN WR WKUPRSTEN WR ALMIE WR RTC1SIE WR
-
0 0 0 0 0
-
0 0 0 0 0 0 Unused VUSB online state 0: not online 1: online RTC WK pin state 0: WK pin state is 0 1: WK pin state is 1 RTC 1s pending 0: no pending 1: 1s pending RTC alarm pending 0: no pending 1: alarm pending RTC trans done 0: done 1:not done Unused RTC alarm wakeup enable 0: disable 1: enable RTC 1S wakeup enable 0: disable 1: enable VUSB insert reset system enable 0: disable 1: enable RTC wake up power down mode reset system enable 0: disable 1: enable RTC alarm interrupt enable 0: disable 1: enable RTC 1S interrupt enable 0: disable 1: enable Increase clock selection 00: System Clock divide 4 2:1 BAUDSEL WR 0x0 01: System Clock divide 8 0 RTCCS WR 0 10: System Clock divide 16 11: System Clock divide 32 RTC cs 0:disabled Copyright 2018, www. bluetrum.com. All Rights Reserved 20 6RTC 21 Bit Name Mode Default Description 1:enable Register 6-2RTCDAT: RTC data Register Bit Name 31:10
-
Mode Default Description
-
-
Unused RTC cmd 00: data 9:8 RTCMD W 0x0 01: read command 7:0 RTCDAT WR x 10: write command 11: reserve RTC data Register 6-3RTCCPND: RTC clear pending Register Bit Name Mode Default Description 31:19
-
18 17 C1SPND CALMPND 16:0
-
-
R R
-
-
0 0
-
Unused Write 1 will clear RTC 1S pending Write 1 will clear RTC alarm pending Unused 6.3 Independent Power RTC Registers Register 6-4 RTCCNT: RTC counter Register Bit 31:0 Name RTCCNT Mode WR Default Description 0x0 32bit RTC counter Register 6-5 RTCALM: RTC alarm Register Bit 31:0 Name RTCALM Mode WR Default Description 0xffffffff 32bit RTC alarm Register 6-6 RTCCON0: RTC control Register 0 Bit Name Mode Default Description 7 6 5 4 3 2 1 0 PWRUP1ST WR EXT32KS RSV RSV RSV RSV X32KEN RSV WR WR WR WR WR WR WR 1 0 1 0 0 0 0 0 Register 6-7 RTCCON1: RTC control Register 1 RTC first power up flag 0: not first power up 1: first power up External 32K select 0: use RTC internal 32K osc 1: use external 32K osc Reserve, cant be changed default value Reserve, cant be changed default value Reserve, cant be changed default value Reserve, cant be changed default value XOSC32K enable bit 0: disable 1: enable Reserve, cant be changed default value Bit 7 6 5 Name
-
VRTCEN
-
WR WKPAEN WR Mode Default Description
-
0 0 Unused VRTC enable bit, VRTC voltage for ADC 0: disable 1: enable WK pin analog enable bit, output WKO voltage for ADC 0: disable 1: enable Copyright 2018, www. bluetrum.com. All Rights Reserved 21 6RTC 22 Bit Name Mode Default Description 4 WKPPUEN WR 1 3:2 WKPPUS WR 0x1 WK pin pull up enable bit 0: disable 1: enable WK pin pull up select bit 00: 80K 01: 90K 10: 100K 11: 400K 1 0 WKPPD WR WKPIE WR WK pin pull down 10K enable bit 0 1 0: disable 1: enable WK pin input enable bit 0: disable 1: enable Register 6-8 RTCCON2: RTC control Register 2 Bit Name Mode Default Description 7 6 5:4 3:2 1:0 32KSEL WR SELVDDPU RSV RSV RSV WR WR WR WR 0 1 0x0 0x2 0x2 32K osc select bit 0: 32.768K 1: 32K SEL VDD pullup enable 0: disable 1: enable Reserve, cant be changed default value Reserve, cant be changed default value Reserve, cant be changed default value Register 6-9 RTCCON3: RTC control Register 3 Bit Name Mode Default Description 7 6 5 4 3 2 1 0 RTC1S_WKEN WR ALM_WKEN WR VSUB_WKEN WR WKP_WKEN WR
-
-
VCOREEN WR VIOEN WR BUCKEN WR 0 0 0 0
-
1 1 1 RTC one second wakeup enable bit 0: disable 1: enable RTC alarm wakeup enable bit 0: disable 1: enable VUSB wake up enable bit 0: disable 1: enable WK pin wake up enable bit 0: disable 1: enable Unused VDDCORE enable bit 0: disable 1: enable VDDIO enable bit 0: disable 1: enable BUCK enable bit 0: disable 1: enable Register 6-10 RTCCON5: RTC control Register 5 Bit 7 6 5:4 3:2 1 Name
-
RSV RSV RSV BUCKLPM Mode Default Description
-
WR WR WR WR
-
0 0x0 0x0 0 Unused Reserve, cant be changed default value Reserve, cant be changed default value Reserve, cant be changed default value BUCK low power mode enable Copyright 2018, www. bluetrum.com. All Rights Reserved 22 6RTC 23 Bit Name Mode Default Description 0 LDOM WR 1 Register 6-11 RTCCON7: RTC control Register 7 0: disable 1: enable BUCK LDO mode select bit 0: buck mode 1: LDO mode Unused WKO protect bit LVD detect enable after power up by wake up 0: disable 1:enable WK pin filter enable bit 0: disable 1:enable WK pin filter select bit 00:8ms 01:32ms 10:128ms 11:512ms Mode Default Description Bit 7:5 4 3 2 Name
-
WKOPRT LVDDETEN
-
WR WR WKPFEN WR
-
0 0 0 1:0 WKPFSEL WR 0x0 Register 6-12 RTCCON8: RTC control Register 8 Bit 7:5 4 3 Name
-
VSUBP WKP
-
R R
-
0 0 Mode Default Description Unused VUSB wake up pending 0: no pending 1: pending WK pin wake up pending 0: no pending 1: pending When write:
RTC 1 second pending clear 0: no affect 1: clear 1s pending When read:
RTC 1 second pending 0: no second pending 1: second pending When write:
RTC alarm pending clear 0: no affect 1: clear alarm pending When read:
Alarm pending 0: no alarm pending 1: alarm pending When write WK pin 10s pending clear 0: no affect 1: clear 10s pending When read:
WK pin 10s pending 0: no 10s pending 1: 10s pending 2 RTC1SPC WR 0 1 ALMPC WR 0 0 WKP10SC WR 0 Register 6-13 RTCCON9: RTC control Register 9 Bit 7:4 3:0 Name
-
WKP10SEN Mode Default Description
-
W
-
0xa Unused WK pin 10s reset enable Copyright 2018, www. bluetrum.com. All Rights Reserved 23 6RTC 24 Bit Name Mode Default Description 0xa: disable Others: enable After enable, cant disable. Copyright 2018, www. bluetrum.com. All Rights Reserved 24 7UART0 25 7 UART0 7.1 Features 1. UART is a serial port capable of asynchronous transmission. 2. The UART can function in full duplex mode. 7.2 UART0 Special Function Registers Register 7-1UART0CON: UART Control Register Mode Default Description Bit Name 31:10
-
RXPND TXPND
-
R R RXEN WR ONELINE WR CLKSRC WR SB2EN TXIE RXIE BIT9EN UTEN WR WR WR WR WR 9 8 7 6 5 4 3 2 1 0
-
0 0 0 0 0 0 0 0 0 0 Unused RX pending 0: RX one byte not finish 1: RX one byte finish TX pending 0: TX one byte not finish 1: TX one byte finish RX enable 0: RX disable 1: RX enable One-line mode 0: TX/RX separate 1: TX/RX one line Clock source select 0: system clock 1: uart_inc Two Stop Bit enable 0:1-bit Stop Bit 1: 2 bit Stop Bit Transmit Interrupt Enable 0 = Transmit interrupt disable 1 = Transmit interrupt enable Receive Interrupt Enable 0: Receiver interrupt disable 1: Receiver interrupt enable BIT9 Enable Bit 0: Eight-bit mode 1: Nine-bit mode UART Enable Bit 0: Disable UART module 1: Enable UART module Register 7-2UART0CPND: UART0 clear pending Register Bit Name 31:18
-
17 CRSTKEYPND 16 CKEYPND Mode Default Description
-
W W
-
0 0 Unused Reset Key match pending clear 0: N/A 1: Clear Reset key match Pending Key match pending clear 0: N/A 1: Clear key match Pending Copyright 2018, www. bluetrum.com. All Rights Reserved 25 7UART0 Bit Name 15:10
-
9 8 CRXPND CTXPND 7:0
-
26 Mode Default Description
-
W W
-
-
0 0
-
Unused RX pending clear 0: N/A 1: Clear RX Pending TX pending clear 0: N/A 1: Clear TX Pending. Writing data to UTBUF will clear TXPND Unused Register 7-3UART0BAUD: UART Baud Rate Register Bit Name Mode Default Description 31:16 UART0RXBAUD 15:0 UART0TXBAUD W W 0 0 UART RX Baud Rate Baud Rate =Fsys clock / (UART0RXBAUD + 1) UART TX Baud Rate Baud Rate =Fsys clock / (UART0TXBAUD + 1) Register 7-4 UART0DATA: UART Data Register Bit 31:9 8 Name
-
UART0BIT8 7:0 UART0DAT Mode Default Description
-
WR WR
-
x x Unused UART Data bit 8 UART Data Write this register will load the data to transmitter buffer. Read this register will read the data from the receiver buffer.. 7.3 User Guide 1. Set IO in the correct direction. 2. Configure UART0BAUD to choose sample rate 3. Enable UART0 by setting 4. Set TXIE or RXIE to 1 if needed 5. write data to UART0DATA 6. Wait for PND to change to 1, or wait for interrupt 7. Read received data from UART0DATA if needed Copyright 2018, www. bluetrum.com. All Rights Reserved 26 8SPI1 27 8 SPI1 8.1 Features general 3 wire mode, 1-bit clock in/out, 1-bit data output, 1-bit data input SPI1 can support different mode 1. 2. 2 wire mode, 1-bit clock in/out, 1-bit data output or input;
3. 2 data bus mode, 1-bit clock in/out, 2-bit data output or input;
8.2 SPI1 Special Function Registers Register 8-1SPI1CON: SPI1 Control Register Bit Name Mode Default Description 31:17
-
-
-
Unused 16 SPIPND R 0 0: not finish SPI rx/tx SPI pending 15:11
-
-
10 SPIOSS WR SPIMBEN WR SPILF_EN WR SPIIE WR
-
0 0 0 0 9 8 7 6 SMPS WR 0 1: finish SPI rx/tx Unused SPI output data and sample data is at the same edge 0: disable 1: enable SPI multiple bit bus enable bit 0: disable 1: enable SPI LFSR enable bit 0: disable 1: enable SPI interrupt enable 0: disable 1: enable SPI sampling edge select bit, when SPIOSS = 0, output data and sample data is at different clock edge; when SPIOSS = 1, output data and sample data is at the same clock edge 0: falling edge output data;
1: rising edge output data;
SPI clock state when idle 5 CLKIDS WR 0 0: clock stay at 0 1: clock stay at 1 4 RXSEL WR 0 When in DMA mode or 2-wire mode, configure SPI Receive or Transmit select bit Copyright 2018, www. bluetrum.com. All Rights Reserved 27 8SPI1 28 Bit Name Mode Default Description 0: transmit 1: receive Data bus width select bit 00:3-wire mode; 1bit data in, 1bit data out 3:2 BUSMODE WR 0x0 01:2-wire mode; 1bit data in/out 10: 2bit bidirectional data bus 11: reserved Slave mode select bit 1 SPISM WR 0 0:master mode 1:slave mode SPI Enable Bit 0 SPIEN WR 0 0: Disable 1: Enable Register 8-2SPI1BAUD: SPI Baud Rate Register Bit Name Mode Default Description 31:16
-
-
-
Unused 15:0 SPI1BAUD W 0 SPI Baud Rate Baud Rate =Fsys clock / (SPI_BAUD+1) Register 8-3SPI1CPND: SPI clear pending Register Bit Name Mode Default Description 31:17
-
16 SPICPND
-
W
-
0 Unused Write 1 will clear SPIpending Copyright 2018, www. bluetrum.com. All Rights Reserved 28 8SPI1 29 Bit Name Mode Default Description 15:0
-
-
-
Unused Register 8-4 SPI1BUF: SPI1 receive/send Data Register Bit Name Mode Default Description 31:8
-
-
-
Unused SPI Data 7:0 SPI1BUF WR x Write this register will load the data to transmitter buffer. Read this register will read the data from the receiver buffer.. Register 8-5 SPI1DMACNT: SPI1 DMA counter Register Bit Name Mode Default Description 31:16
-
-
-
Unused SPIDMA byte counter 15:0 SPI1DMACNT W x Write this register will kick start spi send/receive data Total number of bytes received / send is SPI1DMACNT Register 8-6 SPI1DMAADR: SPI1 DMA address Register Bit Name Mode Default Description 31:21
-
-
20:0 SPI1DMAADR W
-
x Unused SPIDMA byte address 8.3 User Guide SPI Normal 1bit-Mode Operation Flow:
1. 2. 3. 4. 5. Set 3-wire mdoe or 2-wire mode and select the pin map Select RXSEL for Transmit or receive Configure clock frequency Select one of the four timing mode Enable SPI module by setting SPIEN 1 Copyright 2018, www. bluetrum.com. All Rights Reserved 29 8SPI1 30 6. Set SPIIE 1 if needed 7. Write data to SPIBUF to kick-start the process 8. Wait for SPIPND to change to 1, or wait for interrupt 9. Read received data from SPIBUF if needed 10. Go to Step 8 to start another process if needed or turn off SPI1by clearing SPIIE and SPIEN SPI Normal multi-bit-Mode Operation Flow:
1. 2. 3. 4. 5. 6. Set data bus width(bus 2) and select the pin map Select RXSEL for Transmit or receive Configure clock frequency Select one of the four timing mode Enable SPI module by setting SPIEN 1 Set SPIIE 1 if needed 7. Write data to SPIBUF to kick-start the process 8. 9. If data bus width are 2 bit, write SPIBUF twice kick-start the transmission However, when receive data, only need write once to kick-start receive process 10. Wait for SPIPND to change to 1, or wait for interrupt 11. Read received data from SPIBUF if needed 12. Go to Step 8 to start another process if needed or turn off SPI by clearing SPIIE and SPIEN SPI1 DMA Mode Operation Flow:
1. 2. 3. 4. 5. 6. 7. Set IO in the correct direction and data width mode. Select RXSEL for DMA direction Configure clock frequency Select one of the four timing modes Enable SPI module by setting SPIEN to 1 Set SPIIE 1 if needed configure SPI1DMAADR 8. Write data to SPI1_DMACNT to kick-start a DMA process 9. Wait for SPIPND to change to 1, or wait for interrupt 10. Go to Step 8 to start another DMA process if needed or turn off SPI1 by clearing SPI1EN Copyright 2018, www. bluetrum.com. All Rights Reserved 30 9Characteristics 31 9 Characteristics 9.1 PMU Parameters Table 9-1 PMU voltage input Parameters Sym VUSB VBAT Characteristics Charger Voltage input Voltage input Min 3.0 3.0 Typ 5.0 3.7 Max Unit Conditions 5.0 5.0 V V Table 9-2 3.3V LDO Parameters Sym Characteristics VDDIO VVDDIO ILOAD ISC 3.3V LDO voltage output Output Mismatch 1-sigma Maximum output current Short Circuit Current Limit Min 3.0
-
-
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Typ 3.3 56
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Max Unit Conditions 3.6
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150 300 V mV mA mA Light Loading condition VDDIO=3.3v
@VBAT=3.6v
@VBAT=3.8v Table 9-3 1.6V LDO Parameters Sym Characteristics Min VDDBT VVDDBT ILOAD ISC 1.6V LDO voltage output Output Mismatch 1-sigma Maximum output current Short Circuit Current Limit
-
-
-
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Typ 1.6 27
-
-
Max Unit Conditions
-
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100 200 V mV mA mA Light Loading condition VDDBT=1.6v
@VBAT=3.0v
@VBAT=3.8v Table 9-4 1.2V LDO Parameters Sym Characteristics Min VDDCORE 1.2V LDO voltage output VVDDCORE Output Mismatch 1-sigma ILOAD ISC Maximum output current Short Circuit Current Limit
-
-
-
-
Typ 1.2 20
-
-
Max Unit Conditions
-
-
80 120 V mV mA mA Light Loading condition VDDCORE=1.2v
@VBAT=3.6v
@VBAT=3.8v 9.2 IO Parameters Table 9-5 I/O Parameters GPIOElectrical Characteristics Symbol Description Related GPIO VIL VIH Low-level input voltage High-level input voltage Driver Ability 1 Output Driver Ability 1 Driver Ability 0 Output Driver Ability 0 RPUP0 RPUP1 RPUP2 RPDN0 RPDN1 RPDN2 Internal pull-up resister 0 Internal pull-up resister 1 Internal pull-up resister 2 Internal pull-down resister 0 Internal pull-down resister 1 Internal pull-down resister 2 Min
-0.3 2.03 8 0.24 160 8 0.24 160 Typical 32 8 10 0.3 200 10 0.3 200 Max 1.27 3.6 12 0.36 240 12 0.36 240 Units Conditions V V VDDIO=3.3V VDDIO=3.3V mA VDDIO=3.3V mA VDDIO=3.3V K K K K K K Copyright 2018, www. bluetrum.com. All Rights Reserved 31 9Characteristics 32 9.3 Audio DAC Parameters Sym Characteristics Min Typ Max Unit Conditions Table 9-6 Audio DAC Parameters
-
96
-
dB VCM cap=1uF VDDDAC cap=1uF with A-wt filter Output -3dBV Fin=1KHz VCM cap=1uF
-
-
-86 2.6
-
VDDDAC cap=1uF dB with A-wt filter Output -3dBV with 10K loading Fin=1KHz Vpeak-peak 32ohm Loading SNR THD+N Output Range Maximum output voltage 9.4 Audio ADC Parameters Sym Characteristics Min Typ Max Unit Conditions Table 9-7 Audio ADC Parameters SNR THD+N
-
90
-
dB
-
-87
-
dB Input Range Input sine wave peak amplitude 0 VCM V 9.5 BT Parameters VCM cap=1uF VDDDAC cap=1uF with A-wt filter Input sine amplitude, 850mV RMS Fin=1KHz VCM cap=1uF VDDDAC cap=1uF with A-wt filter Input sine amplitude, 850mV RMS Fin=1KHz. From aux input, aux 0db gain, VCM represent VCM voltage. Table 9-8 BT Parameters Characteristics Min Typical Max Unit Conditions Maximum Transmit Power RMS DEVM Peak DEVM EDR Relative Transmit Power Sensitivity @ Basic Rate Sensitivity @ EDR
-
-
-
2 5.5 12.5
-0.2
-90.5
-89.5
-
-
dBm
%
%
dB dBm dBm Maximum TX power 2-DH5 packet BER=0.1%, using DH5 packet BER=0.01%, using 2-DH5 packet Copyright 2018, www. bluetrum.com. All Rights Reserved 32 9Characteristics 33 9.6 Current Parameters Table 9-9 Current Parameters Sym IRTC Sleep Characteristics RTC mode current Sleep current Min
-
-
Typ 4 500 Max
-
2000 Unit uA uA Conditions 4.2V input, room temp. 3.3V input, room temp FCC WARNING STATEMENT Changes or modications not expressly approved by the party responsible for compliance could void the users authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment o and on, the user is encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit dierent from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. Copyright 2018, www. bluetrum.com. All Rights Reserved 33
1 | Internal Photos | Internal Photos | 653.17 KiB |
M/N: ARG-SP-3016BK M/N: ARG-SP-3016BK M/N: ARG-SP-3016BK Internal Ant. M/N: ARG-SP-3016BK
1 | External Photos | External Photos | 437.83 KiB |
M/N: ARG-SP-3016BK M/N: ARG-SP-3016BK M/N: ARG-SP-3016BK M/N: ARG-SP-3016BK
1 | Label and Location | ID Label/Location Info | 500.47 KiB |
FCC ID: 2AUGW-ARG-SP-3016 Product name: Bluetooth Speaker Model No.: ARG-SP-3016BK This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) This device may not cause harmful interference, and
(2) This device must accept any interference received, including interference that may cause undesired operation. Width:3cm FCC ID LABEL:
Label Location:
Long:4cm
frequency | equipment class | purpose | ||
---|---|---|---|---|
1 | 2019-09-16 | 2402 ~ 2480 | DXX - Part 15 Low Power Communication Device Transmitter | Original Equipment |
app s | Applicant Information | |||||
---|---|---|---|---|---|---|
1 | Effective |
2019-09-16
|
||||
1 | Applicant's complete, legal business name |
MG Accessories & Distribution Inc
|
||||
1 | FCC Registration Number (FRN) |
0028779122
|
||||
1 | Physical Address |
12650 NW 25th Street Suite 112
|
||||
1 |
Miami
|
|||||
1 |
United States
|
|||||
app s | TCB Information | |||||
1 | TCB Application Email Address |
c******@micomlabs.com
|
||||
1 | TCB Scope |
A2: Low Power Transmitters (except Spread Spectrum) and radar detectors operating above 1 GHz
|
||||
app s | FCC ID | |||||
1 | Grantee Code |
2AUGW
|
||||
1 | Equipment Product Code |
ARG-SP-3016
|
||||
app s | Person at the applicant's address to receive grant or for contact | |||||
1 | Name |
D******** W******
|
||||
1 | Title |
CEO
|
||||
1 | Telephone Number |
786-4********
|
||||
1 | Fax Number |
786-4********
|
||||
1 |
d******@mgadist.com
|
|||||
app s | Technical Contact | |||||
1 | Firm Name |
MG Accessories & Distribution Inc
|
||||
1 | Physical Address |
United States
|
||||
1 |
d******@mgadist.com
|
|||||
app s | Non Technical Contact | |||||
n/a | ||||||
app s | Confidentiality (long or short term) | |||||
1 | Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | Yes | ||||
1 | Long-Term Confidentiality Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | No | ||||
if no date is supplied, the release date will be set to 45 calendar days past the date of grant. | ||||||
app s | Cognitive Radio & Software Defined Radio, Class, etc | |||||
1 | Is this application for software defined/cognitive radio authorization? | No | ||||
1 | Equipment Class | DXX - Part 15 Low Power Communication Device Transmitter | ||||
1 | Description of product as it is marketed: (NOTE: This text will appear below the equipment class on the grant) | Bluetooth Speaker | ||||
1 | Related OET KnowledgeDataBase Inquiry: Is there a KDB inquiry associated with this application? | No | ||||
1 | Modular Equipment Type | Does not apply | ||||
1 | Purpose / Application is for | Original Equipment | ||||
1 | Composite Equipment: Is the equipment in this application a composite device subject to an additional equipment authorization? | No | ||||
1 | Related Equipment: Is the equipment in this application part of a system that operates with, or is marketed with, another device that requires an equipment authorization? | No | ||||
1 | Is there an equipment authorization waiver associated with this application? | No | ||||
1 | If there is an equipment authorization waiver associated with this application, has the associated waiver been approved and all information uploaded? | No | ||||
app s | Test Firm Name and Contact Information | |||||
1 | Firm Name |
Shenzhen HUAK Testing Technology Co., Ltd.
|
||||
1 | Name |
J**** Z******
|
||||
1 | Telephone Number |
+86-7********
|
||||
1 |
j******@cer-mark.com
|
|||||
Equipment Specifications | |||||||||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Line | Rule Parts | Grant Notes | Lower Frequency | Upper Frequency | Power Output | Tolerance | Emission Designator | Microprocessor Number | |||||||||||||||||||||||||||||||||
1 | 1 | 15C | 2402.00000000 | 2480.00000000 |
some individual PII (Personally Identifiable Information) available on the public forms may be redacted, original source may include additional details
This product uses the FCC Data API but is not endorsed or certified by the FCC