MM875033-11 zigbee Module Datasheet Description initial release Author Revision Date 1.0 2016-11-11 contents 2 1. Introduction ........................................................................................................................... 3 1.1 1.1 Module System Block Diagram ...................................................................... 4 1.2 Module technical specifications ......................................................................... 5 Structure specification ........................................................................................................ 5 2.1 Module structure size .................................................................................................... 5 2.2 Hardware interface definition .................................................................................... 7 3 Wireless Specification ......................................................................................................... 8 1. Introduction MM875033-11 is a low-power Zigbee module for the Internet of Things,making the terminal more reliable, convenient and easy to use. The MM875033-11 module contains a NXP JN5169 single-chip solution. the chip in software and hardware are used in low-power technology, the purpose is to lower the power consumption of the entire board, the product more competitive. The module makes up with rf circuit, antenna, zigebee SOC, power supply, crystals and other auxiliary circuitAt present, the module provides a complete serial interface functions and equipment to communicate, so you can through the serial port and mobile client to connect the cloud and equipment. 2.4 GHz IEEE802.15.4 compliant On-board antenna 2.0 V to 3.6 V battery operation Power saving technology with low consumption RX current 14.7 mA, in low power receive mode 13 mA Configurable transmit power Deep sleep current 140 nA (wake-up from IO) Compensation for temperature drift of crystal oscillator frequency The JN5169 features 512 kB embedded Flash, 32 kB RAM and 4 kB EEPROM memoryand radio outputs up to 10 dBm. 1.1 1.1 Module System Block Diagram As shown in Figure 1, The MM875033-11 module contains a NXP JN5169 single-chip solution, the chip highly integrated CPU, PMU, RAM, Transceiver, LNA, PA, memmory, and other major parts, thus greatly reducing the machine power, Amplitude reduces the layout area. The module uses the internal antenna design in PCB, both for customers to reduce the cost of the antenna, but also eliminates the need to consider the antenna assembly space. figure 1. Module System Block Diagram 1.2 Module technical specifications Main chip JN5169 Working frequency 2.40~2.485GHz Supported standard IEEE802.15.4 Modulation O-QPSK MODEM communication interface UART PCB layer structure 4 Layer PCB size Antenna 22mm(L)x17mm(W)x2.0mm(H) PCB internal antennas Operation temperature 0~+85 Storage temperature
-40~+125 Hardware version number Msmart-Zigbee(JN5169)-A[V1.1]
2 Structure specification 2.1 Module structure size The size of the module as shown above, length 22mm, width 17mm, thickness 2.0mm (error +/- 0.2mm) 2.2 Hardware interface definition ADC1 ADC INPUT 1 SPICLK SPI BUS master clock out SPIMISO SPI BUS master in,slave out input 15 16 17 GND VCC VCC Ground Supply Input Pin Supply Input Pin SPIMOSI SPI BUS master out,slave in 18 GND Ground output SPI BUS master select output 0 GPIO&ADC INPUT 3 GPIO& ADC INPUT 4 GPIO& ADC INPUT 5 GPIO& ADC INPUT 6 GPIO GPIO UART0-TX UART0-RX GPIO 19 20 21 22 23 24 25 26 27 DIO11 DIO12 DIO13 RESETN DIO14 DIO15 DIO16 DIO17 ADC2 GPIO GPIO GPIO Reset pinActive Low UART1-TX&I2C-SCL UART1-RX&I2C-SDA I2C-SCL &GPIO I2C-SDA &GPIO ADC INPUT 2 SSZ DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 DIO8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 3 Wireless Specification reference section limit TX Maximum Power ETSI EN 300 328 4.3.2.1 20dBm TX Spurious 30Mhz-1Ghz ETSI EN 300 328 4.3.2.8
-36 or -54dbm(depends on frequency)(100khz BW) Transmission ETSI EN 300 328 4.3.2.8
-30 dBm ECM TX Frequency Tolerance min of max power phase noise(unspread) RX spurious 30Mhz - 1GHz RX spurious 1G - 12.5GHz RX sensitivity Interference rejection N+/-1(adjacent) Interference rejection N+/-2(alternate) RX Max input Reception 10.3.8 10.3.9 10.3.10 802.15.4 802.15.4 802.15.4 No reference ETSI EN 300 328 4.3.2.9.2 -57dBm(100 Khz) ETSI EN 300 328 4.3.2.9.2 -47 dBm(1 Mhz) 802.15.4 35%
+/-40 ppm
-3dBm 10.3.4
-85dBm 802.15.4 10.3.5 0dB 802.15.4 10.3.5 30dB 802.15.4_2011 10.3.11
-20dBm FCC Statement This equipment has been tested and found to comply with the limits for a Class B digital device, p ursuant to part 15 of FCC Rules. These limits are designed to provide reasonable protection again st harmful interference in a residential installation. This equipment generates and can radiate radi o frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to rad io or television reception, which can be determined by turning the equipment off and on, the use r is encouraged to try to correct the interference by one or more of the following measures:
Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is con nected. Consult the dealer or an experienced radio/TV technician for help. This device complies with Part 15 of FCC Rules. Operation is subject to the following two conditio ns: (1) This device may not cause harmful interference, and (2) This device must accept any interf erence received, including interference that may cause undesired operation.
"Contains Transmitter Module FCC ID:2AIRV0003" or "Contains FCC ID:2AIRV0003" must be used.