AC210MWi-Fi AP Module Datasheet Introduction The AC210M is a high-performance 2x2 802.11a/b/g/n/ac Wi-Fi AP module. It supports simultaneous operation of 2.4 GHz and 5 GHz frequency bands. The module provides two MMCX RF connectors for combined 2.4G and 5G radio and one 60-pin board-to-board connector for connection to the host system. Interface Definition The module communicates with the host system through an 82-pin connector (the Wi-Fi modules populate 60-pin only). The connector on the module is Molex 171810-1115. The connector definition follows Nokia RF and WiFi Card Interface Pinout.xlsx rev 11. R F P i n W i F i P i n S t d U s e W i F i C a r d U s a g e R F C a r d U s a g e I / O V o l t a g e A C P u l l -
C o u p l i n g u p / d o w n
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cmos_[VDD_IF]
cml_1.8v cml_1.8v cml_1.8v cml_1.8v lvds_1.8v lvds_1.8v rf, 0.1uF rf, 0.1uF mb, 0.1uF mb, 0.1uF GND SYNCINB0_MB_RF_DN SYNCINB0_MB_RF_DP GND SERDOUT1_RF_MB_DN SERDOUT1_RF_MB_DP GND SERDIN0_MB_RF_DN SERDIN0_MB_RF_DP GND GP_INTERRUPT GND SYNCOUTB0_RF_MB_DP SYNCOUTB0_RF_MB_DN GND SERDOUT2_RF_MB_DP sgmii_1.2v/cml_1.8v mb, 0.1uF SERDOUT2_RF_MB_DN sgmii_1.2v/cml_1.8v mb, 0.1uF GND SERDOUT3_RF_MB_DP sgmii_1.2v/cml_1.8v mb, 0.1uF SERDOUT3_RF_MB_DN sgmii_1.2v/cml_1.8v mb, 0.1uF GND RX_MYK_ENABLE RX_LNA_ENABLE_MAIN RX_LNA_ENABLE_DIV TX_MYK_ENABLE TX_KEY_MAIN TX_KEY_DIV TR_SWITCH_MAIN TR_SWITCH_DIV cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
lvds_1.8v lvds_1.8v
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n/c on mb n/c on mb wifi slot n/c on mb n/c on mb n/c on mb n/c on mb n/c on mb n/c on mb ana_5.1v not present Gnd not present DP not present DP not present Gnd not present DP not present DP not present Gnd not present DP not present DP Gnd not present Extra not present GND Gnd Reserved DP Reserved DP GND Gnd
SGMII_1_WIFI_MB_DP DP
SGMII_1_WIFI_MB_DN DP GND Gnd SGMII_0_WIFI_MB_DP DP SGMII_0_WIFI_MB_DN DP GND Gnd Reserved DP Reserved DP Gnd Reserved Extra Reserved Extra Reserved Extra Reserved Reserved Gnd DP Reserved I2C_9550_SCL (for test)Reserved DP I2C_9550_SDA (for test)GND Gnd TRSTn DP TDO DP Gnd TDI TMS DP TCK DP Reserved Gnd 5V_SENSE DP DP VCC_5.1V Gnd VCC_5.1V Extra VCC_5.1V GND
SGMII_1_MB_WIFI_DPSERDIN2_MB_RF_DP
SGMII_1_MB_WIFI_DNSERDIN2_MB_RF_DN GND SGMII_0_MB_WIFI_DPSERDIN3_MB_RF_DP SGMII_0_MB_WIFI_DNSERDIN3_MB_RF_DN GND I2C_SCL I2C_SDA GND GPIO4 (TRSTn) GPIO5 (TDO) GPIO6 (TDI) GPIO7 (TMS) GPIO8 (TCK) TEST 5V_SENSE VCC_5.1V VCC_5.1V VCC_5.1V sgmii_1.2v/cml_1.8vrf/wifi, 0.1uF sgmii_1.2v/cml_1.8vrf/wifi, 0.1uF sgmii_1.2v/cml_1.8vrf/wifi, 0.1uF sgmii_1.2v/cml_1.8vrf/wifi, 0.1uF
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mb, 4.7K, gnd
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rf, 4.7K, gnd rf, 4.7K, gnd rf, 4.7K, gnd rf, 4.7K, gnd rf, 4.7K, gnd rf, 4.7K, gnd rf, 4.7K, gnd rf, 4.7K, gnd
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rf, 1K, gnd
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M B D i r O O I I O O I I I I I I I O O O O O O O O n/a n/a n/a n/a n/a n/a n/a n/a I O O O O cmos_3.3v cmos_3.3v cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
GND I2C_SCL I2C_SDA GND SPI_SCLK SPI_MISO SPI_MOSI SPI_CS_n I2C_WP RESET_n GND GPIO0 GPIO1 GPIO2 GPIO3 VDD_IF (1.8v from MB, 2.5v from FPGA Dev Card) VCC_5.1V VCC_5.1V VCC_5.1V VCC_5.1V cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_[VDD_IF]
cmos_3.3v
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mb 1K; rf/wifi 10K, 3.3v I/O mb 1K; rf/wifi 10K, 3.3v I/O rf, 4.7k, gnd mb, 4.7k, VDD_IF rf, 4.7k, VDD_IF rf, 4.7k, VDD_IF rf, 4.7k, 3.3v rf/wifi, 4.7K, VDD_IF O I O O O O mb, 10K, VDD_IF mb, 10K, VDD_IF mb, 10K, VDD_IF mb, 10K, VDD_IF I, I/O I, I/O I, I/O I, I/O DP DP Gnd DP DP Gnd DP DP Gnd Extra Reserved Extra UART_WIFI_MB Extra UART_MB_WIFI Gnd DP DP Gnd DP DP Gnd DP DP Gnd DP DP Gnd Reserved I2C_WP RESET_n GND LED_WLAN_0 LED_WLAN_1 LED_WLAN_2 LED_WLAN_3 VDD_IF VCC_5.1V VCC_5.1V VCC_5.1V VCC_5.1V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Signal Definition Signal SGMII_0_MB_WIFI_DN SGMII_0_MB_WIFI_DP Type I Description SGMII Differential Input Parameters The signal is AC coupled. Proper biasing is provided on the module receiver. Input Single Voltage High Input Single Voltage Low Input Differential Threshold Internal Offset Voltage Receiver Differential Input Impedance Vih Vil Vidth Vio Rin
-/-/1480 (mV, min/typ/max) 520/-/- (mV, min/typ/max)
-50/-/50 (mV, min/typ/max) 800/900/1000 (mV,min/typ/max) 100ohm Voh High Level Output Voltage Vol Low Level Output Voltage VoD Output Differential Voltage VoS Output Offset Voltage The signals are not connected on the module.
-/1050/1195 (mV, min/typ/max) 200/750/-(mV, min/typ/max) 300mV 500/900/1070(mV, min/typ/max) On module the signal is pulled to GND with a 0 ohm resistor. External reset to the module. It is internally pulled down GND by 10k ohm resistor. This reset signal is connected to module CPU through GPIO.. The signal must be driven by 1.8V logic. Input Voltage Low Input Voltage High 2/-/3.5 (V, min/typ/max) Vih Vil
-0.5/-/0.8 (V, min/typ/max) Voh High Level Output Voltage 2.2/-/3.3 (V, min/typ/max) Vol
-0.2/-/0.6 (V, min/typ/max) Low Level Output Voltage Open collector driven, sink maxim 20mA current when LED lit Open collector driven, sink maxim 20mA current when LED lit
(Reserved) Open collector driven, sink maxim 20mA current when LED lit
(Reserved) Open collector driven, sink maxim 20mA current when LED lit 5.1V+/-0.15V. 0~3A SGMII_0_WIFI_MB_DN SGMII_0_WIFI_MB_DP O SGMII Differential Output SGMII_1_MB_WIFI_DN SGMII_1_MB_WIFI_DP SGMII_1_WIFI_MB_DN SGMII_1_WIFI_MB_DP WIFI_PRESENCE_n RESET_n IIC_SDA IIC_SCL NC Reserved O I Board Present Indication Reset IO I I2C Data I2C Clock LED_WLAN_0 LED_WLAN_1 LED_WLAN_2 OC OC OC 2.4G LED 5G LED LED_Reserved LED_WLAN_3 OC LED_Reserved 5V Power Input POW ER POW ER O I I I O I/O VCC_5.1V 5V_SENSE UART_WIFI_MB UART_MB_WIFI I2C_WP VDD_IF I2C_9550_SCL
(for test) I2C_9550_SDA
(for test) Reserved GND JTAG 5V Power Sense The 5V sense is directly wired on the Wi-Fi module from VCC_5.1V The signal must be driven by 1.8V logic UART signal from MB to Module UART signal from I2C write protect signal On module this signal is connected to EEPROM write protection, The signal must be driven by 1.8V logic 1.8V voltage I2C clk signal from 9550 I2C data signal between 9550 and slave units NC Reserved pins GND GND I/O JTAG debug pins driving high to enable EEPROM write protection. The signal must be driven by 3.3V logic On module this is 1.8V voltage level reference On module this is connected to CPU GPIO16 for manufacturing test only On module this is connected to CPU GPIO 21 for manufacturing test only The reserved pins are NOT connected on the Wi-Fi module GND Connected to CPU EJTAG port for device debug. This interface shall not be daisy chained on MB. This interface must be driven by 2.5V logic Power Supply Power consumption Capacitive load Power up ramping Average power consumption of the module under typical operation mode shall be less than 10W. Peak power supply current is less than 3A at 5.1V. The module shall not present a capacitive load to the mainboard larger than 1500uF The module is not designed for hot swapping. The power supply ramping speed is not controlled by the module itself. Operation Environment Operating temperature Operating humidity Storage temperature Elevations Environment Surge The module shall support a low operating temperature limit of -40C. The upper operating temperature limit will be determined by empirically measuring the case temperature of the critical components and ensuring that none of the individual component limits are violated while the module is operating within the Nokia host platform. Once data is available, this entry shall be updated with the upper operating temperature limit. The module is expected to withstand heatsink body temperature of 80C when proper heatsinking is in place. 5% to 95% non-condensing
-40C to +85C 86kPa106kPa Shall be RoHS 2011/65/EU compliant (RoHS 6 compliant, no Pb);
WEEE 2002/96/EC recyclable materials requirements Telcordia GR-63-CORE The module does not provide onboard surge protection. Safety and EMC Safety EMC/EMI Unwanted Emission ESD This WiFi module design shall not prevent the host product from obtaining NRTL Listing 60950 (US &CA), CB with IEC/EN 60950-1 (Basic safety certificate for worldwide marketing) GB 9254 -2008(Class B of Product) , EN55022, CISPR 22:2006 , EN55024, CISPR 24:2010 The noisy circuits such as crystal, CPU, DDR, etc. are well shielded to avoid generating unwanted emission impacting the LTE/3G band receiver. HBM 1.5KV Package information 1. PCBA Label 1 PCBA Label 2D data Matrix, no printed label. 2. PCBA Label 2 Label on PCBA board---Nokia SN Label size : 30 x 7mm Material : heat resisting PET Colors: White material, printing in black Font Arial size is 3pt Barcode: code 128B Label on PCBA board---Certification information Label size : 15 x 5mm Material : heat resisting PET Colors: White material, printing in black Font Arial size is 3pt