FCC ID: ZAT-1312PSIP-1 CC1312PSIP

 

Texas Instruments Inc. 12500 TI Blvd. Dallas, TX 75243 USA

+1-214-620-4261 OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). Antenna Installation

(1) The antenna must be installed such that 20 cm is maintained between the antenna and users,

(2) The transmitter module may not be co-located with any other transmitter or antenna.

(3) Only antennas of the same type and with equal or less gains as shown below may be used with this module. Other types of antennas and/or higher gain antennas may require additional authorization for operation. Page of 1 5 Texas Instruments Norway AS Brand TI Kaadas Leederson Leederson Leederson Leederson Leederson Pulse Johanson Technology Johanson Technology Pulse Antenna Type Peak Gain (dBi) Integrated PCB antenna Flexi PCB antenna Integrated PCB antenna Integrated PCB antenna Stanced antenna Stanced antenna Integrated PCB antenna External whip antenna Chip antenna Chip antenna Wire antenna

+2.69 dBi

-5.82 dBi

-4.51 dBi

-1.83 dBi

-9.48 dBi

+0.37 dBi

-1.74 dBi

+0.90 dBi

-0.50 dBi

+1.00 dBi

+0.80 dBi Table 1 Antenna Specifications In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product

(including the transmitter) and obtaining a separate FCC/IC authorization. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:

- Reorient or relocate the receiving antenna.

- Increase the separation between the equipment and receiver.

- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Page 2 of 5 Texas Instruments Norway AS

- Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Industry Canada Statement This device contains licence-exempt transmitter(s)/receiver(s) that comply with Innovation, Science and Economic Development Canadas licence-exempt RSS(s). Operation is subject to the following two conditions:

(1) This device may not cause interference.

(2) This device must accept any interference, including interference that may cause undesired operation of the device. Lmetteur/rcepteur exempt de licence contenu dans le prsent appareil est conforme aux CNR dInnovation, Sciences et Dveloppement conomique Canada applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes :

(1) Lappareil ne doit pas produire de brouillage;

(2) Lappareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible den compromettre le fonctionnement. CAN ICES-3(B)/ NMB-3(B) Radiation Exposure Statement This equipment complies with FCC/IC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator & your body. Page 3 of 5 Texas Instruments Norway AS End Product Labeling In order to comply with the CC1312PSIP modular approval for use in Canada and the United States. OEM/Host manufacturers must include the following example label as shown in Figure 5 on their end-product and user manual. Figure 1 Example label for end product to reuse the modular approval Page 4 of 5 Texas Instruments Norway AS IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES AS IS AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-

INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TIs products are provided subject to TIs Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TIs provision of these resources does not expand or otherwise alter TIs applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright 2022, Texas Instruments Incorporated Page 5 of 5

 

 

CC1312PSIP SimpleLink Sub-1-GHz Wireless System-in-Package CC1312PSIP SWRS293 MAY 2023 1 Features Wireless microcontroller Powerful 48-MHz Arm Cortex-M4F processor 352KB flash program memory 256KB of ROM for protocols and library functions 8KB of cache SRAM 80KB of ultra-low leakage SRAM with parity for high-reliability operation Dynamic multiprotocol manager (DMM) driver Programmable radio includes support for 2-

(G)FSK, 4-(G)FSK, MSK, OOK, IEEE 802.15.4 PHY and MAC Supports over-the-air upgrade (OTA) Ultra-low power sensor controller Autonomous MCU with 4KB of SRAM Sample, store, and process sensor data Fast wake-up for low-power operation Software defined peripherals; capacitive touch, flow meter, LCD Low power consumption MCU consumption:

2.9 mA active mode, CoreMark 60 A/MHz running CoreMark 0.9 A standby mode, RTC, 80KB RAM 0.1 A shutdown mode, wake-up on pin Ultra low-power sensor controller consumption:

30 A in 2-MHz mode 808 A in 24-MHz mode Radio Consumption:

5.8-mA RX at 868 MHz 28.7-mA TX at +14 dBm at 868 MHz Wireless protocol support Wi-SUN mioty Wireless M-Bus SimpleLink TI 15.4-stack 6LoWPAN Proprietary systems High-performance radio Regulatory compliance Pre-certified for:

FCC CFR47 Part 15 Suitable for systems targeting compliance with:

ETSI EN 300 220 Receiver Cat. 1.5 and 2, EN 303 131, EN 303 204 ARIB STD-T108 MCU peripherals Digital peripherals can be routed to 30 GPIOs Four 32-bit or eight 16-bit general-purpose timers 12-bit ADC, 200 kSamples/s, 8 channels 8-bit DAC Two comparators Programmable current source Two UART, two SSI, I2C, I2S Real-time clock (RTC) Integrated temperature and battery monitor Security enablers AES 128- and 256-bit cryptographic accelerator ECC and RSA public key hardware accelerator SHA2 Accelerator (full suite up to SHA-512) True random number generator (TRNG) Development tools and software LP-CC1312PSIP Development Kit SimpleLink CC13xx and CC26xx Software Development Kit (SDK) SmartRF Studio for simple radio configuration Sensor Controller Studio for building low-power sensing applications SysConfig system configuration tool Operating range 1.8-V to 3.8-V single supply voltage 40 to +105C (+14 dBm PA) All necessary components integrated 48-MHz crystal: RF accuracy 10 ppm 32-kHz crystal: RTC accuracy 50 ppm DC/DC converter components and decoupling capacitors RF front-end components with 50-Ohm output 119 dBm for 2.5-kbps long-range mode 108 dBm at 50 kbps, 802.15.4, 868 MHz Package 7-mm 7-mm MOT (30 GPIOs) Pin-to-pin compatible with CC2652RSIP and CC2652PSIP RoHS-compliant package An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change without notice. I N O T A M R O F N I E C N A V D A TI ConfidentialNDARestrictions CC1312PSIP SWRS293 MAY 2023 2 Applications 868 and 902 to 928 MHz ISM and SRD systems 1 with down to 4 kHz of receive bandwidth Building automation Building security systems motion detector, electronic smart lock, door and window sensor, garage door system, gateway HVAC thermostat, wireless environmental sensor, HVAC system controller, gateway Fire safety system smoke and heat detector, fire alarm control panel (FACP) Video surveillance IP network camera Elevators and escalators elevator main control panel for elevators and escalators 3 Description www.ti.com Grid infrastructure Smart meters water meter, gas meter, electricity meter, and heat cost allocators Grid communications wireless communications long-range sensor applications EV Charging infrastructure AC charging (pile) station Other alternative energy energy harvesting Industrial transport asset tracking Factory automation and control Medical Communication equipment Wired networking wireless LAN or Wi-Fi access points, edge router The SimpleLink CC1312PSIP device is a System-in-Package (SiP) Sub-1 GHz wireless module supporting IEEE 802.15.4, IPv6-enabled smart objects (6LoWPAN), mioty, proprietary systems, including the TI 15.4-Stack. The CC1312PSIP microcontroller (MCU) is based on an Arm Cortex M4F main processor and optimized for low-power wireless communication and advanced sensing in grid infrastructure, building automation, retail automation and medical applications. The CC1312PSIP has a low sleep current of 0.9 A with RTC and 80KB RAM retention. In addition to the main Cortex M4F processor, the device also has an autonomous ultra-low power Sensor Controller CPU with fast wake-up capability. As an example, the sensor controller is capable of 1-Hz ADC sampling at average 1-A system current. The CC1312PSIP has Low SER (Soft Error Rate) FIT (Failure-in-time) for long operational lifetime. Always-on SRAM parity minimizes risk for corruption due to potential radiation events. Consistent with many customers 10 to 15 years or longer life cycle requirements, TI has a product life cycle policy with a commitment to product longevity and continuity of supply including dual sourcing of key components in the SIP. The CC1312PSIP device is part of the SimpleLink MCU platform, which consists of Wi-Fi, Bluetooth Low Energy, Thread, Zigbee, Wi-SUN, Amazon Sidewalk, mioty, Sub-1 GHz MCUs, and host MCUs. CC1312PSIP is part of a portfolio that includes pin-compatible 2.4-GHz SIPs for easy adaption of a wireless product to multiple communication standards. The common SimpleLinkCC13xx and CC26xx Software Development Kit (SDK) and SysConfig system configuration tool supports migration between devices in the portfolio. A comprehensive number of software stacks, application examples and SimpleLink Academy training sessions are included in the SDK. For more information, visit wireless connectivity. PART NUMBER(1) CC1312PSIPMOT Device Information PACKAGE QFM BODY SIZE (NOM) 7.00 mm 7.00 mm

(1) For the most current part, package, and ordering information for all available devices, see the Package Option Addendum in Mechanical, Packaging, and Orderable Information, or see the TI website. 1 See RF Core for additional details on supported protocol standards, modulation formats, and data rates. 2 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 4 Functional Block Diagram CC1312PSIP SWRS293 MAY 2023 Figure 4-1. CC1312PSIP Block Diagram Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictions48-MHzCrystal32.768-kHzCrystalCC1312PDCDCPassives+20-dBmIPC+14-dBm/RXIPCRFSwitchJTAG(1.8 V to 3.8 V) VDSS_PURESET_NUser DIO_0-31(1.8 V to 3.8 V) VDSSGNDRF (50 )ADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com Figure 4-2. CC1312PSIP Hardware Overview 4 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsMain CPUUp to 352KBFlashwith 8KB CacheSensor InterfacecJTAG Up to80KBSRAMwith ParityArm Cortex-M4FProcessorLDO, Clocks, and ReferencesOptional DC/DC ConverterRF CoreArm Cortex-M0ProcessorDSP Modem16KB SRAMROMULP Sensor ControllerLow-Power Comparator12-bit ADC, 200 ks/sConstant Current SourceSPI-I2C Digital Sensor IF4KB SRAMTime-to-Digital ConverterADCADC48 MHz60 A/MHz (3.6 V)Digital PLL256KBROM4 32-bit Timers2 SSI (SPI)Watchdog TimerTemperature and Battery MonitorRTCI2C and I2S2 UART32 ch. DMA32 GPIOsAES-256, SHA2-512ECC, RSATRNG50 OhmSensor InterfaceULP Sensor Controller2x Low-Power Comparator12-bit ADC, 200 ks/sCapacitive Touch IFSPI-I2C Digital Sensor IF4KB SRAMTime-to-Digital Converter8-bit DAC14-dBmRF BalunCC1312PSIPRF Switch20-dBmRF BalunGeneral Hardware Peripherals and Modules48-MHz Crystal with load capacitors32.768-kHz Crystal with load capacitosDC/DC ComponentsDecoupling capacitorsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 2 3 Description.......................................................................2 4 Functional Block Diagram.............................................. 3 5 Revision History.............................................................. 5 6 Device Comparison......................................................... 6 7 Pin Configuration and Functions...................................8 7.1 Pin Diagram MOT Package (Top View)................... 8 7.2 Signal Descriptions MOT Package.......................... 9 7.3 Connections for Unused Pins and Modules..............10 8 Specifications................................................................ 11 8.1 Absolute Maximum Ratings...................................... 11 8.2 ESD Ratings..............................................................11 8.3 Recommended Operating Conditions....................... 11 8.4 Power Supply and Modules...................................... 11 8.5 Power Consumption - Power Modes........................ 12 8.6 Power Consumption - Radio Modes......................... 13 8.7 Nonvolatile (Flash) Memory Characteristics............. 13 8.8 Thermal Resistance Characteristics......................... 13 8.9 RF Frequency Bands................................................ 14 8.10 861 MHz to 1054 MHz - Receive (RX)....................15 8.11 861 MHz to 1054 MHz - Transmit (TX) .................. 20 8.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode.......................................................... 21 8.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode.......................................................21 8.14 Timing and Switching Characteristics..................... 21 8.15 Peripheral Characteristics.......................................27 8.16 Typical Characteristics............................................ 35 9 Detailed Description......................................................42 9.1 Overview................................................................... 42 9.2 System CPU............................................................. 42 9.3 Radio (RF Core)........................................................43 9.4 Memory..................................................................... 44 9.5 Sensor Controller...................................................... 45 9.6 Cryptography............................................................ 46 9.7 Timers....................................................................... 47 9.8 Serial Peripherals and I/O.........................................48 9.9 Battery and Temperature Monitor............................. 48 9.10 DMA...................................................................... 48 9.11 Debug......................................................................48 9.12 Power Management................................................49 9.13 Clock Systems........................................................ 50 9.14 Network Processor..................................................50 9.15 Device Certification and Qualification..................... 51 9.16 Module Markings.....................................................53 9.17 End Product Labeling..............................................53 9.18 Manual Information to the End User....................... 53 10 Application, Implementation, and Layout................. 54 10.1 Application Information........................................... 54 10.2 Device Connection and Layout Fundamentals....... 55 10.3 PCB Layout Guidelines...........................................55 10.4 Reference Designs................................................. 59 11 Environmental Requirements and SMT Specifications ...............................................................60 11.1 PCB Bending...........................................................60 11.2 Handling Environment.............................................60 11.3 Storage Condition................................................... 60 11.4 PCB Assembly Guide..............................................60 11.5 Baking Conditions................................................... 61 11.6 Soldering and Reflow Condition..............................62 12 Device and Documentation Support..........................63 12.1 Device Nomenclature..............................................63 12.2 Tools and Software................................................. 63 12.3 Documentation Support.......................................... 66 12.4 Support Resources................................................. 67 12.5 Trademarks............................................................. 67 12.6 Electrostatic Discharge Caution..............................67 12.7 Glossary..................................................................67 13 Mechanical, Packaging, and Orderable Information.................................................................... 68 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE May 2023 REVISION

NOTES Initial Release Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 6 Device Comparison DEVICE, Wireless MCU CC1310 CC1311R3 CC1311P3 CC1312R CC1312R7 CC1352R CC1352P CC1352P7 CC2340R2 CC2340R5 CC2340R5-Q1 CC2640R2F CC2642R CC2642R-Q1 CC2651R3 CC2651P3 CC2652R CC2652RB CC2652R7 CC2652P CC2652P7 CC2662R-Q1

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Package CC2651R3SIP A CC2652RSIP CC2652PSIP CC1312PSIP l a n r e t x E X X X X

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M F Q 7 7 X X X Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 7 Pin Configuration and Functions 7.1 Pin Diagram MOT Package (Top View) Figure 7-1. MOT (7-mm 7-mm) Pinout, 0.5-mm Pitch (Top View) www.ti.com The following I/O pins marked in Figure 7-1 in bold have high-drive capabilities:

Pin 23, DIO_5 Pin 24, DIO_6 Pin 25, DIO_7 Pin 34, JTAG_TMSC Pin 36, DIO_16 Pin 37, DIO_17 The following I/O pins marked in Figure 7-1 in italics have analog capabilities:

Pin 1, DIO_26 Pin 2, DIO_27 Pin 3, DIO_28 Pin 7, DIO_29 Pin 8, DIO_30 Pin 44, DIO_23 Pin 45, DIO_24 Pin 48, DIO_25 8 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsCC1312PSIPDIO_28DIO_2521DIO_26DIO_27DIO_31DIO_18DIO_19DIO_20DIO_21DIO_22DIO_23DIO_24VDDSVDDS_PUDIO_4DIO_1DIO_2GNDRFGNDGNDNCNC3456789101112131415161718192021222324253637353433323130292827264847464544434241403938GNDnRESETDIO_29NCGNDDIO_30GNDGNDGNDGNDJTAG_TCKCDIO_17DIO_16DIO_15JTAG_TMSCDIO_13DIO_14DIO_11DIO_12DIO_9DIO_10DIO_7DIO_8DIO_6DIO_549545964695055606570515661667152576267725358636873ADVANCE INFORMATION www.ti.com 7.2 Signal Descriptions MOT Package Table 7-1. Signal Descriptions SIP Package CC1312PSIP SWRS293 MAY 2023 NAME NC DIO_1 DIO_10 DIO_11 DIO_12 DIO_13 DIO_14 DIO_15 DIO_16 DIO_17 DIO_18 DIO_19 DIO_2 DIO_20 DIO_21 DIO_22 DIO_23 DIO_24 DIO_25 DIO_26 DIO_27 DIO_28 DIO_29 NC DIO_30 PIO_31 DIO_4 DIO_5 DIO_6 DIO_7 DIO_8 DIO_9 GND GND GND GND GND GND GND GND GND GND PIN NO. 14 21 28 29 30 31 32 33 36 37 39 40 20 41 42 43 44 45 48 1 2 3 7 15 8 38 22 23 24 25 26 27 5 9 10 11 12 13 16 17 19 49-73 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O TYPE Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital DESCRIPTION No Connect GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO, JTAG_TDO, high-drive capability GPIO, JTAG_TDI, high-drive capability GPIO GPIO GPIO GPIO GPIO GPIO Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital or Analog GPIO, analog capability Digital No Connect Digital or Analog GPIO, analog capability Digital Digital Digital Digital Digital Digital Digital Supports only peripheral functionality. Does not support general purpose I/O functionality. GPIO GPIO, high-drive capability GPIO, high-drive capability GPIO, high-drive capability GPIO GPIO GND GND GND GND GND GND GND GND GND GND Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 PIN NAME NC nRESET RF JTAG_TCKC JTAG_TMSC VDDS VDDS_PU www.ti.com Table 7-1. Signal Descriptions SIP Package (continued) NO. 6 4 18 35 34 46 47 I/O I I I/O TYPE DESCRIPTION No Connect Digital RF Digital Digital Power Power Reset, active low. Internal pullup resistor and internal 100 nF to VDDS_PU 50 ohm RF port JTAG_TCKC JTAG_TMSC, high-drive capability 1.8-V to 3.8-V main SIP supply Power to reset internal pullup resistor 7.3 Connections for Unused Pins and Modules FUNCTION SIGNAL NAME PIN NUMBER ACCEPTABLE PRACTICE

(1) PREFERRED PRACTICE (1) Table 7-2. Connections for Unused Pins GPIO DIO_n No Connects NC

(1) NC = No connect 1-3 7-8 14-15 20-33 36-45 48 6 NC or GND NC NC NC 10 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8 Specifications 8.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) (2) VDDS(3) Supply voltage Voltage on any digital pin(4) Vin Voltage on ADC input Voltage scaling disabled, internal reference Voltage scaling disabled, VDDS as reference Voltage scaling enabled Tstg Storage temperature CC1312PSIP SWRS293 MAY 2023 MIN 0.3 0.3 0.3 0.3 0.3 40 MAX UNIT 4.1 VDDS + 0.3, max 4.1 VDDS 1.49 VDDS / 2.9 V V V 10 dBm 150 C

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime All voltage values are with respect to ground, unless otherwise noted. VDDS_DCDC, VDDS2 and VDDS3 must be at the same potential as VDDS. Including analog capable DIOs.

(2)

(3)

(4) 8.2 ESD Ratings VESD Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) All pins All pins

(1)

(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. VALUE UNIT 1000 500 V V 8.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Operating ambient temperature(1) (2) Operating supply voltage (VDDS) Operating supply voltage (VDDS), boost mode Rising supply voltage slew rate Falling supply voltage slew rate VDDR = 1.95 V

+14 dBm RF output sub-1 GHz power amplifier MIN 40 1.8 2.1 0 0 MAX UNIT 105 3.8 3.8 100 20 C V V mV/s mV/s

(1) Operation at or near maximum operating temperature for extended durations will result in a reduction in lifetime.

(2) For thermal resistance characteristics refer to . 8.4 Power Supply and Modules over operating free-air temperature range (unless otherwise noted) PARAMETER VDDS Power-on-Reset (POR) threshold VDDS Brown-out Detector (BOD) (1) VDDS Brown-out Detector (BOD), before initial boot (2) VDDS Brown-out Detector (BOD) (1) Rising threshold Rising threshold Falling threshold MIN TYP MAX UNIT 1.1 - 1.55 1.77 1.70 1.75 V V V V

(1)

(2) For boost mode (VDDR =1.95 V), TI drivers software initialization will trim VDDS BOD limits to maximum (approximately 2.0 V) Brown-out Detector is trimmed at initial boot, value is kept until device is reset by a POR reset or the RESET_N pin Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com 8.5 Power Consumption - Power Modes When measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.6 V with DC/DC enabled unless otherwise noted. PARAMETER Core Current Consumption TEST CONDITIONS TYP UNIT Reset Shutdown Standby with cache retention Standby with cache retention Reset. RESET_N pin asserted or VDDS below power-on-reset threshold (4) Shutdown. No clocks running, no retention RTC running, CPU, 80KB RAM and (partial) register retention. RCOSC_LF RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF Idle Active Supply Systems and RAM powered RCOSC_HF MCU running CoreMark at 48 MHz RCOSC_HF Icore Icore Peripheral Current Consumption Peripheral power domain Delta current with domain enabled Serial power domain Delta current with domain enabled Iperi RF Core DMA Timers I2C I2S SSI UART Delta current with power domain enabled, clock enabled, RF core idle Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle(3) Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle(2) Delta current with clock enabled, module is idle(1) CRYPTO (AES) Delta current with clock enabled, module is idle PKA TRNG Delta current with clock enabled, module is idle Delta current with clock enabled, module is idle Sensor Controller Engine Consumption ISCE Active mode 24 MHz, infinite loop Low-power mode 2 MHz, infinite loop

(1) Only one UART running

(2) Only one SSI running

(3) Only one GPTimer running

(4) CC1312PSIP integrates a 100 k pull-up resistor on nRESET A nA A A 36 150 0.9 1.0 2.8 2.9 590 A 2.89 mA 82 5.5 179 54 68 8.2 22 70 141 21 71 30 A 808 30.1 A 12 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 8.6 Power Consumption - Radio Modes When measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.6 V with DC/DC enabled unless otherwise noted. Using boost mode (increasing VDDR up to 1.95 V), will increase system current by 15% (does not apply to TX +14 dBm setting where this current is already included). Relevant Icore and Iperi currents are included in below numbers. PARAMETER TEST CONDITIONS Radio receive current, 868 MHz Radio transmit current Regular PA Radio transmit current Boost mode, regular PA 0 dBm output power setting 868 MHz

+10 dBm output power setting 868 MHz

+14 dBm output power setting 868 MHz TYP UNIT 5.8 mA 9.4 mA 17.3 mA 28.7 mA 8.7 Nonvolatile (Flash) Memory Characteristics Over operating free-air temperature range and VDDS = 3.0 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Flash sector size Supported flash erase cycles before failure, single-bank(1) (5) Supported flash erase cycles before failure, single sector(2) Maximum number of write operations per row before sector erase(3) Flash retention 105 C Flash sector erase current Average delta current Flash sector erase time(4) Flash write current Flash write time(4) Zero cycles 30k cycles Average delta current, 4 bytes at a time 4 bytes at a time 30 60 11.4 8 10.7 10 6.2 21.6 KB k Cycles k Cycles 83 Write Operations Years at 105 C 4000 mA ms ms mA s A full bank erase is counted as a single erase cycle on each sector.

(1)

(2) Up to 4 customer-designated sectors can be individually erased an additional 30k times beyond the baseline bank limitation of 30k cycles Each wordline is 2048 bits (or 256 bytes) wide. This limitation corresponds to sequential memory writes of 4 (3.1) bytes minimum per write over a whole wordline. If additional writes to the same wordline are required, a sector erase is required once the maximum number of write operations per row is reached. This number is dependent on Flash aging and increases over time and erase cycles Aborting flash during erase or program modes is not a safe operation.

(3)

(4)

(5) 8.8 Thermal Resistance Characteristics THERMAL METRIC RJA RJC(top) RJB JT JB Junction-to-ambient thermal resistance Junction-to-case (top) thermal resistance Junction-to-board thermal resistance Junction-to-top characterization parameter Junction-to-board characterization parameter

(1) C/W = degrees Celsius per watt. PACKAGE MOT

(SIP) 73 PINS 48.7 12.4 32.2 0.40 32.0 UNIT C/W(1) C/W(1) C/W(1) C/W(1) C/W(1) Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 8.9 RF Frequency Bands Over operating free-air temperature range (unless otherwise noted). PARAMETER Frequency band www.ti.com MIN 863 TYP MAX 930 UNIT MHz 14 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 8.10 861 MHz to 1054 MHz - Receive (RX) When measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 4 4000 kHz General Parameters Digital channel filter programmable receive bandwidth Data rate step size Spurious emissions 25 MHz to 1 GHz Spurious emissions 1 GHz to 13 GHz 868 MHz Conducted emissions measured according to ETSI EN 300 220 802.15.4, 50 kbps, 25 kHz deviation, 2-GFSK, 100 kHz RX Bandwidth Sensitivity Saturation limit Selectivity, 200 kHz Selectivity, 400 kHz Blocking, 1 MHz Blocking, 2 MHz Blocking, 5 MHz Blocking, 10 MHz Image rejection (image compensation enabled) RSSI dynamic range RSSI accuracy BER = 102, 868 MHz BER = 102, 868 MHz BER = 102, 868 MHz(1) BER = 102, 868 MHz(1) BER = 102, 868 MHz(1) BER = 102, 868 MHz(1) BER = 102, 868 MHz(1) BER = 102, 868 MHz(1) BER = 102, 868 MHz(1) Starting from the sensitivity limit Starting from the sensitivity limit across the given dynamic range 802.15.4, 100 kbps, 25 kHz deviation, 2-GFSK, 137 kHz RX Bandwidth Sensitivity 100 kbps Selectivity, 200 kHz Selectivity, 400 kHz Co-channel rejection 868 MHz, 1% PER, 127 byte payload 868 MHz, 1% PER, 127 byte payload. Wanted signal at -96 dBm 868 MHz, 1% PER, 127 byte payload. Wanted signal at -96 dBm 868 MHz, 1% PER, 127 byte payload. Wanted signal at -79 dBm 802.15.4, 200 kbps, 50 kHz deviation, 2-GFSK, 311 kHz RX Bandwidth Sensitivity Sensitivity Selectivity, 400 kHz Selectivity, 800 kHz Blocking, 2 MHz Blocking, 10 MHz BER = 102, 868 MHz BER = 102, 915 MHz BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. 802.15.4, 500 kbps, 190 kHz deviation, 2-GFSK, 655 kHz RX Bandwidth Sensitivity 500 kbps Selectivity, 1 MHz Selectivity, 2 MHz Co-channel rejection 916 MHz, 1% PER, 127 byte payload 916 MHz, 1% PER, 127 byte payload. Wanted signal at -88 dBm 916 MHz, 1% PER, 127 byte payload. Wanted signal at -88 dBm 916 MHz, 1% PER, 127 byte payload. Wanted signal at -71 dBm 1.5

< -57

< -47 108 10 44 48 57 62 68 76 39 95 3

-101 38 45

-9 103 103 41 47 55 67

-90 11 43

-9 SimpleLink Long Range 2.5 kbps or 5 kbps (20 ksym/s, 2-GFSK, 5 kHz Deviation, FEC (Half Rate), DSSS = 1:2 or 1:4, 34 kHz RX Bandwidth Sensitivity Sensitivity Saturation limit Selectivity, 100 kHz Selectivity, 200 kHz Selectivity, 300 kHz Blocking, 1 MHz Blocking, 2 MHz Blocking, 5 MHz Blocking, 10 MHz 2.5 kbps, BER = 102, 868 MHz 5 kbps, BER = 102, 868 MHz 2.5 kbps, BER = 102, 868 MHz 2.5 kbps, BER = 102, 868 MHz(1) 2.5 kbps, BER = 102, 868 MHz(1) 2.5 kbps, BER = 102, 868 MHz(1) 2.5 kbps, BER = 102, 868 MHz(1) 2.5 kbps, BER = 102, 868 MHz(1) 2.5 kbps, BER = 102, 868 MHz(1) 2.5 kbps, BER = 102, 868 MHz(1)

-119

-117 10 49 50 51 63 68 78 87 Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: CC1312PSIP bps dBm dBm dBm dBm dB dB dB dB dB dB dB dB dB dBm dB dB dB dBm dBm dB dB dB dB dBm dB dB dB dBm dBm dBm dB dB dB dB dB dB dB TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com When measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Image rejection (image compensation enabled) 2.5 kbps, BER = 102, 868 MHz(1) RSSI dynamic range Starting from the sensitivity limit RSSI accuracy Wireless M-Bus Receiver sensitivity, wM-BUS C-mode, 100 kbps 45 kHz Receiver sensitivity, wM-BUS T-mode, 100 kbps 50 kHz Receiver sensitivity, wM-BUS S2-mode, 32.768 kbps 50 kHz Receiver sensitivity, wM-BUS S1-mode, 32.768 kbps 50 kHz OOK, 4.8 kbps, 39 kHz RX Bandwidth Starting from the sensitivity limit across the given dynamic range Receiver Bandwidth 236 kHz, BER 1%

Receiver Bandwidth 236 kHz, BER 1%

Receiver Bandwidth 196 kHz, BER 1%

Receiver Bandwidth 311 kHz, BER 1%

Sensitivity Sensitivity BER = 102, 868 MHz BER = 102, 915 MHz Narrowband, 9.6 kbps 2.4 kHz deviation, 2-GFSK, 868 MHz, 17.1 kHz RX Bandwidth Sensitivity 1% BER Adjacent Channel Rejection Alternate Channel Rejection Blocking, 1 MHz Blocking, 2 MHz Blocking, 10 MHz 1% BER. Wanted signal 3 dB above the ETSI reference sensitivity limit (-104.6 dBm). Interferer 20 kHz 1% BER. Wanted signal 3 dB above the ETSI reference sensitivity limit (-104.6 dBm). Interferer 40 kHz 1% BER. Wanted signal 3 dB above the ETSI reference sensitivity limit (-104.6 dBm). 1 Mbps, 350 kHz deviation, 2-GFSK, 2.2 MHz RX Bandwidth BER = 102, 868 MHz BER = 102, 915 MHz BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. BER = 102, 915 MHz. Wanted signal 3 dB above sensitivity limit. 45 97 3

-104

-103

-109

-107

-112

-112

-118 39 40 65 69 85

-94

-93 44 27 59 54 dB dB dB dBm dBm dBm dBm dBm dBm dBm dB dB dB dB dB dBm dBm dB dB dB dB Sensitivity Sensitivity Blocking, +2 MHz Blocking, -2 MHz Blocking, +10 MHz Blocking, -10 MHz Wi-SUN, 2-GFSK Sensitivity Selectivity, -100 kHz, 50 kbps, 12.5 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, +100 kHz, 50 kbps, 12.5 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, 100 kHz, 50 kbps, 12.5 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, -200 kHz, 50 kbps, 12.5 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, +200 kHz, 50 kbps, 12.5 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, 200 kHz, 50 kbps, 12.5 kHz deviation, 2-GFSK, 866.6 MHz Sensitivity 50 kbps, 12.5 kHz deviation, 2-GFSK, 866.6 MHz, 68 kHz RX BW, 10% PER, 250 byte payload

-104 dBm 50 kbps, 12.5 kHz deviation, 2-GFSK, 68 kHz RX Bandwidth, 866.6 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 32 33 30 36 38 37 dB dB dB dB dB dB 50 kbps, 25 kHz deviation, 2-GFSK, 98 kHz RX Bandwidth, 918.2 MHz, 10% PER, 250 byte payload

-104 dBm 16 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 When measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Selectivity, -200 kHz, 50 kbps, 25 kHz deviation, 2-GFSK, 918.2 MHz Selectivity, +200 kHz, 50 kbps, 25 kHz deviation, 2-GFSK, 918.2 MHz Selectivity, 200 kHz, 50 kbps, 25 kHz deviation, 2-GFSK, 918.2 MHz Selectivity, -400 kHz, 50 kbps, 25 kHz deviation, 2-GFSK, 918.2 MHz Selectivity, +400 kHz, 50 kbps, 25 kHz deviation, 2-GFSK, 918.2 MHz Selectivity, 400 kHz, 50 kbps, 25 kHz deviation, 2-GFSK, 918.2 MHz Sensitivity Sensitivity Selectivity, -200 kHz, 100 kbps, 25 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, +200 kHz, 100 kbps, 25 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, 200 kHz, 100 kbps, 25 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, -400 kHz, 100 kbps, 25 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, +400 kHz, 100 kbps, 25 kHz deviation, 2-GFSK, 866.6 MHz Selectivity, 400 kHz, 100 kbps, 25 kHz deviation, 2-GFSK, 866.6 MHz Sensitivity Selectivity, -400 kHz, 100 kbps, 50 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, +400 kHz, 100 kbps, 50 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, 400 kHz, 100 kbps, 50 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, -800 kHz, 100 kbps, 50 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, +800 kHz, 100 kbps, 50 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, 800 kHz, 100 kbps, 50 kHz deviation, 2-GFSK, 920.9 MHz Sensitivity Selectivity, -400 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, +400 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, -800 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, +800 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 918.4 MHz Sensitivity 50 kbps, 25 kHz deviation, 2-GFSK, 98 kHz RX Bandwidth, 918.2 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 100 kbps, 25 kHz deviation, 2-GFSK, 866.6 MHz, 135 kHz RX BW, 10% PER, 250 byte payload 100 kbps, 25 kHz deviation, 2-GFSK, 918.2 MHz, 135 kHz RX BW, 10% PER, 250 byte payload 100 kbps, 25 kHz deviation, 2-GFSK, 135 kHz RX Bandwidth, 866.6 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 34 35 34 40 40 40

-102

-101 37 38 37 45 45 45 dB dB dB dB dB dB dBm dBm dB dB dB dB dB dB 100 kbps, 50 kHz deviation, 2-GFSK, 920.9 MHz, 196 kHz RX BW, 10% PER, 250 byte payload

-100 dBm 100 kbps, 50 kHz deviation, 2-GFSK, 196 kHz RX Bandwidth, 920.9 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 150 kbps, 37.5 kHz deviation, 2-GFSK, 918.4 MHz, 273 kHz RX BW, 10% PER, 250 byte payload 150 kbps, 37.5 kHz deviation, 2-GFSK, 273 kHz RX Bandwidth, 918.4 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 40 40 40 46 52 48

-96 41 42 46 49

-96 dB dB dB dB dB dB dBm dB dB dB dB dBm Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com When measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Selectivity, -400 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, +400 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, 400 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, -800 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, +800 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 920.9 MHz Selectivity, 800 kHz, 150 kbps, 37.5 kHz deviation, 2-GFSK, 920.9 MHz Sensitivity Selectivity, -400 kHz, 200 kbps, 50 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, +400 kHz, 200 kbps, 50 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, 400 kHz, 200 kbps, 50 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, -800 kHz, 200 kbps, 50 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, +800 kHz, 200 kbps, 50 kHz deviation, 2-GFSK, 918.4 MHz Selectivity, 800 kHz, 200 kbps, 50 kHz deviation, 2-GFSK, 918.4 MHz Sensitivity Selectivity, -600 kHz, 200 kbps, 100 kHz deviation, 2-GFSK, 920.8 MHz Selectivity, +600 kHz, 200 kbps, 100 kHz deviation, 2-GFSK, 920.8 MHz Selectivity, 600 kHz, 200 kbps, 100 kHz deviation, 2-GFSK, 920.8 MHz Selectivity, -1200 kHz, 200 kbps, 100 kHz deviation, 2-GFSK, 920.8 MHz Selectivity, +1200 kHz, 200 kbps, 100 kHz deviation, 2-GFSK, 920.8 MHz Selectivity, 1200 kHz, 200 kbps, 100 kHz deviation, 2-GFSK, 920.8 MHz 150 kbps, 37.5 kHz deviation, 2-GFSK, 273 kHz RX Bandwidth, 920.9 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 40 42 40 46 49 46 dB dB dB dB dB dB 200 kbps, 50 kHz deviation, 2-GFSK, 918.4 MHz, 273 kHz RX BW, 10% PER, 250 byte payload

-97 dBm 200 kbps, 50 kHz deviation, 2-GFSK, 273 kHz RX Bandwidth, 918.4 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 40 43 41 46 50 48 dB dB dB dB dB dB 200 kbps, 100 kHz deviation, 2-GFSK, 920.8 MHz, 273 kHz RX BW, 10% PER, 250 byte payload

-96 dBm 200 kbps, 100 kHz deviation, 2-GFSK, 273 kHz RX Bandwidth, 920.8 MHz,, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 43 47 44 51 54 51 dB dB dB dB dB dB Sensitivity 300 kbps, 75 kHz deviation, 2-GFSK, 917.6 MHz, 576 kHz RX BW, 10% PER, 250 byte payload

-94 dBm Selectivity, -600 kHz, 300 kbps, 75 kHz deviation, 2-GFSK, 917.6 MHz Selectivity, +600 kHz, 300 kbps, 75 kHz deviation, 2-GFSK, 917.6 MHz Selectivity, 600 kHz, 300 kbps, 75 kHz deviation, 2-GFSK, 917.6 MHz Selectivity, -1200 kHz, 300 kbps, 75 kHz deviation, 2-GFSK, 917.6 MHz Selectivity, +1200 kHz, 300 kbps, 75 kHz deviation, 2-GFSK, 920.8 MHz Selectivity, 1200 kHz, 300 kbps, 75 kHz deviation, 2-GFSK, 917.6 MHz 300 kbps, 75 kHz deviation, 2-GFSK, 576 kHz RX Bandwidth, 917.6 MHz,, 10% PER, 250 byte payload. Wanted signal 3 dB above sensitivity level 27 45 35 46 50 48 dB dB dB dB dB dB WB-DSSS, 240/120/60/30 kbps (480 ksym/s, 2-GFSK, 195 kHz Deviation, FEC (Half Rate), DSSS = 1/2/4/8, 622 kHz RX BW) Sensitivity Sensitivity 240 kbps, DSSS = 1, BER = 102, 915 MHz 120 kbps, DSSS = 2, BER = 102, 915 MHz

-101

-103 dBm dBm 18 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 When measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted. PARAMETER TEST CONDITIONS MIN Sensitivity Sensitivity Blocking 1 MHz Blocking 2 MHz Blocking 5 MHz Blocking 10 MHz 60 kbps, DSSS = 4, BER = 102, 915 MHz 30 kbps, DSSS = 8, BER = 102, 915 MHz 240 kbps, DSSS = 1, BER = 102, 915 MHz 240 kbps, DSSS = 1, BER = 102, 915 MHz 240 kbps, DSSS = 1, BER = 102, 915 MHz 240 kbps, DSSS = 1, BER = 102, 915 MHz

(1) Wanted signal 3 dB above the reference sensitivity limit according to ETSI EN 300 220 v. 3.1.1 TYP

-105

-106 49 53 58 67 MAX UNIT dBm dBm dB dB dB dB Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com 8.11 861 MHz to 1054 MHz - Transmit (TX) Measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS using 2-GFSK, 50 kbps, 25 kHz deviation unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted. (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT General parameters Max output power, boost mode Regular PA Max output power, Regular PA Output power programmable range Regular PA Output power variation over temperature Regular PA Output power variation over temperature Boost mode, regular PA Spurious emissions and harmonics Spurious emissions

(excluding harmonics) Regular PA (2) 30 MHz to 1 GHz VDDR = 1.95 V Minimum supply voltage (VDDS ) for boost mode is 2.1 V 915 MHz 14 dBm 868 MHz and 915 MHz 12.4 dBm 868 MHz and 915 MHz

+10 dBm setting Over recommended temperature operating range

+14 dBm setting Over recommended temperature operating range

+14 dBm setting ETSI restricted bands

+14 dBm setting ETSI outside restricted bands 34 2 1.5

< -54

< -36 dB dB dB dBm dBm 1 GHz to 12.75 GHz

(outside ETSI restricted bands)

+14 dBm setting measured in 1 MHz bandwidth (ETSI)

< -30

-35 dBm Spurious emissions out-

of-band Regular PA, 915 MHz (2) Spurious emissions out-

of-band Regular PA, 920.6/928 MHz (2) Harmonics Regular PA 30 MHz to 88 MHz

(within FCC restricted bands) 88 MHz to 216 MHz

(within FCC restricted bands) 216 MHz to 960 MHz

(within FCC restricted bands) 960 MHz to 2390 MHz and above 2483.5 MHz (within FCC restricted band) 1 GHz to 12.75 GHz

(outside FCC restricted bands) Below 710 MHz

(ARIB T-108) 710 MHz to 900 MHz

(ARIB T-108) 900 MHz to 915 MHz

(ARIB T-108) 930 MHz to 1000 MHz

(ARIB T-108) 1000 MHz to 1215 MHz

(ARIB T-108) Above 1215 MHz

(ARIB T-108) Second harmonic Third harmonic Fourth harmonic Fifth harmonic

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting

+14 dBm setting, 868 MHz

+14 dBm setting, 915 MHz

+14 dBm setting, 868 MHz

+14 dBm setting, 915 MHz

+14 dBm setting, 868 MHz

+14 dBm setting, 915 MHz

+14 dBm setting, 868 MHz

+14 dBm setting, 915 MHz

< -56

< -52

< -50

<-42 dBm dBm dBm dBm

< -40

-44 dBm

< -36

< -55

< -55

< -55

< -45

< -30

< -30

< -30

< -30

< -42

< -30

< -30

< -30

< -42 dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm 20 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 Measured on the CC1312PSIP-EM reference design with Tc = 25 C, VDDS = 3.0 V with DC/DC enabled and high power PA connected to VDDS using 2-GFSK, 50 kbps, 25 kHz deviation unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path, except for high power PA which is measured at a dedicated antenna connection. All measurements are performed conducted. (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Adjacent Channel Power Adjacent channel power, regular 14 dBm PA Adjacent channel, 20 kHz offset. 9.6 kbps, h=0.5 12.5 dBm setting. 868.3 MHz. 14 kHz channel BW Alternate channel power, regular 14 dBm PA Alternate channel, 40 kHz offset. 9.6 kbps, h=0.5 12.5 dBm setting. 868.3 MHz. 14 kHz channel BW

-24

-31 dBm dBm

(1)

(2) Some combinations of frequency, data rate and modulation format requires use of external crystal load capacitors for regulatory compliance. More details can be found in the device errata. Suitable for systems targeting compliance with EN 300 220, EN 303 131, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108. 8.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode When measured on the reference design with Tc = 25 C, VDDS = 3.0 V. PARAMETER TEST CONDITIONS MIN Phase noise in the 868- and 915-MHz bands 20 kHz PLL loop bandwidth 10 kHz offset 100 kHz offset 200 kHz offset 400 kHz offset 1000 kHz offset 2000 kHz offset 10000 kHz offset 8.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode When measured on the reference design with Tc = 25 C, VDDS = 3.0 V. PARAMETER TEST CONDITIONS MIN Phase noise in the 868- and 915-MHz bands 150 kHz PLL loop bandwith 10 kHz offset 100 kHz offset 200 kHz offset 400 kHz offset 1000 kHz offset 2000 kHz offset 10000 kHz offset 8.14 Timing and Switching Characteristics 8.14.1 Reset Timing PARAMETER RESET_N low duration TYP 74 97 107 113 120 127 141 TYP 93 93 95 104 121 130 140 MAX UNIT dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz MAX UNIT dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz MIN TYP MAX UNIT 1 s 8.14.2 Wakeup Timing Measured over operating free-air temperature with VDDS = 3.0 V (unless otherwise noted). The times listed here do not include software overhead. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT MCU, Reset to Active(1) MCU, Shutdown to Active(1) MCU, Standby to Active MCU, Active to Standby 850 - 4000 850 - 4000 165 39 s s s s Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com Measured over operating free-air temperature with VDDS = 3.0 V (unless otherwise noted). The times listed here do not include software overhead. MCU, Idle to Active PARAMETER TEST CONDITIONS MIN TYP 15 MAX UNIT s

(1) The wakeup time is dependent on remaining charge on VDDR capacitor when starting the device, and thus how long the device has been in Reset or Shutdown before starting up again. The wake up time increases with a higher capacitor value. 22 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.14.3 Clock Specifications CC1312PSIP SWRS293 MAY 2023 8.14.3.1 48 MHz Crystal Oscillator (XOSC_HF) and RF frequency accuracy The module contains a 48 MHz crystal that is connected to the oscillator. During the production test of the module, the internal capacitor array loading the crystal is adjusted to minimize the crystal frequency error. The production test is also minimizing the RF frequency error at room temperature by adjusting the RF frequency word (PLL). This initial correction of the RF frequency is used in software (if enabled) to compensate the RF frequency based on the estimated temperature drift of the crystal. Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted.(1) UNIT PARAMETER MAX TYP MIN Crystal frequency Crystal oscillator start-up time(2) 48 MHz initial frequency accuracy at 25 48 MHz frequency stability, temperature drift -40 to 105 Crystal aging, 5 years Crystal aging, 10 years RF Frequency accuracy including internal software compensated temperature drift, excluding aging, -40 to 65. Based on estimated crystal drift across temperature from the manufacturer's crystal specification.

-5

-16

-2

-4

-10 48 200 2 MHz s ppm ppm ppm ppm 5 18 2 2 10 ppm

(1)

(2) Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device. Start-up time using the TI-provided power driver. Start-up time may increase if driver is not used. 8.14.3.2 48 MHz RC Oscillator (RCOSC_HF) Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. Frequency Uncalibrated frequency accuracy Calibrated frequency accuracy(1) Start-up time

(1) Accuracy relative to the calibration source (XOSC_HF) MAX MIN TYP 48 1 0.25 5 8.14.3.3 2 MHz RC Oscillator (RCOSC_MF) Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. Calibrated frequency Start-up time MIN TYP MAX 2 5 UNIT MHz

s UNIT MHz s 8.14.3.4 32.768 kHz Crystal Oscillator (XOSC_LF) and RTC accuracy The module contains a 32 kHz crystal that is connected to the oscillator. During the production test of the module, the RTC

(Real Time Clock) derived from the 32 kHz crystal oscillator is calibrated at roome tempertaure. This is done to minimize the RTC error caused by the initial error of the 32 kHz crystal. This initial correction of the RTC is used in software (if enabled) to compensate the RTC based on the estimated temperature drift of the crystal. Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. Crystal frequency Initial frequency accuracy at 25 32kHz crystal aging, first year Real Time Clock (RTC) accuracy using temperature compensation for the 32kHz xtal

(if enabled in software), excluding aging, -40 to 105 degrees. Based on estimated crystal drift across temperature from the manufacturer's crystal specification. Real Time Clock (RTC) accuracy using temperature compensation for the 32kHz xtal

(if enabled in software), excluding aging, -40 to 65 degrees. Based on estimated crystal drift across temperature from the manufacturer's crystal specification. TYP 32.768 MIN

-20

-3

-100

-50 MAX UNIT kHz ppm ppm ppm 20 3 50 50 ppm Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com 8.14.3.5 32 kHz RC Oscillator (RCOSC_LF) Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. Frequency Calibrated RTC variation(1) Calibrated periodically against XOSC_HF(2) Temperature coefficient MIN TYP 32.8 600(3) 50 MAX UNIT kHz ppm ppm/C

(1) When using RCOSC_LF as source for the low frequency system clock (SCLK_LF), the accuracy of the SCLK_LF-derived Real Time Clock (RTC) can be improved by measuring RCOSC_LF relative to XOSC_HF and compensating for the RTC tick speed. This functionality is available through the TI-provided Power driver. TI driver software calibrates the RTC every time XOSC_HF is enabled. Some device's variation can exceed 1000 ppm. Further calibration will not improve variation.

(2)

(3) 24 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.14.4 Synchronous Serial Interface (SSI) Characteristics CC1312PSIP SWRS293 MAY 2023 Figure 8-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement Figure 8-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsSSIClkSSIFssSSITxSSIRxMSBLSBS2S3S14to16bits0SSIClkSSIFssSSITxSSIRxMSBLSBMSBLSBS2S3S18-bitcontrol4to16bitsoutputdataADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com Figure 8-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1 8.14.4.1.1 Synchronous Serial Interface (SSI) Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER NO. PARAMETER S1 S2(1) S3(1) tclk_per tclk_high tclk_low SSIClk cycle time SSIClk high time SSIClk low time

(1) Refer to SSI timing diagrams , and .

(2) When using the TI-provided Power driver, the SSI system clock is always 48 MHz. 8.14.5 UART 8.14.5.1 UART Characteristics over operating free-air temperature range (unless otherwise noted) MIN 12 TYP MAX UNIT 65024 System Clocks (2) 0.5 0.5 tclk_per tclk_per UART rate PARAMETER MIN TYP MAX 3 UNIT MBaud 26 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsSSIClk(SPO = 1)SSITx(Master)SSIRx(Slave)LSBSSIClk(SPO = 0)S2S1SSIFssLSBS3MSBMSBADVANCE INFORMATION www.ti.com 8.15 Peripheral Characteristics 8.15.1 ADC 8.15.1.1 Analog-to-Digital Converter (ADC) Characteristics Tc = 25 C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1) Performance numbers require use of offset and gain adjustments in software by TI-provided ADC drivers. CC1312PSIP SWRS293 MAY 2023 PARAMETER Input voltage range Resolution Sample Rate Offset Gain error DNL(4) Differential nonlinearity INL Integral nonlinearity ENOB Effective number of bits TEST CONDITIONS MIN 0 Internal 4.3 V equivalent reference(2) Internal 4.3 V equivalent reference(2) Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone, DC/DC enabled VDDS as reference, 200 kSamples/s, 9.6 kHz input tone Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone Internal reference, voltage scaling disabled, 14-bit mode, 200 kSamples/s, 600 Hz input tone (5) Internal reference, voltage scaling disabled, 15-bit mode, 200 kSamples/s, 150 Hz input tone (5) Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone THD Total harmonic distortion VDDS as reference, 200 kSamples/s, 9.6 kHz input tone SINAD, SNDR Signal-to-noise and distortion ratio Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone VDDS as reference, 200 kSamples/s, 9.6 kHz input tone Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone Internal 4.3 V equivalent reference(2), 200 kSamples/s, 9.6 kHz input tone SFDR Spurious-free dynamic range VDDS as reference, 200 kSamples/s, 9.6 kHz input tone Internal reference, voltage scaling disabled, 32 samples average, 200 kSamples/s, 300 Hz input tone Conversion time Serial conversion, time-to-output, 24 MHz clock Current consumption Internal 4.3 V equivalent reference(2) Current consumption VDDS as reference Reference voltage Reference voltage Equivalent fixed internal reference (input voltage scaling enabled). For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/

offset compensation factors stored in FCFG1 Fixed internal reference (input voltage scaling disabled). For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/offset compensation factors stored in FCFG1. This value is derived from the scaled value (4.3 V) as follows:

Vref = 4.3 V 1408 / 4095 Reference voltage VDDS as reference, input voltage scaling enabled Reference voltage VDDS as reference, input voltage scaling disabled TYP 12 2 7

>1 4 9.8 9.8 10.1 11.1 11.3 11.6 65 70 72 60 63 68 70 73 75 50 0.40 0.57 4.3(2) (3) 1.48 VDDS VDDS /

2.82(3) MAX VDDS 200 UNIT V Bits ksps LSB LSB LSB LSB Bits dB dB dB Clock Cycles mA mA V V V V Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com Tc = 25 C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1) Performance numbers require use of offset and gain adjustments in software by TI-provided ADC drivers. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input impedance 200 kSamples/s, voltage scaling enabled. Capacitive input, Input impedance depends on sampling frequency and sampling time

>1 M Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V Applied voltage must be within Absolute Maximum Ratings at all times

(1) Using IEEE Std 1241-2010 for terminology and test methods

(2)

(3)

(4) No missing codes

(5) ADC_output = (4n samples ) >> n, n = desired extra bits 28 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.15.2 DAC CC1312PSIP SWRS293 MAY 2023 8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT General Parameters Resolution VDDS Supply voltage FDAC Clock frequency Voltage output settling time External capacitive load External resistive load Short circuit current ZMAX Max output impedance Vref =

VDDS, buffer ON, CLK 250 kHz Any load, any VREF, pre-charge OFF, DAC charge-pump ON External Load(4), any VREF, pre-charge OFF, DAC charge-pump OFF Any load, VREF = DCOUPL, pre-charge ON Buffer ON (recommended for external load) Buffer OFF (internal load) VREF = VDDS, buffer OFF, internal load VREF = VDDS, buffer ON, external capacitive load = 20 pF(3) 1.8 2.0 2.6 16 16 10 VDDS = 3.8 V, DAC charge-pump OFF VDDS = 3.0 V, DAC charge-pump ON VDDS = 3.0 V, DAC charge-pump OFF VDDS = 2.0 V, DAC charge-pump ON VDDS = 2.0 V, DAC charge-pump OFF VDDS = 1.8 V, DAC charge-pump ON VDDS = 1.8 V, DAC charge-pump OFF Internal Load - Continuous Time Comparator / Low Power Clocked Comparator Differential nonlinearity DNL Differential nonlinearity VREF = VDDS, load = Continuous Time Comparator or Low Power Clocked Comparator FDAC = 250 kHz VREF = VDDS, load = Continuous Time Comparator or Low Power Clocked Comparator FDAC = 16 kHz Offset error(2) Load = Continuous Time Comparator Offset error(2) Load = Low Power Clocked Comparator Max code output voltage variation(2) Load = Continuous Time Comparator VREF = VDDS = 3.8 V VREF = VDDS= 3.0 V VREF = VDDS = 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS= 3.8 V VREF = VDDS = 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS = 3.8 V VREF = VDDS = 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF 3.8 3.8 3.8 250 1000 200 400 Bits V kHz 1 / FDAC pF M A k LSB(1) LSB(1) LSB(1) LSB(1) 8 13 13.8 20 50.8 51.7 53.2 48.7 70.2 46.3 88.9 1 1.2 0.64 0.81 1.27 3.43 2.88 2.37 0.78 0.77 3.46 3.44 4.70 4.11 1.53 1.71 2.10 6.00 3.85 5.84 Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN Max code output voltage variation(2) Load = Low Power Clocked Comparator Output voltage range(2) Load = Continuous Time Comparator Output voltage range(2) Load = Low Power Clocked Comparator VREF = VDDS= 3.8 V VREF =VDDS= 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS = 3.8 V, code 1 VREF = VDDS = 3.8 V, code 255 VREF = VDDS= 3.0 V, code 1 VREF = VDDS= 3.0 V, code 255 VREF = VDDS= 1.8 V, code 1 VREF = VDDS = 1.8 V, code 255 VREF = DCOUPL, pre-charge OFF, code 1 VREF = DCOUPL, pre-charge OFF, code 255 VREF = DCOUPL, pre-charge ON, code 1 VREF = DCOUPL, pre-charge ON, code 255 VREF = ADCREF, code 1 VREF = ADCREF, code 255 VREF = VDDS = 3.8 V, code 1 VREF = VDDS= 3.8 V, code 255 VREF = VDDS= 3.0 V, code 1 VREF = VDDS= 3.0 V, code 255 VREF = VDDS = 1.8 V, code 1 VREF = VDDS = 1.8 V, code 255 VREF = DCOUPL, pre-charge OFF, code 1 VREF = DCOUPL, pre-charge OFF, code 255 VREF = DCOUPL, pre-charge ON, code 1 VREF = DCOUPL, pre-charge ON, code 255 VREF = ADCREF, code 1 VREF = ADCREF, code 255 External Load VREF = VDDS, FDAC = 250 kHz INL Integral nonlinearity VREF = DCOUPL, FDAC = 250 kHz VREF = ADCREF, FDAC = 250 kHz DNL Differential nonlinearity VREF = VDDS, FDAC = 250 kHz Offset error Max code output voltage variation VREF = VDDS= 3.8 V VREF = VDDS= 3.0 V VREF = VDDS = 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF VREF = VDDS= 3.8 V VREF = VDDS= 3.0 V VREF = VDDS= 1.8 V VREF = DCOUPL, pre-charge ON VREF = DCOUPL, pre-charge OFF VREF = ADCREF www.ti.com MAX UNIT LSB(1) V V LSB(1) LSB(1) LSB(1) LSB(1) TYP 2.92 3.06 3.91 7.84 4.06 6.94 0.03 3.62 0.02 2.86 0.01 1.71 0.01 1.21 1.27 2.46 0.01 1.41 0.03 3.61 0.02 2.85 0.01 1.71 0.01 1.21 1.27 2.46 0.01 1.41 1 2 1 1 0.40 0.50 0.75 1.55 1.30 1.10 1.00 1.00 1.00 3.45 2.10 1.90 30 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN Output voltage range Load = Low Power Clocked Comparator VREF = VDDS = 3.8 V, code 1 VREF = VDDS = 3.8 V, code 255 VREF = VDDS = 3.0 V, code 1 VREF = VDDS= 3.0 V, code 255 VREF = VDDS= 1.8 V, code 1 VREF = VDDS = 1.8 V, code 255 VREF = DCOUPL, pre-charge OFF, code 1 VREF = DCOUPL, pre-charge OFF, code 255 VREF = DCOUPL, pre-charge ON, code 1 VREF = DCOUPL, pre-charge ON, code 255 VREF = ADCREF, code 1 VREF = ADCREF, code 255

(1)

(2)

(3)

(4) 1 LSB (VREF 3.8 V/3.0 V/1.8 V/DCOUPL/ADCREF) = 14.10 mV/11.13 mV/6.68 mV/4.67 mV/5.48 mV Includes comparator offset A load > 20 pF will increases the settling time Keysight 34401A Multimeter CC1312PSIP SWRS293 MAY 2023 MAX UNIT V TYP 0.03 3.61 0.02 2.85 0.02 1.71 0.02 1.20 1.27 2.46 0.02 1.42 Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 31 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 8.15.3 Temperature and Battery Monitor www.ti.com 8.15.3.1 Temperature Sensor Measured on a Texas Instruments reference design with Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution Accuracy Accuracy Supply voltage coefficient(1)

-40 C to 0 C 0 C to 105 C 2 5.0 3.5 3.6 C C C C/V

(1) The temperature sensor is automatically compensated for VDDS variation when using the TI-provided temperature driver. 8.15.3.2 Battery Monitor Measured on a Texas Instruments reference design with Tc = 25 C, unless otherwise noted. PARAMETER TEST CONDITIONS Resolution Range Integral nonlinearity (max) Accuracy Offset error Gain error VDDS = 3.0 V MIN 1.8 TYP 25 23 22.5

-32

-1 MAX UNIT 3.8 mV V mV mV mV

32 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.15.4 Comparators 8.15.4.1 Low-Power Clocked Comparator Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS Input voltage range Clock frequency Internal reference voltage(1) Offset Decision time Using internal DAC with VDDS as reference voltage, DAC code = 0 - 255 Measured at VDDS / 2, includes error from internal DAC Step from 50 mV to 50 mV CC1312PSIP SWRS293 MAY 2023 MIN 0 TYP MAX UNIT SCLK_LF 0.024 - 2.865 5 1 VDDS V V mV Clock Cycle

(1) The comparator can use an internal 8 bits DAC as its reference. The DAC output voltage range depends on the reference voltage selected. See 8.15.4.2 Continuous Time Comparator Tc = 25C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP Input voltage range(1) Offset Decision time Current consumption Measured at VDDS / 2 Step from 10 mV to 10 mV Internal reference 0 5 0.70 8.0 MAX VDDS UNIT V mV s A

(1) The input voltages can be generated externally and connected throughout I/Os or an internal reference voltage can be generated using the DAC 8.15.5 Current Source 8.15.5.1 Programmable Current Source Tc = 25 C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Current source programmable output range (logarithmic range) Resolution 0.25 - 20 0.25 A A Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 33 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 8.15.6 GPIO 8.15.6.1 GPIO DC Characteristics Measurements CBSed to PG2.1:

www.ti.com PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25 C, VDDS = 1.8 V GPIO VOH at 8 mA load GPIO VOL at 8 mA load GPIO VOH at 4 mA load GPIO VOL at 4 mA load GPIO pullup current GPIO pulldown current IOCURR = 2, high-drive GPIOs only IOCURR = 2, high-drive GPIOs only IOCURR = 1 IOCURR = 1 Input mode, pullup enabled, Vpad = 0 V Input mode, pulldown enabled, Vpad = VDDS GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 1 GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 0 GPIO input hysteresis TA = 25 C, VDDS = 3.0 V GPIO VOH at 8 mA load GPIO VOL at 8 mA load GPIO VOH at 4 mA load GPIO VOL at 4 mA load TA = 25 C, VDDS = 3.8 V GPIO pullup current GPIO pulldown current IH = 1, difference between 0 1 and 1 0 points IOCURR = 2, high-drive GPIOs only IOCURR = 2, high-drive GPIOs only IOCURR = 1 IOCURR = 1 Input mode, pullup enabled, Vpad = 0 V Input mode, pulldown enabled, Vpad = VDDS GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 1 GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 0 IH = 1, difference between 0 1 and 1 0 points GPIO input hysteresis TA = 25 C VIH VIL 1.56 0.24 1.59 0.21 73 19 1.08 0.73 0.35 2.59 0.42 2.63 0.40 282 110 1.97 1.55 0.42 V V V V A A V V V V V V V A A V V V V V Lowest GPIO input voltage reliably interpreted as a High 0.8*VDDS Highest GPIO input voltage reliably interpreted as a Low 0.2*VDDS 34 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.16 Typical Characteristics CC1312PSIP SWRS293 MAY 2023 All measurements in this section are done with Tc = 25 C and VDDS = 3.0 V, unless otherwise noted. See Recommended Operating Conditions for device limits. Values exceeding these limits are for reference only. 8.16.1 MCU Current 12 11 10 9 8 7 6 5 4 3 2 1

A

t n e r r u C Figure 8-4. Active Mode (MCU) Current vs. Supply Voltage (VDDS) (Running CoreMark, SCLK_HF = 48 MHz RCOSC) Figure 8-5. Standby Mode (MCU) Current vs. Temperature (80kB RAM retention, no Cache retention, RTC On SCLK_LF =32 kHz XOSC) 0

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature [C]

12 11 10 9 8 7 6 5 4 3 2 1

A

t n e r r u C 0

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature [C]

Figure 8-6. Standby Mode (MCU) Current vs. Temperature, 80kB RAM retention, no Cache retention, RTC On SCLK_LF =32 kHz XOSC, VDDS = 3.6 V Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 35 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsVoltage [V]Current [mA]Active Current vs. VDDSRunning CoreMark, SCLK_HF = 48 MHz RCOSC1.822.22.42.62.833.23.43.63.82.533.544.555.56D001ADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 8.16.2 RX Current 8 7.8 7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 5.8 5.6 5.4 5.2

A m

t n e r r u C 11 10.5 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5

A m

t n e r r u C 5

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature [C]

5 1.8 2 2.2 2.4 2.6 2.8 Voltage [V]

3 3.2 3.4 3.6 3.8 Figure 8-7. RX Current vs. Temperature (50 kbps, 868.3 MHz) Figure 8-8. RX Current vs. Supply Voltage (VDDS)

(50 kbps, 868.3 MHz) 36 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.16.3 TX Current

A m

t n e r r u C 22.2 21.9 21.6 21.3 21 20.7 20.4 20.1 19.8 19.5 19.2 18.9 18.6 18.3 18 17.7 17.4 17.1 16.8 16.5 16.2 15.9

-40 -30 -20 -10 0 10

A m

t n e r r u C 32.5 30 27.5 25 22.5 20 17.5 15 60 70 80 90 100105 1.83 2.03 2.23 2.43 20 30 50 Temperature [C]

40 2.63 2.83 Voltage [V]

3.03 CC1312PSIP SWRS293 MAY 2023 3.23 3.43 3.63 3.8 Figure 8-9. TX Current vs. Temperature (50 kbps, 868.3 MHz, +10 dBm, VDDS = 3.6 V) Figure 8-10. TX Current vs. Supply Voltage (VDDS)

(50 kbps, 868.3 MHz, +10 dBm setting)

A m

t n e r r u C 51 49 47 45 43 41 39 37 35 33 31 29 27 25 Figure 8-11. TX Current vs. Supply Voltage (VDDS) (50 kbps, 915 MHz, +14 dBm setting) 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 Voltage [V]

Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com Table 8-1. Typical TX Current and Output Power CC1312PSIP at 915 MHz, VDDS = 3.0 V (Measured on LP-EM-CC1312PSIP) txPower TX Power Setting (SmartRF Studio) Typical Output Power [dBm]

Typical Current Consumption [mA]

0x013F 0x823F 0x7828 0x7A15 0x4C0D 0x400A 0x449A 0x364D 0x2892 0x20DC 0x28D8 0x1C46 0x18D4 0x16D1 0x16D0 0x0CCB 0x0CC9 0x08C7 0x0AC5 0x08C3 0x08C2 14 12.5 12 11 10 9 8 7 6 5 4 3 2 1 0

-3

-5

-7

-10

-15

-20 13.8 12.2 11.8 10.9 10.1 9.5 8.1 6.8 6.3 4.9 4 3.7 2.8 0.8 0.3

-3.4

-5.4

-8

-11.7

-17.1

-20.9 34.6 24.9 23.5 21.6 20.0 19.1 17.1 15.3 14.8 13.7 12.6 11.7 11.5 10.6 10.3 8.6 7.9 7.3 6.6 5.9 5.6 38 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.16.4 RX Performance CC1312PSIP SWRS293 MAY 2023

m B d

y t i v i t i s n e S

-106.4

-106.6

-106.8

-107

-107.2

-107.4

-107.6

-107.8

-108

-108.2

m B d

y t i v i t i s n e S

-102

-103

-104

-105

-106

-107

-108

-109

-110

-111

-112

-113

-114

-115 863 864 865 866 867 868 869 870

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Frequency [MHz]

Temperature [C]

Figure 8-12. Sensitivity vs. Frequency (50 kbps) Figure 8-13. Sensitivity vs. Temperature (50 kbps, 868.3 MHz)

m B d

y t i v i t i s n e S

-103

-104

-105

-106

-107

-108

-109

-110

-111

-112

B d

y t i v i t c e l e S 100 90 80 70 60 50 40 30 20 10 0

-10

-20 1.8 2 2.2 2.4 2.6 2.8 Voltage [V]

3 3.2 3.4 3.6 3.8

-10

-8

-6

-4

-2 0 Frequency [MHz]

2 4 6 8 10 Figure 8-14. Sensitivity vs. Supply Voltage (VDDS)

(50 kbps, 868.3 MHz) Figure 8-15. Selectivity vs. Frequency Offset (50 kbps, 868.3 MHz) Figure 8-16. PER vs. Level vs. Frequency

(SimpleLink Long Range 5 kbps, 868 MHz) Figure 8-17. 802.15.4, 50 kbps, 25 kHz deviation, 2-GFSK, 100 kHz RX Bandwidth Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 39 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 8.16.5 TX Performance www.ti.com

m B d

r e w o P t u p t u O 11 10.9 10.8 10.7 10.6 10.5 10.4 10.3 10.2 10.1 10 9.9 9.8 9.7 9.6 9.5 9.4 9.3 9.2 9.1 9

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature [C]

m B d

r e w o P t u p t u O 11 10.9 10.8 10.7 10.6 10.5 10.4 10.3 10.2 10.1 10 9.9 9.8 9.7 9.6 9.5 9.4 9.3 9.2 9.1 9 1.8 2 2.2 2.4 2.6 2.8 Voltage [V]

3 3.2 3.4 3.6 3.8 Figure 8-18. Output Power vs. Temperature (868.3 MHz, +10 dBm setting) Figure 8-19. Output Power vs. Supply Voltage

(VDDS) (868.3 MHz, +10 dBm setting)

m B d

r e w o P t u p t u O 14 13.9 13.8 13.7 13.6 13.5 13.4 13.3 13.2 13.1 13 12.9 12.8 12.7 12.6 12.5 12.4 12.3 12.2 12.1 12

m B d

r e w o P t u p t u O 15 14.9 14.8 14.7 14.6 14.5 14.4 14.3 14.2 14.1 14 13.9 13.8 13.7 13.6 13.5 13.4 13.3 13.2 13.1 13 863 864 865 866 867 868 869 870 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 Frequency [MHz]

Voltage [V]

Figure 8-20. Output Power vs. Frequency (+14 dBm setting) Figure 8-21. Output Power vs. Supply Voltage

(VDDS) (915 MHz, +14 dBm setting) 40 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 8.16.6 ADC Performance CC1312PSIP SWRS293 MAY 2023 Figure 8-22. ENOB vs. Input Frequency Figure 8-23. ENOB vs. Sampling Frequency Figure 8-24. INL vs. ADC Code Figure 8-25. DNL vs. ADC Code Figure 8-26. ADC Accuracy vs. Temperature Figure 8-27. ADC Accuracy vs. Supply Voltage

(VDDS) Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsFrequency [kHz]ENOB [Bit]ENOB vs. Input Frequency0.20.30.50.7123456781020304050701009.69.910.210.510.811.111.4D061Internal Reference, No AveragingInternal Unscaled Reference, 14-bit ModeFrequency [kHz]ENOB [Bit]ENOB vs. Sampling FrequencyVin = 3.0 V Sine wave, Internal reference,Fin = Fs / 10123456781020304050701002009.89.859.99.951010.0510.110.1510.2D062ADC CodeINL [LSB]INL vs. ADC CodeVin = 3.0 V Sine wave, Internal reference,200 kSamples/s040080012001600200024002800320036004000-1.5-1-0.500.511.5D064ADC CodeDNL [LSB]DNL vs. ADC CodeVin = 3.0 V Sine wave, Internal reference,200 kSamples/s040080012001600200024002800320036004000-0.500.511.522.5D065Temperature [C]Voltage [V]ADC Accuracy vs. TemperatureVin = 1 V, Internal reference,200 kSamples/s-40-30-20-10010203040506070809010011.0011.0021.0031.0041.0051.0061.0071.0081.0091.01D066Voltage [V]Voltage [V]ADC Accuracy vs. VDDSVin = 1 V, Internal reference,200 kSamples/s1.822.22.42.62.833.23.43.63.811.0011.0021.0031.0041.0051.0061.0071.0081.0091.01D067ADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 9 Detailed Description 9.1 Overview www.ti.com Section 4 shows the core modules of the CC1312PSIP device. 9.2 System CPU The CC1312PSIP SimpleLink Wireless MCU contains an Arm Cortex-M4F system CPU, which runs the application and the higher layers of radio protocol stacks. The system CPU is the foundation of a high-performance, low-cost platform that meets the system requirements of minimal memory implementation, and low-power consumption, while delivering outstanding computational performance and exceptional system response to interrupts. Its features include the following:

ARMv7-M architecture optimized for small-footprint embedded applications Arm Thumb-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm core in a compact memory size Fast code execution permits increased sleep mode time Deterministic, high-performance interrupt handling for time-critical applications Single-cycle multiply instruction and hardware divide Hardware division and fast digital-signal-processing oriented multiply accumulate Saturating arithmetic for signal processing Memory Protection Unit (MPU) for safety-critical applications Full debug with data matching for watchpoint generation IEEE 754-compliant single-precision Floating Point Unit (FPU) Data Watchpoint and Trace Unit (DWT) JTAG Debug Access Port (DAP) Flash Patch and Breakpoint Unit (FPB) Trace support reduces the number of pins required for debugging and tracing Instrumentation Trace Macrocell Unit (ITM) Trace Port Interface Unit (TPIU) with asynchronous serial wire output (SWO) Optimized for single-cycle flash memory access Tightly connected to 8-KB 4-way random replacement cache for minimal active power consumption and wait states Ultra-low-power consumption with integrated sleep modes 48 MHz operation 1.25 DMIPS per MHz 42 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 9.3 Radio (RF Core) CC1312PSIP SWRS293 MAY 2023 The RF Core is a highly flexible and future proof radio module which contains an Arm Cortex-M0 processor that interfaces the analog RF and base-band circuitry, handles data to and from the system CPU side, and assembles the information bits in a given packet structure. The RF core offers a high level, command-based API to the main CPU that configurations and data are passed through. The Arm Cortex-M0 processor is not programmable by customers and is interfaced through the TI-provided RF driver that is included with the SimpleLink Software Development Kit (SDK). The RF core can autonomously handle the time-critical aspects of the radio protocols, thus offloading the main CPU, which reduces power and leaves more resources for the user application. Several signals are also available to control external circuitry such as RF switches or range extenders autonomously. The various physical layer radio formats are partly built as a software defined radio where the radio behavior is either defined by radio ROM contents or by non-ROM radio formats delivered in form of firmware patches with the SimpleLink SDKs. This allows the radio platform to be updated for support of future versions of standards even with over-the-air (OTA) updates while still using the same silicon. Note Not all combinations of features, frequencies, data rates, and modulation formats described in this chapter are supported. Over time, TI can enable new physical radio formats (PHYs) for the device and provides performance numbers for selected PHYs in the data sheet. Supported radio formats for a specific device, including optimized settings to use with the TI RF driver, are included in the SmartRF Studio tool with performance numbers of selected formats found in the Specifications section. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 43 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 9.3.1 Proprietary Radio Formats www.ti.com The CC1312PSIP radio can support a wide range of physical radio formats through a set of hardware peripherals combined with firmware available in the device ROM, covering various customer needs for optimizing towards parameters such as speed or sensitivity. This allows great flexibility in tuning the radio both to work with legacy protocols as well as customizing the behavior for specific application needs. Table 9-1 gives a simplified overview of features of the various radio formats available in ROM. Other radio formats may be available in the form of radio firmware patches or programs through the Software Development Kit (SDK) and may combine features in a different manner, as well as add other features. Feature Main 2-(G)FSK Mode High Data Rates Low Data Rates SimpleLink Long Range Table 9-1. Feature Support Programmable preamble, sync word, and CRC Programmable receive bandwidth Data / Symbol rate(3) Modulation format Dual Sync Word Carrier Sense (1) (2) Preamble Detection(2) Data Whitening Digital RSSI CRC filtering Direct-sequence spread spectrum (DSSS) Forward error correction (FEC) Link Quality Indicator (LQI) Yes Yes 20 to 1000 kbps 2-(G)FSK Yes Yes 2 Msps 2-(G)FSK 4-(G)FSK Yes Yes (down to 4 kHz) 100 ksps 2-(G)FSK 4-(G)FSK No Yes 20 ksps 2-(G)FSK Yes Yes Yes Yes Yes Yes No No Yes Yes No Yes Yes Yes Yes No No Yes No No Yes Yes Yes Yes No No Yes No No No Yes Yes Yes 1:2 1:4 1:8 Yes Yes

(1) Carrier Sense can be used to implement HW-controlled listen-before-talk (LBT) and Clear Channel Assessment (CCA) for compliance with such requirements in regulatory standards. This is available through the CMD_PROP_CS radio API.

(2) Carrier Sense and Preamble Detection can be used to implement sniff modes where the radio is duty cycled to save power.

(3) Data rates are only indicative. Data rates outside this range may also be supported. For some specific combinations of settings, a smaller range might be supported. 9.4 Memory The up to 352-KB nonvolatile (Flash) memory provides storage for code and data. The flash memory is in-system programmable and erasable. The last flash memory sector must contain a Customer Configuration section (CCFG) that is used by boot ROM and TI provided drivers to configure the device. This configuration is done through the ccfg.c source file that is included in all TI provided examples. The ultra-low leakage system static RAM (SRAM) is split into up to five 16-KB blocks and can be used for both storage of data and execution of code. Retention of SRAM contents in Standby power mode is enabled by default and included in Standby mode power consumption numbers. Parity checking for detection of bit errors in memory is built-in, which reduces chip-level soft errors and thereby increases reliability. System SRAM is always initialized to zeroes upon code execution from boot. To improve code execution speed and lower power when executing code from nonvolatile memory, a 4-way nonassociative 8-KB cache is enabled by default to cache and prefetch instructions read by the system CPU. The cache can be used as a general-purpose RAM by enabling this feature in the Customer Configuration Area

(CCFG). 44 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 There is a 4-KB ultra-low leakage SRAM available for use with the Sensor Controller Engine which is typically used for storing Sensor Controller programs, data and configuration parameters. This RAM is also accessible by the system CPU. The Sensor Controller RAM is not cleared to zeroes between system resets. The ROM includes a TI-RTOS kernel and low-level drivers, as well as significant parts of selected radio stacks, which frees up flash memory for the application. The ROM also contains a serial (SPI and UART) bootloader that can be used for initial programming of the device. 9.5 Sensor Controller The Sensor Controller contains circuitry that can be selectively enabled in both Standby and Active power modes. The peripherals in this domain can be controlled by the Sensor Controller Engine, which is a proprietary power-optimized CPU. This CPU can read and monitor sensors or perform other tasks autonomously; thereby significantly reducing power consumption and offloading the system CPU. The Sensor Controller Engine is user programmable with a simple programming language that has syntax similar to C. This programmability allows for sensor polling and other tasks to be specified as sequential algorithms rather than static configuration of complex peripheral modules, timers, DMA, register programmable state machines, or event routing. The main advantages are:

Flexibility - data can be read and processed in unlimited manners while still ensuring ultra-low power 2 MHz low-power mode enables lowest possible handling of digital sensors Dynamic reuse of hardware resources 40-bit accumulator supporting multiplication, addition and shift Observability and debugging options Sensor Controller Studio is used to write, test, and debug code for the Sensor Controller. The tool produces C driver source code, which the System CPU application uses to control and exchange data with the Sensor Controller. Typical use cases may be (but are not limited to) the following:

Read analog sensors using integrated ADC or comparators Capacitive sensing Waveform generation Very low-power pulse counting (flow metering) Key scan Interface digital sensors using GPIOs, SPI, UART, or I2C (UART and I2C are bit-banged) The peripherals in the Sensor Controller include the following:

The low-power clocked comparator can be used to wake the system CPU from any state in which the comparator is active. A configurable internal reference DAC can be used in conjunction with the comparator. The output of the comparator can also be used to trigger an interrupt or the ADC. Capacitive sensing functionality is implemented through the use of a constant current source, a time-to-digital converter, and a comparator. The continuous time comparator in this block can also be used as a higher-

accuracy alternative to the low-power clocked comparator. The Sensor Controller takes care of baseline tracking, hysteresis, filtering, and other related functions when these modules are used for capacitive sensing. The ADC is a 12-bit, 200-ksamples/s ADC with eight inputs and a built-in voltage reference. The ADC can be triggered by many different sources including timers, I/O pins, software, and comparators. The analog modules can connect to up to eight different GPIOs Dedicated SPI master with up to 6 MHz clock speed The peripherals in the Sensor Controller can also be controlled from the main application processor. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 45 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 9.6 Cryptography www.ti.com The CC1312PSIP device comes with a wide set of modern cryptography-related hardware accelerators, drastically reducing code footprint and execution time for cryptographic operations. It also has the benefit of being lower power and improves availability and responsiveness of the system because the cryptography operations runs in a background hardware thread. Together with a large selection of open-source cryptography libraries provided with the Software Development Kit (SDK), this allows for secure and future proof IoT applications to be easily built on top of the platform. The hardware accelerator modules are:

True Random Number Generator (TRNG) module provides a true, nondeterministic noise source for the purpose of generating keys, initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring oscillators that create unpredictable output to feed a complex nonlinear-combinatorial circuit. Secure Hash Algorithm 2 (SHA-2) with support for SHA224, SHA256, SHA384, and SHA512 Advanced Encryption Standard (AES) with 128 and 256 bit key lengths Public Key Accelerator - Hardware accelerator supporting mathematical operations needed for elliptic curves up to 512 bits and RSA key pair generation up to 1024 bits. Through use of these modules and the TI provided cryptography drivers, the following capabilities are available for an application or stack:

Key Agreement Schemes Elliptic curve DiffieHellman with static or ephemeral keys (ECDH and ECDHE) Elliptic curve Password Authenticated Key Exchange by Juggling (ECJ-PAKE) Signature Generation Elliptic curve Diffie-Hellman Digital Signature Algorithm (ECDSA) Curve Support Short Weierstrass form (full hardware support), such as:

NIST-P224, NIST-P256, NIST-P384, NIST-P521 Brainpool-256R1, Brainpool-384R1, Brainpool-512R1 secp256r1 Montgomery form (hardware support for multiplication), such as:

Curve25519 SHA2 based MACs HMAC with SHA224, SHA256, SHA384, or SHA512 Block cipher mode of operation AESCCM AESGCM AESECB AESCBC AESCBC-MAC True random number generation Other capabilities, such as RSA encryption and signatures as well as Edwards type of elliptic curves such as Curve1174 or Ed25519, can also be implemented using the provided hardware accelerators but are not part of the TI SimpleLink SDK for the CC1312PSIP device. 46 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 9.7 Timers CC1312PSIP SWRS293 MAY 2023 A large selection of timers are available as part of the CC1312PSIP device. These timers are:

Real-Time Clock (RTC) A 70-bit 3-channel timer running on the 32 kHz low frequency system clock (SCLK_LF) This timer is available in all power modes except Shutdown. The timer can be calibrated to compensate for frequency drift when using the LF RCOSC as the low frequency system clock. If an external LF clock with frequency different from 32.768 kHz is used, the RTC tick speed can be adjusted to compensate for this. When using TI-RTOS, the RTC is used as the base timer in the operating system and should thus only be accessed through the kernel APIs such as the Clock module. The real time clock can also be read by the Sensor Controller Engine to timestamp sensor data and also has dedicated capture channels. By default, the RTC halts when a debugger halts the device. General Purpose Timers (GPTIMER) The four flexible GPTIMERs can be used as either 4 32 bit timers or 8 16 bit timers, all running on up to 48 MHz. Each of the 16- or 32-bit timers support a wide range of features such as one-shot or periodic counting, pulse width modulation (PWM), time counting between edges and edge counting. The inputs and outputs of the timer are connected to the device event fabric, which allows the timers to interact with signals such as GPIO inputs, other timers, DMA and ADC. The GPTIMERs are available in Active and Idle power modes. Sensor Controller Timers The Sensor Controller contains 3 timers:

AUX Timer 0 and 1 are 16-bit timers with a 2N prescaler. Timers can either increment on a clock or on each edge of a selected tick source. Both one-shot and periodical timer modes are available. AUX Timer 2 is a 16-bit timer that can operate at 24 MHz, 2 MHz or 32 kHz independent of the Sensor Controller functionality. There are 4 capture or compare channels, which can be operated in one-shot or periodical modes. The timer can be used to generate events for the Sensor Controller Engine or the ADC, as well as for PWM output or waveform generation. Radio Timer A multichannel 32-bit timer running at 4 MHz is available as part of the device radio. The radio timer is typically used as the timing base in wireless network communication using the 32-bit timing word as the network time. The radio timer is synchronized with the RTC by using a dedicated radio API when the device radio is turned on or off. This ensures that for a network stack, the radio timer seems to always be running when the radio is enabled. The radio timer is in most cases used indirectly through the trigger time fields in the radio APIs and should only be used when running the accurate 48 MHz high frequency crystal is the source of SCLK_HF. Watchdog timer The watchdog timer is used to regain control if the system operates incorrectly due to software errors. It is typically used to generate an interrupt to and reset of the device for the case where periodic monitoring of the system components and tasks fails to verify proper functionality. The watchdog timer runs on a 1.5 MHz clock rate and cannot be stopped once enabled. The watchdog timer pauses to run in Standby power mode and when a debugger halts the device. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 47 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 9.8 Serial Peripherals and I/O www.ti.com The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and TI's synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz. The SSI modules support configurable phase and polarity. The UARTs implement universal asynchronous receiver and transmitter functions. They support flexible baud-

rate generation up to a maximum of 3 Mbps. The I2S interface is used to handle digital audio and can also be used to interface pulse-density modulation microphones (PDM). The I2C interface is also used to communicate with devices compatible with the I2C standard. The I2C interface can handle 100 kHz and 400 kHz operation, and can serve as both master and slave. The I/O controller (IOC) controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a programmable pullup and pulldown function, and can generate an interrupt on a negative or positive edge

(configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs have high-drive capabilities, which are marked in bold in Section 7. All digital peripherals can be connected to any digital pin on the device. For more information, see the CC13x2, CC26x2 SimpleLink Wireless MCU Technical Reference Manual. 9.9 Battery and Temperature Monitor A combined temperature and battery voltage monitor is available in the CC1312PSIP device. The battery and temperature monitor allows an application to continuously monitor on-chip temperature and supply voltage and respond to changes in environmental conditions as needed. The module contains window comparators to interrupt the system CPU when temperature or supply voltage go outside defined windows. These events can also be used to wake up the device from Standby mode through the Always-On (AON) event fabric. 9.10 DMA The device includes a direct memory access (DMA) controller. The DMA controller provides a way to offload data-transfer tasks from the system CPU, thus allowing for more efficient use of the processor and the available bus bandwidth. The DMA controller can perform a transfer between memory and peripherals. The DMA controller has dedicated channels for each supported on-chip module and can be programmed to automatically perform transfers between peripherals and memory when the peripheral is ready to transfer more data. Some features of the DMA controller include the following (this is not an exhaustive list):

Highly flexible and configurable channel operation of up to 32 channels Transfer modes: memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-peripheral Data sizes of 8, 16, and 32 bits Ping-pong mode for continuous streaming of data 9.11 Debug The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface. The device boots by default into cJTAG mode and must be reconfigured to use 4-pin JTAG. 48 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 9.12 Power Management CC1312PSIP SWRS293 MAY 2023 To minimize power consumption, the CC1312PSIP supports a number of power modes and power management features (see Table 9-2). MODE CPU Flash SRAM Radio Supply System Register and CPU retention SRAM retention 48 MHz high-speed clock

(SCLK_HF) 2 MHz medium-speed clock

(SCLK_MF) 32 kHz low-speed clock

(SCLK_LF) Peripherals Sensor Controller Wake-up on RTC Wake-up on pin edge Wake-up on reset pin Brownout detector (BOD) Power-on reset (POR) Watchdog timer (WDT) Table 9-2. Power Modes SOFTWARE CONFIGURABLE POWER MODES STANDBY SHUTDOWN ACTIVE Active On On Available On Full Full IDLE Off Available On Available On Full Full XOSC_HF or RCOSC_HF XOSC_HF or RCOSC_HF Off Off Retention Off Duty Cycled Partial Full Off RCOSC_MF RCOSC_MF Available XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF Available Available Available Available On On On Available Available Available Available On On On Available Available Off Available Available Available On Duty Cycled On Paused Off Off Off Off Off No No Off Off Off Off Off Off Available On Off Off Off RESET PIN HELD Off Off Off Off Off No No Off Off Off Off Off Off Off On Off Off Off In Active mode, the application system CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 9-2). In Idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event brings the processor back into active mode. In Standby mode, only the always-on (AON) domain is active. An external wake-up event, RTC event, or Sensor Controller event is required to bring the device back to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode. In Shutdown mode, the device is entirely turned off (including the AON domain and Sensor Controller), and the I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger. The CPU can differentiate between reset in this way and reset-by-reset pin or power-on reset by reading the reset status register. The only state retained in this mode is the latched I/O state and the flash memory contents. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 49 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller independently of the system CPU. This means that the system CPU does not have to wake up, for example to perform an ADC sampling or poll a digital sensor over SPI, thus saving both current and wake-up time that would otherwise be wasted. The Sensor Controller Studio tool enables the user to program the Sensor Controller, control its peripherals, and wake up the system CPU as needed. All Sensor Controller peripherals can also be controlled by the system CPU. Note The power, RF and clock management for the CC1312PSIP device require specific configuration and handling by software for optimized performance. This configuration and handling is implemented in the TI-provided drivers that are part of the CC1312PSIP software development kit (SDK). Therefore, TI highly recommends using this software framework for all application development on the device. The complete SDK with TI-RTOS (optional), device drivers, and examples are offered free of charge in source code. 9.13 Clock Systems The CC1312PSIP device has several internal system clocks. The 48 MHz SCLK_HF is used as the main system (MCU and peripherals) clock. This can be driven by the internal 48 MHz RC Oscillator (RCOSC_HF) or in-package 48 MHz crystal (XOSC_HF). Note that the radio operation runs off the included, in-package 48 MHz crystal within the module. The crystal frequency is calibrated in production at room temperature to reduce the initial frequency error to a minimum. This is done by setting the internal capacitor array to the value that gives closest to 48 MHz. SCLK_LF is the 32.768 kHz internal low-frequency system clock. It can be used by the Sensor Controller for ultra-low-power operation and is also used for the RTC and to synchronize the radio timer before or after Standby power mode. SCLK_LF can be driven by the internal 32.8 kHz RC Oscillator (RCOSC_LF) or the included, in-package 32.768 kHz crystal within the module. When using a crystal or the internal RC oscillator, the device can output the 32 kHz SCLK_LF signal to other devices, thereby reducing the overall system cost. 9.14 Network Processor Depending on the product configuration, the CC1312PSIP device can function as a wireless network processor

(WNP - a device running the wireless protocol stack with the application running on a separate host MCU), or as a system-on-chip (SoC) with the application and protocol stack running on the system CPU inside the device. In the first case, the external host MCU communicates with the device using SPI or UART. In the second case, the application must be written according to the application framework supplied with the wireless protocol stack. 50 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 9.15 Device Certification and Qualification CC1312PSIP SWRS293 MAY 2023 The module from TI is certified for FCC and IC/ISED. TI Customers that build products based on the TI module can save in testing cost and time per product family. Note The FCC and IC IDs must be located in both the user manual and on the packaging. Due to the small size of the module (7 mm x 7 mm), placing the IDs and markings in a type size large enough to be legible without the aid of magnification is impractical. Regulatory Body Specification ID (IF APPLICABLE) FCC (USA) 15.247 Operation within the 902928 MHz band ZAT-1312PSIP-1 IC/ISED (Canada) RSS-247 Operation within the 902928 MHz band 451H-1312PSIP1 Table 9-3. List of Certifications EN 300 220, 863 -870 MHz band ETSI/CE (Europe) & RER (UK) EN 303 204, 870876 MHz band

EN 303 659, 865-868 MHz and 915-919.4MHz 9.15.1 FCC Certification and Statement FCC RF Radiation Exposure Statement:

CAUTION This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End users must follow the specific operating instructions for satisfying RF exposure limits. This transmitter must not be co-located or operating with any other antenna or transmitter. The CC1312PSIPMOT module from TI is certified for FCC as a single-modular transmitter. The module is an FCC-certified radio module that carries a modular grant. You are cautioned that changes or modifications not expressly approved by the party responsible for compliance could void the users authority to operate the equipment. This device is planned to comply with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

This device may not cause harmful interference. This device must accept any interference received, including interference that may cause undesired operation of the device. 9.15.2 IC/ISED Certification and Statement IC RF Radiation Exposure Statement:

CAUTION To comply with IC RF exposure requirements, this device and its antenna must not be co-located or operating in conjunction with any other antenna or transmitter. Pour se conformer aux exigences de conformit RF canadienne l'exposition, cet appareil et son antenne ne doivent pas tre co-localiss ou fonctionnant en conjonction avec une autre antenne ou transmetteur. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 51 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com The CC1312PSIPMOT module from TI is certified for IC as a single-modular transmitter. The CC1312PSIPMOT module from TI is meets IC modular approval and labeling requirements. The IC follows the same testing and rules as the FCC regarding certified modules in authorized equipment. This device complies with Industry Canada licence-exempt RSS standards. Operation is subject to the following two conditions:

This device may not cause interference. This device must accept any interference, including interference that may cause undesired operation of the device. Le prsent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorise aux deux conditions suivantes:

L'appareil ne doit pas produire de brouillage L'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement. 52 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 9.16 Module Markings Figure 9-1 shows the top-side marking for the CC1312PSIP module. CC1312PSIP SWRS293 MAY 2023 Figure 9-1. Top-Side Marking Table 9-4 lists the CC1312PSIP module markings. Table 9-4. Module Descriptions MARKING CC1312 P SIP NNN NNNN DESCRIPTION Generic Part Number Model SIP = Module type, X = pre-release LTC (Lot Trace Code) 9.17 End Product Labeling The CC1312PSIPMOT module complies with the FCC single modular FCC grant, FCC ID: ZAT-1312PSIP-1. The host system using this module must display a visible label indicating the following text:

Contains FCC ID: ZAT-1312PSIP-1 The CC1312PSIPMOT module complies with the IC single modular IC grant, IC: 451H-1312PSIP1. The host system using this module must display a visible label indicating the following text:

Contains IC: 451H-1312PSIP1 For more information on end product labeling and a sample label, please see section 4 of the OEM Integrators Guide 9.18 Manual Information to the End User The OEM integrator must be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual must include all required regulatory information and warnings as shown in this manual. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 53 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsCC1312PSIPNNN NNNNADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com 10 Application, Implementation, and Layout Note Information in the following Applications section is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information 10.1.1 Typical Application Circuit Figure 10-1 shows the typical application schematic using the CC1312PSIP module. For the full reference schematic, download the LP-EM-CC1312PSIP Design Files. Note The following guidelines are recommended for implementation of the RF design:

Ensure an RF path is designed with a characteristic impedance of 50 . Tuning of the antenna impedance matching network is recommended after manufacturing of the PCB to account for PCB parasitics. Please refer to CC13xx/CC26xx Hardware Configuration and PCB Design Considerations; section 5.1 for further information. Figure 10-1. CC1312PSIP Typical Application Schematic with integrated antenna on LP-EM-CC1312PSIP 54 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 Table 10-1 provides the bill of materials for a typical application using the CC1312PSIP module in Figure 10-1. It is always recommended to insert a pi-filter (Z9, Z10 and Z11) between the RF pad and the antenna / SMA connector. When matching towards an antenna, this will minimize the mismatch losses of the antenna. A low-pass match or high-pass matching network can typically be chosen. For the CC1312PSIP, it is recommended to use a low-pass antenna match since this will both match the antenna but will also act as a low-pass filter function as well. As can be seen in Figure 10-1, Z10 and Z11 form a low-pass antenna match on the LP-EM-CC1312PSIP that has an integrated PCB antenna. In the event that no matching components are required for the antenna or direct connection to a SMA, it is recommended to use Z10: 5.6 nH and Z11: 1.8 pF as a low-pass filter. For full operation reference design, see the LP-EM-CC1312PSIP Design Files. Table 10-1. Bill of Materials QTY PART REFERENCE 1 1 1 1 C57 U1 Z10 Z11 VALUE MANUFACTURER PART NUMBER DESCRIPTION 100pF Murata GRM0335C1H101GA01D Capacitor, Ceramic C0G/NP0, 100pF, 50V, -2%/+2%, -55DEGC/+125DEGC, 0201, SMD CC1312PSIP Texas Instruments CC1312PSIP IC, CC1312PSIP, LGA73, SMD 8.2nH Murata LQP03TN8N2J02D 1.8pF Murata GRM0335C1H1R8BA01J Inductor, RF, Chip, Non-magnetic core, 8.2nH, -5%/+5%, 0.25A, -55DEGC/

+125DEGC, 0201, SMD Capacitor, Ceramic C0G/NP0, 1.8pF, 50V, -0.1pF/+0.1pF, -55DEGC/

+125DEGC, 0201, SMD 10.2 Device Connection and Layout Fundamentals 10.2.1 Reset In order to meet the module power-on-reset requirements, VDDS (Pin 46) and VDDS_PU (Pin 47) should be connected together. If the reset signal is not based upon a power-on-reset and is instead derived from an external MCU, then VDDS_PU (Pin 47) should be No Connect (NC). 10.2.2 Unused Pins All unused pins can be left unconnected without the concern of having leakage current. Please refer to

#unique_98 for more details. 10.3 PCB Layout Guidelines This section details the PCB guidelines to speed up the PCB design using the CC1312PSIP module. The integrator of the modules must comply with the PCB layout recommendations described in the following subsections to minimize the risk with regulatory certifications for the FCC, IC/ISED, ETSI/CE. Moreover, TI recommends customers to follow the guidelines described in this section to achieve similar performance to that obtained with the TI reference design. 10.3.1 General Layout Recommendations Ensure that the following general layout recommendations are followed:

Have a solid ground plane and ground vias under the module for stable system and thermal dissipation. Do not run signal traces underneath the module on a layer where the module is mounted. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 55 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 10.3.2 RF Layout Recommendations www.ti.com It is critical that the RF section be laid out correctly to ensure optimal module performance. A poor layout can cause low-output power and sensitivity degradation. Figure 10-2 shows the RF placement and routing of the module with the 2.4-GHz inverted F antenna. Figure 10-2. Module Layout Guidelines Follow these RF layout recommendations for the module:

RF traces must have a chararcterisitc impedance of 50-. There must be no traces or ground under the antenna section. RF traces must have via stitching on the ground plane beside the RF trace on both sides. RF traces must be as short as possible. The module must be as close to the PCB edge in consideration of the product enclosure and type of antenna being used. 56 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 10.3.2.1 Antenna Placement and Routing CC1312PSIP SWRS293 MAY 2023 The antenna is the element used to convert the guided waves on the PCB traces to the free space electromagnetic radiation. The placement and layout of the antenna are the keys to increased range and data rates. Table 10-2 provides a summary of the antenna guidelines to follow with the CC1312PSIPmodule. SR NO. GUIDELINES Table 10-2. Antenna Guidelines 1 2 3 4 5 6 7 9 Place the antenna on an edge of the PCB. Ensure that no signals are routed across the antenna elements on any PCB layer. Most antennas, including the PCB antenna used on the LaunchPad, require ground clearance on all the layers of the PCB. Ensure that the ground is cleared on inner layers as well. Ensure that there is provision to place matching components for the antenna. These must be tuned for best return loss when the complete board is assembled. Any plastics or casing must also be mounted while tuning the antenna because this can impact the impedance. Ensure that the antenna characteristic impedance is 50- as the module is designed for a 50- system. In case of printed antenna, ensure that the simulation is performed considering the soldermask thickness. For good RF performance ensrue that the Voltge Standing Wave Ration (VSWR) is less than 2 across the frequency band of interest. The feed point of the antenna is required to be grounded. This is only for the antenna type used on theLP-EM-CC1312PSIP LaunPad. See the specific antenna data sheets for the recommendations. Table 10-3 lists the recommended antennas to use with the CC1312PSIPmodule. Other antennas may be available for use with the CC1312PSIPmodule. Please refer to to the for a list of approved antennas (and antenna types) that can be used with the CC1312PSIP module. CHOICE ANTENNA MANUFACTURER NOTES Table 10-3. Recommended Antennas 1 2 3 4 5 6 Integrated PCB antenna on the LP-EM-

CC1312PSIP Texas Instruments

+2.7 dBi gain at 915 MHz, see the LP-EM-CC1312PSIP refference design External whip antenna Nearson, S463AM-915

+2.0 dBi gain at 915 MHz, https://www.nearson.com/assets/pdfs/Antenna/S463XX-915.pdf, External whip antenna Pulse, W5017

+0.9 dBi gain at 915 MHz Chip antenna Chip antenna Johanson Technology, 0900AT43A0070 Johanson Technology, 0915AT43A0026

-0.5 dBi gain at 915 MHz

+1.4 dBi gain at 915 MHz Helical wire antenna Pulse, W3113

+0.8 dBi gain at 915 MHz Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 57 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 10.3.2.2 Transmission Line Considerations www.ti.com The RF signal from the module is routed to the antenna using a Coplanar Waveguide with ground (CPW-G) structure. CPW-G structure offers the maximum amount of isolation and the best possible shielding to the RF lines. In addition to the ground on the L1 layer, placing GND vias along the line also provides additional shielding. Figure 10-3 shows a cross section of the coplanar waveguide with the critical dimensions. Figure 10-4 shows the top view of the coplanar waveguide with GND and via stitching. Figure 10-3. Coplanar Waveguide (Cross Section) Figure 10-4. CPW With GND and Via Stitching (Top View) 58 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsSWADVANCE INFORMATION www.ti.com The recommended values for a 4-layer PCB board is provided in Table 10-4. CC1312PSIP SWRS293 MAY 2023 Table 10-4. Recommended PCB Values for 4-Layer Board (L1 to L2 = 0.175 mm) VALUE PARAMETER UNITS W S H Er (FR-4 substrate) 0.300 0.500 0.175 4.0 mm mm mm F/m 10.4 Reference Designs The following reference designs should be followed closely when implementing designs using the CC1312PSIP device. Special attention must be paid to RF component placement, decoupling capacitors and DCDC regulator components, as well as ground connections for all of these. LP-EM-CC1312PSIP Design Files The LP-EM-CC1312PSIP reference design provides schematic, layout and production files for the characterization board used for deriving the performance number found in this document. Sub-1 GHz and 2.4 GHz Antenna Kit for LaunchPad Development Kit and SensorTag The antenna kit allows real-life testing to identify the optimal antenna for your application. The antenna kit includes 16 antennas for frequencies from 169 MHz to 2.4 GHz, including:

PCB antennas Helical antennas Chip antennas Dual-band antennas for 868 MHz and 915 MHz combined with 2.4 GHz The antenna kit includes a JSC cable to connect to the Wireless MCU LaunchPad Development Kits and SensorTags. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 59 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com 11 Environmental Requirements and SMT Specifications 11.1 PCB Bending The PCB follows IPC-A-600J for PCB twist and warpage < 0.75% or 7.5 mil per inch. 11.2 Handling Environment 11.2.1 Terminals The product is mounted with motherboard through land-grid array (LGA). To prevent poor soldering, do not make skin contact with the LGA portion. 11.2.2 Falling The mounted components will be damaged if the product falls or is dropped. Such damage may cause the product to malfunction. 11.3 Storage Condition 11.3.1 Moisture Barrier Bag Before Opened A moisture barrier bag must be stored in a temperature of less than 30C with humidity under 85% RH. The calculated shelf life for the dry-packed product will be 24 months from the date the bag is sealed. 11.3.2 Moisture Barrier Bag Open Humidity indicator cards must be blue, < 30%. 11.4 PCB Assembly Guide The wireless MCU modules are packaged in a substrate base Leadless Quad Flatpack (QFM) package. The modules are designed with pull back leads for easy PCB layout and board mounting. 11.4.1 PCB Land Pattern & Thermal Vias We recommended a solder mask defined land pattern to provide a consistent soldering pad dimension in order to obtain better solder balancing and solder joint reliability. PCB land pattern are 1:1 to module soldering pad dimension. Thermal vias on PCB connected to other metal plane are for thermal dissipation purpose. It is critical to have sufficient thermal vias to avoid device thermal shutdown. Recommended vias size are 0.2mm and position not directly under solder paste to avoid solder dripping into the vias. 11.4.2 SMT Assembly Recommendations The module surface mount assembly operations include:

Screen printing the solder paste on the PCB Monitor the solder paste volume (uniformity) Package placement using standard SMT placement equipment X-ray pre-reflow check - paste bridging Reflow X-ray post-reflow check - solder bridging and voids 60 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 11.4.3 PCB Surface Finish Requirements CC1312PSIP SWRS293 MAY 2023 A uniform PCB plating thickness is key for high assembly yield. For an electroless nickel immersion gold finish, the gold thickness should range from 0.05 m to 0.20 m to avoid solder joint embrittlement. Using a PCB with Organic Solderability Preservative (OSP) coating finish is also recommended as an alternative to Ni-Au. 11.4.4 Solder Stencil Solder paste deposition using a stencil-printing process involves the transfer of the solder paste through pre-

defined apertures with the application of pressure. Stencil parameters such as aperture area ratio and the fabrication process have a significant impact on paste deposition. Inspection of the stencil prior to placement of package is highly recommended to improve board assembly yields. 11.4.5 Package Placement Packages can be placed using standard pick and place equipment with an accuracy of 0.05 mm. Component pick and place systems are composed of a vision system that recognizes and positions the component and a mechanical system that physically performs the pick and place operation. Two commonly used types of vision systems are:

A vision system that locates a package silhouette A vision system that locates individual pads on the interconnect pattern The second type renders more accurate placements but tends to be more expensive and time consuming. Both methods are acceptable since the parts align due to a self-centering features of the solder joint during solder reflow. It is recommended to avoid solder bridging to 2 mils into the solder paste or with minimum force to avoid causing any possible damage to the thinner packages. 11.4.6 Solder Joint Inspection After surface mount assembly, transmission X-ray should be used for sample monitoring of the solder attachment process. This identifies defects such as solder bridging, shorts, opens, and voids. It is also recommended to use side view inspection in addition to X-rays to determine if there are "Hour Glass" shaped solder and package tilting existing. The "Hour Glass" solder shape is not a reliable joint. 90 mirror projection can be used for side view inspection. 11.4.7 Rework and Replacement TI recommends removal of modules by rework station applying a profile similar to the mounting process. Using a heat gun can sometimes cause damage to the module by overheating. 11.4.8 Solder Joint Voiding TI recommends to control solder joint voiding to be less than 30% (per IPC-7093). Solder joint voids could be reduced by baking of components and PCB, minimized solder paste exposure duration, and reflow profile optimization. 11.5 Baking Conditions Products require baking before mounting if:

Humidity indicator cards read > 30%

Temp < 30C, humidity < 70% RH, over 96 hours Baking condition: 90C, 12 to 24 hours Baking times: 1 time Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 61 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 11.6 Soldering and Reflow Condition www.ti.com Heating method: Conventional convection or IR convection Temperature measurement: Thermocouple d = 0.1 mm to 0.2 mm CA (K) or CC (T) at soldering portion or equivalent method Solder paste composition: SAC305 Allowable reflow soldering times: 2 times based on the reflow soldering profile (see Figure 11-1) Temperature profile: Reflow soldering will be done according to the temperature profile (see Figure 11-1) Peak temperature: 260C Figure 11-1. Temperature Profile for Evaluation of Solder Heat Resistance of a Component (at Solder Joint) Profile Elements Convection or IR(1) Table 11-1. Temperature Profile Peak temperature range Pre-heat / soaking (150 to 200C) Time above melting point Time with 5C to peak Ramp up Ramp down 235 to 240C typical (260C maximum) 60 to 120 seconds 60 to 90 seconds 30 seconds maximum

< 3C / second

< -6C / second

(1) For details, refer to the solder paste manufacturer's recommendation. Note TI does not recommend the use of conformal coating or similar material on the SimpleLink module. This coating can lead to localized stress on the solder connections inside the module and impact the module reliability. Use caution during the module assembly process to the final PCB to avoid the presence of foreign material inside the module. 62 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 12 Device and Documentation Support CC1312PSIP SWRS293 MAY 2023 TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed as follows. 12.1 Device Nomenclature To designate the stages in the product development cycle, TI assigns prefixes to all part numbers and/or date-

code. Each device has one of three prefixes/identifications: X, P, or null (no prefix) (for example, XCC1312PSIP is in preview; therefore, an X prefix/identification is assigned). Device development evolutionary flow:

X Experimental device that is not necessarily representative of the final device's electrical specifications and may not use production assembly flow. P Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical specifications. null Production version of the silicon die that is fully qualified. Production devices have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies. Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used. TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type

(for example, RGZ). For orderable part numbers of CC1312PSIP devices in the RGZ (7-mm x 7-mm) package type, see the Package Option Addendum of this document, the Device Information in Section 3, the TI website (www.ti.com), or contact your TI sales representative. Figure 12-1. Device Nomenclature 12.2 Tools and Software The CC1312PSIP device is supported by a variety of software and hardware development tools. Development Kit Software SimpleLink CC13xx and CC26xx Software The SimpleLink CC13xx-CC26xx Software Development Kit (SDK) provides a complete package for the development of wireless applications on the CC13x2 / CC26x2 family Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 63 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsSimpleLinkUltra-Low-PowerWireless MCUDEVICEPREFIXCC1312X = Experimental deviceBlank = Qualified deviceXXXPACKAGERGZ = 48-pin VQFN (VeryThin Quad Flatpack No-Lead)RR = Large ReelR0CONFIGURATIONR = RegularP= 20dbm PAincludedFLASH SIZE3 = 352 KBF3XADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 Development Kit

(SDK) www.ti.com of devices. The SDK includes a comprehensive software package for the CC1312PSIP device, including the following protocol stacks:

Wi-SUN TI 15.4-Stack - an IEEE 802.15.4-based star networking solution for Sub-1 GHz and 2.4 GHz Prop RF API - a flexible set of building blocks for developing proprietary RF software stacks The SimpleLink CC13xx-CC26xx SDK is part of TIs SimpleLink MCU platform, offering a single development environment that delivers flexible hardware, software and tool options for customers developing wired and wireless applications. For more information about the SimpleLink MCU Platform, visit https://www.ti.com/simplelink. 64 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com Development Tools CC1312PSIP SWRS293 MAY 2023 Code Composer Studio Integrated Development Environment

(IDE) Code Composer Studio Cloud IDE IAR Embedded Workbench for Arm SmartRF Studio Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor, project build environment, debugger, profiler, and many other features. The intuitive IDE provides a single user interface taking you through each step of the application development flow. Familiar tools and interfaces allow users to get started faster than ever before. Code Composer Studio combines the advantages of the Eclipse software framework with advanced embedded debug capabilities from TI resulting in a compelling feature-rich development environment for embedded developers. CCS has support for all SimpleLink Wireless MCUs and includes support for EnergyTrace software (application energy usage profiling). A real-time object viewer plugin is available for TI-RTOS, part of the SimpleLink SDK. Code Composer Studio is provided free of charge when used in conjunction with the XDS debuggers included on a LaunchPad Development Kit. Code Composer Studio (CCS) Cloud is a web-based IDE that allows you to create, edit and build CCS and Energia projects. After you have successfully built your project, you can download and run on your connected LaunchPad. Basic debugging, including features like setting breakpoints and viewing variable values is now supported with CCS Cloud. IAR Embedded Workbench is a set of development tools for building and debugging embedded system applications using assembler, C and C++. It provides a completely integrated development environment that includes a project manager, editor, and build tools. IAR has support for all SimpleLink Wireless MCUs. It offers broad debugger support, including XDS110, IAR I-jet and Segger J-Link. A real-time object viewer plugin is available for TI-RTOS, part of the SimpleLink SDK. IAR is also supported out-of-the-box on most software examples provided as part of the SimpleLink SDK. A 30-day evaluation or a 32 KB size-limited version is available through iar.com. SmartRF Studio is a Windows application that can be used to evaluate and configure SimpleLink Wireless MCUs from Texas Instruments. The application will help designers of RF systems to easily evaluate the radio at an early stage in the design process. It is especially useful for generation of configuration register values and for practical testing and debugging of the RF system. SmartRF Studio can be used either as a standalone application or together with applicable evaluation boards or debug probes for the RF device. Features of the SmartRF Studio include:

Link tests - send and receive packets between nodes Antenna and radiation tests - set the radio in continuous wave TX and RX states Export radio configuration code for use with the TI SimpleLink SDK RF driver Custom GPIO configuration for signaling and control of external switches Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 65 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 Sensor Controller Studio www.ti.com Sensor Controller Studio is used to write, test and debug code for the Sensor Controller peripheral. The tool generates a Sensor Controller Interface driver, which is a set of C source files that are compiled into the System CPU application. These source files also contain the Sensor Controller binary image and allow the System CPU application to control and exchange data with the Sensor Controller. Features of the Sensor Controller Studio include:

Ready-to-use examples for several common use cases Full toolchain with built-in compiler and assembler for programming in a C-like programming language Provides rapid development by using the integrated sensor controller task testing and debugging functionality, including visualization of sensor data and verification of algorithms CCS UniFlash CCS UniFlash is a standalone tool used to program on-chip flash memory on TI MCUs. UniFlash has a GUI, command line, and scripting interface. CCS UniFlash is available free of charge. 12.2.1 SimpleLink Microcontroller Platform The SimpleLink microcontroller platform sets a new standard for developers with the broadest portfolio of wired and wireless Arm MCUs (System-on-Chip) in a single software development environment. Delivering flexible hardware, software and tool options for your IoT applications. Invest once in the SimpleLink software development kit and use throughout your entire portfolio. Learn more on ti.com/simplelink. 12.3 Documentation Support To receive notification of documentation updates on data sheets, errata, application notes and similar, navigate to the device product folder on ti.com/product/CC1312PSIP. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. The current documentation that describes the MCU, related peripherals, and other technical collateral is listed as follows. TI Resource Explorer TI Resource Explorer Software examples, libraries, executables, and documentation are available for your device and development board. Errata CC1312PSIP Silicon Errata Application Reports The silicon errata describes the known exceptions to the functional specifications for each silicon revision of the device and description on how to recognize a device revision. All application reports for the CC1312PSIP device are found on the device product folder at: ti.com/product/

CC1312PSIP/technicaldocuments. Technical Reference Manual (TRM) CC13x2, CC26x2 SimpleLink Wireless MCU TRM The TRM provides a detailed description of all modules and peripherals available in the device family. 66 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com 12.4 Support Resources CC1312PSIP SWRS293 MAY 2023 TI E2E support forums are an engineer's go-to source for fast, verified answers and design help straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.5 Trademarks SimpleLink, LaunchPad, Code Composer Studio, EnergyTrace, and TI E2E are trademarks of Texas Instruments. I-jet is a trademark of IAR Systems AB. J-Link is a trademark of SEGGER Microcontroller Systeme GmbH. Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. CoreMark is a registered trademark of Embedded Microprocessor Benchmark Consortium Corporation. Arm Thumb is a registered trademark of Arm Limited (or its subsidiaries). Eclipse is a registered trademark of Eclipse Foundation. IAR Embedded Workbench is a registered trademark of IAR Systems AB. Windows is a registered trademark of Microsoft Corporation. All trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.7 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 67 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. The total height of the module is 1.51 mm. The weight of the CC1312PSIP module is typically 0.19 g. Note 68 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 69 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION CC1312PSIP SWRS293 MAY 2023 www.ti.com 70 Submit Document Feedback Copyright 2023 Texas Instruments Incorporated Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION www.ti.com CC1312PSIP SWRS293 MAY 2023 Copyright 2023 Texas Instruments Incorporated Submit Document Feedback 71 Product Folder Links: CC1312PSIP TI ConfidentialNDARestrictionsADVANCE INFORMATION IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES AS IS AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TIs products are provided subject to TIs Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TIs provision of these resources does not expand or otherwise alter TIs applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright 2023, Texas Instruments Incorporated TI ConfidentialNDARestrictions

 

 

 

 

 

 

 

 

 

 

Label Information The product ID will not be placed on the label because it is too small, and will be placed in the user manual instead. The Modules dimensions are 6.96 X 6.96 X 1.47 mm, and its weight is 0.182 grams. The user manual is the CC1312PSIP datasheet will be readily available online at ti.com, and will show the label as seen below:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

September 21, 2021 To: Peder Rand From: Marian Kost Subj: Delegation of Authority Under our corporate policy, all delegations are to be made to positions rather than individuals. Therefore, this delegation applies to you while you hold the position listed and will immediately terminate as to you if you change jobs or leave TI. The delegation will continue to be effective as to any employee assuming the position listed above. Commitment Authorizations Authorization is hereby granted to the employee holding the following position to approve and sign on behalf of Texas Instruments Incorporated all contracts, agreements, bids, quotations, purchase orders and other instruments evidencing commitments of Texas Instruments Incorporated within the usual conduct of his/her organization, limited to the amount shown. You are personally responsible to ensure that you exercise the authority consistent with this document and TIs corporate procedures. Sub-1 GHz Business Manager

$1,000,000 Delegation of Commitment Authorizations You may not re-delegate your authority. You may re-delegate your authority on an acting for basis or through issuance of one shots, as described in SP&P 11-03-01. Marian Kost Business Unit Manager, Connectivity Texas Instruments Incorporated DocuSign Envelope ID: FD4A24EF-51D5-4269-B549-7865596A09AA

 

 

 

 

 

 

 

 

 

 

Texas Instruments Inc. 12500 TI Boulevard, DALLAS, Texas, United States 75243 Tel: 2145672462 ; Fax: +4722958546 Federal Communications Commission 7435 Oakland Mills Road Columbia MD 21046 Date: May 24, 2023 Subject: Certifications concerning covered equipment pursuant to Part 2.911(d)(5)(i) and (ii) To whom it may concern,

[Texas Instruments Inc.] (the applicant) certifies that the equipment [FCC ID: ZAT-1312PSIP-1] for which authorization is sought is not covered equipment prohibited from receiving an equipment authorization pursuant to section 2.903 of the FCC rules.

[Texas Instruments Inc.] (the applicant) certifies that, as of the date of the filing of the application, the applicant [is not] identified on the Covered List (as a specifically named entity or any of its subsidiaries or affiliates) as an entity producing covered equipment. Sincerely, ________________________ Name: Peder Rand Title: Product Line Manager, Connectivity E-mail: p-rand@ti.com DocuSign Envelope ID: 558CD76B-8C61-42F3-8EB4-79E7A2B3CE42

 

 

Texas Instruments Incorporated 12500 TI Boulevard, M/S D2000, Dalllas, TX, United States 75243 Tel: 1-469-668-2176 ; Fax: 214-479-5605 Date: May 24, 2023 FCC Laboratory 7435 Oakland Mills Rd Columbia MD 21046 Subject: Request for Confidentiality FCC ID: ZAT-1312PSIP-1 To Whom It May Concern, Pursuant to the provisions of Sections 0.457 and 0.459 of Commissions rules (47CFR0.457, 0.459), we are requesting the Commission to withhold the following attachment(s) from public disclosure indefinitely as confidential information. Schematic Diagram Block Diagram Part List Operational Description Tune-up Procedure Above mentioned document contains detailed system and equipment description are considered as proprietary information in operation of the equipment. The public disclosure of above documents might be harmful to our company and would give competitor an unfair advantage in the market. In additional to above mentioned documents, pursuant to Public Notice DA 04-1705 of the Commission s policy, in order to comply with the marketing regulations in 47 CFT 2.803 and the importation rules in 47 CFR 2.1204, while ensuring that business sensitive information remains confidential until the actual marketing of newly authorized devices. We are requesting the commission to grant short-term confidentiality request on the following attachment(s) for 180 days after the grant as outlined in Public Notice DA 04-1705. External Photos Internal Photos Test Setup Photos User Manual It is our understanding that all measurement test reports, FCC ID label format and correspondent during certification review process cannot be granted as confidential documents and that information will be available for public review once the grant of equipment authorization is issued. Best Regards, ______________________ Peder Rand p-rand@ti.com DocuSign Envelope ID: 558CD76B-8C61-42F3-8EB4-79E7A2B3CE42

 

 

 

 

 

 

Texas Instruments Incorporated 12500 TI Boulevard, M/S F2000, Dalllas, TX, United States 75243 Tel: 1-469-668-2176 ; Fax: 214-479-5605 Request for Modular Approval for FCC ID: ZAT-1312PSIP-1 Date: May 24, 2023 Item Requirements EUT 1. The modular transmitter must have its own The module is equipped with its own sputter shield RF shielding. and cannot be removed by the customer. 2. The modular transmitter must have The module has buffer modulation / data inputs. buffered modulation / data inputs. 3. The modular transmitter must have its own The module has its own power supply regulation. power supply regulation. 4. The module must contain a permanently attached antenna, or contain a unique The requirements of the antenna(s) and spurious emissions have been fulfilled. Please refer to the antenna connector, and be marketed and test report and the integrator instructions of this operated only with specific antenna(s), per filing. 15.203, 15.204(b), 15.204(c), 15.212(a), 2.929(b) 5. The modular transmitter must be tested in a The module was tested on a stand-alone evaluation stand-alone configuration. board and its not inside of another device during 6. The modular transmitter must be labeled For OEM integration the integration manual with its own FCC ID number. contains labeling instructions for the host device testing per Part 15.212 (vi) as the module is too small to hold its the FCC ID on the shield. 7. The modular transmitter must comply with The module approved transmitter complies with all any specific rule or operating requirements applicable rules and the integration manual applicable to the transmitter and the contains any specific requirements addressed to manufacturer must provide adequate the integrator and/or to the end-user of the final instructions along with the module to end-product. explain any such requirements. 8. The modular transmitter must comply with The module complies with the FCC RF exposure any applicable RF exposure requirement. requirements for fixed and mobile applications. RF exposure is addressed in the RF exposure exhibit. ______________________ Peder Rand p-rand@ti.com DocuSign Envelope ID: 558CD76B-8C61-42F3-8EB4-79E7A2B3CE42

 

 

Texas Instruments Incorporated 12500 TI Boulevard, M/S D2000, Dalllas, TX, United States 75243 Tel: 1-469-668-2176 ; Fax: 214-479-5605 Date: May 31, 2023 Limited Agent Authorization To whom it may concern, Please be notified that |, Peder Rand, have designated Jones Tsai in Sporton International Inc. as the person being responsible for this project and to sign the form 731 and other documentation. Any and all acts carried out by Jones Tsai in Sporton International Inc. on the matters of relating to all processes required in the FCC approval and any communication needed with the national authority, shall have the same legal authority as acts on our own behalf. We further certify that neither the applicant nor any party to this application, as defined in 47 CFR Ch. 1.2002 (b), is subject to a denial to Federal benefits, that include FCC benefits, pursuant to section 5301 of the Anti-Drug Abuse Act of 1998, 21 U.S.C. 862. This authorization is limited to the product of as following:

FCC ID: ZAT-1312PSIP-1 This authorization is limited to the matters set forth herein. This letter does not, and shall not be construed to, grant rights or permissions beyond those expressly granted to the party named herein. If you have any acknowledgement and response, please send it to Sporton International Inc. directly. Should you have any questions or comments regarding this matter, please dont hesitate to contact me. Sincerely yours, Peder Rand p-rand@ti.com

 

 

 

 

 

 

 

 

 

 

Texas Instruments Incorporated 12500 TI Boulevard, DALLAS, Texas, United States 75243 Tel: 2145672462 ; Fax: +4722958546 Federal Communications Commission 7435 Oakland Mills Road Columbia MD 21046 Subject: Certification designating a U.S. agent for service of process pursuant to Part 2.911(d)(7) To whom it may concern, Texas Instruments Incorporated, Grantee Code ZAT, FRN 0020623971] (the applicant) certifies that, as of the date of the filing of application, CT Corporation Systems (the agent) is designated as the U.S. agent for the purpose of accepting service of process on behalf of the applicant. The physical U.S. address, email for the designated agent are:

Physical U.S. address: The Corporation Trust Company 1209 Orange Street Wilmington, DE 19801 Email CTSOPReceipt@wolterskluwer.com The applicant accepts to maintain an agent for service of process in the United States for no less than one year after either the grantee has permanently terminated all marketing and importation of the applicable equipment within the U.S., or the conclusion of any Commission-related administrative or judicial proceeding involving the equipment, whichever is later. The agent accepts the designation by (the applicant) as the U.S. agent to receive and forward service of process includes, but is not limited to, delivery of any correspondence, notices, orders, decisions, and requirements of administrative, legal, or judicial process related to Commission proceedings. Signed by the Applicant Signed by the Agent (if different from the Applicant) Name: Texas Instruments Incorporated Name: Eric Carlson Title: Product Line Manager, Connectivity Title: Assistant Secretary Email: p-rand@ti.com TEL: +4793696595 Date: June 22, 2023 TEL: 214-979-1172 Date: June 22, 2023 DocuSign Envelope ID: 84C3872A-8723-45B5-9998-632DD366339F