FCC ID: 2AFOSWT8266 WT8266 Module

OEM INTEGRATION INSTRUCTIONS: (additional information) This device is intended only for OEM integrators under the following conditions: The module must be installed in the host equipment such that 20 cm is maintained between the antenna and users, and the transmitter module may not be co-located with any other transmitter or antenna. The module shall be only used with the external antenna(s) that has been originally tested and certified with this module. As long as 3 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). Validity of using the module certification:

In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization for this module in combination with the host equipment is no longer considered valid and the FCC ID of the module cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. Information that must be placed in the end user manual: The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user's manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. This host device must be kept away from all persons by 20cm or more and installations using less distance, or installations using antennas with gain greater than that with which this was Certified will require additional approvals.

ESP8266EX Datasheet Version 4.3 Espressif Systems IOT Team http://bbs.espressif.com/

Copyright 2015 Espressif Systems ESP8266 Datasheet Disclaimer and Copyright Notice Information in this document, including URL references, is subject to change without notice. THIS DOCUMENT IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. All liability, including liability for infringement of any proprietary rights, relating to use of information in this document is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rights are granted herein. The Wi-Fi Alliance Member Logo is a trademark of the WiFi Alliance. All trade names, trademarks and registered trademarks mentioned in this document are property of their respective owners, and are hereby acknowledged. Copyright 2015 Espressif Systems. All rights reserved. Espressif Systems 2 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Table of Contents 1.1. 1.2. 1.3. 1.4. 1.5. 2. Hardware Overview 1. General Overview Introduction Features Parameters Ultra Low Power Technology Major Applications

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............................................. 17 Pin Denitions Electrical Characteristics Power Consumption Receiver Sensitivity MCU Memory Organization Internal SRAM and ROM 2.1. 2.2. 2.3. 2.4. 2.5. 2.6. 2.6.1. 2.6.2. External SPI Flash 2.7. 3.1. 3.1.1. General Purpose Input/Output Interface (GPIO) Pins and Denitions AHB and AHB Blocks GPIO 3. Espressif Systems 3 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Secure Digital Input/Output Interface (SDIO) Serial Peripheral Interface (SPI/HSPI) 3.2. 3.3. 3.3.1. General SPI (Master/Slave) 3.3.2. SDIO / SPI (Slave) 3.3.3. HSPI (Master/Slave) 3.4. 3.5. 3.6. 3.7. 3.8. 3.9. 3.10. Inter-integrated Circuit Interface (I2C) I2S Universal Asynchronous Receiver Transmitter (UART) Pulse-Width Modulation (PWM) IR Remote Control ADC (Analog-to-digital Converter) LED Light and Button

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.................................................................................................. 2.4 GHz Receiver 2.4 GHz Transmitter

.............................................................................................. Firmware & Software Development Kit 7.1. 7.2. 7.3. 6.1. 6.2. Features Radio 18 18 18 19 19 19 20 20 21 22 22 24 26 26 27 28 28 29 29 30 30 30 4.1. Power Management 5. 6. Clock Management 4. 7. Espressif Systems 4 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet 7.4. Clock Generator 8. Appendix: QFN32 Package Size

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June 1, 2015 Espressif Systems ESP8266 Datasheet Introduction 1. General Overview 1.1. Espressif Systems Smart Connectivity Platform (ESCP) is a set of high performance, high integration wireless SOCs, designed for space and power constrained mobile platform designers. It provides unsurpassed ability to embed WiFi capabilities within other systems, or to function as a standalone application, with the lowest cost, and minimal space requirement. Figure 1 ESP8266EX Block Diagram ESP8266EX offers a complete and self-contained WiFi networking solution; it can be used to host the application or to ofoad WiFi networking functions from another application processor. When ESP8266EX hosts the application, it boots up directly from an external ash. In has integrated cache to improve the performance of the system in such applications. Alternately, serving as a WiFi adapter, wireless internet access can be added to any micro controller-

based design with simple connectivity (SPI/SDIO or I2C/UART interface). ESP8266EX is among the most integrated WiFi chip in the industry; it integrates the antenna switches, RF balun, power amplier, low noise receive amplier, lters, power management modules, it requires minimal external circuitry, and the entire solution, including front-end module, is designed to occupy minimal PCB area. ESP8266EX also integrates an enhanced version of Tensilicas L106 Diamond series 32-bit processor, with on-chip SRAM, besides the WiFi functionalities. ESP8266EX is often integrated with external sensors and other application specic devices through its GPIOs; sample codes for such applications are provided in the software development kit (SDK). Espressif Systems 6 31 June 1, 2015

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Espressif Systems ESP8266 Datasheet Espressif Systems Smart Connectivity Platform (ESCP) demonstrates sophisticated system-level features include fast sleep/wake context switching for energy-efcient VoIP, adaptive radio biasing for low-power operation, advance signal processing, and spur cancellation and radio co-existence features for common cellular, Bluetooth, DDR, LVDS, LCD interference mitigation. 1.2. Features 802.11 b/g/n Integrated low power 32-bit MCU Integrated 10-bit ADC Integrated TCP/IP protocol stack Integrated TR switch, balun, LNA, power amplier and matching network Integrated PLL, regulators, and power management units Supports antenna diversity WiFi 2.4 GHz, support WPA/WPA2 Support STA/AP/STA+AP operation modes Support Smart Link Function for both Android and iOS devices SDIO 2.0, (H) SPI, UART, I2C, I2S, IR Remote Control, PWM, GPIO STBC, 1x1 MIMO, 2x1 MIMO A-MPDU & A-MSDU aggregation & 0.4s guard interval Deep sleep power <10uA, Power down leakage current < 5uA Wake up and transmit packets in < 2ms Standby power consumption of < 1.0mW (DTIM3)

+20 dBm output power in 802.11b mode Operating temperature range -40C ~ 125C FCC, CE, TELEC, WiFi Alliance, and SRRC certied 1.3. Parameters Table 1 Parameters Espressif Systems 7 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Categories Items Values WiFi Paramters Certicates WiFi Protocles Frequency Range Tx Power Rx Sensitivity Types of Antenna Peripheral Bus Hardware Paramaters Software Parameters Operating Voltage Operating Current Operating Temperature Range Ambient Temperature Range Package Size External Interface WiFi mode Security Encryption Firmware Upgrade Ssoftware Development Network Protocols FCC/CE/TELEC/SRRC 802.11 b/g/n 2.4G-2.5G (2400M-2483.5M) 802.11 b: +20 dBm 802.11 g: +17 dBm 802.11 n: +14 dBm 802.11 b: -91 dbm (11 Mbps) 802.11 g: -75 dbm (54 Mbps) 802.11 n: -72 dbm (MCS7) PCB Trace, External, IPEX Connector, Ceramic Chip UART/SDIO/SPI/I2C/I2S/IR Remote Control GPIO/PWM 3.0~3.6V Average value: 80mA

-40~125 Normal temperature 5x5mm N/A station/softAP/SoftAP+station WPA/WPA2 WEP/TKIP/AES UART Download / OTA (via network) Supports Cloud Server Development / SDK for custom rmware development IPv4, TCP/UDP/HTTP/FTP Espressif Systems 8 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet User Configuration AT Instruction Set, Cloud Server, Android/

iOS App 1.4. Ultra Low Power Technology By using advance power management techniques and logic to power-down functions not required and to control switching between sleep and active modes, ESP8266EX consumes about than 60uA in deep sleep mode (with RTC clock still running) and less than 1.0mA (DTIM=3) or less than 0.5mA

(DTIM=10) to stay connected to the access point. When in sleep mode, only the calibrated real-time clock and watchdog remains active. The real-time clock can be programmed to wake up the ESP8266EX at any required interval. The ESP8266EX can be programmed to wake up when a specified condition is detected. This minimal wake-up time feature of the ESP8266EX can be utilized by mobile device SOCs, allowing them to remain in the low-power standby mode until WiFi is needed. 1.5. Major Applications Major fields of ESP8266EX applications to Internet-of-Things include:

Home Appliances Home Automation Smart Plug and lights Mesh Network Industrial Wireless Control Baby Monitors IP Cameras Sensor Networks Espressif Systems 9/31 June 1, 2015 Espressif Systems ESP8266 Datasheet WiFi Location-aware Devices Security ID Tags WiFi Position System Beacons Espressif Systems 10 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet 2. Hardware Overview 2.1. Pin Denitions The pin assignments for 32-pin QFN package is illustrated in Fig.2. Figure 2 Pin Assignments Table 2 below presents an overview on the general pin attributes and the functions of each pin. Pin 1 2 3 4 5 Name VDDA LNA VDD3P3 VDD3P3 VDD_RTC Table 2 Pin Denitions Function Analog Power 3.0 ~3.6V RF Antenna Interface. Chip Output Impedance=50 No matching required but we recommend that the -type matching network is retained. Amplier Power 3.0~3.6V Amplier Power 3.0~3.6V NC (1.1V) Type P I/O P P P Espressif Systems 11 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TOUT CHIP_EN XPD_DCDC MTMS MTDI VDDPST MTCK MTDO GPIO2 GPIO0 GPIO4 VDDPST SDIO_DATA_2 SDIO_DATA_3 SDIO_CMD SDIO_CLK SDIO_DATA_0 SDIO_DATA_1 GPIO5 U0RXD U0TXD XTAL_OUT XTAL_IN VDDD VDDA RES12K EXT_RSTB ADC Pin (note: an internal pin of the chip) can be used to check the power voltage of VDD3P3 (Pin 3 and Pin4) or the input voltage of TOUT (Pin 6). These two functions cannot be used simultaneously. Chip Enable. High: On, chip works properly; Low: Off, small current Deep-Sleep WakeupGPIO16 GPIO14; HSPI_CLK GPIO12; HSPI_MISO Digital/IO Power Supply (1.8V~3.3V) GPIO13; HSPI_MOSI; UART0_CTS GPIO15; HSPI_CS; UART0_RTS UART Tx during ash programming; GPIO2 GPIO0; SPI_CS2 GPIO4 Digital/IO Power Supply (1.8V~3.3V) Connect to SD_D2 (Series R: 200); SPIHD; HSPIHD; GPIO9 Connect to SD_D3 (Series R: 200); SPIWP; HSPIWP; GPIO10 Connect to SD_CMD (Series R: 200); SPI_CS0; GPIO11 Connect to SD_CLK (Series R: 200); SPI_CLK; GPIO6 Connect to SD_D0 (Series R: 200); SPI_MSIO; GPIO7 Connect to SD_D1 (Series R: 200); SPI_MOSI; GPIO8 GPIO5 UART Rx during ash programming; GPIO3 UART Tx during ash progamming; GPIO1; SPI_CS1 Connect to crystal oscillator output, can be used to provide BT clock input Connect to crystal oscillator input Analog Power 3.0V~3.6V Analog Power 3.0V~3.6V Serial connection with a 12 k resistor and connect to the ground External reset signal (Low voltage level: Active) I I I/O I/O I/O P I/O I/O I/O I/O I/O P I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O P P I I Espressif Systems 12 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Note: GPIO2, GPIO0, MTDO can be congurable as 3-bit SDIO mode. 2.2. Electrical Characteristics Table 3 ESP8266EX Electrical Characteristics Parameters Conditions Storage Temperature Range Maximum Soldering Temperature IPC/JEDEC J-

STD-020 Working Voltage Value VIL/VIH VOL/VOH I/O IMAX Electrostatic Discharge (HBM) Electrostatic Discharge (CDM) TAMB=25 TAMB=25 Typical Normal 3.3 Min

-40 3.0

-0.3/0.75VIO N/0.8VIO Max 125 260 3.6 0.25VIO/3.6 0.1VIO/N 12 2 0.5 Unit V V mA KV KV Parameters Power Consumption Tx802.11b, CCK 11Mbps, P OUT=+17dBm Tx 802.11g, OFDM 54Mbps, P OUT =+15dBm 2.3. The following current consumption is based on 3.3V supply, and 25C ambient, using internal regulators. Measurements are done at antenna port without SAW lter. All the transmitters measurements are based on 90% duty cycle, continuous transmit mode. Table 4 Description on Power Consumption Typical 170 140 120 50 56 56 15 0.9 10 0.5 Rx 802.11b, 1024 bytes packet length , -80dBm Rx 802.11g, 1024 bytes packet length, -70dBm Rx 802.11n, 1024 bytes packet length, -65dBm Modem-Sleep Light-Sleep Deep-Sleep Tx 802.11n, MCS7, P OUT =+13dBm Power Off Max Min Unit mA mA mA mA mA mA mA mA uA uA Espressif Systems 13 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet

: Modem-Sleep requires the CPU to be working, as in PWM or I2S applications. According to 802.11 standards (like U-APSD), it saves power to shut down the WiFi Modem circuit while maintaining a WiFi connection with no data transmission. E.g. in DTIM3, to maintain a sleep 300ms-

wake 3ms cycle to receive APs Beacon packages, the current is about 15mA

: During Light-Sleep, the CPU may be suspended in applications like WiFi switch. Without data transmission, the WiFi Modem circuit can be turned off and CPU suspended to save power according to the 802.11 standard (U-APSD). E.g. in DTIM3, to maintain a sleep 300ms-wake 3ms cycle to receive APs Beacon packages, the current is about 0.9mA.

: Deep-Sleep does not require WiFi connection to be maintained. For application with long time lags between data transmission, e.g. a temperature sensor that checks the temperature every 100s, sleep 300s and waking up to connect to the AP (taking about 0.3~1s), the overall average current is less than 1mA. Receiver Sensitivity 2.4. The following are measured under room temperature conditions with 3.3V and 1.1V power supplies. Table 5 Receiver Sensitivity Max 2484

-10 17.5 21.5 Parameters Input frequency Input impedance Input reection Output power of PA for 72.2Mbps Output power of PA for 11b mode Sensitivity DSSS, 1Mbps CCK, 11Mbps 6Mbps (1/2 BPSK) 54Mbps (3/4 64-QAM) HT20, MCS7 (65Mbps, 72.2Mbps) OFDM, 6Mbps OFDM, 54Mbps HT20, MCS0 HT20, MCS7 Min 2412 15.5 19.5 Typical 50 16.5 20.5

-98

-91

-93

-75

-72 Adjacent Channel Rejection 37 21 37 20 Unit MHz dB dBm dBm dBm dBm dBm dBm dBm dB dB dB dB Espressif Systems 14 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet 2.5. MCU ESP8266EX is embedded with Tensilica L106 32-bit micro controller (MCU), which features extra low power consumption and 16-bit RSIC. The CPU clock speed is 80MHz. It can also reach a maximum value of 160MHz. Real Time Operation System (RTOS) is enabled. Currently, only 20% of MIPS has been occupied by the WiFi stack, the rest can all be used for user application programming and development. The following interfaces can be used to connect to the MCU embedded in ESP8266EX:

Programmable RAM/ROM interfaces (iBus), which can be connected with memory controller, and can also be used to visit external ash;

Data RAM interface (dBus), which can connected with memory controller;

AHB interface, can be used to visit the register. Internal SRAM and ROM 2.6. Memory Organization 2.6.1. ESP8266EX WiFi SoC is embedded with memory controller, including SRAM and ROM. MCU can visit the memory units through iBus, dBus, and AHB interfaces. All memory units can be visited upon request, while a memory arbiter will decide the running sequence according to the time when these requests are received by the processor. According to our current version of SDK provided, SRAM space that is available to users is assigned as below:

RAM size < 36kB, that is to say, when ESP8266EX is working under the station mode and is connected to the router, programmable space accessible to user in heap and data section is around 36kB.) There is no programmable ROM in the SoC, therefore, user program must be stored in an external SPI ash. 2.6.2. External SPI Flash An external SPI ash is used together with ESP8266EX to store user programs. Theoretically speaking, up to 16 Mbyte memory capacity can be supported. Suggested SPI Flash memory capacity:

OTA is disabled: the minimum ash memory that can be supported is 512 kByte;

OTA is enabled: the minimum ash memory that can be supported is 1 Mbyte. Several SPI modes can be supported, including Standard SPI, Dual SPI, DIO SPI, QIO SPI, and Quad SPI. Espressif Systems 15 31 June 1, 2015

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Espressif Systems ESP8266 Datasheet Therefore, please choose the correct SPI mode when you are downloading into the ash, otherwise rmwares/programs that you downloaded may not work in the right way. AHB and AHB Blocks 2.7. The AHB blocks performs the function of an arbiter, controls the AHB interfaces from the MAC, SDIO

(host) and CPU. Depending on the address, the AHB data requests can go into one of the two slaves:

APB block, or ash controller (usually for standalone applications). Data requests to the memory controller are usually high speed requests, and requests to the APB block are usually register access. The APB block acts as a decoder. It is meant only for access to programmable registers within ESP8266s main blocks. Depending on the address, the APB request can go to the radio, SI/SPI, SDIO

(host), GPIO, UART, real-time clock (RTC), MAC or digital baseband. Espressif Systems 16 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet GPIO Pins and Denitions 3. The chipset encapsulates variable analog and data transmission I/Os, descriptions and denitions of which are explained below in detail. 3.1. 3.1.1. General Purpose Input/Output Interface (GPIO) There are up to 17 GPIO pins. They can be assigned to various functions by the rmware. Each GPIO can be congured with internal pull-up (except XPD_DCDC, which is congured with internal pull-

down), input available for sampling by a software register, input triggering an edge or level CPU interrupt, input triggering a level wakeup interrupt, open-drain or push-pull output driver, or output source from a software register, or a sigma-delta PWM DAC. These pins are multiplexed with other functions such as I2C, I2S, UART, PWM, IR Remote Control, etc. Data I/O soldering pad is bidirectional and tri-state that include data input and output controlling buffer. Besides, I/O can be set as a specic state and remains like this. For example, if you intend to lower the power consumption of the chip, all data input and output enable signals can be set as remaining low power state. You can transport some specic state into the I/O. When the I/O is not powered by external circuits, the I/O will remain to be the state that it was used the last time. Some positive feedback is generated by the state-remaining function of the pins, therefore, if the external driving power must be stronger than the positive feedback. Even so, the driving power that is needed is within 5uA. Table 6 Pin Denitions of GPIOs Symbol Variables Input Low Voltage Input High Voltage Input Leakage Current Output Low Voltage Output High Voltage Input Pin Resistance Value VDDIO Maximum Driving Power Temerpature VIL VIH IIL VOL VOH Cpad VIO IMAX Tamb Min

-0.3 0.75VIO 0.8VIO 1.8

-40 Max 0.25VIO 3.3 50 0.1VIO 2 3.3 12 125 Unit V V nA V V pF V mA C All digital IO pins are protected from over-voltage with a snap-back circuit connected between the pad and ground. The snap back voltage is typically about 6V, and the holding voltage is 5.8V. This Espressif Systems 17 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet provides protection from over-voltages and ESD. The output devices are also protected from reversed voltages with diodes. Secure Digital Input/Output Interface (SDIO) 3.2. One Slave SDIO has been dened by ESP8266EX, the denitions of which are described in Table 7 below. 4bit 25MHz SDIO v1.1 and 4bit 50MHz SDIO v2.0 are supported. Table 7 Pin Denitions of SDIOs Pin Num IO Pin Name IO6 SDIO_CLK IO7 SDIO_DATA0 IO8 SDIO_DATA1 IO9 SDIO_DATA_2 IO10 SDIO_DATA_3 IO11 SDIO_CMD Serial Peripheral Interface (SPI/HSPI) 21 22 23 18 19 20 3.3. Currently, one general Slave/Master SPI, one Slave SDID/SPI, and one general Slave/Master HSPI have been dened by ESP8266EX. Functions of all these pins can be implemented via hardware. The pin denitions are are described below:

3.3.1. General SPI (Master/Slave) Pin Name SDIO_CLK SDIO_DATA0 SDIO_DATA1 SDIO_DATA_2 SDIO_DATA_3 SDIO_CMD U0TXD GPIO0 Table 8 Pin Denitions of General SPIs Pin Num 21 22 23 18 19 20 26 15 IO IO6 IO7 IO8 IO9 IO10 IO11 IO1 IO0 Function Name SDIO_CLK SDIO_DATA0 SDIO_DATA1 SDIO_DATA_2 SDIO_DATA_3 SDIO_CMD Function Name SPICLK SPIQ/MISO SPID/MOSI SPIHD SPIWP SPICS0 SPICS1 SPICS2 Espressif Systems 18 31

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June 1, 2015 Espressif Systems 3.3.2. SDIO / SPI (Slave) Table 9 Pin Denitions of SDIO / SPI (Slave) ESP8266 Datasheet Pin Name SDIO_CLK SDIO_DATA0 SDIO_DATA1 SDIO_DATA_2 SDIO_DATA_3 SDIO_CMD Pin Num 21 22 23 18 19 20 IO IO6 IO7 IO8 IO9 IO10 IO11 3.3.3. HSPI (Master/Slave) Table 10 Pin Denitions of HSPI (Master/Slave) Pin Name MTMS MTDI MTCK MTDO Pin Num 9 10 12 13 IO IO14 IO12 IO13 IO15 Function Name SPI_SLAVE_CLK SPI_SLAVE_MISO SPI_SLAVE_INT NC SPI_SLAVE_CS SPI_SLAVE_MOSI Function Name HSPICLK HSPIQ/MISO HSPID/MOSI HPSICS Note:

SPI mode can be implemented via software programming. The clock frequency can reach up to a maximum value of 80MHz. Function of Slave SDIO/SPI interface can be implemented via hardware, and linked list DMA

(Direct Memory Access) is supported, software overheads are smaller. However, there is no linked list DMA on general SPI and HSPI, and the software overheads are larger, therefore, the data transmitting speed will be restrained by software processing speed. Inter-integrated Circuit Interface (I2C) 3.4. One I2C, which is mainly used to connect with micro controller and other peripheral equipment such as sensors, is dened by ESP8266EX. The present pin denition of I2C is as dened below:

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June 1, 2015 Espressif Systems ESP8266 Datasheet Table 11 Pin Denitions of I2C Pin Name MTMS GPIO2 Pin Num 9 14 IO IO14 IO2 Function Name I2C_SCL I2C_SDA Both I2C-Master and I2C-Slave are supported. I2C interface functionality can be realized via software programming, the clock frequency can be up to around 100KHz at most. It should be noted that I2C clock frequency should be higher than the slowest clock frequency of the slave device. I2S 3.5. Currently one I2S data input interface and one I2S data output interface are dened. I2S interface is mainly used in applications such as data collection, processing, and transmission of audio data, as well as the input and output of serial data. For example, LED lights (WS2812 series) are supported. The pin denition of I2S is as dened below:

Table 12 Pin Denitions of I2S I2S Data Input Pin Name MTDI MTCK MTMS I2S Data Output Pin Name MTDO U0RXD GPIO2 Pin Num 10 12 9 Pin Num 13 25 14 IO IO12 IO13 IO14 IO IO15 IO3 IO2 Function Name I2SI_DATA I2SI_BCK I2SI_WS Function Name I2SO_BCK I2SO_DATA I2SO_WS I2S functionality can be realized via software programming, the GPIOs that will be used are multiplexed, and linked list DMA is supported. Universal Asynchronous Receiver Transmitter (UART) 3.6. Two UART interfaces, UART0 and UART1, have been dened by ESP8266EX, the denitions are as below:

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June 1, 2015 Espressif Systems ESP8266 Datasheet Table 13 Pin Denitions of UART Interfaces Pin Type UART0 UART1 Pin Name U0RXD U0TXD MTDO MTCK GPIO2 SD_D1 Pin Num 25 26 13 12 14 23 IO IO3 IO1 IO15 IO13 IO2 IO8 Function Name U0RXD U0TXD U0RTS U0CTS U1TXD U1RXD Data transfers to/from UART interfaces can be implemented via hardware. The data transmission speed via UART interfaces can reach 115200*40 (4.5Mbps). UART0 can be for communication. It supports uid control. Since UART1 features only data transmit signal (Tx), it is usually used for printing log. Notes: By default, UART0 will output some printed information when the device is powered on and is booting up. The baud rate of the printed information is closely related to the frequency of the external crystal oscillator. If the frequency of the crystal oscillator is 40MHz, then the baud rate for printing is 115200; if the frequency of the crystal oscillator is 26MHz, then the baud rate for printing is 74880. If the printed information exerts any inuence on the functionality of your device, youd better block the printing during the power-on period by changing (U0TXD,U0RXD) to (MTDO,MTCK). Pulse-Width Modulation (PWM) 3.7. Four PWM output interfaces have been dened by ESP8266EX. They can be extended by users themselves. The present pin denitions of the PWM interfaces are dened as below:

Table 14 Pin Denitions of PWM Interfaces Pin Name Pin Num MTDI MTDO MTMS GPIO4 10 13 9 16 IO IO12 IO15 IO14 IO4 Function Name PWM0 PWM1 PWM2 PWM3 The functionality of PWM interfaces can be implemented via software programming. For example, in the LED smart light demo, the function of PWM is realized by interruption of the timer, the minimum resolution can reach as much as 44 ns. PWM frequency range is adjustable from 1000 us to 10000 us, Espressif Systems 21 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet i.e., between 100Hz and 1KHz. When the PWM frequency is at 1 KHz, the duty ratio will reach 1/22727, and over 14 bit resolution will be achieved at 1KHz refresh rate. 3.8. Currently, only one Infrared remote control interface is dened, the pin denition is as below:

IR Remote Control Table 14 Pin Denition of IR Remote Control Pin Name MTMS GPIO5 Pin Num 9 24 IO IO12 IO5 Function Name IR Tx IR Rx The functionality of Infrared remote control interface can be implemented via software programming. NEC coding, modulation, and demodulation are used by this interface. The frequency of modulated carrier signal is 38KHz, while the duty ratio of the square wave is 1/3. The length of data transmission, which is around 1m, is determined by two factors: one is the maximum value of rated current, the other is internal current-limiting resistance value in the infrared receiver. The larger the resistance value, the lower the current, so is the power, and vice versa. The transmission angle is between 15 and 30, and is mainly determined by the radiation direction of the infrared receiver. Notes: Among the eight interfaces mentioned above, most of them can be multiplexed. Pin denitions that can be dened is not limited to the eight ones herein mentioned, customers can self customise the functions of the pins according to their specic application scenarios. Functions of these pins can be implemented via software programming and hardware. ADC (Analog-to-digital Converter) 3.9. ESP8266EX is embedded with a 10-bit precision SARADC. Currently, TOUT (Pin6) is dened as ADC interface, the denition of which is described below:

Pin Name TOUT Pin Num 6 Function Name ADC Interface Table 16 Pin Denition of ADC The following two applications can be implemented using ADC (Pin6). However, these two applications cannot be implemented concurrently. Test the power supply voltage of VDD3P3 (Pin 3 and Pin 4). The function used to test the power supply voltage on PA_VDD pin is: uint16 system_get_vdd33(void) Test the input voltage of TOUT (Pin 6):

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June 1, 2015 Espressif Systems ESP8266 Datasheet The function used to test the input voltage of TOUT is: uint16 system_adc_read(void) RF-init parameter in the following passage refers to esp_init_data_default.bin Application One:

Hardware Design:

RF-init Parameter: The 107th byte of esp_init_data_default.bin (0 - 127 byte), Test the power supply voltage of VDD3P3 (Pin 3 and Pin 4). TOUT must be dangled. RF Calibration Process:

User Programming:

vdd33_const, must set to be 0xFF, i.e., the value of vdd33_const is 255. Optimize the RF circuit conditions based on the testing results of VDD3P3 (Pin 3 and Pin 4). Use system_get_vdd33 instead of system_adc_read. Application Two:

Hardware Design:

Test the input voltage of TOUT (Pin 6). The input voltage range is 0 to 1.0 V when TOUT is connected to external circuit. RF-init Parameter: The value of the 107th byte of esp_init_data_default.bin (0 - 127 byte), vdd33_const, must be set to be the real power supply voltage of Pin 3 and Pin 4. The working power voltage range of ESP8266EX is between 1.8V and 3.6V, while the unit of vdd33_const is 0.1V, therefore, the effective value range of vdd33_const is 18 to 36. Optimize the RF circuit conditions based on the value of vdd33_const. The permissible error is 0.2V. Use system_adc_read instead of system_get_vdd33. RF Calibration Process:

User Programming:

Note One:

In RF_init parameter esp_init_data_default.bin (0 - 127 byte), the 107th byte is dened as vdd33_const. Denitions of vdd33_const is described below:

1If vdd33_const = 0xff, the power voltage of Pin 3 and Pin 4 will be tested by the internal self-

calibration process of ESP8266EX chipset itself. RF circuit conditions should be optimized according to the testing results. Espressif Systems 23 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet 2If 18 =< vdd33_const =< 36, ESP8266EX RF Calibration and optimization process is implemented via (vdd33_const/10). 3If vdd33_const < 18 or 36 < vdd33_const < 255, ESP8266EX RF Calibration and optimization process is implemented via the default value 3.0V. Note Two:

Function system_get_vdd33 is used to test the power supply voltage of VDD3P3 (Pin 3 and Pin 4). Details on this function are described below:

1Pin Tout must be dangled. The 107th byte of esp_init_data_default.bin (0 - 127 byte), vdd33_const, must set to be 0xFF. 2If the 107th byte of esp_init_data_default.bin (0 - 127 byte), vdd33_const, is equal to 0xff, the returned value of function system_get_vdd33 will be an effective value, otherwise 0xffff will be returned. 3The unit of the returned value is: 1/1024 V. Note Three:

Function system_adc_read is dened to test the input voltage of Pin TOUT (Pin 6). Details on this function are described below:

1The value of the 107th byte of esp_init_data_default.bin (0 - 127 byte), vdd33_const, must be set to be the real power supply voltage of Pin 3 and Pin 4. 2If the 107th byte of esp_init_data_default.bin (0 - 127 byte), vdd33_const, is NOT equal to 0xff, the returned value of system_adc_read will be an effective value of the input voltage of Pin TOUT, otherwise 0xffff will be returned. 3The unit of the returned value is: 1/1024 V. 3.10. LED Light and Button ESP8266EX features up to 17 GPIOs, all of which can be assigned to realise various functions of LED lights and buttons. Denitions of some GPIOs that are assigned with certain functions in our demo application design are shown below:

Pin Name MTCK GPIO0 MTDI Table 17 Pin Denitions of LED and Button Pin Num 12 15 10 IO IO13 IO0 IO12 Function Name Button (Reset) WiFi Light Link Light Espressif Systems 24 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Altogether three interfaces have been dened, one is for the button, and the other two is for LED light. Generally, MTCK is used to control the reset button, GPIO0 is used as an signal to indicate the WiFi working state, MTDI is used as a signal light to indicate communication between the device and the server. Note: Among the nine interfaces mentioned above, most of them can be multiplexed. Pin definitions that can be defined is not limited to the eight ones herein mentioned, customers can self customise the functions of the pins according to their specific application scenarios. Functions of these pins can be implemented via software programming and hardware. Espressif Systems 25 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Firmware & Software Development Kit 4. The application and rmware is executed in on-chip ROM and SRAM, which loads the instructions during wake-up, through the SDIO interface, from the external ash. The rmware implements TCP/IP, the full 802.11 b/g/n/e/i WLAN MAC protocol and WiFi Direct specication. It supports not only basic service set (BSS) operations under the distributed control function (DCF) but also P2P group operation compliant with the latest WiFi P2P protocol. Low level protocol functions are handled automatically by ESP8266:

Passive or active scanning, as well as P2P discovery procedure is performed autonomously once initiated by the appropriate command. Power management is handled with minimum host interaction to minimize active duty period. RTS/CTS acknowledgement fragmentation and defragmentation aggregation frame encapsulation (802.11h/RFC 1042) automatic beacon monitoring / scanning, and P2P WiFi direct Features 4.1. The SDK includes the following library functions:

802.11 b/g/n/d/e/i/k/r support;

WiFi Direct (P2P) support:

P2P Discovery, P2P Group Owner mode, P2P Power Management Infrastructure BSS Station mode / P2P mode / softAP mode support;

Hardware accelerators for CCMP (CBC-MAC, counter mode), TKIP (MIC, RC4), WAPI (SMS4), WEP (RC4), CRC;

WPA/WPA2 PSK, and WPS driver;

Additional 802.11i security features such as pre-authentication, and TSN;

Open Interface for various upper layer authentication schemes over EAP such as TLS, PEAP, LEAP, SIM, AKA, or customer specic;

802.11n support (2.4GHz);

Supports MIMO 11 and 21, STBC, A-MPDU and A-MSDU aggregation and 0.4s guard interval;

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June 1, 2015 Espressif Systems ESP8266 Datasheet WMM power save U-APSD;

Multiple queue management to fully utilize trac prioritization dened by 802.11e standard;

UMA compliant and certied;

802.1h/RFC1042 frame encapsulation;

Scattered DMA for optimal CPU o load on Zero Copy data transfer operations;

Antenna diversity and selection (software managed hardware);

Clock/power gating combined with 802.11-compliant power management dynamically adapted to current connection condition providing minimal power consumption;

Adaptive rate fallback algorithm sets the optimum transmission rate and Tx power based on actual SNR and packet loss information;

Automatic retransmission and response on MAC to avoid packet discarding on slow host environment;

Seamless roaming support;

Congurable packet trac arbitration (PTA) with dedicated slave processor based design provides exible and exact timing Bluetooth co-existence support for a wide range of Bluetooth Chip vendors;

Dual and single antenna Bluetooth co-existence support with optional simultaneous receive

(WiFi/Bluetooth) capability. Power Management 5. The chip can be put into the following states:

OFF: CHIP_PD pin is low. The RTC is disabled. All registers are cleared. DEEP_SLEEP: Only RTC is powered on the rest of the chip is powered off. Recovery memory of RTC can keep basic WiFi connecting information. SLEEP: Only the RTC is operating. The crystal oscillator is disabled. Any wakeup events (MAC, host, RTC timer, external interrupts) will put the chip into the WAKEUP state. WAKEUP: In this state, the system goes from the sleep states to the PWR state. The crystal oscillator and PLLs are enabled. ON: the high speed clock is operational and sent to each block enabled by the clock control register. Lower level clock gating is implemented at the block level, including the CPU, which can be gated off using the WAITI instruction, while the system is on. Espressif Systems 27 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Figure 3 Illustration of Power Management 6. Clock Management 6.1. High Frequency Clock The high frequency clock on ESP8266EX is used to drive both transmit and receive mixers. This clock is generated from the internal crystal oscillator and an external crystal. The crystal frequency can range from 26MHz to 52MHz. While internal calibration of the crystal oscillator ensures that a wide range of crystals can be used, in general, the quality of the crystal is still a factor to consider, to have reasonable phase noise that is required for good performance. When the crystal selected is sub-optimal due to large frequency drifts or poor Q-factor, the maximum throughput and sensitivity of the WiFi system is degraded. Please refer to the application notes on how the frequency offset can be measured. Espressif Systems 28 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Table 18 High Frequency Clock Parameter Frequency Loading capacitance Motional capacitance Series resistance Frequency tolerance Symbol FXO CL CM RS FXO Frequency vs temperature (-25C ~

75C) FXO,Temp Min 26 2 0

-15

-15 Max 52 32 5 65 15 15 Unit MHz pF pF ppm ppm External Reference Requirements 6.2. For an externally generated clock, the frequency can range from 26MHz to 52MHz can be used. For good performance of the radio, the following characteristics are expected of the clock:

Table 19 External Clock Reference Parameter Clock amplitude External clock accuracy Symbol VXO FXO,EXT Min 0.2

-15 Phase noise @1kHz offset, 40MHz clock Phase noise @10kHz offset, 40MHz clock Phase noise @100kHz offset, 40MHz clock Max 1 15

-120

-130

-138 Unit Vpp ppm dBc/Hz dBc/Hz dBc/Hz 7. Radio The ESP8266EX radio consists of the following main blocks:

2.4GHz receiver 2.4GHz transmitter High speed clock generators and crystal oscillator Real time clock Bias and regulators Power management Espressif Systems 29 31

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June 1, 2015 Espressif Systems ESP8266 Datasheet Channel Frequencies 7.1. The RF transceiver supports the following channels according to the IEEE802.11b/g/n standards. Channel No Table 20 Frequency Channel Channel No Frequency (MHz) Frequency (MHz) 1 2 3 4 5 6 7 2412 2417 2422 2427 2432 2437 2442 8 9 10 11 12 13 14 2447 2452 2457 2462 2467 2472 2484 2.4 GHz Receiver 7.2. The 2.4GHz receiver downconverts the RF signal to quadrature baseband signals and converts them to the digital domain with 2 high resolution high speed ADCs. To adapt to varying signal channel conditions, RF lters, automatic gain control (AGC), DC offset cancelation circuits and baseband lters are integrated within ESP8266EX. 2.4 GHz Transmitter 7.3. The 2.4GHz transmitter up-converts the quadrature baseband signals to 2.4GHz, and drives the antenna with a high powered CMOS power amplier. The use of digital calibration further improves the linearity of the power amplier, enabling a state of art performance of delivering +19.5dBm average power for 802.11b transmission and +16dBm for 802.11n transmission. Additional calibrations are integrated to cancel any imperfections of the radio, such as:

carrier leakage, I/Q phase matching, and baseband nonlinearities This reduces the amount of time required and test equipment required for production testing. Clock Generator 7.4. The clock generator generates quadrature 2.4 GHz clock signals for the receiver and transmitter. All components of the clock generator are integrated on-chip, including:

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June 1, 2015 Espressif Systems ESP8266 Datasheet inductor, varactor, and loop lter The clock generator has built-in calibration and self test circuits. Quadrature clock phases and phase noise are optimized on-chip with patented calibration algorithms to ensure the best receiver and transmitter performance. 8. Appendix: QFN32 Package Size Espressif Systems 31 31

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June 1, 2015 FCC Caution: Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This device and its antenna(s) must not be co-located or operating in conjunction with any other antenna or transmitter. 15.105 Information to the user.

(b) For a Class B digital device or peripheral, the instructions furnished the user shall include the following or similar statement, placed in a prominent location in the text of the manual:

Note: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. This equipment complies with FCC radiation exposure limits set forth for an uncont rolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator and your body. Radiation Exposure Statement:

This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. The availability of some specific channels and/or operational frequency bands are country dependent and are firmware programmed at the factory to match the intended destination. The firmware setting is not accessible by the end user. The final end product must be labelled in a visible area with the following:

Contains Transmitter Module 2AFOSWT8266 In the event that these conditions can not be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization