Product user manual Project Name: M18QAG Author: Wistron NeWeb Corporation Revision: 0.3 Revision Date: 2020/11/20 1 / 42 HW Design Guidelines Contact Information Technical Support website https://SupportIoT.wnc.com.tw Company Website www.wnc.com.tw Revision History Rev. #
Author Summary of Changes 0.1 0.2 0.3 WNC WNC WNC First release FCC/IC statement Delete function block diagram and change Add Interference and sensitivity,Update Labeling 2020/11/20 Date 2020/11/09 2020/11/17 2 / 42 HW Design Guidelines Wistron NeWeb Corporation THIS DOCUMENT AND THE INFORMATION CONTAINED HEREIN IS PROPRIETARY AND IS THE EXCLUSIVE PROPERTY OF WNC AND SHALL NOT BE DISTRIBUTED, REPRODUCED, OR DISCLOSED IN WHOLE OR IN PART WITHOUT PRIOR WRITTEN PERMISSION FROM WNC. LIMITATION OF LIABILITY THIS DOCUMENT AND THE INFORMATION CONTAINED HEREIN IS PURELY FOR DESIGN REFERENCE AND SUBJECT TO REVISION BY WNC AT ANY TIME. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY WARRANTY OR RIGHT TO USE THE MATERIAL CONTAINED HEREIN WITHOUT WNCS PRIOR EXPRESS WRITTEN CONSENT. WNC SHALL NOT BE LIABLE FOR ANY USE, APPLICATION OR DEVELOPMENT DERIVED FROM THE MATERIAL WITHOUT SUCH PRIOR EXPRESS WRITTEN CONSENT. 3 / 42 HW Design Guidelines Contents Contact Information................................................................................................................. 2 Revision History........................................................................................................................ 2 Contents.................................................................................................................................... 4 1. Introduction.......................................................................................................................... 6 1.1. Abbreviation............................................................................................................. 6 1.2. Features.................................................................................................................... 7 1.3. Environmental Specifications and Certifications...................................................... 8 1.3.1. Environmental Specifications........................................................................ 8 1.3.2. Certifications................................................................................................. 9 1.3.3. Green Product Compliance........................................................................... 9 2. Electrical Specifications...................................................................................................... 10 2.1. Host interface pin assignments...............................................................................10 2.1.1. LGA Pad Diagram.........................................................................................10 2.1.2. Pin Assignments.......................................................................................... 11 3. Electrical Specifications...................................................................................................... 20 3.1. Power supply...........................................................................................................20 3.2. RF Specification.......................................................................................................20 3.2.1. Band support...............................................................................................20 3.2.2. Bandwidth support..................................................................................... 21 3.2.3. RF Transmit Specification............................................................................ 21 3.2.4. RF Receiver Specification............................................................................ 21 3.2.5. GNSS receiver specifications....................................................................... 22 4. Software Interface.............................................................................................................. 22 4.1. Support tools.......................................................................................................... 22 4.2. USB interface.......................................................................................................... 22 4 / 42 HW Design Guidelines 5. Mechanical and Environmental Certifications.................................................................. 23 5.1. PCBA Form Factor................................................................................................... 23 6. Design Guide.......................................................................................................................26 6.1. Power supply...........................................................................................................26 6.2. RF connections........................................................................................................27 6.3. Interference and sensitivity.................................................................................... 30 6.4. Reflow..................................................................................................................... 31 7. Labeling...............................................................................................................................32 8. Safety Recommendation.................................................................................................... 33 5 / 42 HW Design Guidelines 1. Introduction The M18QAG module is LTE modems which incorporate an application CPU subsystem and peripheral interfaces and functions uniquely designed to address the power/performance/cost requirements of IoT and M2M applications. The CPU is based on Qualcomms MDM architecture which offers OFDMA-related software based signal processing capabilities that significantly exceed traditional communications ARM cores. M18QAG module provides a variety of interfaces including USB 2.0, SGMII, SPI, UART, PCM, I2C, UIM & SDIO. 1.1. Abbreviation Table 1. Abbreviation Abbreviation Definition Alternating Current Direct Current AC DC ETSI GND GPS GNSS GPIO I/O IoT I2C LGA LTE Mbps MIPS N/A OS PC PCM European Telecommunications Standards Institute Ground Global Positioning System Any single or combined satellite navigation system (GPS, GLONASS and combined GPS/GLONASS) General Purpose Input Output Input/Output Internet of Things Inter-Integrated Circuit Land Grid Array Long Term Evolution Megabits per second Not/Applicable Operating System Personal Computer Pulse Code Modulation Millions of Instructions Per Second 6 / 42 HW Design Guidelines PIN SIM SMA SPI UART UIM USB Vref Personal Identification Number Subscriber Identity Module Surface Mount Antenna Serial Peripheral Interface User Identity Module Universal Serial Bus Voltage reference Universal Asynchronous Receiver-Transmitter WCDMA WNC Wideband Code Division Multiple Access Wistron NeWeb Corporation 1.2. Features information. This section lists main features of M18QAG module support. For wireless technology and band support information among different modules, please refer to table2 for detail Table 2. M18QAG Series module overview Module Category GNSS Temperature Grade LTE WCDMA B2/4/5/12/14 B2/5 M18QAG 4 Industrial Note: 1.Refer to section6.6 for more information about industrial grade. 2. indicates supporting. indicates not supporting. Feature list:
LTE 3GPP release 10 without Carrier Aggregation M18QAG: 3GPP, LTE Cat. 4 with 150/50 Mbps for DL/UL Supports LTE B2/4/5/12/14 Supports WCDMA B2/5, 3GPP release 8 GPS & GLONASS Ultra-high-performance Cortex A7 microprocessor 7 / 42 HW Design Guidelines Modem subsystem (MSS) Resource and power management (RPM) subsystem Optimized for M2M and IoT markets Interfaces HS USB 2.0 with integrated PHY SGMII interface Dual UART interfaces (4 bit and 2 bit) for data transfer and diagnostic tools SDC1/First SPI interface I2C/Second SPI interface USIM interface GPIOs ADC PCM/I2S JTAG interface 1.3. Environmental Specifications and Certifications 1.3.1. Environmental Specifications The environmental specifications for both operating and storage conditions are defined in the Table below. Normal operating temperature range Extended operating temperature range Condition Temperature Range Remark 20 C to 60 C specifications Fully functional and in compliance with 3GPP 40 C to 85C RF performance may be affected outside the normal range, but the module will still function. Storage 40 C to 85 C Note: All temperatures above refer to ambient temperatures. Table 3. Temperature range 8 / 42 HW Design Guidelines 1.3.2. Certifications The M18QAG module is certified to be compliant with PTCRB, FCC, IC. 1.3.3. Green Product Compliance RoHS (2011/65/EU) 9 / 42 HW Design Guidelines 2. Electrical Specifications 2.1. Host interface pin assignments 2.1.1. LGA Pad Diagram Figure 1. LGA pad diagram (top view) 10 / 42 HW Design Guidelines Interface Family Signal Description Table 4. Pin interface family RF Interfaces 2.1.2. Pin Assignments I/O type description:
AO : Analog Output AI : Analog Input DO : Digital Output DI : Digital Input User Identity Module Data Interfaces- USB 2.0 Data Interfaces- SGMII RF_2 RF_GNSS RF_1 UIM_VCC UIM_DATA UIM_CLK UIM_RESET UIM_DETECT USB_HS_DP USB Detect USB_HS_DM SGMII_RX_P SGMII_RX_M SGMII_TX_P SGMII_TX_M SGMII_MDIO SGMII_MDC Diversity antenna Reserved for GNSS receiver Main Antenna Power source for UIM Data in/out Clock signal Reset signal UIM Detect signal USB Data Positive USB Detect USB Data Negative SGMII receive - plus SGMII receive - minus SGMII transmit - plus SGMII transmit - minus SGMII Management data SGMII Management data clock I/O AI AI AI/AO AO DI/DO DO DO DI/DO DI/DO DI DI/DO DI DI DO DO DI DO DI/DO DI/DO 11 / 42 Data Interfaces- UART1 UART1_CTS_N UART1_RFR_N Clear To Send for UART 1 Ready for receive for UART1 HW Design Guidelines Data Interfaces- UART2 Data Interfaces- I2C/2nd_ SPI Data Interfaces- SDC1/1st_SPI UART1_RX UART1_TX UART2_RX UART2_TX I2C_SDA 2nd_SPI_EN_1 I2C_SCL 2nd_SPI_CLK SPI_MOSI NC SPI_MISO SDC1_DATA_3 1st_SPIM_MOSI SDC1_DATA_2 1st_SPIM_MISO SDC1_DATA_1 1st_SPIM_EN_1 SDC1_DATA_0 1st_SPIM_CLK SDC1_CMD SDC1_CLK WWAN_STATE POWER_ON WAKEUP_OUT WAKEUP_IN RESET Module Control and State Interfaces Power and Ground General Purpose VREF VCC GND GPIO Receive for UART 1 Transmit for UART 1 Receive for UART 2 Transmit for UART 2 Data in/out 2nd_SPI chip select Clock signal 2nd_SPI serial clock 2nd_SPI master out slave in NC 2nd_SPI master in slave out SDC1_DATA_3 1st_SPI master out slave in SDC1_DATA_2 1st_SPI master in slave out SDC1_DATA_1 1st_SPI chip select SDC1_DATA_0 1st_SPI serial clock SDC1_CMD SDC1_CLK Wireless WAN Radio State Power On the module Module wakes up host Host wakes up module Reset the module Voltage Reference Output Main Power GND DI DO DI DO DO DO DO DO
DI DI/DO DI/DO DO DI/DO DI DI/DO DO DI/DO DO DI/DO DO DO DI DO DI DI AO AI AI 12 / 42 Digital I/O DI/DO HW Design Guidelines ADC_CONVENTOR ADC_CONVENTOR AUDIO- PCM/I2S PCM_DIN I2S_DATA0 PCM_DOUT I2S_DATA1 PCM_CLK I2S_SCK PCM_SYNC I2S_WS JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N PS_HOLD PCM_DIN I2S_DATA0 PCM_DOUT I2S_DATA1 PCM_CLK I2S_SCK PCM_SYNC I2S_WS JTAG clock input JTAG data input JTAG data output JTAG mode select input JTAG reset PS_HOLD RFU- RFU Debug- JTAG RFU Reserved For Future Use JTAG_SRST_N JTAG reset for debug Debug- Force_USB_BOOT Force_USB_BOOT_CONFIG Force USB BOOT CONFIG Table 5. Pin Assignments Modem mode Host Mode Voltage Level (V) Min. Typ. Max. Pin No. 1 2 3 4 5 6 7 8 9 GND GND NC GND GND GND GND GND GND GND NC GND GND GND GND GND RF_GNSS 10 GND RF_GNSS GND
0 0
0 0 0 0 0
0 AI DI DI/DO DO DI/DO DO DO DO DO
DI DI DI DO DI DO DI DI
13 / 42 GND GND GND GND RF_1 GND GND GND GND GND RF_2 GND GND GND GND GND NC GND GND GND GND GND NC GND GND GND VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 NC GND GND 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 GND GND GND GND RF_1 GND GND GND GND GND RF_2 GND GND GND GND GND NC GND GND GND GND GND NC GND GND GND VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 NC GND GND PCM_SYNC/GPIO46 PCM_SYNC/GPIO46 1.7 HW Design Guidelines
3.3 3.3 3.3 3.3 3.3 3.3 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 3.8 3.8 3.8 3.8 3.8 3.8
0 0 1.8
4.2 4.2 4.2 4.2 4.2 4.2 1.9 14 / 42 HW Design Guidelines 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 PCM_DIN/GPIO47 PCM_DIN/GPIO47 PCM_DOUT/GPIO48 PCM_DOUT/GPIO48 PCM_CLK/GPIO49 PCM_CLK/GPIO49 GND GND GND GND GPIO01/Force USB BOOT Config*8 GPIO02 GPIO01/Force USB BOOT Config*8 GPIO02 GPIO03 GPIO04 NC NC NC NC I2C_SDA I2C_SCL NC NC GND GND RFFE1_DATA RFFE1_CLK NC GPIO03 GPIO04 SGMII_TX_P SGMII_TX_M SGMII_RX_P SGMII_RX_M I2C_SDA/
2nd_SPI_EN_1 I2C_SCL/
2nd_SPI_CLK 2nd_SPI_MOSI 2nd_SPI_MISO GND GND RFFE1_DATA RFFE1_CLK NC NC UART1_CTS (UART 1) UART1_CTS (UART 1) NC UART1_RTS (UART 1) UART1_RTS (UART 1) UART1_RX (UART 1) UART1_RX (UART 1) UART1_TX (UART 1) UART1_TX (UART 1) GND GND USB_Dp USB Detect*7 USB_Dn GND GND GND USB_Dp USB Detect*7 USB_Dn GND 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7
1.7 1.7 1.7 1.7 1.7
Note5 Note5 Note5 Note5 1.8 1.8 1.8 1.8 0 0 1.8 1.8 1.8 1.8 1.8 1.8 1.8
1.8 1.8 1.8 1.8 0 0
0 0 0 Note6 1.8 Note6 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9
1.9 1.9 1.9 1.9 1.9
15 / 42 HW Design Guidelines UART2_RX (UART 2) UART2_RX (UART 2) UART2_TX (UART 2) UART2_TX (UART 2) GND GND NC GPIO93 GPIO94 GPIO95 GPIO96 GPIO97 NC NC NC NC NC NC GND GND GND GND NC NC NC NC 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 120 121 122 123 124 125 AD Converter 1st_SPI_MOSI 126 1st _SPI_MISO 127 1st _SPI_EN_1 128 1st _SPI_CLK 129 130 131 GPIO05 GPIO06 GPIO07 GND GND GPIO92 GPIO93 GPIO94 GPIO95 GPIO96 GPIO97 GPIO98 NC NC GND GND GND GND GPIO101 GPIO102 EPHY_RST_N SGMII_MDC SGMII_MDIO AD Converter SDC1_CMD SDC1_CLK SDC1_DATA_3/
1st _SPIM_MOSI SDC1_DATA_2/
1st _SPIM_MISO SDC1_DATA_1/
1st _SPIM_EN_1 SDC1_DATA_0/
1st _SPIM_CLK GPIO05 GPIO06 GPIO07
1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7
0.1 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 0 0 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8
0 0 0 0
1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 Note5 Note5
1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9
1.7 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 16 / 42 HW Design Guidelines EPHY_INT_N/GPIO08 1.7 1.7/2.7 1.7/2.7 1.7/2.7 1.7/2.7 1.7 1.8 1.8/3.0 1.8/3.0 1.8/3.0 1.8/3.0 1.8 1.9 1.9/3.3 1.9/3.3 1.9/3.3 1.9/3.3 1.9 UIM_DETECT UIM_DETECT GPIO08 UIM_VCC UIM_DATA UIM_CLK UIM_RESET NC GND GND 140 141 WWAN_STATE POWER_ON*4 142 143 WAKEUP_OUT*2 144 WAKEUP_IN*3 145 RESET 132 133 134 135 136 137 138 139 146 200 201 202 203 204 205 206 JTAG TCK JTAG TDI JTAG TDO JTAG_TMS PS_HOLD NC 207 Notes:
UIM_VCC UIM_DATA UIM_CLK UIM_RESET NC GND GND WWAN_STATE POWER_ON*4 WAKEUP_OUT*2 WAKEUP_IN*3 RESET JTAG TCK JTAG TDI JTAG TDO JTAG_TMS PS_HOLD NC VREF VREF JTAG_SRST_N JTAG_SRST_N JTAG TRST_N JTAG TRST_N
1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7 1.7
0 0 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8
1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9 1.9
*1. Refer to SGMII standard for more electronic characteristics.
*2. Refer to section 2.3, for more information please check USB2.0 standard
*3. Pull pin87 USB detect to VREF with a 100k resistor to enable module USB, pull pin87 low to disable module USB, CPU USB PHY consumes some current when USB is enabled.
*4. Do not pull pin52 to high before the system boot process is complete.
*5. Do not pull pin143 WAKEUP_OUT to high; otherwise boot will fail.
*6. Leave unused pins floating
*7. Reserve test points on pin52/86/88/106/107 for debug purpose if possible.
*8. If voltage level of digital I/O from the other side is not compatible with module, 17 / 42 HW Design Guidelines level shifter is recommended to transfer the voltage level to 1.8V. Table 6. Digital I/O characteristics Below is the I/O default setting table to describe the level. Its recommended to follow the pulling High or Low to choose a suitable GPIO for application. Table 7. I/O default setting table Signal Name Type Default setting in Normal mode PD PU: Pull Up. PD: Pull Down NP: Non-Pull Pin No. 46 47 48 49 52 53 54 55 60 61 PCM_SYNC/GPIO46 PCM_IN/GPIO47 PCM_OUT/GPIO48 PCM_CLK/GPIO49 GPIO01 GPIO02 GPIO03 GPIO04 I2C_SCL/
2nd_SPI_CLK I2C_SDA/
2nd_SPI_EN_1 DI /DO DI /DO DI /DO DI /DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO PD PD PD PD PD PD PD PD PD 18 / 42 62 63 80 81 82 83 92 93 94 95 96 97 98 101 102 103 106 107 120 123 124 125 126 127 128 129 130 131 132 2nd_SPI_MOSI 2nd_SPI_MISO UART1_CTS (UART1) UART1_RTS (UART1) UART1_RX (UART1) UART1_TX (UART1) UART2_RX (UART2) UART2_TX (UART2) GPIO92 GPIO93 GPIO94 GPIO95 GPIO96 GPIO97 GPIO98 GPIO101 GPIO102 GPIO103 GPIO120 GPIO123 GPIO124 SPIM_MOSI SPIM_MISO SPIM_EN SPIM_CLK GPIO05 GPIO06 GPIO07 GPIO08 141 WWAN_STATE 143 WAKEUP_OUT DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO DI/DO PD PD PD PD PD PD PD NP PD PD PD PD PU PD PD PD PD PD PD PD NP PD PD PD PD PD PD PU PD PD PD HW Design Guidelines 19 / 42 HW Design Guidelines 3. Electrical Specifications 3.1. Power supply level. LTE module power input is VCC. The internal power chipset will transfer VCC to other power Table 8. Power supply voltage level Power Pin Name Pads Description Voltage Level (V) Min. Typ. Max. VCC The M18QAG includes an integrated power manager enabling single and direct voltage Nos. 37 to 42 Main Power Supply VCC1 to VCC6 3.8 3.3 4.2 supply from the battery, reducing the overall bill of materials. The typical voltage 3.8V is recommended. 3.2. RF Specification 3.2.1. Band support Table 9. Band support Band LTE Band 2 LTE Band 4 LTE Band 5 LTE Band 12 LTE Band 14 Band WCDMA Band 2 WCDMA Band 5 Uplink (MHz) 1,8501,910 1,7101,755 824849 699716 788-798 Uplink (MHz) 1,8501910 824849 Downlink (MHz) 1,9301,990 2,1102,155 869894 729746 758-768 Downlink (MHz) 1,9301,990 869894 20 / 42 HW Design Guidelines 3.2.2. Bandwidth support Table 10. Bandwidth support Bandwidth Band LTE Band 2 LTE Band 4 LTE Band 5 LTE Band 12 LTE Band 14 1.4 MHz 3 MHz 5 MHz 10 MHz 15 MHz 20 MHz
3.2.3. RF Transmit Specification Table 11. Conductive Tx output power Band Items Parameter Unit Min. Typ. Max. LTE Band 2 LTE Band 4 LTE Band 5 LTE Band 12 LTE Band 14 Max. TX Power 10 MHz 12 RBs/QPSK dBm 20.3 Max. TX Power 10 MHz 12 RBs/QPSK dBm 20.3 Max. TX Power 10 MHz 12 RBs/QPSK dBm 20.3 Max. TX Power 10 MHz 12 RBs/QPSK dBm 20.3 Max. TX Power 10 MHz 12 RBs/QPSK dBm 20.3 23 23 23 23 23 25.7 25.7 25.7 25.7 25.7 Items Band WCDMA Band 2 Max. TX power WCDMA Band 5 Max. TX power Note: 1.The RF Transmit Specification is defined at the LGA pad. Parameter
Unit Min. dBm 20.3 Typ. Max. 25.7 24 dBm 20.3 24 25.7 2. M18QAG meets 3GPP TS 36.521-1/TS 34.121-1 test standard. 3.2.4. RF Receiver Specification Band Items Parameter Unit Typ. 3GPP standard Table 12. Conductive Rx sensitivity-3GPP LTE Band 2 LTE Band 4 LTE Band 5 LTE Band 12 LTE Band 14 Band RX Sensitivity 10 MHz with 50 RBs RX Sensitivity 10 MHz with 50 RBs RX Sensitivity 10 MHz with 50 RBs RX Sensitivity 10 MHz with 50 RBs RX Sensitivity 10 MHz with 50 RBs dBm dBm dBm dBm dBm Unit Items Parameter Typ. limit 94.3 96.3 94.3 93.3 93.3 Max. 21 / 42 HW Design Guidelines WCDMA Band 2 RX Sensitivity WCDMA Band 5 RX Sensitivity
dBm dBm 104.7 104.7 Note: 1. The RF Receiver Specification is defined at the LGA pad. 2. Meet 3GPP TS 36.521-1/TS 34.121-1 test standard. 3.2.5. GNSS receiver specifications Two GNSS SAW filter, LNA need to be used between the module and antenna. in 4. Software Interface 4.1. Support tools The M18QAG module is compatible with the following support tools:
WNC M18QAG Series Connection Manager (WNCCM) 4.2. USB interface The M18QAG module supports 3GPP standard AT commands and proprietary AT commands;
the MAL Manager SDK is also supported for Linux platforms. 22 / 42 HW Design Guidelines 5. Mechanical and Environmental Certifications 5.1. PCBA Form Factor M18QAG Series modules have the same dimensions:
34.5 mm (typ.) 25.0 mm (typ.) 2.45 mm (typ.) Figure 2. PCBA dimension 23 / 42 HW Design Guidelines Figure 3. Pad dimension(Bottom view) 24 / 42 HW Design Guidelines Figure 4. PCB footprint suggestion 25 / 42 HW Design Guidelines 6. Design Guide 6.1. Power supply LTE module power input is VCC. The internal power chipset will transfer VCC to other power level. circuit. Table 13. Power supply voltage level Power Pin Name Pads Description Voltage Level (V) Min. Typ. Max. VCC The M18QAG Series include an integrated power manager enabling single and direct Nos. 37 to 42 Main Power Supply VCC1 to VCC6 3.3 3.8 4.2 voltage supply from the battery, reducing the overall bill of materials. The typical voltage 3.8V is recommended. Schematic suggestion: Must to separate module power supply to three paths to keep power clean as below for TX spurious performance. The VPH_PWR is for Baseband and RF transceiver, the VPH_PWR_RF is for RF PA, the VPH_PWR_RF_VBATT is for RF PA control 26 / 42 HW Design Guidelines Layout Suggestion:
The 22F, 0.1uF, 12pF and 8pF capacitors are required to place near VCC pins as close as possible. Each power trace should possess sufficient line width to withstand its respective current listed in the table below:
Net Name VCC(12) total VCC(3) total VCC(46) total UIM_VCC VREF Current Value 2A 1A 100mA 150 mA 300 mA The M18QAG module has three RF pads; developers must connect them via 50 traces to 6.2. RF connections the main board. ANT0_TRX pad (Pin15) Primary RX/TX path ANT1_DRX pad (Pin21) Diversity path ANT_GNSS pad (Pin9) GNSS path It is recommended that grounds not be present under the surface of the RF pads in the layout. Details are included below. Layer2 has the same keep out size as Layer1 27 / 42 HW Design Guidelines Figure 5. RF pad layout suggestion The characteristic impedance depends on the dielectric of PCB, the track width and the ground plane spacing. Microstrip type is required. The detail simulation as below. The RF trace of the test board which was used in the FCC test is defined as below. 28 / 42 Microstrip trace HW Design Guidelines 29 / 42 HW Design Guidelines This section includes tips to assist developers in identifying the interference that may affect 6.3. Interference and sensitivity M18QAG Series modules when used in systems. Interference from other wireless devices Harmonics, inter-modulated signal generated from wireless devices that fall in RX ranges of the modules, may result in degraded RX performance. It is highly recommended to check RX performance of entire systems within the shielding environment. Interference from host interface High-speed signal-switching elements in systems can easily couple noise into the module (Ex.: DDR memory, LCD modules, DC-DC converter, PCM signal). Methods to avoid sources of interference Antenna location is important; we recommend directing the antenna away from high-speed switching signals. Furthermore, the trace from the module to the antenna should be as short as possible and must be shielded by complete grounding. The M18QAG Series modules are well shielded; the high-speed elements
(Ex.: DDR memory, LCD modules, DC-DC converter, PCM signal) on a system should have shielding reserved during the early stages of development. trace impedance for connection external shall be 50 ohms. trace should be kept as short as possible and avoid possible nearby unwanted signal pick up and transmitted by the antenna. System integrator should verify if unwanted radiated signal still complies with the relevant rule(s) requirements. 30 / 42 HW Design Guidelines Caution: DDR bus, LCD bus, DC-DC switching and PCM signals are easily to influence the WWAN and GNSS receiver performance, these signals must to be routed in the inner layer of the PCB and far away from the WWAN and GNSS receiver path. 6.4. Reflow other boards. This section details the recommended reflow profile when the module is mounted onto Temp. Region 1 2 Upper temp. region Lower temp. region 160 160 170 170 3 180 180 4 180 180 5 180 180 6 205 205 7 225 225 8 230 230 9 240 240 10 250 250 11 245 245 Conveyer band speed 90 cm/minute PWI = 48%
U10-1 T1-2 J3-3 U42-4 Preheat from 140190C 81.48 81.13 81.94 79.07 2.87 Temp. Difference 31 / 42 HW Design Guidelines 34%
36%
32%
48%
49.26
-7%
241.34 13%
82.95
-8%
1.91 28%
53.50 35%
241.84 18%
87.61 10%
1.87 25%
48.18 18%
241.32 13%
81.24 15%
1.86 24%
6.59 1.44 6.43 0.05 Melt-out Time/230C 46.91 Max Temp Total Time/217C
-31%
240.40 4%
81.18
-15%
1.88 25%
Gradient1 (100150C) Process limit:
Solder Paste Profile feature Gradient1 (Target = 1.5) (100 C150 C)
(Time period = 20 s) Preheat time from 140 C to 190 C Time maintained above 230 C Peak package body temperature Time maintained above 217 C Lead-free Max. 3 105 60 250 110 Min. 0 70 40 230 60 Unit C/S S S C S 7. Labeling Figure26 shows label drawing of M18QAG Series modules. 32 / 42 HW Design Guidelines Figure 6. Label drawing 8. Safety Recommendation Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio 33 / 42 HW Design Guidelines communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:
Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. FCC Caution: Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Radiation Exposure Statement:
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator & your body. This module is intended for OEM integrators only. Per FCC KDB 996369 D03 OEM Manual v01 guidance, the following conditions must be strictly followed when using this certified module:
KDB 996369 D03 OEM Manual v01 rule sections:
2.2 List of applicable FCC rules 34 / 42 HW Design Guidelines This module has been tested for compliance to FCC Part 22, 24, 27, 90 2.3 Summarize the specific operational use conditions The module is tested for standalone mobile RF exposure use condition. Any other usage conditions such as co-location with other transmitter(s) or being used in a portable condition will need a separate reassessment through a class II permissive change application or new certification. 2.4 Limited module procedures Not applicable. 2.5 Trace antenna designs Not applicable. 2.6 RF exposure considerations This equipment complies with FCC mobile radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with a minimum distance of 20cm between the radiator & your body. If the module is installed in a portable host, a separate SAR evaluation is required to confirm compliance with relevant FCC portable RF exposure rules. 2.7 Antennas The following antennas have been certified for use with this module; antennas of the same type with equal or lower gain may also be used with this module. The antenna must be installed such that 20 cm can be maintained between the antenna and users. 35 / 42 HW Design Guidelines 2.8 Label and compliance information The final end product must be labeled in a visible area with the following:
Contains FCC ID: NKRM18QAG. The grantee's FCC ID can be used only when all FCC compliance requirements are met. 2.9 Information on test modes and additional testing requirements This transmitter is tested in a standalone mobile RF exposure condition and any co-located or simultaneous transmission with other transmitter(s) or portable use will require a separate class II permissive change re-evaluation or new certification. 2.10 Additional testing, Part 15 Subpart B disclaimer This transmitter module is tested as a subsystem and its certification does not cover the FCC Part 15 Subpart B (unintentional radiator) rule requirement applicable to the final host. The final host will still need to be reassessed for compliance to this portion of rule requirements if applicable. As long as all conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. IMPORTANT NOTE: In the event that these conditions can not be met (for example certain laptop configurations or co-location with another transmitter), then the FCC 36 / 42 HW Design Guidelines authorization is no longer considered valid and the FCC ID can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. Manual Information To the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. OEM/Host manufacturer responsibilities OEM/Host manufacturers are ultimately responsible for the compliance of the Host and Module. The final product must be reassessed against all the essential requirements of the FCC rule such as FCC Part 15 Subpart B before it can be placed on the US market. This includes reassessing the transmitter module for compliance with the Radio and EMF essential requirements of the FCC rules. This module must not be incorporated into any other device or system without retesting for compliance as multi-radio and combined equipment Industry Canada statement:
This device complies with ISEDs licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Le prsent appareil est conforme aux CNR d ISED applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes : (1) le dispositif ne doit pas produire de brouillage prjudiciable, et (2) ce dispositif doit accepter tout brouillage reu, y compris un brouillage susceptible de provoquer un fonctionnement 37 / 42 HW Design Guidelines indsirable. Radiation Exposure Statement:
This equipment complies with ISED radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with greater than 20cm between the radiator & your body. Dclaration d'exposition aux radiations:
Cet quipement est conforme aux limites d'exposition aux rayonnements ISED tablies pour un environnement non contrl. Cet quipement doit tre install et utilis plus de 20 cm entre le radiateur et votre corps. 38 / 42 HW Design Guidelines This device is intended only for OEM integrators under the following conditions: (For module device use) antenna and users, and 1) The antenna must be installed and operated with greater than 20cm between the 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Cet appareil est conu uniquement pour les intgrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) utilisateurs, et 1) L'antenne doit tre install et exploit avec plus de 20 cm entre l'antenne et les 2) Le module metteur peut ne pas tre complant avec un autre metteur ou antenne. Tant que les 2 conditions ci-dessus sont remplies, des essais supplmentaires sur l'metteur ne seront pas ncessaires. Toutefois, l'intgrateur OEM est toujours responsable des essais sur son produit final pour toutes exigences de conformit supplmentaires requis pour ce module install. IMPORTANT NOTE:
In the event that these conditions can not be met (for example certain laptop configurations or co-location with another transmitter), then the Canada authorization is no longer considered valid and the IC ID can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate Canada authorization. NOTE IMPORTANTE:
Dans le cas o ces conditions ne peuvent tre satisfaites (par exemple pour certaines configurations d'ordinateur portable ou de certaines co-localisation avec un autre metteur), l'autorisation du Canada n'est plus considr comme valide et l'ID IC ne peut pas 39 / 42 HW Design Guidelines tre utilis sur le produit final. Dans ces circonstances, l'intgrateur OEM sera charg de rvaluer le produit final (y compris l'metteur) et l'obtention d'une autorisation distincte au Canada. 40 / 42 HW Design Guidelines End Product Labeling This transmitter module is authorized only for use in device where the antenna may be installed and operated with greater than 20cm between the antenna and users. The final end product must be labeled in a visible area with the following: Contains IC:
4441A-M18QAG. Plaque signaltique du produit final Ce module metteur est autoris uniquement pour une utilisation dans un appareil o lantenne peut tre installe et utilise plus de 20 cm entre lantenne et les utilisateurs. Le produit final doit tre tiquet dans un endroit visible avec l'inscription suivante: "Contient des IC: 4441A-M18QAG". The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which The end user manual shall include all required regulatory information/warning as show in Manual Information To the End User integrates this module. this manual. Manuel d'information l'utilisateur final L'intgrateur OEM doit tre conscient de ne pas fournir des informations l'utilisateur final quant la faon d'installer ou de supprimer ce module RF dans le manuel de l'utilisateur du produit final qui intgre ce module. Le manuel de l'utilisateur final doit inclure toutes les informations rglementaires requises et avertissements comme indiqu dans ce manuel. This radio transmitter (IC: 4441A-M18QAG / Model: M18QAG) has been approved by ISED to operate with the antenna type listed below with maximum permissible gain indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. 41 / 42 HW Design Guidelines Le prsent metteur radio (IC: 4441A-M18QAG / Model: M18QAG) a t approuv par ISED pour fonctionner avec les types d'antenne numrs ci-dessous et ayant un gain admissible maximal. Les types d'antenne non inclus dans cette liste, et dont le gain est suprieur au gain maximal indiqu, sont strictement interdits pour l'exploitation de l'metteur. Antenna list 42 / 42