FCC ID: 2ANPO00NRF9160 PCS Licensed Transmitter

nRF9160 Hardware Integration Guide v1.2 v1.2 / 2020-07-09 Contents Revision history. 1 About this document. 2 Device overview. 2.1 Operating conditions . 2.2 Bands of operation . 2.3 Supported FCC rules . 2.4 Host device manufacturer responsibility . nRF9160 module. 3.1 Block diagram . 3.2 Pin assignment . 3.3 Pin description . 4 Antennas. 4.1 Antenna interface . 4.2 Antenna port test connector . 11

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. Test modes. 5.1 BB functional test . 5.2 RF functional test . 5.2.1 RX test . 5.2.2 TX test . 5.2.3 GPS SNR test . 5.3 RF signaling test . 6 Reference circuitry. 6.1 Schematics . 6.2 PCB layout . 6.3 PCB specification . 6.4 Antenna type . 7 Regulatory information. 7.1 Certified bands . 7.2 FCC/ISED regulatory notices . iii

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. Legal notices. 25 v1.2 ii Revision history Date Version Description July 2020 April 2020 May 2019 1.2 1.1 1.0 Updated for nRF9160 B1 version Editorial changes First release v1.2 iii 1 About this document This document complements the nRF9160 Product Specification to provide recommendations and guidelines for designing devices based on the nRF9160 module. This document is intended for the customers of Nordic Semiconductor, especially device manufacturers and hardware engineers. v1.2 4 2 Device overview nRF9160 is an LTE made simple cellular IoT System in Package (SiP) module that is pre-certified for customers for building end devices on it. nRF9160 consists of an Arm Cortex- M33 microcontroller and 3GPP LTE release 13 compliant embedded Cat-M and Cat-NB LTE modem. The microcontroller has an inbuilt 1 MB flash memory, Arm TrustZone, and 32 general purpose I/O pins. The LTE modem includes transceiver with global cellular band coverage, ultra-low current consumption, and single 50 antenna interface. 2.1 Operating conditions For the nRF9160 temperature range, voltage range, and physical dimensions, see nRF9160 Product Specification. 2.2 Bands of operation For an up-to-date list of certified cellular bands, see section Regulatory certifications on the Nordic Semiconductor web page. 2.3 Supported FCC rules The nRF9160 module has been certified to comply with the following FCC rules:

47 CFR Part 22 47 CFR Part 24 47 CFR Part 27 47 CFR Part 90 47 CFR part 2.1091 FCC Part 15 Subpart B If the device manufacturer will apply the integration and test instructions of this document to the host device, then these certifications can be applied to the host device, except for FCC Part 15 Subpart B which needs to be retested. For more information, see nWP033 - nRF9160 Antenna and RF Interface Guidelines and nWP034 - nRF9160 Hardware Verification Guidelines. The host manufacturer can use nRF9160's FCC ID if the device meets the conditions of the FCC certificate. Normally, the conditions are the following:

A minimum of 20 cm distance from the human body. No colocation with other transmitters. Typically, this condition needs to be reviewed by the FCC lab. Antenna gain below the requirements. 2.4 Host device manufacturer responsibility v1.2 5 Device overview Note: The nRF9160 device is only authorized for the rules listed in Supported FCC rules on page 5. The host device manufacturer is responsible for compliance to any other FCC rules that apply to the host device not covered by the nRF9160 grant of certification. It is mandatory for the host device manufacturer to assure the final devices compliance with FCC Part 15 Subpart B even if certification has been granted to nRF9160. v1.2 6 3 nRF9160 module The nRF9160 SiP module consists of the nRF9160 System on Chip (SoC), power management and RF front-

end section, and passive and clocking components. External to the module are supply source (battery or mains), SIM solution, and any customer peripherals and sensors. For further details of blocks and their software controls and dependencies, see nRF9160 Product Specification. 3.1 Block diagram The following block diagram illustrates the nRF9160 SiP module. ETM trace ITM trace Debug nRF9160 ETM AHB-AP CPU ARM CORTEX-M33 NVIC SysTick RAM0 RAM1 RAM2 RAM3 RAM0 RAM1 RAM2 RAM3 m a s t e r s l a v e s l a v e s l a v e s l a v e s l a v e s l a v e s l a v e AHB multilayer s l a v e s l a v e s l a v e s l a v e s l a v e m a s t e r GPIO slave AHB TO APB BRIDGE CODE FICR UICR LTE-M modem ANT - LTE

ANT - GPS 1.8 V USIM USIM

APB ARM TrustZone CryptoCell 310 GPS P0

(P0.0 P0.31) AIN0 AIN7 AREF0 AREF1 RTS CTS TXD RXD SCL SDA SCL SDA SCK MOSI MISO CSN MISO MOSI SCK CLK DIN MCK LRCK SCL SDOUT SDIN master EasyDMA master master master EasyDMA master B P A EasyDMA master master SAADC EasyDMA UARTE [0..3]

TWIS [0..3]

EasyDMA TWIM [0..3]

SPIM [0..3]

SPIS [0..3]

PDM EasyDMA I2S EasyDMA master master EasyDMA master NVMC DPPI KMU SPU DMA GPIOTE RTC [0..1]

TIMER [0..2]

IPC PWM[0..3]

EasyDMA WDT POWER CLOCK Clock control REGULATORS OUT0-OUT3 High frequency clock sources High frequency clock sources Figure 1: nRF9160 module block diagram v1.2 7 nRF9160 module 3.2 Pin assignment The following figure illustrates the nRF9160 pinout. For more information, see Pin assignments in nRF9160 Product Specification. Figure 2: nRF9160 pinout, top (seen through module) 3.3 Pin description Pin descriptions are provided in the following table. The table can be found in Pin assignments in the nRF9160 Product Specification, excluding some information that is relevant for the nRF9160 hardware design. Pin no Pin name Description GND_Shield P0.05 P0.06 P0.07 GND_Shield Reserved GND_Shield VDD_GPIO GND_Shield DEC0 P0.08 P0.09 P0.10 P0.11 P0.12 VDD2 P0.13 1 2 3 4 5-9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 v1.2 Function Power GPIO GPIO GPIO Power Power Power Power Power GPIO GPIO Power GPIO GPIO GPIO Power Power GPIO Microshield GND, connect strongly to module GND Can be used to improve mechanical rigidity. Solder to main board but do not Microshield GND, connect strongly to module GND Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level connect electrically. Microshield GND, connect strongly to module GND GPIO power supply input and logic level for GPIOs Module internal power supply decoupling option. Microshield GND, connect strongly to module GND Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level RFFE power supply input. Tie to the same voltage level as VDD1. Digital I/O and analog input, VDD_GPIO level 8 GND_Shield Microshield GND, connect strongly to module GND GND_Shield Microshield GND, connect strongly to module GND Pin no Pin name Function Description nRF9160 module GND_Shield Microshield GND, connect strongly to module GND System reset SoC reset pin GPIO GPIO GPIO Power GPIO GPIO GPIO Power SWD SWD GPIO Power GPIO GPIO GPIO GPIO Power GPIO SIM Power SIM SIM SIM SIM Power Power Reserved Power GPIO GPIO GPIO Power RFFE ctrl RFFE ctrl RFFE ctrl Power RF Power Power RF Power Power RF Power Power P0.14 P0.15 P0.16 P0.17 P0.18 P0.19 GND_Shield nRESET SWDCLK SWDIO P0.20 GND_Shield P0.21 P0.22 P0.23 P0.24 GND_Shield P0.25 SIM_RST GND_Shield SIM_DET SIM_CLK GND_Shield SIM_IO SIM_1V8 GND_Shield Reserved GND_Shield MAGPIO2 MAGPIO1 MAGPIO0 GND_Shield VIO SCLK SDATA GND_Shield ANT GND_Shield GND_Shield AUX GND_Shield GND_Shield GPS GND_Shield GND_Shield Reserved 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Digital I/O and analog input, VDD_GPIO level Digital I/O and analog input, VDD_GPIO level Digital I/O and analog input, VDD_GPIO level Digital I/O and analog input, VDD_GPIO level Digital I/O and analog input, VDD_GPIO level Digital I/O and analog input, VDD_GPIO level Microshield GND, connect strongly to module GND Serial wire debug & programming clock input Serial wire debug & programming interface Digital I/O and analog input, VDD_GPIO level Microshield GND, connect strongly to module GND Digital I/O and trace buffer clock, VDD_GPIO level Digital I/O and trace buffer TRACEDATA[0], VDD_GPIO level Digital I/O and analog input TRACEDATA[1], VDD_GPIO level Digital I/O and analog input TRACEDATA[2], VDD_GPIO level Microshield GND, connect strongly to module GND Digital I/O and analog input TRACEDATA[3], VDD_GPIO level Microshield GND, connect strongly to module GND SIM reset SIM detect SIM clock SIM data Microshield GND, connect strongly to module GND 1.8V power supply output for SIM Microshield GND, connect strongly to module GND connect electrically. Microshield GND, connect strongly to module GND Digital I/O, controllable by APP and MDM, fixed 1.8V Digital I/O, controllable by APP and MDM, fixed 1.8V Digital I/O, controllable by APP and MDM, fixed 1.8V Microshield GND, connect strongly to module GND Digital I/O, MIPI RFFE VIO compatible, fixed 1.8V Digital I/O, MIPI RFFE CLK compatible, fixed 1.8V Digital I/O, MIPI RFFE DATA compatible, fixed 1.8V Microshield GND, connect strongly to module GND Single end 50 LTE antenna port Microshield GND, connect strongly to module GND Microshield GND, connect strongly to module GND Microshield GND, connect strongly to module GND Microshield GND, connect strongly to module GND Single end 50 GPS input port Microshield GND, connect strongly to module GND Microshield GND, connect strongly to module GND connect electrically. connect electrically. Can be used to improve mechanical rigidity. Solder to main board but do not Single end 50 ANT loop-back port, external matching network recommended. Reserved Can be used to improve mechanical rigidity. Solder to main board but do not Reserved Reserved Can be used to improve mechanical rigidity. Solder to main board but do not GND_Shield Power Microshield GND, connect strongly to module GND v1.2 9 nRF9160 module Pin no 73 Pin name Reserved Function Reserved Can be used to improve mechanical rigidity. Solder to main board but do not 74-82 GND_Shield Microshield GND, connect strongly to module GND GND_Shield Microshield GND, connect strongly to module GND Description connect electrically. Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Coexistence interface, VDD_GPIO level Coexistence interface, VDD_GPIO level Coexistence interface, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level Digital I/O, VDD_GPIO level GND_Shield Microshield GND, connect strongly to module GND GND_Shield Microshield GND, connect strongly to module GND GND_Shield Microshield GND, connect strongly to module GND 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 P0.26 P0.27 P0.28 P0.29 P0.30 P0.31 COEX2 COEX1 COEX0 P0.00 P0.01 P0.02 P0.03 P0.04 ENABLE VDD1 VSS Power GPIO GPIO Power GPIO GPIO GPIO GPIO Power GPIO GPIO GPIO Power GPIO GPIO GPIO Power GPIO GPIO Power Power Power Module enable signal. Connect to VDD1 to enable module. SoC power supply input. Must be at same voltage level as VDD2 power supply input for RFFE. Module main GND, connect strongly to application board GND plane. Main thermal exit path from module to application board. 104-127 Reserved Can be used as improvement of mechanical rigidity. Solder to main board but do not connect electrically. Table 1: Pin assignments v1.2 10 4 Antennas The nRF9160 module supports multiple cellular frequency bands as listed in Bands of operation on page 5. As the electrical size of the antenna sets fundamental limits for antenna bandwidth, it is recommended to select an antenna supporting only the operational bands of the final device and optimize the antenna performance at frequencies in question. The smaller the electrical size, the narrower the reachable bandwidth and the lower the radiation efficiency. If wide bandwidth and small physical size is required from the final device, antenna tuners may be advantageous: antenna input matching can be optimized for the frequency of operation at a time. It is also possible to design the antenna to have tunable resonant frequency. Antenna suppliers and design houses provide solutions for size limited antennas. The nRF9160 module provides control for external antenna tuners. For more information, see nWP033 - nRF9160 Antenna and RF Interface Guidelines. Note: The nRF9160 module has been certified only with the antenna solution presented in Reference circuitry on page 17. However, it is possible to use other antenna types and models with nRF9160. Adequate testing and regulator certifications are always required from the final device regardless of antenna selection. 4.1 Antenna interface The nRF9160 module has a single-ended 50 antenna port where the antenna solution shall be connected. nRF9160 is evaluated with a 50 antenna load. To ensure good overall RF performance, antenna impedance and the characteristic impedance of the transmission line (i.e. cable) connecting the antenna and antenna port must be 50 . Impedance mismatch may lead to performance degradation. Maximum antenna VSWR 2:1 is recommended but VSWR 3:1 can still be accepted in the final device. Respective minimum return loss values are 9.5 dB and 6.0 dB. The length of the transmission line from the antenna to the nRF9160 antenna port should be kept as short as possible to minimize losses, as this loss is directly deteriorating the modules transmitted and received power. Additionally, low-loss matching circuit between the antenna and the nRF9160 antenna port is recommended to minimize loss caused by antenna and PCB routing mismatch. Reserving space from device manufacturer's application board for matching components (e.g. -circuit) is recommended. This is because, for example, catalog antennas are typically tuned on reference board and differences to device mechanics may impact antenna impedance. It is also possible that device mechanics change during the development phase of the final device, and these modifications may impact antenna performance. Matching components can be used to compensate the impact of mechanics change to antenna impedance, and thus it may not be mandatory to modify the antenna itself. The nRF9160 module has an internal ESD circuit in the antenna port, but additional ESD components at device manufacturer's application board may be used. The design of the ESD circuit shall be such that the impact on RF frequencies is negligible. Note: ESD filtering may be necessary for some active components that can be used at antenna path. Such components can be, for example, RF switches and antenna tuners. For further ESD requirements, see the RF switch and antenna tuner datasheets. v1.2 11 Antennas 4.2 Antenna port test connector To run conductive RF tests, a test connector nearby the nRF9160 antenna port in the RF transmission line is needed. The 50 impedance requirement applies also to the test connector, and VSWR and insertion loss should be minimal. Regardless of whether the nR9160 antenna port is connected to an actual antenna or test equipment, the load at the nRF9160 antenna should remain as close to 50 as possible. For a test connector, microwave coaxial switch connectors (for example, Murata MM8130-2600) are a good choice for this purpose. For conductive tests, a test cable is plugged in which connects the nRF9160 antenna port to the test equipment instead of the antenna. When the test cable is plugged off, the nRF9160 antenna port is connected to the antenna for real use case or radiated testing. The layout for the connector must be carefully designed to fulfil the 50 requirement. For detailed guidance on this, see the coaxial switch connectors datasheets. v1.2 12 5 Test modes The nRF9160 module is fully calibrated and does not require any calibration in the device manufacturers production. Instead, the manufacturer test should focus on the successful assembly of the module and the correct co-functionality of the peripheral components connected to nRF9160. Device manufacturer testing should focus on items such as the following:

Module is not damaged during handling and assembly All module pins are successfully soldered (connectivity and no shorts) Module functionality in final product Communication to module MCU All interfaces between the module and the peripheral circuits RF performance and antenna connection The primary method to implement these tests is by programming FW on the application MCU that will control the chip during the test. The application MCU programming interface is defined in nRF9160 Product Specification. However, it is also possible to control the device through nRF9160 serial interface by AT commands. It requires flashing appropriate firmware in the nRF9160 exposing AT command API into physical interface. By this method nRF9160 can also be controlled not only in device production phase but also in device manufacturer development phase. For more information, see nWP034 - nRF9160 Hardware Verification Guidelines. Note: For more information about RF performance related test modes and other supported test capabilities, see nRF91 AT Commands Reference Guide. 5.1 BB functional test The nRF9160 programming interface can be used to test the digital interfaces. All GPIO and application MCU peripherals are described in nRF9160 Product Specification and LTE modem related IO interfaces

(MAGPIO, MIPI RFFE, SIM) are accessed through AT commands described in nRF91 AT Commands Reference Guide. 5.2 RF functional test In this document, the focus is on RF test modes and methods. Device testing can be done either as radiated measurement or as conducted test if the device has a RF test connector. In both cases the test can be done with basic RF measurement equipment using the AT test commands that set up the module to test modes bypassing the LTE signaling protocol. The nRF9160 transceiver supports three main test modes for RF performance verification: RX, TX, and GPS SNR test modes. A high level description of each test mode is given in the following sections. Note: To avoid module damage during testing the nRF9160 antenna port must be terminated to either suitable antenna or 50 termination. v1.2 13 Test modes Note: Since the AT test commands enable to emit RF power bypassing the LTE signaling protocol the emission can cause interference. This feature is thus only intended for use in controlled test environments and shall not be used during normal module operation following the instructions in Nordic Semiconductor documentation. 5.2.1 RX test RX ON command enables the RF receiver with the given parameters. It also measures antenna power with a time domain power meter and returns the measurement result. RX OFF command disables RF receiver. RX ON has a total of four input parameters:

Parameter 3GPP band number Range 1 to 66 Description nRF9160 supported bands Frequency 100 kHz raster 6000 to 22000 Corresponds to 600 to 2200 MHz System mode 0 to 1 NB1 = 0, M1 = 1 Signal level at antenna

-127 to -25 Signal generator level at antenna [dBm]

Table 2: RX ON input parameters The response to the test is RX signal power at antenna port measured by DUT given in q8 format. q8 format results can be converted into dBm value by dividing the result by 2^8 (= 256). Figure 3: Example command Test setup Figure 4: RX test setup example v1.2 14 Test modes 5.2.2 TX test TX ON command enables RF transmitter with the given parameters. It also measures TX power with an internal measurement receiver in time domain and returns the measurement result. TX OFF command disables RF transmitter. TX ON has a total of seven input parameters:

Parameter 3GPP band number Range 1 to 66 Description nRF9160 supported bands Frequency 100 kHz raster 6000 to 22000 Corresponds to 600 to 2200 MHz System mode 0 to 1 NB1 = 0, M1 = 1 Signal level at antenna

-50 to +23 TX signal level at antenna port [dBm]

Modulation CW to 16QAM TX signal properties - options available depending RB or SC count 1 to 12 RB or SC start position 0 to 11 on selected system mode TX signal properties - options available depending on selected system mode TX signal properties - options available depending on selected system mode Table 3: TX ON input parameters The response to the test is TX signal power at antenna port measured internally by DUT. The same TX signal power can be measured with external measurement equipment connected to DUT antenna port. Figure 5: Example command Test setup Figure 6: TX test setup example v1.2 15 Test modes 5.2.3 GPS SNR test GPS SNR ON command executes a GPS SNR test. GPS L1 frequency is 1575.42 MHz and this test expects the CW in signal generator to be 1575.750 MHz, i.e. 330 kHz offset from the center frequency. The measurement duration is 1 ms. The test is disabled automatically after 1 ms and dedicated GPS SNR OFF command is not needed. GPS SNR ON has a one input parameter:

Parameter Range Description Signal level at antenna

-127 to -25 Signal generator level at antenna [dBm]

Table 4: GPS SNR ON input parameters The response to the test is GPS SNR value measured by DUT in q4 format. q4 format results can be converted into dB value by dividing the result by 2^4 (= 16). Test setup Figure 7: GPS SNR test setup example 5.3 RF signaling test If full functionality against LTE network is tested in device manufacturing, it is possible to set up a signaling mode test either by live network test or by using a telecommunication tester. The use of test equipment with LTE signaling capability is strongly recommended. If live network is used a network with good coverage and known signal quality is needed. Typically, it is difficult to guarantee live network quality over time and caution is needed in the interpretation of results. Live network signaling mode test is done by setting up a data connection and checking RX signal quality through AT command. v1.2 16 6 Reference circuitry To ensure good RF performance when designing PCBs, it is highly recommended to use the PCB layouts and component values provided by Nordic Semiconductor. Documentation for the different package reference circuits, including Altium Designer files, PCB layout files, and PCB production files can be downloaded from www.nordicsemi.com. Note: In this context reference circuitry illustrates the vehicle (i.e. nRF9160 Development Kit) applicable for the nRF9160 module granted the FCC certifications listed in Supported FCC rules on page 5. The given reference circuity is a valid generic example of an nRF9160 based final device but does not limit the use of nRF9160 in any way. 6.1 Schematics The following figure illustrates the reference schematics of nRF9160 Development Kit. Figure 8: nRF9160 reference schematics 6.2 PCB layout The PCB layout shown in Figure 9: nRF9160 reference layout, metal layer 1 (top) on page 18 and Figure 10: nRF9160 reference layout, metal layer 2 on page 18 are part of the nRF9160 Development Kit reference layout. The figures show the PCB design details of the area where the cellular antenna is located. v1.2 17 Reference circuitry Figure 9: nRF9160 reference layout, metal layer 1 (top) Figure 10: nRF9160 reference layout, metal layer 2 6.3 PCB specification The nRF9160 Development Kit PCB stack-up and layer materials are shown in the following figure:

v1.2 18 Reference circuitry Figure 11: nRF9160 reference PCB (Elprints 4-layer 4001 stack-up) 6.4 Antenna type The antenna used in nRF9160 Development Kit is Ethertronics P822601 shown in the following figure. The antenna is a universal broadband FR4 embedded LTE antenna generally suitable for various cellular applications. Ethertronics Universal Broadband Embedded LTE/LPWA antenna utilizes Isolated Magnetic Dipole (IMD) technology. For further details on the antenna, see the antenna supplier datasheet. v1.2 19 Reference circuitry Figure 12: nRF9160 Development Kit antenna v1.2 20 7 Regulatory information This section contains information on certified bands and FCC/ISED regulatory notices for nRF9160. 7.1 Certified bands The following table shows the FCC and ISED certified LTE-M1 bands for nRF9160. FCC certification ISED certification Band Band 2 Band 4 Band 5 Band 12 Band 13 Band 14 Band 17 Band 25 Band 26 Band 66 Band Band 2 Band 4 Band 5 Band 12 Band 13 Band 17 Band 25 Band 26 Band 66 Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No Yes Yes No Yes Yes Yes Yes Yes Yes Yes Yes No Yes Table 5: FCC and ISED certified LTE-M1 bands The following table shows the FCC and ISED certified LTE-NB1 bands for nRF9160. FCC certification ISED certification Table 6: FCC and ISED certified LTE-NB1 bands For more information about the certified bands and the status of the ongoing certifications, see nRF9160 certifications. v1.2 21 Regulatory information 7.2 FCC/ISED regulatory notices FCC/ISED regulatory notices cover modification and interference statements, wireless and FCC Class B digital device notices, permitted antennas and labeling requirements. Modification statement Nordic Semiconductor has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user's authority to operate the equipment. Nordic Semiconductor n'approuve aucune modification apporte l'appareil par l'utilisateur, quelle qu'en soit la nature. Tout changement ou modification peuvent annuler le droit d'utilisation de l'appareil par l'utilisateur. Interference statement This device complies with Part 15 of the FCC Rules and Industry Canada's licence-exempt RSS standards. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Le prsent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorise aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement. Wireless notice This equipment complies with FCC and ISED radiation exposure limits set forth for an uncontrolled environment. The antenna should be installed and operated with minimum distance of 20 cm between the radiator and your body. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Cet appareil est conforme aux limites d'exposition aux rayonnements de lISDE pour un environnement non contrl. L'antenne doit tre installe de faon garder une distance minimale de 20 centimtres entre la source de rayonnements et votre corps. L'metteur ne doit pas tre colocalis ni fonctionner conjointement avec autre antenne ou autre metteur. Permitted antenna This radio transmitter has been approved by FCC and ISED to operate with the antenna types listed below with the maximum permissible gain indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. v1.2 22 Band Band 2 Band 4 Band 5 Band 12 Band 13 Band 14 Band 17 Band 25 Band 26 Band 66 Bande Bande 2 Bande 4 Bande 5 Bande 12 Bande 13 Bande 14 Bande 17 Bande 25 Bande 26 Bande 66 Regulatory information Max gain 9.0 dBi 6.0 dBi 7.1 dBi 6.6 dBi 6.9 dBi 6.9 dBi 6.6 dBi 9.0 dBi 7.0 dBi 6.0 dBi 9.0 dBi 6.0 dBi 7.1 dBi 6.6 dBi 6.9 dBi 6.9 dBi 6.6 dBi 9.0 dBi 7.0 dBi 6.0 dBi Gain maximal Le prsent metteur radio a t approuv par ISDE pour fonctionner avec les types d'antenne numrs ci dessous et ayant un gain admissible maximal. Les types d'antenne non inclus dans cette liste, et dont le gain est suprieur au gain maximal indiqu, sont strictement interdits pour l'exploitation de l'metteur. FCC Class B digital device notice This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected v1.2 23 Regulatory information Consult the dealer or an experienced radio/TV technician for help CAN ICES-3 (B)/NMB-3 (B) This Class B digital apparatus complies with Canadian ICES-003. Cet appareil numrique de classe B est conforme la norme canadienne ICES-003. Labeling requirements for the host device The host device shall be properly labelled to identify the modules within the host device. The certification label of the module shall be clearly visible at all times when installed in the host device, otherwise the host device must be labelled to display the FCC ID and IC of the module, preceded by the words "Contains transmitter module", or the word "Contains", or similar wording expressing the same meaning, as follows:

Contains FCC ID: 2ANPO00NRF9160 Contains IC: 24529-NRF9160 L'quipement hte doit tre correctement tiquet pour identifier les modules dans l'quipement. L'tiquette de certification du module doit tre clairement visible en tout temps lorsqu'il est install dans l'hte, l'quipement hte doit tre tiquet pour afficher le FCC ID et IC du module, prcd des mots "Contient le module metteur", ou le mot "Contient", ou un libell similaire exprimant la mme signification, comme suit:

Contient FCC ID: 2ANPO00NRF9160 Contient IC: 24529-NRF9160 v1.2 24 Legal notices By using this documentation you agree to our terms and conditions of use. Nordic Semiconductor may change these terms and conditions at any time without notice. Liability disclaimer Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability, function, or design. Nordic Semiconductor ASA does not assume any liability arising out of the application or use of any product or circuits described herein. Nordic Semiconductor ASA does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. If there are any discrepancies, ambiguities or conflicts in Nordic Semiconductors documentation, the Product Specification prevails. Nordic Semiconductor ASA reserves the right to make corrections, enhancements, and other changes to this document without notice. Life support applications Nordic Semiconductor products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Nordic Semiconductor ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such improper use or sale. RoHS and REACH statement Complete hazardous substance reports, material composition reports and latest version of Nordic's REACH statement can be found on our website www.nordicsemi.com. All trademarks, service marks, trade names, product names, and logos appearing in this documentation are the property of their respective owners. Trademarks Copyright notice 2020 Nordic Semiconductor ASA. All rights are reserved. Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder. v1.2 25

nRF9160 Hardware Design Guidelines nWP-037 White Paper 4418_1414 / 2022-09-27 Contents Revision history. 1 Introduction. 2 Related documentation. 3 Design overview. 3.1 Operating conditions . 3.1.1 Temperature range . 3.1.2 Voltage range . 3.1.3 Physical characteristics . 3.1.4 Supported cellular bands . 3.2 Pinout . 3.2.1 Pin assignments . 3.2.2 Pin description . 3.3 Schematic design . 4 Hardware integration. 4.1 VSS . 4.2 GND_Shield . 4.3 ENABLE . 4.4 VDD1 and VDD2 . 4.3.1 PCB layout design . 4.4.1 PCB layout design . 4.4.2 VDD current consumption . 4.4.3 LTE-M and LTE-NB . 4.5.1 PCB layout design . 4.6 GPIOs P0.00P0.31 . 4.5 VDD_GPIO . 4.6.1 Features . 4.6.2 PCB layout design . 4.7 DEC0 . 4.8 nRESET . 4.9 SWD . 4.10 UICC . 4.11 MAGPIO . 4.12 MIPI RF front-end . 4.10.1 Features . 4.10.2 PCB layout design . 4.12.1 PCB layout design . 4.13.1 PCB layout design . 4.14.1 PCB layout design . 4.15.1 PCB layout design . 4.16.1 Features . 4.16.2 PCB layout design . 4.17 Reserved . 4.16 COEX . 4.14 AUX . 4.13 ANT . 4.15 GPS . 4418_1414 ii iv

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. Glossary . 31 Legal notices. 33 4418_1414 iii Revision history Date 2022-09-27 Description Added External flash memory requirements on page 28 Editorial changes September 2020 First release 4418_1414 iv 1 Introduction This document provides guidelines for the hardware design and integration of nRF9160. These guidelines will help to ensure the best electrical, mechanical, and thermal performance of nRF9160. The guidelines are intended for Nordic Semiconductors customers, especially system integrators and hardware engineers. 4418_1414 5 2 Related documentation In addition to the information in this document, you may need to consult other documents. Information related to the integration of nRF9160 is provided in the following documents:

nRF9160 Product Specification nWP033 - nRF9160 Antenna and RF Interface Guidelines nWP034 - nRF9160 Hardware Verification Guidelines nRF91 AT Commands Reference Guide 4418_1414 6 3 Design overview This section provides an overview of the operating conditions of nRF9160 and a pinout with a description of each pin. Recommended baseline schematics are also provided illustrating a good starting point for the integration of nRF9160. 3.1 Operating conditions This section describes the operating conditions that impact the performance and behavior of nRF9160. 3.1.1 Temperature range The optimal operating case temperature (Tc) of nRF9160 ranges from 30C to 65C, achieving the best RF performance including output power transmission and receiver sensitivity. nRF9160 remains 3GPP compliant in case temperatures that range from 40C to 85C. Case temperature is typically the main cause for degradation in RF performance and current consumption, but other factors, such as supply voltage and signaling parameters, may contribute to it as well. Case temperature is affected by the ambient temperature combined with nRF9160's internal thermal dissipation originating from the LTE modem and application processor's activity. 3.1.1.1 Thermal protection nRF9160 has a built-in thermal protection mechanism to prevent RF Power Amplifier (PA) from breaking and the LTE modem from operating beyond the specified temperature range. When the internal temperature sensor in nRF9160 measures a case temperature of approximately 90C, the LTE modem and Global Positioning System (GPS) receiver are deactivated to minimize the internal generation of heat and to protect RF PA. When the sensor measures a temperature that is lower than approximately 90C, the LTE modem is reactivated. Using the application processor is not limited by the thermal protection mechanism. For more information on thermal protection, see Internal temperature %XTEMP in nRF91 AT Commands Reference Guide. 3.1.2 Voltage range The operational voltage of nRF9160 ranges from 3.0 V to 5.5 V. The modem transceiver requires a minimum voltage of 3.3 V to fulfill RF performance in the environmental conditions described in nRF9160 Product Specification. The RF performance and environmental specification described in nRF9160 Product Specification exceed the equivalent requirements in the 3GPP specification. Therefore, nRF9160 is 3GPP compliant with supply voltage down to 3.1 V. Note: Minimum voltage includes all voltage drops, ripple, and spikes. 3.1.3 Physical characteristics The physical dimensions of nRF9160 are 16.0 x 10.5 x 1.0 mm. It has a plastic compound mold and integrated metallization to suppress internal radiated emissions and protect against external radio interference. 4418_1414 7 Design overview 3.1.4 Supported cellular bands A list of certified cellular bands can be found in nRF9160 certifications. 3.2 Pinout This section describes the physical pin mapping and functions of the pins in nRF9160. 3.2.1 Pin assignments The nRF9160 pinout has 127 pins. The pin assignment of nRF9160 is shown in the following figure:

For more information, see nRF9160 Product Specification. Figure 1: nRF9160 pin assignment 3.2.2 Pin description Each nRF9160 pin has specified functions and design recommendations. The detailed design recommendations are provided in Hardware integration on page 15. The following table describes the functions of the nRF9160 pins. 4418_1414 8 Design overview Description Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O, VDD_GPIO level. Pin no Pin name 1 2 3 4 GND_Shield P0.05 P0.06 P0.07 Function Power General-Purpose Input/Output

(GPIO) 59 GND_Shield Power Microshield ground. Connect to VSS (pin 103) and application board ground. Connect thermally and mechanically to the application board, but leave electrically unconnected. Microshield ground. Connect to VSS (pin 103) and application board ground. GPIO power supply input and logic level for GPIOs. nRF9160-internal supply capacitor connection. Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O, VDD_GPIO level. Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O, VDD_GPIO level. Microshield ground. Connect to VSS (pin 103) and application board ground. nRF9160's PA PMU supply input. Must be at the same voltage level as VDD1 (pin 102) supply for the System on Chip (SoC). GPIO Digital I/O and analog input, VDD_GPIO level. Power GPIO Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O and analog input, VDD_GPIO level. 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Reserved GND_Shield Power VDD_GPIO DEC0 GND_Shield P0.08 P0.09 GND_Shield P0.10 P0.11 P0.12 GPIO Power GPIO GND_Shield Power VDD2 P0.13 P0.14 P0.15 P0.16 GND_Shield P0.17 P0.18 P0.19 GND_Shield Power Microshield ground. Connect to VSS (pin 103) and application board ground. 4418_1414 9 Pin no Pin name Function Description Design overview System reset SoC reset. Serial Wire Debug

(SWD) SWD and programming clock input. SWD and programming interface. nRESET SWDCLK SWDIO P0.20 GND_Shield P0.21 P0.22 P0.23 P0.24 GND_Shield P0.25 SIM_RST GND_Shield SIM_DET SIM_CLK GND_Shield SIM_IO SIM_1V8 GPIO Power GPIO Power GPIO Subscriber Identity Module (SIM) Power SIM Power SIM GND_Shield Power Reserved Reserved Power GPIO GND_Shield MAGPIO2 MAGPIO1 MAGPIO0 Digital I/O and analog input, VDD_GPIO level. Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O and trace buffer clock, VDD_GPIO level. Digital I/O, VDD_GPIO level. Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O, VDD_GPIO level. SIM reset. Microshield ground. Connect to VSS (pin 103) and application board ground. SIM detect (currently not a supported feature). SIM clock. Microshield ground. Connect to VSS (pin 103) and application board ground. SIM data. SIM card's 1.8 V power supply output. Microshield ground. Connect to VSS (pin 103) and application board ground. Connect thermally and mechanically to the application board but leave electrically unconnected. Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O. Controllable by application processor and LTE modem, fixed 1.8 V. GND_Shield Power Microshield ground. Connect to VSS (pin 103) and application board ground. VIO SCLK RFFE ctrl Digital I/O. MIPI RF Front-End Control Interface

(RFFE) VIO compatible, fixed 1.8 V. Digital I/O. RFFE CLK compatible, fixed 1.8 V. 4418_1414 10 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 Design overview Pin no Pin name Function Description 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 SDATA GND_Shield ANT GND_Shield GND_Shield AUX GND_Shield GND_Shield GPS GND_Shield GND_Shield Reserved Reserved Power RF Power RF Power RF Power Digital I/O. RFFE DATA compatible, fixed 1.8 V. Microshield ground. Connect to VSS (pin 103) and application board ground. Cellular antenna port, 50 . Microshield ground. Connect to VSS (pin 103) and application board ground. Loopback port for cellular antenna. A matching network external to the module is recommended. Microshield ground, connect to VSS (pin 103) and application board ground. GPS receiver antenna port, 50 . Microshield ground. Connect to VSS (pin 103) and application board ground. Reserved Connect thermally and mechanically to the application board but leave electrically unconnected. GND_Shield Power Microshield ground. Connect to VSS (pin 103) and application board ground. Reserved Reserved Connect thermally or mechanically to the application board but leave electrically unconnected. 7482 GND_Shield Power Microshield ground. Connect to VSS (pin 103) and application board ground. 83 84 85 86 87 88 89 90 91 92 93 94 GPIO Power GPIO Power GPIO P0.26 P0.27 GND_Shield P0.28 P0.29 P0.30 P0.31 GND_Shield COEX2 COEX1 COEX0 Digital I/O, VDD_GPIO level. Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O, VDD_GPIO level. Microshield ground. Connect to VSS (pin 103) and application board ground. Controlled by modem. GND_Shield Power Microshield ground. Connect to VSS (pin 103) and application board ground. 4418_1414 11 Pin no Pin name 95 96 97 98 99 100 101 102 103 P0.00 P0.01 P0.02 GND_Shield P0.03 P0.04 ENABLE VDD1 VSS Power GPIO Control Power 104127 Reserved Reserved Design overview Function GPIO Description Digital I/O, VDD_GPIO level. Microshield ground. Connect to VSS (pin 103) and application board ground. Digital I/O, VDD_GPIO level. Digital I/O, VDD_GPIO level.

< 0.4 V disable, > 0.8 x VDD1 enable. nRF9160 SoC PMU supply input. Must be at the same voltage level as VDD2's (pin 22) supply for PA. nRF9160 ground plane. Ensure the connection to the application board ground is solid for good electrical, thermal, and mechanical robustness performance. Connect thermally and mechanically to the application board but leave electrically unconnected. Table 1: Pin assignments 3.3 Schematic design The schematic design should start from the most important nRF9160 interfaces which are the supplies and radio frequency interfaces. The SIM and control interfaces should also be prioritized, as they may require special application components, for example, for Electrostatic Discharge (ESD) protection. The following figure shows recommendations that can be used as the basis of the applications schematic design. 4418_1414 12 Design overview Figure 2: nRF9160 application design recommendations The following table provides information on recommended components:

4418_1414 13 Reference Description Quality Example part number Design overview CAP, 15 pF, 25 V, C0G, 0201 X5R, 10 V or better GJM0335C1E150JB01 CAP, 100 nF, 10 V, X5R, 0201 CAP, 47 uF, 10 V, X5R, 0805 CAP, 100 nF, 10 V, X5R, 0201 CAP, 4.7uF, 10V, X5R, 0402 CAP, 15 pF, 25V, C0G, 0201 CAP, 100 nF, 10 V, X5R, 0201 CAP, 47 uF, 10 V, X5R, 0805 CAP, 100 nF, 10 V, X5R, 0201 Optional. Not recommended to be assembled by default. GRM033R61A104KE15 GRM21BR61A476ME15 GRM033R61A104KE15 GRM155R61A475MEAA GJM0335C1E150JB01 GRM033R61A104KE15 GRM21BR61A476ME15 GRM033R61A104KE15 GJM0335C1E100JB01 GRM033R61A104KE15 High-Q components, for example, Murata LQW15AN series inductors and GJM1555C1 series capacitors 10 k resistor NA Resistor in the range of 1 k RC0201FR-0710KL RC0201FR-071KL R/L/C Antenna matching C1 C2 C3 C5 C6 C7 C8 C9 C10 C12 C13 C141 C151 C162 L/C R1 R2 R3 R4 Table 2: nRF9160 application component recommendations 1CAP, 10 pF, 5%, 25 V, C0G, 0201 2CAP, 100 nF, 10 V, X5R, 0201 For recommended matching component values and topology, see the datasheets of the LTE and GPS antennas. For more information on the antenna design and interface, see nWP033 - nRF9160 Antenna and RF Interface Guidelines. 4418_1414 14 4 Hardware integration This section provides design recommendations and layout guidelines for each nRF9160 pin for a successful integration of nRF9160. 4.1 VSS VSS (pin 103) is the main electrical ground connection between nRF9160 and the application board. It is also the main thermal dissipation path from nRF9160 and the main mechanical connection. The connection between VSS and the application board must be electrically, thermally, and mechanically strong. It is recommended that the application board Printed Circuit Board (PCB)'s ground planes around nRF9160 are as intact and as solid as possible. Use as many ground vias as possible between the top metal layer of the application board and the inner ground layers connected to nRF9160's VSS pins. Typically, metal filled vias provide the best thermal conductivity. 4.2 GND_Shield The following ground pins are dedicated for the embedded microshield: 1, 59, 11, 14, 17, 21, 27, 31, 36, 41, 44, 47, 50, 52, 56, 60, 62, 63, 65, 66, 68, 69, 72, 7482, 85, 90, 94, and 98. Connect GND_Shield electrically strongly to VSS (pin 103) and on the application board to the same ground planes as VSS. 4.3 ENABLE ENABLE (pin 101) is a high-impedance control pin for the nRF9160-internal PMU. It is used to enable and disable nRF9160. Logic high (> 0.8 x VDD1) enables nRF9160. The start delay is in the range of a few milliseconds from pulling the ENABLE pin high. Logic low (< 0.4 V) disables nRF9160 and brings it into extremely low current consumption. In products where nRF9160 is always enabled, the ENABLE pin can be connected to VDD1 (pin 102) on the application board with a series resistor. The series resistor minimizes digital noise coupling between the VDD1 and ENABLE pins. It is recommended to add a decoupling capacitor to the ENABLE pin. If ENABLE is connected to VDD1, a shared capacitor can be used for the ENABLE and VDD1 pins if the VDD1 decoupling capacitor is located close to the VDD1 and ENABLE pins. 4.3.1 PCB layout design When designing the PCB layout, pin-specific recommendations should be followed. The ENABLE pin has the following recommendations:

Place R1 close to the ENABLE pin. If ENABLE is directly connected to VDD1, it can use a shared decoupling capacitor with VDD1 if VDD1's decoupling capacitors and ENABLE are located close to each other. If ENABLE is not directly connected to VDD1, a dedicated decoupling capacitor is recommended to be added to the ENABLE pin. Because ENABLE can carry noise from internal and external regulators and the power source, it is not recommended to be routed parallel to sensitive routings, such as RF. 4418_1414 15 Hardware integration Avoid routing the Enable signal unshielded on the top and bottom metal layers of the PCB. This risks radiated noise that can deteriorate radiated GPS and LTE sensitivity. 4.4 VDD1 and VDD2 Power supply design is one of the main factors in achieving good RF performance, low current consumption, and reliable behavior of a product over its life time in various conditions. VDD1 (pin 102) and VDD2 (pin 22) are the main power supply inputs for nRF9160 and form the combined VDD. VDD1 is connected to the DC converter input of the nRF9160-internal PMU that supplies the SoC. VDD2 is connected to the DC converter input of the nRF9160-internal PMU that supplies the RF PA. The operational voltage of VDD1 and VDD2 ranges from 3.0 V to 5.5 V. To comply with the RF performance specifications in Electrical specification in nRF9160 Product Specification, the inbuilt LTE modem transceiver is not recommended to be used below 3.3 V, even though nRF9160 can operate down to 3.0 V. To ensure the operation described in nRF9160 Product Specification, prevent voltage drops, ripple, and spurious below 3.3 V in VDD. Voltage drop is most likely to occur during LTE transmit. This is due to peaks of up to 500 mA/3.3 V happening during VDD2 current consumption. VDD must not drop below 3.0 V during any nRF9160 operation. To minimize supply voltage ripple and suppress EMI coupling to/

from nRF9160, it is recommended to place low ESR capacitors close to the VDD1 and VDD2 pins. Supply capacitors of low ESR (<0.1 ) are recommended. To improve power delivery, voltage ripple, and EMI performance, it is recommended to have at least one low ESR supply capacitor C3 in VDD1 and C10 in VDD2. Placing ferrite bead FB1 at VDD1 is highly recommended. To further improve filtering for high-frequency components, you can optionally add C2 and C1 to VDD1 or C9 and C8 to VDD2. The electrical values for C2 and C9 may vary depending on the application, but for C1, the recommended range is from 1 nF to 470 nF, and for C8, it is from 10 pF to 100 pF. For VDD_GPIO, the minimum recommendation is low ESR supply capacitor C6. Filtering for high-

frequency components can be improved by adding C5 in the range of 1 nF to 470 nF. To improve the supply network's EMI performance, a series three terminal filter capacitor can be added close to the battery. For example, Murata NFM15PC can be used. The filter capacitor attenuates unwanted noise generated at wide frequency range approximately from 10 MHz to 3 GHz. Note: VDD1 and VDD2 must be connected to the same supply voltage. 4.4.1 PCB layout design When designing the PCB layout, pin-specific recommendations should be followed. The VDD1 and VDD2 pins have the following recommendations:

Place low DCR (<0.1 ) ferrite bead FB1 closest to the VDD1 pin to suppress noise from nRF9160. Place capacitors C4 (C11) and C3 (C10) close to the VDD pins for improved power delivery. Place capacitors C1 (C8) and C2 (C9) close to the VDD pins to filter high-frequency signal components, especially if the product integrates an internal LTE or GPS antenna. Connect capacitors to the same ground plane as nRF9160 (pin 103) using low impedance ground connections. Use wide enough tracks (DCR <0.1 ) for VDD routing to minimize voltage drops and unwanted power consumption coming from routing losses under high current conditions. Avoid supply routings close or adjacent to sensitive routings, such as RF. Use shielded PCB layers for routings whenever possible to minimize radiated noise. Use plenty of ground vias along supply routings to minimize unwanted voltage differences in the application PCB's metal layers. 4418_1414 16 Hardware integration A series solder bridge is recommended in the VDD routing for current consumption measurements or other diagnostic purposes. Note: Short low impedance ground connections are mandatory for all supply capacitors. 4.4.2 VDD current consumption During operation, nRF9160 current consumption depends significantly on the LTE network, end product's antenna design, temperature, battery voltage, and the intensity of the LTE uplink data transmit. Although the typical current consumption of nRF9160 can be very low, the power supply and system must be designed to meet the demands of the potential worst-case level of current consumption. The worst-case level of current consumption depends, among other things, on the following:

The temperature range for which the end product is certified. The cut-off voltage of the end product's power supply. The antenna impedance mismatch behavior when the end product is placed on a metal surface or covered by the user's hand. The current consumption figures related to hardware design are given in Modem current consumption in nRF9160 Product Specification:

Radio resource control (RRC) current consumption figures equal to average current consumption over radio frame (10 ms) with up and downlink data transmission in nominal operating conditions. Peak current consumption figures in nominal operating conditions equal to average current consumption during uplink transmission in nominal operating conditions. Peak current consumption figures in extreme operating conditions equal to average current consumption during uplink transmission in extreme operating conditions. This means Tc >65C and antenna mismatch of VSWR3:1. In the design of the end product's supply, this is the most stringent target to comply with. 4.4.3 LTE-M and LTE-NB HD-FDD LTE-M and HD-FDD LTE-NB have different uplink ratios over radio frame and maximum continuous uplink durations. Both systems are based on a 10 ms radio frame consisting of 10 subframes (SF), 1 ms each. In normal network signaling conditions without uplink repetitions, the number of continuous uplink and downlink subframes may differ noticeably between the systems. In HD-FDD LTE-M, the maximum uplink ratio can be 3 SF/10 SF (33%), whereas in HD-FDD LTE-NB it can be 8 SF/10 SF (80%). This means that in HD-FDD LTE-NB, the uplink can be transmitting approximately three times longer per radio frame than in HD-FDD LTE-M. However, with uplink repetitions, both systems share the same uplink ratio of 86%. Power consumption at high output power levels for HD-FDD LTE-M is approximately 15% higher than HD-FF LTE-NB. Power supply design requirements are the most rigid for LTE-M. Note: The end product's power supply and thermal design must comply with the worst-case consumption level. This prevents nRF9160 from occasionally resetting which generates extra current consumption. It also helps reduce overhead in the LTE network connection. Too much overhead could cause the network operator to block the end product from the network. 4.5 VDD_GPIO VDD_GPIO (pin 12) is the supply for application GPIOs P0.00P0.31 and the COEX interface (pins 9193) that is provided externally. 4418_1414 17 Hardware integration The operating voltage of VDD_GPIO ranges from 1.8 to 3.6 V and is independent of the VDD supply. The GPIOs have software-configurable drive modes. In standard drive mode, pin sink and source currents are approximately 0.5 mA. In high drive mode, pin currents are 3 to 5 mA. The standard drive mode is operational over the voltage range of 1.8 to 3.6 V. High drive mode is operational over the voltage range of 1.8 to 3.6 V, but 5 mA drive current requires VDD_GPIO voltage of 2.7 V. Standard drive is recommended because lower current results in better EMI performance and interoperability with other application board peripherals. With standard drive, the end product's performance regarding items, such as LTE radiated spurious emissions and LTE receiver radiated sensitivity, is typically somewhat better than with high drive. Unlike the current consumption of VDD, VDD_GPIO's current consumption is mostly controlled by the end product design. This is because VDD_GPIO supplies the application GPIOs which are controlled by the application software provided by the integrator. If the GPIOs are not significantly stressed in the device, VDD_GPIO can have a simple power supply strategy. However, if the end product has high momentary current draw from the GPIOs, VDD_GPIO's capability must be designed to comply with it. In the worst case, the momentary concurrent current consumption of all GPIOs should not peak higher than approximately 100 mA. Regardless of the VDD_GPIO's supply capability, it is not recommended to have long periods of high concurrent consumption because it increases the risk of reducing the device's lifetime. Recommended VDD_GPIO decoupling capacitors are shown in Table 2: nRF9160 application component recommendations on page 14. The following restrictions apply to the VDD_GPIO pin:

VDD_GPIO should be applied after VDD has been supplied. VDD_GPIO should be removed before removing VDD. If VDD is supplied and VDD_GPIO is grounded, extra current consumption can be generated on VDD. If the ENABLE pin is low, VDD_GPIO should also be low. 4.5.1 PCB layout design When designing the PCB layout, pin-specific recommendations should be followed. The VDD_GPIO pin has the following recommendations:

Place capacitors C5 and C6 close to the VDD_GPIO pin for good power delivery. Use a track that is wide enough (DCR <0.1 ) for VDD_GPIO routing to minimize voltage drops and unwanted power consumption due to routing losses under high current conditions. Connect capacitors to the same ground plane as nRF9160 (pin 103) using low impedance ground connections. Avoid supply routings close or adjacent to sensitive routings, such as RF. Use shielded PCB layers for routings whenever possible to minimize radiated noise. Use plenty of ground vias along supply routings to minimize unwanted voltage differences in the application PCB's metal layers. A series solder bridge is recommended in the VDD routing for current consumption measurements or other diagnostic purposes. 4.6 GPIOs P0.00P0.31 The application GPIO pins (24, 15, 16, 1820, 2326, 2830, 35, 3740, 42, 83, 84, 8689, 9597, 99, and 100) are used for interfacing and communicating with application peripherals like sensors, Integrated Circuit (IC)s, external memories, buttons, and LEDs. GPIOs are powered from VDD_GPIO. They have the same voltage level as VDD_GPIO and any unwanted noise or spurious that VDD_GPIO may contain. Therefore, it is important to have proper noise filtering in 4418_1414 18 Hardware integration VDD_GPIO (pin 12). It is also important for each individual GPIO pin to meet the filtering requirements specified for the peripherals connected to them. To avoid digital noise generated by the GPIOs, fast transients should be avoided. It is recommended to use the slowest possible rise times that the peripherals connected to the GPIOs allow. To reduce transient currents, series resistors or ferrite beads can be used on the GPIO lines. For GPIOs, resistors in the range of 100 to 1 k can be considered as they are low current digital controls. Optimal resistor values depend mainly on the connected peripheral drive currents and communication speed or other application-level requirements. In addition to the series resistor, bypass capacitors in the range of a few pF can be considered. They may help to reduce RF coupling to the GPIO lines. Unused GPIOs can be left electrically unconnected, but it is recommended to solder them to the application board for improved thermal and mechanical performance. Note: Additional capacitance increases GPIO loading and noise originated from GPIO toggling. Note: It is not recommended to use high voltage, high drive GPIO outputs with high frequency and high capacitance loads unless specifically needed, because it may increase the noise level and affect the performance of the GPS and LTE radio receivers. 4.6.1 Features The GPIOs have user-configurable features. The features are provided in the following list:

Configurable output drive strength Internal pull-up and pull-down resistors Wake-up from high- or low-level triggers on all pins Trigger interrupt on state changes on any pin All pins can be used by the Programmable Peripheral Interconnect (PPI) task/event system One or more GPIO output can be controlled through PPI and GPIOTE channels All pins can be individually mapped to interface blocks for layout's flexibility GPIO state changes captured on SENSE signal can be stored by LATCH register Support for secure and non-secure attributes for pins in conjunction with the system protection unit For more information on GPIO feature support, see GPIO - General purpose input/output in nRF9160 Product Specification. 4.6.2 PCB layout design When designing the PCB layout, pin-specific recommendations should be followed. The GPIO pins have the following recommendations:

Place filtering series resistors close to the respective GPIO pins. Place capacitors close to the origin of noise and ground them to same ground plane as VSS on nRF9160. Avoid parallel routing of GPIOs close to sensitive RF routings due to the risk of noise decoupling from GPIO to RF routing. Avoid parallel routings of GPIOs close to supply or RF routings due to the risk of noise decoupling from other routings to the GPIO routings. Use shielded PCB layers for GPIO routings whenever possible to minimize radiated noise. Follow the instructions in the peripheral datasheets. 4418_1414 19 Hardware integration 4.7 DEC0 DEC0 (pin 13) is an nRF9160-internal power management unit (PMU) output pin for an external decoupling capacitor. An external capacitor improves the stability of the internal supply. The voltage level of DEC0 is approximately 2.2 V. The recommended capacitor value is provided in Table 2: nRF9160 application component recommendations on page 14. In the PCB layout, place C7 close to the DEC0 pin and connect the ground capacitor to the same ground plane as nRF9160 VSS (pin 103). 4.8 nRESET nRESET (pin 32) is a dedicated SoC reset pin. A SoC reset is generated when the nRESET pin is pulled low and released. To ensure that the reset is issued correctly, the reset pin should be held low for a few microseconds. The nRESET pin has a 13 k internal pull-up resistor that is always on and connected to the nRF9160 internal voltage of 2.2 V. The nRESET pin can be connected to an external controller or mechanical switch that is controlled by the user. It is recommended to add a bypass capacitor and series resistor in the range of 1 k to the nRESET routing close to the nRESET pin. For more information on pin reset, see Reset in nRF9160 Product Specification. Note:

External pull-up is not allowed in the nRESET pin. External filtering components affect the minimum pulse length. 4.9 SWD The SWD interface provides a non-intrusive mechanism for debugging and tracing nRF9160. It can also be used for programming the firmware and accessing registers. The SWD interface consists of SWDCLK (pin 33) and SWDIO (pin 34). The SWDCLK pin provides clock signal, and SWDIO provides data. The SWDIO pin has an internal pull-up resistor whereas the SWDCLK pin has an internal pull-down resistor. The SWD interface's logic high level originates from the DEC0 level, which is approximately 2.2 V. For more information on the SWD interface, see Debug and trace in nRF9160 Product Specification and nWP034 - nRF9160 Hardware Verification Guidelines. 4.10 UICC The Universal Integrated Circuit Card (UICC) interface is also known as the Universal Subscriber Identity Module (USIM) or SIM interface. It consists of SIM_RST (pin 43), SIM_DET (pin 45), SIM_CLK (pin 46), SIM_IO (pin 48), and SIM_1V8 (pin 49). nRF9160 supports UICC Class C interface with 1.8 V nominal voltage as described in ETSI TS102 221. If needed, support for higher supply voltage classes must be built with external components, including an external power supply and level shifters towards the UICC interface of the LTE modem. The LTE modem controls the following physical interfaces towards the UICC and implements the transport protocol over the ISO/IEC 7816-3 interface:

4418_1414 20 Hardware integration SIM_1V8 (power supply): Output from LTE modem SIM_CLK (clock signal): Output from LTE modem SIM_RST (reset signal): Output from LTE modem SIM_I/O (input/output serial data): Bi-directional SIM_DET (reserved for card detection, not in use) 4.10.1 Features If the device has a user-accessible slot for a UICC card, ESD sensitivity should be considered. The nRF9160-

internal ESD protection is intended for a 1.5 kV Human Body Model (HBM) level. External ESD/EMI filtering is recommended between the UICC card slot and nRF9160. Several ESD/EMI filtering options are available. A commonly used option is a dedicated integrated component, such as STM EMIF03-SIM02M8, TI TPD3F303, or OnSemi CM1402. Typically, an integrated ESD filter consists of lowpass filters and ESD diodes in a small SMD package. Another option is discrete ESD protection which takes more space on the PCB, but can be more flexible for certain applications and a lower-cost solution. Discrete ESD protection can consist of the following components:

Bypass capacitors in the range of 22 pF to SIM_RST, SIM_DET, SIM_CLK, SIM_IO, and SIM_1V8. A separate supply capacitor ranging from 100 nF to 220 nF connected to SIM_1V8 can be considered. Low capacitance type ESD diodes to SIM_RST, SIM_DET, SIM_CLK, SIM_IO, and SIM_1V8. Multichannel ESD diodes are commonly used and recommended. Some multichannel diode components incorporate EMI filtering. This type is recommended if the product integrates an LTE antenna, or an external antenna is located close to the SIM holder. The electrical specifications for all UICC signals that should be verified in product design and in the prototyping phase are defined in ETSI TS 102 221, chapter Electrical specifications of the UICC. For more information, see nWP034 - nRF9160 Hardware Verification Guidelines. 4.10.2 PCB layout design When designing the PCB layout, interface-specific recommendations should be followed. The UICC interface has the following recommendations:

If the product integrates a GPS or LTE antenna, avoid placing the SIM holder close to the antenna due to the risk of digital noise coupling from the SIM application to the antenna. Place the UICC application as close to nRF9160 as possible to minimize the routing length. Long routing reduces signal integrity in the UICC interface and increases the risk of radiated noise. Use the same application board ground plane for the UICC application and nRF9160's VSS to guarantee low impedance ground connection between nRF9160 and the UICC application. Avoid routing the UICC interface close or adjacent to sensitive RF routings, such as GPS or ANT. Place the ESD and EMI components or discrete components as close as possible to the UICC application's pins SIM_RST, SIM_CLK, SIM_IO, and SIM_1V8 to optimize their performance. Consider test points in SIM_RST, SIM_CLK, and SIM_IO for debugging purposes. 4.11 MAGPIO The MAGPIO interface consists of digital 1.8 V I/O pins 5355 that can be controlled by the LTE modem and nRF9160 application processor. 4418_1414 21 Hardware integration When controlled by the LTE modem, MAGPIO timing is aligned with the LTE protocol, which enables LTE protocol synchronous control for nRF9160-external components, such as the antenna tuner. For more information, see LTE modem RF control external interface in nRF9160 Product Specification. 4.12 MIPI RF front-end MIPI RFFE is a dedicated RF front-end component control interface. It consists of VIO (pin 57), SCLK (pin 58), and SDATA (pin 59). VIO is a 1.8 V supply for the MIPI controller, SCLK is the clock for the controller, and SDATA is for the control data. The RFFE interface is aligned with the LTE protocol, which enables LTE protocol synchronous control for nRF9160-external components, such as an antenna tuner. nRF9160 supports RFFE v1.1 with the following exceptions:

SCLK is fixed rate 19.2 MHz. Only one RFFE component is supported at a time. The VIO voltage may be high at any time when nRF9160 is active, not only when external RFFE components are used. The capacitive load of SCLK and SDATA must not exceed 15 pF on the application board. For noise filtering and diagnostic purposes, it is recommended to add series resistors to SCLK (R3) and SDATA (R4). In addition to the series resistor, bypass capacitors (C14, C15, and C16) in the range of few pF can be considered. They may help to reduce RF coupling to the RFFE lines. Additional capacitance increases the RFFE load and potentially deteriorates signal integrity. By default, it is not recommended to assemble capacitors C14, C15, and C16. Note: VIO should be assumed to be high when the LTE modem is active. Therefore, an external RFFE component should not have excessive current leakage at VIO in any conditions. Typically, VIO consumption or leakage in RFFE components is very low, but it is recommended to be verified from the component datasheet. External RFFE components must withstand a situation where VIO is high, but VDD low. Typically, this is acceptable, but some RFFE components may be more sensitive than others. CAUTION: The combined load of PCB routing, input load of the RFFE component controller, and parasitic load from the application shall not exceed 15 pF at nRF9160's SCLK or SDATA pins. Typically, this load equals narrow transmission line length of 10 cm on the application board, but depends on the actual PCB design. 4.12.1 PCB layout design When designing the PCB layout, interface-specific recommendations should be followed. The MIPI RFFE interface has the following recommendations:

Parasitic capacitance in routing must not exceed 15 pF at SCLK or SDATA. If additional filtering is needed, place capacitors C14, C15, and C16 close to the component RFFE is connected to where the noise originates from, for example, the antenna tuner. Avoid adjacent routings of SCLK and SDATA to noisy routings, such as RF or supply. Use shielded PCB layers for RFFE routings whenever possible to minimize radiated coupling. Follow the instructions of the RFFE peripheral datasheets. 4418_1414 22 Hardware integration 4.13 ANT ANT (pin 61) is a 50 single-end interface for the LTE antenna for cellular bands. To ensure good performance, antenna impedance and the characteristic impedance of the transmission line connecting the antenna to the ANT pin must be 50 . Impedance mismatch leads to performance deterioration. The length of the transmission line from the antenna to the ANT pin should be kept as short as possible to minimize loss, because loss deteriorates the transmitted and received power in nRF9160 and leads to drawbacks in power consumption and network coverage. A maximum of 0.5 dB loss in the transmission line is acceptable. nRF9160 includes an ESD circuit on the ANT pin. The ESD circuit is intended for 1.5 kV HBM level, but additional ESD protection is recommended, especially if there are active components, such as switches or antenna tuners, in the antenna path. For the ESD requirements, see the component datasheets. The ANT pin is DC grounded. A matching network of a minimum of three components is typically needed close to the antenna. The component values and matching topology depend on the antenna application and antenna path impedance and need to be optimized individually for each design. For more information on the antenna interface, see nWP033 - nRF9160 Antenna and RF Interface Guidelines. 4.13.1 PCB layout design When designing the PCB layout, pin-specific recommendations should be followed. The ANT pin has the following recommendations:

To ensure good, radiated performance, begin the design by locating the LTE antenna on the PCB. Ensure preliminary antenna performance on a chosen PCB location, for example, by simulation. When multiple antennas, for example, LTE, GPS, and Bluetooth Low Energy are present, minimize antenna crosstalk. Antenna transmission line impedance should be 50 . Take this into account when selecting the PCB stack-up. Avoid excessive capacitance in routing by opening ground layers under component pads. For example, if the routing is on the top PCB layer, open the ground plane under the ANT pad on the next metal layer. When opening ground planes, avoid exposing noisy routings under the ANT pad. Avoid long routing because it causes excessive insertion loss which deteriorates RF performance which cannot be reversed. Ensure continuous reference ground plane above, below, or both of the ANT routing. Consider adding a test connector to the antenna path for production test and diagnostic purposes. Ensure that the test connector or solution does not deteriorate the impedance of the transmission line. 4.14 AUX AUX (pin 64) is a 50 single-end auxiliary port that can be used to loop back the signal that is fed into the ANT pin. AUX can be used when two radios share an antenna. For example, when using a combined GPS and LTE antenna, an internal RF switch in nRF9160 provides the needed isolation between the GPS and LTE paths. AUX can be configured in software so that when the GPS receiver is on, AUX is connected to the ANT inside the System in Package (SiP). This enables the routing of the GPS signal from the shared LTE and GPS antenna to AUX and through a recommended external Low-Noise Amplifier (LNA) to the GPS input. To minimize mismatch losses, using external matching components between AUX and LNA is recommended. For more information on the antenna interface, see nWP033 - nRF9160 Antenna and RF Interface 4418_1414 23 Hardware integration Guidelines. For more information on configuring the AUX firmware, see nRF91 AT Commands Reference Guide. 4.14.1 PCB layout design When designing the PCB layout, pin-specific recommendations should be followed. The AUX pin has the following recommendations:

Antenna transmission line impedance should be 50 . Take this into account when selecting the PCB stack-up. Avoid excessive capacitance in routing by opening ground layers under component pads. For example, if the routing is on the top PCB layer, open the ground plane under the AUX pad on the next metal layer. When opening ground planes, avoid exposing noisy routings under the AUX pad. Avoid long routing because it causes excessive insertion loss which deteriorates RF performance which cannot be reversed. Ensure continuous reference ground plane above, below, or both of the AUX routing. 4.15 GPS GPS (pin 67) is a 50 single-end interface for the GPS antenna. To ensure good GPS reception performance, antenna impedance and the characteristic impedance of the transmission line connecting the antenna to the GPS pin must be 50 . Impedance mismatch leads to reduced performance. Loss deteriorates the received power and GPS reception of nRF9160. To minimize loss, the length of the transmission line from the antenna to the GPS pin should be kept as short as possible. A maximum of 0.5 dB transmission line loss is acceptable. If an external GPS LNA is used, and it is located close to the GPS antenna, the routing impedance and length recommendations may be waivered. nRF9160 includes an ESD circuit on the GPS pin. The ESD circuit is intended for 1.5 kV HBM level, but additional ESD protection is recommended. The GPS pin is DC grounded. For more information on the antenna interface, see nWP033 - nRF9160 Antenna and RF Interface Guidelines. Note: Using the GPS receiver without an external LNA and Band-Pass Filter (BPF) is not recommended. 4.15.1 PCB layout design When designing the PCB layout, pin-specific recommendations should be followed. The GPS pin has the following recommendations:

To ensure good, radiated performance, begin the design by locating the GPS antenna on the PCB. Ensure preliminary antenna performance on a chosen PCB location, for example, by simulation. When multiple antennas, for example, LTE, GPS, and Bluetooth Low Energy are present, minimize antenna crosstalk. Antenna transmission line impedance should be 50 . Take this into account when selecting the PCB stack-up. Avoid excessive capacitance in routing by opening ground layers under component pads. For example, if the routing is on the top PCB layer, open the ground plane under the GPS pad on the next metal layer. When opening ground planes, avoid exposing noisy routings under the GPS pad. 4418_1414 24 Hardware integration Avoid long routing because it causes excessive insertion loss which deteriorates RF performance which cannot be reversed. Ensure continuous reference ground plane above, below, or both of the GPS routing. Consider adding a test connector to the antenna path for production test and diagnostic purposes. Ensure that the test connector or solution does not deteriorate the impedance of the transmission line. 4.16 COEX The COEX interface consists of pins 9193. It is dedicated for RF interference avoidance towards a companion radio device, such as an external positioning device or Bluetooth Low Energy device. The COEX interface is powered from VDD_GPIO. To control the COEX interface, the LTE modem must be active. When the LTE modem is not active, the COEX interface floats. Therefore, it is mandatory to use external pull-down resistors in the size range of 100 k in the COEX interface. The COEX pins have the following functionalities:

COEX0 (pin 93) Can be configured for external GPS LNA control (high state) during GPS receive the same way as the %XMAGPIO command with the exception that %XMAGPIO controls only one pin. For more information, see MAGPIO configuration %XMAGPIO in nRF91 AT Commands Reference Guide. COEX1 (pin 92) Can be used during GPS receive to deliver GPS one pulse per second (1PPS) time mark pulse. Note: Supported in a future release of the modem firmware. COEX2 (pin 91) Can be used as an indicator of LTE or GPS RF activity from the modem to an external device. When COEX2 is high, the LTE or GPS RF is active, and when it is low, the LTE or GPS RF is inactive. Can be used as a BLE nGrant. This means that Bluetooth Low Energy should not transmit when COEX2 is high and Bluetooth Low Energy can transmit when COEX2 is low. Can be used with %XRFTEST AT commands. For more information, see Production test features in nRF91 AT Commands Reference Guide. 4.16.1 Features The COEX pins are powered from VDD_GPIO (pin 12). They have the same voltage level as VDD_GPIO and any unwanted noise or spurious that VDD_GPIO may contain. Therefore, proper noise filtering in VDD_GPIO is important. It is also important for each individual COEX pin to meet the filtering requirements specified for the peripherals connected to them. To reduce transient currents, series resistors or ferrite beads can be used in the COEX lines. For low current, digital control type of COEX routings, resistor values in the range of 100 to 1 k can be considered. However, the optimal resistor values depend mainly on the connected peripheral drive currents and communication speed required by the peripherals. In addition to the series resistor, bypass capacitors in the range of few pF can be considered. They may help to reduce RF coupling to the COEX lines. Unused COEX pins can be left unconnected electrically, but it is recommended to connect them to the application board for improved thermal and mechanical performance. For more information on the COEX interface configurations, see nRF9160 Product Specification. Note: Additional capacitance increases COEX loading and noise originated from COEX toggling. 4418_1414 25 Hardware integration 4.16.2 PCB layout design When designing the PCB layout, interface-specific recommendations should be followed. The COEX interface has the following recommendations:

Place filtering series resistors close to the respective COEX pins. Place capacitors close to the origin of noise. Ground capacitors to the same ground plane as VSS (pin 103). Avoid routing COEX close to sensitive routings due to the risk of noise decoupling from COEX. Avoid routing COEX close to supply or RF routings due to the risk of noise decoupling to COEX. Use shielded PCB layers for GPIO routings whenever possible to minimize radiated noise. Follow the instructions in the peripheral datasheets. 4.17 Reserved Pins 10, 51, 70, 71, 73, and 104127 are reserved for Nordic's internal diagnostic purposes. It is recommended to connect the Reserved pins to the application board mechanically and thermally, but to keep them electrically unconnected. To facilitate a simpler or more economical stencil design, Reserved pins 104127 can be left electrically, mechanically, and thermally unconnected with no stencil openings for them. 4418_1414 26 5 Hardware design The design of an end product is often driven by small form factor and attractive appearance. However, to achieve a product with solid performance, several design factors must be considered. Some of those design factors conflict with the small form factor target. Typically, this means a compromise in the design that may affect the performance or appearance of the end product. When a preliminary schematic of the device is ready, designing the PCB can begin. Layout design is typically iterative and involves trade-offs. The first hardware design rarely ends up being the mass-

produced version. To minimize the number of hardware design rounds, cost, and time, the selected essential design factors that have a major impact on the end product's RF performance are discussed here. 5.1 Component placement It is recommended to categorize and prioritize connections between nRF9160 and application components according to how critical they are. For nRF9160's performance, RF routings are the most critical due to the mandatory impedance control and noticeable impact that they have on the user experience. Power supply routings are also important because insufficient power supply design causes nRF9160 to work improperly. In addition, the SIM and MIPI RFFE interfaces are sensitive and should be prioritized in the layout work. It is also recommended to categorize application components according to which ones can be adjacent to one another on the PCB. For example, sensitive antennas and noisy DC converters or LEDs should never be adjacent to each other on a PCB. Two antennas, such as GPS and LTE, should never be adjacent to each other on a PCB because of the risk of mutual load effect between two nearby radiators. The load effect can noticeably deteriorate antenna efficiency and radiation pattern and have a major impact on the overall performance of the end product. Some components, such as the LTE antenna and SIM holder, should be close to nRF9160 to minimize the negative impact of a long PCB routing, but not near each other. These components should not be too far from nRF9160, but their mutual distance should be maximized. It is recommended to place these components on the opposite sides of the PCB if possible. Based on connections and component categorization, layout and component placement mockup can be started. Start the layout work from the most critical routings. Aim to have at least one dedicated PCB metal layer as a common ground plane for the entire PCB, keeping it as intact as possible. This metal layer also acts as the main thermal dissipation power relief path for nRF9160 and other active components on the application board. A small form factor PCB sets constraints for component placement, especially for the antenna and its ground layer. Optimal placement for antennas is important and helps guarantee radiated performance and a good user experience for the end product. Therefore, it is recommended to estimate with 3D simulation tools the impact of different antenna locations and grounding on the PCB. Antenna design and simulation services are provided by various design houses globally. Antenna vendors often provide design and measurement services, but typically they are meant only for their own products. If the end product includes antennas from more than one vendor, it is important to make sure that all antennas are verified to perform as expected simultaneously on a small form factor PCB or in the end product. 4418_1414 27 Hardware design 5.2 External flash memory requirements If you want to perform a full modem firmware upgrade, an external flash memory with a minimum of 4 MB free space is required. You can find more information on updating modem firmware at the following links:

DFU target full modem update HTTP full modem update sample nRF9160 modem firmware 5.3 Antennas If a small form factor device integrates antennas with noticeable performance requirements, for example, GPS or LTE, the antenna related design should be prioritized. The key requirement in antenna design is that all antennas fulfill their performance targets in the actual use cases of the end product. The efficiency target for the LTE and GPS antennas should be a minimum of 50%. For the best possible GPS performance, the recommended efficiency is a minimum of 75%. 5.3.1 Troubleshooting This section describes typical performance related issues in the end product's antenna design and ways to reduce them. The placement of the antenna on the PCB and ground plane prevents from achieving good enough antenna radiation performance. Follow the antenna vendors recommendations for placing the antenna on the PCB and ground plane. Verify the antenna radiation pattern and efficiency in an anechoic chamber to match the datasheet. RF path routing loss between antenna and nRF9160 is too high. Verify 50 impedance-controlled routing between the antenna and nRF9160. Target less than 0.5 dB for resistive loss between the antenna and nRF9160. Note: GPS is recommended to be used with an external LNA. This means that resistive routing loss between the GPS LNA and nRF9160 is not highly critical. However, it is highly critical to avoid noise coupling from adjacent routings or components to GPS signal routing between the GPS antenna and nRF9160. Mechanics, casing, battery, or wires deteriorate antenna performance. Co-design the mechanics to match the PCB and antenna design. Sharing a small PCB between several antennas, for example, GPS and LTE, causes mutual loading between the antennas. Verify that the antennas do not cause mutual loading, for example, with passive antenna measurements in an anechoic chamber. Terminating an unused antenna, for example the LTE antenna during GPS, may have a noticeable impact on the mutual loading effect between the antennas. To minimize the load effect, the LTE antenna can be terminated through the AUX port (pin 64) to 50 load during GPS. 4418_1414 28 Hardware design Active components on the PCB cause wideband noise coupling to the antennas. Verify that during reception, especially GPS, active components on the PCB do not radiate noise to the GPS antenna. For example, DC converters and LEDs are typical sources of radiating wideband noise. The RSSI scan testing method can be used. For more information, see nWP034 - nRF9160 Hardware Verification Guidelines. The orientation of the end product in a typical use case is less than optimal for the antenna radiation pattern. Consider in the design phase what the orientation of the end product is going to be in a typical use case. Consider in the design phase the type of the GPS antenna, for example, omnidirectional or linear and directive or Right Hand Circular Polarization (RHCP). Nearby objects deteriorate antenna performance. Instruct the end user to use the device in the manner it is designed for. For example, inform the user not to expect the best possible radio performance when the device is used inside a building, on a metal surface, or on their body. GPS signal environment is more challenging than assumed in the design phase. Instruct the end user to use the device in the manner it is designed for. The GPS signal type must be line-of-sight (LOS), which is rarely available in places like city centers with tall buildings nearby. The issue is even more severe in the polar regions because the GPS system is designed to perform the best in the equatorial regions. 5.4 nRF9160 module The main principle in placing the nRF9160 module is to optimize the highest priority routings as described in Component placement on page 27. Other important aspects are to achieve good thermal and mechanical contact to the application board and to avoid placing nRF9160 close to noisy components on the application board, such as DC converters or LEDs. 5.5 Thermal design Good thermal design on the application board is essential for maximizing the performance and battery life of nRF9160. Poor thermal design causes nRF9160's built-in thermal protection to more easily trigger, preventing nRF9160 from transmitting and receiving LTE and GPS data. The maximum power consumption and operating temperature of nRF9160 and the JEDEC standardized thermal coefficients are shown in the following table. 4418_1414 29 Hardware design Parameter Power consumption (maximum heat power dissipation) Maximum operating temperature RthetaJA (Module-to-Ambient) RThetaJB (Module-to-Board) RThetaJC (Module-to-Case) Maximum allowed Tc (Module case temperature) Maximum Allowed Tj (Worst case of module components) Value 1480 mW 85C 23C/W 6C/W 1C/W 85C 85C Table 3: Thermal characteristics of nRF9160 Note: Thermal resistance (JA, JB, and JC) is measured in still air conditions with the module mounted on 72 mm x 46 mm x 1.2mm 6-layer PCB with high copper coverage on all metal layers. 5.6 PCB stack-up Choosing the PCB stack-up should be aligned with the end product's PCB requirements. For nRF9160, the following targets should be considered:

Dedicate one metal layer that is as intact as possible for the common ground layer. Consider the need for 50 RF routings. Sometimes to achieve 50 routing requires the adjacent metal layer to be opened which increases the risk of exposing RF routing to noisy routings. Avoid crossing 50 RF routings on the application board. If it cannot be avoided, ensure that their ground planes remain continuous. Avoid using through vias in RF routings if they cause a parallel stub to the routing or are not 50 . Consider good thermal design and aim to use metal filled vias due to their better thermal conductivity especially close to nRF9160. 4418_1414 30 Glossary Band-Pass Filter (BPF) An electronic device or circuit that passes frequencies within a certain range and rejects frequencies outside that range. DC Direct Current Device Firmware Update (DFU) A mechanism for upgrading the firmware of a device. Electrostatic Discharge (ESD) A sudden discharge of electric current between two electrically charged objects. Global Positioning System (GPS) A satellite-based radio navigation system that provides its users with accurate location and time information over the globe. General-Purpose Input/Output (GPIO) A digital signal pin that can be used as input, output, or both. It is uncommitted and can be controlled by the user at runtime. GPIOTE General-Purpose Input/Output Tasks and Events Human Body Model (HBM) Simulates a charged person discharging to ground through a circuit. Integrated Circuit (IC) A semiconductor chip consisting of fabricated transistors, resistors, and capacitors. Low-Noise Amplifier (LNA) In a radio receiving system, an electronic amplifier that amplifies a very low-power signal without significantly degrading its signal-to-noise ratio. MIPI RF Front-End Control Interface (RFFE) A dedicated control interface for the RF front-end subsystem. MIPI Alliance Power Amplifier (PA) A device used to increase the transmit power level of a radio signal. Printed Circuit Board (PCB) A board that connects electronic components. Programmable Peripheral Interconnect (PPI) Enables peripherals to interact autonomously with each other using tasks and events independent of the CPU. 4418_1414 31 Right Hand Circular Polarization (RHCP) Circular polarization in which the electric field vector rotates in a right-hand sense with respect to the direction of propagation. Serial Wire Debug (SWD) A standard two-wire interface for programming and debugging Arm CPUs. Subscriber Identity Module (SIM) A card used in User Equipment (UE) containing data for subscriber identification. System in Package (SiP) Several integrated circuits, often from different technologies, enclosed in a single module that performs as a system or subsystem. System on Chip (SoC) A microchip that integrates all the necessary electronic circuits and components of a computer or other electronic systems on a single integrated circuit. Universal Integrated Circuit Card (UICC) A new generation SIM used in UE for ensuring the integrity and security of personal data. Universal Subscriber Identity Module (USIM) A card used in UE containing data for subscriber identification. User Equipment (UE) Any device used by an end-user to communicate. The UE consists of the Mobile Equipment (ME) and the Universal Integrated Circuit Card (UICC). 4418_1414 32 Legal notices By using this documentation you agree to our terms and conditions of use. Nordic Semiconductor may change these terms and conditions at any time without notice. Liability disclaimer Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability, function, or design. Nordic Semiconductor ASA does not assume any liability arising out of the application or use of any product or circuits described herein. Nordic Semiconductor ASA does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. If there are any discrepancies, ambiguities or conflicts in Nordic Semiconductors documentation, the Product Specification prevails. Nordic Semiconductor ASA reserves the right to make corrections, enhancements, and other changes to this document without notice. Life support applications Nordic Semiconductor products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Nordic Semiconductor ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such improper use or sale. RoHS and REACH statement Complete hazardous substance reports, material composition reports and latest version of Nordic's REACH statement can be found on our website www.nordicsemi.com. Trademarks All trademarks, service marks, trade names, product names, and logos appearing in this documentation are the property of their respective owners. Copyright notice 2022 Nordic Semiconductor ASA. All rights are reserved. Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder. 4418_1414 33

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Date: 28 March 2023 Class II permissive change request letter Manufacturer: Nordic Semiconductor ASA Model: nRF9160 FCC ID: 2ANPO00NRF9160 We, Nordic Semiconductor ASA, pursuant FCC 2.1043, hereby request the evaluation of a Class II permissive change as described below for the Nordic nRF9160. The change made to the currently certified equipment is to add Cat-M1 and NB IoT band 8 to nRF9160 FCC certificate. This update on our module is made after October 2020, last date where we performed a C2PC modification on our product (DC power efficiency improvement on IDLE mode). Nowadays, a small portion of B8 can also be used in USA, hence we would like to add this band to our nRF9160 module. This band 8 is SW enabled and without hardware modifications. No changes are made to transmit power output, modulation or frequency have been made. Therefore, the new model can be considered to be electrically identical to the corresponding already assessed radio equipment originally certified on 14.6.2019. Operational Description, test reports, Tune Up and Block Diagrams for this model have been developed. Yours sincerely, ______________________________________ By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen@nordicsemi.no

Nordic Semiconductor ASA Otto Nielsens vei 12 7052 Trondheim, Norway Date: 2022-11-14 DEKRA Testing and Certification, S.A.U. Parque Tecnolgico de Andaluca C/ Severo Ochoa 2 & 6 29590 Campanillas Mlaga, Espaa Ref: Agent letter for FCC ID: 2ANPO00NRF9160 We, hereby authorize Nordic Semiconductor ASA, Otto Nielsens vei 12, 7052 Trondheim, Norway DEKRA Testing and Certification, S.A.U , Severo Ochoa, 2 & 6, 29590 Malaga, Spain Ms. Mara Rodrguez Moyano, e-mail: maria.rodriguez@dekra.com, Phone: +34 952 619 114 to act as our agent in the preparation of this application for equipment certification, including the signing of all documents relating to these matters. The present authorization considers the development of documents on behalf of the client, written under his own letterhead and related to the necessary information to be provided on his behalf to complete the certification process. We also hereby certify that neither we nor any party to this application are subject to a denial of U.S. Federal benefits, which include FCC benefits, pursuant to Section 5301 of the Anti-Drug Abuse Act of 1988, U.S.C. 862 because of conviction for possession or distribution of controlled substance. For instances where our authorized agent signs the application for certification on our behalf, I acknowledge that all responsibility for complying with the terms and conditions for Certification, as specified by DEKRA Testing and Certification, S.A.U., still resides with us. This agreement expires one year from the current date. Sincerely, __________________________ By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic Semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen@nordicsemi.no FCB011_02 //DEKRA Testing and Certification, S.A.U. // www.dekra-product-safety.com/wireless

Nordic Semiconductor ASA Otto Nielsens vei 12 7052 Trondheim, Norway Date: 2022-11-14 DEKRA Testing and Certification, S.A.U. Parque Tecnolgico de Andaluca C/ Severo Ochoa 2 & 6 29590 Campanillas Mlaga, Espaa Ref: Confidentiality request for FCC ID: 2ANPO00NRF9160 To whom it may concern:

Pursuant to 0.457(d)(1)(ii) and 0.459 of the Commissions Rules (47 C.F.R.) and 552 (b)(4) of the Freedom of Information Act, Nordic Semiconductor ASA hereby requests that a part of the subject FCC application be held confidential to avoid release of sensitive information of the product to the public. For the product stated above, we request that the following information be withheld from public disclose:

Type of Confidentiality Requested Exhibit Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Permanent Permanent Permanent Permanent Permanent Permanent Block Diagrams External Photos Internal Photos Operation Description Parts List & Placement/BOM Tune-Up Procedure Schematics Test Setup Photos Users Manual SDR software and security information Permanent Confidentiality:

The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these matters might be harmful to us and provide unjustified benefits to our competitors. Short-Term Confidentiality:

We hereby request short-term confidentiality for the product stated above to avoid premature release of sensitive information prior to marketing or release of the product to the public. Release date of short term confidentiality is:

45 days from grant date marked 90 days from grant date marked 135 days from grant date marked 180 days from grant date marked Specific date:

We are also aware that we are responsible to notify DEKRA in the event information regarding the product or the product is made available to the public. DEKRA will then release the documents listed above for public disclosure pursuant to FCC Public Notice DA 04-1705. Sincerely, __________________________ By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic Semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen@nordicsemi.no FCB012_05 //DEKRA Testing and Certification, S.A.U. // www.dekra-product-safety.com/wireless

Nordic Semiconductor ASA Otto Nielsens vei 12 7052 Trondheim, Norway Date: 2022-11-14 DEKRA Testing and Certification, S.A.U. Parque Tecnolgico de Andaluca C/ Severo Ochoa 2 & 6 29590 Campanillas Mlaga, Espaa Ref: FCC Modular approval letter for FCC ID: 2ANPO00NRF9160 To whom it may concern:

The following attestation addresses the requirements to support modular approval pursuant to 15.212 of the Commissions Rules:

Modular approval requirement Yes No*

(i) The radio elements of the modular transmitter must have their own shielding. The physical crystal and tuning capacitors may be located external to the shielded radio elements.

(ii) The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with part 15 requirements under conditions of excessive data rates or over-

modulation.

(iii) The modular transmitter must have its own power supply regulation.

(iv) The modular transmitter must comply with the antenna and transmission system requirements of 15.203, 15.204(b) and 15.204(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph (b) of this section.

(v) The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing for compliance with part 15 requirements. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with the module (see 15.27(a)). The length of these lines shall be the length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified and commercially available (see 15.31(i)).

(vi) The modular transmitter must be equipped with either a permanently affixed label or must be capable of electronically displaying its FCC identification number.

(vii) The modular transmitter must comply with any specific rules or operating requirements that ordinarily apply to a complete transmitter and the manufacturer must provide adequate instructions along with the module to explain any such requirements. A copy of these instructions must be included in the application for equipment authorization.

(viii) The modular transmitter must comply with any applicable RF exposure requirements in its final configuration.

* Shall provide a detailed explanation if the answer is No. X X X X X X X X Sincerely, __________________________ By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic Semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen@nordicsemi.no FCB013_02 //DEKRA Testing and Certification, S.A.U. // www.dekra-product-safety.com/wireless

Date: 2023-01-24 DEKRA Testing and Certification, S.A.U. Parque Tecnolgico de Andaluca C/ Severo Ochoa 2 & 6 29590 Campanillas Mlaga, Espaa Headquarters Otto Nielsens v 12, 7052 Trondheim, Norway Postal address: P.O. Box 2336, 7004 Trondheim Tel.: +47 72 89 89 00 www.nordicsemi.com NO 966 011 726 MVA Certifications concerning covered equipment. Section 2.911(d)(5)(i)- (ii) FCC ID: 2ANPO00NRF9160 We, Nordic Semiconductor ASA, located in Otto Nielsens vei 12, Trondheim, Norway; certify that:

the equipment for which authorization is sought is not covered equipment prohibited from receiving an equipment authorization pursuant to section 2.903 of the FCC rules. as of the date of the filing of the application, the applicant is not identified on the Covered List as an entity producing covered equipment. Sincerely, Yours sincerely, By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic Semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen@nordicsemi.no Page 1 of 1

Federal Communications Commission Authorization and Evaluation Division 7435 Oakland Mills Road Columbia, MD 21046 USA Date: 03-24-2023 Headquarters Otto Nielsens v 12, 7052 Trondheim, Norway Postal address: P.O. Box 2336, 7004 Trondheim Tel.: +47 72 89 89 00 www.nordicsemi.com NO 966 011 726 MVA Ref: Attestation Statements Part 2.911(d)(7) Filing FCC ID: 2ANPO00NRF9160 NORDIC SEMICONDUCTOR ASA (the applicant) certifies that, as of the date of the filing of the application, TianHeng Consulting, LLC is our designated U.S. agent for service of process for the above referenced FCC ID. NORDIC SEMICONDUCTOR ASA accepts to maintain an agent for no less than one year after the grantee has terminated all marketing and importation or the conclusion of any Commission-

related proceeding involving the equipment. TianHeng Consulting, LLC accepts, as of the date of the filing of the application, the obligation of the designated U.S. agent for service of process for the above referenced FCC ID. Sincerely, Designated U.S. Agent Information:

Name: TianHeng Consulting, LLC FRN: 0033401258 Contact Person: Hualing Dong Address: 392 Andover Street, Wilmington, MA 01887, United States Tel.: +1 617-997-4010 Email: tianhengconsulting@gmail.com U.S. Agent Signature:

Applicant:

Company Name: NORDIC SEMICONDUCTOR ASA Grantee Code: 2ANPO Applicant FRN: 0026827089 Contact Name: Ketil Aas-Johansen Address:Otto Nielsens vei 12, 7052 Trondheim, Norway Tel.: +47 72898900 Email: ketil.aas-johansen@nordicsemi.no Applicant Signature:

Page 1 of 1 Hualing Dong, President

Date: 14 June 2023 Class II permissive change request letter Manufacturer: Nordic Semiconductor ASA Model: nRF9160 FCC ID: 2ANPO00NRF9160 We, Nordic Semiconductor ASA, hereby states that our module under C2PC evaluation, nRF9160, has been tested to add Cat M1 and NB-IoT B8 for FCC certification. The strategy followed to perform this testing was finding the channels outermost of the band, which complies with the block edge testing; accordingly, we can demonstrate the lowest and highest channels for NBIoT are:

Channel Number (Frequency MHz) Middle Lowest 21628

(897.8) 21645

(899.5) Highest 21652

(900.2) In this case, the offset that has proved that the module is in compliance with the requirement above is 300 kHz, instead of 100 kHz as espected by NB-IoT technology. Therefore, this reason has led to perform the test with the channel allocated at the expected band edge. The operating frequency band for this module is defined from 897.8 to 900.2 MHz, and this restriction will be applied by enabling only the above specified bandwidth via firmware setting, without hardware modifications Yours sincerely, ______________________________________ By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen@nordicsemi.no

ber Letina mi B s A testing and Certification, $.A.U. arque Tecnologico de Andalucia vero Ochoan 2 29590 Campanillas, Malaga, Spain Mr. Kamal Seddik e-mail: kamal.seddik @dekra com Phone: +34 952 619 310 to act as our agent in the preparation of this application for equipment certification, including the signing of all documents relating to these matters. The present authorization considers the development of documents on behalf of the client, written under his own letterhead and related to the necessary information to be provided on his behalf to complete the certification process. We also hereby certify that neither we nor any party to this application are subject to a denial of U.S. Federal benefits, which include FCC benefits, pursuant to Section 5301 of the Anti-Drug Abuse Act of 1988, U.S.C. 862 because of conviction for possession or distribution of controlled substance. For instances where our authorized agent signs the application for certification on our behalf, |

cknowledge that all responsibility for complying with the terms and conditions for Certification, s specified by DEKRA Testing and Certification, S.A.U., still resides with us. A testing and Certification, $.A4.U. arque Tecnologico de Andalucia vero Ochoan 2 29590 Campanillas, Malaga, Spain lee Ute teererete ll e-mail: kamal.seddik @dekra com Phone: +34 952 619 310 to act as our agent in the preparation of this application for equipment certification, including the signing of all documents relating to these matters. The present authorization considers the development of documents on behalf of the client, written under his own letterhead and related to the necessary information to be provided on his behalf to complete the certification process. We also hereby certify that neither we nor any party to this application are subject to a denial of U.S. Federal benefits, which include FCC benefits, pursuant to Section 5301 of the Anti-Drug Abuse Act of 1988, U.S.C. 862 because of conviction for possession or distribution of controlled VO] alt= (N =e For instances where our authorized agent signs the application for certification on our behalf, |

cknowledge that all responsibility for complying with the terms and conditions for Certification, s specified by DEKRA Testing and Certification, S.A.U., still resides with us. nis agreement expires one year irom (he Current Gale. incerely, nis agreement expires one year irom (he Current Gale. Tarte Date: 03/06/2020 DEKRA Testing and Certification, S.A.U. Parque Tecnoldgico de Andalucia C/ Severo Ochoa 2&6 29590 Campanillas Malaga, Espana Ref: Agent letter for FCC ID: 2ANPOOONRF9160 We, Nordic Semiconductor ASA Otto Nielsens vei 12 7052 Trondheim Norway hereby authorize DEKR P C/ Se Date: 03/06/2020 DEKRA Testing and Certification, S.A.U. Parque Tecnoldgico de Andalucia C/ Severo Ochoa 2&6 29590 Campanillas Malaga, Espana Ref: Agent letter for FCC ID: 2ANPOOONRF9160 Paras Nordic Semiconductor ASA Otto Nielsens vei 12 7052 Trondheim ela WY hereby authorize DEKR a meet:

By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen @ nordicsemi.no By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic semiconductor ASA Telephone: +47 72898900 e-mail: ketil.aas-johansen @ nordicsemi.no if iif wew.dekra uct-sal com wire Ff eee Ae clare} uct-sal eee alt=) NORDIC SEMICONDUCTOR NORDIC SEMICONDUCTOR FCBO11 02 DEKRA Testing and Certification S A U. FCBO11 02 DEKRA Testing and Certification S A U.

NORDI Date: 10 June 20: SEMICONDUCTOR ermissive change request letter Manufacturer: Nordic Semiconductor ASA Cote (Ea ato e) FCC ID: 2ANPOOONRF9160 Lt M8) HVIN: nRF9160 IC: 24529-NRF9160 HMN: N/A FVIN: mfw_norf9160_1.1.2-148 We, Nordic Semiconductor ASA, pursuant FCC 2.1043 and pursuant !C RSP-100, hereby request th evaluation of a Class Il permissive change as described below for the Nordic nRF9160. The change made to the currently certified equipment is to improve DC power ef le mode and do not degrade the characteristics currently reported and accepted. No changes to transmit power output, modulation or frequency have been made. The change introduced in the device:

e Power management ICs have been changed per an equivalent Nordic own PMIC. e Coupler has been changed per an equivalent one Therefore, the new model can be considered to be electrically identical to the corresponding already assessed equipment. Operational Description, test reports, Tune Up and Block Diagrams for this mode! have been developed Yours sincerely, Nordic semiconductor AS Telephone: +47 72898900

DEKRA Testing and Certification, S.A Parque Tecnoldgico de Andalucia C/ Severo Ochoa 2 & 6 NORDIC ETP isD Dlisted}

29590 Campanillas Malaga, Espafia Ref: Confidentiality request for FCC ID: 2ANPOOONRF9160 Bee emai: mee L8 Pursuant to 0.457(d)(1)(il) and 0.459 of the Commission's Rules (47 C.F.R.) and 552 (b)(4) of the Freedom of Information Act, Nordic Semiconductor ASA hereby request requests that a part of the subject FCC application be held confidential to avoid release of sensitive information of the product to the

@ product stated above, we request that the following information be withheld from public disclose:

Type of Confidentiality Requested mua fara ueit eral) eau) ea ear) mS et) er Ree Pe a) fell e}i

[=ifotoy BIE Cele) Extemal Photos actin Ute es) Operation Description er CRM eM gO) Tune-Up Procedure poles uire ers) ae rele.) User's Manual een eet bees Bee Ue TU ae iii is a The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these matters might be harmful to us and provide unjustified benefits to our ere ers Olam Short-Term Confidentiality:

We hereby request short-term confidentiality for the product stated above to avoid premature release of sensitive information prior to marketing or release of the product to the public. Release date of short term confidentiality is:

45 days from grant date marked oO 90 days from grant date marked |

135 days from grant date marked im 180 days from grant date marked fix Specific date:

We are also aware that we are responsible to notify DEKRA in the event information regarding the product or the product is made available to the public. DEKRA will then release the documents listed above fo public disclosure pursuant to FCC Public Notice DA 04-1705. TT By: Ketil Aas-Johansen Title: Application Engineer Company: Nordic semiconductor AS. Telephone: +47 72898900

@-mail: ketil.aas-johansen @ nordicsemi.no FCB012 02 /DEKRA Testing and Certification, S A.U