FCC ID: XMR2023RG525FNA 5G Sub-6 GHz LGA Module

 

RG525F-NA Hardware Design 5G Module Series Version: 1.0 Date: 2022-06-21 Status: Released RG525F-NA_Hardware_Design 1 / 114 5G Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters:

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http://www.quectel.com/support/technical.htm. Or email us at: support@quectel.com. Legal Notices We offer information as a service to you. The provided information is based on your requirements and we make every effort to ensure its quality. You agree that you are responsible for using independent analysis and evaluation in designing intended products, and we provide reference designs for illustrative purposes only. Before using any hardware, software or service guided by this document, please read this notice carefully. Even though we employ commercially reasonable efforts to provide the best possible experience, you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as available basis. We may revise or restate this document from time to time at our sole discretion without any prior notice to you. Use and Disclosure Restrictions License Agreements Documents and information provided by us shall be kept confidential, unless specific permission is granted. They shall not be accessed or used for any purpose except as expressly provided herein. Copyright Our and third-party products hereunder may contain copyrighted material. Such copyrighted material shall not be copied, reproduced, distributed, merged, published, translated, or modified without prior written consent. We and the third party have exclusive rights over copyrighted material. No license shall be granted or conveyed under any patents, copyrights, trademarks, or service mark rights. To avoid ambiguities, purchasing in any form cannot be deemed as granting a license other than the normal non-exclusive, royalty-free license to use the material. We reserve the right to take legal action for noncompliance with abovementioned requirements, unauthorized use, or other illegal or malicious use of the material. RG525F-NA_Hardware_Design 1 / 114 5G Module Series Trademarks Except as otherwise set forth herein, nothing in this document shall be construed as conferring any rights to use any trademark, trade name or name, abbreviation, or counterfeit product thereof owned by Quectel or any third party in advertising, publicity, or other aspects. Third-Party Rights This document may refer to hardware, software and/or documentation owned by one or more third parties

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Unless otherwise provided by valid agreement, we make no warranties of any kind, either implied or express, and exclude all liability for any loss or damage suffered in connection with the use of features and functions under development, to the maximum extent permitted by law, regardless of whether such loss or damage may have been foreseeable. d) We are not responsible for the accessibility, safety, accuracy, availability, legality, or completeness of information, advertising, commercial offers, products, services, and materials on third-party websites and third-party resources. Copyright Quectel Wireless Solutions Co., Ltd. 2022. All rights reserved. RG525F-NA_Hardware_Design 2 / 114 5G Module Series Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions, such as when the mobile bill is unpaid or the (U)SIM card is invalid. When emergency help is needed in such conditions, use emergency call if the device supports it. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. In an emergency, the device with emergency call function cannot be used as the only contact method considering network connection cannot be guaranteed under all circumstances. The cellular terminal or mobile contains a transceiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV sets, radios, computers or other electric equipment. In locations with explosive or potentially explosive atmospheres, obey all posted signs and turn off wireless devices such as mobile phone or other cellular terminals. Areas with explosive or potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, and areas where the air contains chemicals or particles such as grain, dust or metal powders. RG525F-NA_Hardware_Design 3 / 114 5G Module Series About the Document Revision History Version Date Author Description

2022-05-12 1.0 2022-06-21 Bourne WAN/

Jerax KONG/

Yosef ZHANG Bourne WAN/

Jerax KONG/

Yosef ZHANG Creation of the document First official release RG525F-NA_Hardware_Design 4 / 114 5G Module Series Contents Safety Information ...................................................................................................................................... 3 About the Document .................................................................................................................................. 4 Contents ...................................................................................................................................................... 5 Table Index .................................................................................................................................................. 8 Figure Index .............................................................................................................................................. 10 1 Introduction ....................................................................................................................................... 12 Special Marks ....................................................................................................................... 12 1.1. 2 Product Overview ............................................................................................................................. 13 Frequency Bands and Functions ......................................................................................... 14 Key Features ........................................................................................................................ 14 Functional Diagram .............................................................................................................. 17 Pin Assignment ..................................................................................................................... 19 Pin Description ..................................................................................................................... 20 EVB Kit ................................................................................................................................. 31 2.1. 2.2. 2.3. 2.4. 2.5. 2.6. 3.3. 3.1. 3.2. 3 Operating Characteristics ................................................................................................................ 32 Operating Modes .................................................................................................................. 32 Sleep Mode .......................................................................................................................... 33 3.2.1. UART Application Scenario ........................................................................................... 33 3.2.2. USB Application Scenario ............................................................................................. 34 USB Application with USB Remote Wakeup Function ................................... 34 3.2.2.1. USB Application with USB Suspend/Resume and MAIN_RI* Function ......... 34 3.2.2.2. USB Application without USB Suspend Function .......................................... 35 3.2.2.3. Airplane Mode ...................................................................................................................... 36 3.3.1. Hardware ....................................................................................................................... 36 3.3.2. Software ........................................................................................................................ 36 Power Supply ....................................................................................................................... 37 3.4.1. Power Supply Pins ........................................................................................................ 37 3.4.2. Reference Design for Power Supply ............................................................................. 37 3.4.3. Power Supply Voltage Monitoring ................................................................................. 38 3.4.4. Voltage Stability Requirements ..................................................................................... 38 Turn On ................................................................................................................................. 41 3.5.1. Turn On with PWRKEY ................................................................................................. 41 Turn Off ................................................................................................................................. 43 3.6.1. Turn Off with PWRKEY ................................................................................................. 43 3.6.2. Turn Off with AT Command ........................................................................................... 43 Reset .................................................................................................................................... 44 3.7. 3.6. 3.4. 3.5. 4 Application Interfaces ...................................................................................................................... 46 USB Interface ....................................................................................................................... 46 USB_BOOT Interface ........................................................................................................... 48 4.1. 4.2. RG525F-NA_Hardware_Design 5 / 114 5G Module Series 4.3. 4.4. 4.5. 4.6. 4.7. 4.8. 4.9. 4.10. 4.11. 4.12.

(U)SIM Interfaces ................................................................................................................. 49 I2C Interface* ........................................................................................................................ 51 I2S Interface* ........................................................................................................................ 52 PCM Interfaces* ................................................................................................................... 53 4.6.1. PCM for SLIC or Codec ................................................................................................ 55 4.6.2. PCM for Bluetooth Audio ............................................................................................... 55 UART Interfaces ................................................................................................................... 56 SDIO Interface ...................................................................................................................... 59 ADC Interface ....................................................................................................................... 61 SPI Interface* ....................................................................................................................... 62 PCIe Interface ....................................................................................................................... 63 Control Signals ..................................................................................................................... 66 W_DISABLE# ........................................................................................................ 66 Indication Signals ................................................................................................................. 67 Network Status Indication ...................................................................................... 67 STATUS ................................................................................................................. 68 IPQ Status and Err Fatal Interfaces* ..................................................................... 68 4.14. MAIN_RI* .............................................................................................................................. 69 Time Service and Repeater Interface* ................................................................................. 70 4.15. 4.13.1. 4.13.2. 4.13.3. 4.12.1. 4.13. 5.2. 5.1. 5 RF Specifications .............................................................................................................................. 71 Cellular Network ................................................................................................................... 71 5.1.1. Antenna Interface & Frequency Bands ......................................................................... 71 5.1.2. Antenna Tuner Control Interfaces* ............................................................................... 75 5.1.3. Tx Power ....................................................................................................................... 75 5.1.4. Rx Sensitivity ................................................................................................................. 76 5.1.5. Reference Design ......................................................................................................... 78 GNSS .................................................................................................................................... 79 5.2.1. Antenna Interface & Frequency Bands ......................................................................... 79 5.2.2. GNSS Performance ...................................................................................................... 80 5.2.3. Reference Design ......................................................................................................... 80 RF Routing Guidelines ......................................................................................................... 81 Antenna Design Requirements ............................................................................................ 83 RF Connector Recommendation .......................................................................................... 84 5.5.1. Recommended RF Connector for Installation .............................................................. 85 Assemble Coaxial Cable Plug Manually ........................................................ 85 Assemble Coaxial Cable Plug with Jig ........................................................... 86 5.5.2. Recommended Manufacturers of RF Connector and Cable ........................................ 87 5.5.1.1. 5.5.1.2. 5.3. 5.4. 5.5. 6 Electrical Characteristics & Reliability ........................................................................................... 88 Absolute Maximum Ratings.................................................................................................. 88 Power Supply Ratings .......................................................................................................... 88 Power Consumption ............................................................................................................. 89 Digital I/O Characteristic ....................................................................................................... 90 ESD Protection ..................................................................................................................... 91 6.1. 6.2. 6.3. 6.4. 6.5. RG525F-NA_Hardware_Design 6 / 114 5G Module Series 6.6. 6.7. Operating and Storage Temperatures .................................................................................. 92 Thermal Dissipation .............................................................................................................. 92 7 Mechanical Information .................................................................................................................... 94 Mechanical Dimensions ....................................................................................................... 94 Recommended Footprint ...................................................................................................... 96 Top and Bottom Views .......................................................................................................... 97 7.1. 7.2. 7.3. 8.1. 8.2. 8.3. 8 Storage, Manufacturing & Packaging ............................................................................................. 98 Storage Conditions ............................................................................................................... 98 Manufacturing and Soldering ............................................................................................... 99 Packaging Specification ..................................................................................................... 101 8.3.1. Carrier Tape ................................................................................................................. 101 8.3.2. Plastic Reel ................................................................................................................. 102 8.3.3. Packaging Process ..................................................................................................... 102 9 Appendix A References .................................................................................................................. 104 10 Appendix B Operating Frequencies ............................................................................................. 109 RG525F-NA_Hardware_Design 7 / 114 5G Module Series Table Index Table 1: Special Marks ............................................................................................................................... 12 Table 2: Brief Introduction of the Module ................................................................................................... 13 Table 3: Wireless Network Type ................................................................................................................. 14 Table 4: Key Features ................................................................................................................................ 14 Table 5: I/O Parameters Definition ............................................................................................................. 20 Table 6: Pin Description ............................................................................................................................. 20 Table 7: Overview of Operating Modes ...................................................................................................... 32 Table 8: Pin Definition of Power Supply ..................................................................................................... 37 Table 9: Pin Definition of PWRKEY ............................................................................................................ 41 Table 10: Pin Definition of RESET_N ......................................................................................................... 44 Table 11: Functions of the USB Interface ................................................................................................... 46 Table 12: Pin Definition of USB Interface ................................................................................................... 46 Table 13: USB Trace Length in the Module ............................................................................................... 48 Table 14: Pin Definition of USB_BOOT Interface ...................................................................................... 49 Table 15: Pin Definition of (U)SIM Interfaces ............................................................................................. 49 Table 16: Pin Definition of I2C Interface..................................................................................................... 52 Table 17: Pin Definition of I2S Interface ..................................................................................................... 52 Table 18: Pin Definition of PCM Interface for SLIC or Codec .................................................................... 55 Table 19: Pin Definition of Bluetooth PCM Interface .................................................................................. 56 Table 20: Pin Definition of UART Interfaces ............................................................................................... 57 Table 21: Pin Definition of SDIO Interface ................................................................................................. 59 Table 22: SDC Trace Length in the Module ............................................................................................... 61 Table 23: Pin Definition of ADC Interface ................................................................................................... 61 Table 24: Characteristics of ADC Interface ................................................................................................ 62 Table 25: Pin Definition of SPI Interface .................................................................................................... 62 Table 26: Pin Definition of PCIe Interface .................................................................................................. 63 Table 27: PCIe Trace Length in the Module ............................................................................................... 65 Table 28: Pin Definition of Control Signals ................................................................................................. 66 Table 29: RF Function Status ..................................................................................................................... 66 Table 30: Pin Definition of Indication Signals ............................................................................................. 67 Table 31: Working State of the Network Connection Status/Activity Indication ......................................... 67 Table 32: Pin Definition of IPQ Status and Err Fatal Interfaces ................................................................. 69 Table 33: Behaviors of the MAIN_RI .......................................................................................................... 70 Table 34: Pin Definition of Time Service and Repeater Function .............................................................. 70 Table 35: Pin Definition of Cellular Network Interface ............................................................................... 71 Table 36: Cellular Network Antenna Mapping ............................................................................................ 73 Table 37: Pin Definition of Antenna Tuner Control Interfaces .................................................................... 75 Table 38: Logic Levels of Antenna Tuner Control Interfaces ..................................................................... 75 Table 39: Truth Table of Antenna Tuner Control Interfaces ....................................................................... 75 Table 40: Tx Power ..................................................................................................................................... 75 Table 41: Conducted RF Receiving Sensitivity .......................................................................................... 76 RG525F-NA_Hardware_Design 8 / 114 5G Module Series Table 42: Pin Definition of GNSS Antenna Interface ................................................................................. 79 Table 43: GNSS Frequency ....................................................................................................................... 79 Table 44: GNSS Performance .................................................................................................................... 80 Table 45: Antenna Design Requirements .................................................................................................. 83 Table 46: Absolute Maximum Ratings ........................................................................................................ 88 Table 47: Module Power Supply Ratings ................................................................................................... 88 Table 48: Averaged Power Consumption for the Module .......................................................................... 89 Table 49: 1.8 V I/O Requirements .............................................................................................................. 90 Table 50: (U)SIM 1.8 V I/O Requirements ................................................................................................. 90 Table 51: (U)SIM 2.95 V I/O Requirements ............................................................................................... 91 Table 52: Electrostatics Discharge Characteristics (25 C, 45 % Relative Humidity) ............................... 91 Table 53: Operating and Storage Temperatures ........................................................................................ 92 Table 54: Recommended Thermal Profile Parameters ............................................................................ 100 Table 55: Carrier Tape Dimension Table (Unit: mm) ................................................................................ 101 Table 56: Plastic Reel Dimension Table (Unit: mm) ................................................................................. 102 Table 57: Related Documents .................................................................................................................. 104 Table 58: Terms and Abbreviations .......................................................................................................... 104 Table 59: Operating Frequencies (5G) ..................................................................................................... 109 Table 60: Operating Frequencies (2G + 3G + 4G).................................................................................... 111 RG525F-NA_Hardware_Design 9 / 114 5G Module Series Figure Index Figure 1: Functional Diagram ..................................................................................................................... 18 Figure 2: Pin Assignment (Top View) ......................................................................................................... 19 Figure 3: DRX Run Time and Current Consumption in Sleep Mode ......................................................... 33 Figure 4: Sleep Mode Application via UART .............................................................................................. 33 Figure 5: Sleep Mode Application with USB Remote Wakeup .................................................................. 34 Figure 6: Sleep Mode Application with MAIN_RI ....................................................................................... 35 Figure 7: Sleep Mode Application without Suspend Function ................................................................... 36 Figure 8: Reference Design of Power Supply ............................................................................................ 38 Figure 9: Power Supply Limits during Burst Transmission ........................................................................ 39 Figure 10: Star Structure of the Power Supply .......................................................................................... 40 Figure 11: Reference Circuit of Turning On the Module with Driving Circuit ............................................. 41 Figure 12: Reference Circuit of Turning On the Module with a Button ...................................................... 42 Figure 13: Turn-on Timing .......................................................................................................................... 42 Figure 14: Turn-off Timing .......................................................................................................................... 43 Figure 15: Reference Circuit of RESET_N with Driving Circuit ................................................................. 44 Figure 16: Reference Circuit of RESET_N with a Button .......................................................................... 44 Figure 17: Reset Timing ............................................................................................................................. 45 Figure 18: Reference Circuit of USB Application ....................................................................................... 47 Figure 19: Reference Circuit of USB_BOOT Interface .............................................................................. 49 Figure 20: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector ......................... 50 Figure 21: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector ........................... 51 Figure 22: Reference Circuit of I2S Application with Audio Codec ............................................................ 53 Figure 23: Primary Mode Timing ................................................................................................................ 54 Figure 24: Auxiliary Mode Timing ............................................................................................................... 54 Figure 25: Reference Circuit of SLIC PCM Interface ................................................................................. 55 Figure 26: Reference Circuit of Bluetooth PCM Interface ......................................................................... 56 Figure 27: Reference Circuit of Bluetooth UART Interface ........................................................................ 58 Figure 28: Reference Circuit with Voltage-level Translator ........................................................................ 58 Figure 29: Reference Circuit with Transistor Circuit .................................................................................. 59 Figure 30: Reference Circuit of SDIO Interface ......................................................................................... 60 Figure 31: Reference Circuit of SPI Interface with a Voltage-level Translator .......................................... 63 Figure 32: PCIe Interface Connection ........................................................................................................ 64 Figure 33: Reference Circuit of the Network Status Indication .................................................................. 68 Figure 34: Reference Circuit of STATUS ................................................................................................... 68 Figure 35: Module with IPQ Application ..................................................................................................... 69 Figure 36: Reference Circuit for Cellular Antenna Interfaces .................................................................... 78 Figure 37: Reference Circuit of GNSS Antenna ........................................................................................ 81 Figure 38: Microstrip Design on a 2-layer PCB ......................................................................................... 82 Figure 39: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 82 Figure 40: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 82 Figure 41: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 83 RG525F-NA_Hardware_Design 10 / 114 5G Module Series Figure 42: Dimensions of the Receptacles (Unit: mm) .............................................................................. 85 Figure 43: Dimensions of Mated Plugs Using 0.81 mm Coaxial Cables (Unit: mm) .............................. 85 Figure 44: Plug In a Coaxial Cable Plug .................................................................................................... 86 Figure 45: Pull Out a Coaxial Cable Plug .................................................................................................. 86 Figure 46: Install the Coaxial Cable Plug with Jig ...................................................................................... 87 Figure 47: Placement and Fixing of Heatsink ............................................................................................ 93 Figure 48: Module Top and Side Dimensions (Unit: mm) .......................................................................... 94 Figure 49: Module Bottom Dimensions (Bottom View, Unit: mm) ............................................................. 95 Figure 50: Recommended Footprint .......................................................................................................... 96 Figure 51: Top & Bottom Views of the Module ........................................................................................... 97 Figure 52: Recommended Reflow Soldering Thermal Profile ................................................................... 99 Figure 53: Carrier Tape Dimension Drawing ............................................................................................ 101 Figure 54: Plastic Reel Dimension Drawing ............................................................................................ 102 Figure 55: Packaging Process ................................................................................................................. 103 RG525F-NA_Hardware_Design 11 / 114 5G Module Series 1 Introduction This document defines RG525F-NA module and describes its air interfaces and hardware interfaces which are connected with your applications. With this document, you can quickly understand module interface specifications, electrical and mechanical details, as well as other related information of the module. The document, coupled with application notes and user guides, makes it easy to design and set up mobile applications with the module. 1.1. Special Marks Table 1: Special Marks Mark Definition

Unless otherwise specified, when an asterisk (*) is used after a function, feature, interface, pin name, AT command, or argument, it indicates that the function, feature, interface, pin, AT command, or argument is under development and currently not supported; and the asterisk (*) after a model indicates that the sample of such model is currently unavailable. Brackets ([]) used after a pin enclosing a range of numbers indicate all pins of the same type. For example, SDIO_DATA[0:3] refers to all four SDIO pins: SDIO_DATA0, SDIO_DATA1, SDIO_DATA2, and SDIO_DATA3. RG525F-NA_Hardware_Design 12 / 114 5G Module Series 2 Product Overview RG525F-NA is a 5G LGA module optimized specially for IoT and M2M applications. Adopting the 3GPP Rel-16 technology, it supports both 5G NSA and SA modes, Option 3x, 3a, 3 and Option 2 network architectures, which makes it backward compatible with the 4G network. It also provides GNSS to meet your specific application demands. RG525F-NA is an industrial-grade module for industrial and commercial applications only. The following table shows a brief introduction to the module. For CA and EN-DC configurations, see document [1]. Table 2: Brief Introduction of the Module Categories Packaging Pin counts Dimensions Weight LGA 464

(48.0 0.2) mm (45.0 0.2) mm (2.85 0.2) mm TBD Wireless network functions 5G NR/LTE Variants RG525F-NA RG525F-NA_Hardware_Design 13 / 114 5G Module Series 2.1. Frequency Bands and Functions Table 3: Wireless Network Type Wireless Network Type RG525F-NA 5G NR LTE-FDD LTE-TDD WCDMA GNSS n2/n5/n7/n12/n13/n14/n25/n26/n29/n30/n38/n41/n48/n66/n70/n71/n77/n78 B2/B4/B5/B7/B12/B13/B14/B17/B25/B26/B29/B30/B66/B71 B38/B41/B42/B43/B46 (LAA)/B48

GPS/GLONASS/BDS/Galileo/QZSS 2.2. Key Features Table 4: Key Features Features Details Power Supply SMS Supply voltage: 3.34.4 V Typical supply voltage: 3.8 V Text and PDU mode Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default

(U)SIM Interfaces Supports USIM/SIM card: 1.8/2.95 V Audio Features*

Supports two digital audio interfaces: PCM and I2S LTE: AMR/AMR-WB Supports echo cancellation and noise suppression PCM Interfaces*

Supports two PCM interfaces: one for SLIC or Codec (can be multiplexed with I2S) and the other for Bluetooth audio only Supports 16-bit linear data format Supports long frame synchronization and short frame synchronization Supports master and slave modes, but must be in master mode for long frame synchronization SPI Interface*

One SPI interface that only supports master mode 1.8 V operation voltage with clock frequency up to 50 MHz RG525F-NA_Hardware_Design 14 / 114 I2C Interface*

I2S Interface*

USB Interface 5G Module Series One I2C interface Complies with I2C Specification, Version 3.0 Multi-master mode is not supported Supports 16-bit linear data format I2S is a common 4-wire Digital Audio Interface (DAI) used in Hi-Fi, STB and portable devices The I2S_DIN and I2S_DOUT are used for audio transmission, whereas the bit clock and left/right clock synchronize the link Compliant with USB 3.1 and 2.0 specifications, with transmission rates up to 10 Gbps on USB 3.1 and 480 Mbps on USB 2.0 Used for AT command communication, data transmission, GNSS NMEA sentence output, software debugging and firmware upgrade Supports USB serial drivers: Windows 7/8/8.1/10/11, Linux 2.65.15, SDIO Interface Supports SD 3.0 protocol Android 4.x12.x UART Interfaces Main UART:

Used for AT command communication Baud rate: 115200 bps by default Debug UART:

Used for Linux console and log output Baud rate: 115200 bps Bluetooth UART*:

Used for Bluetooth communication Baud rate: 115200 bps Supports RTS and CTS hardware flow control COEX UART*:

Used for Qualcomm WWAN/WLAN coexistence mechanism PCIe Interface Supports two PCIe Gen 3 lanes, 8 Gbps per lane Supports one PCIe Gen 4 lane, 16 Gbps per lane Supports RC (Root Complex) and EP (End Point) modes Can be used to connect an external Ethernet IC (MAC and PHY) or Wi-Fi IC eSIM*

Optional Network Indication NET_MODE and NET_STATUS for indicating network connectivity status AT Commands Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT commands Rx-diversity 5G NR/LTE Antenna Interfaces Eight cellular antenna interfaces One GNSS antenna interface 50 impedance RG525F-NA_Hardware_Design 15 / 114 Transmitting Power 5G Module Series LTE-FDD: Class 3 (23 dBm 2 dB) LTE-TDD: Class 3 (23 dBm 2 dB) LTE B38/B41/B42/B43 HPUE: Class 2 (26 dBm 2 dB) 1 5G NR: Class 3 (23 dBm 2 dB) 5G NR n38/n41/n77/n78 HPUE: Class 2 (26 dBm +2/-3 dB) 1 Supports 3GPP Rel-16 Supports UL and DL 256QAM modulations Supports DL 4 4 MIMO:

n2/n5/n7/n12*/n13*/n14*/n25/n26*/n29*/n30/n38/n41/n48/n66/n70/n71/

n77/n78 5G NR Features Supports UL 2 2 MIMO 2: n38/n41/n48/n77/n78 Supports SCS 15 kHz 3 and 30 kHz 3 Supports SA and NSA operation modes 4 Supports Option 3x, 3a, 3 and Option 2 Max. transmission data rates 5:

- NSA TDD:

4.0 Gbps (DL)/550 Mbps (UL) SA TDD:

4.0 Gbps (DL)/900 Mbps (UL) Supports FDD and TDD Supports CA Category:

Supports up to UL CA Cat 18 Supports up to DL CA Cat 20 LTE Features Supports 1.4/3/5/10/15/20 MHz RF bandwidth Supports UL QPSK, 16QAM, 64QAM and 256QAM* modulations Supports DL QPSK, 16QAM, 64QAM and 256QAM modulations Supports DL 4 4 MIMO:

B2/B4/B5/B7/B12/B13*/B14/B17*/B25/B26/B29*/B30/B38/B41/B42/B43/

B48/B66/B71 Max. transmission data rates 5:

LTE: 2.0 Gbps (DL)/200 Mbps (UL) Internet Protocol Features Supports NITZ, PING and QMI protocols Supports PAP and CHAP for PPP connection GNSS Features Supports dual-band GNSS: L1 and L5 Supports GPS, GLONASS, BDS, Galileo and QZSS 1 HPUE only supports single carrier. 2 UL 2 2 MIMO is only supported in 5G SA mode. 3 5G NR FDD bands only support 15 kHz SCS, and NR TDD bands only support 30 kHz SCS. 4 See document [1] for bandwidth supported by each frequency band in the NSA and SA modes. 5 The maximum rates are theoretical and the actual values depend on network configuration. RG525F-NA_Hardware_Design 16 / 114 5G Module Series Temperature Range Protocol: NMEA 0183 Data update rate: 1 Hz Operating temperature range 6: -30 to +75 C Extended temperature range 7: -40 to +85 C Storage temperature range: -40 to +90 C Firmware Upgrade Firmware upgrade via USB interface or FOTA RoHS All hardware components are fully compliant with EU RoHS directive 2.3. Functional Diagram The following figure shows a block diagram of the module and illustrates the major functional parts. Power management Baseband DDR + NAND flash Radio frequency Peripheral interfaces 6 To meet this operating temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module can meet 3GPP specifications. 7 To meet this extended temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module remains the ability to establish and maintain functions such as voice* and SMS, without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again. RG525F-NA_Hardware_Design 17 / 114 5G Module Series Figure 1: Functional Diagram RG525F-NA_Hardware_Design 18 / 114 PMICTransceiverNANDLPDDR4XSDRAMTx/Rx BlocksANT1ANT2ANT_GNSSVBAT_BBVBAT_RFQETPWRKEYADCRESET_NSTATUSQLINKControlTxPRxDRxBasebandSPIANT0ANT3VDD_EXTUSB 2.0/3.1(U)SIM1PCMUARTsI2CSDIOI2SGNSSMIPI&GRFC76.8 MHzXOPMURFCLK76.8 MHzPCIe 3.0/4.0eSIM(U)SIM2BBCLK (19.2 MHz)SleepCLK (32.768 kHz)SPMIVDD_WIFI_VLVDD_WIFI_VMVDD_WIFI_VHANT6ANT7ANT8ANT9 5G Module Series 2.4. Pin Assignment The following figure illustrates the pin assignment of the module. Figure 2: Pin Assignment (Top View) NOTE 1. Keep all RESERVED or unused pins unconnected. 2. All GND pins should be connected to ground. RG525F-NA_Hardware_Design 19 / 114 392GND391GND263RESERVED260RESERVED257I2S_DIN254USIM2_RST251USIM2_DATA248USIM1_DATA245USIM1_VDD242RESERVED239RESERVED236VBAT_BB233VBAT_RF1230VBAT_RF1227GND224GND221ETH1_INT_N218RESERVED215GND212GND209GND206GND203GND200GND197GND390GND389GND299GND300GND301GND302GND303GND304GND305GND306GND307GND308GND309GND310GND311GND312GND313GND314GND315GND316GND317GND318GND319GND320GND321GND322GND323GND324GND325GND326GND327GND331GND332GND328GND329GND330GND333GND334GND335GND336GND340GND341GND337GND338GND339GND342GND343GND344GND345GND349GND350GND346GND347GND348GND351GND352GND353GND354GND355GND356GND357GND358GND359GND360GND361GND362GND363GND364GND365GND366GND367GND368GND369GND370GND371GND372GND373GND374GND375GND376GND377GND378GND379GND380GND381GND382GND383GND384GND385GND386GND387GND388GND65COEX_RXD68MAIN_TXD71PCM_SYNC74PCM_DIN77I2C_SCL80RESERVED83USB_DP86USB_SS_RX_M89USB_SS_TX_M92RESERVED95RESERVED98GPIO_32101RESERVED104ETH2_INT_N107VBAT_RF2110VBAT_RF2113GND116GND119GND122GND125GND128GND131GND64BT_EN67COEX_TXD70MAIN_RXD73PCM_CLK76PCM_DOUT79MCLK82USB_VBUS85USB_DM88USB_SS_RX_P91USB_SS_TX_P94RESERVED97RESERVED100MAIN_RI103RESERVED106RESERVED109VBAT_RF2112VBAT_RF2115GND118GND121RESERVED124GND127GND130ANT0132GND264RESERVED262RESERVED259I2S_WS256I2S_SCK253USIM2_CLK250USIM2_VDD247USIM1_CLK244USIM1_RST241ADC0238VBAT_BB235VBAT_BB232VBAT_RF1229VBAT_RF1226GND223ETH2_PWR_EN220ETH1_PWR_EN217RESERVED214GND211GND208ANT9205GND202GND199ANT8196GND193ANT_GNSS190GND187GND184ANT3181GND178GND175RESERVED172GND166ANT2163GND160GND157ANT1154GND151GND148ANT7145GND142GND169GND139ANT6136GND133GND195GND194GND191GND188GND185GND182GND179GND176GND173GND167GND164GND161GND158GND155GND152GND149GND146GND143GND170GND140GND137GND134GND192RESERVED189RESERVED186RESERVED183RESERVED180WL_SW_CTRL177RESERVED174SDR_GRFC1171SDR_GRFC0168GND165RESERVED162WLAN_PA_MUTING159WL_LAA_AS_EN156GND153RESERVED150RESERVED147GND144GND141GND138HST_WL_TX_EN135HST_LAA_TX_EN298RESERVED297RESERVED296RESERVED295RESERVED294RESERVED293RESERVED292RESERVED291RESERVED290RESERVED289RESERVED288RESERVED287RESERVED286RESERVED285RESERVED284RESERVED283RESERVED282RESERVED281EXT_INT280RESERVED279RESERVED278RESERVED277RESERVED276SDX_TO_WL_CTI275WL_TO_SDX_CTI274RESERVED273RESERVED272RESERVED271RESERVED270RESERVED269VDD_WIFI_VH268VDD_WIFI_VM267VDD_WIFI_VL266VDD_WIFI_VL265RESERVED60SDIO_VDD57RESERVED54RESERVED51SDIO_DATA248SDIO_CMD45RESERVED39PCIE_RST_N36PCIE_CLKREQ_N30PCIE_WAKE_N27RESERVED24RESERVED21RESERVED15RESERVED12GND9RESERVED6RESERVED3RESERVED62BT_CTS59BT_TXD56SDIO_PWR_VSET53SDIO_PWR_EN50SDIO_DATA147SDIO_CLK44PCIE_TX0_M41PCIE_TX1_M35PCIE_RX1_M32PCIE_RX0_M29RESERVED26GND23RESERVED17RESERVED14RESERVED11RESERVED38PCIE_REFCLK_M8RESET_N5RESERVED2RESERVED61BT_RTS58RESERVED55SDIO_DET52SDIO_DATA349SDIO_DATA046PCIE_TX0_P43PCIE_TX1_P40PCIE_REFCLK_P34PCIE_RX0_P31RESERVED28RESERVED25RESERVED22RESERVED16RESERVED13RESERVED10RESERVED37PCIE_RX1_P7PWRKEY4RESERVED1RESERVED63BT_RXD237STATUS234GND231GND228GND225WLAN_SLP_CLK222WLAN_EN219WLAN_PWR_EN2216WLAN_PWR_EN1213SPI_MISO210SPI_CLK207SPI_CS204SPI_MOSI201WL_LAA_RX258MAIN_DTR255I2S_DOUT252USIM2_DET249USIM1_DET246RF_CLK3_WL243NET_STATUS240NET_MODE198RESERVED261MAIN_DCD90GND93RESERVED96GND99RESERVED102SLEEP_IND105DBG_TXD108DBG_RXD111RESERVED114W_DISABLE#117RESERVED120RESERVED123GND126GND69RESERVED72RESERVED75EXT_RST78I2C_SDA81USB_BOOT84GND87RESERVED129GND66VDD_EXT19RESERVED20RESERVED18GND33GND42GNDPower PinsGND PinsGPIO PinsRESERVED PinsPCIe PinsPCM Pins(U)SIM PinsUSB PinsI2C PinsADC PinsUART PinsSPI PinsANT PinsSDIO PinsI2S PinsCTL Pins403GNDWi-Fi Pins404GND419RESERVED402GND405GND412RESERVED410RESERVED413RESERVED420RESERVED418GND421GND408GND416RESERVED424RESERVED406GND414RESERVED422GND397GND398GND400GND463GND426RESERVED427RESERVED428RESERVED417GND409RESERVED425RESERVED429RESERVED432RESERVED436RESERVED399GND435RESERVED431RESERVED430GND434RESERVED438RESERVED411GND407GND433RESERVED437RESERVED415RESERVED439RESERVED442GND445RESERVED441GND440RESERVED444RESERVED448RESERVED447RESERVED446GND450RESERVED449RESERVED451RESERVED454RESERVED453RESERVED452RESERVED443RESERVED457RESERVED456RESERVED460GND459GND458RESERVED462RESERVED461RESERVED455RESERVED464GND423RESERVED396GND401GND395GND394GND393RESERVEDPeripherals ControlGRFC & RFFE 5G Module Series 2.5. Pin Description The following table shows the DC characteristics and pin descriptions. Table 5: I/O Parameters Definition Type AI AO AIO DI DO DIO OD PI PO Description Analog Input Analog Output Analog Input/Output Digital Input Digital Output Digital Input/Output Open Drain Power Input Power Output Table 6: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT_BB VBAT_RF1 VBAT_RF2 8 235, 236, 238 PI 229, 230, 232, 233 PI 107, 109, 110, 112 PI Power supply for the modules baseband part Power supply for the modules RF part Power supply for the modules RF part Vmax = 4.4 V Vmin = 3.3 V Vnom = 3.8 V Vmax = 4.4 V Vmin = 3.3 V Vnom = 3.8 V Vmax = 4.4 V Vmin = 3.3 V Vnom = 3.8 V 8 VBAT_RF2 should be connected to an external VBAT power supply when Power Class 1.5 (optional) is designed;

otherwise, it is only used to connect decoupling capacitors. RG525F-NA_Hardware_Design 20 / 114 5G Module Series VDD_WIFI_VL 266, 267 PO Provides 0.95 V for Wi-Fi/Bluetooth modules Vnom = 0.95 V IOmax = 1.7 A VDD_WIFI_VM 268 PO Provides 1.28 V for Wi-Fi/Bluetooth modules Vmax = 1.35 V Vnom = 1.28 V IOmax = 400 mA Power supply for Wi-Fi/Bluetooth modules. VDD_WIFI_VH 269 PO VDD_EXT 66 PO Provides 1.88 V for Wi-Fi/Bluetooth modules Vnom = 1.88 V IOmax = 400 mA Provides 1.8 V for external circuits Vnom = 1.8 V IOmax = 50 mA Power supply for external GPIOs pull-up circuits. 12, 18, 26, 33, 42, 84, 90, 96, 113, 115, 116, 118, 119, 122129, 131134, 136, 137, 140147, 149, 151, 152, 154156, 158, 160, 161, 163, 164, 167170, 172, 173, 176, 178, 179, 181, 182, 185, 187, 188, 190, 191, 194197, 200, 202, 203, 205, 206, 209, 211, 212, 214, 215, 224, 226228, 231, 234, 299392, 394408, 411, 417, 418, 421, 422, 430, 441, 442, 446, 459, 460, 463, 464 GND Turn On/Off Pin Name Pin No. I/O Description DC Characteristics 1.8 V high level DI Turns on/off the module DI Resets the module 1.8 V Comment Internally pulled up to 1.8 V. Internally pulled up to 1.8 V with a 40 k resistor. PWRKEY RESET_N 7 8 Status Indication Pin Name Pin No. I/O Description DC Characteristics Comment STATUS 237 DO NET_MODE 240 DO NET_STATUS 243 DO SLEEP_IND 102 DO Indicates the modules operation status Indicates whether the module has registered on 5G network Indicates the modules network activity status Indicates the modules sleep mode 1.8 V RG525F-NA_Hardware_Design 21 / 114 5G Module Series USB Interface Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS 82 AI USB connection detect Vmax = 5.25 V Vmin = 3.3 V Vnom = 5.0 V USB_DP USB_DM 83 85 AIO AIO USB differential data (+) USB differential data (-) USB_SS_TX_P 91 AO USB_SS_TX_M 89 AO USB_SS_RX_P 88 AI USB_SS_RX_M 86 AI

(U)SIM Interfaces USB 3.1 super-speed transmit (+) USB 3.1 super-speed transmit (-) USB 3.1 super-speed receive (+) USB 3.1 super-speed receive (-) Used for USB connection detection only, not for power supply. Requires differential impedance of 90 . USB 2.0 compliant. Requires differential impedance of 85 . USB 3.1 Gen2 compliant. Pin Name Pin No. I/O Description DC Characteristics Comment USIM1_VDD 245 PO

(U)SIM1 card power supply 1.8/2.95 V USIM1_DATA 248 DIO

(U)SIM1 card data USIM1_CLK 247 DO

(U)SIM1 card clock USIM1_VDD 1.8/2.95 V USIM1_RST 244 DO

(U)SIM1 card reset USIM1_DET 249 DI USIM2_VDD 250 PO

(U)SIM1 card hot-plug detect

(U)SIM2 card power supply USIM2_DATA 251 DIO

(U)SIM2 card data USIM2_CLK 253 DO

(U)SIM2 card clock 1.8 V 1.8/2.95 V USIM2_VDD 1.8/2.95 V If unused, keep it open. RG525F-NA_Hardware_Design 22 / 114 5G Module Series USIM2_RST 254 DO

(U)SIM2 card reset USIM2_DET 252 DI

(U)SIM2 card hot-plug detect 1.8 V If unused, keep it open. Main UART Interface Pin Name Pin No. I/O Description MAIN_TXD MAIN_RXD 68 70 DO DI Main UART transmit Main UART receive DC Characteristics Comment MAIN_RI*

100 DO MAIN_DTR 258 DI MAIN_DCD*

261 DO Bluetooth UART Interface*

1.8 V Main UART ring indication Main UART data terminal ready Main UART data carrier detect Pin Name Pin No. I/O Description DC Characteristics Comment BT_TXD BT_RXD BT_RTS BT_CTS 59 63 61 62 DO DI DI DO Bluetooth UART transmit Bluetooth UART receive DTE request to send signal to DCE DTE clear to send signal from DCE 1.8 V Debug UART Interface Connect to DTEs RTS. Connect to DTEs CTS. Pin Name Pin No. I/O Description DC Characteristics Comment DBG_RXD 108 DI DBG_TXD 105 DO Debug UART receive Debug UART transmit 1.8 V I2C Interface*

Pin Name Pin No. I/O Description DC Characteristics Comment RG525F-NA_Hardware_Design 23 / 114 5G Module Series I2C_SCL 77 OD I2C serial clock I2C_SDA 78 OD I2C serial data 1.8 V Pull each of them up to VDD_EXT with an external 4.7 k resistor. If unused, keep them open. I2S Interface*

Pin Name Pin No. I/O Description DC Characteristics Comment I2S_WS 259 DIO I2S word select I2S_SCK 256 DIO I2S clock 1.8 V I2S_DIN 257 DI I2S data in I2S_DOUT 255 DO I2S data out MCLK 79 DO Clock output for codec PCM Interface*

In master mode, it is an output signal. In slave mode, it is an input signal. Can be multiplexed into PCM_SYNC. In master mode, it is an output signal. In slave mode, it is an input signal. Can be multiplexed into PCM_CLK. Can be multiplexed into PCM_DIN. Can be multiplexed into PCM_DOUT. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment PCM_SYNC PCM_CLK PCM_DIN PCM_DOUT PCIe Interface 71 73 74 76 DIO PCM data frame sync DIO PCM clock DI PCM data input DO PCM data output 1.8 V Only used for Bluetooth audio. If unused, keep them open. Pin Name Pin No. I/O Description DC Characteristics Comment RG525F-NA_Hardware_Design 24 / 114 5G Module Series PCIE_REFCLK_P 40 AIO PCIE_REFCLK_M 38 AIO PCIe reference clock (+) PCIe reference clock (-) PCIE_TX0_M PCIE_TX0_P PCIE_TX1_M PCIE_TX1_P PCIE_RX0_M PCIE_RX0_P PCIE_RX1_M PCIE_RX1_P 44 46 41 43 32 34 35 37 AO PCIe transmit 0 (-) AO PCIe transmit 0 (+) AO PCIe transmit 1 (-) AO PCIe transmit 1 (+) AI AI AI AI PCIe receive 0 (-) PCIe receive 0 (+) PCIe receive 1 (-) PCIe receive 1 (+) PCIE_CLKREQ_N 36 OD PCIe clock request PCIE_RST_N 39 DIO PCIe reset 1.8 V PCIE_WAKE_N 30 OD PCIe wake up Requires differential impedance of 85 . One PCIe port is supported. It can be either Gen 3 2-lane or Gen 4 1-lane. If unused, keep them open. In root complex mode, it is an input signal. In endpoint mode, it is an output signal. In root complex mode, it is an output signal. In endpoint mode, it is an input signal. In root complex mode, it is an input signal. In endpoint mode, it is an output signal. WWAN/WLAN Application Interface*

Pin Name Pin No. I/O Description DC Characteristics Comment COEX_RXD 65 DI COEX_TXD 67 DO Coexistence UART receive Coexistence UART transmit 1.8 V Used for Qualcomm WWAN/WLAN coexistence mechanism. Pin 65 can be multiplexed into SDX2AP_E911 RG525F-NA_Hardware_Design 25 / 114 5G Module Series function. Pin 67 can be multiplexed into SDX2AP_STATUS function. For details, please contact Quectel Technical Support. This pin is used for the coexistence of n79 and Wi-Fi 5 GHz. If n79 is needed in your future project with Quectel modules, then this pin shall be reserved;

otherwise, keep it unconnected. Not used by default. Keep it open. HST_LAA_TX_EN 135 DO HST_WL_TX_EN 138 DI WLAN_PWR_ EN1 WLAN_PWR_ EN2 216 DO 219 DO Notifies LAA/n79 transmission from SDR transceiver to WLAN Notifies WLAN transmission from WLAN to SDR transceiver Controls WLAN PA power Controls WLAN other power BT_EN 64 DO Bluetooth enable WLAN_EN 222 DO WLAN enable WL_SW_CTRL 180 DI WLAN_SLP_CLK 225 AO RF_CLK3_WL 246 AO 76.8 MHz system clock request 32.768 kHz sleep clock output 76.8 MHz system clock output Vmax = 1.08 V Vnom = 1.05 V Vmin = 1.02 V SDX_TO_WL_CTI 276 DO

WLAN_PA_ MUTING 162 DO WL_LAA_AS_EN 159 DO GPIO from SDX to disable WLAN PA GPIO allows SDR to power on 1.8 V RG525F-NA_Hardware_Design 26 / 114 5G Module Series monitoring for WCN when WLAN is sleeping or disabled. Additionally, the control logic in WLAN AON domain allows SDR to control 5G WLAN xLNA (LNA in FEMs) SoC signal to set 5G xLNA to high gains or high isolation when both chains (LAA and 5G WLAN) are active simultaneously. No individual control for each chain. WL_LAA_RX 201 DO WL_TO_SDX_CTI 275 DI

SDIO Interface Not used by default. Keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment SDIO_VDD 60 PI SDIO power supply SDIO_DATA0 SDIO_DATA1 SDIO_DATA2 SDIO_DATA3 SDIO_CMD SDIO_CLK 49 50 51 52 48 47 DIO SDIO data bit 0 DIO SDIO data bit 1 DIO SDIO data bit 2 DIO SDIO data bit 3 DIO SDIO command DO SDIO clock 1.8/2.95 V configurable input. If unused, connect it to VDD_EXT. The power domain of SDIO pins depends on SDIO_VDD. If unused, keep them open. SDIO_PWR_EN 53 DO SDIO power supply enable 1.8 V RG525F-NA_Hardware_Design 27 / 114 5G Module Series SDIO_PWR_ VSET 56 DO SDIO power domain set SDIO_DET 55 DI SD card detect Pull it up to VDD_EXT with a 470 k resistor. If unused, keep it open. Antenna Interfaces Pin Name Pin No. I/O Description Comment ANT0 130 AIO Antenna 0 interface:

5G NR: n41 TRX1 & n77/n78 TRX0 LTE: LMB_TRX0 & HB_DRX &

UHB_TRX0

- Refarmed: LMB_TRX0 &

HB_TRX1 & UHB_TRX0 ANT1 157 AIO

Antenna 1 interface:

5G NR: n41 DRX MIMO & n77/n78 DRX MIMO LTE: LMB_PRX MIMO & HB_DRX MIMO & UHB_DRX MIMO &

LAA_PRX

- Refarmed: LMB_PRX MIMO &

HB_DRX MIMO & UHB_DRX MIMO ANT2 166 AIO

Antenna 2 interface:

5G NR: n41 PRX MIMO & n77/n78 PRX MIMO LTE: LMB_DRX MIMO & HB_PRX MIMO & UHB_PRX MIMO &

LAA_DRX 50 impedance.

- Refarmed: LMB_DRX MIMO &

HB_PRX MIMO & UHB_PRX MIMO Antenna 3 interface:

5G NR: n41 TRX0 & n77/n78 TRX1 LTE: LMB_TRX1 & HB_TRX0 &

UHB_TRX1

- Refarmed: LMB_TRX1 &

HB_TRX0 & UHB_TRX1 Antenna 6 interface:

5G NR: n77/n78 PRX2 Antenna 7 interface:

5G NR: n77/n78 DRX2 ANT3 184 AIO ANT6 ANT7 139 AIO 148 AIO RG525F-NA_Hardware_Design 28 / 114 5G Module Series ANT8 ANT9 199 AIO 208 AIO ANT_GNSS 193 AI Antenna Tuner Control Interfaces*

Antenna 8 interface:

5G NR: n77/n78 PRX3 Antenna 9 interface:

5G NR: n77/n78 DRX3 GNSS antenna interface:

L1/L5 Pin Name Pin No. I/O Description DC Characteristics Comment SDR_GRFC0 171 DO SDR_GRFC1 174 DO GRFC interfaces dedicated for external antenna tuner control 1.8 V SPI Interface*

If unused, keep them open. Pin Name Pin No. I/O Description DC Characteristics Comment SPI_CLK SPI_CS 210 207 DO SPI clock DO SPI chip select SPI_MISO 213 DI SPI_MOSI 204 DO SPI master-in slave-out SPI master-out slave-in ADC Interface 1.8 V Only master mode is supported. Pin Name Pin No. I/O Description DC Characteristics Comment ADC0 241 AI General-purpose ADC interface Voltage range:

01.875 V Time Service and Repeater Interface*

Pin Name Pin No. I/O Description DC Characteristics Comment Supports time service and repeater functions;

supports 1PPS pulse output and frame synchronization 1.8 V Can be multiplexed into AP2SDX_STATUS function. For details, contact Quectel Technical Support. GPIO_32 98 DO Other Interface Pins RG525F-NA_Hardware_Design 29 / 114 5G Module Series Pin Name Pin No. I/O Description DC Characteristics Comment USB_BOOT 81 DI EXT_RST*

75 DO EXT_INT*

281 W_DISABLE#

114 DI DI ETH1_PWR_EN*

220 DO ETH2_PWR_EN*

223 DO ETH1_INT_N*

221 DI ETH2_INT_N*

104 DI RESERVED Pins Forces the module to enter emergency download mode External audio reset External audio interrupt Airplane mode control Ethernet PHY 1 power enable Ethernet PHY 2 power enable Interrupts input from Ethernet PHY 1 Interrupts input from Ethernet PHY 2 1.8 V These pins are the control pins of PHY chip recommended by the platform. Pin Name Pin No. Comment RESERVED 16, 911, 1317, 1925, 2729, 31, 45, 54, 57, 58, 69, 72, 80, 87, 9295, 97, 99, 101, 103, 106, 111, 117, 120, 121, 150, 153, 165, 175, 177, 183, 186, 189, 192, 198, 217, 218, 239, 242, 260, 262265, 270274, 277280, 282298, 393, 409, 410, 412416, 419, 420, 423429, 431440, 443445, 447458, 461, 462 Keep these pins unconnected. RG525F-NA_Hardware_Design 30 / 114 5G Module Series 2.6. EVB Kit To help you develop applications with the module, Quectel supplies two evaluation boards (5G EVB and RTA001-EV EVB) with accessories to control or test the module. For more details, see documents [2] and [3]. NOTE If QPS615 is matched, please choose RTA001-EV EVB for verification. RG525F-NA_Hardware_Design 31 / 114 5G Module Series 3 Operating Characteristics 3.1. Operating Modes The table below outlines operating modes of the module. Table 7: Overview of Operating Modes Mode Details Full Functionality Mode Idle Voice*/Data Software is active. The module is registered on the network and ready to send and receive data. Network connection the power consumption is decided by network setting and data transfer rate. is ongoing. this mode, In Minimum Functionality Mode AT+CFUN=0 can set the module to a minimum functionality mode. In this case, both RF function and (U)SIM card are invalid. Airplane Mode AT+CFUN=4 or driving W_DISABLE# low will set the module to airplane mode. In this case, RF function is invalid. Sleep Mode In this mode, current consumption of the module will be reduced to the minimal level. The module can still receive paging, SMS, voice call and TCP/UDP data from network. Power Down Mode In this mode, the VBAT power supply is constantly turned on and the software stops working. NOTE For more details about the AT command, see document [4]. RG525F-NA_Hardware_Design 32 / 114 5G Module Series 3.2. Sleep Mode DRX of the module is able to reduce the current consumption to a minimum value during sleep mode. The diagram below illustrates the relationship between the DRX run time and the current consumption of the module in this mode. Figure 3: DRX Run Time and Current Consumption in Sleep Mode 3.2.1. UART Application Scenario If the host communicates with the module via main UART interface, the following two preconditions should be met to set the module to sleep mode:

Execute AT+QSCLK=1 to enable sleep mode. Drive MAIN_DTR high. The figure illustrates the connection between the module and the host. Figure 4: Sleep Mode Application via UART RG525F-NA_Hardware_Design 33 / 114 CurrentRun TimeDRX OFF ON OFF ON ON OFF OFFON OFFMAIN_RXDMAIN_TXDMAIN_RIModuleHostMAIN_DTRTXDRXDEINTGPIOGNDGND 5G Module Series Driving MAIN_DTR low with the host will wake up the module. When the module has a URC to report, MAIN_RI* signal will wake up the host. See Chapter 4.14 for details about RI behavior. 3.2.2. USB Application Scenario 3.2.2.1. USB Application with USB Remote Wakeup Function If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions should be met to set the module to sleep mode. Execute AT+QSCLK=1 to enable sleep mode. Ensure MAIN_DTR is held at high level or keep it open. Ensure the hosts USB bus, which is connected with the modules USB interface, enters suspend state. The following figure illustrates the connection between the module and the host. Figure 5: Sleep Mode Application with USB Remote Wakeup Sending data to the module through USB will wake up the module. When the module has a URC to report, the module will send remote wake-up signals through USB bus to wake up the host. 3.2.2.2. USB Application with USB Suspend/Resume and MAIN_RI* Function If the host supports USB suspend/resume, but does not support remote wakeup function, the MAIN_RI signal is needed to wake up the host. In this case, the following three preconditions can make the module enter the sleep mode. RG525F-NA_Hardware_Design 34 / 114 USB_VBUSUSB_DPUSB_DMVDDUSB_DPUSB_DMModuleHostGNDGND 5G Module Series Execute AT+QSCLK=1 to enable sleep mode. Ensure MAIN_DTR is held at a high level or keep it open. Ensure the hosts USB Bus, which is connected with the modules USB interface, enters suspend state. The following figure illustrates the connection between the module and the host. Figure 6: Sleep Mode Application with MAIN_RI Sending data to the module through USB will wake up the module. When the module has a URC to report, the MAIN_RI signal will wake up the host. 3.2.2.3. USB Application without USB Suspend Function If the host does not support USB suspend function, disconnect USB_VBUS with an external control circuit to make the module enter sleep mode. Execute AT+QSCLK=1 to enable sleep mode. Ensure MAIN_DTR is held at a high level or keep it open. Disconnect USB_VBUS. The figure illustrates the connection between the module and the host. RG525F-NA_Hardware_Design 35 / 114 USB_VBUSUSB_DPUSB_DMVDDUSB_DPUSB_DMModuleHostGNDGNDMAIN_RIEINT 5G Module Series Figure 7: Sleep Mode Application without Suspend Function Turning on the power switch and supplying power to USB_VBUS will wake up the module. NOTE Please pay attention to the level match shown in dotted line between the module and the host. 3.3. Airplane Mode When the module enters airplane mode, the RF function will be disabled, and all AT commands related to it will be inaccessible. This mode can be set via the following ways. 3.3.1. Hardware The W_DISABLE# pin is pulled up by default. Driving it low will set the module to airplane mode. See Chapter 4.12.1 for details. 3.3.2. Software AT+CFUN=<fun> provides choices of the functionality level through setting <fun> into 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both RF function and (U)SIM functions are disabled. AT+CFUN=1: Full functionality mode (default). AT+CFUN=4: Airplane mode. RF function is disabled. RG525F-NA_Hardware_Design 36 / 114 USB_VBUSUSB_DPUSB_DMVDDUSB_DPUSB_DMModuleHostMAIN_RIEINTPower SwitchGPIOGNDGND 5G Module Series NOTE The execution of AT+CFUN command will not affect GNSS function. 3.4. Power Supply 3.4.1. Power Supply Pins The module provides 11 VBAT pins dedicated to connection with the external power supply. There are three separate voltage domains for VBAT. Four VBAT_RF1 pins and four VBAT_RF2 pins for RF part. Three VBAT_BB pins for baseband part. Table 8: Pin Definition of Power Supply Pin Name Pin No. I/O Description Min. Typ. Max. Unit VBAT_BB VBAT_RF1 VBAT_RF2 9 GND 235, 236, 238 229, 230, 232, 233 107, 109, 110, 112 PI PI PI Power supply for the modules baseband part Power supply for the modules RF part Power supply for the modules RF part 12, 18, 26, 33, 42, 84, 90, 96, 113, 115, 116, 118, 119, 122129, 131134, 136, 137, 140147, 149, 151, 152, 154156, 158, 160, 161, 163, 164, 167170, 172, 173, 176, 178, 179, 181, 182, 185, 187, 188, 190, 191, 194197, 200, 202, 203, 205, 206, 209, 211, 212, 214, 215, 224, 226228, 231, 234, 299392, 394408, 411, 417, 418, 421, 422, 430, 441, 442, 446, 459, 460, 463, 464 3.3 3.8 4.4 V 3.3 3.8 4.4 V 3.3 3.8 4.4 V

0

V 3.4.2. Reference Design for Power Supply The performance of the module largely depends on the power source. The power supply of the module should be able to provide sufficient current of 3 A at least. If the voltage drops between input and output is not too high, it is suggested that an LDO should be used to supply power to the module. If there is a big 9 VBAT_RF2 should be connected to an external VBAT power supply when Power Class 1.5 (optional) is designed;

otherwise, it is only used to connect decoupling capacitors. RG525F-NA_Hardware_Design 37 / 114 5G Module Series voltage difference between input and the desired output VBAT, a buck converter is preferred as the power supply. The following figure shows a reference design for +5 V input power source. The designed output of the power supply is about 3.8 V and the rated current is 5 A. Figure 8: Reference Design of Power Supply NOTE 1. To avoid corrupting the data in the internal flash, do not switch off the power supply when the module works normally. Only after the module is turned off with PWRKEY or AT command, the power supply can be cut off. If you turn off the module by cutting off the power supply, do not power on the module until the power drops to 0 V, or there is a risk that the module cannot be turned on. 2. 3.4.3. Power Supply Voltage Monitoring You can use AT+CBC to monitor the VBAT_BB voltage value. For more details, see document [4]. 3.4.4. Voltage Stability Requirements The power supply range of the module is from 3.3 V to 4.4 V. Make sure the input voltage never drops below 3.3 V. RG525F-NA_Hardware_Design 38 / 114 TVS3V8_ENL1 2.2 H+5 VGNDGNDGNDGNDC522 FC6100 nFR375kR420kR2100KGNDR151KC1470 FC210 FC3100 nFC43.3 nFU1DC_3V8 5G Module Series Figure 9: Power Supply Limits during Burst Transmission To decrease the voltage drop, use a decoupling capacitor of about 100 F with low ESR and reserve a decoupling capacitor of about 100 F. In addition, a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It is recommended to use 16 ceramic capacitors for composing the MLCC array, and place these capacitors close to VBAT pins. The main power supply from an external application must be a single voltage source and can be expanded to two sub paths with the star structure. The width of VBAT_BB trace should be no less than 1.2 mm. The width of VBAT_RF1 and VBAT_RF2 traces should be no less than 2.0 mm. In principle, the longer the VBAT trace is, the wider it should be. In addition, in order to ensure the stability of the power supply, it is necessary to add a high-power TVS at the front end of the power supply. Reference circuit is shown as below:

RG525F-NA_Hardware_Design 39 / 114 VBATBurst TransmissionDropBurst Transmission 5G Module Series Figure 10: Star Structure of the Power Supply NOTE 1. Filter capacitors for VBAT_BB include a 100 F, a 100 nF, a 6.8 nF, a 220 pF, a 68 pF and a reserved 100 F capacitor. 2. Filter capacitors for VBAT_RF1 or VBAT_RF2 include a 100 F, a 100 nF, a 220 pF, a 68 pF, a 15 pF, a 9.1 pF, a 4.7 pF and a reserved 100 F capacitor. 3. R3 needs to be reserved since VBAT_RF2 should be connected to an external VBAT power supply when Power Class 1.5 (optional) is designed. RG525F-NA_Hardware_Design 40 / 114 220 pFR16.8 nF100 nF 100 nFR2 100 nF220 pF68 pFVBAT_RF1VBAT_RF2VBAT_BBVBATC2C3C4C5C8C16C9C17C180R0RModule100 F 100 F 220 pFC1068 pFC11 68 pFC615 pFC129.1 pFC134.7 pFC1415 pF 9.1 pF 4.7 pFC19C20C22C21R30RNM_0R100 FNM_100 FC1NM_100 FC7NM_100 FC15D1 5G Module Series 3.5. Turn On 3.5.1. Turn On with PWRKEY Table 9: Pin Definition of PWRKEY Pin Name Pin No. PWRKEY 7 I/O DI Description Comment Turns on/off the module Internally pulled up to 1.8 V. When the module is in power-off mode, it can be turned on by driving PWRKEY low for at least 500 ms. It is recommended to use an open-drain/open-collector driver to control the PWRKEY. After STATUS pin outputs a high level, PWRKEY can be released. Figure 11: Reference Circuit of Turning On the Module with Driving Circuit Another way to control the PWRKEY is by using a button directly. When pressing the button, an electrostatic strike may generate from finger. Therefore, a TVS component shall be placed near the button for ESD protection. RG525F-NA_Hardware_Design 41 / 114 PWRKEY 500 msMCUGPIOModuleTurn on pulse4.7K47KQ1 5G Module Series Figure 12: Reference Circuit of Turning On the Module with a Button The turn-on timing is illustrated in the following figure. Figure 13: Turn-on Timing

. NOTE Please ensure that VBAT is stable for at least 30 ms before pulling down PWRKEY. RG525F-NA_Hardware_Design 42 / 114 PWRKEYModuleS1Close to S1TVS1KTurn-on pulseR1VBATPWRKEY 500 msRESET_NActiveUARTNOTEActiveUSB TBD TBDSTATUS TBD 5G Module Series 3.6. Turn Off 3.6.1. Turn Off with PWRKEY Drive PWRKEY low for at least 800 ms, then the module will execute power-down procedure after the PWRKEY is released. Figure 14: Turn-off Timing 3.6.2. Turn Off with AT Command It is safe to turn off the module with AT+QPOWD, which is similar to turning off the module via the PWRKEY pin. See document [4] for details about AT+QPOWD command. NOTE 1. To avoid corrupting the data in the internal flash, do not switch off the power supply to turn off the module when it works normally. Only after the module is turned off with PWRKEY or AT command, the power supply can be cut off. 2. When turning off the module with AT command, please keep PWRKEY at a high level after the execution of turn-off command. Otherwise, the module will be turned on again after being turned off. RG525F-NA_Hardware_Design 43 / 114 VBATPWRKEY 800 msRunningPower-down procedureOFFModuleStatusSTATUS TBD 5G Module Series 3.7. Reset The module can be reset by driving RESET_N low for at least 500 ms and then releasing it. The RESET_N signal is sensitive to interference, so it is recommended to route the trace as short as possible and surround it with ground. Table 10: Pin Definition of RESET_N Pin Name Pin No. I/O Description Comment RESET_N 8 DI Resets the module Internally pulled up to 1.8 V with a 40 k resistor. The recommended circuit is the same as the PWRKEY control circuit. An open-drain/open-collector driver or button can be used to control RESET_N. Figure 15: Reference Circuit of RESET_N with Driving Circuit Figure 16: Reference Circuit of RESET_N with a Button RG525F-NA_Hardware_Design 44 / 114 RESET_N 500 msMCUGPIOModuleReset pulse4.7K47KQ1RESET_NModuleS2Close to S2TVS1KReset pulseR1 5G Module Series Figure 17: Reset Timing NOTE 1. Use RESET_N only when you fail to turn off the module with AT+QPOWD and PWRKEY. 2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. RG525F-NA_Hardware_Design 45 / 114 VBATResettingModule StatusRunningRESET_NRestartT 500 ms 5G Module Series 4 Application Interfaces 4.1. USB Interface The module provides one USB interface that complies with the USB 3.1 and USB 2.0 specifications, and supports SuperSpeed (10 Gbps) for USB 3.1 Gen2, high speed (480 Mbps) and full speed

(12 Mbps) for USB 2.0. Table 11: Functions of the USB Interface Functions AT command communication Data transmission GNSS NMEA sentence output Software debugging Firmware upgrade Voice over USB*

Pin definition of the USB interface is here as follows:

Table 12: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment USB_VBUS USB_DP USB_DM 82 83 85 AI USB connection detect AIO USB differential data (+) AIO USB differential data (-) For USB connection detection only, not power supply. Requires differential impedance of 90 . USB 2.0 compliant. RG525F-NA_Hardware_Design 46 / 114 5G Module Series USB_SS_TX_P 91 USB_SS_TX_M 89 USB_SS_RX_P 88 USB_SS_RX_M 86 AO AO AI AI USB 3.1 super-speed transmit (+) USB 3.1 super-speed transmit (-) USB 3.1 super-speed receive (+) USB 3.1 super-speed receive (-) Requires differential impedance of 85 . USB 3.1 Gen2 compliant. It is recommended to reserve test points for debugging and firmware upgrade in your designs. The following figure shows a reference circuit of USB interface. Figure 18: Reference Circuit of USB Application To ensure the signal integrity of USB data lines, you must place R1, R2, R3, R4, C1 and C2 close to the module, C3 and C4 close to the host, and keep these resistors close to each other. Keep the extra stubs of trace as short as possible. The following principles should be complied with when designing the USB interface, to meet USB specifications. It is important to route the USB signal traces as differential pairs with ground surrounded. The impedance of USB 2.0 differential trace is 90 . The impedance of USB 3.1 differential trace is 85 . RG525F-NA_Hardware_Design 47 / 114 USB_DPUSB_DMGNDUSB_DPUSB_DMGNDR1R2Close to ModuleR3R4Test PointsTVS ArrayNM_0RNM_0R0R0RMinimize these stubsModuleHostUSB_VBUSVDDUSB_SS_TX_PUSB_SS_TX_MUSB_SS_RX_PUSB_SS_RX_MC1C3C4220 nF220 nF220 nF220 nFUSB_SS_RX_PUSB_SS_RX_MUSB_SS_TX_PUSB_SS_TX_MC2 5G Module Series For USB 2.0 signal traces (USB_DP and USB_DM), the trace length should be less than 250 mm, and the length matching of each differential data pair (DP/DM) should be less than 2 mm (14 ps). For USB 3.1 signal traces, length matching of each differential data pair (Tx/Rx) should be less than 0.7 mm (5 ps), while the matching between Tx and Rx should be less than 10 mm. Do not route signal traces under crystals, oscillators, magnetic devices, PCIe and RF signal traces. It is important to route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and with ground planes above and below. Junction capacitance of the ESD protection components may cause influences on USB data lines, so pay attention to the selection of the components. Typically, the stray capacitance should be less than 1.0 pF for USB 2.0 signal lines, and less than 0.15 pF for USB 3.1 signal lines. Keep ESD protection components as close to the USB connector as possible. If possible, reserve a 0 resistor on USB_DP and USB_DM lines respectively. For more details about the USB specifications, please visit http://www.usb.org/home. Table 13: USB Trace Length in the Module Pin No. Pin Name Length (mm) Length Difference (P - M) (mm) USB_DP USB_DM USB_SS_TX_P USB_SS_TX_M USB_SS_RX_P USB_SS_RX_M 32.55 32.53 32.73 32.80 31.24 31.27 0.02

-0.07

-0.03 83 85 91 89 88 86 NOTE Both USB 3.1 interface and PCIe interface support data transmission, and USB 3.1 interface is used by default. If you want to use PCIe interface for communication, set it with AT+QCFG via USB 2.0 or main UART. For more details about AT command, see document [4]. 4.2. USB_BOOT Interface The module provides a USB_BOOT pin. You can pull up USB_BOOT to VDD_EXT before turning on the module, thus the module will enter emergency download mode after being turned on. In this mode, the module supports firmware upgrade over USB interface. RG525F-NA_Hardware_Design 48 / 114 5G Module Series Table 14: Pin Definition of USB_BOOT Interface Pin Name Pin No. USB_BOOT 81 I/O DI Description Forces the module to enter emergency download mode Figure 19: Reference Circuit of USB_BOOT Interface 4.3. (U)SIM Interfaces

(U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both Class B (2.95 V) and Class C

(1.8 V) (U)SIM cards are supported, and Dual SIM Single Standby* function is supported. Table 15: Pin Definition of (U)SIM Interfaces Pin Name Pin No. I/O Description Comment USIM1_VDD 245 PO

(U)SIM1 card power supply Either 1.8 V or 2.95 V is supported and can be identified automatically by the module. USIM1_DATA USIM1_CLK USIM1_RST USIM1_DET 248 247 244 249 DIO

(U)SIM1 card data DO DO DI

(U)SIM1 card clock

(U)SIM1 card reset

(U)SIM1 card hot-plug detect 1.8 V power domain. If unused, keep it open. RG525F-NA_Hardware_Design 49 / 114 ModuleUSB_BOOTVDD_EXT10KTest pointTVSClose to test pointTVS 5G Module Series USIM2_VDD 250 PO

(U)SIM2 card power supply Either 1.8 V or 2.95 V is supported and can be identified automatically by the module. USIM2_DATA USIM2_CLK USIM2_RST USIM2_DET 251 253 254 252 DIO

(U)SIM2 card data DO DO DI

(U)SIM2 card clock

(U)SIM2 card reset

(U)SIM2 card hot-plug detect 1.8 V power domain. If unused, keep it open. The module supports (U)SIM card hot-plug via the USIM_DET pin. The function supports low level and high level detections. It is disabled by default and you can configure it via AT+QSIMDET. See document

[4] for more details about the command. The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector. Figure 20: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector If (U)SIM card detection function is not needed, keep USIM_DET unconnected. A reference circuit for

(U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. RG525F-NA_Hardware_Design 50 / 114 ModuleUSIM_VDDUSIM_RSTUSIM_CLKUSIM_DATAUSIM_DET0R0R0RVDD_EXT100 K100 nF(U)SIM Card ConnectorGNDGND10 pF10 pF10 pFVCCRSTCLKIOVPPGNDGNDUSIM_VDD20K10 pFTVS Array 5G Module Series Figure 21: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector To enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design. Keep (U)SIM card connector as close as possible to the module. Keep the trace length as short as possible, at most 200 mm. Keep (U)SIM card signal traces away from RF and VBAT traces. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with ground surrounded. To offer better ESD protection, it is recommended to add a TVS array with a parasitic capacitance not exceeding 10 pF. The 0 resistors should be added in series between the module and the (U)SIM card connector so as to suppress EMI spurious transmission and enhance ESD protection. The 10 pF capacitors are used to filter out RF interference. The 20 k pull-up resistor on USIM_DATA trace improves anti-jamming capability and should be placed close to the (U)SIM card connector.

(U)SIM card hot plug function is disabled by default. A space was reserved for eSIM* inside the module on the (U)SIM2 interface. All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout. 4.4. I2C Interface*

The module provides one I2C interface. Pin definition of the I2C interface is as follows:

RG525F-NA_Hardware_Design 51 / 114 Module(U)SIM CardConnectorUSIM_DETUSIM_DATAUSIM_CLKRSTCLKIOUSIM_VDDUSIM_VDDUSIM_RSTVCCGNDVPPGNDTVS Array20k0R 0R 0R 10 pF10 pF10 pF10 pF100 nF 5G Module Series Table 16: Pin Definition of I2C Interface Pin Name Pin No. I/O Description Comment I2C_SCL I2C_SDA 77 78 OD I2C serial clock OD I2C serial data Pull each of them up to VDD_EXT with an external 4.7 k resistor. If unused, keep them open. 4.5. I2S Interface*

The module provides one I2S interface. Pin definition of the I2S interface is as follows:

Table 17: Pin Definition of I2S Interface Pin Name Pin No. I/O Description Comment I2S_WS 259 DIO I2S word select I2S_SCK 256 DIO I2S clock In master mode, it is an output signal. In slave mode, it is an input signal. In master mode, it is an output signal. In slave mode, it is an input signal. I2S_DIN I2S_DOUT MCLK 257 255 79 DI DO DO I2S data in I2S data out Clock output for codec If unused, keep it open. The following figure shows a reference design of I2S interface with an external codec IC. RG525F-NA_Hardware_Design 52 / 114 5G Module Series Figure 22: Reference Circuit of I2S Application with Audio Codec NOTE The I2S interface can be multiplexed as PCM function and is configured as PCM by default. If you need I2S function, contact Quectel Technical Support. 4.6. PCM Interfaces*

The module provides two PCM interfaces: one is used for SLIC or codec (multiplexed with I2S) and the other is only for Bluetooth audio. The following modes are supported:

Primary mode (short frame synchronization, works as both master and slave) Auxiliary mode (long frame synchronization, works as master only) In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and also supports 4096 kHz PCM_CLK at 16 kHz PCM_SYNC. In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC rising edge represents the MSB. In this mode, PCM interface operates with a 256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK and an 8 kHz, 50 % duty cycle PCM_SYNC only. The module supports 16-bit linear data format. The following figures show the primary modes timing relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK, as well as the auxiliary modes timing relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK. RG525F-NA_Hardware_Design 53 / 114 I2S_DINI2S_DOUTI2S_SCKI2S_WSI2C_SCLI2C_SDAModule1.8 V4.7 K4.7 KI2S_WSI2S_SCKI2S_DINI2S_DOUTSCLSDABIASMICBIASINPINNLOUTPLOUTNCodecMCLKMCLK 5G Module Series Figure 23: Primary Mode Timing Figure 24: Auxiliary Mode Timing Clock and mode can be configured by AT command, and the default configuration is master mode using short frame sync format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. See document [4] about AT+QDAI command for details. RG525F-NA_Hardware_Design 54 / 114 PCM_CLKPCM_SYNCPCM_DOUTMSBLSBMSB125 s12256255PCM_DINMSBLSBMSBPCM_CLKPCM_SYNCPCM_DOUTMSBLSBPCM_DIN125 sMSB123231LSB 5G Module Series 4.6.1. PCM for SLIC or Codec The module provides one PCM interface for SLIC or codec, which is multiplexed with I2S interface. Pin definition is listed as follows:

Table 18: Pin Definition of PCM Interface for SLIC or Codec Pin Name Pin No. Multiplexed Function I/O Description Comment I2S_WS 259 PCM_SYNC DIO PCM data frame sync I2S_SCK 256 PCM_CLK DIO PCM clock I2S_DIN 257 PCM_DIN DI PCM data input I2S_DOUT 255 PCM_DOUT DO PCM data output The reference design is illustrated as follows:

In master mode, it is an output signal. In slave mode, it is an input signal. In master mode, it is an output signal. In slave mode, it is an input signal. Figure 25: Reference Circuit of SLIC PCM Interface 4.6.2. PCM for Bluetooth Audio The module provides one PCM interface only used for Bluetooth audio. Pin definition is listed as follows:

RG525F-NA_Hardware_Design 55 / 114 PCM_DINPCM_DOUTPCM_SYNCPCM_CLKModulePCM_CLKPCM_SYNCPCM_DINPCM_DOUTSLIC 5G Module Series Table 19: Pin Definition of Bluetooth PCM Interface Pin Name Pin No. I/O Description Comment PCM_SYNC PCM_CLK PCM_DIN PCM_DOUT 71 73 74 76 DIO PCM data frame sync DIO PCM clock DI PCM data input DO PCM data output If unused, keep them open. The reference design is illustrated as follows:

Figure 26: Reference Circuit of Bluetooth PCM Interface 4.7. UART Interfaces The module provides four UART interfaces: main UART interface, debug UART interface, Bluetooth UART interface* and COEX UART interface*. The following shows their features:

Main UART interface supports 115200 bps baud rate by default. This interface is used for AT command communication. Debug UART interface supports 115200 bps baud rate. It is used for Linux console and log output. Bluetooth UART interface supports 115200 bps baud rate. It is used for Bluetooth communication. It supports RTS and CTS hardware flow control. COEX UART interface is used for Qualcomm WWAN/WLAN coexistence mechanism. Pin definition of the UART interfaces is as follows:

RG525F-NA_Hardware_Design 56 / 114 PCM_DINPCM_DOUTPCM_SYNCPCM_CLKModulePCM_CLKPCM_SYNCPCM_DINPCM_DOUTBluetooth 5G Module Series Table 20: Pin Definition of UART Interfaces Pin Name Pin No. I/O Description Comment MAIN_TXD MAIN_RXD MAIN_RI*

MAIN_DTR 68 70 100 258 MAIN_DCD*

261 BT_TXD*

BT_RXD*

BT_RTS*

BT_CTS*

DBG_RXD DBG_TXD 59 63 61 62 108 105 DO Main UART transmit DI Main UART receive DO Main UART ring indication DI DO Main UART data terminal ready Main UART data carrier detect DO Bluetooth UART transmit 1.8 V power domain. DI DI DO Bluetooth UART receive DTE request to send signal to DCE Connect to DTEs RTS. 1.8 V power domain. DTE clear to send signal from DCE Connect to DTEs CTS. 1.8 V power domain. DI Debug UART receive DO Debug UART transmit 1.8 V power domain. COEX_RXD*

65 DI Coexistence UART receive Used for Qualcomm COEX_TXD*

67 DO Coexistence UART transmit WWAN/WLAN coexistence mechanism. Pin 65 can be multiplexed into SDX2AP_E911 function. Pin 67 can be multiplexed into SDX2AP_STATUS function. For details, please contact Quectel Technical Support. The following figure illustrates the reference design for Bluetooth UART interface. RG525F-NA_Hardware_Design 57 / 114 5G Module Series Figure 27: Reference Circuit of Bluetooth UART Interface The module provides 1.8 V UART interfaces. A voltage-level translator should be used if the application is equipped with a 3.3 V UART interface. Figure 28: Reference Circuit with Voltage-level Translator Another example with transistor circuit is shown as below. For the design of circuits shown in dotted lines, see that shown in solid lines, but pay attention to the direction of connection. RG525F-NA_Hardware_Design 58 / 114 ModuleBT_TXDBT_RXDBT_RTSBT_CTSBT_UART_RXDBT_UART_TXDBT_UART_RTSBT_UART_CTSBluetoothVCCAVCCBOEA1A2A3A4A5A6GNDB1B2B3B4B5B6VDD_1V8MAIN_RIMAIN_DCDMAIN_RXDMAIN_DTRMAIN_TXD51 K51 K0.1 F0.1 FRI_MCUDCD_MCURXD_MCUDTR_MCUTXD_MCUVDD_MCUTranslator 5G Module Series Figure 29: Reference Circuit with Transistor Circuit NOTE 1. Transistor solution is not suitable for applications with high baud rates exceeding 460 kbps. 2. Other baud rates of the main UART are under development. 3. Please note that the module BT_CTS is connected to the host CTS, and the module BT_RTS is connected to the host RTS. 4.8. SDIO Interface The module provides one SDIO interface which supports SD 3.0 protocol for SD card connection. Table 21: Pin Definition of SDIO Interface Pin Name Pin No. I/O Description Comment SDIO_VDD 60 PI SDIO power supply SDIO_DATA0 SDIO_DATA1 SDIO_DATA2 49 50 51 DIO SDIO data bit 0 DIO SDIO data bit 1 DIO SDIO data bit 2 1.8/2.95 V configurable input. If unused, connect it to VDD_EXT. If unused, keep them open. RG525F-NA_Hardware_Design 59 / 114 MCU/ARMTXDRXDVDD_1V810 KVDD_MCU4.7 K10 KVDD_1V8MAIN_RXDMAIN_TXDMAIN_DTRMAIN_RIGNDGPIOMAIN_DCDModuleGPIOEINTVDD_1V84.7 KGND1 nF1 nF 5G Module Series SDIO_DATA3 SDIO_CMD SDIO_CLK 52 48 47 SDIO_PWR_EN 53 SDIO_PWR_ VSET SDIO_DET 56 55 DIO SDIO data bit 3 DIO SDIO command DO DO SDIO clock SDIO power supply enable DO SDIO power domain set DI SD card detect The following figure illustrates a reference design of SDIO interface. Pull it up to VDD_EXT with a 470 k resistor. If unused, keep it open. Figure 30: Reference Circuit of SDIO Interface In SDIO interface design, in order to ensure good communication performance with SD card, the following design principles should be complied with:

The voltage range of SD power supply VDD_2V95 is 2.73.6 V and a sufficient current of up to 0.8 A should be provided. SDIO_VDD_DUAL is an SDIO bus power domain, which can be used for SD card I/O signals pull-up. Note that SDIO_VDD is an input pin for the module. To avoid jitter of bus, pull up SDIO_CMD and SDIO_DATA[0:3] to SDIO_VDD_DUAL with resistors R7 to R11. Value of these resistors are from 10 to 100 k and the recommended value is 100 k. To improve signal quality, it is recommended to add 0 resistors R1 to R6 in series between the module and the SD card connector. The bypass capacitors C1 to C6 are reserved and not mounted by default. All resistors and bypass capacitors should be placed close to the SD card connector. RG525F-NA_Hardware_Design 60 / 114 SD Card ConnectorDAT2CD/DAT3CMDVDDCLKVSSDAT0DAT1DETECTIVEModuleSDIO_DATA3SDIO_DATA2SDIO_DATA1SDIO_VDDSDIO_DATA0SDIO_CLKSDIO_CMDSDIO_DETR1 0RR7100 KR13 470 KVDD_EXTR2 0RR3 0RR4 0RR5 0RR6 0RC2NM27pFC3NM27pFC4NM27pFC5NM27pFC6NM27pFC1NM27pFC833 pF C10 NM-4.7 FTVS Array R8100 K R9100 K R10100 K R11100 K R12NM-100 KLDOSDIO_PWR_ENSDIO_PWR_VSETLDOSDIO_PWR_ENVDD_2V95SDIO_VDD_DUAL C9 1 FR14 200R 5G Module Series For good ESD protection, it is recommended to add ESD protection components with capacitance value less than 1.2 pF on each SD card pin. It is important to route the SDIO signal traces at inner layer with ground surrounded. The impedance of SDIO data trace is 50 (10 %). Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals, etc., as well as noise signals such as clock signals, DC-DC signals, etc. Keep the trace length difference between SDIO_CLK and SDIO_DATA[0:3]/SDIO_CMD less than 2 mm and the total routing length less than 50 mm for SDR104 mode. For other speed modes, the trace length difference between SDIO_CLK and SDIO_DATA[0:3]/SDIO_CMD should be less than 6 mm and the total trace routing length less than 150 mm. Make sure the adjacent trace spacing is twice the trace width and the load capacitance of SDIO bus should be less than 5.0 pF. The DETECTIVE pin of SD card connector must be connected to the module when the SD card function is being used. Table 22: SDC Trace Length in the Module Pin No. Pin Name Length (mm) 49 50 51 52 48 47 SDIO_DATA0 SDIO_DATA1 SDIO_DATA2 SDIO_DATA3 SDIO_CMD SDIO_CLK 31.51 31.69 31.93 31.50 31.57 31.80 4.9. ADC Interface The module provides one Analog-to-Digital Converter (ADC) interface. In order to improve the accuracy of ADC, the trace of ADC interface should be surrounded by ground. Table 23: Pin Definition of ADC Interface Pin Name Pin No. I/O Description ADC0 241 AI General-purpose ADC interface RG525F-NA_Hardware_Design 61 / 114 5G Module Series The voltage on ADC pin can be read via AT+QADC=<port> command:

AT+QADC=0: read the voltage on ADC0. For more details about the AT command, see document [4]. Table 24: Characteristics of ADC Interface Name Min. Typ. ADC0 Voltage Range 0 ADC Input Resistance 10 ADC Resolution ADC Sample Clock

64.879 4.8 Max. 1.875

Unit V M V MHz NOTE 1. The input voltage of ADC should not exceed its corresponding voltage range. It is prohibited to supply any voltage to ADC pin when VBAT is removed. 2. It is recommended to use resistor divider circuit for ADC application. 3. 4.10. SPI Interface*

The module provides one SPI interface which only supports master mode with a maximum clock frequency of up to 50 MHz. Table 25: Pin Definition of SPI Interface Pin Name Pin No. SPI_CLK SPI_CS SPI_MISO SPI_MOSI 210 207 213 204 I/O DO DO DI Description Comment SPI clock SPI chip select SPI master-in slave-out 1.8 V power domain. Only master mode is supported. DO SPI master-out slave-in The module provides a 1.8 V SPI interface. Use a voltage-level translator between the module and the RG525F-NA_Hardware_Design 62 / 114 5G Module Series peripheral device if the peripheral device is 3.3 V power domain. The following figure shows a reference design. Figure 31: Reference Circuit of SPI Interface with a Voltage-level Translator 4.11. PCIe Interface The module provides one integrated PCIe (Peripheral Component Interconnect Express) interface, which follows PCI Express Base Specification Revision 3.0/4.0. The key features of the PCIe interface are mentioned below:

PCI Express Base Specification Revision 3.0/4.0 compliance. Data rate at 8 Gbps per lane for PCIe 3.0 and only lane 0 can be 16 Gbps for PCIe 4.0. Can be used to connect to an external Ethernet IC (MAC and PHY) or Wi-Fi IC. Table 26: Pin Definition of PCIe Interface Pin Name Pin No. I/O Description Comment PCIE_REFCLK_P 40 AIO PCIe reference clock (+) PCIE_REFCLK_M 38 AIO PCIe reference clock (-) PCIE_TX0_M PCIE_TX0_P PCIE_TX1_M PCIE_TX1_P PCIE_RX0_M 44 46 41 43 32 AO AO AO AO AI PCIe transmit 0 (-) PCIe transmit 0 (+) PCIe transmit 1 (-) PCIe transmit 1 (+) PCIe receive 0 (-) Require differential impedance of 85 . One PCIe port that can be either Gen 3 2-lane or Gen 4 1-lane is supported. If unused, keep them open. RG525F-NA_Hardware_Design 63 / 114 VCCAVCCBOEA1A2A3A4NCGNDB1B2B3B4NCVDD_EXTSPI_CSSPI_CLKSPI_MISOSPI_MOSI0.1 F0.1 FSPI_CS_N_MCUSPI_CLK_MCUSPI_MISO_MCUSPI_MOSI_MCUVDD_MCUTranslator 5G Module Series PCIE_RX0_P PCIE_RX1_M PCIE_RX1_P 34 35 37 AI AI AI PCIe receive 0 (+) PCIe receive 1 (-) PCIe receive 1 (+) PCIE_CLKREQ_N 36 OD PCIe clock request PCIE_RST_N 39 DIO PCIe reset PCIE_WAKE_N 30 OD PCIe wake up The following figure illustrates the PCIe interface connection. 1.8 V power domain. In root complex mode, it is an input signal. In endpoint mode, it is an output signal. 1.8 V power domain. In root complex mode, it is an output signal. In endpoint mode, it is an input signal. 1.8 V power domain. In root complex mode, it is an input signal. In endpoint mode, it is an output signal. Figure 32: PCIe Interface Connection RG525F-NA_Hardware_Design 64 / 114 PCIE_TX0_MPCIE_TX0_PPCIE_RST_NPCIE_RX0_PModulePCIE_REFCLK_MPCIE_REFCLK_PPCIE_WAKE_NPCIE_CLKREQ_NPCIE_RX0_MPCIE_CLKREQ_NPCIE_WAKE_NPCIE_RST_NPCIE_REFCLK_PPCIE_REFCLK_MPCIE_RX_MPCIE_RX_PPCIE_TX_PPCIE_TX_MR14.7KR24.7KVDD_EXTC1220 nFC2220 nFC3220 nFC4220 nFR3NM_10KR4 0RR5 0RPCIe Device 5G Module Series The following principles of PCIe interface design should be complied with to meet PCIe specifications. It is important to route the PCIe signal traces as differential pairs with ground surrounded. The differential impedance is 72.597.5 and 85 is recommended. PCIe signals must be protected from noise signals (clocks, DC-DC, RF and so forth). All other sensitive/high-speed signals and circuits must be routed far away from PCIe traces. For each differential pair, intra-lane length match should be less than 0.7 mm. The total bus length should be less than 216 mm for PCIe 4.0 and less than 300 mm for PCIe 3.0. Inter-lane length match, that is, the trace length matching between the reference clock, Tx, and Rx pairs) is not required. The space between Tx and Rx, and the spacing between PCIe lanes and all other signals, should be larger than 4 times of the trace width. PCIe Tx AC coupling capacitors can be anywhere along the line, but better to be placed close to source or connector side to keep good signal integrity of main route on PCB. Ensure not to stagger the capacitors. This can affect the differential integrity of the design and can create EMI. PCIe Tx AC coupling capacitors should be 220 nF for Gen 3/Gen 4, and 100 nF is recommended for Gen 2/Gen 1 application. In the case of trace serpentines, one line of a differential pair must be routed to make up a length delta, then it must be routed at the source (breakout) this ensures that lines stay differential thereafter. To reduce the probability for layer-to-layer manufacturing variation, minimize layer transitions on the main route (in other words, apply layer transitions only at module breakouts and connectors to ensure minimum layer transitions on the main route). Table 27: PCIe Trace Length in the Module Pin No. Pin Name Length (mm) Length Difference (P - M) (mm) 40 38 46 44 43 41 34 32 PCIE_REFCLK_P 10.26 PCIE_REFCLK_M 10.25 PCIE_TX0_P PCIE_TX0_M PCIE_TX1_P PCIE_TX1_M PCIE_RX0_P PCIE_RX0_M 14.63 14.66 12.01 12.01 5.83 5.78 0.01

-0.03 0.00 0.05 RG525F-NA_Hardware_Design 65 / 114 5G Module Series 37 35 PCIE_RX1_P PCIE_RX1_M 6.89 6.87 0.02 4.12. Control Signals Pin definition of control signals is listed as follows:

Table 28: Pin Definition of Control Signals Pin Name Pin No. W_DISABLE#

WL_SW_CTRL 114 180 I/O DI DI Description Airplane mode control 76.8 MHz system clock request 4.12.1. W_DISABLE#

The module provides a W_DISABLE# pin to enable or disable airplane mode through hardware operation. W_DISABLE# is pulled up by default, and driving it low will set the module to airplane mode. The RF function can also be enabled or disabled through software AT commands. Table 29: RF Function Status Logic Level AT Command RF Function Operating Mode AT+CFUN=1 Enable Full functionality mode High Level AT+CFUN=0 Disable Minimum functionality mode Low Level AT+CFUN=4 AT+CFUN=0 AT+CFUN=1 AT+CFUN=4 Disable Airplane mode Disable Airplane mode RG525F-NA_Hardware_Design 66 / 114 5G Module Series 4.13. Indication Signals Pin definition of indication signals is listed as follows:

Table 30: Pin Definition of Indication Signals Pin Name Pin No. I/O Description Comment NET_MODE 240 STATUS 237 NET_STATUS 243 SLEEP_IND 102 DO DO DO DO Indicates whether the module has registered on 5G network Indicates the modules operation status Indicates the modules network activity status Indicates the modules sleep mode 1.8 V power domain. 4.13.1. Network Status Indication The module provides two network indication pins, NET_MODE and NET_STATUS, which can be used to drive network status indication LEDs. The following table describes logic level changes in different network status. Table 31: Working State of the Network Connection Status/Activity Indication Pin Name Status Description NET_MODE Always High Always Low Registered on 5G network Others Flicker slowly (200 ms High/1800 ms Low) Network searching Flicker slowly (1800 ms High/200 ms Low) Idle NET_STATUS Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always High Always Low Voice calling Minimum functionality mode RG525F-NA_Hardware_Design 67 / 114 5G Module Series Figure 33: Reference Circuit of the Network Status Indication 4.13.2. STATUS The STATUS pin indicates the modules operation status. It will output high level when module is powered on successfully. A reference circuit is shown as below. Figure 34: Reference Circuit of STATUS 4.13.3. IPQ Status and Err Fatal Interfaces*

The module provides one IPQ status interface and one Err Fatal interface for connection between the module and IPQ. The following table shows the pin definition. RG525F-NA_Hardware_Design 68 / 114 4.7K47KVBAT2.2KModuleNetwork Indication4.7K47KVBAT2.2KModule STATUS 5G Module Series Table 32: Pin Definition of IPQ Status and Err Fatal Interfaces Pin Name Pin No. Multiplexed Function I/O Description COEX_RXD COEX_TXD GPIO_32 65 67 98 SDX2AP_E911 SDX2AP_STATUS DO DO Module to AP err fatal Module to AP status AP2SDX_STATUS DI AP to module status The following figure shows a reference design of the module with IPQ. Figure 35: Module with IPQ Application NOTE IPQ indicates an application processor, and IPQ5018 is used by default. 1. 2. For details, contact Quectel Technical Support. 4.14. MAIN_RI*

AT+QCFG= "risignaltype", "physical" command can be used to configure MAIN_RI behavior. No matter on which port a URC is presented, the URC will trigger the behavior of MAIN_RI pin. NOTE The URC can be outputted via UART port, USB AT port and USB modem port, which can be set by AT+QURCCFG command. The default port is USB AT port. RG525F-NA_Hardware_Design 69 / 114 SDX2AP_E911SDX2AP_STATUSAP2SDX_STATUSCOEX_RXDCOEX_TXDGPIO_32ModuleIPQ 5018 5G Module Series In addition, MAIN_RI behaviors can be configured flexibly. The default behavior of the MAIN_RI is shown as below. Table 33: Behaviors of the MAIN_RI State Idle URC Response MAIN_RI keeps at high level. MAIN_RI outputs 120 ms low pulse when a new URC returns. The MAIN_RI behavior can be changed via AT+QCFG="urc/ri/ring"*. See document [4] for details. 4.15. Time Service and Repeater Interface*

Time service provides time information for other devices or systems through standard or customized interfaces and protocols. Its basic channels are shortwave, TV signals, cables, networks, satellites, base stations, etc. Repeater is a kind of wireless signal relay device, which amplifies the base station signal and then transmits it to areas with weak signal coverage, expanding the network coverage. With GNSS time service and repeater functions, the module can provide 1PPS pulse output, and can execute time service through AT commands based on baseline SIB9 system messages. Table 34: Pin Definition of Time Service and Repeater Function Pin Name Pin No. I/O Description Comment GPIO_32 98 DO Supports time service and repeater functions;

supports 1PPS pulse output and frame synchronization 1.8 V power domain. Can be multiplexed into AP2SDX_STATUS function. For details, contact Quectel Technical Support. NOTE If GPIO_32 is needed for other purposes, its default function should be disabled in the relevant software configuration. RG525F-NA_Hardware_Design 70 / 114 5G Module Series 5 RF Specifications 5.1. Cellular Network 5.1.1. Antenna Interface & Frequency Bands Pin definition is shown below:

Table 35: Pin Definition of Cellular Network Interface Pin Name Pin No. I/O Description Comment ANT0 130 AIO Antenna 0 interface:

- Refarmed: LMB_TRX0 & HB_TRX1 &

5G NR: n41 TRX1 & n77/n78 TRX0 LTE: LMB_TRX0 & HB_DRX & UHB_TRX0 UHB_TRX0 ANT1 157 AIO

Antenna 1 interface:

5G NR: n41 DRX MIMO & n77/n78 DRX MIMO LTE: LMB_PRX MIMO & HB_DRX MIMO &

UHB_DRX MIMO & LAA_PRX 50 impedance.

- Refarmed: LMB_PRX MIMO & HB_DRX MIMO & UHB_DRX MIMO Antenna 2 interface:

5G NR: n41 PRX MIMO & n77/n78 PRX MIMO LTE: LMB_DRX MIMO & HB_PRX MIMO &

UHB_PRX MIMO & LAA_DRX

- Refarmed: LMB_DRX MIMO & HB_PRX MIMO & UHB_PRX MIMO Antenna 3 interface:

- Refarmed: LMB_TRX1 & HB_TRX0 &

5G NR: n41 TRX0 & n77/n78 TRX1 LTE: LMB_TRX1 & HB_TRX0 & UHB_TRX1 ANT2 166 AIO ANT3 184 AIO ANT6 139 AIO UHB_TRX1 Antenna 6 interface:

5G NR: n77/n78 PRX2 RG525F-NA_Hardware_Design 71 / 114 5G Module Series ANT7 148 AIO ANT8 199 AIO ANT9 208 AIO Antenna 7 interface:

5G NR: n77/n78 DRX2 Antenna 8 interface:

5G NR: n77/n78 PRX3 Antenna 9 interface:

5G NR: n77/n78 DRX3 RG525F-NA_Hardware_Design 72 / 114 5G Module Series Table 36: Cellular Network Antenna Mapping Antenna WCDMA LTE 5G NR Refarmed n41 n77/n78 LB (MHz) MHB (MHz) n77/n78

(MHz) LAA (MHz) TRX1 TRX0 617894 16952690 33004200

DRX MIMO DRX MIMO 617894 16952690 33004200 51505925 PRX MIMO PRX MIMO 617894 16952690 33004200 51505925 LMB_TRX0, HB_DRX, UHB_TRX0 LMB_PRX MIMO, HB_DRX MIMO, UHB_DRX MIMO, LAA_PRX LMB_DRX MIMO, HB_PRX MIMO, UHB_PRX MIMO, LAA_DRX LMB_TRX1, HB_TRX0, UHB_TRX1 LMB_TRX0, HB_TRX1, UHB_TRX0 LMB_PRX MIMO, HB_DRX MIMO, UHB_DRX MIMO LMB_DRX MIMO, HB_PRX MIMO, UHB_PRX MIMO LMB_TRX1, HB_TRX0, UHB_TRX1 ANT0

ANT1

ANT2

ANT3 ANT6 ANT7 ANT8 ANT9

TRX0 TRX1 617894 16952690 33004200

PRX2 DRX2 PRX3 DRX3

33004200 33004200 33004200 33004200

RG525F-NA_Hardware_Design 73 / 114 5G Module Series NOTE 1. LTE L/M/UHB_TRX1 is activated when 5G NR FDD low/middle/ultra high bands are supported in NSA mode. 2. UHB frequency range: 34003800 MHz. 3. TRX0/1 = TX0/1 + PRX/DRX. RG525F-NA_Hardware_Design 74 / 114 5G Module Series 5.1.2. Antenna Tuner Control Interfaces*

The module provides two generic RF control interfaces for the control of external antenna tuners. Table 37: Pin Definition of Antenna Tuner Control Interfaces Pin Name Pin No. I/O Default Status Description Comment SDR_GRFC0 171 SDR_GRFC1 174 DO DO PD PD GRFC interfaces dedicated for external antenna tuner control If unused, keep them open. Table 38: Logic Levels of Antenna Tuner Control Interfaces Parameter VOL VOH Min. 0 1.35 Max. 0.45 1.8 Unit V V Table 39: Truth Table of Antenna Tuner Control Interfaces GRFC0 Level GRFC1 Level Frequency Range (MHz) Band Low Low High High Low High Low High TBD TBD TBD TBD TBD TBD TBD TBD 5.1.3. Tx Power The following table shows the RF output power of the module. Table 40: Tx Power Mode Frequency Bands Max. Tx Power Min. Tx Power LTE LTE bands 23 dBm 2 dB (Class 3)

< -40 dBm RG525F-NA_Hardware_Design 75 / 114 5G Module Series LTE HPUE bands

(B38/B41/B42/B43) 26 dBm 2 dB (Class 2)

< -40 dBm 5G NR bands 23 dBm 2 dB (Class 3)

< -40 dBm 5G NR HPUE bands

(n38/n41/n77/n78) 26 dBm +2/-3 dB (Class 2)

< -40 dBm 5G NR

. NOTE For 5G NR bands, they have different standards for different channel bandwidth, see the specifications as described in Clause 6.3.1 of TS 38.101-1 [2]. 5.1.4. Rx Sensitivity The following table shows conducted RF receiving sensitivity of the module. Table 41: Conducted RF Receiving Sensitivity Frequency LTE-FDD B2

(10 MHz) LTE-FDD B4

(10 MHz) LTE-FDD B5

(10 MHz) LTE-FDD B7

(10 MHz) LTE-FDD B12

(10 MHz) LTE-FDD B13

(10 MHz) LTE-FDD B14

(10 MHz) LTE-FDD B17

(10 MHz) LTE-FDD B25

(10 MHz) LTE-FDD B26

(10 MHz) Receiving Sensitivity (Typ.) Primary Diversity SIMO 3GPP Requirement

(SIMO) TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD

-95.0 dBm

-97.0 dBm

-95.0 dBm

-95.0 dBm

-94.0 dBm

-94.0 dBm

-94.0 dBm

-94.0 dBm

-93.5 dBm

-94.5 dBm RG525F-NA_Hardware_Design 76 / 114 5G Module Series LTE-FDD B29

(10 MHz) LTE-FDD B30

(10 MHz) LTE-TDD B38

(10 MHz) LTE-TDD B41

(10 MHz) LTE-TDD B42

(10 MHz) LTE-TDD B43

(10 MHz) LTE-TDD B46

(10 MHz) LTE-TDD B48

(10 MHz) LTE-FDD B66

(10 MHz) LTE-FDD B71

(10 MHz) 5G NR FDD n2

(20 MHz) 5G NR FDD n5

(20 MHz) 5G NR FDD n7

(20 MHz) 5G NR FDD n12

(10 MHz) 5G NR FDD n13

(10 MHz) 5G NR FDD n14

(10 MHz) 5G NR FDD n25

(20 MHz) 5G NR TDD n26

(20 MHz) 5G NR FDD n29

(10 MHz) 5G NR FDD n30

(10 MHz) 5G NR TDD n38

(20 MHz) 5G NR TDD n41

(100 MHz) TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD

-96.0 dBm

-97.0 dBm

-95.0 dBm

-96.0 dBm

-96.0 dBm TBD

-96.0 dBm

-96.5 dBm

-94.2 dBm

-91.8 dBm

-90.8 dBm

-91.8 dBm

-93.8 dBm TBD

-93.8 dBm

-90.3 dBm

-87.6 dBm TBD

-95.8 dBm

-93.8 dBm

-84.7 dBm RG525F-NA_Hardware_Design 77 / 114 5G Module Series 5G NR TDD n48

(20 MHz) 5G NR FDD n66

(20 MHz) 5G NR FDD n70

(20 MHz) 5G NR FDD n71

(20 MHz) 5G NR TDD n77

(100 MHz) 5G NR TDD n78

(100 MHz) TBD TBD TBD TBD TBD TBD 5.1.5. Reference Design TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD

-92.9 dBm

-93.3 dBm

-93.8 dBm

-86.0 dBm

-85.1 dBm

-85.6 dBm It is recommended to reserve a -type matching circuit for better RF performance, and the -type matching components (C1, R1, and C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. Figure 36: Reference Circuit for Cellular Antenna Interfaces

. NOTE 1. Use a -type circuit for all the antenna circuits to facilitate future debugging. 2. Keep the impedance of the cellular antennas (ANT0/1/2/3/6/7/8/9) traces as 50 when routing. 3. Keep at least 15 dB isolation between RF antennas to improve the receiving sensitivity, and at least 20 dB isolation between 5G NR UL MIMO antennas. RG525F-NA_Hardware_Design 78 / 114 ANT0R10RC1NMC2NMR60RC9NMC10NMANT9Module 5G Module Series 4. The isolation between each antenna traces on PCB is recommended to be more than 75 dB. 5. Keep digital circuits such as switched-mode power supply, (U)SIM card, USB interface, camera module, display connector and SD card away from the antenna traces. 5.2. GNSS The module includes a fully integrated global navigation satellite system solution that supports GPS, GLONASS, BDS, Galileo and QZSS. The module supports standard NMEA 0183 protocol, and outputs NMEA sentences via USB interface

(data update rate: 110 Hz, 1 Hz by default). By default, the modules GNSS function is disabled. It must be enabled via AT+QGPS=1. For more details about GNSS function and its configurations, see document [5]. 5.2.1. Antenna Interface & Frequency Bands The following table shows the pin definition, frequency and performance of GNSS antenna interface. Table 42: Pin Definition of GNSS Antenna Interface Pin Name Pin No. ANT_GNSS 193 I/O AI Description Comment GNSS antenna interface 50 impedance. Table 43: GNSS Frequency Type GPS Frequency Unit 1575.42 1.023 (GPS L1) 1176.45 10.23 (GPS L5) GLONASS 1597.51605.8 Galileo BDS QZSS 1575.42 2.046 (E1) 1176.45 10.23 (E5a) 1561.098 2.046 1575.42 (L1) 1176.45 (L5) MHz RG525F-NA_Hardware_Design 79 / 114 5G Module Series 5.2.2. GNSS Performance Table 44: GNSS Performance Parameter Description Conditions Acquisition Sensitivity Reacquisition Autonomous TTFF Tracking Cold start

@ open sky Warm start

@ open sky Hot start

@ open sky Typ. TBD TBD TBD TBD Autonomous XTRA enabled TBD Autonomous TBD XTRA enabled TBD Autonomous TBD XTRA enabled TBD Unit dBm s Accuracy CEP-50 Autonomous

@ open sky TBD m

. NOTE 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Acquisition sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. 5.2.3. Reference Design The following is the reference circuit of GNSS antenna. RG525F-NA_Hardware_Design 80 / 114 5G Module Series Figure 37: Reference Circuit of GNSS Antenna

. NOTE If the module is designed with a passive antenna, then the VDD circuit is not needed. 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. 3. Keep the characteristic impedance for ANT_GNSS trace as 50 . 4. Place the -type matching components as close to the antenna as possible. 5. Keep digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card away from the antenna traces. 6. The isolation between each antenna traces on PCB is recommended to be more than 75 dB. 7. Keep at least 15 dB isolation between GNSS and cellular antennas to improve the receiving sensitivity. 5.3. RF Routing Guidelines For users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, height from the reference ground to the signal layer (H), and the space between RF traces and grounds

(S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. RG525F-NA_Hardware_Design 81 / 114 GNSS AntennaVDDModuleANT_GNSS47 nH10 R0.1 F0 RNMNM100 pF 5G Module Series Figure 38: Microstrip Design on a 2-layer PCB Figure 39: Coplanar Waveguide Design on a 2-layer PCB Figure 40: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) RG525F-NA_Hardware_Design 82 / 114 5G Module Series Figure 41: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 . The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. The recommended trace angle is 135. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2 W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, see document [6]. 5.4. Antenna Design Requirements Table 45: Antenna Design Requirements Antenna Type GNSS Requirements Frequency range:

L1: 15591609 MHz L5: 11661187 MHz RG525F-NA_Hardware_Design 83 / 114 5G Module Series Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi VSWR: 2 Efficiency: > 30 %

Gain: 1 dBi Max input power: 50 W Input impedance: 50 Polarization: Vertical Cable insertion loss:

< 1 dB: LB (< 1 GHz)

< 1.5 dB: MB (12.3 GHz)

< 2 dB: HB (> 2.3 GHz) 5G NR/LTE NOTE It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of active antenna may generate harmonics affecting the GNSS performance. 5.5. RF Connector Recommendation The receptacle dimensions are illustrated as below. RG525F-NA_Hardware_Design 84 / 114 5G Module Series Figure 42: Dimensions of the Receptacles (Unit: mm) The following figure shows the dimensions of mated plugs using 0.81 mm coaxial cables. Figure 43: Dimensions of Mated Plugs Using 0.81 mm Coaxial Cables (Unit: mm) 5.5.1. Recommended RF Connector for Installation 5.5.1.1. Assemble Coaxial Cable Plug Manually The illustration for plugging in a coaxial cable plug is shown below, = 90 is acceptable, while 90 is not. RG525F-NA_Hardware_Design 85 / 114 5G Module Series Figure 44: Plug In a Coaxial Cable Plug The illustration of pulling out the coaxial cable plug is shown below, = 90 is acceptable, while 90 is not. Figure 45: Pull Out a Coaxial Cable Plug 5.5.1.2. Assemble Coaxial Cable Plug with Jig The pictures of installing the coaxial cable plug with a jig is shown below, = 90 is acceptable, while 90 is not. RG525F-NA_Hardware_Design 86 / 114 5G Module Series Figure 46: Install the Coaxial Cable Plug with Jig 5.5.2. Recommended Manufacturers of RF Connector and Cable RF connectors and cables by I-PEX are recommended. For more details, visit https://www.i-pex.com. RG525F-NA_Hardware_Design 87 / 114 5G Module Series 6 Electrical Characteristics & Reliability 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 46: Absolute Maximum Ratings Parameter VBAT_RF/VBAT_BB USB_VBUS Peak Current of VBAT_BB Peak Current of VBAT_RF Voltage at Digital Pins Voltage at ADC0 Min.

-0.5

-0.3

-0.5

-0.5 6.2. Power Supply Ratings Table 47: Module Power Supply Ratings Max. 6.0 5.5 TBD TBD 2.2 2.2 Unit V V A A V V Parameter Description Conditions Min. Typ. Max. Unit VBAT VBAT_BB and VBAT_RF The actual input voltages must be kept between the minimum and maximum values USB_VBUS USB connection detection

3.3 3.8 4.4 V 3.3 5.0 5.25 V RG525F-NA_Hardware_Design 88 / 114 5G Module Series 6.3. Power Consumption Table 48: Averaged Power Consumption for the Module Mode Conditions Band/Combinations Current Unit Power-off Power off RF Disabled AT+CFUN=0 (USB 3.0 suspend) AT+CFUN=4 (USB 3.0 suspend) Sleep State Idle State SA FDD PF = 64 (USB 3.0 suspend) SA TDD PF = 64 (USB 3.0 suspend) SA PF = 64 (USB 2.0 active) SA PF = 64 (USB 3.0 active) LTE LB @ 23 dBm LTE LTE MB @ 23 dBm LTE HB @ 23 dBm DL 3CA, 256QAM

B5 B1 B7 TBD A TBD TBD mA mA TBD mA TBD mA TBD mA TBD mA TBD TBD mA mA TBD mA LTE CA UL 1CA, 256QAM CA_1A-3A-7A TBD mA Tx power @ 23 dBm 5G NR LB @ 23 dBm 5G NR MB @ 23 dBm 5G NR HB @ 23 dBm 5G NR UHB @ 26 dBm n5 n1 n7 n78 TBD TBD mA mA TBD mA TBD mA 5G NR UL 2 2 MIMO @ 26 dBm n78 TBD mA DL 2CA, 256QAM 5G SA

(1 Tx) 5G SA

(2 Tx) 5G SA CA UL 1CA, 256QAM n78C TBD mA Tx power @ 26 dBm RG525F-NA_Hardware_Design 89 / 114 5G Module Series LTE + 5G EN-DC LTE DL, 256QAM LTE UL QPSK NR DL, 256QAM NR UL QPSK LTE Tx Power @ 23 dBm NR Tx Power @ 23 dBm 6.4. Digital I/O Characteristic Table 49: 1.8 V I/O Requirements Parameter Description Min. 1.26

-0.3 Min. 1.65 1.26

-0.3 Input high voltage Input low voltage Output high voltage 1.35 Output low voltage 0 Table 50: (U)SIM 1.8 V I/O Requirements Parameter Description USIM_VDD Power supply Input high voltage Input low voltage Output high voltage 1.44 Output low voltage 0.0 VIH VIL VOH VOL VIH VIL VOH VOL DC_3A_n78A TBD mA Max. Unit 2.1 0.54 1.8 0.45 V V V V Max. Unit 1.95 2.1 0.36 1.8 0.4 V V V V V RG525F-NA_Hardware_Design 90 / 114 5G Module Series Table 51: (U)SIM 2.95 V I/O Requirements Parameter Description USIM_VDD Power supply Min. 2.7 2.06

-0.3 Input high voltage Input low voltage Output high voltage 2.36 Output low voltage 0.0 VIH VIL VOH VOL Max. Unit 3.05 3.25 0.59 2.95 0.4 V V V V V 6.5. ESD Protection Static electricity occurs naturally and it may damage the module. Therefore, applying proper ESD countermeasures and handling methods is imperative. For example, wear anti-static gloves during the development, production, assembly and testing of the module; add ESD protection components to the ESD sensitive interfaces and points in the product design. ESD characteristics of the modules pins are as follows:

Table 52: Electrostatics Discharge Characteristics (25 C, 45 % Relative Humidity) Tested Interfaces Contact Discharge Air Discharge Unit VBAT, GND All Antenna Interfaces Other Interfaces 5 4 0.5 10 8 1 kV kV kV RG525F-NA_Hardware_Design 91 / 114 5G Module Series 6.6. Operating and Storage Temperatures Table 53: Operating and Storage Temperatures Parameter Operating Temperature Range 10 Min.

-30 Extended Operating Temperature Range 11

-40 Storage Temperature Range

-40 Typ. Max. Unit

+25

+75

+85

+90 C C C 6.7. Thermal Dissipation The module offers the best performance when all internal IC chips are working within their operating temperatures. When the IC chip reaches or exceeds the maximum junction temperature, the module may still work but the performance and function (such as RF output power and data rate) will be affected to a certain extent. Therefore, the thermal design should be maximally optimized to ensure all internal IC chips always work within in the recommended operating temperature. The following principles for thermal consideration are provided for reference:

Keep the module away from heat sources on your PCB, especially high-power components such as processor, power amplifier and power supply. Maintain the integrity of the PCB copper layer and drill as many thermal vias as possible. Follow the principles below when the heatsink is necessary:

- Do not place large size components in the area where the module is mounted on your PCB to reserve enough place for heatsink installation.

- Attach the heatsink to the shielding cover of the module; In general, the heatsink should be larger than the module to cover the module completely;

- Choose the heatsink with adequate fins to dissipate heat;

- Choose a TIM (Thermal Interface Material) with high thermal conductivity, good softness and good wettability and place it between the heatsink and the module;

- Fasten the heatsink with four screws to ensure that it is in close contact with the module to prevent the heatsink from falling off during the drop, vibration test, or transportation. 10 To meet this operating temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module can meet 3GPP specifications. 11 To meet this extended temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module remains the ability to establish and maintain functions such as voice and SMS, without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again. RG525F-NA_Hardware_Design 92 / 114 5G Module Series Figure 47: Placement and Fixing of Heatsink RG525F-NA_Hardware_Design 93 / 114 PCBHeatsinkTIMModuleScrewTIMModuleHeatsinkPCB 5G Module Series 7 Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are 0.2 mm unless otherwise specified. 7.1. Mechanical Dimensions Figure 48: Module Top and Side Dimensions (Unit: mm) RG525F-NA_Hardware_Design 94 / 114 5G Module Series Figure 49: Module Bottom Dimensions (Bottom View, Unit: mm) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard. RG525F-NA_Hardware_Design 95 / 114 5G Module Series 7.2. Recommended Footprint Figure 50: Recommended Footprint

. NOTE 1. Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience. 2. To keep the reliability of the mounting and soldering, keep the motherboard thickness as at least 1.2 mm. RG525F-NA_Hardware_Design 96 / 114 5G Module Series 7.3. Top and Bottom Views Figure 51: Top & Bottom Views of the Module NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. RG525F-NA_Hardware_Design 97 / 114 5G Module Series 8 Storage, Manufacturing & Packaging 8.1. Storage Conditions The module is provided in vacuum-sealed packaging. MSL of the module is rated at 3. The storage requirements are shown below. 1. Recommended Storage Condition: the temperature should be 23 5 C and the relative humidity should be 3560 %. 2. Shelf life (in a vacuum-sealed packaging): 12 months in Recommended Storage Condition. 3. Floor life: 168 hours 12 in a factory where the temperature is 23 5 C and relative humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10 % (e.g., a dry cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement mentioned above;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. 5. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

The module must be soldered to PCB within 24 hours after the baking, otherwise it should be put in a dry environment such as in a dry cabinet. 12 This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. It is recommended to start the solder reflow process within 24 hours after the package is removed if the temperature and moisture do not conform to, or are not sure to conform to IPC/JEDEC J-STD-033. And do not remove the packages of tremendous modules if they are not ready for soldering. RG525F-NA_Hardware_Design 98 / 114 5G Module Series NOTE 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules. 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. Apply proper force on the squeegee to produce a clean stencil surface on a single pass. To guarantee module soldering quality, the thickness of stencil for the module is recommended to be 0.150.18 mm. For more details, see document [7]. The peak reflow temperature should be 235246 C, with 246 C as the absolute maximum reflow temperature. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted only after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 52: Recommended Reflow Soldering Thermal Profile RG525F-NA_Hardware_Design 99 / 114 Temp. (C)Reflow ZoneSoak Zone246200217235CDBA150100 Max slope: 13 C/s Cooling down slope: -1.5 to -3 C/s Max slope: 13 C/s 5G Module Series Table 54: Recommended Thermal Profile Parameters Factor Soak Zone Max slope Recommendation 1 to 3 C/s Soak time (between A and B: 150 C and 200 C) 70 to 120 s Reflow Zone Max slope Reflow time (D: over 217 C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle NOTE 1 to 3 C/s 40 to 70 s 235 to 246 C

-1.5 to -3 C/s 1 1. If a conformal coating is necessary for the module, do NOT use any coating material that may chemically react with the PCB or shielding cover, and prevent the coating material from flowing into the module. 2. Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the module. 3. Due to the complexity of the SMT process, please contact Quectel Technical Support in advance for any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic soldering) that is not mentioned in document [7]. RG525F-NA_Hardware_Design 100 / 114 5G Module Series 8.3. Packaging Specification This chapter describes only the key parameters and process of packaging. All figures below are for reference only. The appearance and structure of the packaging materials are subject to the actual delivery. The module adopts carrier tape packaging and details are as follow:

8.3.1. Carrier Tape Figure 53: Carrier Tape Dimension Drawing Table 55: Carrier Tape Dimension Table (Unit: mm) W 72 P 64 T A0 B0 K0 0.4 45.6 48.6 4.15 K1 6.0 F E 34.2 1.75 RG525F-NA_Hardware_Design 101 / 114 5G Module Series 8.3.2. Plastic Reel Figure 54: Plastic Reel Dimension Drawing Table 56: Plastic Reel Dimension Table (Unit: mm) D1 380 D2 180 W 72.5 8.3.3. Packaging Process Place the module into the carrier tape and use the cover tape to cover it; then wind the heat-sealed carrier tape to the plastic reel and use the protective tape for protection. 1 plastic reel can load 150 modules. Place the packaged plastic reel, 1 humidity indicator card and 1 desiccant bag into a vacuum bag, vacuumize it. RG525F-NA_Hardware_Design 102 / 114 5G Module Series Place the vacuum-packed plastic reel into the pizza box. Put 4 packaged pizza boxes into 1 carton box and seal it. 1 carton box can pack 600 modules. Figure 55: Packaging Process RG525F-NA_Hardware_Design 103 / 114 5G Module Series 9 Appendix A References Table 57: Related Documents Document Name

[1] Quectel_RG525F-NA_CA&EN-DC_Features

[2] Quectel_5G_EVB_User_Guide

[3] Quectel_RTA001-EV_EVB_User_Guide

[4] Quectel_RG520N&RG52xF&RG530F&RM520N&RM530N_Series_AT_Commands_Manual

[5] Quectel_RG520N&RG52xF&RG530F&RM520N&RM530N_Series_GNSS_Application_Note

[6] Quectel_RF_Layout_Application_Note

[7] Quectel_Module_Secondary_SMT_Application_Note

[8] Quectel_RG525F-NA_Reference_Design Table 58: Terms and Abbreviations Abbreviation Description 1PPS ADC 1 Pulse Per Second Analog-to-Digital Converter AMR-WB Adaptive Multi-Rate Wideband AON AP BDS bps Active Optical Network Application Processor BeiDou Navigation Satellite System Bits Per Second RG525F-NA_Hardware_Design 104 / 114 5G Module Series CA CTS DAI DCE DDR DL DRX DRX DTE DTR EN-DC ESD Carrier Aggregation Clear To Send Digital Audio Interface Data Communications Equipment Double Data Rate Downlink Discontinuous Reception Diversity Receive Data Terminal Equipment Data Terminal Ready E-UTRA New Radio Dual Connectivity Electrostatic Discharge E-UTRA Evolved Universal Terrestrial Radio Access FDD FEM FOTA Frequency Division Duplex Front-End Module Firmware Over-The-Air GLONASS Global Navigation Satellite System (Russia) GNSS GPS GRFC HB HPUE IC I2C I2S Global Navigation Satellite System Global Positioning System General RF Control High Band High Power User Equipment Integrated Circuit Inter-Integrated Circuit Inter-IC Sound RG525F-NA_Hardware_Design 105 / 114 5G Module Series I/O LAA LB LED LGA LMHB LNA LTE MAC MB MHB Input/Output License Assisted Access Low Band Light Emitting Diode Land Grid Array Low/Middle/High Band Low Noise Amplifier Long Term Evolution Media Access Control Middle Band Middle/High Band MIMO Multiple Input Multiple Output MO MT NR NSA PA PAP PC PCB PCIe PCM PD PDU PHY Mobile Originated Mobile Terminated New Radio Non-Stand Alone Power Amplifier Password Authentication Protocol Power Class Printed Circuit Board Peripheral Component Interconnect Express Pulse Code Modulation Pull Down Protocol Data Unit Physical Layer RG525F-NA_Hardware_Design 106 / 114 5G Module Series PRX ps QAM QPSK QZSS RF RHCP Rx SA SCS SD SDR SIB SIMO SMD SMS SoC SPI STB TDD TRX TTFF Tx UART UHB Primary Receive Picosecond Quadrature Amplitude Modulation Quadrature Phase Shift Keying Quasi-Zenith Satellite System Radio Frequency Right Hand Circularly Polarized Receive Stand Alone Sub-Carrier Space Secure Digital Software-Defined Radio System Information Block Single Input Multiple Output Surface Mount Device Short Message Service System on a Chip Serial Peripheral Interface Set Top Box Time Division Duplexing Transmit & Receive Time to First Fix Transmit Universal Asynchronous Receiver/Transmitter Ultra High Band RG525F-NA_Hardware_Design 107 / 114 5G Module Series UL UMTS URC USB

(U)SIM VBAT Vmax Vmin Vnom VSWR WCDMA WLAN WWAN XTRA Uplink Universal Mobile Telecommunications System Unsolicited Result Code Universal Serial Bus Universal Subscriber Identity Module Voltage at Battery (Pin) Maximum Voltage Minimum Voltage Nominal Voltage Voltage Standing Wave Ratio Wideband Code Division Multiple Access Wireless Local Area Network Wireless Wide Area Network eXTended Receiver Assistance RG525F-NA_Hardware_Design 108 / 114 5G Module Series 10 Appendix B Operating Frequencies Table 59: Operating Frequencies (5G) 5G n1 n2 n3 n5 n7 n8 n12 n13 n14 n18 n20 n24 n25 n26 n28 n29 n30 n34 n38 Duplex Mode Uplink Operating Frequency Downlink Operating Frequency FDD FDD FDD FDD FDD FDD FDD FDD FDD FDD FDD FDD FDD FDD FDD SDL FDD TDD TDD 19201980 18501910 17101785 824849 21102170 19301990 18051880 869894 25002570 26202690 880915 699716 777787 788798 815830 832862 925960 729746 746756 758768 860875 791821 1626.51660.5 15251559 18501915 19301995 814849 703748

23052315 20102025 25702620 859894 758803 717728 23502360 20102025 25702620 Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz RG525F-NA_Hardware_Design 109 / 114 5G Module Series n39 n40 n41 n46 n47 n48 n50 n51 n53 n65 n66 n67 n70 n71 n74 n75 n76 n77 n78 n79 n80 n81 n82 n83 n84 n85 TDD TDD TDD TDD TDD TDD TDD TDD TDD FDD FDD SDL FDD FDD FDD SDL SDL TDD TDD TDD 18801920 23002400 24962690 51505925 58555925 35503700 14321517 14271432 18801920 23002400 24962690 51505925 58555925 35503700 14321517 14271432 2483.52495 2483.52495 19202010 17101780

21102200 21102200 738758 16951710 19952020 663698 14271470

33004200 33003800 44005000 SUL 17101785 SUL 880915 SUL 832862 SUL SUL 703748 19201980 617652 14751518 14321517 14271432 33004200 33003800 44005000

FDD 698716 728746 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz RG525F-NA_Hardware_Design 110 / 114 5G Module Series n86 n89 n90 n91 n92 n93 n94 n95 n96 n97 n98 n99 n257 n258 n260 n261 SUL SUL TDD FDD FDD FDD FDD SUL TDD SUL SUL SUL

17101780 824849 24962690 832862 832862 880915 880915 20102025 59257125 23002400 18801920 1626.51660.5

24962690 14271432 14321517 14271432 14321517

59257125

26.5029.50 26.5029.50 24.2527.50 24.2527.50 37.0040.00 37.0040.00 27.5028.35 27.5028.35 Table 60: Operating Frequencies (2G + 3G + 4G) 2G

3G B1 4G Duplex Mode Uplink Operating Frequency Downlink Operating Frequency B1 FDD 19201980 21102170 PCS1900 B2/BC1 B2 FDD 18501910 19301990 DCS1800 B3 B3 FDD 17101785 18051880

B4 B4 FDD 17101755 21102155 GSM850 B5/BC0 B5 FDD 824849 869894

B6

FDD 830840 875885 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz GHz GHz GHz GHz Unit MHz MHz MHz MHz MHz MHz RG525F-NA_Hardware_Design 111 / 114 5G Module Series

B7 B7 FDD 25002570 26202690 EGSM900 B8 B8 FDD 880915 925960 MHz MHz

B9 B10 B11 B12 B13 B14

B19 B20 B21 B22

B25 B26

B33 B34 B9 FDD 1749.91784.9 1844.91879.9 MHz B10 FDD 17101770 21102170 MHz B11 FDD 1427.91447.9 1475.91495.9 MHz B12 FDD 699716 729746 B13 FDD 777787 746756 B14 FDD 788798 758768 B17 FDD 704716 734746 B18 FDD 815830 860875 B19 FDD 830845 875890 B20 FDD 832862 791821 MHz MHz MHz MHz MHz MHz MHz B21 FDD 1447.91462.9 1495.91510.9 MHz B22 FDD 34103490 35103590 B24 FDD 1626.51660.5 15251559 B25 FDD 18501915 19301995 B26 FDD 814849 859894 B27 FDD 807824 852869 B28 FDD 703748 758803 B29 FDD 13

717728 B30 FDD 23052315 23502360 MHz MHz MHz MHz MHz MHz MHz MHz B31 FDD 452.5457.5 462.5467.5 MHz B32 FDD 13

14521496 B33 TDD 19001920 19001920 B34 TDD 20102025 20102025 MHz MHz MHz 13 Restricted to E-UTRA operation when carrier aggregation is configured. The downlink operating band is paired with the uplink operating band (external) of the carrier aggregation configuration that supports the configured Pcell. RG525F-NA_Hardware_Design 112 / 114 5G Module Series B35 B36 B37 B38 B39 B40

B35 TDD 18501910 18501910 B36 TDD 19301990 19301990 B37 TDD 19101930 19101930 B38 TDD 25702620 25702620 B39 TDD 18801920 18801920 B40 TDD 23002400 23002400 B41 TDD 24962690 24962690 B42 TDD 34003600 34003600 B43 TDD 36003800 36003800 B44 TDD 703803 703803 B45 TDD 14471467 14471467 B46 TDD 51505925 51505925 B47 TDD 58555925 58555925 B48 TDD 35503700 35503700 B50 TDD 14321517 14321517 B51 TDD 14271432 14271432 B52 TDD 33003400 33003400 B65 FDD 19202010 21102200 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz B66 FDD 14 17101780 21102200 MHz B67 FDD 13

738758 B68 FDD 698728 753783 B69 FDD 13

25702620 B70 FDD 15 16951710 19952020 B71 FDD 663698 617652 MHz MHz MHz MHz MHz

14 The range 21802200 MHz of the DL operating band is restricted to E-UTRA operation when carrier aggregation is configured. 15 The range 20102020 MHz of the DL operating band is restricted to E-UTRA operation when carrier aggregation is configured and Tx-Rx separation is 300 MHz. The range 20052020 MHz of the DL operating band is restricted to E-UTRA operation when carrier aggregation is configured and Tx-Rx separation is 295 MHz. RG525F-NA_Hardware_Design 113 / 114 5G Module Series

B72 FDD 451456 461466 B73 FDD 450455 460465 B74 FDD 14271470 14751518 B75 FDD 13 B76 FDD 13

14321517 14271432 B85 FDD 698716 728746 B87 FDD 410415 420425 B88 FDD 412417 422427 MHz MHz MHz MHz MHz MHz MHz MHz RG525F-NA_Hardware_Design 114 / 114 OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed. Important Note notice that any deviation(s) from the defined parameters of the antenna trace, as described by the instructions, require that the host product manufacturer must notify to Quectel that they wish to change the antenna trace design. In this case, a Class II permissive change application is required to be filed by the USI, or the host manufacturer can take responsibility through the change in FCC ID (new application) procedure followed by a Class II permissive change application End Product Labeling When the module is installed in the host device, the FCC/IC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text: Contains FCC ID: XMR2023RG525FNA Contains IC: 10224A-023RG525FNA. The FCC ID/IC ID can be used only when all FCC/IC compliance requirements are met. Antenna

(1) The antenna must be installed such that 20 cm is maintained between the antenna and users,

(2) The transmitter module may not be co-located with any other transmitter or antenna. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization. To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed Technology Frequency Range (MHz) Antenna Type Max Peak Gain (dBi) LTE/NR Band 2 LTE Band 4 LTE/NR Band 5 LTE/NR Band 7 LTE/NR Band 12 LTE/NR Band 13 LTE/NR Band 14 LTE Band 17 LTE/NR Band 25 LTE/NR Band 26 LTE/NR Band 30 LTE/NR Band 38 LTE/NR Band 41 LTE Band 42 LTE Band 43 LTE/NR Band 48/77/78 LTE/NR Band 66 LTE/NR Band 71 n77 n78 1850 ~ 1910 1710 ~ 1755 824 ~ 849 2500 ~ 2570 699 ~ 716 777 ~ 787 788 ~ 798 704~ 716 1850 ~ 1915 814 ~ 849 2305 ~ 2315 2570 ~ 2620 2496 ~ 2690 3450 ~ 3550 3700 ~ 3800 3550 ~ 3700 1710 ~ 1780 663 ~ 698 3450 ~ 3550 3700 ~ 3980 3450 ~ 3550 3700 ~ 3800 Dipole 9.9 9.9 7.3 9.9 6.5 7.0 7.1 6.6 9.9 7.2 12.9 9.9 6.9 6.9 6.9 12.9 9.9 6.3 6.9 6.9 Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:

- Reorient or relocate the receiving antenna.

- Increase the separation between the equipment and receiver

- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

- Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. List of applicable FCC rules This module has been tested and found to comply with part 22, part 24, part 27, part 90, part 96 requirements for Modular Approval. The modular transmitter is only FCC authorized for the specific rule parts (i.e., FCC transmitter rules) listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification. If the grantee markets their product as being Part 15 Subpart B compliant (when it also contains unintentional-

radiator digital circuity), then the grantee shall provide a notice stating that the final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed. This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator &

your body. Industry Canada Statement This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions:

(1) This device may not cause interference; and

(2) This device must accept any interference, including interference that may cause undesired operation of the device. Le prsent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorise aux deux conditions suivantes:

(1) l'appareil ne doit pas produire de brouillage, et

(2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement."

Radiation Exposure Statement This equipment complies with IC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator & your body Dclaration d'exposition aux radiations:

Cet quipement est conforme aux limites d'exposition aux rayonnements ISED tablies pour un environnement non contrl. Cet quipement doit tre install et utilis avec un minimum de 20 cm de distance entre la source de rayonnement et votre corps. This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Cet appareil est conu uniquement pour les intgrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) 1) L'antenne doit tre installe de telle sorte qu'une distance de 20 cm est respecte entre l'antenne et les utilisateurs, et 2) Le module metteur peut ne pas tre complant avec un autre metteur ou antenne. Tant que les 2 conditions ci-dessus sont remplies, des essais supplmentaires sur l'metteur ne seront pas ncessaires. Toutefois, l'intgrateur OEM est toujours responsable des essais sur son produit final pour toutes exigences de conformit supplmentaires requis pour ce module install. IMPORTANT NOTE:

In the event that these conditions cannot be met (for example certain laptop configurations or colocation with another transmitter), then the Canada authorization is no longer considered valid and the IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate Canada authorization. NOTE IMPORTANTE:

Dans le cas o ces conditions ne peuvent tre satisfaites (par exemple pour certaines configurations d'ordinateur portable ou de certaines co-localisation avec un autre metteur), l'autorisation du Canada n'est plus considr comme valide et l'ID IC ne peut pas tre utilis sur le produit final. Dans ces circonstances, l'intgrateur OEM sera charg de rvaluer le produit final (y compris l'metteur) et l'obtention d'une autorisation distincte au Canada. End Product Labeling This transmitter module is authorized only for use in device where the antenna may be installed such that 20 cm may be maintained between the antenna and users. The final end product must be labeled in a visible area with the following: Contains IC: 10224A-023RG525FNA. Plaque signaltique du produit final Ce module metteur est autoris uniquement pour une utilisation dans un dispositif o l'antenne peut tre installe de telle sorte qu'une distance de 20cm peut tre maintenue entre l'antenne et les utilisateurs. Le produit final doit tre tiquet dans un endroit visible avec l'inscription suivante: "Contient des IC: 10224A-023RG525FNA ". Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Manuel d'information l'utilisateur final L'intgrateur OEM doit tre conscient de ne pas fournir des informations l'utilisateur final quant la faon d'installer ou de supprimer ce module RF dans le manuel de l'utilisateur du produit final qui intgre ce module. Le manuel de l'utilisateur final doit inclure toutes les informations rglementaires requises et avertissements comme indiqu dans ce manuel.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

QIECCTEL Federal Communications Commission 7435 Oakland Mills Road Columbia MD 21046 Subject: Certification designating a U.S. agent for service of process pursuant to Part 2.911(d)(7) To whom it may concern, Quectel Wireless Solutions Company Limited, Grantee Code: XMR (the applicant) certifies that, as of the date of the filing of application, Ikotek USA, Inc., FRN: 0033350331 (the agent) is designated as the U.S. agent for the purpose of accepting service of process on behalf of the applicant. The physical U.S. address and email for the designated agent are:

Physical U.S. address: 9920 Pacific Heights Blvd., Ste. 150, #7025, San Diego, CA 92121 Email: compliance@ikotek.com The applicant accepts to maintain an agent for service of process in the United States for no less than one year after either the grantee has permanently terminated all marketing and importation of the applicable equipment within the U.S., or the conclusion of any Commission-related administrative or judicial proceeding involving the equipment, whichever is later. The agent accepts the designation by (the applicant) as the U.S. agent to accept service of process includes, but is not limited to, delivery of any correspondence, notices, orders, decisions, and requirements of administrative, legal, or judicial process related to Commission proceedings. Signed by the Applicant Signed by the Agent (if different from the Applicant) Name: Jean Hu C Name-dseph M. Peterson Title: Certification Manager Title: President and CEO Email: Jean.hu@quectel.com Email: joe.peterson@ikotek.com Date: 16 February 2023 Date: February 17%, 2023

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Quectel Wireless Solutions Company Limited Confidentiality Request Letter Federal Communications Commission Authorization and Evaluation Division FCC ID: XMR2023RG525FNA Pursuant to Sections 0.457 and 0.459 of the Commissions Rules, we hereby request confidential treatment of information accompanying this application as outlined below:

1. Block Diagram 2. Schematics 3. Operational Description 4. Tune-up procedure 5. BOM List The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these matters might be harmful to the applicant and provide unjustified benefits to its competitors. The applicant understands that pursuant to Rule 0.457, disclosure of this application and all accompanying documentation will not be made before the date of the Grant for this application. Sincerely, _________________ Name: Jean Hu Email: Jean.Hu@Quectel.com Date: 2023-02-19

 

 

Quectel Wireless Solutions Co., Ltd CFR 47 2.911 (d)(5) Attestation To: Federal Communications Commission Authorization and Evaluation Division 7435 Oakland Mills Road Columbia, MD 21046 USA Date: 2023/2/19 FCC ID: XMR2023RG525FNA 1. Attestation Statements Part 2.911(d)(5)(i) Filing, Quectel Wireless Solutions Co., Ltd (the applicant) certifies that the equipment for which authorization is sought is not covered equipment prohibited from receiving an equipment authorization pursuant to section 2.903 of the FCC rules. 2. Attestation Statements Part 2.911(d)(5)(ii) Filing, Quectel Wireless Solutions Co., Ltd (the applicant) certifies that, as of the date of the filing of the application, the applicant is not identified on the Covered List as an entity producing covered equipment and is not an affiliate or subsidiary of an entity identified on the Covered List Sincerely, Name: Jean Hu Email: Jean.Hu@Quectel.com Date: 2023-02-19

 

 

Quectel Wireless Solutions Company Limited Declaration of Authorization We Name: Quectel Wireless Solutions Company Limited Address: Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Declare that:

Name Representative of agent: Marlin Chen Agent Company name:

Address:

MRT Technology (Suzhou) Co., Ltd D8 Building, Youxin Industrial Park, No.2 Tian'edang Rd., Wuzhong Economic Development Zone Suzhou China City:

Country:

is authorized to apply for Certification of the following product(s):

5G Sub-6 GHz LGA Module XMR2023RG525FNA RG525F-NA Product:

FCC ID:

Model No.:

Sincerely, ________________ Name: Jean Hu Email: Jean.Hu@Quectel.com Date: 2023-02-19

 

 

Quectel Wireless Solutions Company Limited Declaration of Conformity Federal Communications Commission Authorization and Evaluation Division FCC ID: XMR2023RG525FNA Please be notified that we, the undersigned, Quectel Wireless Solutions Company Limited declares that the product which bears the above FCC ID is also compliant with the FCC requirements for sDOC. And the sDOC procedure shall be carried out prior to marketing the device in the US. Sincerely, _________________ Name: Jean Hu Email: Jean.Hu@Quectel.com Date: 2023-02-19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Quectel Wireless Solutions Company Limited Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Request for Modular/Limited Modular Approval Date: 2023.02.19 Subject: Manufacturers Declaration for

- Modular Approval

- Split Modular Approval

- Limited Modular Approval - Limited Split Modular Approval Confidentiality Request for: XXMR2023RG525FNA 8 Basic Requirements FCC Part 15.212(a)(1) For Items Marked NO(*), the Limited Module Description Must be Filled Out on the Following Pages Modular Approval Requirement 1. The modular transmitter must have its own RF shielding. This is intended to ensure that the module does not have to rely upon the shielding provided by the device into which it is installed in order for all modular transmitter emissions to comply with FCC limits. It is also intended to prevent coupling between the RF circuitry of the module and any wires or circuits in the device into which the module is installed. Such coupling may result in non-compliant operation. The physical crystal and tuning capacitors may be located external to the shielded radio elements. 15.212(a)(1)(i) Requirement Met

- YES - NO(*) Details: <example The module contains a metal shield which covers all RF components and circuitry. The shield is located on the top of the board next to antenna connector>

2. The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with FCC requirements under conditions of excessive data rates or over-modulation. 15.212(a)(1)(ii)

- YES - NO(*) Details: <example Data to the modulation circuit is buffered as described in the operational description provided with the application>

3. The modular transmitter must have its own power supply regulation on the module. This is intended to ensure that the module will comply with FCC requirements regardless of the design of the power supplying circuitry in the device into which the module is installed. 15.212(a)(1)(iii)

- YES - NO(*) Details: <example The module contains its own power supply regulation. Please refer to schematic filed with this application>

4. The modular transmitter must comply with the antenna and transmission system requirements of 15.203, 15.204(b), 15.204(c), 15.212(a), and 2.929(b). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph 15.212(b). 15.212(a)(1)(iv)

- YES - NO(*) Details: <example The module connects to its antenna using an UFL connector which is considered a non-

standard connector. A list of antennas tested and approved with this device may be found in users manual provided with the application>

5. The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing. This is intended to demonstrate that the module is capable of complying with Part 15 emission limits regardless of the device into which it is eventually installed. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with the module (see Section 15.27(a)). The length of these lines shall be length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified or commercially available (see Section 15.31(i)). 15.212(a)(1)(v)

- YES - NO(*) Details: <example The module was tested stand-alone as shown in test setup photographs filed with this application>

6. The modular transmitter must be labeled with its own FCC ID number, or use an electron display (see KDB Publication 784748). Modular Approval Requirement Requirement Met If using a permanently affixed label with its own FCC ID number, if the FCC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains Transmitter Module FCC ID:

XMR2023RG525FNA or Contains FCC ID: XMR2023RG525FNA Any similar wording that expresses the same meaning may be used. The Grantee may either provide such a label, an example of which must be included in the application for equipment authorization, or, must provide adequate instructions along with the module which explain this requirement. In the latter case, a copy of these instructions must be included in the application for equipment authorization. If the modular transmitter uses an electronic display of the FCC identification number, the information must be readily accessible and visible on the modular transmitter or on the device in which it is installed. If the module is installed inside another device, then the outside of the device into which the module is installed must display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains FCC certified transmitter module(s). Any similar wording that expresses the same meaning may be used. The user manual must include instructions on how to access the electronic display. A copy of these instructions must be included in the application for equipment authorization. 15.212(a)(1)(vi)

- YES - NO(*) Details: <example There is a label on the module as shown in the labeling exhibit filed with this application. Host specific labeling instructions are shown in the installation manual .filed with this application.>

7. The modular transmitter must comply with all specific rule or operating requirements applicable to the transmitter, including all the conditions provided in the integration instructions by the grantee. A copy of these instructions must be included in the application for equipment authorization. For example, there are very strict operational and timing requirements that must be met before a transmitter is authorized for operation under Section 15.231. For instance, data transmission is prohibited, except for operation under Section 15.231(e), in which case there are separate field strength level and timing requirements. Compliance with these requirements must be assured. 15.212(a)(1)(vii)

- YES - NO(*) Details: <example The module complies with FCC Part 15C requirements. Instructions to the OEM installer are provided in the installation manual filed with this application.>

8. The modular transmitter must comply with any applicable RF exposure requirements. For example, FCC Rules in Sections 2.1091, 2.1093 and specific Sections of Part 15, including 15.319(i), 15.407(f), 15.253(f) and 15.255(g), require that Unlicensed PCS, UNII and millimeter wave devices perform routine environmental evaluation for RF Exposure to demonstrate compliance. In addition, spread spectrum transmitters operating under Section 15.247 are required to address RF Exposure compliance in accordance with Section 15.247(b)(4). Modular transmitters approved under other Sections of Part 15, when necessary, may also need to address certain RF Exposure concerns, typically by providing specific installation and operating instructions for users, installers and other interested parties to ensure compliance. 15.212(a)(1)(viii) Details: < The module meets RF exposure in mobile configuration.>

- YES - NO(*) 070920-02b Limited Module Description When Applicable

* If a module does NOT meet one or more of the above 8 requirements, the applicant may request Limited Modular Approval

(LMA). This Limited Modular Approval (LMA) is applied with the understanding that the applicant will demonstrate and will retain control over the final installation of the device, such that compliance of the end product is always assured. The operating condition(s) for the LMA; the module is only approved for use when installed in devices produced by grantee. A description regarding how control of the end product, into which the module will be installed, will be maintained by the applicant/manufacturer, such that full compliance of the end product is always ensured should be provided here. Details: <example - N/A>

Software Considerations KDB 594280 / KDB 442812 (One of the following 2 items must be applied) Requirement 1. For non-Software Defined Radio transmitter modules where software is used to ensure compliance of the device, technical description must be provided about how such control is implemented to ensure prevention of third-party modification; see KDB Publication 594280. Requirement Met

- Provided in Separate Cover Letter

- N/A Details: <example The firmware of the device can not be modified or adjusted by the end user as described in a separate cover letter filed with this application. >

2. For Software Defined Radio (SDR) devices, transmitter module applications must provide a software security description; see KDB Publication 442812.

- Provided in Separate Cover Letter

- N/A Details: <example N/A>

Split Modular Requirements Requirement 1. For split modular transmitters, specific descriptions for secure communications between front-end and control sections, including authentication and restrictions on third-party modifications; also, instructions to third-party integrators on how control is maintained. Provided in Manual

- Provided in Separate Cover Letter

- N/A Details: <example N/A >

070920-02b OEM Integration Manual Guidance KDB 996369 D03 Section 2 Clear and Specific Instructions Describing the Conditions, Limitations, and Procedures for third-parties to use and/or integrate the module into a host device. Requirement Is this module intended for sale to third parties?

- YES

- No, If No, and LMA applies, the applicant can optionally choose to not make the following detailed info public. However there still needs to be basic integration instructions for a users manual and the information below must still be included in the operational description. If the applicant wishes to keep this info confidential, this will require a separate statement cover letter explaining the module is not for sale to third parties and that integration instructions are internal confidential documents. Items required to be in the manual See KDB 996369 D03, Section 2 As of May 1, 2019, the FCC requires ALL the following information to be in the installation manual. Modular transmitter applicants should include information in their instructions for all these items indicating clearly when they are not applicable. For example information on trace antenna design could indicate Not Applicable. Also if a module is limited to only a grantees own products and not intended for sale to third parties, the user instructions may not need to be detailed and the following items can be placed in the operational description, but this should include a cover letter as cited above. 1. List of applicable FCC rules. KDB 996369 D03, Section 2.2 a. Only list rules related to the transmitter. 2. Summarize the specific operational use conditions. KDB 996369 D03, Section 2.3 a. Conditions such as limits on antennas, cable loss, reduction of power for point to 3. Limited Module Procedures. KDB 996369 D03, Section 2.4 point systems, professional installation info a. Describe alternative means that the grantee uses to verify the host meets the necessary limiting conditions b. When RF exposure evaluation is necessary, state how control will be maintained such that compliance is ensured, such as Class II for new hosts, etc. 4. Trace antenna designs. KDB 996369 D03, Section 2.5 a. Layout of trace design, parts list, antenna, connectors, isolation requirements, tests for design verification, and production test procedures for ensuring compliance. If confidential, the method used to keep confidential must be identified and information provided in the operational description. 5. RF exposure considerations. KDB 996369 D03, Section 2.6 a. Clearly and explicitly state conditions that allow host manufacturers to use the module. Two types of instructions are necessary: first to the host manufacturer to define conditions (mobile, portable xx cm from body) and second additional text needed to be provided to the end user in the host product manuals. 6. Antennas. KDB 996369 D03, Section 2.7 a. List of antennas included in the application and all applicable professional installer instructions when applicable. The antenna list shall also identify the antenna types (monopole, PIFA, dipole, etc note that omni-directional is not considered a type) 7. Label and compliance information. KDB 996369 D03, Section 2.8 a. Advice to host integrators that they need to provide a physical or e-label stating Contains FCC ID: with their finished product 8. Information on test modes and additional testing requirements. KDB 996369 D03, Section 2.9 a. Test modes that should be taken into consideration by host integrators including clarifications necessary for stand-alone and simultaneous configurations. b. Provide information on how to configure test modes for evaluation 9. Additional testing, Part 15 Subpart B disclaimer. KDB 996369 D03, Section 2.10

- All Items shown to the left are provided in the Modular Integration Guide (or UM) for Full Modular Approval (MA) or LMA.

- An LMA applies and is approved ONLY for use by the grantee in their own products, and not intended for sale to 3rd parties as provided in a separate cover letter. Therefore the information shown to the left is found in the theory of operation. _____________ Name: Jean Hu Email: Jean.Hu@Quectel.com Date: 2023-02-19 070920-02b