FCC ID: XMR2020RM502QAE LTE-A Cat 12 M.2 Module

RM500Q-AE&RM502Q-AE Hardware Design 5G Module Series Version: 1.0.0 Date: 2020-10-22 Status: Preliminary www.quectel.com 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit:

http://www.quectel.com/support/sales.htm. For technical support, or to report documentation errors, please visit:

http://www.quectel.com/support/technical.htm Or email to support@quectel.com. General Notes Quectel offers the information as a service to its customers. The information provided is based upon customers requirements. Quectel makes every effort to ensure the quality of the information it makes available. Quectel does not make any warranty as to the information contained herein, and does not accept any liability for any injury, loss or damage of any kind incurred by use of or reliance upon the information. All information supplied herein is subject to change without prior notice. Disclaimer While Quectel has made efforts to ensure that the functions and features under development are free from errors, it is possible that these functions and features could contain errors, inaccuracies and omissions. Unless otherwise provided by valid agreement, Quectel makes no warranties of any kind, implied or express, with respect to the use of features and functions under development. To the maximum extent permitted by law, Quectel excludes all liability for any loss or damage suffered in connection with the use of the functions and features under development, regardless of whether such loss or damage may have been foreseeable. Duty of Confidentiality The Receiving Party shall keep confidential all documentation and information provided by Quectel, except when the specific permission has been granted by Quectel. The Receiving Party shall not access or use Quectels documentation and information for any purpose except as expressly provided herein. Furthermore, the Receiving Party shall not disclose any of the Quectel's documentation and information to any third party without the prior written consent by Quectel. For any noncompliance to the above requirements, unauthorized use, or other illegal or malicious use of the documentation and information, Quectel will reserve the right to take legal action. RM500Q-AE&RM502Q-AE_Hardware_Design 2 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Copyright The information contained here is proprietary technical information of Quectel wireless solutions co., ltd. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design. Copyright Quectel Wireless Solutions Co., Ltd. 2020. All rights reserved. RM500Q-AE&RM502Q-AE_Hardware_Design 3 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design About the Document Revision History Version Date Author Description

2020-10-22 Creation of the document 1.0.0 2020-10-22 Preliminary Jared WANG

/Hank LIU Jared WANG

/Hank LIU RM500Q-AE&RM502Q-AE_Hardware_Design 4 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Contents About the Document ................................................................................................................................. 45 Contents ..................................................................................................................................................... 56 Table Index ............................................................................................................................................... 712 Figure Index ........................................................................................................................................... 1015 1 Introduction .................................................................................................................................... 1218 1.1. Safety Information ................................................................................................................. 1319 2 Product Concept ............................................................................................................................ 1420 2.1. General Description .............................................................................................................. 1420 2.2. Key Features ......................................................................................................................... 1521 2.3. Functional Diagram ............................................................................................................... 1723 2.4. Evaluation Board ................................................................................................................... 1824 3.5.2.1. 3.5.2.2. 3 Application Interfaces ................................................................................................................... 1925 3.1. Pin Assignment ..................................................................................................................... 2026 3.2. Pin Description ...................................................................................................................... 2127 3.3. Operating Modes ................................................................................................................... 2632 3.4. Power Supply ........................................................................................................................ 2633 3.4.1. Decrease Voltage Drop .............................................................................................. 2733 3.4.2. Reference Design for Power Supply .......................................................................... 2834 3.5. Turn on and off Scenarios ..................................................................................................... 2935 3.5.1. Turn on the Module .................................................................................................... 2935 3.5.2. Turn off the Module .................................................................................................... 3039 Turn off the Module through FULL_CARD_POWER_OFF# .......................... 3039 Turn off the Module through AT Command .................................................... 3140 3.6. Reset the Module .................................................................................................................. 3242

(U)SIM Interface .................................................................................................................... 3444 3.7. 3.8. USB Interface ........................................................................................................................ 3649 3.9. PCIe Interface ....................................................................................................................... 3951 3.9.1. PCIe Operating Mode ................................................................................................ 3952 3.9.2. USB and PCIe Modes ................................................................................................ 4257 3.10. PCM Interface* ...................................................................................................................... 4362 3.11. Control and Indication Interfaces .......................................................................................... 4564 3.11.1. W_DISABLE1#* ......................................................................................................... 4564 3.11.2. W_DISABLE2#* ......................................................................................................... 4665 3.11.3. WWAN_LED#* ........................................................................................................... 4766 3.11.4. WAKE_ON_WAN#* ................................................................................................... 4867 3.11.5. DPR* .......................................................................................................................... 4868 3.11.6. STATUS* .................................................................................................................... 4968 3.12. Cellular/WLAN Interface* ...................................................................................................... 4968 3.13. Antenna Tuner Control Interface* ......................................................................................... 5069 3.14. Configuration Pins ................................................................................................................. 5070 RM500Q-AE&RM502Q-AE_Hardware_Design 5 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 4 GNSS Receiver ............................................................................................................................... 5272 4.1. General Description .............................................................................................................. 5272 4.2. GNSS Performance .............................................................................................................. 5272 5 Antenna Interfaces ......................................................................................................................... 5474 5.1. RF Antenna Interfaces .......................................................................................................... 5474 5.1.1. Antenna Pin Definition................................................................................................ 5474 5.1.2. RF Antenna Port Mapping ......................................................................................... 5575 5.1.3. Operating Frequency ................................................................................................. 5576 5.1.4. Reference Design of RF Antenna Interface ............................................................... 5677 5.2. GNSS Antenna Interface ...................................................................................................... 5778 5.3. Reference Design of RF Layout ........................................................................................... 5779 5.4. Antenna Connectors ............................................................................................................. 5982 5.4.1 RF Bands Supported by Antenna Connectors ................................................................ 6183 5.5. Antenna Installation .............................................................................................................. 6184 5.5.1. Antenna Requirements .............................................................................................. 6184 5.5.2. Recommended RF Connector for Antenna Installation ............................................. 6285 6 Reliability, Radio and Electrical Characteristics ........................................................................ 6688 6.1. Absolute Maximum Ratings .................................................................................................. 6688 6.2. Power Supply Requirements ................................................................................................ 6688 6.3. I/O Requirements .................................................................................................................. 6789 6.4. Operating and Storage Temperatures .................................................................................. 6789 6.5. Current Consumption ............................................................................................................ 6890 6.6. RF Output Power .................................................................................................................. 7095 6.7. RF Receiving Sensitivity ....................................................................................................... 7196 6.8. ESD Characteristics .............................................................................................................. 7398 6.9. Thermal Dissipation .............................................................................................................. 7399 7 Mechanical Dimensions and Packaging ................................................................................... 76102 7.1. Mechanical Dimensions of the Module ............................................................................... 76102 7.2. Top and Bottom Views of the Module ................................................................................. 77104 7.3. M.2 Connector ..................................................................................................................... 78105 7.4. Packaging ........................................................................................................................... 78106 8 Appendix References .................................................................................................................. 80110 RM500Q-AE&RM502Q-AE_Hardware_Design 6 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Table Index Table 1: Frequency Bands and GNSS Type of RM500Q-AE&RM502Q-AE Module ............................ 1412 Table 2: Key Features of RM500Q-AE&RM502Q-AE ........................................................................... 1513 Table 3: Definition of I/O Parameters ..................................................................................................... 2219 Table 4: Pin Description ......................................................................................................................... 2219 Table 5: Overview of Operating Modes ................................................................................................. 2623 Table 6: Definition of VCC and GND Pins ............................................................................................. 2624 Table 7: Definition of FULL_CARD_POWER_OFF# Pin ....................................................................... 2926 Table 8: Definition of RESET_N Pin ...................................................................................................... 3229 Table 9: Pin Definition of (U)SIM Interfaces .......................................................................................... 3431 Table 10: Pin Definition of USB Interface .............................................................................................. 3734 Table 11: Pin Definition of PCIe Interface .............................................................................................. 3936 Table 12: Pin Definition of PCM Interface .............................................................................................. 4441 Table 13: Pin Definition of Control and Indication Interfaces................................................................. 4542 Table 14: RF Function Status ................................................................................................................ 4643 Table 15: GNSS Function Status ........................................................................................................... 4643 Table 16: Network Status Indications of WWAN_LED# ........................................................................ 4845 Table 17: State of the WAKE_ON_WAN# ............................................................................................. 4845 Table 18: Function of the DPR Signal .................................................................................................... 4946 Table 19: Pin Definition of COEX Interface ........................................................................................... 4946 Table 20: Pin Definition of Antenna Tuner Control Interface ................................................................. 5047 Table 21: Definition of Configuration Pins.............................................................................................. 5047 Table 22: Configuration Pins List of M.2 Specification .......................................................................... 5148 Table 23: GNSS Performance ............................................................................................................... 5249 Table 24: RM500Q-AE&RM502Q-AE Pin Definition of RF Antenna Interfaces .................................... 5451 Table 25: RM500Q-AE & RM502Q-AE RF Antenna Mapping .............................................................. 5552 Table 26: RM500Q-AE&RM502Q-AE Module Operating Frequencies ................................................. 5552 Table 27: GNSS Frequency ................................................................................................................... 5755 Table 28: RF Bands Supported by RM500Q-AE&RM502Q-AE Antenna Connectors .......................... 6159 Table 29: Antenna Requirements .......................................................................................................... 6260 Table 30: Major Specifications of the RF Connector ............................................................................. 6361 Table 31: Absolute Maximum Ratings ................................................................................................... 6664 Table 32: Power Supply Requirements ................................................................................................. 6664 Table 33: I/O Requirements ................................................................................................................... 6765 Table 34: Operating and Storage Temperatures ................................................................................... 6765 Table 35: RM500Q-AE&RM502Q-AE Current Consumption ................................................................ 6866 Table 36: RF Output Power ................................................................................................................... 7171 Table 37: RM500Q-AE&RM502Q-AE Conducted RF Receiving Sensitivity ......................................... 7171 Table 38: Electrostatic Discharge Characteristics (Temperature: 25 C, Humidity: 40 %) ................... 7374 Table 39: Related Documents ................................................................................................................ 8081 Table 40: Terms and Abbreviations ....................................................................................................... 8081

!Table 1: Frequency Bands and GNSS Type of RM500Q-AE&RM502Q-AE_Hardware_Design 7 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design RM500Q-AERM500Q-AE&RM502Q-AE Module .................. !!10

!Table 2: Key Features of RM500Q-AERM500Q-AE&RM502Q-AE .. !

!11

!Table 3: Definition of I/O Parameters ...... !!17

!Table 4: Pin Description .......................... !!17

!Table 5: Definition of VCC and GND Pins!!21

!Table 6: Definition of FULL_CARD_POWER_OFF# Pin!!

!Table 7: Definition of RESET_N Pin ....... !!28

!Table 8: Pin Definition of (U)SIM Interfaces !!

24 30 41

!43 44 45 47

!Table 9: Pin Definition of USB Interface.. !!33

!Table 10: Pin Definition of PCIe Interface !!35

!Table 11: Pin Definition of PCM Interface*!!40

!Table 12: Pin Definition of Control and Indication Interfaces!!

!Table 13: RF Function Status.................. !!41

!Table 14: GNSS Function Status ............ !!42

!Table 15: Network Status Indications of WWAN_LED# Signal!

!Table 16: State of the WAKE_ON_WAN# Signal!!

!Table 17: Function of the DPR Signal ..... !!44

!Table 18: Pin Definition of COEX Interface!!45

!Table 19: Pin Definition of Antenna Tuner Control Interface!!

!Table 20: Definition of Configuration Pins!!46

!Table 21: Configuration Pins List of M.2 Specification!!

!Table 22: GNSS Performance ................ !!48

!Table 23: RM500Q-AERM500Q-AE&RM502Q-AE Pin Definition of RF Antenna Interfaces ............................................................................... !!50

!Table 24: RM500Q-AERM500Q-AE&RM502Q-AE RF Antenna Mapping .. !

!51

!Table 25: RM500Q-AERM500Q-AE&RM502Q-AE Module Operating Frequencies

............................................................................................... !!51

!Table 26: GNSS Frequency .................... !!53

!Table 27: RF Bands Supported by RM500Q-AERM500Q-AE&RM502Q-AE Antenna Connectors .............................................................. !!57

!Table 28: Antenna Requirements ........... !!57

!Table 29: Major Specifications of the RF Connector!!

58

!Table 30: Absolute Maximum Ratings .... !!61

!Table 31: Power Supply Requirements... !!61 RM500Q-AE&RM502Q-AE_Hardware_Design 8 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design

!Table 32: I/O Requirements .................... !!62

!Table 33: Operation and Storage Temperatures !!

!Table 34: RM500Q-AERM500Q-AE&RM502Q-AE Current Consumption .. !

62

!63

!Table 35: RF Output Power ..................... !!68

!Table 36: RM500Q-AERM500Q-AE&RM502Q-AE Conducted RF Receiving Sensitivity ............................................................................... !!68

!Table 37: Electrostatic Discharge Characteristics (Temperature: 25 C, Humidity:

40 %) ...................................................................................... !!71

!Table 38: Related Documents ................. !!78

!Table 39: Terms and Abbreviations ........ !!78 RM500Q-AE&RM502Q-AE_Hardware_Design 9 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure Index Figure 1: Functional Diagram ..................................................................................................................... 18 Figure 2: Pin Assignment ........................................................................................................................... 21 Figure 3: Power Supply Limits during Radio Transmission ....................................................................... 27 Figure 4: Reference Circuit of VCC Pins ................................................................................................... 28 Figure 5: Reference Design of Power Supply ............................................................................................ 28 Figure 6: Turn-on Timing of the Module ..................................................................................................... 29 Figure 7: Turn on the Module with a Host GPIO ........................................................................................ 30 Figure 8: Turn-off Timing through FULL_CARD_POWER_OFF# ............................................................. 31 Figure 9: Turn-off Timing through AT Command and FULL_CARD_POWER_OFF# .............................. 31 Figure 10: Reference Circuit of RESET_N with NPN Driving Circuit ........................................................ 32 Figure 11: Reference Circuit of RESET_N with NMOS Driving Circuit ..................................................... 33 Figure 12: Reference Circuit of RESET_N with Button ................................................... !

Figure 13: Resetting Timing of the Module ................................................................................................ 33 Figure 14: Reference Circuit for Normally Closed (U)SIM Card Connector .............................................. 35 Figure 15: Reference Circuit for Normally Open (U)SIM Card Connector ................................................ 35 Figure 16: Reference Circuit for a 6-Pin (U)SIM Card Connector ............................................................. 36 Figure 17: Reference Circuit of USB 3.1 & 2.0 Interface ........................................................................... 38 Figure 18: PCIe Interface Reference Circuit .............................................................................................. 40 Figure 19: PCIe Power-on Timing Requirements of M.2 Specification ..................................................... 41 Figure 20: PCIe Power-on Timing Requirements of the Module ............................................................... 41 Figure 21: Primary Mode Timing ................................................................................................................ 43 Figure 22: Auxiliary Mode Timing .............................................................................................................. 44 Figure 23: W_DISABLE1# and W_DISABLE2# Reference Circuit ........................................................... 47 Figure 24: WWAN_LED# Reference Circuit .............................................................................................. 47 Figure 25: WAKE_ON_WAN# Signal Reference Circuit ........................................................................... 48 Figure 26: Recommended Circuit of Configuration Pins ........................................................................... 51 Figure 27: RM500Q-AE&RM502Q-AE Reference Circuit of RF Antenna ................................................. 56 Figure 28: Microstrip Design on a 2-layer PCB ......................................................................................... 58 Figure 29: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 58 Figure 30: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 58 Figure 31: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 59 Figure 32: RM500Q-AE Antenna Connectors ........................................................................................... 60 Figure 33: RM502Q-AE Antenna Connectors ........................................................................................... 60 Figure 34: RM500Q-AE&RM502Q-AE RF Connector Dimensions (Unit: mm) ......................................... 63 Figure 35: Specifications of Mating Plugs Using 0.81 mm Coaxial Cables ............................................ 64 Figure 36: Connection between RF Connector and Mating Plug Using 0.81 mm Coaxial Cable .......... 64 Figure 37: Connection between RF Connector and Mating Plug Using 1.13 mm Coaxial Cable .......... 65 Figure 38: Thermal Dissipation Area on Bottom Side of Module .............................................................. 74 Figure 39: Mechanical Dimensions of the Module (Unit: mm) ................................................................... 76 Figure 40: RM500Q-AE Top View and Bottom view ................................................................................. 77 Figure 41: RM502Q-AE Top View and Bottom View ................................................................................. 77 RM500Q-AE&RM502Q-AE_Hardware_Design 10 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 42: Tray Size (Unit: mm) ................................................................................................................. 78 Figure 43: Tray Packaging Procedure ....................................................................................................... 79 RM500Q-AE&RM502Q-AE_Hardware_Design 11 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 1 Introduction The hardware design defines RM500Q-AE&RM502Q-AE and describes the air and hardware interfaces which are connected with customers applications. This document helps you quickly understand the interface specifications, electrical and mechanical details, as well as other related information of RM500Q-AE&RM502Q-AE. To facilitate its application in different fields, reference design is also provided for reference. Associated with application notes and user guides, customers can use the module to design and set up mobile applications easily. This document is applicable to the RM500Q-AE&RM502Q-AE* models:

NOTE

* means under development RM500Q-AE&RM502Q-AE_Hardware_Design 12 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card. When emergency help is needed in such conditions, use emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as mobile phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders. RM500Q-AE&RM502Q-AE_Hardware_Design 13 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 2 Product Concept 2.1. General Description RM500Q-AERM500Q-AE&RM502Q-AE isare a 5G NR/LTE-FDD/LTE-TDD/WCDMA wireless communication modules with receive diversity. It They provides data connectivity on 5G NR SA and NSA, LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA networks with standard PCI Express M.2 interface. It They supports embedded operating systems such as Windows, Linux and Android, and also provides GNSS and voice functionality to meet specific application demands. The following table shows the frequency bands and GNSS type of the module. Table 1: Frequency Bands and GNSS Type of RM500Q-AE&RM502Q-AE Module Mode 5G NR RM500Q-AE&RM502Q-AE n2/n5/n7/n12/n25/n41/n66/n71/n77 LTE-FDD B2/eB4/B5/B7/B12/B13/B14/B17/B25/B26/B30/B66/B71 LTE-TDD B38/B41/B48 WCDMA B2/B4/B5 GNSS GPS/GLONASS/BeiDou/Galileo RM500Q-AE&RM502Q-AE can be applied in the following fields:

Rugged tablet PC and laptop computer Remote monitor system Smart metering system Wireless router and switch RM500Q-AE&RM502Q-AE_Hardware_Design 14 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Other wireless terminal devices 2.2. Key Features The following table describes key features of RM500Q-AE&RM502Q-AE. Table 2: Key Features of RM500Q-AE&RM502Q-AE Feature Details Function Interface PCI Express M.2 Interface Power Supply Supply voltage: 3.1354.4 V Typical supply voltage: 3.7 V Transmitting Power Class 3 (24 dBm +1/-3 dB) for WCDMA bands Class 3 (23 dBm 2 dB) for LTE bands Class 3 (23 dBm 2 dB) for 5G NR bands Class 2 (26 dBm 2 dB) for LTE B38/B40/B41/B42/B43 bands HPUE 1) Class 2 (26 dBm +2/-3 dB) for 5G NR n41/n77/n78/n79 bands HPUE 1) Support 3GPP Rel-.15 Modulations:

Uplink: /2-BPSK, QPSK, 16QAM, 64QAM and 256QAM Downlink: QPSK, 16QAM, 64QAM and 256QAM Support downlink 4 4 MIMO on: n2/n7/25/n41/n66/n77 Support SCS 15 kHz 2) and 30 kHz 2) Supports 5G NR refarmed band bandwidth 20 MHz Supports 5G NR n41/n77 bandwidth 100 MHz Support SA and NSA operation modes Support Option 3x, 3 Aa, and Option 2 Max. transmission data rates 3):

RM500Q-AE NSA : Max 2.5 Gbps(DL)/ 650 Mbps (UL) SA : Max 2.1 Gbps(DL)/ 450 Mbps (UL) RM502Q-AE NSA : Max 5 Gbps(DL)/ 650 Mbps (UL) SA : Max 4.2 Gbps(DL)/ 450 Mbps (UL) Supports 3GPP Rel-15 Support up to CA Cat 16 FDD and TDD Supported modulations:

Uplink: QPSK, 16QAM and 64QAM and 256QAM 5G NR Features LTE Features RM500Q-AE&RM502Q-AE_Hardware_Design 15 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Downlink: QPSK, 16QAM and 64QAM and 256QAM Supports 1.4/3/5/10/15/20 MHz RF bandwidth Support downlink 4 4 MIMO on: B2/B4/B7/B25/B30/B38/B41/B48/B66 Max. transmission data rates 3):

RM500QA-AE LTE: Max 1.0 Gbps(DL)/ 200 Mbps (UL) RM502QA-AE LTE: 2.0 Gbps (DL) /200 Mbps (UL) UMTS Features Support 3GPP R8 DC-HSDPA, HSPA +, HSDPA, HSUPA and WCDMA Support QPSK, 16QAM and 64QAM modulation Max. transmission data rates 2):

DC-HSDPA: Max 42 Mbps (DL) HSUPA: Max 5.76 Mbps (UL) WCDMA: Max 384 kbps (DL)/384 kbps (UL) Internet Protocol Features Support QMI/NTP* protocols Support the protocols PAP and EIRP usually used for PPP connections SMS Text and PDU modes Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default

(U)SIM Interface Support (U)SIM card: Class B (3.0 V) and Class C(1.8 V)

(U)SIM interface Support Single (U)SIM USB Interface Compliant with USB 3.1 and 2.0 specifications, with maximum transmission rates up to 10 Gbps on USB 3.1 and 480 Mbps on USB 2.0. Used for AT command communication, data transmission, firmware upgrade, software debugging, GNSS NMEA sentence output. Support USB serial drivers for: Windows 7/8/8.1/10, Linux 2.65.4, Android 4.x/5.x/6.x/7.x/8.x/9.x/10 PCIe 1 Interface Complaint with PCIe GEN3, support 8 Gbps per lane, PCIe 1. Used for AT command communication, data transmission, firmware upgrade, software debugging, GNSS NMEA sentence output Rx-diversity Support 5G NR/LTE/WCDMA Rx-diversity GNSS Features Gen9 Lite of Qualcomm Protocol: NMEA 0183 Data Update Rate: 1 Hz AT Commands commands Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT Antenna Interfaces ANT0, ANT1, ANT2, and ANT3_GNSSL1 Physical Characteristics Size: (52.0 0.15) mm (30.0 0.15) mm (2.3 0.2) mm Weight: approx. 8.7 RM500Q-AE&RM502Q-AE_Hardware_Design 16 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Temperature Range Operating temperature range: -20 to +60 C 4) Restricted Operating temperature range: -30 to -20 C, +60 to +75 C Extended temperature range: -40 to -30 C, +75 to +85 C 5) Storage temperature range: -40 to +90C Firmware Upgrade USB 2.0 interface, PCIe interface and DFOTA RoHS All hardware components are fully compliant with EU RoHS directive NOTES 1. 2. 3. 4. 5. 6. 1) HPUE is only for single carrier. 2) 5G NR FDD bands only support 15 kHz SCS, NR TDD bands only support 30 kHz SCS. 3) The maximum rates are theoretical and the actual values refer to the network configuration. 4) To meet this operating temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module can meet 3GPP specifications. 54) Within extended temperature range, the module remains the ability to establish and maintain functions such as voice, SMS, data transmission without any unrecoverable malfunction. Radio spectrum and radio network will not be influenced, while one or more specifications, such as Pout may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again.

* means under development. 2.2.2.3. Functional Diagram The following figure shows a block diagram of RM500Q-AERM500Q-AE&RM502Q-AE. Power management Baseband DDR + NAND flash Radio frequency M.2 Key-B interface RM500Q-AE&RM502Q-AE_Hardware_Design 17 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 1: Functional Diagram 2.3.2.4. Evaluation Board To help with the development of applications conveniently with RM500Q-AE&RM502Q-AE, Quectel supplies the evaluation board (PCIe Card EVB), a USB to RS-232 converter cable, a USB type-C cable, antennas and other peripherals to control or test the module. For more details, see document [1]. RM500Q-AE&RM502Q-AE_Hardware_Design 18 / 83 BasebandPMICSub-6 GHzTransceiver ANT0 ANT3_GNSSL1 ANT2ETVCCRESET_N38.4MXOSPMIIQControlTxPRxMIPI/GRFCPCI Express M.2 Key-B InterfaceFULL_CARD_POWER_OFF#W_DISABLE2#USB 2.0 & USB 3.1(U)SIM1WWAN_LED#WAKE_ON_WAN#NAND Flash 4Gb x8LPDDR4X SDRAM 4Gb x16RFFEW_DISABLE1#GPIOsTx/Rx Blocks ANT1PCIe 1GNDDRxGNSS 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 3 Application Interfaces

(U)SIM interfaces The physical connections and signal levels of RM500Q-AE&RM502Q-AE comply with PCI Express M.2 specification. This chapter mainly describes the definition and application of the following interfaces/pins of the module:

Power supply USB interface PCIe interface PCM interface*

Control and indication interfaces*

COEX UART interface*

Antenna tuner control interface*

Configuration pins NOTE

* means under development. RM500Q-AE&RM502Q-AE_Hardware_Design 19 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 3.1. Pin Assignment The following figure shows the pin assignment of the module. The top side contains module and antenna connectors. RM500Q-AE&RM502Q-AE_Hardware_Design 20 / 83 PIN2PIN74BOTPIN1PIN75TOPPin NameNo.CONFIG_275GND73GND71CONFIG_169RESET_N67RFFE_VIO_1V865ANTCTL263ANTCTL161LAA_TX_EN59GND57PCIE_REFCLK_P55PCIE_REFCLK_M53GND51PCIE_RX_P49PCIE_RX_M47GND45PCIE_TX_P43PCIE_TX_M41GND39USB_SS_RX_P37USB_SS_RX_M35GND33USB_SS_TX_P31USB_SS_TX_M29GND27DPR25WAKE_ON_WAN#23CONFIG_021NotchNotchNotchNotchGND11USB_DM9USB_DP7GND5GND3CONFIG_31PIN11PIN10No.Pin Name74VCC72VCC70VCC68AP2SDX_STATUS66USIM_DET64COEX_TXD62COEX_RXD60WLAN_TX_EN58RFFE_DATA56RFFE_CLK54PCIE_WAKE_N52PCIE_CLKREQ_N50PCIE_RST_N48NC46NC44NC42NC40NC38SDX2AP_STATUS36USIM_VDD34USIM_DATA32USIM_CLK30USIM_RST28PCM_SYNC26W_DISABLE2#24PCM_DOUT22PCM_DIN20PCM_CLKNotchNotchNotchNotch10WWAN_LED#8W_DISABLE1#6FULL_CARD_POWER_OFF#4VCC2VCC 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 2: Pin Assignment 3.2. Pin Description RM500Q-AE&RM502Q-AE_Hardware_Design 21 / 83 PIN2PIN74BOTPIN1PIN75TOPPin NameNo.CONFIG_275GND73GND71CONFIG_169RESET_N67RFFE_VIO_1V865ANTCTL263ANTCTL161LAA_TX_EN59GND57PCIE_REFCLK_P55PCIE_REFCLK_M53GND51PCIE_RX_P49PCIE_RX_M47GND45PCIE_TX_P43PCIE_TX_M41GND39USB_SS_RX_P37USB_SS_RX_M35GND33USB_SS_TX_P31USB_SS_TX_M29GND27DPR25WAKE_ON_WAN#23CONFIG_021NotchNotchNotchNotchGND11USB_DM9USB_DP7GND5GND3CONFIG_31PIN11PIN10No.Pin Name74VCC72VCC70VCC68AP2SDX_STATUS66USIM_DET64COEX_TXD62COEX_RXD60WLAN_TX_EN58RFFE_DATA56RFFE_CLK54PCIE_WAKE_N52PCIE_CLKREQ_N50PCIE_RST_N48NC46NC44NC42NC40NC38SDX2AP_STATUS36USIM_VDD34USIM_DATA32USIM_CLK30USIM_RST28PCM_SYNC26W_DISABLE2#24PCM_DOUT22PCM_DIN20PCM_CLKNotchNotchNotchNotch10WWAN_LED#8W_DISABLE1#6FULL_CARD_POWER_OFF#4VCC2VCC 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Table 3: Definition of I/O Parameters Description Analog Input Analog Output Digital Input Digital Output Bidirectional Open Drain Power Input Power Output Type AI AO DI DO IO OD PI PO Pin No. 1 2 3 4 5 6 7 The following table shows the pin definition and description of the module. Table 4: Pin Description Pin Name I/O Description Comment CONFIG_3 DO Not connected internally VCC GND VCC GND PI Power supply PI Power supply Ground Ground FULL_CARD_ POWER_OFF#

DI Turn on/off of the module. USB_DP AI, AO USB 2.0 differential data

(+) Vmin = 3.135 V Vnorm = 3.7 V Vmax = 4.4 V Vmin = 3.135 V Vnorm = 3.7 V Vmax = 4.4 V Internally pulled down with a 100 k resistor. When it is at low level, the module is turned off. When it is at high level, the module is turned on. RM500Q-AE&RM502Q-AE_Hardware_Design 22 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design W_DISABLE1#*

DI 1.8/3.3 V power domain Airplane mode control. Active LOW. USB_DM USB 2.0 differential data (-) AI, AO WWAN_LED#*

OD RF status indication LED It is an open drain and active LOW signal. GND Notch Notch Notch Notch Notch Notch Notch Notch Ground Notch Notch Notch Notch Notch Notch Notch Notch PCM_CLK*

IO PCM data bit clock 1.8 V power domain CONFIG_0 DO Not connected internally PCM_DIN*

DI PCM data input 1.8 V power domain WAKE_ON_WAN#* OD Wake up the host. Open drain Active LOW. PCM_DOUT*

DO PCM data output 1.8 V power domain DPR DI Dynamic power reduction. High level by default. 1.8 V power domain W_DISABLE2#*

DI GNSS disable control. 1.8/3.3 V power domain Active LOW. GND Ground PCM_SYNC *

IO PCM data frame sync 1.8 V power domain USB_SS_TX_M AO USB 3.1 transmit (-) USIM_RST DO

(U)SIM card reset 1.8/3.0 V power domain USB_SS_TX_P AO USB 3.1 transmit data (+) 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 RM500Q-AE&RM502Q-AE_Hardware_Design 23 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design USIM_CLK DO

(U)SIM clock 1.8/3.0 V power domain GND Ground USIM_DATA IO

(U)SIM card data 1.8/3.0 V power domain USB_SS_RX_M AI USB 3.1 super-speed receive (-) USIM_VDD PO

(U)SIM card power supply 1.8/3.0 V power domain USB_SS_RX_P AI USB 3.1 super-speed receive (+) SDX2AP_STATUS DO Status indication to AP 1.8 V power domain PCIE_TX_M AO PCIe transmit (-) PCIE_TX_P AO PCIe transmit (+) GND NC NC NC GND NC NC Ground NC NC NC NC NC Ground AI, AO AI, AO PCIE_RX_M AI PCIe receive (-) PCIE_RX_P AI PCIe receive (+) PCIE_RST_N DI PCIe reset. GND Ground PCIE_CLKREQ_N DO PCIe clock request. PCIE_REFCLK_M PCIe reference clock (-) PCIE_WAKE_N DO PCIe wake up PCIE_REFCLK_P PCIe reference clock (+) Open drain Active LOW. Open drain Active LOW. Open drain Active LOW 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 RM500Q-AE&RM502Q-AE_Hardware_Design 24 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design RFFE_CLK*

DO 1.8 V power domain Used for external MIPI IC control GND Ground RFFE_DATA*

DO 1.8 V power domain LAA_TX_EN DO 1.8 V power domain Used for external MIPI IC control Notification from SDR to WL when LTE transmitting Notification from WL to SDR while transmitting WLAN_TX_EN DI 1.8 V power domain ANTCTL1*

DO Antenna control 1.8 V power domain COEX_RXD DI 1.8 V power domain LTE/WLAN coexistence receive data ANTCTL2*

DO Antenna control 1.8 V power domain COEX_TXD DO 1.8 V power domain LTE/WLAN coexistence transmit data RFFE_VIO_1V8 PO Power supply for RFFE 1.8 V power output USIM_DET DI Internally pulled up to 1.8 V

(U)SIM card insertion detection RESET_N DI Reset the module. Internally pulled up to 1.8 5 V with a 100 k resistor Active LOW. AP2SDX_STATUS DI Status indication from AP 1.8 V power domain CONFIG_1 DO Connected to GND internally VCC GND VCC GND VCC PI Power supply Ground Ground PI Power supply PI Power supply CONFIG_2 DO Not connected internally Vmin = 3.135 V Vnorm = 3.7 V Vmax = 4.4 V Vmin = 3.135 V Vnorm = 3.7 V Vmax = 4.4 V Vmin = 3.135 V Vnorm = 3.7 V Vmax = 4.4 V 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 RM500Q-AE&RM502Q-AE_Hardware_Design 25 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design NOTE 1.Keep all NC, reserved and unused pins unconnected. 2.Pinpin 61/ and Ppin 63 isare used for ANTantenna tuner 3.3. Operating Modes The table below briefly summarizes the various operating modes to be mentioned in the following chapters. Table 5: Overview of Operating Modes Mode Details Normal Operation Idle Software is active. The module has registered on the network, and it is ready to send and receive data. Talk/Data The module is connected to network. In this mode, the power consumption is decided by network setting and data transfer rate. Minimum Functionality Mode AT+CFUN=0 command sets the module to a minimum functionality mode without removing the power supply. In this mode, both RF function and (U)SIM card are invalid. Airplane Mode AT+CFUN=4 command or driving W_DISABLE1#* pin low will set the module to airplane mode. In this mode, the RF function is invalid. In this mode, the current consumption of the module is reduced to the minimal level, while the module keeps receiving paging messages, SMS, voice calls and TCP/UDP data from the network. In this mode, the power management unit shuts down the power supply. Software is inactive, the serial interfaces are inaccessible, and the operating voltage (connected to VCC) remains applied. Sleep Mode Power Down Mode 3.3.3.4. Power Supply The following table shows pin definition of VCC pins and ground pins. Table 665: Definition of VCC and GND Pins Pin No. Pin Name I/O Power Domain Description RM500Q-AE&RM502Q-AE_Hardware_Design 26 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 2, 4, 70, 72, 74 PI 3.1354.4 V 3.7 V typical DC supply 3, 5, 11, 27, 33, 39, 45, 51, 57, 71, 73 VCC GND Ground 3.3.1.3.4.1. Decrease Voltage Drop The power supply range of the module is from 3.135 V to 4.4 V. Please ensure that the input voltage will never drop below 3.135 V, otherwise the module will be powered off automatically. The following figure shows the maximum voltage drop during radio transmission in 3G/4G/5G networks. Figure 3: Power Supply Limits during Radio Transmission The main power supply from an external system must be a single voltage source. To decrease voltage drop, a bypass capacitor of about 100 F with low ESR (ESR = 0.7 ) should be used, and a multi-layer ceramic chip capacitor (MLCC) array also should be used due to its ultra-low ESR. It is recommended to use four ceramic capacitors (1 F, 100 nF, 33 pF, 10 pF) for composing the MLCC array, and place these capacitors close to VCC pins. The width of VCC trace should be no less than 2 mm. In principle, the longer the VCC trace is, the wider it should be. In addition, to guarantee stability of the power supply, please use a zener diode with a reverse zener voltage of 5.1 V and a dissipation power of higher than 0.5 W. The following figure shows a reference circuit of VCC. RM500Q-AE&RM502Q-AE_Hardware_Design 27 / 83 VCCMax Tx powerMin.3.135 VVoltage Ripple< 100mVVoltage DropMax Tx power 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 4: Reference Circuit of VCC Pins 3.3.2.3.4.2. Reference Design for Power Supply Power design for the module is very important, as the performance of the module largely depends on the power source. The power supply is capable of providing a sufficient current of at least 3 A. If the voltage drop between the input and output is not too high, it is suggested that an LDO is used to supply power for the module. If there is a big voltage difference between the input source and the desired output (VCC =

3.7 V Typ.), a buck DC-DC converter is preferred as the power supply. The following figure shows a reference design for +5 V input power source based on the DC-DC TPS54319. The typical output of the power supply is about 3.7 V and the maximum load current is 3 A. Figure 5: Reference Design of Power Supply NOTE To avoid damages to the internal flash, please do not switch off the power supply directly when the module is working. It is suggested that the power supply can be cut off after the module is powered off by pulling down the FULL_CARD_POWER_OFF# pin for more than 10 ss. RM500Q-AE&RM502Q-AE_Hardware_Design 28 / 83 ModulePMU2, 4, 70, 72, 74C1100 FD15.1 V3, 5, 11, 27, 33, 39, 45, 51, 57, 71, 73VCCVCCGNDC510 pFC433 pFC3100 nFC21 F+D1TVSPWR_INC8220 FC1110 pFC1033 pFC9100 nF+R1205kU1Q1NPNR847kR74.7kPWR_ENR4182kPWR_OUTL11.5 HTPS54319VINVINVINENVSNSCOMPRT/CLKSSPHPHPHBOOTPWRGDGNDGNDAGNDVFBR5330k 1%R6100k 1%C6100 nFEP17R280.6kC710 nFR310kC410 nFC5NMVFBC2100 nFC333 pFC1470 F+ 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 3.4.3.5. Turn on and off Scenarios 3.4.1.3.5.1. Turn on the Module FULL_CARD_POWER_OFF# asynchronous signal is an Active Low input that is used to turn off the entire module. When the input signal is asserted high ( 1.19 V), the module will be enabled. When the input signal is driven low signal ( 0.2 V) or Tri-stated, it will force the module to shut down. This input signal is 3.3 V tolerant and can be driven by either 1.8 V or 3.3 V GPIO. Also, it has internally pulled down with a 100 k resistor. The following table shows the definition of FULL_CARD_POWER_OFF#. Table 776: Definition of FULL_CARD_POWER_OFF# Pin Pin No. Pin Name Description DC Characteristics Comment 6 FULL_CARD_ POWER_ OFF#

Turn on/off of the module. VIH(max) = 4.4 V VIH(min) = 1.19 V VIL(max) = 0.2 V The timing of turn-on scenario is illustrated in the following figure. Internally pulled down with a 100 k resistor When it is at low level, the module is powered off. When it is at high level, the module is powered on. Figure 6: Turn-on Timing of the Module RM500Q-AE&RM502Q-AE_Hardware_Design 29 / 83 VCCRESET_NModule power-on or insertion detectionUSIM1_VDD / USIM2_VDDModule StatusFULL_CARD_POWER_OFF#RFFE_VIO_1V8System turn-on and bootingVIH 1.19 V1.8 V or 3.0 VSystem bootingInactiveActivetpower-on tturn-ontbooting68 ms19.7 stUSIMt0 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 3.4.1.1. Turn on the Module with a Host GPIO It is recommended to use a host GPIO to control FULL_CARD_POWER_OFF#. A simple reference circuit is illustrated in the following figure. Figure 7: Turn on the Module with a Host GPIO NOTES 1. 2. 3. tpower-on is the interval between VCC and RESET_N high voltage level. It is measured when RESET_N is not pulled down by the host device. tturn-on is the interval between FULL_CARD_POWER_OFF# high voltage level and RFFE_VIO_1V8

(an internal LDO output) high voltage level, which is typically 68 ms. level. t0 FULL_CARD_POWER_OFF# could be pulled up at any time decided by the host, as shown in figure above. interval between VCC and FULL_CARD_POWER_OFF# high voltage the is 4. tbooting is the interval between RFFE_VIO_1V8 high voltage level and the USIM_VDD power-on. 3.4.2.3.5.2. Turn off the Module 3.4.2.1.3.5.2.1. Turn off the Module through FULL_CARD_POWER_OFF#

For the design that turns on the module with a host GPIO, when the power is supplied to VCC, pulling down the FULL_CARD_POWER_OFF# pin will turn off the module. RM500Q-AE&RM502Q-AE_Hardware_Design 30 / 83 HostModuleFULL_CARD_POWER_OFF#PMUGPIO61.8 V or 3.3 VNote: The voltage of pin 6 should be no less than 1.19 V when it is at HIGH level.R4100k 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design The timing of turning-off scenario is illustrated in the following figure. Figure 8: Turn-off Timing through FULL_CARD_POWER_OFF#

3.4.2.2.3.5.2.2. Turn off the Module through AT Command It is also a safe way to use AT+QPOWD command to turn off the module. For more details about the command, see document [2]. The module is designed to be turned on with a host GPIO. Pull down FULL_CARD_POWER_OFF# pin after the modules USB/PCIe is removed. Otherwise, the module will be powered on again. Figure 9: Turn-off Timing through AT Command and FULL_CARD_POWER_OFF#

RM500Q-AE&RM502Q-AE_Hardware_Design 31 / 83 VCCFULL_CARD_POWER_OFF#RUNNINGOFFModule StatusPower-off procedureRESET_N(H)10 sVCCFULL_CARD_POWER_OFF#RUNNINGOFFModule StatusTurn off procedureRESET_N(H)USB/PCIeAT+QPOWDUSB/PCIe removed 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design NOTE Please pull down FULL_CARD_POWER_OFF# pin immediately or cut off the power supply VCC when the host detects that the module USB/PCIe is removed. 3.6. Reset the Module RESET_N is an asynchronous and active low signal (1.8 5 V logic level). Whenever this pin is active, the module will immediately be placed in a Power On Reset (POR) condition. CAUTION: Triggering the RESET# signal will lead to loss of all data in the modem and the removal of system drivers. It will also disconnect the modem from the network. Table 887: Definition of RESET_N Pin Pin No. Pin Name Description DC Characteristics Comment 67 RESET_N Reset the module VIH(max) = 1.5 V VIH(min) = TBD VIL(max) = TBD Internally pulled up to 1.58 V with a 100 k resistor The module can be reset by pulling down the RESET_N pin for 200700 ms. An open collector/drain driver or button can be used to control the RESET_N pin. Figure 10: Reference Circuit of RESET_N with NPN Driving Circuit RM500Q-AE&RM502Q-AE_Hardware_Design 32 / 83 HostModuleRESET_NResetLogicGPIO67VDD 1.5 VReset pulse200-700 msR1100kR3100kR21kQ1NPN 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 11: Reference Circuit of RESET_N with NMOS Driving Circuit The reset scenario is illustrated in the following figure. Figure 1213: Resetting Timing of the Module RM500Q-AE&RM502Q-AE_Hardware_Design 33 / 83 HostModuleRESET_NResetLogicGPIO67VDD 1.5 VReset pulse200-700 msR1100kR5100kR410RQ2NMOSModuleRESET_NResetLogic67VDD 1.5V200-700 msS1TVSR1100k33 pFC1Note: The capacitor C1 is recommended to be less than 47 pF.VIL 0.5 VVCC200 msResettingModule StatusRunningRESET_NRestart 700 ms 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 3.5.3.7.

(U)SIM Interfaces The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both Class B (3.0 V) and Class C

(1.8 V) (U)SIM cards are supported, and Dual SIM Single Standby* function is supported. Table 998: Pin Definition of (U)SIM Interfaces Pin No. Pin Name I/O Description Comment USIM_VDD PO Power supply for (U)SIM card Class B (3.0 V) and Class C (1.8 V) USIM_DATA IO

(U)SIM card data 1.8/3.0 V power domain USIM_CLK DO

(U)SIM card clock 1.8/3.0 V power domain USIM_RST DO

(U)SIM card reset 1.8/3.0 V power domain USIM_DET DI

(U)SIM card insertion detection. Internally pulled up 36 34 32 30 66 NOTE

* means under development. RM500Q-AE&RM502Q-AE supports (U)SIM card hot-plug via the USIM_DET pin. With a normally closed

(U)SIM card connector, the USIM_DET is normally short-circuited to ground when a (U)SIM card is not inserted, and the USIM_DET will change from low to high voltage level when a (U)SIM card is inserted. The rising edge indicates an insertion of the (U)SIM card. When the (U)SIM card is removed, USIM_DET will change from high to low voltage level. This falling edge indicates a removal of the (U)SIM card. Normally Closed (U)SIM Card Connector:

When the (U)SIM is absent, CD is short-circuited to ground and USIM_DET is at low voltage level. When the (U)SIM is inserted, CD is open from ground and USIM_DET is at high voltage level. The following figure shows a reference design of (U)SIM interface with a normally closed (U)SIM card connector. RM500Q-AE&RM502Q-AE_Hardware_Design 34 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 13: Reference Circuit for Normally Closed (U)SIM Card Connector Normally Open (U)SIM Card Connector:

When the (U)SIM is absent, CD1 is open from CD2 and USIM_DET is at low voltage level. When the (U)SIM is inserted, CD1 is short-circuited to 1.8 V and USIM_DET is at high voltage level. The following figure shows a reference design of (U)SIM interface with a normally open (NO) (U)SIM card connector. Figure 14: Reference Circuit for Normally Open (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_DET disconnected. A reference circuit for (U)SIM card interface with a 6-pin (U)SIM card connector is illustrated by the following figure. RM500Q-AE&RM502Q-AE_Hardware_Design 35 / 83 Module(U)SIM CardConnectorUSIM_DETUSIM_DATAUSIM_CLKRSTCLKCDIOUSIM_VDDUSIM_VDDUSIM_RSTVCCGNDVPPGNDTVSNote: All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout.10-20k22R 22R 22R 33 pF33 pF33 pF100 nFModule(U)SIM CardConnectorUSIM_DETUSIM_DATAUSIM_CLKRSTCLKCD1IOUSIM_VDDUSIM_VDDUSIM_RSTVCCGNDVPPGNDTVSNote: All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout.10-20k22R 22R 22R 33 pF33 pF33 pF100 nF33k1.8 V4.7kCD2 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 15: Reference Circuit for a 6-Pin (U)SIM Card Connector To enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design. Place the (U)SIM card connector as close to the module as possible. Keep the trace length less than 200 mm. Keep (U)SIM card signals away from RF and VCC traces. Make sure the ground between the module and the (U)SIM card connector is short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5 mm to maintain the same electric potential. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. To offer better ESD protection, add a TVS diode array of which the parasitic capacitance should be not higher than 10 pF. Add 22 resistors in series between the module and the (U)SIM card connector to suppress EMI such as spurious transmission, and to enhance ESD protection. The 33 pF capacitors are used to filter out RF interference.

(U)SIM card hot-plug is disabled by default. For USIM_DATA, a 1020 k pull-up resistor must be added near the (U)SIM card connector. 3.6.3.8. USB Interface RM500Q-AE&RM502Q-AE module provides one integrated Universal Serial Bus (USB) interface which complies with the USB 3.1 & 2.0 specifications and supports super speed (10) on USB 3.1 and high RM500Q-AE&RM502Q-AE_Hardware_Design 36 / 83 Module(U)SIM CardConnectorUSIM_DETUSIM_DATAUSIM_CLKRSTCLKIOUSIM_VDDUSIM_VDDUSIM_RSTVCCGNDVPPGNDTVSNote: All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout.10-20k22R 22R 22R 33 pF33 pF33 pF100 nF 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design speed (480 Mbps) and full speed (12 Mbps) modes on USB 2.0. The USB interface is used for AT command communication, data transmission, GNSS NMEA sentence output, software debugging, firmware upgrade and voice over USB*. Please note that only USB 2.0 can be used for firmware upgrade currently. The following table shows the pin definition of USB interface. Table 10109: Pin Definition of USB Interface Pin No. Pin Name I/O Description Comment USB_DP AI/AO USB 2.0 differential data bus (+) USB_DM AI/AO USB 2.0 differential data bus (-) USB_SS_TX_M AO USB 3.1 transmit data (-) USB_SS_TX_P AO USB 3.1 transmit data (+) Require differential impedance of 90 USB_SS_RX_M AI USB 3.1 receive data (-) USB_SS_RX_P AI USB 3.1 receive data (+) 7 9 29 31 35 37 NOTE

* means under development. For more details about the USB 3.1 & 2.0 specifications, please visit http://www.usb.org/home. The USB 2.0 interface is recommended to be reserved for firmware upgrade in designs. The following figure shows a reference circuit of USB 3.1 & 2.0 interface. RM500Q-AE&RM502Q-AE_Hardware_Design 37 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 16: Reference Circuit of USB 3.1 & 2.0 Interface AC coupling capacitors C5 and C6 must be placed close to the host and close to each other. C1 and C2 have been integrated inside the module, so do not place these two capacitors on customers schematic and PCB. In order tTo ensure the signal integrity of USB 2.0 data traces, R1, R2, R3 and R4 must be placed close to the module, and the stubs must be minimized in PCB layout. You should follow the principles below when designing for the USB interface to meet USB 3.1 and 2.0 specifications:

Route the USB signal traces as differential pairs with ground surrounded. The impedance of differential trace of USB 2.0 and 3.1 is 90 . For USB 2.0 signal traces, the trace length should be less than 120 mm, and the differential data pair matching should be less than 2 mm. For USB 3.1 signal traces, length matching of each differential data pair (Tx/Rx) should be less than 0.7 mm, while the matching between Tx and Rx should be less than 10 mm. Do not route signal traces under crystals, oscillators, magnetic devices, PCIe and RF signal traces. Route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and with ground planes above and below. Junction capacitance of the ESD protection device might cause influences on USB data lines, so you should pay attention to the selection of the device. Typically, the stray capacitance should be less than 1.0 pF for USB 2.0, and less than 0.15 pF for USB 3.1. If possible, reserve 0 resistors on USB_DP and USB_DM lines respectively. Keep the ESD protection devices as close to the USB connector as possible. RM500Q-AE&RM502Q-AE_Hardware_Design 38 / 83 HostModuleUSB_DMUSB_DPUSB_SS_RX_PUSB_SS_RX_MUSB_SS_TX_PUSB_SS_TX_MBBUSB_DMUSB_DPUSB_SS_RX_PUSB_SS_RX_MUSB_SS_TX_PUSB_SS_TX_M9737353129ESDTest PointsMinimize these stubs in PCB layout.C5 220 nFC6 220 nFC1 220 nFC2 220 nFR1 0 R2 0 R3 NM-0 R4 NM-0 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 55 53 49 47 43 41 50 52 54 3.7.3.9. PCIe Interface RM500Q-AE&RM502Q-AE modules provides one integrated PCIe (Peripheral Component Interconnect Express) interface which complies with the PCI Express Base Specification, Revision 3.0 and supports up to 8 Gbps per lane. PCI Express Base Specification Revision 3.0 compliant Data rate up to 8 Gbps per lane The following table shows the pin definition of PCIe interface. Table 111110: Pin Definition of PCIe Interface Pin No. Pin Name I/O Description Comment PCIE_REFCLK_P AI/AO PCIe reference clock (+) PCIE_REFCLK_M AI/AO PCIe reference clock (-) PCIE_RX_P AI PCIe receive data (+) PCIE_RX_M AI PCIe receive data (-) PCIE_TX_P AO PCIe transmit data (+) PCIE_TX_M AO PCIe transmit data (-) PCIE_RST_N DI PCIe reset. PCIE_CLKREQ_N DO PCIe clock request. PCIE_WAKE_N DO PCIe wake up 100 MHz. Require differential impedance of 85 Require differential impedance of 85 Require differential impedance of 85 Open drain Active LOW. Open drain Active LOW. Open drain Active LOW. 3.7.1.3.9.1. PCIe Operating Mode RM500Q-AE&RM502Q-AE supports endpoint (EP) mode and root complex (RC) mode. In EP mode, the module is configured as a PCIe EP device. In RC mode, the module is configured as a PCIe root complex. The following figure shows a reference circuit for the PCIe interface. RM500Q-AE&RM502Q-AE_Hardware_Design 39 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 17: PCIe Interface Reference Circuit AT+QCFG="pcie/mode" is used to set PCIe RC/EP mode. For more details about the command, see document [2]. To ensure the signal integrity of PCIe interface, AC coupling capacitors C5 and C6 should be placed close to the host on PCB. C1 and C2 have been embedded into the module, so do not place these two capacitors on your schematic and PCB. RM500Q-AE&RM502Q-AE_Hardware_Design 40 / 83 HostModulePCIE_REFCLK_PPCIE_REFCLK_MPCIE_RX_PPCIE_RX_MPCIE_TX_PPCIE_TX_MBBPCIE_REFCLK_PPCIE_REFCLK_MPCIE_RX_PPCIE_RX_MPCIE_TX_PPCIE_TX_M555349474341PCIE_CLKREQ_NPCIE_RST_NPCIE_WAKE_NPCIE_CLKREQ_NPCIE_RST_NPCIE_WAKE_N545250Note: The voltage level of VCC_IO_HOST depends on the host side due to the open drain in pins 50, 52 and 54.C6 220 nFC5 220 nFC2 220 nFC1 220 nFR1100kR2100kR3100kVCC_IO_HOSTR5 0RR4 0R 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 18: PCIe Power-on Timing Requirements of M.2 Specification Figure 19: PCIe Power-on Timing Requirements of the Module The following principles of PCIe interface design should be complied with, so as to meet PCIe specification. Keep the PCIe data and control signals away from sensitive circuits and signals, such as RF, audio, crystal and oscillator signals. Add a capacitor in series on Tx/Rx traces to prevent any DC bias. Keep the maximum trace length less than 300 mm. Keep the length matching of each differential data pair (Tx/Rx) less than 0.7 mm for PCIe routing traces. RM500Q-AE&RM502Q-AE_Hardware_Design 41 / 83 VCCModule power-on or insertion detectionPICE_REFCLKRFFE_VIO_1V8System turn-on and bootingtturn-on68 ms23 msPICE_RST_NTPERST#_CLK 100 usTPVPGL 100 msVIH 1.19 Vtpower-onFULL_CARD_POWER_OFFRESET_N 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Keep the differential impedance of PCIe data trace as 85 10 %. You must not route PCIe data traces under components or cross them with other traces. 3.7.2.3.9.2. USB and PCIe Modes RM500Q-AE&RM502Q-AE supports to communicate through both USB and PCIe interfaces, respectively referring to the USB mode and the PCIe mode, as described below:

USB Mode Supports all USB 2.0/3.1 features Supports MBIM/QMI/QRTR/AT Communication can be switched to PCIe mode by AT command USB is the default communication interface between RM500Q-AE&RM502Q-AE module and a host. To use PCIe interface for the communication between a host, an AT command under USB mode can be used. For more details about the AT command, see document [2]. It is suggested that USB 2.0 interface be reserved for firmware upgrade. USB-AT-based PCIe Mode Supports MBIM/QMI/QRTR/AT Communication can be switched back to USB mode by AT command When RM500Q-AE&RM502Q-AE module works at the USB-AT-based (switched from USB mode by AT command) PCIe mode, it supports MBIM/QMI/QRTR/AT, and can be switched back to USB mode by AT command. But the firmware upgrade via PCIe interface is not supported, so USB 2.0 interface must be reserved for the firmware upgrade. eFuse-based PCIe Mode Supports MBIM/QMI/QRTR/AT Supports Non-X86 systems and X86 system (supports BIOS PCIe early initial) RM500Q-AE&RM502Q-AE can also be reprogrammed to PCIe mode based on eFuse. If the communication is switched to PCIe mode by burnt eFuse, the communication cannot be switched back to USB mode. Note that if the host does not support firmware upgrade through PCIe, then RM500Q-AE&RM502Q-AE USB 2.0 interface (Pin 7 and Pin 9) and two test points (VREG_L6E_1P8 and FORCE_USB_BOOT, RM500Q-AE&RM502Q-AE_Hardware_Design 42 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design reserved on bottom side) must be used for the firmware upgrade. Also, the firmware can be upgraded by the PCIe Card EVB, which could be inserted into a PC. For more details, see document [1]. 3.8.3.10. PCM Interface*

RM500Q-AE&RM502Q-AE module supports audio communication via Pulse Code Modulation (PCM) digital interface. The PCM interface supports the following modes:

Primary mode (short frame synchronization): the module works as both master and slave Auxiliary mode (long frame synchronization): the module works as master only In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and also supports 4096 kHz PCM_CLK at 16 kHz PCM_SYNC. In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC rising edge represents the MSB. In this mode, PCM interface operates with a 256 kHz PCM_CLK and an 8 kHz, 50 % duty cycle PCM_SYNC only. The module supports 16-bit linear data format. The following figures show the primary modes timing relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK, as well as the auxiliary modes timing relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK. Figure 2021: Primary Mode Timing RM500Q-AE&RM502Q-AE_Hardware_Design 43 / 83 PCM_CLKPCM_SYNCPCM_DOUTMSBLSBMSB125 s12256255PCM_DINMSBLSBMSB 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 2122: Auxiliary Mode Timing The following table shows the pin definition of PCM interface which can be applied to audio codec design. Table 121211: Pin Definition of PCM Interface*

Pin No. Pin Name I/O Description Comment 20 PCM_CLK IO PCM data bit clock 1.8 V power domain In master mode, it is an output signal. In slave mode, it is an input signal. If unused, keep it open. PCM_DIN DI PCM data input 1.8 V power domain PCM_DOUT DO PCM data output 1.8 V power domain PCM_SYNC IO PCM data frame sync 1.8 V power domain The clock and mode can be configured by AT command, and the default configuration is master mode using short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. See document [2] for details about AT+QDAI command. 22 24 28 NOTE

* means under development. RM500Q-AE&RM502Q-AE_Hardware_Design 44 / 83 PCM_CLKPCM_SYNCPCM_DOUTMSBLSBPCM_DIN125 sMSB123231LSB 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 3.9.3.11. Control and Indication Interfaces The following table shows the pin definition of control and indication pins. Table 131312: Pin Definition of Control and Indication Interfaces Pin No. Pin Name I/O Description Comment W_DISABLE1#*

DI Airplane mode control. Active LOW. 1.8/3.3 V WWAN_LED#*

OD Indicate RF status of the module. WAKE_ON_WAN#* OD Wake up the host. 25 DPR*

DI Dynamic power reduction. W_DISABLE2#*

DI GNSS disable control. Open drain and active low signal. Open drain and active low signal. 1.8 V power domain. High voltage level by default. 1.8/3.3 V power domain. Active LOW. SDX2AP_STATUS DO Status indication to AP 1.8 V power domain AP2SDX_STATUS DI Status indication from AP 1.8 V power domain NOTE

* means under development. 3.9.1.3.11.1. W_DISABLE1#*

The module provides a W_DISABLE1# pin to disable or enable airplane mode through hardware operation. The W_DISABLE1# pin is pulled up by default. Driving it low will set the module to airplane mode. In airplane mode, the RF function will be disabled. The RF function can also be enabled or disabled through software AT commands. The following table shows the RF function status of the module. 8 10 23 26 38 68 RM500Q-AE&RM502Q-AE_Hardware_Design 45 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Table 141413: RF Function Status W_DISABLE1# Level AT Commands RF Function Status High Level AT+CFUN=1 Enabled High Level Low Level AT+CFUN=0 AT+CFUN=4 AT+CFUN=0 AT+CFUN=1 AT+CFUN=4 Disabled Disabled 3.9.2.3.11.2. W_DISABLE2#*

RM500Q-AERM500Q-AE&RM502Q-AE module provides a W_DISABLE2# pin to disable or enable the GNSS function. The W_DISABLE2# pin is pulled up by default. Driving it low will disable the GNSS function. The combination of W_DISABLE2# pin and AT commands can control the GNSS function. Table 151514: GNSS Function Status W_DISABLE2# Level AT Commands GNSS Function Status High Level AT+QGPS=1 Enabled High Level AT+QGPSEND Low Level AT+QGPS=1 Disabled Low Level AT+QGPSEND A simple level shifter based on diodes is used on W_DISABLE1# pin and W_DISABLE2# pin which are pulled up to a 1.8 V voltage in the module, as shown in the following figure. So the control signals (GPIO) of the host device could be aat 1.8 V or 3.3 V voltage level. W_DISABLE1# and W_DISABLE2# are active low signals, and a reference circuit is shown as below. RM500Q-AE&RM502Q-AE_Hardware_Design 46 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 22: W_DISABLE1# and W_DISABLE2# Reference Circuit 3.9.3. Figure 26: W_DISABLE1# and W_DISABLE2# Reference Circuit 3.9.4.3.11.3. WWAN_LED#*

The WWAN_LED# signal is used to indicate RF status of the module, and its sink current is up to 10 mA. In order tTo reduce current consumption of the LED, a current-limited resistor must be placed in series with the LED, as illustrated in the figure below. The LED is ON when the WWAN_LED# signal is at low level. Figure 23: WWAN_LED# Reference Circuit The following table shows the RF status indicated by WWAN_LED# . RM500Q-AE&RM502Q-AE_Hardware_Design 47 / 83 HostModuleW_DISABLE2#W_DISABLE1#BBGPIOGPIO268VDD 1.8 VNote: The voltage level of VCC_IO_HOST could be 1.8 V or 3.3 V typically.R3100kR2100kR510kVCC_IO_HOSTR610kHostModuleWWAN_LED#PMUGPIO10VCCNote: This VCC could be the power supply of the module.LEDR1330 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Table 161615: Network Status Indications of WWAN_LED#

WWAN_LED# Level Description Low Level (LED ON) RF function is turned on RF function is turned off if any of the following occurs:

The (U)SIM card is not powered. W_DISABLE1# is at low level (airplane mode enabled). AT+CFUN=4 (RF function disabled). High Level (LED OFF) 3.9.5.3.11.4. WAKE_ON_WAN#*

The WAKE_ON_WAN# is an open drain pin, which requires a pull-up resistor on the host. When a URC returns, a 1 s low level pulse signal will be outputted to wake up the host. The module operation status indicated by WAKE_ON_WAN# is shown as below. Table 171716: State of the WAKE_ON_WAN#

WAKE_ON_WAN# State Module Operation Status Output a 1 s low level pulse signal Call/SMS/Data is incoming (to wake up the host) Always at high level Idle/Sleep Figure 24: WAKE_ON_WAN# Signal Reference Circuit 3.9.6.3.11.5. DPR*

RM500Q-AE&RM502Q-AE module provides a DPR (Dynamic Power Reduction) pin for body SAR RM500Q-AE&RM502Q-AE_Hardware_Design 48 / 83 HostModuleWAKE_ON_WAN#BBGPIO23VCC_IO_HOSTNote: The voltage level on VCC_IO_HOST depends on the host side due to the open drain in pin 23.Wake up the host1sHLR110k 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design

(Specific Absorption Rate) detection. The signal is sent from a host system proximity sensor to the module to provide an input trigger, which will reduce the output power in radio transmission. Table 181817: Function of the DPR Signal DPR Level Function High/Floating NO max. transmitting power backoff Low Max. transmitting power backoff by AT+QCFG="sarcfg"

NOTE See document [2] for more details about AT+QCFG="sarcfg" command. 3.9.7.3.11.6. STATUS*

RM500Q-AE&RM502Q-AE module provides two status indication pins for communication with IPQ807x device. Pin 38 (SDX2AP_STATUS) outputs the status indication signal to IPQ807x device, and pin 68

(AP2SDX_STATUS) inputs the status indication signal from IPQ807x device. 3.10.3.12. Cellular/WLAN Interface*

RM500Q-AE&RM502Q-AE module provides a cellular/WLAN COEX interface, the following table shows the pin definition of this interface. Table 191918: Pin Definition of COEX Interface Pin No. Pin Name I/O Description Comment 62 64 59 60 COEX_RXD*

DI LTE/WLAN coexistence receive 1.8 V power domain COEX_TXD*

DO LTE/WLAN coexistence transmit 1.8 V power domain LAA_TX_EN*

DO 1.8 V power domain Notification from SDR to WL when LTE transmitting Notification from WL to SDR while transmitting WLAN_TX_EN* DI 1.8 V power domain RM500Q-AE&RM502Q-AE_Hardware_Design 49 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design NOTE

* means under development. 3.11.3.13. Antenna Tuner Control Interface*

ANTCTL[1:2] are used for antenna tuner control and should be routed to an appropriate antenna control circuit. More details about the interface will be added in the future version of this document. Table 202019: Pin Definition of Antenna Tuner Control Interface Pin No. Pin Name I/O Description DC Characteristics Used for external MIPI IC control. Antenna Control VOLmax = 0.45 V VOHmin = 1.35 V VOHmax = 1.8 V VOLmax = 0.45 V VOHmin = 1.35 V VOHmax = 1.8 V RFFE_CLK*

DO RFFE_CLKDAT A ANTCTL1*

ANTCTL2*

DO DO DO 56 58 61 63 NOTE

* means under development. 3.12.3.14. Configuration Pins RM500Q-AE&RM502Q-AE module provides four configuration pins, which are defined as below. Table 21: Definition of Configuration Pins Pin No. Pin Name Power Domain Description 21 CONFIG_0 0 Not connected internally I/O DO RM500Q-AE&RM502Q-AE_Hardware_Design 50 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 69 75 1 CONFIG_1 CONFIG_2 CONFIG_3 DO DO DO 0 0 0 Connected to GND internally Not connected internally Not connected internally The following figure shows a reference circuit of these four pins. Figure 25: Recommended Circuit of Configuration Pins Table 222221: Configuration Pins List of M.2 Specification Config_0

(Pin 21) Config_1

(Pin 69) Config_2

(Pin 75) Config_3

(Pin 1) Module Type and Main Host Interface Port Configuration NC GND NC NC Quectel defined N/A RM500Q-AE&RM502Q-AE_Hardware_Design 51 / 83 HostModuleCONFIG_0CONFIG_1CONFIG_2CONFIG_3GPIOGPIOGPIOGPIO2169751VCC_IO_HOSTR110kR210kR310kR410kNM-0 NM-0 NM-0 0 Note: The voltage level of VCC_IO_HOST depends on the host side and could be 1.8 V or 3.3 V. 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 4 GNSS Receiver 4.1. General Description RM500Q-AE&RM502Q-AE module includes a fully integrated global navigation satellite system solution that supports Gen9-Lite of Qualcomm (GPS, GLONASS, BeiDou/Compass, and Galileo). The module supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, the module GNSS engine is switched off. It has to be switched on via AT command. For more details about GNSS engine technology and configurations, see document [3]. 4.2. GNSS Performance The following table shows GNSS performance of RM500Q-AE&RM502Q-AE. Table 232322: GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) TTFF

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous Cold start

@ open sky Warm start

@ open sky Autonomous XTRA enabled Autonomous XTRA enabled Typ. TBD TBD TBD TBD TBD TBD TBD Unit dBm dBm dBm s s s s RM500Q-AE&RM502Q-AE_Hardware_Design 52 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Hot start

@ open sky CEP-50 Autonomous XTRA enabled Autonomous

@ open sky TBD TBD TBD s s m 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock positioning for at least 3 minutes continuously). within 3 minutes after the loss of lock. 3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. Accuracy

(GNSS) NOTES RM500Q-AE&RM502Q-AE_Hardware_Design 53 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 5 Antenna Interfaces RM500Q-AE&RM502Q-AE provides four antenna interfaces, the impedance of antenna port is 50 . 5.1. RF Antenna Interfaces 5.1.1. Antenna Pin Definition The pin definition of RF antenna interfaces is shown below. Table 24: RM500Q-AE&RM502Q-AE Pin Definition of RF Antenna Interfaces Pin Name I/O Description Comment ANT0 AI/AO 50 impedance Antenna0 interface:

5G NR: MHB_TRx & n41/n77/n78/n79_PRX MIMO;

LTE: MHB_TRx & UHB_PRX MIMO WCDMA: MHB_TRx Antenna1 interface:

5G NR: LB_TRx & MHB_DRx MIMO &

n41_DRX & n77/n78/n79_DRx MIMO LTE: LB_TRx & MHB_DRx MIMO & UHB_DRx MIMO &

LAA_PRx WCDMA: LB_TRx Antenna2 interface:, 5G NR: MHB_PRX MIMO & n41/n77/n78/n79 TRX LTE: LB_DRX & MHB_PRX MIMO & UHB_TRX WCDMA: LB_DRX Antenna3 interface:, 5G NR: n41_DRX MIMO & n77/n78/n79_DRX LTE: MHB_DRX & UHB_DRX & LAA_DRX WCDMA: MHB_DRX GNSS: L1 50 impedance ANT2 AI/AO 50 impedance ANT1 AI/AO 50 impedance ANT33_ GNSSL1 AI RM500Q-AE&RM502Q-AE_Hardware_Design 54 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 5.1.2. RF Antenna Port Mapping Table 252524: RM500Q-AE & RM502Q-AE RF Antenna Mapping Antenna WCDMA 4G 5G NR n41 n77/n78/

n79 LB

(MHz) MHB

(MHz) n77

(MHz) ANT0 MHB TRX MHB_TRx UHB_PRx MIMO PRx MIMO PRx_ MIMO 1452 to 2690 3300 to 4200 ANT1 LB_TRx DRx DRx_ MIMO 617 to 960 1452 to 2690 3300 to 4200 ANT2 LB_DRx TRx TRx 617 to 960 1452 to 2690 3300 to 4200 ANT3_ GNSSL1 MHB DRx DRx_ MIMO DRx 1452 to 2690 3300 to 4200 1) LTE UHB frequency range: 34005000 MHz. 1. 1) LTE UHB frequency range: 34005000 MHz. LB_TRx MHB_DRx MIMO, UHB_DRx MIMO, LAA PRx LB_DRx, MHB_PRx MIMO, UHB_TRx 1) MHB_DRx, UHB_DRX, LAA_DRx 5.1.3. Operating Frequency NOTE LTE-FDD LTE-TDD UMTS 5G NR Table 26: RM500Q-AE&RM502Q-AE Module Operating Frequencies Band Name Transmit

(MHz) Receive

(MHz) PCS (1900) 18501910 19301990 AWS 17101755 21102155 Cell (850) 824849 869894 IMT-E (2600) 25002570 26202690 700 lower AC 699716 729746 700 upper C 777787 746756 700 D 788798 758768 B17 704716 734746 B2 B4 B5 B7 B12 B13 B14 B17 PCS + G 18501915 19301995 B25 B2 B4 B5 n2 n5 n7 n12 n25 RM500Q-AE&RM502Q-AE_Hardware_Design 55 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design B41/B41-XGP 24962690 24962690 B26 WCS B38 B48 B66 B71 n77 814849 859894 B26 23052315 23502360 B30 25702620 25702620 35503700 35503700 17101780 21102200 B66 663698 617652 B71 33004200 33004200 B38 B41 B48 n38 n41

n66 n71 n77 5.1.4. Reference Design of RF Antenna Interface A reference design of antenna interface is shown as below. A -type matching circuit should be reserved for better RF performance. The capacitors are not mounted by default. Figure 26: RM500Q-AE&RM502Q-AE Reference Circuit of RF Antenna NOTES 1. Keep the characteristic impedance for antenna trace as 50 . 2. Place the -type matching components as close to the antenna as possible. 3. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card should be kept away from the antenna traces. 4. Keep 75 dB PCB isolation between two antenna traces. 5. Keep 15 dB isolation between each antenna to improve the receiving sensitivity. RM500Q-AE&RM502Q-AE_Hardware_Design 56 / 83 ModuleANT3_GNSSL1ANT0R1 0 R4 0 C1NMC2NMC8NMC7NM 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 5.2. GNSS Antenna Interface The following table shows frequency specification of GNSS antenna connector. Table 272726: GNSS Frequency Type Frequency GPS/Galileo/QZSS 1575.42 1.023 (L1) 1575.42 2.046 (E1) 1575.42 (L1) 1597.51605.8 1561.098 2.046 Unit MHz MHz MHz MHz MHz Galileo QZSS GLONASS BeiDou NOTES 1. Keep the characteristic impedance for ANT3_GNSSL1 trace as 50 . 2. Place the -type matching components as close to the antenna as possible. 3. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card should be kept away from the antenna traces. 4. Keep 75 dB isolation between two antenna traces. 5. Keep 15 dB isolation between each antenna to improve the receiving sensitivity. 5.3. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled as 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the height from the signal layer to reference ground (H), and the space between RF trace and ground (S). RM500Q-AE&RM502Q-AE_Hardware_Design 57 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Microstrip or coplanar waveguide is typically used in RF layout for characteristic impedance control. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 27: Microstrip Design on a 2-layer PCB Figure 28: Coplanar Waveguide Design on a 2-layer PCB Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) RM500Q-AE&RM502Q-AE_Hardware_Design 58 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 3031: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully 50 . connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. The recommended trace angle is 135. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2 W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, see document [4]. 5.4. Antenna Connectors RM500Q-AE&RM502Q-AE ANT0, ANT1, ANT2 and ANT3_GNSSL1 antenna connectors are shown as below. RM500Q-AE&RM502Q-AE_Hardware_Design 59 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 31: RM500Q-AE Antenna Connectors Figure 32: RM502Q-AE Antenna Connectors RM500Q-AE&RM502Q-AE_Hardware_Design 60 / 83 ANT0ANT1ANT2ANT3_GNSSANT0ANT1ANT2ANT3_GNSS 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 5.4.1 RF Bands Supported by Antenna Connectors Table 28: RF Bands Supported by RM500Q-AE&RM502Q-AE Antenna Connectors Description Frequency Antenna0 interface:

5G NR:

MHB_TRx & n41/n77/ _PRx MIMO;

LTE: MHB_TRx & UHB_PRx MIMO WCDMA: MHB_TRx Antenna1 interface:

5G NR:

LB_TRx & MHB_DRx MIMO & n41_DRx & n77_DRx MIMO LTE:

LB_TRx & MHB_DRx MIMO & UHB_DRx MIMO & LAA_PRx WCDMA: LB_TRX Antenna2 interface:

5G NR:MHB_PRx MIMO & n41/n77 TRx LTE:LB_DRx & MHB_PRx MIMO & UHB_TRx WCDMA: LB_DRx Antenna3 interface:

5GNR:n41_DRX MIMO & n77_DRX LTE:MHB_DRX & UHB_DRX & LAA_DRx WCDMA:MHB_DRX GNSS: L1 14005000 MHz 6006000 MHz 6005000 MHz 14006000 MHz Pin Name ANT0 ANT1 ANT2 ANT33_ GNSSL1 NOTE n77 group also includes B42/B48 function. 5.5. Antenna Installation 5.5.1. Antenna Requirements The following table shows the requirements on WCDMA, LTE, 5G NR antenna and GNSS antenna. RM500Q-AE&RM502Q-AE_Hardware_Design 61 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Table 29: Antenna Requirements Type Requirements GNSS WCDMA/LTE/5G NR Frequency range: 15591606 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: >0 dBi VSWR: 3 Efficiency: > 30%

Input Impedance: 50 Cable insertion loss: < 1 dB WCDMA B5 LTE B5/B12/B13/B14/B17/B26/B71 5G NR n5/n12/n71 Cable insertion loss: < 1.5 dB WCDMA B2/B4 LTE B2/B4/B25/B66 5G NR n2/n25/n66 Cable insertion loss: < 2 dB LTE B7/B38/B41/B48 5G NR n7*/n41/n77 5.5.2. Recommended RF Connector for Antenna Installation RM500Q-AE&RM502Q-AE is mounted with standard 2 mm 2 mm receptacle RF connectors for convenient antenna connection. RM500Q-AE&RM502Q-AE_Hardware_Design 62 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design The connector dimensions are illustrated as below:

Figure 3334: RM500Q-AE&RM502Q-AE RF Connector Dimensions (Unit: mm) Item Table 303029: Major Specifications of the RF Connector Specification Nominal Frequency Range DC to 6 GHz Nominal Impedance 50 Temperature Rating

-40 C to +85 C Voltage Standing Wave Ratio (VSWR) Meet the requirements of:

Max 1.3 (DC3 GHz) Max 1.45 (36 GHz) The receptacle RF connector used in conjunction with the module will accept two types of mating plugs that will meet a maximum height of 1.2 mm using a 0.81 mm coaxial cable or a maximum height of 1.45 mm utilizing a 1.13 mm coaxial cable. The following figure shows the specifications of mating plugs using 0.81 mm coaxial cables. RM500Q-AE&RM502Q-AE_Hardware_Design 63 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 3435: Specifications of Mating Plugs Using 0.81 mm Coaxial Cables The following figure illustrates the connection between the receptacle RF connector on the module and the mating plug using a 0.81 mm coaxial cable. Figure 3536: Connection between RF Connector and Mating Plug Using 0.81 mm Coaxial Cable The following figure illustrates the connection between the receptacle RF connector on the module and the mating plug using a 1.13 mm coaxial cable. RM500Q-AE&RM502Q-AE_Hardware_Design 64 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 36: Connection between RF Connector and Mating Plug Using 1.13 mm Coaxial Cable RM500Q-AE&RM502Q-AE_Hardware_Design 65 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 6 Reliability, Radio and Electrical Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 31: Absolute Maximum Ratings Parameter VCC Voltage at Digital Pins Min.

-0.3

-0.3 Max. Unit 4.7 2.3 V V 6.2. Power Supply Requirements The typical input voltage of the module is 3.7 V, as specified by PCIe M.2 Electromechanical Specification Rev 1.0. The following table shows the power supply requirements of the module. Table 32: Power Supply Requirements Parameter Description Min. Typ. Max. Unit VCC Power Supply 3.135 3.7 Voltage Ripple Voltage Drop 30 4.4 100 165 V mV mV RM500Q-AE&RM502Q-AE_Hardware_Design 66 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 6.3. I/O Requirements Table 33: I/O Requirements Parameter Description Min. Max. Unit Input high voltage 0.7 VDD18 1) VDD18 +0.3 Input low voltage

-0.3 0.3 VDD18 Output high voltage VDD18-0.5 Output low voltage 0 VDD18 0.4 V V V V 1) VDD18 is the I/O power domain of the module. 6.4. Operating and Storage Temperatures Table 34: Operationg and Storage Temperatures Parameter Min. Max. Unit Operating Temperature Range1)

-20 Extended Temperature Range2)

-40 Storage temperature Range

-40 Typ.

+25

+60

+85

+90 C C C VIH VIL VOH VOL NOTE NOTES 1. 1) To meet this operating temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module meets 3GPP specifications. 2. 2) To meet this extended temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module remains the ability to establish and maintain functions such as voice, SMS, emergency call, etc., without any unrecoverable malfunction. Radio spectrum and radio network are not RM500Q-AE&RM502Q-AE_Hardware_Design 67 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again. 6.5. Current Consumption Table 35: RM500Q-AE&RM502Q-AE Current Consumption Description Conditions OFF state Power down Typ. Unit TBD A AT+CFUN=0 (USB disconnected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 128 (USB disconnected) WCDMA PF = 512 (USB disconnected) Sleep state LTE-FDD PF = 32 (USB disconnected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 128 (USB disconnected) LTE-TDD PF = 32 (USB disconnected) LTE-TDD PF = 64 (USB disconnected) LTE-TDD PF = 128 (USB disconnected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB connected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB connected) LTE-TDD PF = 64 (USB disconnected) LTE-TDD PF = 64 (USB connected) Idle state WCDMA data transfer (GNSS OFF) WCDMA B2 HSDPA CH9800 @ 23 dBm WCDMA B2 HSUPA CH9800 @ 23 dBm TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA RM500Q-AE&RM502Q-AE_Hardware_Design 68 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design LTE data transfer

(GNSS OFF) LTE-FDD B17 CH5790 @ 23 dBm LTE-FDD B25 CH8365 @ 23 dBm WCDMA B4 HSDPA CH1638 @ 23 dBm WCDMA B4 HSUPA CH1638 @ 23 dBm WCDMA B5 HSDPA CH4407 @ 23 dBm WCDMA B5 HSUPA CH4407 @ 23 dBm LTE-FDD B2 CH900 @ 23 dBm LTE-FDD B4 CH2175 @ 23 dBm LTE-FDD B5 CH2525 @ 23 dBm LTE-FDD B7 CH3100 @ 23 dBm LTE-FDD B12 CH5095 @ 23 dBm LTE-FDD B13 CH5230 @ 23 dBm LTE-FDD B14 CH5330 @ 23 dBm LTE-FDD B26 CH8865 @ 23 dBm LTE-FDD B30 CH9820 @ 23 dBm LTE-TDD B38 CH38000 @ 23 dBm LTE-TDD B41 CH40620 @ 23 dBm LTE-TDD B48 CH55990 @ 23 dBm LTE-FDD B66 CH66886 @ 23 dBm LTE-FDD B71 CH68761 @ 23 dBm 5G NR-TDD n41 CH501204 @ 23 dBm 5G NR-TDD n41 CH518598 @ 23 dBm 5G NR-TDD n41 CH535998 @ 23 dBm 5G NR-TDD n77 CH620668 @ 23 dBm 5G NR-TDD n77 CH650000 @ 23 dBm 5G NR-TDD n77 CH679332 @ 23 dBm 5G NR data transfer (GNSS OFF) TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA RM500Q-AE&RM502Q-AE_Hardware_Design 69 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 5G NR-FDD n2 CH387000 @ 23 dBm 5G NR-FDD n2 CH392000 @ 23 dBm 5G NR-FDD n2 CH397000 @ 23 dBm 5G NR-FDD n5 CH174800 @ 23 dBm 5G NR-FDD n5 CH176300 @ 23 dBm 5G NR-FDD n5 CH177800 @ 23 dBm 5G NR-FDD n7 CH525000 @ 23 dBm 5G NR-FDD n7 CH531000 @ 23 dBm 5G NR-FDD n7 CH537000 @ 23 dBm 5G NR-FDD n12 CH146800 @ 23 dBm 5G NR-FDD n12 CH147500 @ 23 dBm 5G NR-FDD n12 CH148200 @ 23 dBm 5G NR-FDD n66 CH423000 @ 23 dBm 5G NR-FDD n66 CH429000 @ 23 dBm 5G NR-FDD n66 CH435000 @ 23 dBm 5G NR-FDD n71 CH124400 @ 23 dBm 5G NR-FDD n71 CH126900 @ 23 dBm 5G NR-FDD n71 CH129400 @ 23 dBm TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 6.6. RF Output Power The following table shows the RF output power of RM500Q-AERM500Q-AE&RM502Q-AE. RM500Q-AE&RM502Q-AE_Hardware_Design 70 / 83 5G NR NOTE 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Table 363635: RF Output Power Mode Frequency Max. Min. WCDMA WCDMA bands 24 dBm +1/-3 dB (Class 3)

< -50 dBm LTE bands 23 dBm 2 dB (Class 3)

< -40 dBm LTE LTE HPUE bands

(B38/B41/) 26 dBm 2 dB (Class 2)

< -40 dBm 5G NR bands 23 dBm 2 dB (Class 3) 5G NR HUPE bands

(n41/n77) 26 dBm +2/-3 dB (Class 2)

< -40 dBm

(BW: 520 MHz) 1)

< -40 dBm

(BW: 520 MHz) 1) 1) For 5G NR TDD bands, the normative reference for this requirement is TS 38.101-1 [2] clause 6.3.1 6.7. RF Receiving Sensitivity The following tables show conducted RF receiving sensitivity of RM500Q-AE&RM502Q-AE. Table 37: RM500Q-AE&RM502Q-AE Conducted RF Receiving Sensitivity Mode Frequency Primary Diversity SIMO 1) 3GPP (SIMO) WCDMA B2 TBD TBD TBD

-106.7 dBm WCDMA WCDMA B4 TBD TBD TBD

-106.7 dBm WCDMA B5 TBD TBD TBD

-104.7 dBm LTE-FDD B2 (10 MHz) TBD TBD TBD

-96.3 dBm LTE-FDD B4 (10 MHz) TBD TBD TBD

-96.3 dBm LTE LTE-FDD B5 (10 MHz) TBD TBD TBD

-94.3 dBm LTE-FDD B7 (10 MHz) TBD TBD TBD

-94.3 dBm LTE-FDD B12 (10 MHz) TBD TBD TBD

-93.3 dBm RM500Q-AE&RM502Q-AE_Hardware_Design 71 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design LTE-FDD B13 (10 MHz) TBD TBD TBD

-93.3 dBm LTE-FDD B14 (10 MHz) TBD TBD TBD

-93.3 dBm LTE-FDD B17 (10 MHz) TBD TBD TBD

-93.3 dBm LTE-FDD B25 (10 MHz) TBD TBD TBD

-92.8 dBm LTE-FDD B26 (10 MHz) TBD TBD TBD

-93.8 dBm LTE-FDD B30 (10 MHz) TBD TBD TBD

-95.3 dBm LTE-TDD B38 (10 MHz) TBD TBD TBD

-96.3 dBm LTE-TDD B41 (10 MHz) TBD TBD TBD

-94.3 dBm LTE-TDD B48 (10 MHz) TBD TBD TBD

-95 dBm LTE-FDD B66 (10 MHz) TBD TBD TBD

-96.5 dBm LTE-FDD B71 (10 MHz) TBD TBD TBD

-94.2 dBm 5G NR-FDD n2 (20 MHz) (SCS:

15 kHz) 5G NR-FDD n5 (10 MHz) (SCS:

15 kHz) 5G NR-FDD n7 (20 MHz) (SCS:

15 kHz) 5G NR-FDD n12 (10 MHz)

(SCS: 15 kHz) 5G NR-FDD n25 (20 MHz)

(SCS: 15 kHz) 5G NR-TDD n41 (20 MHz)

(SCS: 30 kHz) 5G NR-FDD n66 (20 MHz)

(SCS: 15 kHz) 5G NR-FDD n71 (10 MHz)

(SCS: 15 kHz) 5G NR-TDD n77 (20 MHz)

(SCS: 30 kHz) TBD TBD TBD

-94.0 dBm TBD TBD TBD

-95.0 dBm TBD TBD TBD

-92.0 dBm TBD TBD TBD

-94.0 dBm TBD TBD TBD

-92.0 dBm TBD TBD TBD

-93.5 dBm TBD TBD TBD

-94.0 dBm TBD TBD TBD

-92.9 dBm 5G NR TBD TBD TBD

-90.5 dBm NOTE 1) SIMO is a smart antenna technology that uses a single antenna at the transmitter side and two antennas at the receiver side, which improves Rx performance. RM500Q-AE&RM502Q-AE_Hardware_Design 72 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 6.8. ESD Characteristics The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the module electrostatic discharge characteristics. Table 383837: Electrostatic Discharge Characteristics (Temperature: 25 C, Humidity: 40 %) Tested Interfaces Contact Discharge Air Discharge Unit VCC, GND Antenna Interfaces 5 4 Other Interfaces 0.5 6.9. Thermal Dissipation 10 8 1 kV kV kV RM500Q-AE&RM502Q-AE is designed to work over an extended temperature range. In order to achieve a maximum performance while working under extended temperatures or extreme conditions (such as with maximum power or data rate) for a long time, it is strongly recommended to add a thermal pad or other thermally conductive compounds between the module and the main PCB for thermal dissipation. The thermal dissipation area on the bottom (i.e. the area for adding thermal pad) is shown as below on the below, and conductive compounds are also added on the BB, MCP, PMU, WTR, PA-1, PA-2 chips inside the module. The dimensions are measured in mm. RM500Q-AE&RM502Q-AE_Hardware_Design 73 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 37: Thermal Dissipation Area on Bottom Side of Module There are other measures to enhance heat dissipation performance:

Add ground vias as many as possible on PCB. Maximize airflow over/around the module. Place the module away from other heating sources. Module mounting holes must be used to attach (ground) the device to the main PCB ground. It is NOT recommended to apply solder mask on the main PCB where the modules thermal dissipation area is located. Select an appropriate material, thickness and surface for the outer housing (i.e. the mechanical enclosure) of the application device that integrates the module so that it provides good thermal dissipation. Customers may also need active cooling to pull heat away from the module. If possible, add a heatsink on the top of the module. A thermal pad should be used between the heatsink and the module, and the heatsink should be designed with as many fins as possible to increase heat dissipation area. NOTE If a conformal coating is necessary for the module, do NOT use any coating material that may chemically RM500Q-AE&RM502Q-AE_Hardware_Design 74 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design react with the PCB or shielding cover, and prevent the coating material from flowing into the module. RM500Q-AE&RM502Q-AE_Hardware_Design 75 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 7 Mechanical Dimensions and Packaging This chapter mainly describes mechanical dimensions and packaging specifications of RM500Q-AE&RM502Q-AE. All dimensions are measured in mm, and the tolerances are 0.05 mm unless otherwise specified. 7.1. Mechanical Dimensions of the Module Figure 38: Mechanical Dimensions of the Module (Unit: mm) RM500Q-AE&RM502Q-AE_Hardware_Design 76 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 7.2. Top and Bottom Views of the Module Figure 3940: RM500Q-AE Top View and Bottom view Figure 4041: RM502Q-AE Top View and Bottom View RM500Q-AE&RM502Q-AE_Hardware_Design 77 / 83 Top ViewBottom ViewBottom ViewTop View 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. 7.3. M.2 Connector The module adopts a standard PCI Express M.2 connector which compiles with the directives and standards listed in document [5]. 7.4. Packaging The modules are packaged in trays. The following figure shows the tray size. Figure 4142: Tray Size (Unit: mm) Each tray contains 10 modules. The smallest package contains 100 modules. Tray packaging procedures are as below. 1. Use 10 trays to package 100 modules at a time (tray size: 247 mm 172 mm). 2. Place an empty tray on the top of the 10-tray stack. 3. Fix the stack with masking tape in # shape as shown in the following figure. 4. Pack the stack with conductive bag, and then fix the bag with masking tape. 5. Place the list of IMEI No. into a small carton. 6. Seal the carton and then label the seal with sealing sticker (small carton size: 250 mm 175 mm 128 mm). RM500Q-AE&RM502Q-AE_Hardware_Design 78 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Figure 4243: Tray Packaging Procedure RM500Q-AE&RM502Q-AE_Hardware_Design 79 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design 8 Appendix References Table 39: Related Documents SN. Document Name Remark

[1]

Quectel_PCIe_Card_EVB_User_Guide PCIe card EVB user guide Quectel_RG50xQ&RM5xxQ_Series_AT_Commands_ Manual AT commands manual for RG50xQ, RM5xxQ series Quectel_RG50xQ&RM5xxQ_Series_GNSS_ Application_Note The GNSS application note for RG50xQ and RM5xxQ series

[4]

Quectel_RF_Layout_Application_Note RF layout application note

[5]

PCI Express M.2 Specification Rev3.0 PCI express M.2 specification Table 404039: Terms and Abbreviations Abbreviation Description Bit Per Second Delta Firmware Upgrade Over-The-Air Downlink Dynamic Power Reduction Equivalent Isotropically Radiated Power Electrostatic Discharge Frequency Division Duplexing Global Navigation Satellite System Global Positioning System GLONASS Global Navigation Satellite System (Russia)

[2]

[3]

bps DFOTA DL DPR EIRP ESD FDD GNSS GPS RM500Q-AE&RM502Q-AE_Hardware_Design 80 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design GSM HSPA HSUPA kbps LAA LED LTE Mbps ME MIMO MLCC MO MT PAP PCB PCIe PCM PDU PME PPP RF Rx SAR SMS Tx Global System for Mobile Communications High Speed Packet Access High Speed Uplink Packet Access Kilo Bits Per Second License Assisted Access Light Emitting Diode Long Term Evolution Mega Bits Per Second Mobile Equipment Multiple-Input Multiple-Output Multiplayer Ceramic Chip Capacitor Mobile Originated Mobile Terminated Password Authentication Protocol Printed Circuit Board Peripheral Component Interconnect Express Pulse Code Modulation Protocol Data Unit Power Management Event Point-to-Point Protocol Radio Frequency Receive Specific Absorption Rate Short Message Service Transmit RM500Q-AE&RM502Q-AE_Hardware_Design 81 / 83 5G Module Series RM500Q-AE&RM502Q-AE Hardware Design Universal Asynchronous Receiver & Transmitter

(U)SIM

(Universal) Subscriber Identity Module UART UL URC USB VIH VIL VOH VOL Uplink Unsolicited Result Code Universal Serial Bus Input High Voltage Level Input Low Voltage Level Output High Voltage Level Output Low Voltage Level WCDMA Wideband Code Division Multiple Access Installation engineers need to be aware of the potential risk of the thermal effects of radio frequency energy and how to stay protected against undue risk. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the user's body and must not transmit simultaneously with any other antenna or transmitter. RM500Q-AE&RM502Q-AE_Hardware_Design 82 / 83 FCC Part 15 Subpart B, Part 22 Subpart H, Part 24 Subpart E, Part 27 Subpart D & L & H & F FCC KDB996369 D03v01 Requirements List of applicable FCC rules

& M & N, Part 90 Subpart R & S, Part 96 Summarize the specific operational use conditions Not Applicable Technology Frequency Range Antenna Type Max Peak Gain Limited module procedures Not Applicable Trace antenna designs Refer to Manual Section 4 RF exposure considerations Refer to FCC certification requirements Antennas

(MHz) WCDMA/LTE Band 2, n2 1850 ~ 1910 WCDMA/LTE Band 4 1710 ~ 1755 WCDMA/LTE Band 5, n5 824 ~ 849 LTE Band 7, n7 2500 ~ 2570 LTE Band 12, n12 LTE Band 13 LTE Band 14 LTE Band 17 699 ~ 716 777 ~ 787 788 ~ 798 704~ 716 LTE Band 26 814~849 LTE Band 30 2305 ~ 2315 LTE Band 38 2570 ~ 2620 LTE Band 41, n41 2496 ~ 2690 LTE Band 48 3550 ~ 3700 LTE Band 66, n66 1710 ~ 1780 LTE Band 71, n71 663 ~ 698 n77 3700 ~ 3980 LTE Band 25, n25 1850 ~ 1915 Dipole

(dBi) 0.25 1.47 2.68 0.55

-0.20 1.54 2.42

-0.20 0.25 2.68

-3.06 0.78 0.78

-4.29 1.47 1.22

-4.11 Information on test modes and additional testing requirements Label and compliance information Refer to FCC Label Not Applicable Additional testing, Part 15 Subpart B disclaimer Refer to FCC 15B Report FCC Certification Requirements. device is a mobile device. And the following conditions must be met:

According to the definition of mobile and fixed device is described in Part 2.1091(b), this 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time-averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the user's body and must not transmit simultaneously with any other antenna or transmitter. 3. A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR2020RM502QAE. 4. To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

Max Gain Allowed Working Bands WCDMA B2 WCDMA B4 WCDMA B5 LTE B2 LTE B4 LTE B5 LTE B7 LTE B12 LTE B13 LTE B14 LTE B17 LTE B25 LTE B26 LTE B30 LTE B38 LTE B41 LTE B48 LTE B66 LTE B71 n2 n5 n7 n12 n25 n41 7.75 3.53 12.92 7.75 3.53 12.92 7.45 17.68 15.48 14.54 17.65 7.75 12.92 2.04 4.22 4.22 2.29 3.53 10.70 7.75 12.92 7.45 17.68 7.75 4.22 n66 n71 n77 3.53 10.7 6.11 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:

A certifed modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification (labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the module's FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible; then an additional permanent label referring to the enclosed module: "Contains Transmitter Module FCC ID: XMR2020RM502QAE" or "Contains FCC ID:

XMR2020RM502QAE" must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The user's manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. conditions:

This device complies with part 15 of the FCC Rules. Operation is subject to the following two

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the user's authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/ TV technician for help.

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Quectel Wireless Solutions Company Limited Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Declaration of authorization Date: 2020.11.13 Product Name: 5G Sub-6 GHz M.2 Module Model No.: RM502Q-AE FCC ID: XMR2020RM502QAE We, the undersigned, hereby authorize MRT Technology (Suzhou) Co., Ltd to act on our behalf, to act on our behalf in all manners relating to FCC approval of our products: report submittal, related correspondence, the signing of all documents relating to these matters, and any other lawful activity necessary to obtain such certification. Any act carried out by MRT Technology (Suzhou) Co., Ltd within the scope of this authorization shall have the same effects as our own. Name Representative of agent: Marlin Chen Agent Company name: MRT Technology (Suzhou) Co., Ltd Address: D8 Building, Youxin Industrial Park, No.2 Tian'edang Rd., Wuzhong Economic Development Zone, City: Suzhou Country: China If you have any questions regarding the authorization, please dont hesitate to contact us. Sincerely yours, Jean Hu Quectel Wireless Solutions Company Limited. TEL: +86-21-51086236 ext 6511

Quectel Wireless Solutions Company Limited Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Confidentiality Letter Date: 2020.08.21 Federal Communications Commission Authorization and Evaluation Division FCC ID: XMR2020RM502QAE Confidentiality Request released to the public. Operational Description Parts List Tune up procedure Block Diagram Schematics Pursuant to FCC 47 CRF 0.457(d) and 0.459, we request that a part of the subject FCC application listed below be held permanently confidential and permanently withheld from public review due to materials that contain trade secrets and proprietary information not customarily Further, the Applicant has spent substantial effort in developing this product, some aspects of which are deemed to be trade secret and proprietary. Having the subject information easily available to our competitors in this market would negate the advantage we have achieved by developing this product. Not protecting the details of the design will result in financial hardship. Sincerely yours, Jean Hu Quectel Wireless Solutions Company Limited. TEL: +86-21-51086236 ext 6511

Quectel Wireless Solutions Company Limited Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Confidentiality Letter Date: 2020.11.13 Federal Communications Commission Authorization and Evaluation Division FCC ID: XMR2020RM502QAE Confidentiality Request Pursuant to Sections 0.457 and 0.459 of the commissions rules, we request shortterm confidential treatment for the following information until 180 days after the Grant Date of Equipment Authorization in order to ensure sensitive business information remains confidential until the actual marketing of the device:

U ser M anual Test Setup Photos os ternal Phot External Photos I n Sincerely yours, Jean Hu Quectel Wireless Solutions Company Limited. TEL: +86-21-51086236 ext 6511

Quectel Wireless Solutions Company Limited Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Request for Modular/Limited Modular Approval Date: November 30, 2020 Subject: Manufacturers Declaration for Confidentiality Request for: XMR2020RM502QAE

- Modular Approval

- Split Modular Approval

- Limited Modular Approval - Limited Split Modular Approval 8 Basic Requirements FCC Part 15.212(a)(1) For Items Marked NO(*), the Limited Module Description Must be Filled Out on the Following Pages Modular Approval Requirement Requirement Met 1. The modular transmitter must have its own RF shielding. This is intended to ensure that the module does not have to rely upon the shielding provided by the device into which it is installed in order for all modular transmitter emissions to comply with FCC limits. It is also intended to prevent coupling between the RF circuitry of the module and any wires or circuits in the device into which the module is installed. Such coupling may result in non-compliant operation. The physical crystal and tuning capacitors may be located external to the shielded radio elements. 15.212(a)(1)(i) Details: <example The module contains a metal shield which covers all RF components and circuitry. The shield is located on the top of the board next to antenna connector>

- YES - NO(*) 2. The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with FCC requirements under conditions of excessive data rates or over-modulation. 15.212(a)(1)(ii) Details: <example Data to the modulation circuit is buffered as described in the operational description provided with the application>

- YES - NO(*) 3. The modular transmitter must have its own power supply regulation on the module. This is intended to ensure that the module will comply with FCC requirements regardless of the design of the power supplying circuitry in the device into which the module is installed. 15.212(a)(1)(iii) Details: <example The module contains its own power supply regulation. Please refer to schematic filed with this application>

- YES - NO(*) 4. The modular transmitter must comply with the antenna and transmission system requirements of 15.203, 15.204(b), 15.204(c), 15.212(a), and 2.929(b). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph 15.212(b). 15.212(a)(1)(iv) Details: <example The module connects to its antenna using an UFL connector which is considered a non-

standard connector. A list of antennas tested and approved with this device may be found in users manual provided with the application>

- YES - NO(*) 5. The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing. This is intended to demonstrate that the module is capable of complying with Part 15 emission limits regardless of the device into which it is eventually installed. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with the module (see Section 15.27(a)). The length of these lines shall be length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified or commercially available (see Section 15.31(i)). 15.212(a)(1)(v) Details: <example The module was tested stand-alone as shown in test setup photographs filed with this application>

- YES - NO(*) 6. The modular transmitter must be labeled with its own FCC ID number, or use an electron Modular Approval Requirement Requirement Met display (see KDB Publication 784748). If using a permanently affixed label with its own FCC ID number, if the FCC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains Transmitter Module FCC ID:

XMR2020RM502QAE or Contains FCC ID: XMR2020RM502QAE Any similar wording that expresses the same meaning may be used. The Grantee may either provide such a label, an example of which must be included in the application for equipment authorization, or, must provide adequate instructions along with the module which explain this requirement. In the latter case, a copy of these instructions must be included in the application for equipment authorization. If the modular transmitter uses an electronic display of the FCC identification number, the information must be readily accessible and visible on the modular transmitter or on the device in which it is installed. If the module is installed inside another device, then the outside of the device into which the module is installed must display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains FCC certified transmitter module(s). Any similar wording that expresses the same meaning may be used. The user manual must include instructions on how to access the electronic display. A copy of these instructions must be included in the application for equipment authorization. 15.212(a)(1)(vi) Details: <example There is a label on the module as shown in the labeling exhibit filed with this application. Host specific labeling instructions are shown in the installation manual .filed with this application.>

- YES - NO(*) 7. The modular transmitter must comply with all specific rule or operating requirements applicable to the transmitter, including all the conditions provided in the integration instructions by the grantee. A copy of these instructions must be included in the application for equipment authorization. For example, there are very strict operational and timing requirements that must be met before a transmitter is authorized for operation under Section 15.231. For instance, data transmission is prohibited, except for operation under Section 15.231(e), in which case there are separate field strength level and timing requirements. Compliance with these requirements must be assured. 15.212(a)(1)(vii) Details: <example The module complies with FCC Part 15C requirements. Instructions to the OEM installer are provided in the installation manual filed with this application.>

- YES - NO(*) 8. The modular transmitter must comply with any applicable RF exposure requirements. For example, FCC Rules in Sections 2.1091, 2.1093 and specific Sections of Part 15, including 15.319(i), 15.407(f), 15.253(f) and 15.255(g), require that Unlicensed PCS, UNII and millimeter wave devices perform routine environmental evaluation for RF Exposure to demonstrate compliance. In addition, spread spectrum transmitters operating under Section 15.247 are required to address RF Exposure compliance in accordance with Section 15.247(b)(4). Modular transmitters approved under other Sections of Part 15, when necessary, may also need to address certain RF Exposure concerns, typically by providing specific installation and operating instructions for users, installers and other interested parties to ensure compliance. 15.212(a)(1)(viii) Details: <example The module meets Portable exclusion levels as shown in the RF exposure information filed with this application.>

- YES - NO(*) 070920-02b Limited Module Description When Applicable

* If a module does NOT meet one or more of the above 8 requirements, the applicant may request Limited Modular Approval

(LMA). This Limited Modular Approval (LMA) is applied with the understanding that the applicant will demonstrate and will retain control over the final installation of the device, such that compliance of the end product is always assured. The operating condition(s) for the LMA; the module is only approved for use when installed in devices produced by grantee. A description regarding how control of the end product, into which the module will be installed, will be maintained by the applicant/manufacturer, such that full compliance of the end product is always ensured should be provided here. Details: <example - N/A>

Software Considerations KDB 594280 / KDB 442812 (One of the following 2 items must be applied) Requirement Requirement Met 1. For non-Software Defined Radio transmitter modules where software is used to ensure compliance of the device, technical description must be provided about how such control is implemented to ensure prevention of third-party modification; see KDB Publication 594280. Details: <example The firmware of the device can not be modified or adjusted by the end user as described in a separate cover letter filed with this application. >

Separate Cover Letter

- Provided in

- N/A 2. For Software Defined Radio (SDR) devices, transmitter module applications must provide a software security description; see KDB Publication 442812.

- Provided in Separate Cover Letter

- N/A Details: <example N/A>

Split Modular Requirements Requirement Provided in Manual 1. For split modular transmitters, specific descriptions for secure communications between front-end and control sections, including authentication and restrictions on third-party modifications; also, instructions to third-party integrators on how control is maintained. Details: <example N/A >

- Provided in Separate Cover Letter

- N/A 070920-02b OEM Integration Manual Guidance KDB 996369 D03 Section 2 Clear and Specific Instructions Describing the Conditions, Limitations, and Procedures for third-parties to use and/or integrate the module into a host device. Requirement Is this module intended for sale to third parties?

- YES

- No, If No, and LMA applies, the applicant can optionally choose to not make the following detailed info public. However there still needs to be basic integration instructions for a users manual and the information below must still be included in the operational description. If the applicant wishes to keep this info confidential, this will require a separate statement cover letter explaining the module is not for sale to third parties and that integration instructions are internal confidential documents. Items required to be in the manual See KDB 996369 D03, Section 2 As of May 1, 2019, the FCC requires ALL the following information to be in the installation manual. Modular transmitter applicants should include information in their instructions for all these items indicating clearly when they are not applicable. For example information on trace antenna design could indicate Not Applicable. Also if a module is limited to only a grantees own products and not intended for sale to third parties, the user instructions may not need to be detailed and the following items can be placed in the operational description, but this should 1. List of applicable FCC rules. KDB 996369 D03, Section 2.2 a. Only list rules related to the transmitter. include a cover letter as cited above. 2. Summarize the specific operational use conditions. KDB 996369 D03, Section 2.3 a. Conditions such as limits on antennas, cable loss, reduction of power for point to 3. Limited Module Procedures. KDB 996369 D03, Section 2.4 point systems, professional installation info a. Describe alternative means that the grantee uses to verify the host meets the necessary limiting conditions b. When RF exposure evaluation is necessary, state how control will be maintained such that compliance is ensured, such as Class II for new hosts, etc. 4. Trace antenna designs. KDB 996369 D03, Section 2.5 a. Layout of trace design, parts list, antenna, connectors, isolation requirements, tests for design verification, and production test procedures for ensuring compliance. If confidential, the method used to keep confidential must be identified and information provided in the operational description. 5. RF exposure considerations. KDB 996369 D03, Section 2.6 a. Clearly and explicitly state conditions that allow host manufacturers to use the module. Two types of instructions are necessary: first to the host manufacturer to define conditions (mobile, portable xx cm from body) and second additional text needed to be provided to the end user in the host product manuals. 6. Antennas. KDB 996369 D03, Section 2.7 a. List of antennas included in the application and all applicable professional installer instructions when applicable. The antenna list shall also identify the antenna types (monopole, PIFA, dipole, etc note that omni-directional is not considered a type) 7. Label and compliance information. KDB 996369 D03, Section 2.8 a. Advice to host integrators that they need to provide a physical or e-label stating Contains FCC ID: with their finished product 8. Information on test modes and additional testing requirements. KDB 996369 D03, Section 2.9 a. Test modes that should be taken into consideration by host integrators including clarifications necessary for stand-alone and simultaneous configurations. b. Provide information on how to configure test modes for evaluation 9. Additional testing, Part 15 Subpart B disclaimer. KDB 996369 D03, Section 2.10

- All Items shown to the left are provided in the Modular Integration Guide (or UM) for Full Modular Approval (MA) or LMA.

- An LMA applies and is approved ONLY for use by the grantee in their own products, and not intended for sale to 3rd parties as provided in a separate cover letter. Therefore the information shown to the left is found in the theory of operation. Sincerely, Quectel Wireless Solutions Company Limited. TEL: +86-21-51086236 ext 6511 070920-02b