FCC ID: XMR2022EG060KGT LTE-A Cat 6 LGA Module

EG060K-GT Hardware Design LTE-A Module Series Version: 1.0.0 Date: 2022-08-18 Status: Preliminary EG060K-GT_Hardware_Design 1 / 83 LTE-A Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters:

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http://www.quectel.com/support/technical.htm. Or email us at: support@quectel.com. Legal Notices We offer information as a service to you. The provided information is based on your requirements and we make every effort to ensure its quality. You agree that you are responsible for using independent analysis and evaluation in designing intended products, and we provide reference designs for illustrative purposes only. Before using any hardware, software or service guided by this document, please read this notice carefully. Even though we employ commercially reasonable efforts to provide the best possible experience, you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as available basis. We may revise or restate this document from time to time at our sole discretion without any prior notice to you. Use and Disclosure Restrictions License Agreements Documents and information provided by us shall be kept confidential, unless specific permission is granted. They shall not be accessed or used for any purpose except as expressly provided herein. Copyright Our and third-party products hereunder may contain copyrighted material. Such copyrighted material shall not be copied, reproduced, distributed, merged, published, translated, or modified without prior written consent. We and the third party have exclusive rights over copyrighted material. No license shall be granted or conveyed under any patents, copyrights, trademarks, or service mark rights. To avoid ambiguities, purchasing in any form cannot be deemed as granting a license other than the normal non-

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party intellectual property rights with regard to the licensed technology or use thereof. Nothing herein constitutes a representation or warranty by us to either develop, enhance, modify, distribute, market, sell, offer for sale, or otherwise maintain production of any our products or any other hardware, software, device, tool, information, or product. We moreover disclaim any and all warranties arising from the course of dealing or usage of trade. Privacy Policy To implement module functionality, certain device data are uploaded to Quectels or third-partys servers, including carriers, chipset suppliers or customer-designated servers. Quectel, strictly abiding by the relevant laws and regulations, shall retain, use, disclose or otherwise process relevant data for the purpose of performing the service only or as permitted by applicable laws. Before data interaction with third parties, please be informed of their privacy and data security policy. Disclaimer a) We acknowledge no liability for any injury or damage arising from the reliance upon the information. b) We shall bear no liability resulting from any inaccuracies or omissions, or from the use of the information contained herein. c) While we have made every effort to ensure that the functions and features under development are free from errors, it is possible that they could contain errors, inaccuracies, and omissions. Unless otherwise provided by valid agreement, we make no warranties of any kind, either implied or express, and exclude all liability for any loss or damage suffered in connection with the use of features and functions under development, to the maximum extent permitted by law, regardless of whether such loss or damage may have been foreseeable. d) We are not responsible for the accessibility, safety, accuracy, availability, legality, or completeness of information, advertising, commercial offers, products, services, and materials on third-party websites and third-party resources. Copyright Quectel Wireless Solutions Co., Ltd. 2022. All rights reserved. EG060K-GT_Hardware_Design 2 / 83 LTE-A Module Series Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for your failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions, such as when the mobile bill is unpaid or the (U)SIM card is invalid. When emergency help is needed in such conditions, use emergency call if the device supports it. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. In an emergency, the device with emergency call function cannot be used as the only contact method considering network connection cannot be guaranteed under all circumstances. The cellular terminal or mobile contains a transceiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV sets, radios, computers or other electric equipment. In locations with explosive or potentially explosive atmospheres, obey all posted signs and turn off wireless devices such as mobile phone or other cellular terminals. Areas with explosive or potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, and areas where the air contains chemicals or particles such as grain, dust or metal powders. EG060K-GT_Hardware_Design 3 / 83 LTE-A Module Series About the Document Revision History Version Date Author Description

2022-08-18 1.0.0 2022-08-18 Elliot CAO/

Lewis PENG/

Jacen HUANG Elliot CAO/

Nancy SHAO/

Jacen HUANG Creation of the document Preliminary EG060K-GT_Hardware_Design 4 / 83 LTE-A Module Series Contents Safety Information ...................................................................................................................................... 3 About the Document .................................................................................................................................. 4 Contents ...................................................................................................................................................... 5 Table Index .................................................................................................................................................. 7 Figure Index ................................................................................................................................................ 9 1 Introduction ....................................................................................................................................... 11 Special Marks ......................................................................................................................... 11 1.1. 2 Product Overview ............................................................................................................................. 14 Frequency Bands and Functions ............................................................................................ 14 Key Features .......................................................................................................................... 15 Functional Diagram ................................................................................................................ 16 Pin Assignment ....................................................................................................................... 18 Pin Description ........................................................................................................................ 19 EVB Kit.................................................................................................................................... 25 2.1. 2.2. 2.3. 2.4. 2.5. 2.6. 3.2. 3 Operating Characteristics ................................................................................................................ 26 3.1. Operating Modes .................................................................................................................... 26 3.1.1. Sleep Mode ................................................................................................................... 26 3.1.1.1. UART Application Scenario ................................................................................ 27 3.1.1.2. USB Application Scenarios ................................................................................. 28 3.1.2. Airplane Mode ............................................................................................................... 30 Power Supply .......................................................................................................................... 30 3.2.1. Power Supply Pins ........................................................................................................ 30 3.2.2. Reference Design for Power Supply ............................................................................. 32 3.2.3. Power Supply Voltage Monitoring ................................................................................. 33 Turn On ................................................................................................................................... 33 Turn Off ................................................................................................................................... 35 3.4.1. Turn Off with PWRKEY ................................................................................................. 35 3.4.2. Turn Off with AT Command .......................................................................................... 35 3.5. Reset ....................................................................................................................................... 35 3.3. 3.4. 4 Application Interfaces ...................................................................................................................... 37 4.1. USIM Interfaces ...................................................................................................................... 37 4.2. USB Interface ......................................................................................................................... 39 4.3. UART Interfaces ..................................................................................................................... 41 4.3.1. Main UART Interface ..................................................................................................... 41 4.3.2. Debug UART Interface .................................................................................................. 42 4.3.3. Bluetooth UART Interface* ............................................................................................ 42 4.3.4. UART Application .......................................................................................................... 43 SPI Interface ........................................................................................................................... 44 PCM and I2C Interfaces ......................................................................................................... 45 ADC Interfaces ....................................................................................................................... 47 4.4. 4.5. 4.6. EG060K-GT_Hardware_Design 5 / 83 LTE-A Module Series 4.7. Indication Signals.................................................................................................................... 48 4.7.1. Network Status Indication ............................................................................................. 48 4.7.2. Module Status Indication ............................................................................................... 49 4.7.3. MAIN_RI ........................................................................................................................ 50 PCIe Interface ......................................................................................................................... 50 4.8. 4.9. SDIO Interface* ....................................................................................................................... 52 4.10. Antenna Tuner Control Interfaces* ......................................................................................... 54 4.11. USB_BOOT Interface ............................................................................................................. 54 5 RF Specifications .............................................................................................................................. 56 5.1. Cellular Network ..................................................................................................................... 56 5.1.1. Antenna Interface & Frequency Bands ......................................................................... 56 5.1.2. Tx Power ....................................................................................................................... 56 5.1.3. Rx Sensitivity ................................................................................................................. 57 5.1.4. Reference Design ......................................................................................................... 57 5.2. GNSS ...................................................................................................................................... 58 5.2.1. Antenna Interface & Frequency Bands ......................................................................... 58 5.2.2. GNSS Performance ...................................................................................................... 58 5.2.3. Reference Design ......................................................................................................... 59 5.3. RF Routing Guidelines ........................................................................................................... 60 Antenna Design Requirements .............................................................................................. 61 5.4. 5.5. RF Connector Recommendation ............................................................................................ 62 6 Electrical Characteristics and Reliability ....................................................................................... 64 Absolute Maximum Ratings .................................................................................................... 64 6.1. Power Supply Ratings ............................................................................................................ 64 6.2. 6.3. Power Consumption ............................................................................................................... 65 6.4. Digital I/O Characteristics ....................................................................................................... 65 6.5. ESD Protection ....................................................................................................................... 66 6.6. Operation and Storage Temperatures ................................................................................... 67 Thermal Dissipation ................................................................................................................ 67 6.7. 7 Mechanical Information .................................................................................................................... 69 7.1. Mechanical Dimensions .......................................................................................................... 69 7.2. Recommended Footprint ........................................................................................................ 71 Top and Bottom Views ........................................................................................................... 72 7.3. 8 Storage, Manufacturing & Packaging ............................................................................................. 73 8.1. Storage Conditions ................................................................................................................. 73 8.2. Manufacturing and Soldering ................................................................................................. 74 Packaging Specifications ........................................................................................................ 76 8.3. 8.3.1. Carrier Tape .................................................................................................................. 76 8.3.2. Plastic Reel ................................................................................................................... 77 8.3.3. Packaging Process ....................................................................................................... 77 9 Appendix References ....................................................................................................................... 79 EG060K-GT_Hardware_Design 6 / 83 LTE-A Module Series Table Index Table 1: Special Marks ...................................................................................................................................... 11 Table 2: Frequency Bands and Functions ......................................................................................................... 14 Table 3: Key Features ....................................................................................................................................... 15 Table 4: I/O Parameters Definition .................................................................................................................... 19 Table 5: Pin Description .................................................................................................................................... 19 Table 6: Overview of Operating Modes ............................................................................................................. 26 Table 7: Pin Description of W_DISABLE# ......................................................................................................... 30 Table 8: RF Function Status .............................................................................................................................. 30 Table 9: Pin Description of VBAT and GND Pins .............................................................................................. 31 Table 10: Pin Description of PWRKEY .............................................................................................................. 33 Table 11: Pin Description of RESET_N ............................................................................................................. 36 Table 12: Pin Description of USIM Interfaces ................................................................................................... 37 Table 13: Pin Description of USB Interface ....................................................................................................... 39 Table 14: USB Trace Length Inside the Module ............................................................................................... 41 Table 15: Pin Description of Main UART Interface ............................................................................................ 41 Table 16: Pin Description of Debug UART Interface ......................................................................................... 42 Table 17: Pin Description of Bluetooth UART Interface .................................................................................... 42 Table 18: Pin Description of SPI Interface ........................................................................................................ 44 Table 19: Pin Description of PCM and I2C Interfaces ....................................................................................... 45 Table 20: Pin Description of the ADC Interfaces ............................................................................................... 47 Table 21: Characteristics of ADC Interfaces ..................................................................................................... 48 Table 22: Pin Description of NET_MODE and NET_STATUS .......................................................................... 48 Table 23: Working Status of NET_MODE and NET_STATUS.......................................................................... 48 Table 24: Pin Description of STATUS ............................................................................................................... 49 Table 25: Default Behavior of MAIN_RI ............................................................................................................ 50 Table 26: Pin Description of PCIe Interface ...................................................................................................... 50 Table 27: PCIe Trace Length Inside the Module ............................................................................................... 52 Table 28: Pin Description of SDIO Interface* .................................................................................................... 53 Table 29: Pin Description of RFFE Interfaces* for Antenna Tuner Control ....................................................... 54 Table 30: Pin Description of USB_BOOT Interface ........................................................................................... 55 Table 31: Pin Description of the Main/Diversity Antenna Interfaces ................................................................. 56 Table 32: Frequency Bands .............................................................................................................................. 56 Table 33: Tx Power............................................................................................................................................ 56 Table 34: Dual-Antenna Conducted Rx Sensitivity ........................................................................................... 57 Table 35: Pin Description of GNSS Antenna Interface...................................................................................... 58 Table 36: GNSS Frequency .............................................................................................................................. 58 Table 37: GNSS Performance ........................................................................................................................... 58 Table 38: Antenna Design Requirements ......................................................................................................... 61 Table 39: Absolute Maximum Ratings ............................................................................................................... 64 Table 40: Power Supply Ratings ....................................................................................................................... 64 Table 41: Power Consumption .......................................................................................................................... 65 EG060K-GT_Hardware_Design 7 / 83 LTE-A Module Series Table 42: VDD_EXT I/O Requirements ............................................................................................................. 65 Table 43: SDIO_VDD Low-voltage I/O Requirements ...................................................................................... 65 Table 44: SDIO_VDD High-voltage I/O Requirements ...................................................................................... 66 Table 45: VDD_USIM High/Low-voltage I/O Requirements .............................................................................. 66 Table 46: Electrostatic Discharge Characteristics (Temperature: 25 C, Humidity: 45 %) ............................... 67 Table 47: Operating and Storage Temperatures ............................................................................................... 67 Table 48: Recommended Thermal Profile Parameters ..................................................................................... 75 Table 49: Carrier Tape Dimension Table (Unit: mm) ........................................................................................ 76 Table 50: Plastic Reel Dimension Table (Unit: mm) .......................................................................................... 77 Table 51: Related Documents ........................................................................................................................... 79 Table 52: Term and Abbreviation ...................................................................................................................... 79 EG060K-GT_Hardware_Design 8 / 83 LTE-A Module Series Figure Index Figure 1: Functional Diagram ............................................................................................................................ 17 Figure 2: Pin Assignment (Top View) ................................................................................................................ 18 Figure 3: DRX Run Time and Power Consumption in Sleep Mode .................................................................. 27 Figure 4: Sleep Mode Application via UART Interfaces .................................................................................... 27 Figure 5: Sleep Mode Application with USB Remote Wake-up ........................................................................ 28 Figure 6: Sleep Mode Application with MAIN_RI .............................................................................................. 29 Figure 7: Sleep Mode Application without Suspend Function ........................................................................... 29 Figure 8: Power Supply Limits during Burst Transmission ................................................................................ 31 Figure 9: Star Topology of the Power Supply .................................................................................................... 32 Figure 10: Reference Circuit of the Power Supply ............................................................................................ 32 Figure 11: Turn On with a Driving Circuit .......................................................................................................... 33 Figure 12: Turn On With a Button ...................................................................................................................... 34 Figure 13: Turn On Timing ................................................................................................................................ 34 Figure 14: Turning-off Timing ............................................................................................................................ 35 Figure 15: Reference Circuit of RESET_N with a Driving Circuit ...................................................................... 36 Figure 16: Reset Timing .................................................................................................................................... 36 Figure 17: Reference Circuit of a USIM Interface with an 8-Pin USIM Card Connector ................................... 38 Figure 18: Reference Circuit of a USIM Interface with a 6-Pin USIM Card Connector ..................................... 38 Figure 19: Reference Circuit of USB Application .............................................................................................. 40 Figure 20: Reference Circuit (IC Solution)......................................................................................................... 43 Figure 21: Reference Circuit (Transistor Solution) ............................................................................................ 43 Figure 22: Reference Circuit of PCM and SPI Application with SLIC ............................................................... 44 Figure 23: Primary Mode Timing ....................................................................................................................... 46 Figure 24: Auxiliary Mode Timing ...................................................................................................................... 46 Figure 25: Reference Circuit of PCM and I2C Application with Audio Codec ................................................... 47 Figure 26: Reference Circuit of the NET_MODE and NET_STATUS ............................................................... 49 Figure 27: Reference Circuits of STATUS......................................................................................................... 49 Figure 28: PCIe Interface Reference Circuit (RC Mode) ................................................................................... 52 Figure 29: Reference Circuit of SD Card Application ........................................................................................ 53 Figure 30: Reference Circuit of USB_BOOT ..................................................................................................... 55 Figure 31: Reference Circuit of RF Antenna Interfaces .................................................................................... 57 Figure 32: Reference Circuit of GNSS Antenna Interface ................................................................................. 59 Figure 33: Microstrip Design on a 2-layer PCB ................................................................................................. 60 Figure 34: Coplanar Waveguide Design on a 2-layer PCB ............................................................................... 60 Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) ............................ 61 Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) ............................ 61 Figure 37: Dimensions of the Receptacle (Unit: mm) ........................................................................................ 62 Figure 38: Specifications of Mated Plugs .......................................................................................................... 63 Figure 39: Space Factor of Mated Connectors (Unit: mm)................................................................................ 63 Figure 40: Placement and Fixing of the Heatsink .............................................................................................. 68 Figure 41: Module Top and Side Dimensions (Top View) ................................................................................. 69 EG060K-GT_Hardware_Design 9 / 83 LTE-A Module Series Figure 42: Module Bottom Dimensions (Bottom View, Unit: mm) ..................................................................... 70 Figure 43: Recommended Footprint (Top View, Unit: mm) ............................................................................... 71 Figure 44: Top and Bottom Views ..................................................................................................................... 72 Figure 45: Reflow Soldering Thermal Profile ..................................................................................................... 74 Figure 46: Carrier Tape Dimension Drawing ..................................................................................................... 76 Figure 47: Plastic Reel Dimension Drawing ...................................................................................................... 77 Figure 48: Packaging Process ........................................................................................................................... 78 EG060K-GT_Hardware_Design 10 / 83 LTE-A Module Series 1 Introduction This document defines EG060K-GT module and describes its air and hardware interfaces which connects to your applications. With this document, you can quickly understand the modules interfaces, electrical and mechanical specifications, as well as other related information of the module. The document, coupled with application notes and user guides, makes it easy to design and set up mobile applications with the module. 1.1. Special Marks Table 1: Special Marks Mark Definition

Unless otherwise specified, when an asterisk (*) is used after a function, feature, interface, pin name, AT command, or argument, it indicates that the function, feature, interface, pin, AT command, or argument is under development and currently not supported; and the asterisk (*) after a model indicates that the sample of the model is currently unavailable. Brackets ([]) used after a pin enclosing a range of numbers indicate all pins of the same type. For example, SDIO_DATA [0:3] refers to all four SDIO pins: SDIO_DATA0, SDIO_DATA1, SDIO_DATA2, and SDIO_DATA3. The device could be used with a separation distance of 20cm to the human body. Product Marketing NameQuectel EG060K-GT FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met:

1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based timeaveraging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3. A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR2022EG060KGT 4. To comply with FCC regulations limiting both maximum RF output power and human exposure to RF EG060K-GT_Hardware_Design 11 / 83 LTE-A Module Series radiation, maximum antenna gain (including cable loss) must not exceed:

radiation, maximum antenna gain

(including cable loss) must not exceed:

Operating Band LTE B41 LTE B48 FCC Max Antenna GaindBi 8.00

-1.00 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:

A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification

(labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible;

then an additional permanent label referring to the enclosed module: Contains Transmitter Module FCC ID: XMR2022EG060KGT or Contains FCC ID: XMR2022EG060KGT must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. To ensure compliance with all non-transmitter functions the host manufacturer is responsible for ensuring compliance with the module(s) installed and fully operational. For example, if a host was previously authorized as an unintentional radiator under the Suppliers Declaration of Conformity procedure without a transmitter certified module and a module is added, the host manufacturer is responsible for ensuring EG060K-GT_Hardware_Design 12 / 83 LTE-A Module Series that the after the module is installed and operational the host continues to be compliant with the Part 15B unintentional radiator requirements. Manual Information To the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. IC Statement IRSS-GEN

"This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device."The transmitter module may not be co-located with any other transmitter orantenna. or "Le prsent appareil est conforme aux CNR dIndustrie Canada applicables aux appareils radi o exempts de licence.Lexploitation est autoris e a ux deux conditions suivantes :

1) lappareil ne doit pas produire de brouillage; 2) lutilisateur de lappareil doit accepter tout brouill age radiolectrique subi, mme si le brouillage est susc eptible den compromettre le fonctionnement." Dclarat ion sur l'exposition aux rayonnements RF L'autre utilispour l'metteur doit tre install pour fournir une distance de sparation d'au moins 20 cm de toutes les personnes et ne doit pas tre colocalis ou fonctionner conjointement avec une autre antenne ou un autre met teur. The host product shall be properly labeled to identify the modules within the host product. The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host product; otherwise, the host product must be labeled to display the Innovation, Science and Economic Development Canada certification number for the module, preceded by the word Contains or similar wording expressing the same meaning, as follows: Contains IC: 10224A-2022EG060GT or where: 10224A-2022EG060GT is the modules certification number. Le produit hte doit tre correctement tiquet pour identifier les modules dans le produit hte. L'tiquette de certification d'Innovation, Sciences et Dveloppement conomique Canada d'un module doit tre clairement visible en tout temps lorsqu'il est installdans le produit hte; sinon, le produit hte doit porter une tiquette indiquant le numro de certification d'Innovation, Sciences et Dveloppement conomique Canada pour le module, prc d du mot Contient ou d'un libells emblable exprimant la m me signification, comme suit:

"Contient IC: 10224A-2022EG060GT " ou "o: 10224A-2022EG060GT est le numro de certification du module". EG060K-GT_Hardware_Design 13 / 83 LTE-A Module Series 2 Product Overview The module is an LTE-TDD wireless communication module with receive diversity. It provides data connectivity on LTE-TDD networks. The module supports embedded operating systems such as Windows, Linux and Android. It also provides GNSS to meet specific application demands. 2.1. Frequency Bands and Functions Table 2: Frequency Bands and Functions Frequency Bands and Functions EG060K-GT LTE-TDD (with Rx-diversity) B41/B48 2CA GNSS CA_41A-41A, , CA_41C, CA_48C GPS, GLONASS, BDS, Galileo With a compact profile of 37.0 mm 39.5 mm 2.8 mm, the module meets most of requirements for M2M applications such as security, 4G router, CPE, wireless POS terminal, mobile computing device, PDA phone, and tablet PC. The module is an SMD type module and can be embedded in applications through its 299 LGA pins. EG060K-GT_Hardware_Design 14 / 83 LTE-A Module Series 2.2. Key Features Table 3: Key Features Feature Details Power Supply Supply voltage range: 3.34.4 V Typical supply voltage: 3.8 V Transmitting Power Class 3 (23 dBm 2 dB)*

LTE Features Supports 3GPP Rel-12 LTE-TDD Supports CA Category

- Supports up to Cat 6 Supports 1.4/3/5/10/15/20 MHz RF bandwidth LTE-TDD: Max. 226 Mbps (DL)/28 Mbps (UL) MCP 4 Gb NAND + 4 Gb LPDDR2 Internet Protocol Features Supports QMI/MBIM/NITZ/HTTP/HTTPS/FTP/LwM2M*/PING* protocols SMS USIM Interfaces Audio Features PCM Interface USB Interface UART Interfaces SPI Interface Text and PDU mode Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default Supports USIM card: 1.8/3.0 V Supports Dual USIM Single Standby Provides one digital audio interface: PCM interface LTE: AMR/AMR-WB Supports echo cancellation and noise suppression Used for audio function with an external codec or SLIC Supports 16-bit linear data format Supports long and short frame synchronization Supports master and slave modes, but the module must work as master in long frame synchronization Complies with USB 3.0 and 2.0 specifications, with max. transmission rates up to 5 Gbps on USB 3.0 and 480 Mbps on USB 2.0 Used for AT command communication, data transmission, firmware upgrade, software debugging, GNSS NMEA sentence output. Supports USB serial drivers for:

Windows 7/8/8.1/10/11, Linux 2.65.18, Android 4.x12.x Main UART interface:

Used for AT command communication and data transmission Baud rate reaches up to 921600 bps, 115200 bps by default Supports RTS and CTS hardware flow control Debug UART interface:

Used for Linux console and log output 115200 bps baud rate Bluetooth UART interface*:

Multiplexed from SPI interface Used for Bluetooth communication 115200 bps baud rate Works in master mode only Max. clock frequency rate: 50 MHz EG060K-GT_Hardware_Design 15 / 83 LTE-A Module Series PCIe Interface Complies with PCI Express Base Specification Revision 2.0 Supports 5 Gbps per lane Used for data transmission RC mode only eSIM Optional Rx-diversity Supports LTE Rx-diversity GNSS Features AT Commands Network Indication Antenna Interfaces Physical Characteristics Temperature Range Firmware Upgrade Supports GPS, GLONASS, BDS, and Galileo Protocol: NMEA 0183 Data update rate: 1 Hz Complies with 3GPP TS 27.007 and 3GPP TS 27.005 Quectel enhanced AT commands Two pins (NET_MODE and NET_STATUS) indicate network connectivity status ANT [0:1]

ANT_GNSS 50 impedance Dimensions: (37.0 0.2) mm (39.5 0.2) mm (2.8 0.2) mm Package: LGA Weight: approx. 9.1 g Operating temperature range: -30 to +75 C 1 Extended temperature range: -40 to +85 C 2 Storage temperature range: -40 to +90 C USB 2.0 DFOTA RoHS All hardware components are fully compliant with EU RoHS directive 2.3. Functional Diagram The following figure shows a block diagram of the module and illustrates the major functional parts. Power management Baseband LPDDR2 SDRAM + NAND flash Radio frequency Peripheral interfaces 1 To meet this operating temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module can meet 3GPP specifications. 2 To meet this extended temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module remains the ability to establish and maintain functions such as SMS, etc., without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again.

*FCC LTE Band48(22 dBm 2 dB) ISED LTE Band48(3550-3650)(22 dBm 2 dB) ISED LTE Band48(3650-3700)(15 dBm 2 dB) EG060K-GT_Hardware_Design 16 / 83 LTE-A Module Series Figure 1: Functional Diagram EG060K-GT_Hardware_Design 17 / 83 PMICTransceiverNANDLPDDR2SDRAMTx/Rx BlocksANT1VBAT_BBVBAT_RFAPTPWRKEYVDD_EXTADCsQLINKControlTxPRxDRxBasebandANT0USIMx2UART38.4MHzXOControlSTATUSRESET_NSPI/BT_UARTI2CPCMPCIeUSB 2.0/3.0VDD_RFI2S_MCLKeSIM(optional)SDIOANT_GNSS LTE-A Module Series 2.4. Pin Assignment Figure 2: Pin Assignment (Top View) EG060K-GT_Hardware_Design 18 / 83 299176298174172170NET_STATUS168VDD_EXT166SPI_CS164SPI_CLK162VDD_RF160WAKE_ON_WIRELESS158156VBAT_BB154152I2S_MCLK150WAKEUP_IN148146COEX_RXD144SLEEP_IND142140USB_BOOT138136DBG_RXD134132130175ADC1173ADC0171STATUS169WLAN_SLP_CLK167165SPI_MISO163SPI_MOSI161159157155VBAT_BB153151W_DISABLE#149WLAN_EN147NET_MODE145COEX_TXD143OTG_PWR_EN141139137DBG_TXD135VDD_P2133131129127ANT1125123121119ANT_GNSS117115111109107ANT0105103101999795128113126124122120118116114112110108106104102100989621421321221121020920820720620520420320220120019919893918994929019719643I2C_SCL4547SDIO_DATA249SDIO_DATA051SDIO_CMD53SDIO_CLK5557MAIN_RTS59MAIN_DCD61MAIN_RI6365PCM_SYNC67PCM_CLK6971RFFE_CLK73RFFE_DATA7577USIM2_DATA79USIM2_RST818385VBAT_RF87VBAT_RF42I2C_SDA4446SDIO_VDD48SDIO_DATA350SDIO_DATA152SDIO_DET5456MAIN_CTS58MAIN_RXD60MAIN_TXD62MAIN_DTR6466PCM_DIN68PCM_DOUT707274USIM2_VDD7678USIM2_DET80USIM2_CLK828486VBAT_RF88VBAT_RF41USB_SS_RX_M3937USB_SS_TX_M3533USB_DM3129USIM1_DATA27USIM1_CLK232119171513119740USB_SS_RX_P25USIM1_DET38USB_SS_TX_P36USB_ID34USB_DP32USB_VBUS3028USIM1_RST26USIM1_VDD24222018161412108195194193192191190PCIE_WAKE_N189PCIE_RC_RST_N188PCIE_CLKREQ_N187186PCIE_RX_P185PCIE_RX_M184183PCIE_TX_P182PCIE_TX_M181180PCIE_REFCLK_M179PCIE_REFCLK_P5WLAN_PWR_EN3BT_EN1RESET_N642PWRKEY178177Power PinsGND PinsOther PinsRESVRVED Pins297296216217218215219220221222223224233242251260269278287225234243252261270279288226235244253262271280289227236272281290228237273282291229238274283292230239248257266275284293231240249258267276285294232241250259268277286295PCIe PinsPCM PinsUSIM PinsUSB PinsI2C PinsSD PinsADC PinsUART PinsSPI PinsANT PinsCLK Pins245246247254255256263264265 LTE-A Module Series NOTE 1. Keep all RESERVED pins and unused pins unconnected. 2. GND pins should be connected to ground in the design. 2.5. Pin Description Table 4: I/O Parameters Definition Type Description AI AO AIO DI DO DIO OD PI PO Analog Input Analog Output Analog Input/Output Digital Input Digital Output Digital Input/Output Open Drain Power Input Power Output DC characteristics includes power domain, rate current etc. Table 5: Pin Description Power Supply Pin Name VBAT_BB Pin No. 155, 156 PI VBAT_RF 8588 PI VDD_EXT 168 PO I/O Description DC Characteristics Comment Power supply for the modules baseband part. Power supply for the modules RF part. Provide 1.8 V for external circuit. Vmax = 4.4 V Vmin = 3.3 V Vnom = 3.8 V Vnom = 1.8 V IOmax = 50 mA Sufficient current up to 1 A is requisite. A transmitting burst requires a sufficient current up to 1.5 A. EG060K-GT_Hardware_Design 19 / 83 LTE-A Module Series VDD_RF 162 PO Provide 2.85 V for external RF circuit. Vnom = 2.7 V IOmax = 120 mA If unused, keep it open. GND Turn On/Off Pin Name RESET_N PWRKEY 10, 13, 16, 17, 24, 30, 31, 35, 39, 44, 45, 54, 55, 63, 64, 69, 70, 75, 76, 8184, 89, 90, 9294, 96100, 102106, 108112, 114118, 120126, 128133, 141, 142, 148, 153, 154, 157, 158, 167, 174, 177, 178, 181, 184, 187, 191, 196, 202208, 214299 Pin No. 1 2 I/O Description DC Characteristics Comment DI DI Reset the module Turn on/off the module VIHmin = 1.17 V VILmax = 0.54 V Pulled up to 1.8 V internally. Active low. Status Indication Pin Name Pin No. I/O Description DC Characteristics Comment NET_MODE 147 DO NET_STATUS 170 DO STATUS 171 DO SLEEP_IND 144 DO Indicate the modules network registration mode Indicate the modules network activity status Indicate the modules operation status Indicates the modules sleep indication VDD_EXT VDD_EXT VDD_EXT VDD_EXT If unused, keep them open. USIM Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment USIM1_DET 25 DI USIM1 card hot-

plug detect USIM1_VDD If unused, keep it open. USIM1_VDD 26 PO USIM1 card power supply High-voltage:

Vmin = 3.05 V Vnom = 2.85 V Vmax = 2.7 V Low-Voltage:

Vmin = 1.95 V Vnom = 1.8 V Vmax = 1.65 V USIM1_CLK 27 DO USIM1 card clock USIM1_VDD USIM1_RST 28 DO USIM1 card reset USIM1_VDD USIM1_DATA 29 DIO USIM1 card data USIM1_VDD USIM2_VDD 74 PO USIM2 card power supply High-voltage:

Vmin = 3.05 V Vnom = 2.85 V Vmax = 2.7 V If USIM2 interface is unused, keep it open. EG060K-GT_Hardware_Design 20 / 83 LTE-A Module Series Low-Voltage:

Vmin = 1.95 V Vnom = 1.8 V Vmax = 1.65 V USIM2_DATA 77 DIO USIM2 card data USIM2_VDD USIM2_DET 78 DI USIM2 card hot-

plug detect USIM2_VDD USIM2_RST 79 DO USIM2 card reset USIM2_VDD USIM2_CLK 80 DO USIM2 card clock USIM2_VDD If USIM2 interface is unused, keep it open. If USIM2 interface is unused, keep it open. If USIM2 interface is unused, keep them open. USB Interface Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS 32 DI USB connection detect

USB_DM USB_DP USB_SS_TX_ M USB_SS_TX_ P USB_SS_RX_ P USB_SS_RX_ M USB_ID*

OTG_PWR_ EN*

33 34 37 38 40 41 36 AIO AIO AO AO AI AI USB 2.0 differential data (-) USB 2.0 differential data (+) USB 3.0 super-

speed transmit (-) USB 3.0 super-

speed transmit (+) USB 3.0 super-

speed receive (+) USB 3.0 super-

speed receive (-) DI USB ID detect VDD_EXT 143 DO OTG power control VDD_EXT Detection threshold:

Vmin = 3.3 V Vnom = 5 V Vmax = 5.25 V Comply with USB 2.0 specifications. Require differential impedance of 90 . Comply with USB 3.0 specifications. Require differential impedance of 90 . If unused, keep them open. SDIO Interface*

Pin Name Pin No. I/O Description DC Characteristics Comment VDD_P2 135 PI Power input for SDIO interface

SDIO_VDD 46 PO SD card application:

SDIO pull up power source eMMC*

application:

Keep it open as used for eMMC*

High-voltage:

Vmin = 3.05 V Vnom = 2.85 V Vmax = 2.7 V Low-Voltage:

Vmin = 1.95 V Vnom = 1.8 V If a SD card is used, connect VDD_P2 to SDIO_VDD. If unused, connect VDD_P2 to VDD_EXT. Cannot work as SD card power supply. SD be card must powered by an external power supply. EG060K-GT_Hardware_Design 21 / 83 LTE-A Module Series Vmax = 1.65 V SDIO_DATA0 49 DIO SDIO data bit 0 SDIO_DATA1 50 DIO SDIO data bit 1 SDIO_DATA2 47 DIO SDIO data bit 2 SDIO_DATA3 48 DIO SDIO data bit 3 SDIO_VDD If unused, keep them open. SDIO_CMD SDIO_CLK SDIO_DET 51 53 52 Main UART Interface Pin Name Pin No. DIO SDIO command DO SDIO clock DI SD card detect VDD_EXT If unused, keep it open. I/O Description DC Characteristics Comment MAIN_CTS 56 DI MAIN_RTS 57 DO MAIN_RXD MAIN_DCD MAIN_TXD MAIN_RI 58 59 60 61 DI DO DO DO CTS: DTE clear to send signal from DCE RTS: DTE request to send signal to DCE Main UART receive Main UART data carrier detect Main UART transmit Main UART ring indication VDD_EXT VDD_EXT VDD_EXT VDD_EXT VDD_EXT VDD_EXT MAIN_DTR 62 DI Main UART data terminal ready VDD_EXT Connect to DTEs CTS. If unused, keep it open. Connect to DTE's RTS. If unused, keep it open. If unused, keep this pin open. Pulled up by default. Pulling low will awaken the module. If unused, keep it open. Sleep mode control. Debug UART Interface Pin Name DBG_RXD Pin No. 136 DI DBG_TXD 137 DO I/O Description DC Characteristics Comment Debug UART receive Debug UART transmit VDD_EXT VDD_EXT If unused, keep them open. SPI Interface Pin Name Pin No. I/O Description DC Characteristics Comment EG060K-GT_Hardware_Design 22 / 83 LTE-A Module Series SPI_MOSI 163 DO SPI master output slave input VDD_EXT SPI_CLK 164 DO SPI clock VDD_EXT SPI_MISO 165 DI SPI master input slave output VDD_EXT SPI_CS 166 DO SPI chip select VDD_EXT If unused, keep it open. It can be multiplexed into BT_TXD*. If unused, keep it open. It can be multiplexed into BT_CTS*. If unused, keep it open. It can be multiplexed into BT_RXD*. If unused, keep it open. It can be multiplexed into BT_RTS*. I/O Description DC Characteristics Comment PCM and I2C Interfaces Pin Name I2C_SDA Pin No. 42 OD I2C_SCL 43 OD I2C serial data (for an external codec) I2C serial clock

(for an external codec) VDD_EXT VDD_EXT PCM_SYNC 65 DIO PCM data frame sync VDD_EXT An external pull-up resistor is requisite. If unused, keep them open. Output signal in master mode. Input signal in slave mode. If unused, keep it open. PCM_DIN 66 DI PCM data input VDD_EXT If unused, keep it open. PCM_CLK 67 DIO PCM clock VDD_EXT Output signal in master mode. Input signal in slave mode. If unused, keep it open. PCM_DOUT 68 DO PCM data output VDD_EXT If unused, keep it open. I2S_MCLK 152 DO Clock output for codec VDD_EXT Provide a digital clock output for an external codec. If unused, keep it open. Antenna Interfaces Pin Name ANT0 ANT1 Pin No. 107 127 ANT_GNSS 119 WLAN Control Interface*

Pin Name WLAN_PWR_E N Pin No. 5 I/O Description DC Characteristics Comment AIO AI AI Main antenna interface Diversity antenna interface GNSS antenna interface 50 impedance 50 impedance If unused, keep them open. I/O Description DC Characteristics Comment DO WLAN power supply enable VDD_EXT If unused, keep them open. EG060K-GT_Hardware_Design 23 / 83 LTE-A Module Series COEX_TXD 145 DO COEX_RXD 146 DI WLAN_EN 149 DO WAKE_ON_ WIRELESS 160 DI control LTE/WLAN coexistence transmit LTE/WLAN coexistence receive WLAN function enable control Awaken the host

(the module) via an external Wi-Fi module VDD_EXT VDD_EXT VDD_EXT VDD_EXT Active high. If unused, keep it open. Active low. If unused, keep it open. 169 DO WLAN sleep clock VDD_EXT If unused, keep it open. I/O Description DC Characteristics Comment AI AI General-purpose ADC interface 01.875 V If unused, keep them open. I/O Description DC Characteristics Comment WLAN_SLP_CL K ADC Interfaces Pin Name ADC0 ADC1 PCIe Interface Pin Name PCIE_ REFCLK_P PCIE_ REFCLK_M Pin No. 173 175 Pin No. 179 AO 180 AO PCIE_TX_M 182 AO PCIE_TX_P 183 AO PCIE_RX_M 185 PCIE_RX_P 186 AI AI PCIe reference clock (+) PCIe reference clock (-) PCIe transmission

(-) PCIe transmission

(+) PCIe receiving (-) PCIe receiving (+) PCIE_ CLKREQ_N PCIE_RC_ RST_N 188 DI PCIe clock request VDD_EXT 189 DO PCIe RC reset VDD_EXT PCIE_WAKE_N 190 DI PCIe wake up VDD_EXT Antenna Tuner Control Interfaces* (RFFE Interface) Require differential impedance of 95 . If unused, keep them open. Input signal in master mode. If unused, keep it open. Output signal in master mode. If unused, keep it open. Input signal, in master mode only. If unused, keep it open. EG060K-GT_Hardware_Design 24 / 83 LTE-A Module Series Pin Name Pin Name RFFE_CLK 71 RFFE_DATA 73 Other Pins Pin Name Pin No. I/O Description DC Characteristics Comment DO RFFE serial interface for external tuner control DIO VDD_EXT If unused, keep them open. I/O Description DC Characteristics Comment USB_BOOT 140 DI BT_EN*

3 DO Force the module into emergency download mode Bluetooth function enable control VDD_EXT Active high If unused, keep it open. VDD_EXT If unused, keep it open. WAKEUP_IN 150 DI Sleep mode control VDD_EXT W_DISABLE#

151 DI Airplane mode control VDD_EXT RESERVED Pins Pin Name Pin No. RESERVED 4, 69, 11, 12, 14, 15, 1823, 72, 91, 95,101,113, 134, 138, 139, 159, 161, 172, 176, 192195, 197201, 209 213 Pulled up by default. Low level awakens the module. If unused, keep it open. Pulled up by default. In low level, the module will enter airplane mode. If unused, keep it open. Comment Keep these pins unconnected. 2.6. EVB Kit To help you develop applications with the module, Quectel supplies an evaluation board (UMTS & LTE EVB R2.0) with accessories to control or test the module. For more details, see document [1]. EG060K-GT_Hardware_Design 25 / 83 LTE-A Module Series 3 Operating Characteristics 3.1. Operating Modes Table 6: Overview of Operating Modes Mode Details Idle Voice/Data Software is active. The module has registered on the network, and it is ready to send and receive data. Network is connected. In this mode, the power consumption is decided by network setting and data transfer rate. AT+CFUN=0 command sets the module to minimum functionality without removing the power supply. In this case, both RF function and USIM card are invalid. AT+CFUN=4 command or driving W_DISABLE# low will set the module to airplane mode. In this case, the RF function is invalid. When AT+QSCLK=1 command is executed and the hosts USB bus enters suspend state, the module will enter sleep mode. The module keeps receiving paging messages, SMS and TCP/UDP data from the network with its power consumption reducing to the minimal level. The power management unit shuts down the power supply. Software is inactive, all application interfaces are inaccessible, and the operating voltage (connected to VBAT_RF and VBAT_BB) remains applied. Full Functionality Mode Minimum Functionality Mode Airplane Mode Sleep Mode Power Down Mode NOTE See document [2] for details about AT commands mentioned above. 3.1.1. Sleep Mode DRX can reduce the power consumption of the module to the minimum value during sleep mode, and DRX cycle index values are broadcasted by the wireless network. The figure below shows the relationship between the DRX run time and the power consumption in sleep mode. The longer the DRX cycle is, the lower the power consumption will be. EG060K-GT_Hardware_Design 26 / 83 LTE-A Module Series Figure 3: DRX Run Time and Power Consumption in Sleep Mode The following part of this chapter presents the power saving procedure and sleep mode of the module. 3.1.1.1. UART Application Scenario If the host communicates with the module via UART interfaces, meeting the following requirements will bring the module into sleep mode. Keep MAIN_DTR high (pulled up by default). Execute AT+QSCLK=1. See document [2] for details about AT+QSCLK=1. The following figure shows the connection between the module and the host. Figure 4: Sleep Mode Application via UART Interfaces Driving MAIN_DTR low will wake up the module. When the module has a URC to report, MAIN_RI signal will wake up the host. See Chapter 4.7.3 for details about MAIN_RI behavior. EG060K-GT_Hardware_Design 27 / 83 Power ConsumptionRun TimeDRX OFF ON OFF ON OFF ON OFF ON OFF MAIN_RXDMAIN_TXDMAIN_RIMAIN_DTRTXDRXDEINTGPIOModuleHostGNDGND LTE-A Module Series 3.1.1.2. USB Application Scenarios USB application can be applied with USB remote wake-up function or USB suspend/resume and MAIN_RI functions. If the host supports USB suspend/resume and remote wake-up function, meeting the following three requirements will bring the module into sleep mode.

- Keep MAIN_DTR high (pulled up by default).

- Execute AT+QSCLK=1 command. See document [2] for details about AT+QSCLK=1.

- The hosts USB bus, connected to the modules USB interface, has entered suspend state. The following figure shows the above-mentioned connection between the module and the host. Figure 5: Sleep Mode Application with USB Remote Wake-up Sending data to the module through USB will wake up the module. When the module has a URC to report, the module will send remote wake-up signals via USB bus to awaken the host. If the host supports USB suspend/resume but does not support remote wake-up function, meeting the following three requirements will bring the module into sleep mode.

- Keep MAIN_DTR high (pulled up by default).

- Execute AT+QSCLK=1 command. See document [2] for details about AT+QSCLK=1.

- The hosts USB bus, connected with the modules USB interface, has entered suspend state. The following figure shows the connection between the module and the host. EG060K-GT_Hardware_Design 28 / 83 USB_VBUSUSB InterfaceVDDUSB InterfaceModuleHostGNDGND LTE-A Module Series Figure 6: Sleep Mode Application with MAIN_RI Sending data to the module through USB will awaken the module. When the module has a URC to report, MAIN_RI will wake up the host. If the host does not support USB suspend function, USB_VBUS should be disconnected with an external control circuit to bring the module into sleep mode.

- Keep MAIN_DTR high (pulled up by default).

- Execute AT+QSCLK=1 command. See document [2] for details about AT+QSCLK=1.

- Disconnect USB_VBUS. The following figure shows the above-mentioned connection between the module and the host. Figure 7: Sleep Mode Application without Suspend Function To awaken the module, power USB_VBUS by turning on the power switch. NOTE Please heed the level-shifting of the connection shown in dotted line between the module and the host. EG060K-GT_Hardware_Design 29 / 83 USB_VBUSUSB InterfaceVDDUSB InterfaceModuleHostGNDGNDMAIN_RIEINTUSB_VBUSUSB InterfaceVDDUSB InterfaceModuleHostMAIN_RIEINTPower SwitchGPIOGNDGND LTE-A Module Series 3.1.2. Airplane Mode The module provides W_DISABLE# to disable or enable airplane mode via hardware operation. W_DISABLE# is pulled up by default. Driving it low will bring the module into airplane mode. Table 7: Pin Description of W_DISABLE#

Pin Name Pin No. I/O Description Comment W_DISABLE#

151 DI Airplane mode control Pulled up by default. In low level, the module will enter airplane mode. If unused, keep it open. In airplane mode, the RF function is disabled by default, but it can also be enabled or disabled through AT commands. The following table shows the RF function status of the module. Table 8: RF Function Status W_DISABLE#

Logic Level AT Command RF Function Status Operating Modes AT+CFUN=1 Enabled Full functionality High Level AT+CFUN=0 Disabled Minimum functionality AT+CFUN=4 Disabled Airplane mode AT+CFUN=0 AT+CFUN=1 AT+CFUN=4 Disabled Airplane mode Low Level NOTE 1. W_DISABLE# for airplane mode control function is disabled by default. It can be enabled through 2. The execution of AT+CFUN command will not affect GNSS function. See document [2] for details about the AT command. 3.2. Power Supply 3.2.1. Power Supply Pins The module provides six VBAT pins dedicated to the connection to an external power supply. There are two separate voltage domains for VBAT. EG060K-GT_Hardware_Design 30 / 83 LTE-A Module Series Table 9: Pin Description of VBAT and GND Pins Pin Name Pin No. I/O Description Min. Typ. Max. Unit VBAT_RF 8588 PI Power supply for the modules RF part 3.3 3.8 4.4 VBAT_BB 155, 156 PI Power supply for the modules baseband part 3.3 3.8 4.4 V V GND 10, 13, 16, 17, 24, 30, 31, 35, 39, 44, 45, 54, 55, 63, 64, 69, 70, 75, 76, 8184, 89, 90, 9294, 96100, 102106, 108112, 114118, 120126, 128-133, 141, 142, 148, 153, 154, 157, 158, 167, 174, 177, 178, 181, 184, 187, 191, 196, 202208, 214299 The power supply of the module ranges from 3.3 V to 4.4 V. Make sure the input voltage never drops below 3.3 V, otherwise the module will be powered off automatically. The following figure shows the voltage drop during Tx power in 3G/4G networks. Figure 8: Power Supply Limits during Burst Transmission To decrease voltage drop, bypass capacitors of about 100 F with low ESR and one multilayer ceramic chip (MLCC) capacitor array with ultra-low ESR should be used for VBAT_BB/RF. It is recommended to use 4 ceramic capacitors (100 nF, 6.8 nF, 220 pF, 68 pF) for composing the MLCC array for VABT_BB and 6 ceramic capacitors (100 nF, 220 pF, 68 pF, 15 pF, 9.1 pF, 4.7 pF) for composing the MLCC array for VABT_RF, and place these capacitors close to VBAT pins. The main power supply from an external application must be a single voltage source which can supply power along two sub paths with star topology. The width of VBAT_BB trace should be no less than 1 mm. The width of VBAT_RF trace should be no less than 2 mm. In principle, the longer the VBAT trace is, the wider it should be. In addition, for stable power supply, it is necessary to add a high-power TVS near VBAT_BB and VBAT_RF. The star topology of the power supply is shown below. EG060K-GT_Hardware_Design 31 / 83 Power Supply (V)Burst TransmissionRippleDropBurst TransmissionLoad (A) LTE-A Module Series Figure 9: Star Topology of the Power Supply 3.2.2. Reference Design for Power Supply The power design for the module is vital as the performance of the module largely relies on the power source. The power supply of the module should be able to provide a sufficient current of at least 2 A. If the voltage drop between the input and output is not too high, powering the module with an LDO is recommended. If a big voltage difference exists between the input source and the desired output (VBAT), a buck DC-DC converter is preferred. The following figure shows a reference design for +5 V input power source. In this design, the typical power supply output is about 3.8 V and the maximum load current is 3 A. Figure 10: Reference Circuit of the Power Supply NOTE To avoid corrupting the data in the internal flash, do not switch off power supply when the module works normally. Only after the module is shut down with PWRKEY or AT command can you cut off the power EG060K-GT_Hardware_Design 32 / 83 TVSC1100 F100 nFC26.8 nFC3220 pFC468 pFC5C6100 F100 nFC7220 pFC868 pFC915 pFC109.1 pFC114.7 pFC12VBATVBAT_BBVBAT_RFModuleD1R1R20R0RDC_INMIC29302WUINOUTENGNDADJ24135VBAT 100 nF470 F100 nF100K47K470 F470R51K1 %1 %4.7K47KVBAT_EN LTE-A Module Series supply. 3.2.3. Power Supply Voltage Monitoring AT+CBC command can be used to monitor the VBAT_BB voltage value. See document [2] for details. 3.3. Turn On The module can be turned on via PWRKEY. Table 10: Pin Description of PWRKEY Pin Name Pin No. I/O Description Comment PWRKEY 2 DI Turn on/off the module Pulled-up internally. Active low. When the module is in turn-off mode, it can be turned on by driving PWRKEY low for at least 500 ms. It is recommended to control PWRKEY with an open drain/collector driver. After STATUS outputs a high level, PWRKEY can be released. A simple reference circuit is given below. Figure 11: Turn On with a Driving Circuit The other way to control PWRKEY is with a button. Pressing the button may result in a discharge of static electricity from your fingers. Therefore, it is necessary to place a TVS close to the button for ESD protection. A reference circuit is shown in the following figure. EG060K-GT_Hardware_Design 33 / 83 Turn on pulsePWRKEY4.7K47K 500 ms LTE-A Module Series Figure 12: Turn On With a Button The turn-on scenario is illustrated in the following figure. Figure 13: Turn On Timing NOTE 1. Make sure VBAT is stable for over 30 ms before pulling down PWRKEY. 2. If the module needs to be turned on automatically and turn-off is not needed, PWRKEY can be pulled down directly to GND with a recommended 10 k resistor. 3. Make sure there is no large capacitance on PWRKEY and RESET_N pins. EG060K-GT_Hardware_Design 34 / 83 PWRKEYS1Close to S1TVSVIL 0.5 VVIH 1.3 VVBATPWRKEYRESET_NSTATUSInactiveActiveMAIN_UARTNOTE1InactiveActiveUSB 500 ms9 s15 s10 s LTE-A Module Series 3.4. Turn Off The module can be turned off normally via two methods: using PWRKEY or executing AT+QPOWD. 3.4.1. Turn Off with PWRKEY Driving PWRKEY low for at least 800 ms, the module will execute the power-down procedure after PWRKEY is released. The turn-off scenario is illustrated in the following figure. Figure 14: Turning-off Timing 3.4.2. Turn Off with AT Command It is also a safe manner to turn off the module via AT+QPOWD. When turning off module with the AT command, keep PWRKEY at high level after the execution of the command. Otherwise the module will be turned on again after a successfully turn-off. See document [2] for details about the AT command. NOTE To avoid corrupting the data in the internal flash, do not switch off the power supply when the module works normally. The power supply can only be cut off after the module is shut down by PWRKEY or the AT command. 3.5. Reset The module can be reset by driving RESET_N low for 250-600 ms and then releasing it. EG060K-GT_Hardware_Design 35 / 83 VBATPWRKEYRunningPower-down procedureOFFModuleStatusSTATUS800 ms5 s LTE-A Module Series Table 11: Pin Description of RESET_N Pin Name Pin No. I/O Description Comment RESET_N 1 DI Reset the module Pulled up internally. Active low. The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver can control RESET_N. Figure 15: Reference Circuit of RESET_N with a Driving Circuit The reset scenario is illustrated in the following figure. Figure 16: Reset Timing NOTE 1. Reset the module with RESET_N only when it fails to be turned off with AT+QPOWD or PWRKEY. See document [2] for details about the AT command. 2. Make sure no large capacitance exists on PWRKEY and RESET_N pins. EG060K-GT_Hardware_Design 36 / 83 RESET_N250600 msMCUGPIOModuleReset pulse4.7K47KQ1VIL 0.5 VVIH 1.3 VVBAT 250 msResettingModule StatusRunningRESET_NRestart 600 ms LTE-A Module Series 4 Application Interfaces 4.1. USIM Interfaces The module provides two USIM interfaces. The circuitry of USIM interfaces meets ETSI and IMT-2000 requirements. The interfaces support both 1.8 V and 3.0 V USIM cards and Dual USIM Single Standby function. USIM card hot-swap is enabled by AT+QSIMDET. See document [2] for details about the AT command. Table 12: Pin Description of USIM Interfaces Pin Name Pin No. I/O Description Comment USIM1_DET 25 DI USIM1 card hot-plug detect If unused, keep it open. USIM1_VDD 26 PO USIM1 card power supply USIM1_CLK 27 DO USIM1 card clock USIM1_RST 28 DO USIM1 card reset USIM1_DATA 29 DIO USIM1 card data USIM2_VDD 74 PO USIM2 card power supply USIM2_DATA 77 DIO USIM2 card data USIM2_DET 78 DI USIM2 card hot-plug detect USIM2_RST 79 DO USIM2 card reset USIM2_CLK 80 DO USIM2 card clock If USIM2 interface is unused, keep it open. If USIM2 interface is unused, keep it open. If USIM2 interface is unused, keep it open. If USIM2 interface is unused, keep them open. The module supports USIM card hot-plug via USIM_DET pins, and both high and low level detections. The function is disabled by default. See AT+QSIMDET in document [2] for more details. The following figure shows a reference design for a USIM interface with an 8-pin USIM card connector. EG060K-GT_Hardware_Design 37 / 83 LTE-A Module Series Figure 17: Reference Circuit of a USIM Interface with an 8-Pin USIM Card Connector If USIM card detection function is unnecessary, keep USIM_DET open. A reference circuit for a USIM interface with a 6-pin USIM card connector is illustrated in the following figure. Figure 18: Reference Circuit of a USIM Interface with a 6-Pin USIM Card Connector For better reliability and availability of the USIM card in applications, follow the criteria below in the USIM circuit design:

Put the USIM card connector as close as possible to the module with a trace as short as possible, 200 mm at most. EG060K-GT_Hardware_Design 38 / 83 ModuleUSIM_VDDUSIM_RSTUSIM_CLKUSIM_DATAUSIM_DET22R22R22RVDD_EXT51K100 nFUSIM Card ConnectorGNDGNDVCCRSTCLKIOVPPGNDUSIM_VDD15KNMNMNMCD1CD2TVS arrayModuleUSIM_VDDUSIM_RSTUSIM_CLKUSIM_DATA22R22R22R100 nFUSIM Card ConnectorGNDVCCRSTCLKIOVPPGND15KUSIM_VDDNMNMNMTVS array LTE-A Module Series Keep USIM card signals away from RF and VBAT traces. Make sure the ground between the module and the USIM card connector is short and wide. Keep the trace width of ground and USIM_VDD not less than 0.5 mm to maintain the same electric potential. To avoid cross-talk between USIM_DATA and USIM_CLK, keep their traces away from each other and shield them with ground. For better ESD protection, it is recommended to add a TVS array of which parasitic capacitance should be less than 50 pF. 22 resistors should be added in series between the module and the USIM card connector to suppress the EMI spurious transmission and enhance the ESD protection. The USIM peripheral circuit should be close to the USIM card connector. The pull-up resistor on USIM_DATA trace can improve anti-jamming capability, and it should be close to the USIM card connector. 4.2. USB Interface The module provides one integrated USB (Universal Serial Bus) interface which complies with the USB 3.0 and 2.0 specifications and supports SuperSpeed (5 Gbps) mode on USB 3.0 and high-speed(480 Mbps) and full-speed (12 Mbps) modes on USB 2.0. The USB interface is used for AT command communication, data transmission, GNSS NMEA sentence output, software debugging, firmware upgrade. Table 13: Pin Description of USB Interface Pin Name Pin No. I/O Description Comment DI USB connection detect Typical 5.0 V USB_VBUS USB_DP USB_DM 32 34 33 AIO USB 2.0 differential data (+) AIO USB 2.0 differential data (-) USB_SS_TX_M 37 AO USB 3.0 super-speed transmit (-) USB_SS_TX_P 38 AO USB 3.0 super-speed transmit (+) USB_SS_RX_P 40 USB_SS_RX_M 41 USB_ID*

36 AI AI DI USB 3.0 super-speed receive (+) USB 3.0 super-speed receive (-) USB ID detect OTG_PWR_EN* 143 DO OTG power control Comply with USB 2.0 specifications. Require differential impedance of 90 . Comply with USB 3.0 specifications. Require differential impedance of 90 . If unused, keep them open. For more details about the USB 2.0 and USB 3.0 specifications, visit http://www.usb.org/home. EG060K-GT_Hardware_Design 39 / 83 LTE-A Module Series The USB interface is recommended to be reserved for firmware upgrade in your designs. The following figure shows a reference circuit of USB 2.0 and USB 3.0 interfaces. Figure 19: Reference Circuit of USB Application To ensure the signal integrity of USB data traces, C1 and C2 have already been integrated in the module;

C3 and C4 must be placed close to the host; and R1 to R4 should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles of USB interface should be followed during USB interface design to meet USB 2.0 and USB 3.0 specifications. Route the USB 2.0 and USB 3.0 signal traces as differential pairs with ground. The impedance of USB differential trace is 90 . For USB 2.0 signal traces, the trace should be shorter than 120 mm, and the differential data pair matching should be less than 2 mm. For USB 3.0 signal traces, the maximum length of each differential data pair (Tx/Rx) is recommended to be less than 100 mm, and each differential data pair matching should be less than 0.7 mm. While the matching between Tx and Rx should be less than 15.24 mm. Do not route signal traces under crystals, oscillators, magnetic devices, PCIe and RF signal traces. It is vital to route the USB differential traces in inner-layers of the PCB, and surround the traces with ground on that layer and with ground planes above and below. If a USB connector is used, keep the ESD protection components as close to the USB connector as EG060K-GT_Hardware_Design 40 / 83 USB_DPUSB_DMGNDUSB_DPUSB_DMGNDR1R2Close to ModuleR3R4Test PointsTVS ArrayNM_0RNM_0R0R0RMinimize these stubsModuleHostUSB_VBUSVDDUSB_SS_TX_PUSB_SS_TX_MUSB_SS_RX_PUSB_SS_RX_MC1C3C4100nF100nF100nF100nFUSB_SS_RX_PUSB_SS_RX_MUSB_SS_TX_PUSB_SS_TX_MUSB_IDGPIOC2 LTE-A Module Series possible. Junction capacitance of the ESD protection components might influence USB data traces, so pay attention to the selection of the components. Typically, the stray capacitance should be less than 2.0 pF for USB 2.0, and less than 0.4 pF for USB 3.0. If possible, reserve a 0 resistor on USB_DP and USB_DM traces respectively. Table 14: USB Trace Length Inside the Module Pin No. Signal Trace Length (mm) Length Difference 34 33 37 38 40 41 USB_DP USB_DM USB_SS_TX_M USB_SS_TX_P USB_SS_RX_P USB_SS_RX_M 16.02 16.34 20.57 20.21 19.62 19.46 4.3. UART Interfaces 0.32 0.36 0.16 The module provides three UART interfaces: one main UART interface, one debug UART interface, and one Bluetooth UART interface* (multiplexed from SPI interface). Features of these interfaces are shown as below:

Main UART interface supports 4800 bps, 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps

(default), 230400 bps, 460800 bps and 921600 bps baud rates. This interface is used for data transmission and AT command communication. Debug UART interface supports 115200 bps baud rate. It is used for Linux console and log output. Bluetooth UART interface* supports 115200 bps baud rate. It is used for Bluetooth communication and it is multiplexed from SPI interface. 4.3.1. Main UART Interface Table 15: Pin Description of Main UART Interface Pin Name Pin No. I/O Description Comment EG060K-GT_Hardware_Design 41 / 83 LTE-A Module Series CTS: DTE clear to send signal from DCE RTS: DTE request to send signal to DCE CTS: Connect to DTEs CTS. If unused, keep it open. RTS: Connect to DTE's RTS. If unused, keep it open. MAIN_CTS 56 MAIN_RTS 57 MAIN_RXD 58 MAIN_DCD 59 DO DI DI DO Main UART receive Main UART data carrier detect MAIN_TXD 60 DO Main UART transmit MAIN_RI 61 DO Main UART ring indication MAIN_DTR 62 DI Main UART data terminal ready 4.3.2. Debug UART Interface Table 16: Pin Description of Debug UART Interface If unused, keep them open. Pulled up by default. Pulling it low will awaken the module. If unused, keep it open. Sleep mode control. Pin Name Pin No. I/O Description Comment DBG_RXD 136 DBG_TXD 137 DI DO Debug UART receive Debug UART transmit If unused, keep them open. 4.3.3. Bluetooth UART Interface*

The module provides one Bluetooth UART interface multiplexed from SPI interface. Table 17: Pin Description of Bluetooth UART Interface Pin Name Pin No. Multiplexed Function I/O Description Comment BT_EN 3

DO SPI_MOSI 163 BT_TXD DO SPI_CLK 164 BT_CTS DI SPI_MISO 165 BT_RXD DI SPI_CS 166 BT_RTS DO Bluetooth function enable control Bluetooth UART transmit CTS: DTE clear to send signal from DCE Bluetooth UART receive RTS: DTE request to send signal to DCE If unused, keep them open. CTS: Connect to DTEs CTS. If unused, keep it open. If unused, keep it open. RTS: Connect to DTEs RTS. If unused, keep it open. EG060K-GT_Hardware_Design 42 / 83 LTE-A Module Series 4.3.4. UART Application The module provides 1.8 V UART interfaces. A level-shifting circuit should be used if the application is equipped with a 3.3 V UART interface. A voltage-level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows a reference design. Figure 20: Reference Circuit (IC Solution) Please visit http://www.ti.com for more information. Another example with a transistor circuit is shown below. For the design of circuits shown in dotted lines, refer to that shown in solid lines, but pay attention to the direction of the connection. Figure 21: Reference Circuit (Transistor Solution) NOTE EG060K-GT_Hardware_Design 43 / 83 VCCAVCCBOEA1A2A3A4A5A6A7A8GNDB1B2B3B4B5B6B7B8VDD_EXTMAIN_RIDCDRTSRXDDTRCTSTXD51K51K0.1 F0.1 FRI_MCUDCD_MCURTS_MCUTXD_MCUDTR_MCUCTS_MCURXD_MCUVDD_MCUTranslatorVDD_EXT10K120KMCU/ARMTXDRXDVDD_EXT10KVCC_MCU4.7K10KVDD_EXTTXDRXDRTSCTSDTRMAIN_RIRTSCTSGNDGPIODCDModuleGPIOEINTVDD_EXT4.7KGND1 nF1 nF LTE-A Module Series 1. Transistor circuit solution is not suitable for applications with high baud rates over 460 kbps. 2. Please note that the module CTS is connected to the host CTS, and the module RTS is connected to the host RTS. 4.4. SPI Interface The module provides one SPI interface which only supports master mode with a maximum clock frequency up to 50 MHz. Table 18: Pin Description of SPI Interface Pin Name Pin No. I/O Description Comment SPI_MOSI 163 SPI_CLK 164 DO DO SPI master output slave input SPI clock SPI_MISO 165 DI SPI master input slave output Master only. SPI_CS 166 DO SPI chip select The following figure shows a reference design of PCM and SPI interfaces with an external SLIC IC. The dotted line in figure below means an optional connection since some SLIC ICs need RST while some do not. Figure 22: Reference Circuit of PCM and SPI Application with SLIC EG060K-GT_Hardware_Design 44 / 83 PCM_DINPCM_DOUTPCM_SYNCPCM_CLKSPI_CLKSPI_MOSIModulePCMSPISLICSPI_CSSPI_MISOINTINTRSTRST LTE-A Module Series 4.5. PCM and I2C Interfaces The module supports audio communication via PCM (Pulse Code Modulation) digital interface and I2C interfaces. Besides, the two interfaces can be applied to audio codec and SLIC designs. Table 19: Pin Description of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_DIN PCM_DOUT PCM_SYNC PCM_CLK I2C_SDA I2C_SCL 66 68 65 67 42 43 DI PCM data input DO PCM data output DIO PCM data frame sync DIO PCM clock OD I2C serial data OD I2C serial clock I2S_MCLK 152 DO Clock output for codec The PCM interface supports the following modes:

If unused, keep them open. Output signal in master mode. Input signal in slave mode. If unused, keep them open. An external pull-up resistor is requisite. If unused, keep them open. Provide a digital clock output for an external audio codec. If unused, keep it open. Master only. Primary mode (short frame synchronization): the module works as both master and slave. Auxiliary mode (long frame synchronization): the module works as master only. In primary mode, the data is sampled on the falling edge of PCM_CLK and transmitted on the rising edge. The falling edge of PCM_SYNC represents the MSB. In this mode, the PCM interface supports 256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and 4096 kHz PCM_CLK at 16 kHz PCM_SYNC. In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The rising edge of PCM_SYNC represents the MSB. In this mode, the PCM interface operates with 256 kHz PCM_CLK and 8 kHz, 50 % duty cycle PCM_SYNC only. The module supports 16-bit linear data format. The following figures show the primary modes timing relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK, as well as the auxiliary modes timing relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK. EG060K-GT_Hardware_Design 45 / 83 LTE-A Module Series Figure 23: Primary Mode Timing Figure 24: Auxiliary Mode Timing The PCM clock and primary/auxiliary mode can be configured by AT+QDAI, and the default configuration is master mode using short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. See document [2] for details about the AT command. The following figure shows a reference design of PCM and I2C interfaces with an external codec IC. EG060K-GT_Hardware_Design 46 / 83 PCM_CLKPCM_SYNCPCM_DOUTMSBLSBMSB125 s12256255PCM_DINMSBLSBMSBPCM_CLKPCM_SYNCPCM_DOUTMSBLSBPCM_DIN125 sMSB123231LSB LTE-A Module Series Figure 25: Reference Circuit of PCM and I2C Application with Audio Codec NOTE The module works as a master device pertaining to I2C interface. 4.6. ADC Interfaces The module provides two ADC (Analog-to-Digital Converter) interfaces. Execute AT+QADC=0 to read the voltage value on ADC0. Execute AT+QADC=1 to read the voltage value on ADC1. See document [2] for details about these AT commands. For higher accuracy of ADC, the trace of ADC should be shielded with ground. Table 20: Pin Description of the ADC Interfaces Pin Name I/O Pin No. Description Comment ADC0 ADC1 AI AI 173 175 General-purpose ADC interface 01.875 V. If unused, keep them open. EG060K-GT_Hardware_Design 47 / 83 PCM_DINPCM_DOUTPCM_SYNCPCM_CLKI2C_SCLI2C_SDAModule1.8 V4.7K4.7KBCLKLRCKDACADCSCLSDABIASMICBIASINPINNLOUTPLOUTNCodec LTE-A Module Series Table 21: Characteristics of ADC Interfaces Parameter Min. Typ. Max. ADC0 Voltage Range ADC1 Voltage Range ADC Resolution 0 0

14 1.875 1.875

Unit V V bits NOTE 1. The input voltage of ADC should not exceed 1.875 V. 2. 3. It is prohibited to supply any voltage to ADC pins without VBAT. It is recommended to use a resistor divider circuit for ADC application. 4.7. Indication Signals 4.7.1. Network Status Indication The network indication pins NET_MODE and NET_STATUS can be used to drive network status indication LEDs. Their definitions and logic level changes upon the switch of network mode/status, which is described in the following tables. Table 22: Pin Description of NET_MODE and NET_STATUS Pin Name Pin No. I/O Description Comment NET_MODE 147 DO Indicate the modules network registration mode. NET_STATUS 170 DO Indicate the modules network activity status. If unused, keep them open. Table 23: Working Status of NET_MODE and NET_STATUS Pin Name Status Description NET_MODE Always High Always Low Registered on network Others Flicker slowly (200 ms High/1800 ms Low) Network searching NET_STATUS Flicker slowly (1800 ms High/200 ms Low) Idle EG060K-GT_Hardware_Design 48 / 83 LTE-A Module Series Flicker quickly (125 ms High/125 ms Low) Data transfer ongoing A reference circuit is shown in the following figure. Figure 26: Reference Circuit of the NET_MODE and NET_STATUS 4.7.2. Module Status Indication The STATUS pin is set as the modules status indicator. It outputs high level voltage when the module is turned on. Table 24: Pin Description of STATUS Pin Name Pin No. I/O Description Comment STATUS 171 DO Indicate the modules operation status If unused, keep it open. A reference circuit is shown as below. Figure 27: Reference Circuits of STATUS EG060K-GT_Hardware_Design 49 / 83 4.7K47KVBAT2.2KModuleNET_MODE/NET_STATUS4.7K47KVBAT2.2KModule STATUS LTE-A Module Series 4.7.3. MAIN_RI Execute AT+QCFG="risignaltype","physical" command to configure MAIN_RI behavior. No matter on which port a URC is presented, the URC will trigger the behavior of MAIN_RI. The behavior of MAIN_RI can be altered by executing AT+QCFG="urc/ri/ring" command. In addition, MAIN_RI behavior can be configured flexibly. The default behavior of the MAIN_RI is shown as below. Table 25: Default Behavior of MAIN_RI Response MAIN_RI keeps at high level. MAIN_RI outputs low pulse for 120 ms when a new URC returns. State Idle URC NOTE The URC can be output from UART interface, USB AT port (by default) and USB modem port by executing AT+QURCCFG. See document [2] for details about the AT command. 4.8. PCIe Interface The module provides one integrated PCIe (Peripheral Component Interconnect Express) interface which can transmit data. The module supports PCIe Root Complex (RC) mode only. PCI Express Base Specification Revision 2.0 compliant Data rate up to 5 Gbps/lane Can be connected to an external Ethernet IC (MAC and PHY) or WLAN IC Table 26: Pin Description of PCIe Interface Pin Name Pin No. I/O Description Comment PCIE_REFCLK_P 179 AO PCIe reference clock (+) Require differential impedance of 95 . EG060K-GT_Hardware_Design 50 / 83 LTE-A Module Series PCIE_REFCLK_M 180 AO PCIe reference clock (-) If unused, keep them open. PCIE_TX_M 182 AO PCIe transmit (-) PCIE_TX_P 183 AO PCIe transmit (+) PCIE_RX_M PCIE_RX_P 185 186 AI AI PCIe receive (-) PCIe receive (+) PCIE_CLKREQ_N 188 DI PCIe clock request PCIE_RC_RST_N 189 DO PCIe RC reset PCIE_WAKE_N 190 DI PCIe wake up Input signal in master mode. If unused, keep it open. Output signal in master mode. If unused, keep it open. Input signal, in master mode only. If unused, keep it open. To enhance the reliability and availability in applications, follow the criteria below in the PCIe interface circuit design:

Keep the PCIe data and control signals away from sensitive circuits and signals, such as RF, audio, and clock signals. Add a capacitor in series on Rx traces to prevent any DC bias. Keep the maximum trace length less than 300 mm. Keep the length matching of each differential data pair (Tx/Rx/REFCLK) less than 0.7 mm for PCIe routing traces. Keep the differential impedance of PCIe data trace as 85 10 %. Do not route PCIe data traces under components or cross them with other traces. The module only supports RC mode. In this mode, the module is configured to act as a PCIe RC device. The following figure shows a reference circuit of PCIe RC mode. EG060K-GT_Hardware_Design 51 / 83 LTE-A Module Series Figure 28: PCIe Interface Reference Circuit (RC Mode) Table 27: PCIe Trace Length Inside the Module Pin No. Signal Trace Length (mm) Length Difference (mm) 179 180 182 183 185 186 PCIE_REFCLK_P 22.24 PCIE_REFCLK_M 22.14 PCIE_TX_M PCIE_TX_P PCIE_RX_M PCIE_RX_P 17.99 17.91 13.91 13.98 0.1 0.08 0.07 4.9. SDIO Interface*

The module provides one SDIO interface which supports SD 3.0 protocol and eMMC*. EG060K-GT_Hardware_Design 52 / 83 GNDPCIE_TX_MPCIE_TX_PGNDPCIE_RX_MPCIE_RX_PPCIE_RX_MPCIE_RX_PPCIE_TX_MPCIE_TX_PC3C4C1C2100 nF100 nF100 nF100 nFModuleWLANPCIE_REFCLK_PPCIE_REFCLK_MPCIE_REFCLK_PPCIE_REFCLK_MPCIE_RC_RST_NPCIE_CLKREQ_NPCIE_WAKE_NPCIE_RST_NPCIE_CLKREQ_NPCIE_WAKE_NR2100KR1100KVDD_EXTNMR3Wi-FiAntenna LTE-A Module Series Table 28: Pin Description of SDIO Interface*

Pin Name Pin No. I/O Description Comment VDD_P2 135 PI Power input for SDIO interface SDIO_VDD 46 PO SD card application: SDIO pull up power source eMMC* application: Keep it open as used for eMMC*

SDIO_DATA3 48 DIO SDIO data bit 3 SDIO_DATA2 47 DIO SDIO data bit 2 If a SD card is used, connect VDD_P2 to SDIO_VDD. If an eMMC* is used or the SDIO interface* is unused, to connect VDD_EXT. Cannot work as SD card power supply. SD card must be powered by an external power supply. VDD_P2 SDIO_DATA1 50 DIO SDIO data bit 1 If unused, keep them open. SDIO_DATA0 49 DIO SDIO data bit 0 SDIO_CMD 51 DIO SDIO command SDIO_DET 52 DI SD card detect If unused, keep it open. SDIO_CLK 53 DO SDIO clock If unused, keep it open. The following figure shows an SDIO interface reference design. Figure 29: Reference Circuit of SD Card Application Follow the principles below in the SD card circuit design:

EG060K-GT_Hardware_Design 53 / 83 SD Card ConnectorDATA2DATA3CMDVDDCLKVSSDATA0DATA1DETECTIVEModuleSDIO_DATA3SDIO_DATA2SDIO_DATA1SDIO_VDDSDIO_DATA0SDIO_CLKSDIO_CMDSDIO_DETR1 0RR7100KR8100KR9100KR10100KR11100KR12470KVDD_EXTVDD_2V95R2 0RR3 0RR4 0RR5 0RR6 0RC2NMD2C3NMD3C4NMD4C5NMD5C6NMD6C1NMD1C710pFD7C833 pFC9100 nFC10100 F+

LTE-A Module Series The voltage of SD power supply ranges from 2.7 V to 3.6 V and a sufficient current up to 0.8 A should be provided. As the maximum output current of SDIO_VDD is 50 mA which can only work as SDIO pull-up resistors, the SD card needs an external power supply. To avoid the jitter, resistors R7 to R11 are needed to pull up the SDIO signals to SDIO_VDD. The values of these resistors range from 10 k to 100 k and the preferred value is 100 k. To improve signal quality, it is recommended to add resistors R1 to R6 of 0 in series between the module and the SD card connector. The bypass capacitors C1 to C6 are reserved and not mounted by default. All resistors and bypass capacitors should be placed close to the module. For better ESD protection, it is recommended to add a TVS on each SD signal trace. It is important to route the SDIO signal traces with ground. The impedance of SDIO data trace is 50

( 10 %). Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, and analog is recommended signals, as well as noisy signals such as clock signals and DC-DC signals. It length difference between SDIO_CLK and SDIO_DATA/SDIO_CMD within 1 mm and the total routing length less than 50 mm. The trace inside the module is 25 mm long in total, so the exterior trace should be less than 25 mm in total. to keep trace the Make sure the adjacent trace spacing is twice the trace width and the load capacitance of SDIO bus should be less than 15 pF. 4.10. Antenna Tuner Control Interfaces*

The module supports external antenna tuner control through the RFFE interface. Table 29: Pin Description of RFFE Interfaces* for Antenna Tuner Control Pin Name Pin No. I/O Description Comment RFFE_CLK 71 RFFE_DATA 73 DO DIO RFFE serial interface for external antenna tuner control. VDD_RF 162 PO Provide 2.85 V for external RF circuit. If unused, keep them open. 4.11. USB_BOOT Interface The module provides one USB_BOOT pin. Pull up USB_BOOT to VDD_EXT before powering on the module, then the module will enter emergency download mode when powered on. In this mode, the module supports firmware upgrade over USB interface. EG060K-GT_Hardware_Design 54 / 83 LTE-A Module Series Table 30: Pin Description of USB_BOOT Interface Pin Name Pin No. I/O Description Comment USB_BOOT 140 DI Force the module into emergency download mode Active high. If unused, keep it open. The following figure shows a reference circuit of USB_BOOT. Figure 30: Reference Circuit of USB_BOOT EG060K-GT_Hardware_Design 55 / 83 ModuleUSB_BOOTVDD_EXT10KTest pointTVSTVS LTE-A Module Series 5 RF Specifications The module provides one main antenna interface, one diversity antenna interface, and one GNSS antenna interface. The impedance of antenna port is 50 . 5.1. Cellular Network 5.1.1. Antenna Interface & Frequency Bands Table 31: Pin Description of the Main/Diversity Antenna Interfaces Pin Name Pin No. I/O Description Comment ANT0 ANT1 107 127 AIO Main antenna interface AI Diversity antenna interface 50 impedance Table 32: Frequency Bands 3GPP Band Transmit Receive LTE B41 LTE B48 24962690 24962690 3550-3700 3550-3700 Unit MHz MHz 5.1.2. Tx Power Table 33: Tx Power Frequency Bands Max. Tx Power Min. Tx Power LTE B41/LTE B48 23 dBm 2 dB

< -40 dBm EG060K-GT_Hardware_Design 56 / 83 LTE-A Module Series 5.1.3. Rx Sensitivity Table 34: Dual-Antenna Conducted Rx Sensitivity Frequency Bands Primary

(dBm) Diversity

(dBm) SIMO (dBm) 3 3GPP (SIMO) LTE-TDD B41 (10 MHz) TBD LTE-TDD B48 (10 MHz) TBD TBD TBD TBD TBD

-94.3 dBm

-95 dBm 5.1.4. Reference Design A reference design of ANT0, ANT1, interfaces is shown as below. It requires a -type matching circuit for better RF performance. The -type matching components (R1/C1/C2, R2/C3/C4) should be placed as close to the antennas as possible and are mounted according to the actual debugging. C1 to C4 are not mounted and a 0 resistor is mounted on R1 to R2 respectively by default. Figure 31: Reference Circuit of RF Antenna Interfaces NOTE Keep a proper distance between the main antenna and the diversity antenna to improve the receiving sensitivity. 3 SIMO is a smart antenna technology that uses a single antenna at the transmitter side and multiple (Primary + Diversity) antennas at the receiver side, which can improve Rx performance. EG060K-GT_Hardware_Design 57 / 83 ANT0R1 0RC1ModuleMainAntennaNMC2NMANT1R2 0RC3NMC4NMDiversityAntenna LTE-A Module Series 5.2. GNSS 5.2.1. Antenna Interface & Frequency Bands The module includes a fully integrated global navigation satellite system solution that supports GPS, GLONASS, BDS, and Galileo. The module supports standard NMEA 0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, the module GNSS engine is off. It must be switched on via AT command. For more details, see document [3]. Table 35: Pin Description of GNSS Antenna Interface Pin Name Pin No. I/O Description Comment ANT_GNSS 119 AI GNSS antenna interface 50 impedance. If unused, keep it open. Table 36: GNSS Frequency Type GPS Frequency 1575.42 1.023 GLONASS 1597.51605.8 Galileo BDS 1575.42 2.046 1561.098 2.046 5.2.2. GNSS Performance Table 37: GNSS Performance Unit MHz MHz MHz MHz Parameter Description Conditions Acquisition Autonomous Sensitivity Reacquisition Autonomous TTFF Tracking Cold start

@ open sky Autonomous Autonomous Typ. TBD TBD TBD TBD Unit dBm dBm dBm s EG060K-GT_Hardware_Design 58 / 83 LTE-A Module Series XTRA enabled Autonomous XTRA enabled Autonomous XTRA enabled Autonomous

@ open sky TBD TBD TBD TBD TBD TBD s s s s s m Warm start

@ open sky Hot start

@ open sky Accuracy CEP-50 NOTE 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Acquisition sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing the cold start command. 5.2.3. Reference Design A reference design of GNSS antenna is shown as below. Figure 32: Reference Circuit of GNSS Antenna Interface NOTE 1. An external LDO can be used to supply power according to the active antenna requirements. 2. The VDD circuit is unnecessary if the module is equipped with a passive antenna. EG060K-GT_Hardware_Design 59 / 83 GNSS AntennaVDDModuleANT_GNSS47nH10R0.1 F0RNMNM100 pF LTE-A Module Series 5.3. RF Routing Guidelines For users PCB, the characteristic impedance of all RF traces should be 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, height from the reference ground to the signal layer (H), and the space between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 33: Microstrip Design on a 2-layer PCB Figure 34: Coplanar Waveguide Design on a 2-layer PCB EG060K-GT_Hardware_Design 60 / 83 LTE-A Module Series Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, follow the principles below in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 . The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground. The distance between the RF pins and the RF connector should be as short as possible and all the right-angle traces should be changed to curved ones. The recommended trace angle is 135. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be not less than twice the width of RF signal traces (2 W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, see document [3]. 5.4. Antenna Design Requirements The following table shows the requirements on main antenna, diversity antenna and GNSS antenna. Table 38: Antenna Design Requirements Antenna Type Requirements EG060K-GT_Hardware_Design 61 / 83 LTE-A Module Series GNSS LTE Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Active antenna gain: > 0 dBi Active antenna embedded LNA gain: < 17 dB VSWR: 2 Efficiency: > 30 %

Max input power: 50 W Input impedance: 50 Cable insertion loss:

< 1 dB: LB (<1 GHz)

< 1.5 dB: MB (12.3 GHz)

< 2 dB: HB (> 2.3 GHz) 5.5. RF Connector Recommendation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by Hirose. Figure 37: Dimensions of the Receptacle (Unit: mm) U.FL-LP series mated plugs listed in the following figure can be used to match the U.FL-R-SMT. EG060K-GT_Hardware_Design 62 / 83 LTE-A Module Series Figure 38: Specifications of Mated Plugs The following figure describes the space factor of mating plugs. Figure 39: Space Factor of Mated Connectors (Unit: mm) For more details, please visit http://www.hirose.com. EG060K-GT_Hardware_Design 63 / 83 LTE-A Module Series 6 Electrical Characteristics and Reliability 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 39: Absolute Maximum Ratings Parameter VBAT_RF/VBAT_BB USB_VBUS Peak Current of VBAT_BB Peak Current of VBAT_RF Voltage at Digital Pins Voltage at ADC Min.

-0.3

-0.3

-0.3

-0.5 6.2. Power Supply Ratings Table 40: Power Supply Ratings Max. Unit 6.0 5.5 1.0 1.2 2.3 2.3 V V A A V V Parameter Description Conditions Min. Typ. Max. Unit VBAT VBAT_BB and VBAT_RF The actual input voltages must remain between the minimum and the maximum values. 3.3 3.8 4.4 V EG060K-GT_Hardware_Design 64 / 83 LTE-A Module Series 6.3. Power Consumption Table 41: Power Consumption Description Conditions Typ. Unit OFF state Power down Sleep state

Idle state LTE data transfer

(GNSS OFF) TDD-LTE PF=64(USB disconnected) TDD-LTE PF=64(USB2.0 connected) LTE-TDD B41 CH41490 @ 22.48 dBm LTE-TDD B48 CH55340 @ 22.61 dBm LTE-TDD B41 CH41490 @ 22.48 dBm LTE-TDD B48 CH55340 @ 22.61 dBm 22 TBD 12.43 18.91 391 331 391 331 A mA mA mA mA mA mA mA 6.4. Digital I/O Characteristics Table 42: VDD_EXT I/O Requirements Parameter Description Min. Max. Unit VIH VIL VOH VOL Input high voltage 0.7 VDD_EXT VDD_EXT + 0.3 V Input low voltage

-0.3 0.3 VDD_EXT V Output high voltage VDD_EXT - 0.45 VDD_EXT Output low voltage 0 0.45 V V Table 43: SDIO_VDD Low-voltage I/O Requirements Parameter Description Min. Max. Unit EG060K-GT_Hardware_Design 65 / 83 LTE-A Module Series VIH VIL VOH VOL Input high voltage Input low voltage 1.27

-0.3 Output high voltage 1.4 Output low voltage

2.0 0.58

0.45 V V V V Table 44: SDIO_VDD High-voltage I/O Requirements Parameter Description Min. Max. Unit VIH VIL VOH VOL Input high voltage 0.625 SDIO_VDD SDIO_VDD + 0.3 Input low voltage

-0.3 0.25 SDIO_VDD Output high voltage 0.75 SDIO_VDD

Output low voltage

0.125 SDIO_VDD V V V V Table 45: VDD_USIM High/Low-voltage I/O Requirements Parameter Description Min. Max. Unit VIH VIL VOH VOL Input high voltage 0.7 VDD_USIM VDD_USIM + 0.3 V Input low voltage

-0.3 0.2 VDD_USIM V Output high voltage 0.8 VDD_USIM

Output low voltage

0.4 V V 6.5. ESD Protection Static electricity occurs naturally and it may damage the module. Therefore, applying proper ESD countermeasures and handling methods is imperative. For example, wear anti-static gloves during the development, production, assembly and testing of the module; add ESD protection components to the ESD sensitive interfaces and points in the product design. EG060K-GT_Hardware_Design 66 / 83 LTE-A Module Series Table 46: Electrostatic Discharge Characteristics (Temperature: 25 C, Humidity: 45 %) Tested Points Contact Discharge Air Discharge Unit VBAT, GND Antenna Interfaces 5 4 Other Interfaces 0.5 10 8 1 kV kV kV 6.6. Operation and Storage Temperatures Table 47: Operating and Storage Temperatures Parameter Min. Operating Temperature Range 4

-30 Extended Operation Range 5 Storage temperature range

-40

-40 Typ.

+25

Max. Unit

+75

+85

+90 C C C 6.7. Thermal Dissipation The module offers the best performance when all internal IC chips are working within their operating temperatures. When the IC reaches or exceeds the maximum junction temperature, the module may still work but the performance and function (such as RF output power, data rate, etc.) will be affected to a certain extent. Therefore, the thermal design should be maximally optimized to ensure all internal ICs always work within in the recommended operating temperature. The following principles for thermal consideration are provided for reference:

Keep the module away from heat sources on your PCB, especially high-power components such as 4 To meet this operating temperature range, additional thermal dissipation improvements are required, such as passive or active heatsink, heat-pipe, vapor chamber, cold-plate etc. Within this operation temperature range, the module can meet 3GPP specifications. 5 To meet this extended temperature range, additional thermal dissipation improvements are required, such as passive or active heatsink, heat-pipe, vapor chamber, cold-plate etc. Within this extended temperature range, the module remains the ability to establish and maintain functions like SMS, without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again. EG060K-GT_Hardware_Design 67 / 83 LTE-A Module Series processor, power amplifier, and power supply. Maintain the integrity of the PCB copper layer and drill as many thermal vias as possible. Follow the principles below when the heatsink is necessary:

- Do not place large size components in the area where the module is mounted on your PCB to reserve enough place for heatsink installation.

- Attach the heatsink to the shielding cover of the module; In general, the heatsink should be larger than the module to cover the module completely;

- Choose the heatsink with adequate fins to dissipate heat;

- Choose a TIM (Thermal Interface Material) with high thermal conductivity, good softness and good wettability and place it between the heatsink and the module;

- Fasten the heatsink with four screws to ensure that it is in close contact with the module to prevent the heatsink from falling off during the drop, vibration test, or transportation. Figure 40: Placement and Fixing of the Heatsink EG060K-GT_Hardware_Design 68 / 83 PCBHeatsinkTIMModuleScrewTIMModuleHeatsinkPCB LTE-A Module Series 7 Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are 0.2 mm unless otherwise specified. 7.1. Mechanical Dimensions Figure 41: Module Top and Side Dimensions (Top View) EG060K-GT_Hardware_Design 69 / 83 Pin 1 LTE-A Module Series Pin 1 Figure 42: Module Bottom Dimensions (Bottom View, Unit: mm) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard. EG060K-GT_Hardware_Design 70 / 83 LTE-A Module Series 7.2. Recommended Footprint Pin 1 Figure 43: Recommended Footprint (Top View, Unit: mm) NOTE Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience. EG060K-GT_Hardware_Design 71 / 83 LTE-A Module Series 7.3. Top and Bottom Views Figure 44: Top and Bottom Views NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, see the module received from Quectel. EG060K-GT_Hardware_Design 72 / 83 LTE-A Module Series 8 Storage, Manufacturing & Packaging 8.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: the temperature should be 23 5 C and the relative humidity should be 3560 %. 2. Shelf life (in a vacuum-sealed packaging): 12 months in Recommended Storage Condition. 3. Floor life: 168 hours 6 in a factory where the temperature is 23 5 C and relative humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10 % (e.g., a dry cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement mentioned above;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. 5. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

The module must be soldered to PCB within 24 hours after the baking, otherwise it should be put in a dry environment such as in a dry cabinet. 6 This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. It is recommended to start the solder reflow process within 24 hours after the package is removed if the temperature and moisture do not conform to, or are not sure to conform to IPC/JEDEC J-STD-033. And do not remove the packages of tremendous modules if they are not ready for soldering. EG060K-GT_Hardware_Design 73 / 83 LTE-A Module Series NOTE 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules. 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. Apply proper force on the squeegee to produce a clean stencil surface on a single pass. To guarantee module soldering quality, the thickness of stencil for the module is recommended to be 0.130.18 mm. For more details, see document [4] . The peak reflow temperature ranges from 235246 C, with 246 C as the absolute maximum reflow temperature. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted only after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 45: Reflow Soldering Thermal Profile EG060K-GT_Hardware_Design 74 / 83 Temp. (C)Reflow ZoneSoak Zone246200217235CDBA150100 Max slope: 13 C/s Cooling down slope: -1.5 to -3 C/s Max slope: 13 C/s LTE-A Module Series Table 48: Recommended Thermal Profile Parameters Factor Soak Zone Max slope Recommendation 13 C/s Soak time (between A and B: 150 C and 200 C) 70120 s Reflow Zone Max slope Reflow time (D: over 217 C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle NOTE 13 C/s 4070 s 235246 C

-1.5 to -3 C/s 1 1. If a conformal coating is necessary for the module, do NOT use any coating material that may chemically react with the PCB or shielding cover, and prevent the coating material from flowing into the module. 2. Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the module. 3. Due to the complexity of the SMT process, please contact Quectel Technical Supports in advance for any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic soldering) that is not mentioned in document [4]. EG060K-GT_Hardware_Design 75 / 83 LTE-A Module Series 8.3. Packaging Specifications This chapter describes only the key parameters and process of packaging. All figures below are for reference only. The appearance and structure of the packaging materials are subject to the actual delivery. The module adopts injection tray packaging and details are as follow:

8.3.1. Carrier Tape Dimension details are as follow:

Figure 46: Carrier Tape Dimension Drawing Table 49: Carrier Tape Dimension Table (Unit: mm) W 56 P 48 T 0.35 A0 40 B0 37.5 K0 3.9 K1 5.3 F E 26.2 1.75 EG060K-GT_Hardware_Design 76 / 83 LTE-A Module Series 8.3.2. Plastic Reel Figure 47: Plastic Reel Dimension Drawing Table 50: Plastic Reel Dimension Table (Unit: mm) D1 330 D2 100 W 56.5 8.3.3. Packaging Process Place the module into the carrier tape and use the cover tape to cover them; then wind the heat-sealed carrier tape to the plastic reel and use the protective tape for protection. One plastic reel can load 200 modules. Place the packaged plastic reel, humidity indicator card and desiccant bag into a vacuum bag, then vacuumize it. EG060K-GT_Hardware_Design 77 / 83 LTE-A Module Series Place the vacuum-packed plastic reel into a pizza box. Put 4 pizza boxes into 1 carton and seal it. One carton can pack 800 modules. Figure 48: Packaging Process EG060K-GT_Hardware_Design 78 / 83 LTE-A Module Series 9 Appendix References Table 51: Related Documents Document Name

[1] Quectel_UMTS&LTE_EVB_R2.0_User_Guide

[2] Quectel_EG06xK&Ex120K&EM060K_Series_AT_Commands_Manual

[3] Quectel_RF_Layout_Application_Note

[4] Quectel_Module_Secondary_SMT_Application_Note Table 52: Term and Abbreviation Abbreviation Description AMR Adaptive Multi-Rate AMR-WB Adaptive Multi-Rate Wideband APT BDS bps CA Average Power Tracking BeiDou Navigation Satellite System bit(s) per second Carrier Aggregation CHAP Challenge-Handshake Authentication Protocol CPE CS CTS Customer Premise Equipment Coding Scheme Clear To Send DFOTA Delta Firmware Upgrade Over-the-Air EG060K-GT_Hardware_Design 79 / 83 LTE-A Module Series DL DRX DTR DTX Downlink Discontinuous Reception Data Terminal Ready Discontinuous Transmission eMMC Embedded Multi Media Card EFR ESD EVB FR FTP Enhanced Full Rate Electrostatic Discharge Evaluation Board Full Rate File Transfer Protocol GLONASS Global Navigation Satellite System (Russia) GMSK GNSS GPS HR HTTP HTTPS IC I/O LED LGA LNA Gaussian Minimum Shift Keying Global Navigation Satellite System Global Positioning System Half Rate Hypertext Transfer Protocol Hypertext Transfer Protocol Secure Integrated Circuit Chip Input/Output Light Emitting Diode Land Grid Array Low-Noise Amplifier LPDDR2 Low Power Double Data Rate 2 LTE LwM2M Long-Term Evolution Lightweight M2M EG060K-GT_Hardware_Design 80 / 83 LTE-A Module Series MAC MBIM MCP ME MIMO MO Medium Access Control Mobile Broadband Interface Model Multiple Chip Package Mobile Equipment Multiple Input Multiple Output Mobile Originated MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor MS MT M2M NAND NITZ PAP PC PCB PDA PDU PHY PING PMIC POS PPP QAM QMI QPSK Mobile Station Mobile Terminated Machine to Machine NON-AND(gate) Network Identity and Time Zone/Network Informed Time Zone Password Authentication Protocol Personal Computer Printed Circuit Board Personal Digital Assistant Protocol Data Unit Physical Packet Internet Groper power management IC Point of Sale Point-to-Point Protocol Quadrature Amplitude Modulation Qualcomm MSM (Mobile Station Modem) Interface/Qualcomm Message Interface Quadrature Phase Shift Keying EG060K-GT_Hardware_Design 81 / 83 LTE-A Module Series RF RHCP RST Rx SD Card SDRAM SIMO SLIC SMD SMS TCP TDD Tx UDP UL UMTS URC USIM Vmax Vnom Vmin VIHmax VIHmin VILmax VOHmax Radio Frequency Right Hand Circular Polarization Reset Receive Secure Digital Card synchronous dynamic random-access memory Single Input Multiple Output Subscriber Line Interface Circuit Surface Mounted Devices Short Message Service Transmission Control Protocol Time Division Duplex Transmit User Datagram Protocol Uplink Universal Mobile Telecommunications System Unsolicited Result Code Universal Subscriber Identity Module Maximum Voltage Nominal Voltage Minimum Voltage Maximum High-Level Input Voltage Minimum High-Level Input Voltage Maximum Low-Level input Voltage Maximum High-level Output Voltage EG060K-GT_Hardware_Design 82 / 83 LTE-A Module Series VOHmin VOLmax VOLmin VSWR WLAN Minimum High-level Output Voltage Maximum Low-level Output Voltage Minimum Low-level Output Voltage Voltage Standing Wave Ratio Wireless Local Area Networks EG060K-GT_Hardware_Design 83 / 83

QUECTEL EGO60K-GT Q1-AOK AA EGO6C0KGTAA-M25-CNASA FCC ID: XMR2022EGO60KGT IC: 10224A-2022EG060GT SN:E1A7BO586XXXXXX IMEI: 86481 BOSXXXXXXO. ri Lable location