BG95-M3 Mini PCIe Hardware Design LPWA Module Series Rev. BG95-M3_Mini_PCIe_Hardware_Design_V1.0 Date: 2020-05-15 Status: Released www.quectel.com LPWA Module Series BG95-M3 Mini PCIe Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:
Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit:
http://www.quectel.com/support/sales.htm For technical support, or to report documentation errors, please visit:
http://www.quectel.com/support/technical.htm Or email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE FORBIDDEN WITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2020. All rights reserved. BG95-M3_Mini_PCIe_Hardware_Design 1 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design About the Document Revision History Version Date Author Description 1.0 2020-05-15 Initial Speed SUN/
Watt ZHU/
Hyman DING BG95-M3_Mini_PCIe_Hardware_Design 2 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Contents About the Document ................................................................................................................................ 2 Contents .................................................................................................................................................... 3 Table Index ............................................................................................................................................... 5 Figure Index .............................................................................................................................................. 6 1 Introduction ....................................................................................................................................... 7 1.1. Safety Information ................................................................................................................... 9 2 Product Concept ............................................................................................................................. 10 2.1. General Description .............................................................................................................. 10 2.2. Key Features ..........................................................................................................................11 Functional Diagram ............................................................................................................... 13 2.3. 3 Application Interfaces ..................................................................................................................... 14 Pin Assignment ..................................................................................................................... 14 3.1. 3.2. Pin Description ...................................................................................................................... 15 3.1. Operating Modes .................................................................................................................. 18 3.2. Power Supply ........................................................................................................................ 19
(U)SIM Interface .................................................................................................................... 20 3.3. USB Interface ........................................................................................................................ 22 3.4. UART Interface ..................................................................................................................... 24 3.5. 3.6. PCM and I2C Interfaces* ...................................................................................................... 25 Control and Indication Interfaces .......................................................................................... 26 3.7. 3.7.1. RI ................................................................................................................................. 26 3.7.2. W_DISABLE# .............................................................................................................. 27 3.7.3. PERST# ....................................................................................................................... 27 3.7.4. LED_WWAN# .............................................................................................................. 28 3.7.5. WAKE# ........................................................................................................................ 29 4 GNSS Receiver ................................................................................................................................ 30 4.1. General Description .............................................................................................................. 30 4.2. GNSS Performance .............................................................................................................. 30 5 Antenna Connection ....................................................................................................................... 32 5.1. Main Antenna Connector ....................................................................................................... 32 5.1.1. Description of Main Antenna Connector ...................................................................... 32 5.1.2. Operating Frequency ................................................................................................... 33 5.2. GNSS Antenna Connector .................................................................................................... 34 5.2.1. Description of GNSS Antenna Connector .................................................................... 34 5.2.2. GNSS Frequency ......................................................................................................... 34 Antenna Requirements ......................................................................................................... 35 Recommended Mating Plugs for Antenna Connection .......................................................... 35 5.3. 5.4. 6 Electrical, Reliability and Radio Characteristics .......................................................................... 38 BG95-M3_Mini_PCIe_Hardware_Design 3 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 6.1. General Description .............................................................................................................. 38 Power Supply Requirements ................................................................................................. 38 6.2. Digital I/O Characteristics ...................................................................................................... 38 6.3. 6.4. RF Characteristics ................................................................................................................ 39 ESD Characteristics .............................................................................................................. 41 6.5. 6.6. Current Consumption ............................................................................................................ 41 7 Dimensions and Packaging ............................................................................................................ 45 7.1. General Description .............................................................................................................. 45 7.2. Mechanical Dimensions of BG95-M3 Mini PCIe ................................................................... 45 7.3. Standard Dimensions of Mini PCI Express ............................................................................ 46 Packaging Specification ........................................................................................................ 47 7.4. 8 Appendix A References .................................................................................................................. 48 9 Appendix B GPRS Coding Schemes ............................................................................................. 51 10 Appendix C GPRS Multi-slot Classes ............................................................................................ 52 11 Appendix D EDGE Modulation and Coding Schemes .................................................................. 54 BG95-M3_Mini_PCIe_Hardware_Design 4 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Table Index Table 1: Description of BG95-M3 Mini PCIe ............................................................................................ 10 Table 2: Key Features of BG95-M3 Mini PCIe .......................................................................................... 11 Table 3: Definition of I/O Parameters ....................................................................................................... 15 Table 4: Pin Description ........................................................................................................................... 16 Table 5: Overview of Operating Modes ................................................................................................... 19 Table 6: Definition of VCC_3V3 and GND Pins ....................................................................................... 19 Table 7: Pin Definition of (U)SIM Interface .............................................................................................. 20 Table 8: Pin Definition of UART Interface ................................................................................................ 24 Table 9: Pin Definition of PCM and I2C Interfaces ................................................................................... 25 Table 10: Pin Definition of Control and Indication Interfaces ................................................................... 26 Table 11: Airplane Mode Control (Hardware Method) .............................................................................. 27 Table 12: Airplane Mode Control (Software Method) ............................................................................... 27 Table 13: Indications of Network Status (AT+QCFG="ledmode",0, Default Setting) ................................ 28 Table 14: Indications of Network Status (AT+QCFG="ledmode",1) ......................................................... 29 Table 15: GNSS Performance ................................................................................................................. 30 Table 16: Description of Main Antenna Connector................................................................................... 32 Table 17: Operating Frequency ............................................................................................................... 33 Table 18: Description of GNSS Antenna Connector ................................................................................ 34 Table 19: GNSS Frequency ..................................................................................................................... 34 Table 20: Antenna Requirements ............................................................................................................ 35 Table 21: Power Supply Requirements ................................................................................................... 38 Table 22: 3.3 V Digital I/O Characteristics ............................................................................................... 39 Table 23: 1.8 V Digital I/O Characteristics ............................................................................................... 39 Table 24: Conducted RF Output Power ................................................................................................... 39 BG95-M3_Mini_PCIe_Hardware_Design 5 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Figure Index Figure 1: Functional Diagram .................................................................................................................. 13 Figure 2: Pin Assignment ........................................................................................................................ 15 Figure 3: Reference Design of Power Supply ......................................................................................... 20 Figure 4: Reference Design of (U)SIM Interface with 8-Pin (U)SIM Card Connector .............................. 21 Figure 5: Reference Design of (U)SIM Interface with 6-Pin (U)SIM Card Connector .............................. 21 Figure 6: Reference Design of USB Interface ......................................................................................... 23 Figure 7: Reference Design of UART Interface ....................................................................................... 24 Figure 8: Reference Design of PCM and I2C Application with Audio Codec ........................................... 25 Figure 9: RI Behavior .............................................................................................................................. 27 Figure 10: Reset Timing .......................................................................................................................... 28 Figure 11: Reference Design of LED_WWAN# ....................................................................................... 28 Figure 12: WAKE# Behaviors .................................................................................................................. 29 Figure 13: Main and GNSS Antenna Connectors .................................................................................... 32 Figure 14: Dimensions of Receptacles (Unit: mm) .................................................................................. 36 Figure 15: Mechanicals of U.FL-LP Mating Plugs ................................................................................... 36 Figure 16: Space Factor of Mated Connectors (Unit: mm) ...................................................................... 37 Figure 17: Mechanical Dimensions of BG95-M3 Mini PCIe ..................................................................... 45 Figure 18: Standard Dimensions of Mini PCI Express ............................................................................. 46 Figure 19: Dimensions of the Mini PCI Express Connector (Molex 679105700) ..................................... 47 BG95-M3_Mini_PCIe_Hardware_Design 6 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 1 Introduction This document defines Quectel BG95-M3 Mini PCIe module, and describes its air interfaces and hardware interfaces which are connected with customers applications. This document helps customers quickly understand the interface specifications, electrical characteristics, mechanical specifications and other related information of the module. To facilitate application designs, it also includes some reference designs for customers reference. The document, coupled with application notes and user guides, makes it easy to design and set up mobile applications with BG95-M3 Mini PCIe. 1.2. FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met:
1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time-
averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3.A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR201910BG96M3. 4.To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:
GSM850:8.571 dBi GSM1900:10.030dBi Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:8.000dBi Catm LTE Band5/26:12.541dBi Catm LTE Band12/85:11.798dBi Catm LTE Band13:12.214dBi Catm LTE Band14:12.272 dBi NB LTE Band2/25:11.000dBi NB LTE Band4/66:8.000dBi NB LTE Band5/26:12.541dBi NB LTE Band12/85:11.798dBi NB LTE Band13:12.214dBi BG95-M3_Mini_PCIe_Hardware_Design 7 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design NB LTE Band14:12.272 dBi NB LTE Band71:11.687 dBi 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:
A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification (labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible;
then an additional permanent label referring to the enclosed module:Contains Transmitter Module FCC ID: XMR201910BG96M3 or Contains FCC ID: XMR201910BG96M3 must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. BG95-M3_Mini_PCIe_Hardware_Design 8 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as mobile phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust and metal powders. BG95-M3_Mini_PCIe_Hardware_Design 9 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 2 Product Concept 2.1. General Description functionality to meet customers specific application demands. BG95-M3 Mini PCIe is an embedded IoT (LTE Cat M1, LTE Cat NB2 and EGPRS) wireless communication module with PCI Express Mini Card 1.2 standard interface. It provides data connectivity on LTE-FDD and GPRS/EGPRS networks, and supports half-duplex operation in LTE network. It also provides GNSS and voice 1) The module can be applied in the following fields:
Wireless POS systems Tracking systems Security systems Intelligent meter reading systems Table 1: Description of BG95-M3 Mini PCIe Item Description LTE Cat M1 LTE Cat NB2 LTE-FDD:
B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/B25/B26/B27/B28/B66/B85 LTE-FDD:
B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/B25/B28/B66/B71/B85 EGPRS 850/900/1800/1900 MHz Power Class Power Class 5 (21 dBm) @ LTE bands GNSS GPS, GLONASS, BeiDou, Galileo, QZSS Digital Audio Support PCM for VoLTE and GSM CS voice only NOTE 1) BG95-M3 Mini PCIe supports VoLTE (Voice over LTE) under LTE Cat M1 network and CS voice under GSM network. BG95-M3_Mini_PCIe_Hardware_Design 10 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 2.2. Key Features The following table describes the detailed features of BG95-M3 Mini PCIe module. Table 2: Key Features of BG95-M3 Mini PCIe Feature Details Function Interface PCI Express Mini Card 1.2 Standard Interface Power Supply Supply voltage: 3.03.6 V Typical supply voltage: 3.3 V Transmitting Power LTE Features Class 5 (21 dBm +1.7/-3 dB) for LTE-FDD bands Class 4 (33 dBm 2 dB) for GSM850 Class 4 (33 dBm 2 dB) for EGSM900 Class 1 (30 dBm 2 dB) for DCS1800 Class 1 (30 dBm 2 dB) for PCS1900 Class E2 (27 dBm 3 dB) for GSM850 8-PSK Class E2 (27 dBm 3 dB) for EGSM900 8-PSK Class E2 (26 dBm 3 dB) for DCS1800 8-PSK Class E2 (26 dBm 3 dB) for PCS1900 8-PSK Support 3GPP Rel-14 Support LTE Cat M1 and LTE Cat NB2 Support 1.4 MHz RF bandwidth for LTE Cat M1 Support 200 kHz RF bandwidth for LTE Cat NB2 Cat M1: Max. 588 kbps (DL)/1119 kbps (UL) Cat NB2: Max.127 kbps (DL)/158.5 kbps (UL) GPRS:
Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107 kbps (DL)/85.6 kbps (UL) Scheme) Downlink coding schemes: MCS 19 Uplink coding schemes: MCS 19 Max. 296 kbps (DL)/236.8 kbps (UL) GSM Features EDGE:
Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Internet Protocol Features Support PPP/TCP/UDP/SSL/TLS/FTP(S)/HTTP(S)/NITZ/PING/MQTT/
LwM2M/CoAP/IPv6 protocols Support PAP
(Password Authentication Protocol) and CHAP
(Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections BG95-M3_Mini_PCIe_Hardware_Design 11 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: ME by default
(U)SIM Interface Support 1.8 V USIM/SIM card only Baud rate can reach up to 230400 bps, 115200 bps by default Used for AT command communication and data transmission Support one digital audio interface: PCM interface for VoLTE and GSM CS voice only Compliant with USB 2.0 specification (slave only) Used for AT command communication, data transmission, GNSS NMEA output, software debugging and firmware upgrade Support USB serial drivers for Windows 7/8/8.1/10, Linux 2.65.4, Android 4.x9.x Main antenna connector GNSS antenna connector Gen9 VT of Qualcomm Protocol: NMEA 0183 Data update rate: 1 Hz by default 3GPP TS 27.007, 27.005 compliant AT commands Quectel enhanced AT commands Size: (51.0 0.15) mm (30.0 0.15) mm (4.9 0.2) mm Weight: 7.2 g Operating temperature range: -35C to +75C 2) Extended temperature range: -40C to +80C 3) Storage temperature range: -40C to +90C Firmware Upgrade USB interface DFOTA*
RoHS All hardware components are fully compliant with EU RoHS directive 1) USB_VBUS has been connected to modules VBAT pin by default. 2) Within the operating temperature range, the module meets 3GPP specifications. 3) Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice, SMS and data transmission, without any unrecoverable malfunction. Radio spectrum and radio network will not be influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again. BG95-M3_Mini_PCIe_Hardware_Design 12 / 53 SMS UART Interfaces Audio Feature USB Interface 1) Antenna Connectors GNSS Features AT Commands Physical Characteristics Temperature Range NOTES 1. 2. 3. LPWA Module Series BG95-M3 Mini PCIe Hardware Design 2.3. Functional Diagram The following figure shows the block diagram of BG95-M3 Mini PCIe. Figure 1: Functional Diagram NOTE The integrated (U)SIM card connector shares the same (U)SIM bus with the external (U)SIM card connector that is connected to Mini PCI Express (U)SIM interface. It does not support (U)SIM card detection function, and cannot be used simultaneously with the external (U)SIM card connector. When unused, it has no any effect to the external (U)SIM card connector. BG95-M3_Mini_PCIe_Hardware_Design 13 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 3 Application Interfaces The physical connections and signal levels of BG95-M3 Mini PCIe comply with PCI Express Mini CEM specifications. This chapter mainly describes the definition and application of the following interfaces of BG95-M3 Mini PCIe:
Power supply USB interface UART interface PCM and I2C interfaces*
Control and indicator interfaces
(U)SIM interface NOTE
* means under development. 3.1. Pin Assignment The following figure shows the pin assignment of BG95-M3 Mini PCIe module. The top side contains BG95-M3 module and antenna connectors. BG95-M3_Mini_PCIe_Hardware_Design 14 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Figure 2: Pin Assignment 3.2. Pin Description The following tables show the pin definition and description of BG95-M3 Mini PCIe. Table 3: Definition of I/O Parameters Type DI DO IO OC OD PI PO Description Digital Input Digital Output Bidirectional Open Collector Open Drain Power Input Power Output BG95-M3_Mini_PCIe_Hardware_Design 15 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Table 4: Pin Description Pin No. Mini PCI Express Standard Name BG95-M3 Mini PCIe Pin Name I/O Description Comment WAKE#
WAKE#
OC Active low Used to wake up the host 3.03.6 V DC power supply, typically 3.3 V 3.3 Vaux VCC_3V3 PI COEX1 RESERVED Reserved GND GND Mini card ground COEX2 RESERVED Reserved 1.5V RESERVED Reserved CLKREQ#
RESERVED Reserved UIM_PWR USIM_VDD PO 1.8 V only
(U)SIM card power supply GND GND Mini card ground UIM_DATA USIM_DATA IO
(U)SIM card data 1.8 V only Connect to DTEs TX. Connect to DTEs RX. REFCLK-
UART_RX DI UART receive data UIM_CLK USIM_CLK DO
(U)SIM card clock 1.8 V only REFCLK+
UART_TX DO UART transmit data UIM_RESET USIM_RST DO
(U)SIM card reset 1.8 V only GND GND Mini card ground UIM_VPP RESERVED Reserved RESERVED RI DO Used to wake up the host Active low GND GND Mini card ground RESERVED RESERVED Reserved W_DISABLE#
W_DISABLE#
DI Airplane mode control GND GND Mini card ground PERST#
PERST#
DI Fundamental reset signal Pulled up by default. Active low. Pulled up by default. Active low. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 BG95-M3_Mini_PCIe_Hardware_Design 16 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design PERn0 UART_CTS DI UART clear to send 3.3 Vaux RESERVED Reserved PERp0 UART_RTS DO UART request to send Connect to DTEs RTS. Connect to DTEs CTS GND GND 1.5V GND GND GND GND Mini card ground Mini card ground Mini card ground RESERVED Reserved 30 SMB_CLK I2C_SCL 1) OD I2C serial clock 31 PETn0 DTR DI Data terminal ready 32 SMB_DATA I2C_SDA 1) OD I2C serial data Require external pull-up to 1.8 V. For VoLTE and GSM CS voice only. Require external pull-up to 1.8 V. For VoLTE and GSM CS voice only. PETp0 RESERVED Reserved GND GND GND GND Mini card ground Mini card ground USB_D-
USB_DM IO USB differential data (-) GND GND Mini card ground USB_D+
USB_DP IO USB differential data (+) 3.3 Vaux VCC_3V3 PI 3.03.6 V DC power supply, typically 3.3 V GND GND Mini card ground 3.3 Vaux VCC_3V3 PI 3.03.6 V DC power supply, typically 3.3 V LED signal for indicating the network status of the module GND GND Mini card ground LED_WWAN#
LED_WWAN#
OC Active low 23 24 25 26 27 28 29 33 34 35 36 37 38 39 40 41 42 43 BG95-M3_Mini_PCIe_Hardware_Design 17 / 53 1.8 V power domain. For VoLTE and GSM CS voice only. 1.8 V power domain. For VoLTE and GSM CS voice only. 1.8 V power domain. For VoLTE and GSM CS voice only. 1.8 V power domain. For VoLTE and GSM CS voice only. LPWA Module Series BG95-M3 Mini PCIe Hardware Design 44 LED_WLAN#
USIM_DET DI
(U)SIM card insertion detection 45 RESERVED PCM_CLK 1) DO PCM clock signal 46 LED_WPAN#
RESERVED Reserved 47 RESERVED PCM_DOUT 1) DO PCM data output 48 1.5V RESERVED Reserved 49 RESERVED PCM_DIN 1) DI PCM data input 50 GND GND Mini card ground 51 RESERVED PCM_SYNC 1) DO PCM frame synchronization 52 3.3 Vaux VCC_3V3 PI 3.3 V DC supply NOTES 1) PCM and I2C interfaces support VoLTE and GSM CS voice only. 1. 2. The module can be reset by driving PERST# low for 23.8 s. 3. Keep all reserved and unused pins unconnected. 3.1. Operating Modes The following table briefly outlines the operating modes to be mentioned in the following chapters. BG95-M3_Mini_PCIe_Hardware_Design 18 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Table 5: Overview of Operating Modes Mode Details Normal Operation Idle Software is active. The module has registered on the network, and it is ready to send and receive data. Talk/Data Network connection is ongoing. In this mode, the power consumption is decided by network setting and data transfer rate. Minimum Functionality Mode AT+CFUN=0 command can set the module to a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. Airplane Mode AT+CFUN=4 command or W_DISABLE# pin can set the module to airplane mode. In this case, RF function will be invalid. 3.2. Power Supply The following table shows the definition of VCC_3V3 pins and ground pins. Table 6: Definition of VCC_3V3 and GND Pins Pin Name Pin No. I/O Power Domain Description VCC_3V3 2, 39, 41, 52 PI 3.03.6 V Typically 3.3 V DC supply GND 4, 9, 15, 18, 21, 26, 27, 29, 34, 35, 37, 40, 43, 50 Mini card ground The typical supply voltage of BG95-M3 Mini PCIe is 3.3 V. In 2G network, the input peak current may reach 2.7 A during the transmitting time. Therefore, the power supply must be able to provide a rated current of 2.7 A at least, and a low-ESR bypass capacitor no less than 470 F should be used to prevent the voltage from dropping. If the switching power supply is used to supply power to the module, the power device and power supply routing traces of the switching power supply should avoid the antennas as much as possible to prevent EMI interference. The following figure shows a reference design of power supply where R2 and R3 are 1% tolerance resistors, and C3 is a low-ESR capacitor. BG95-M3_Mini_PCIe_Hardware_Design 19 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design LDO_IN VCC_3V3 MIC29302WU U1 2 IN OUT 4 82K 1%
R4 C3 C4 C5 C6 470R 470uF 100nF 33pF 10pF R2 R3 47K 1%
Figure 3: Reference Design of Power Supply D1 C1 R1 C2 TVS 470uF 100nF 51K R5 4.7K MCU_POWER _ON/OFF R6 47K 3.3. (U)SIM Interface The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Only 1.8 V (U)SIM card is supported. The following table shows the pin definition of (U)SIM interface. Table 7: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Power Domain Description USIM_VDD USIM_DATA USIM_CLK USIM_RST USIM_DET 8 10 12 14 44 PO 1.8 V
(U)SIM card power supply IO DO 1.8 V 1.8 V
(U)SIM card data
(U)SIM card clock DO 1.8 V
(U)SIM card reset DI 1.8 V
(U)SIM card insertion detection BG95-M3 Mini PCIe supports (U)SIM card hot-plug via USIM_DET, and both high and low level detection are supported. The function is disabled by default. See AT+QSIMDET in document [2] for details. The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM card connector. BG95-M3_Mini_PCIe_Hardware_Design 20 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 1.8V USIM_VDD 51K 15K Module GND USIM_VDD USIM_RST USIM_CLK USIM_DET USIM_DATA 0R 0R 0R 100 nF
(U)SIM Card Connector VCC RST CLK GND VPP IO 33 pF 33 pF 33 pF GND GND GND Figure 4: Reference Design of (U)SIM Interface with 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference design of (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. Figure 5: Reference Design of (U)SIM Interface with 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in customers applications, please follow the criteria below in (U)SIM circuit design:
Keep the placement of (U)SIM card connector to the module as close as possible. Keep the trace length as less than 200 mm as possible. Keep (U)SIM card signals away from RF and power supply traces. Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground no less than 0.5 mm to maintain the same electric potential. The decouple BG95-M3_Mini_PCIe_Hardware_Design 21 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design capacitor between USIM_VDD and GND should be not more than 1 F and be placed close to the
(U)SIM card connector. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. In order to offer good ESD protection, it is recommended to add a TVS diode with parasitic capacitance not exceeding 15 pF. The 0 resistors should be added in series between the module and the (U)SIM card connector so as to facilitate debugging. The 33 pF capacitors are used for filtering interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the (U)SIM card connector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion are applied, and should be placed close to the (U)SIM card connector. 3.4. USB Interface The module provides one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports operation at low-speed (1.5 Mbps) and full-speed (12 Mbps) modes. The USB interface is used for AT command communication, data transmission, GNSS NMEA output, software debugging, and firmware upgrade. The following table shows the pin definition of USB interface. Table: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment USB_DM 36 USB differential data (-) Require differential impedance of 90 USB_DP 38 USB differential data (+) Require differential impedance of 90 IO IO The following figure shows a reference design of USB interface. BG95-M3_Mini_PCIe_Hardware_Design 22 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Figure 6: Reference Design of USB Interface A common mode choke L1 is recommended to be added in series between the module and the MCU in order to suppress EMI spurious transmission. Meanwhile, the 0 resistors (R3 and R4) should be added in series between the module and the test points so as to facilitate debugging, and the resistors are not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 must be placed close to the module, and also the resistors should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles should be complied with when design the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with ground surrounded. The impedance of USB differential trace is 90 . Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and with ground planes above and below. Junction capacitance of the ESD protection device might cause influences on USB data lines, so please pay attention to the selection of the device. Typically, the stray capacitance should be less than 2 pF. Keep the ESD protection devices as close to the USB connector as possible. NOTE BG95-M3 Mini PCIe can only be used as a slave device. BG95-M3_Mini_PCIe_Hardware_Design 23 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 3.5. UART Interface The UART interface supports 9600, 19200, 38400, 57600, 115200 and 230400 bps baud rates. The default baud rate is 115200 bps. This interface can be used for AT command communication and data transmission. The following table shows the pin definition of the UART interface. Table 8: Pin Definition of UART Interface Pin Name Pin No. I/O Power Domain Description UART_RX UART_TX DI 3.3 V UART receive data DO 3.3 V UART transmit data UART_CTS DI 3.3 V UART clear to send 11 13 23 25 UART_RTS DO 3.3 V UART request to send The power domain of UART interface is 3.3 V. Pay attention to the signal direction while connecting the UART interface to a peripheral MCU/RAM. A reference design of UART interface is provided below:
Figure 7: Reference Design of UART Interface NOTE AT+IPR can be used to set the baud rate of UART interface, and AT+IFC can be used to set the hardware flow control (hardware flow control is disabled by default). See document [2] for details. BG95-M3_Mini_PCIe_Hardware_Design 24 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 3.6. PCM and I2C Interfaces*
BG95-M3 Mini PCIe provides one Pulse Code Modulation (PCM) digital interface and one I2C interface for VoLTE and GSM CS voice. The following table shows the pin definition of PCM and I2C interfaces that can be applied in audio codec design. Table 9: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Power Domain Description PCM_CLK PCM_DOUT PCM_DIN PCM_SYNC I2C_SCL I2C_SDA 45 47 49 51 30 32 DO DO DI DO OD 1.8 V 1.8 V 1.8 V 1.8 V 1.8 V OD 1.8 V PCM clock signal PCM data output PCM data input PCM frame synchronization I2C serial clock. Require external pull-up to 1.8 V. I2C serial data. Require external pull-up to 1.8 V. The following figure shows a reference design of PCM and I2C interfaces with an external codec IC. Figure 8: Reference Design of PCM and I2C Application with Audio Codec BG95-M3_Mini_PCIe_Hardware_Design 25 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design NOTE PCM and I2C interfaces support VoLTE and GSM CS voice only. 3.7. Control and Indication Interfaces The following table shows the pin definition of control and indication interfaces. Table 10: Pin Definition of Control and Indication Interfaces Pin Name Pin No. I/O Power Domain Description RI DTR 17 31 DO 3.3 V Used to wake up the host. DI 3.3 V Data terminal ready. W_DISABLE#
20 DI 3.3 V PERST#
22 DI 3.3 V LED_WWAN#
42 OC Airplane mode control. Pulled up by default. Active low. Fundamental reset signal. Pulled up by default. Active low. LED signal for indicating the network status of the module. Active low. WAKE#
1 OC Used to wake up the host. The module can be reset by driving PERST# low for 23.8 s. NOTE 3.7.1. RI RI is used to wake up the host. When a URC returns, there will be the following behaviors on the RI pin after executing AT+QCFG="risignaltype","physical". BG95-M3_Mini_PCIe_Hardware_Design 26 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Figure 9: RI Behavior 3.7.2. W_DISABLE#
W_DISABLE# enables/disables the RF function (excluding GNSS). It is pulled up by default, and driving it low makes the module enter airplane mode. The pin function is disabled by default, and AT+QCFG="airplanecontrol",1 can be used to enable this function. Table 11: Airplane Mode Control (Hardware Method) W_DISABLE#
RF Function Status Module Operation Mode High level (default) RF enabled Normal mode Low level RF disabled Airplane mode The RF function can also be enabled/disabled with AT+CFUN=<fun>, and the details are listed below. Table 12: Airplane Mode Control (Software Method) AT+CFUN=<fun>
RF Function Status Module Operation Mode
<fun>=0
<fun>=1
<fun>=4 RF and (U)SIM disabled Minimum functionality mode RF enabled Full functionality (normal mode) RF disabled Airplane mode 3.7.3. PERST#
PERST# forces a hardware reset on the module. The module can be reset by driving PERST# low for 23.8 s and then releasing it. The reset timing is illustrated in the following figure. BG95-M3_Mini_PCIe_Hardware_Design 27 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design VCC_3V3 PERST#
Module Status 2 s 3.8 s VIL 0.45 V VIH 2.3 V Running Resetting Restart Figure 10: Reset Timing 3.7.4. LED_WWAN#
LED_WWAN# indicates the network status of the module, and it absorbs a current up to 40 mA. According to the following circuit, in order to reduce the current of the LED, a resistor must be placed in series with the LED. The LED is powered on when LED_WWAN# is pulled low. Figure 11: Reference Design of LED_WWAN#
LED_WWAN# supports two indication modes which can be switched through AT+QCFG="ledmode":
AT+QCFG="ledmode",0 (Default setting) AT+QCFG="ledmode",1 The following tables show the detailed network status indications of LED_WWAN#. Table 13: Indications of Network Status (AT+QCFG="ledmode",0, Default Setting) Pin Status Description Flicker slowly (200 ms low/1800 ms high) Network searching Flicker slowly (1800 ms low/200 ms high) Idle Flicker quickly (125 ms low/125 ms high) Data transfer is ongoing BG95-M3_Mini_PCIe_Hardware_Design 28 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Always low Voice calling Table 14: Indications of Network Status (AT+QCFG="ledmode",1) Pin Status Description Low Level (Light on) Registered on network successfully High-impedance (Light off) No network coverage or not registered W_DISABLE# is at low level (airplane mode) AT+CFUN=0 or AT+CFUN=4 3.7.5. WAKE#
WAKE# is an open collector signal which is similar to RI, but a host pull-up resistor and AT+QCFG="risignaltype","physical" command are required. When a URC returns, a 120 ms low level pulse will be outputted. The state of WAKE# is shown as below. Figure 12: WAKE# Behaviors BG95-M3_Mini_PCIe_Hardware_Design 29 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 4 GNSS Receiver 4.1. General Description BG95-M3 Mini PCIe includes a fully integrated global navigation satellite system solution that supports Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). The module supports standard NMEA 0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, the GNSS engine is switched off. It has to be switched on via AT command. See document [3]
for more details about GNSS engine technology and configurations. 4.2. GNSS Performance The following table shows the GNSS performance of BG95 Mini PCIe. Table 15: GNSS Performance Parameter Description Conditions Sensitivity
(GNSS) TTFF
(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous Cold start
@open sky Warm start
@open sky Autonomous XTRA enabled Autonomous XTRA enabled Hot start Autonomous Typ.
-146
-157
-157 TBD TBD TBD TBD TBD Unit dBm dBm dBm s s s s s BG95-M3_Mini_PCIe_Hardware_Design 30 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design
@open sky CEP-50 XTRA enabled Autonomous
@open sky TBD
< 3 s m 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. Accuracy
(GNSS) NOTES BG95-M3_Mini_PCIe_Hardware_Design 31 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 5 Antenna Connection BG95-M3 Mini PCIe is mounted with two antenna connectors for external antenna connection: a main antenna connector and a GNSS antenna connector. The impedance of the antenna connectors is 50 . Figure 13: Main and GNSS Antenna Connectors 5.1. Main Antenna Connector 5.1.1. Description of Main Antenna Connector The details of main antenna connector are shown below. Table 16: Description of Main Antenna Connector Connector Description Comment MAIN Main antenna connector 50 impedance I/O IO BG95-M3_Mini_PCIe_Hardware_Design 32 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 5.1.2. Operating Frequency Table 17: Operating Frequency 3GPP Band Transmit Receive LTE-FDD B1 19201980 21102170 LTE-FDD B2, PCS1900 18501910 19301990 LTE-FDD B3, DCS1800 17101785 18051880 LTE-FDD B4 17101755 21102155 LTE-FDD B5, GSM850 824849 LTE-FDD B8, EGSM900 880915 869894 925960 729746 746756 860875 875890 791821 859894 852869 758803 617652 728746 LTE-FDD B25 18501915 19301995 699716 777787 815830 830845 832862 814849 807824 703748 663698 698716 LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B26 1) LTE-FDD B27 1) LTE-FDD B28 LTE-FDD B71 2) LTE-FDD B85 NOTES 1. 1) LTE-FDD B26 and B27 are supported by Cat M1 only. 2. 2) LTE-FDD B71 is supported by Cat NB2 only. LTE-FDD B66 17101780 21102180 Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz BG95-M3_Mini_PCIe_Hardware_Design 33 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 5.2. GNSS Antenna Connector 5.2.1. Description of GNSS Antenna Connector The following tables show details of GNSS antenna connector. By default, the GNSS antenna connector supports active antennas with 3.3 V power supply design. It also supports passive antennas. Table 18: Description of GNSS Antenna Connector Connector I/O Description Comment GNSS AI GNSS antenna connector 50 impedance 5.2.2. GNSS Frequency Table 19: GNSS Frequency GLONASS 1597.51605.8 Frequency 1575.42 1.023 1575.42 2.046 1561.098 2.046 1575.42 1.023 Unit MHz MHz MHz MHz MHz Type GPS Galileo BeiDou QZSS BG95-M3_Mini_PCIe_Hardware_Design 34 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 5.3. Antenna Requirements The following table shows the requirements on main and GNSS antennas. Table 20: Antenna Requirements Type Requirements Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Active antenna gain: > 0 dBi Active antenna embedded LNA gain: < 17 dB Active antenna power supply: 3.3 V GNSS LTE/GSM VSWR: 2 Efficiency: > 30%
Max Input Power: 50 W Input Impedance: 50 Cable Insertion Loss: < 1 dB
(LTE B5/B8/B12/B13/B18/B19/B20/B26/B27/B28/B71/B85, GSM850/EGSM900) Cable Insertion Loss: < 1.5 dB
(LTE B1/B2/B3/B4/B25/B66, DCS1800/PCS1900) 5.4. Recommended Mating Plugs for Antenna Connection BG95-M3 Mini PCIe is mounted with antenna connectors (receptacles) for convenient antenna connection. The dimensions of receptacles are shown as below. BG95-M3_Mini_PCIe_Hardware_Design 35 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Figure 14: Dimensions of Receptacles (Unit: mm) U.FL-LP mating plugs listed in the following figure can be used to match the receptacles. Figure 15: Mechanicals of U.FL-LP Mating Plugs The following figure describes the space factor of mated connectors. BG95-M3_Mini_PCIe_Hardware_Design 36 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Figure 16: Space Factor of Mated Connectors (Unit: mm) For more details of the recommended mating plugs, please visit http://www.hirose.com. BG95-M3_Mini_PCIe_Hardware_Design 37 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. General Description This chapter mainly describes the following electrical and radio characteristics of BG95-M3 Mini PCIe:
Power supply requirements Digital I/O characteristics RF characteristics ESD characteristics Current consumption 6.2. Power Supply Requirements The input voltage of BG95-M3 Mini PCIe is 3.3 V 9% (3.03.6 V), as specified by PCI Express Mini CEM Specifications 1.2. The following table shows the power supply requirements of the module. Table 21: Power Supply Requirements Parameter Description Min. Typ. Max. VCC_3V3 Power Supply 3.0 3.3 3.6 Unit V 6.3. Digital I/O Characteristics The following table shows the digital I/O characteristics of the module. BG95-M3_Mini_PCIe_Hardware_Design 38 / 53 VIH VIL VOH VOL VIH VIL VOH VOL NOTES LPWA Module Series BG95-M3 Mini PCIe Hardware Design Table 22: 3.3 V Digital I/O Characteristics Parameter Description Min. Max. Unit Input High Voltage 0.7 VCC_3V3 VCC_3V3 + 0.3 Input Low Voltage
-0.3 0.3 VCC_3V3 Output High Voltage VCC_3V3 - 0.5 VCC_3V3 Output Low Voltage 0 0.4 Table 23: 1.8 V Digital I/O Characteristics Parameter Description Unit Min. 1.2
-0.3 Input High Voltage Input Low Voltage Output High Voltage 1.35 Output Low Voltage 0 Max. 2.0 0.6 1.8 0.45 V V V V V V V V 1. The PCM and I2C interfaces belong to 1.8 V power domain and other I/O interfaces belong to VCC_3V3 power domain. 2. The maximum voltage value of VIL for PERST# and W_DISABLE# is 0.5 V. 6.4. RF Characteristics The following tables show the conducted RF output power and receiving sensitivity of the module. Table 24: Conducted RF Output Power Frequency Max. Min. LTE-FDD B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/
B25/B26 1)/B27 1)/B28/B66/B71 2)/B85 21 dBm + 1.7/-3 dB
< -39 dBm GSM850/EGSM900 33 dBm 2 dB 5 dBm 5 dB BG95-M3_Mini_PCIe_Hardware_Design 39 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design DCS1800/PCS1900 30 dBm 2 dB 0 dBm 5 dB GSM850/EGSM900 (8-PSK) 27 dBm 3 dB 5 dBm 5 dB DCS1800/PCS1900 (8-PSK) 26 dBm 3 dB 0 dBm 5 dB 1) LTE-FDD B26 and B27 are supported by Cat M1 only. 2) LTE-FDD B71 is supported by Cat NB2 only. Table19: Conducted RF Receiving Sensitivity Band Primary Diversity Sensitivity (dBm) Cat M1/3GPP Cat NB2 1)/3GPP
-106/-102.3
-115/-107.5
-104.9/-100.3
-115/-107.5
-102.9/-99.3
-115/-107.5
-104.4/-102.3
-114/-107.5
-104.4/-100.8
-116/-107.5
-104.1/-99.8
-113/-107.5
-104.4/-99.3
-116/-107.5
-104.4/-99.3
-115.5/-107.5
-104.4/-102.3
-116/-107.5
-104.4/-102.3
-115.5/-107.5
-104.1/-99.8
-115.5/-107.5
-104.5/-100.3
-115.5/-107.5
-104.5/-100.3 Not Supported
-104.5/-100.8 Not Supported
-104 /-100.8
-116/-107.5
-103.9/-101.8
-115.5/-107.5 Supported Not Supported NOTES 1. 2. LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B27 LTE-FDD B28 LTE-FDD B66 BG95-M3_Mini_PCIe_Hardware_Design 40 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design LTE-FDD B71 LTE-FDD B85 Not Supported
-115/-107.5
-104.3/-99.3
-116/-107.5 Band Primary Diversity GSM850/EGSM900 DCS1800/PCS1900 Supported Not Supported Sensitivity (dBm) GSM/3GPP
-107/-102
-107/-102 NOTE 1) LTE Cat NB2 receiving sensitivity without repetitions. 6.5. ESD Characteristics The following table shows the ESD characteristics of the module. Table 20: ESD Characteristics Tested Interfaces Contact Discharge Air Discharge Unit GND VCC_3V3 TBD TBD Main antenna connector TBD GNSS antenna connector TBD TBD TBD TBD TBD kV kV kV kV 6.6. Current Consumption The following tables describe the current consumption of the module. BG95-M3_Mini_PCIe_Hardware_Design 41 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Table 21: Current Consumption of BG95-M3 Mini PCIe Description Conditions Average Max. Unit Idle Mode
(USB connected) LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 eDRX = 40.96 s
@ PTW = 10.24 s, DRX = 2.56 s LTE Cat NB1 eDRX = 40.96 s
@ PTW = 10.24 s, DRX = 2.56 s LTE Cat M1 data transfer
(GNSS OFF) Band 18 @ 22.29 dBm Band 19 @ 21.39 dBm Band 1 @ 21.35 dBm Band 2 @ 21.53 dBm Band 3 @ 21.18 dBm Band 4 @ 21.48 dBm Band 5 @ 21.38 dBm Band 8 @ 22.46 dBm Band 12 @ 21.45 dBm Band 13 @ 21.46 dBm Band 20 @ 22.27 dBm Band 25 @ 21.46 dBm Band 26 @ 22.16 dBm Band 27 @ 21.8 dBm Band 28A @ 21.3 dBm Band 28B @ 21.2 dBm Band 66 @ 22.82 dBm Band 85 @ 21.27 dBm 28 28 27 27 250 240 242 260 260 259 235 254 254 244 259 256 256 250 253 244 249 237
538 514 514 618 578 597 495 557 567 526 571 574 551 545 558 515 557 507 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG95-M3_Mini_PCIe_Hardware_Design 42 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design LTE Cat NB1 data transfer
(GNSS OFF) Band 13 @ 21.21 dBm Band 18 @ 21.38 dBm Band 1 @ 21.14 dBm Band 2 @ 21.11 dBm Band 3 @ 21.65 dBm Band 4 @ 21.51 dBm Band 5 @ 21.33 dBm Band 8 @ 21.13dBm Band 12 @ 21.09 dBm Band 19 @ 20.78 dBm Band 20 @ 21.13 dBm Band 25 @ 21.57 dBm Band 28 @ 21.06dBm Band 66 @ 21.62 dBm Band 71 @ 20.78 dBm Band 85 @ 20.07 dBm GPRS GSM850 4UL/1DL @ 29.58 dBm GPRS GSM900 4UL/1DL @ 29.65 dBm GPRS DCS1800 4UL/1DL @ 26.16 dBm GPRS PCS1900 4UL/1DL @ 25.88 dBm EDGE GSM850 4UL/1DL @ 22.58 dBm EDGE GSM900 4UL/1DL @ 22.66 dBm EDGE DCS1800 4UL/1DL @ 21.7 dBm EDGE PCS1900 4UL/1DL @ 22.23 dBm GPRS data transfer (GNSS OFF) EDGE data transfer (GNSS OFF) 204 371 206 203 400 393 203 412 215 390 395 206 378 370 148 357 862 857 565 587 523 521 470 486 484 496 493 481 533 519 483 550 516 523 528 509 496 498 441 463
mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG95-M3_Mini_PCIe_Hardware_Design 43 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Table 22: GNSS Current Consumption Parameter Description Conditions Typ. Unit Searching
(AT+CFUN=0) Cold start @ Passive Antenna Lost state @ Passive Antenna Tracking
(AT+CFUN=0) Instrument environment Open Sky @ Passive Antenna Open Sky @ Active Antenna TBD TBD TBD TBD TBD mA mA mA mA mA IVBAT
(GNSS) BG95-M3_Mini_PCIe_Hardware_Design 44 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 7 Dimensions and Packaging 7.1. General Description This chapter mainly describes mechanical dimensions as well as packaging specification of BG95-M3 Mini PCIe module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are 0.05 mm unless otherwise specified. 7.2. Mechanical Dimensions of BG95-M3 Mini PCIe 30.000.15 24.200.2 8.35 6.39 6.39 2.900.15 2.900.15 2.60.1 2.0550.15 1.000.1 5 1
. 0 5 8
. 1 1 2
. 0 0 6
. 3 2 2.250.2 1.400.1 5 1
. 0 5 7
. 7 4 5 1
. 0 5 9
. 0 5 19.900.2 5.050.15 10.150.1 2.40 4.000.1 0.25 Max. 7.380.1 0.25 Max. 0.4 Max. R0.50 0.25Max Top View Side View Figure 17: Mechanical Dimensions of BG95-M3 Mini PCIe BG95-M3_Mini_PCIe_Hardware_Design 45 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 7.3. Standard Dimensions of Mini PCI Express The following figure shows the standard dimensions of Mini PCI Express. See document [1] for Detail A and Detail B. Figure 18: Standard Dimensions of Mini PCI Express BG95-M3 Mini PCIe adopts a standard Mini PCI Express connector which compiles with the directives and standards listed in document [1]. The following figure takes the Molex 679105700 as an example. BG95-M3_Mini_PCIe_Hardware_Design 46 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design Figure 19: Dimensions of the Mini PCI Express Connector (Molex 679105700) 7.4. Packaging Specification BG95-M3 Mini PCIe modules are packaged in a tray. Each tray contains 10 modules. The smallest package contains 100 modules. BG95-M3_Mini_PCIe_Hardware_Design 47 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 8 Appendix A References Table 23: Related Documents SN Document Name Remark PCI Express Mini Card Electromechanical Specification Revision 1.2 PCI Express Mini Card Electromechanical Specification Quectel_BG95&BG77&BG600L_Series_AT_ Commands_Manual AT commands manual of BG95 series, BG77 and BG600L-M3 modules Quectel_BG95&BG77&BG600L_Series_GNSS_ Application_Note GNSS application note of BG95 series, BG77 and BG600L-M3 modules Table 24: Terms and Abbreviations Abbreviation Description DFOTA Delta Firmware upgrade Over-The-Air Bits Per Second Coding Scheme Clear to Send Downlink Data Terminal Equipment Data Terminal Ready Electromagnetic Interference Electrostatic Discharge Equivalent Series Resistance Frequency Division Duplexing GLONASS GLObalnaya Navigatsionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System BG95-M3_Mini_PCIe_Hardware_Design 48 / 53
[1]
[2]
[3]
bps CS CTS DL DTE DTR EMI ESD ESR FDD LPWA Module Series BG95-M3 Mini PCIe Hardware Design NMEA National Marine Electronics Association GMSK GNSS GPS GSM kbps LED LTE Mbps MCU ME PCM PDA PDU POS PPP RF RTS RX SMS TX TVS UART UL URC Gaussian Minimum Shift Keying Global Navigation Satellite System Global Positioning System Global System for Mobile Communications kilobits per second Light Emitting Diode Long Term Evolution Million Bits Per Second Micro Control Unit Mobile Equipment Pulse Code Modulation Personal Digital Assistant Protocol Data Unit Point of Sale Point-to-Point Protocol Radio Frequency Ready To Send Receive Direction Short Message Service Transmitting Direction Transient Voltage Suppressor Uplink Unsolicited Result Code Universal Asynchronous Receiver & Transmitter BG95-M3_Mini_PCIe_Hardware_Design 49 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design USB
(U)SIM Universal Serial Bus
(Universal) Subscriber Identification Module BG95-M3_Mini_PCIe_Hardware_Design 50 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 9 Appendix B GPRS Coding Schemes Table 25: Description of Different Coding Schemes CS-1 CS-2 CS-3 CS-4 2/3 3/4 1/2 3 3 40 4 456 0 3 6 16 4 588 132 1 3 12 428 16
456 21.4 3 6 312 16 4 676 220 15.6 Radio Block excl. USF and BCS 181 268 Data Rate (kbps) 9.05 13.4 Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits BG95-M3_Mini_PCIe_Hardware_Design 51 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 10 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 26: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 1 1 2 1 2 2 3 1 2 2 3 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA BG95-M3_Mini_PCIe_Hardware_Design 52 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 BG95-M3_Mini_PCIe_Hardware_Design 53 / 53 LPWA Module Series BG95-M3 Mini PCIe Hardware Design 11 Appendix D EDGE Modulation and Coding Schemes Table 27: EDGE Modulation and Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslots 4 Timeslots GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK C B A C B A B A A 8.80 kbps 17.60 kbps 35.20 kbps 11.2 kbps 22.4 kbps 44.8 kbps 14.8 kbps 29.6 kbps 59.2 kbps 17.6 kbps 35.2 kbps 70.4 kbps 22.4 kbps 44.8 kbps 89.6 kbps 29.6 kbps 59.2 kbps 118.4 kbps 44.8 kbps 89.6 kbps 179.2 kbps 54.4 kbps 108.8 kbps 217.6 kbps 59.2 kbps 118.4 kbps 236.8 kbps Coding Schemes MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 BG95-M3_Mini_PCIe_Hardware_Design 54 / 53