FCC ID: XMR202004BG600LM3 LTE Cat M1 & Cat NB2 & EGPRS Module

BG600L-M3 Hardware Design LPWA Module Series Rev. BG600L-M3_Hardware_Design_V1.0 Date: 2020-03-30 Status: Released www.quectel.com LPWA Module Series BG600L-M3 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit:

http://www.quectel.com/support/sales.htm For technical support, or to report documentation errors, please visit:

http://www.quectel.com/support/technical.htm Or email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT WITHOUT PERMISSION ARE FORBIDDEN. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2020. All rights reserved. BG600L-M3_Hardware_Design 1 / 83 LPWA Module Series BG600L-M3 Hardware Design About the Document Revision History Version Date Author Description 1.0 2020-03-30 Initial Speed SUN/

Watt ZHU BG600L-M3_Hardware_Design 2 / 83 LPWA Module Series BG600L-M3 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index ................................................................................................................................................... 5 Figure Index ................................................................................................................................................. 7 1 Introduction .......................................................................................................................................... 8 1.1. Safety Information ....................................................................................................................... 9 2 Product Concept ................................................................................................................................ 14 2.1. General Description .................................................................................................................. 14 2.2. Key Features ............................................................................................................................. 15 2.3. Functional Diagram ................................................................................................................... 17 2.4. Evaluation Board ....................................................................................................................... 18 3 Application Interfaces ....................................................................................................................... 19 3.1. Pin Assignment ......................................................................................................................... 20 3.2. Pin Description .......................................................................................................................... 21 3.3. Operating Modes ....................................................................................................................... 28 3.4. Power Saving ............................................................................................................................ 29 3.4.1. Airplane Mode ................................................................................................................ 29 3.4.2. Power Saving Mode (PSM) ............................................................................................ 29 3.4.3. Extended Idle Mode DRX (e-I-DRX) .............................................................................. 30 3.4.4. Sleep Mode .................................................................................................................... 30 3.4.4.1. UART Application ................................................................................................. 30 3.5. Power Supply ............................................................................................................................ 31 3.5.1. Power Supply Pins ......................................................................................................... 31 3.5.2. Decrease Voltage Drop .................................................................................................. 32 3.5.3. Monitor the Power Supply .............................................................................................. 33 3.6. Turn on and off Scenarios ......................................................................................................... 33 3.6.1. Turn on Module with PWRKEY ...................................................................................... 33 3.6.2. Turn off Module .............................................................................................................. 35 3.6.2.1. Turn off Module with PWRKEY ............................................................................ 36 3.6.2.2. Turn off Module with AT Command ..................................................................... 36 3.7. Reset the Module ...................................................................................................................... 36 3.8. PON_TRIG Interface ................................................................................................................. 38 3.9.

(U)SIM Interface ........................................................................................................................ 39 3.10. USB Interface ............................................................................................................................ 41 3.11. UART Interfaces ........................................................................................................................ 43 3.12. PCM and I2C Interfaces* .......................................................................................................... 46 3.13. Network Status Indication ......................................................................................................... 47 3.14. STATUS .................................................................................................................................... 48 3.15. Behaviors of MAIN_RI .............................................................................................................. 48 3.16. USB_BOOT Interface ............................................................................................................... 49 BG600L-M3_Hardware_Design 3 / 83 LPWA Module Series BG600L-M3 Hardware Design 3.17. ADC Interface ............................................................................................................................ 50 3.18. GPIO Interfaces* ....................................................................................................................... 51 3.19. GRFC Interfaces* ...................................................................................................................... 52 4 GNSS Receiver ................................................................................................................................... 54 4.1. General Description .................................................................................................................. 54 4.2. GNSS Performance .................................................................................................................. 54 4.3. Layout Guidelines ..................................................................................................................... 55 5 Antenna Interfaces ............................................................................................................................. 56 5.1. Main Antenna Interface ............................................................................................................. 56 5.1.1. Pin Definition .................................................................................................................. 56 5.1.2. Operating Frequency ..................................................................................................... 56 5.1.3. Reference Design of Main Antenna Interface ................................................................ 57 5.1.4. Reference Design of RF Layout..................................................................................... 58 5.2. GNSS Antenna Interface .......................................................................................................... 60 5.3. Antenna Installation .................................................................................................................. 61 5.3.1. Antenna Requirements .................................................................................................. 61 5.3.2. Recommended RF Connector for Antenna Installation ................................................. 62 6 Electrical, Reliability and Radio Characteristics ............................................................................ 64 6.1. Absolute Maximum Ratings ...................................................................................................... 64 6.2. Power Supply Ratings ............................................................................................................... 64 6.3. Operation and Storage Temperatures ...................................................................................... 65 6.4. Current Consumption ................................................................................................................ 65 6.5. RF Output Power ...................................................................................................................... 69 6.6. RF Receiving Sensitivity ........................................................................................................... 70 6.7. Electrostatic Discharge ............................................................................................................. 71 7 Mechanical Dimensions .................................................................................................................... 72 7.1. Mechanical Dimensions ............................................................................................................ 72 7.2. Recommended Footprint .......................................................................................................... 74 7.3. Top and Bottom Views .............................................................................................................. 75 8 Storage, Manufacturing and Packaging .......................................................................................... 76 8.1. Storage ...................................................................................................................................... 76 8.2. Manufacturing and Soldering .................................................................................................... 77 8.3. Packaging ................................................................................................................................. 78 9 Appendix A References ..................................................................................................................... 81 10 Appendix B GPRS Coding Schemes ............................................................................................... 84 11 Appendix C GPRS Multi-slot Classes .............................................................................................. 85 12 Appendix D EDGE Modulation and Coding Schemes ................................................................... 87 BG600L-M3_Hardware_Design 4 / 83 LPWA Module Series BG600L-M3 Hardware Design Table Index Table 1: Frequency Bands and GNSS Types of BG600L-M3 Module ...................................................... 14 Table 2: Key Features of BG600L-M3 Module .......................................................................................... 15 Table 3: Definition of I/O Parameters ......................................................................................................... 21 Table 4: Pin Description ............................................................................................................................. 22 Table 5: Overview of Operating Modes ..................................................................................................... 28 Table 6: VBAT and GND Pins .................................................................................................................... 31 Table 7: Pin Definition of PWRKEY ........................................................................................................... 33 Table 8: Pin Definition of RESET_N .......................................................................................................... 37 Table 9: Pin Definition of PON_TRIG Interface ......................................................................................... 38 Table 10: Pin Definition of (U)SIM Interface .............................................................................................. 39 Table 11: Pin Definition of USB Interface .................................................................................................. 41 Table 12: Pin Definition of Main UART Interface ....................................................................................... 43 Table 13: Pin Definition of Debug UART Interface .................................................................................... 44 Table 14: Pin Definition of GNSS UART Interface..................................................................................... 44 Table 15: Logic Levels of Digital I/O .......................................................................................................... 44 Table 16: Pin Definition of PCM and I2C Interfaces .................................................................................. 46 Table 17: Pin Definition of NET_STATUS ................................................................................................. 47 Table 18: Working State of NET_STATUS ................................................................................................ 47 Table 19: Pin Definition of STATUS ........................................................................................................... 48 Table 20: Default Behaviors of MAIN_RI ................................................................................................... 48 Table 21: Pin Definition of USB_BOOT Interface ...................................................................................... 49 Table 22: Pin Definition of ADC Interface .................................................................................................. 51 Table 23: Characteristics of ADC Interface ............................................................................................... 51 Table 24: Pin Definition of GPIO Interfaces ............................................................................................... 51 Table 25: Logic Levels of GPIO Interfaces ................................................................................................ 52 Table 26: Pin Definition of GRFC Interfaces .............................................................................................. 52 Table 27: Logic Levels of GRFC Interfaces ............................................................................................... 53 Table 28: Truth Table of GRFC Interfaces................................................................................................. 53 Table 29: GNSS Performance ................................................................................................................... 54 Table 30: Pin Definition of Main Antenna Interface ................................................................................... 56 Table 31: BG600L-M3 Operating Frequency ............................................................................................. 56 Table 32: Pin Definition of GNSS Antenna Interface ................................................................................. 60 Table 33: GNSS Frequency ....................................................................................................................... 60 Table 34: Antenna Requirements .............................................................................................................. 61 Table 35: Absolute Maximum Ratings ....................................................................................................... 64 Table 36: Power Supply Ratings ................................................................................................................ 64 Table 37: Operation and Storage Temperatures ....................................................................................... 65 Table 38: BG600L-M3 Current Consumption ............................................................................................ 65 Table 39: GNSS Current Consumption...................................................................................................... 69 Table 40: BG600L-M3 RF Output Power ................................................................................................... 69 Table 41: BG600L-M3 Conducted RF Receiving Sensitivity (25 C, 3.8 V) .............................................. 70 BG600L-M3_Hardware_Design 5 / 83 LPWA Module Series BG600L-M3 Hardware Design Table 42: Electrostatic Discharge Characteristics (25 C, 45% Relative Humidity) .................................. 71 Table 43: Recommended Thermal Profile Parameters ............................................................................. 78 Table 44: Module Packaging Specifications .............................................................................................. 80 Table 45: Related Documents .................................................................................................................... 81 Table 46: Terms and Abbreviations ........................................................................................................... 81 Table 47: Description of Different Coding Schemes .................................................................................. 84 Table 48: GPRS Multi-slot Classes ............................................................................................................ 85 Table 49: EDGE Modulation and Coding Schemes................................................................................... 87 BG600L-M3_Hardware_Design 6 / 83 LPWA Module Series BG600L-M3 Hardware Design Figure Index Figure 1: Functional Diagram ..................................................................................................................... 18 Figure 2: Pin Assignment (Top View) ........................................................................................................ 20 Figure 3: Sleep Mode Application via UART ............................................................................................. 31 Figure 4: Power Supply Limits during Burst Transmission ........................................................................ 32 Figure 5: Star Structure of the Power Supply ............................................................................................ 33 Figure 6: Turn on the Module Using Driving Circuit ................................................................................... 34 Figure 7: Turn on the Module Using Keystroke ......................................................................................... 34 Figure 8: Power-on Timing ......................................................................................................................... 35 Figure 9: Power-off Timing ......................................................................................................................... 36 Figure 10: Reset Timing ............................................................................................................................. 37 Figure 11: Reference Circuit of RESET_N by Using Driving Circuit ......................................................... 37 Figure 12: Reference Circuit of RESET_N by Using Button...................................................................... 38 Figure 13: Reference Design of PON_TRIG ............................................................................................. 39 Figure 14: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector ......................... 40 Figure 15: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector ........................... 40 Figure 16: Reference Design of USB PHY ................................................................................................ 42 Figure 17: Reference Circuit of USB Interface .......................................................................................... 42 Figure 18: Main UART Reference Design (Translator Chip) ..................................................................... 45 Figure 19: Main UART Reference Design (Transistor Circuit) .................................................................. 45 Figure 20: Reference Circuit of PCM Application with Audio Codec ......................................................... 46 Figure 21: Reference Circuit of the Network Status Indicator ................................................................... 47 Figure 22: Reference Design of STATUS .................................................................................................. 48 Figure 23: Reference Design of USB_BOOT Interface ............................................................................. 49 Figure 24: Timing of Turning on Module with USB_BOOT ........................................................................ 50 Figure 25: Reference Design of Main Antenna Interface .......................................................................... 58 Figure 26: Microstrip Design on a 2-layer PCB ......................................................................................... 58 Figure 27: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 59 Figure 28: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 59 Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 59 Figure 30: Reference Design of GNSS Antenna Interface ........................................................................ 61 Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) ............................................................ 62 Figure 32: Mechanicals of U.FL-LP Connectors ........................................................................................ 63 Figure 33: Space Factor of Mated Connector (Unit: mm) .......................................................................... 63 Figure 34: Module Top and Side Dimensions ............................................................................................ 72 Figure 35: Module Bottom Dimensions (Bottom View) .............................................................................. 73 Figure 36: Recommended Footprint (Top View) ........................................................................................ 74 Figure 37: Top View of the Module ............................................................................................................ 75 Figure 38: Bottom View of the Module ....................................................................................................... 75 Figure 39: Recommended Reflow Soldering Thermal Profile ................................................................... 77 Figure 40: Tape Dimensions ...................................................................................................................... 79 Figure 41: Reel Dimensions ....................................................................................................................... 79 BG600L-M3_Hardware_Design 7 / 83 LPWA Module Series BG600L-M3 Hardware Design 1 Introduction This document defines BG600L-M3 module and describes its air interface and hardware interfaces which are connected with customers applications. This document helps customers quickly understand the interface specifications, electrical and mechanical details, as well as other related information of BG600L-M3. To facilitate application designs, it also includes some reference designs for customers reference. The document, coupled with application notes and user guides, makes it easy to design and set up mobile applications with BG600L-M3. BG600L-M3_Hardware_Design 8 / 83 LPWA Module Series BG600L-M3 Hardware Design 1.1 Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating BG600L-M3 module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as mobile phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. BG600L-M3_Hardware_Design 9 / 83 LPWA Module Series BG600L-M3 Hardware Design 1.2 CE Certificate Requirement CE Statement The minimum distance between the user and/or any bystander and the radiating structure of the transmitter is 20cm. Hereby, We, Quectel Wireless Solutions Co., Ltd. declares that the radio equipment type BG600L-M3 is in compliance with the Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address:

Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China https://www.quectel.com/support/downloadb/TechnicalDocuments.htm The device operates with the following frequency bands and transmitting power:

GSM850/GSM1900: 33dBm[-2~+2dB]

CATM: B1/3/5/8/20/28: 21dBm [+1.7/-3 dB]

NB IoT: B1/3/5/8/20/28:: 21dBm [+1.7/-3 dB]

The device antenna Gain is: 4dBi. 1.3 FCC Certificate Requirement According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met:

1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time- averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3.A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR202004BG600LM3. 4.To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

GSM850 :8.571dBi GSM1900 :10.03dBi Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:8.000dBi Catm LTE Band5/26:12.541dBi Catm LTE Band12:11.798dBi Catm LTE Band13:12.214dBi Catm LTE Band85:11.798dBi NB LTE Band2/25:11.000dBi BG600L-M3_Hardware_Design 10 / 83 LPWA Module Series BG600L-M3 Hardware Design NB LTE Band4/66:8.000dBi NB LTE Band5:12.541 dBi NB LTE Band12:11.798dBi NB LTE Band13:12.214dBi NB LTE Band71:11.687dBi NB LTE Band85:11.798 dBi 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:

A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification (labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible; then an additional permanent label referring to the enclosed module:Contains Transmitter Module FCC ID: XMR202004BG600LM3 or Contains FCC ID:

XMR202004BG600LM3 must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. BG600L-M3_Hardware_Design 11 / 83 LPWA Module Series BG600L-M3 Hardware Design 1.4 IC Statement IRSS-GEN

"This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device." or "Le prsent appareil est conforme aux CNR dIndustrie Canada applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes :

1) lappareil ne doit pas produire de brouillage; 2) lutilisateur de lappareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible den compromettre le fonctionnement."

Dclaration sur l'exposition aux rayonnements RF The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. L'autre utilis pour l'metteur doit tre install pour fournir une distance de sparation d'au moins 20 cm de toutes les personnes et ne doit pas tre colocalis ou fonctionner conjointement avec une autre antenne ou un autre metteur. To comply with IC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

GSM850 :8.571dBi GSM1900 :10.03dBi Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:8.000dBi Catm LTE Band5/26:12.541dBi Catm LTE Band12:11.798dBi Catm LTE Band13:12.214dBi Catm LTE Band85:11.798dBi NB LTE Band2/25:11.000dBi NB LTE Band4/66:8.000dBi NB LTE Band5:12.541 dBi NB LTE Band12:11.798dBi NB LTE Band13:12.214dBi NB LTE Band71:11.687dBi NB LTE Band85:11.798 dBi The host product shall be properly labelled to identify the modules within the host product. The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host product; otherwise, the host product must be labeled to display the Innovation, Science and Economic Development Canada certification number for the module, preceded by the word Contains or similar wording expressing the same meaning, as follows:

Contains IC: 10224A-20BG600LM3 or where: 10224A-20BG600LM3 is the modules certification number. Le produit hte doit tre correctement tiquet pour identifier les modules dans le produit hte. BG600L-M3_Hardware_Design 12 / 83 LPWA Module Series BG600L-M3 Hardware Design L'tiquette de certification d'Innovation, Sciences et Dveloppement conomique Canada d'un module doit tre clairement visible en tout temps lorsqu'il est installdans le produit hte; sinon, le produit hte doit porter une tiquette indiquant le numro de certification d'Innovation, Sciences et Dveloppement conomique Canada pour le module, prcd du mot Contient ou d'un libell semblable exprimant la mme signification, comme suit:"Contient IC: 10224A-20BG600LM3 " ou "o:

10224A-20BG600LM3 est le numro de certification du module. BG600L-M3_Hardware_Design 13 / 83 LPWA Module Series BG600L-M3 Hardware Design 2 Product Concept 2.1 General Description BG600L-M3 is an embedded IoT (LTE Cat M1, LTE Cat NB2 and EGPRS) wireless communication module. It provides data connectivity on LTE-FDD and GPRS/EGPRS networks, and supports half-duplex operation in LTE network. It also provides GNSS and voice* 1) functionality to meet customers specific application demands. Table 1: Frequency Bands and GNSS Types of BG600L-M3 Module Module Supported Bands Power Class GNSS (Optional) Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/B14/

B18/B19/B20/B25/B26/B27/B28/

B66/B85 Cat NB2 2):

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/B18/

B19/B20/B25/B26/B28/B66/B71/B85 EGPRS:

850/900/1800/1900 MHz BG600L-M3 NOTES 1. Power Class 5

(21 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS 1) BG600L-M3 module supports VoLTE (Voice over LTE) under LTE Cat M1 and CS voice under GSM. 2) LTE Cat NB2 is backward compatible with LTE Cat NB1. 2. 3. GNSS function is optional. 4.

* means under development. With a compact profile of 18.7 mm 16.0 mm 2.1 mm, BG600L-M3 can meet almost all requirements for M2M applications such as security, smart metering, tracking system and wireless POS. BG600L-M3 is an SMD type module which can be embedded into applications through its 68 LGA pads. It supports internet service protocols like TCP, UDP and PPP. Extended AT commands have been developed for customers to use these internet service protocols easily. BG600L-M3_Hardware_Design 14 / 83 LPWA Module Series BG600L-M3 Hardware Design 1.5 Key Features The following table describes the detailed features of BG600L-M3 module. Table 2: Key Features of BG600L-M3 Module Features Details Power Supply Supply voltage: 3.34.3 V Typical supply voltage: 3.8 V Transmitting Power LTE Features GSM Features Internet Protocol Features*

Class 5 (21 dBm + 1.7/-3 dB) for LTE-FDD bands Class 4 (33 dBm 2 dB) for GSM850 Class 4 (33 dBm 2 dB) for EGSM900 Class 1 (30 dBm 2 dB) for DCS1800 Class 1 (30 dBm 2 dB) for PCS1900 Class E2 (27 dBm 3 dB) for GSM850 8-PSK Class E2 (27 dBm 3 dB) for EGSM900 8-PSK Class E2 (26 dBm 3 dB) for DCS1800 8-PSK Class E2 (26 dBm 3 dB) for PCS1900 8-PSK Support 3GPP Rel. 14 Support LTE Cat M1 and LTE Cat NB2 Support 1.4 MHz RF bandwidth for LTE Cat M1 Support 200 KHz RF bandwidth for LTE Cat NB2 Cat M1: Max. 588 kbps (DL)/ 1119 kbps (UL) Cat NB2: Max. 127 kbps (DL)/ 158.5 kbps (UL) GPRS:

Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107 kbps (DL), Max. 85.6 kbps (UL) EDGE:

Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max. 296 kbps (DL), Max. 236.8 kbps (UL) Support PPP/TCP/UDP/SSL/TLS/FTP(S)/HTTP(S)/NITZ/PING/MQTT/

CoAP*/IPv6* protocols Support PAP

(Password Authentication Protocol) and CHAP

(Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections SMS Text and PDU mode BG600L-M3_Hardware_Design 15 / 83 LPWA Module Series BG600L-M3 Hardware Design Point to point MO and MT SMS cell broadcast SMS storage: ME by default

(U)SIM Interface Support 1.8 V USIM/SIM card only PCM Interface*

Support one digital audio interface: PCM interface USB Interface UART Interfaces Compliant with USB 2.0 specification (slave only) Support operations at low-speed and full-speed Used for AT command communication, data transmission, GNSS NMEA output, software debugging and firmware upgrade Support USB serial drivers for Windows 7/8/8.1/10, Linux 2.65.4, Android 4.x9.x Main UART:

Used for data transmission and AT command communication 115200 bps baud rate by default The default frame format is 8N1 (8 data bits, no parity, 1 stop bit) Support hardware flow control Debug UART:

Used for software debugging and log output Support 115200 bps baud rate GNSS UART:

Used for GNSS data and NMEA sentences output 115200 bps baud rate by default GNSS (Optional) AT Commands Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS) 1 Hz data update rate by default 3GPP TS 27.007 and 3GPP TS 27.005 AT commands, as well as Quectel enhanced AT commands Network Indication One NET_STATUS pin for network connectivity status indication Antenna Interfaces Main antenna (ANT_MAIN) and GNSS antenna (ANT_GNSS) interfaces Physical Characteristics Dimensions: (18.7 0.15) mm (16.0 0.15) mm (2.1 0.20) mm Weight: approx. 1.25 0.1 g Temperature Range Operation temperature range: -35 C to +75 C 1) Extended temperature range: -40 C to +85 C 2) Storage temperature range: -40 C to +90 C Firmware Upgrade USB interface and DFOTA*

All hardware components are fully compliant with EU RoHS directive RoHS NOTES BG600L-M3_Hardware_Design 16 / 83 LPWA Module Series BG600L-M3 Hardware Design 1. 1) Within operation temperature range, the module meets 3GPP specifications. 2. 2) Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice, SMS, data transmission, emergency call, etc., without any unrecoverable malfunction. Radio spectrum and radio network will not be influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again. 3. * means under development. 1.6 Functional Diagram The following figure shows a block diagram of BG600L-M3 and illustrates the major functional parts. Power management Baseband Radio frequency Peripheral interfaces BG600L-M3_Hardware_Design 17 / 83 LPWA Module Series BG600L-M3 Hardware Design Figure 1: Functional Diagram NOTES 1. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY should never be pulled down to GND permanently. 2. RESET_N is connected directly to PWRKEY inside the module. 1.7 Evaluation Board In order to facilitate application development with BG600L-M3 conveniently, Quectel supplies the evaluation board (EVB), USB to RS-232 converter cable, USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [1]. BG600L-M3_Hardware_Design 18 / 83 LPWA Module Series BG600L-M3 Hardware Design 2 Application Interfaces

(U)SIM interface BG600L-M3 is equipped with 68 LGA pads that can be connected to customers cellular application platforms. The subsequent chapters will provide detailed description of interfaces listed below:

Power supply PON_TRIG interface USB interface UART interfaces PCM and I2C interfaces*

Status indication interfaces USB_BOOT interface ADC interface GPIO interfaces*

GRFC interfaces*

NOTE

* means under development. BG600L-M3_Hardware_Design 19 / 83 LPWA Module Series BG600L-M3 Hardware Design 2.1 Pin Assignment The following figure shows the pin assignment of BG600L-M3. D E V R E S E R B B _ T A B V F R _ T A B V I 6 O P G I 5 O P G S U T A T S _ T E N D E V R E S E R D N G D N G D N G D N G T X E _ D D V 4 5 3 5 2 5 1 5 0 5 9 4 8 4 7 4 6 4 5 4 4 4 3 4 RESERVED 55 65 RESERVED USBPHY_3P3_EN USB_BOOT 56 64 GRF C2 I2C_SDA 57 63 GRF C1 I2C_SCL 58 62 PCM_DIN D E V R E S E R D E V R E S E R N E _ A N L _ S S N G 68 67 66 59 K L C _ M C P 60 61 T U O D _ M C P C N Y S _ M C P 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 GND GND ANT_MAI N MAI N_RTS MAI N_CTS MAI N_DTR MAI N_DCD MAI N_RI MAI N_RXD MAI N_TXD USB_VBUS GND DBG_RXD DBG_TXD PON_TRIG RESERVED RESERVED RESERVED RESET_N PWRKEY ADC RESERVED GPIO1 GPIO2 GPIO3 GPIO4 STATUS GND ANT_GNSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 6 1 7 1 8 1 9 1 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 D N G 3 P 3 _ Y H P B S U D D V _ M S U I K L C _ M S U I T S R _ M S U I A T A D _ M S U I D X T _ S S N G D X R _ S S N G P D _ B S U M D _ B S U D N G T E D _ M S U I POWER USB UART

(U)SIM PCM ANT GND RESERVED OTHERS Figure 2: Pin Assignment (Top View) BG600L-M3_Hardware_Design 20 / 83 LPWA Module Series BG600L-M3 Hardware Design 1. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY should never be pulled down to GND permanently. 2. RESET_N is connected directly to PWRKEY inside the module. 3. ADC input voltage must not exceed 1.8 V. 4. The input voltage range of USB_VBUS is 1.31.8 V. 5. GPIO1 (pin 9), NET_STATUS (pin 47), GRFC1 (pin 63) and GNSS_LNA_EN (pin 66) are BOOT_CONFIG pins, and please do not pull them up before startup. 6. Keep all RESERVED pins and unused pins unconnected. 7. GND pins should be connected to ground in the design. 2.2 Pin Description The following tables show the pin definition and description of BG600L-M3. Table 3: Definition of I/O Parameters NOTES Type AI AO DI DO IO OD PI PO Description Analog Input Analog Output Digital Input Digital Output Bidirectional Open Drain Power Input Power Output BG600L-M3_Hardware_Design 21 / 83 LPWA Module Series BG600L-M3 Hardware Design Table 4: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT_BB 51 PI VBAT_RF 50 PI Power supply for the modules baseband part Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V Power supply for the modules RF part Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V VDD_EXT 43 PO 1.8 V output power supply for external circuits Vnorm = 1.8 V IOmax = 50 mA If unused, keep this pin open. GND Ground 14, 16, 27, 31, 40, 42, 44, 45, 48, 49, Turn on/off Reset Pin Name Pin No. I/O Description DC Characteristics Comment PWRKEY 5 DI Turn on/off the module Vnorm = 1.5 V VILmax = 0.45 V PWRKEY should never be pulled down to GND permanently. Pin Name Pin No. I/O Description DC Characteristics Comment RESET_N 4 DI Reset the module Vnorm = 1.5 V VILmax = 0.45 V Status Indication Pin Name Pin No. I/O Description DC Characteristics Comment STATUS 13 DO NET_STATUS 47 DO Indicate the modules operation status VOHmin = 1.35 V VOLmax = 0.45 V Indicate the modules network activity status VOHmin = 1.35 V VOLmax = 0.45 V 1.8 V power domain. If unused, keep this pin open. BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. If unused, keep this BG600L-M3_Hardware_Design 22 / 83 LPWA Module Series BG600L-M3 Hardware Design pin open. Compliant with USB 2.0 standard specification. Require differential impedance of 90 . USB Interface Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS 32 AI USB connection detect VIHmax = 1.8 V VIHmin = 1.3 V USB_DP 24 IO USB_DM 25 IO USB differential data (+) USB differential data (-) Power supply for USB PHY circuit External LDO enable control for USB USBPHY_3P3 17 PI Vnorm = 3.3 V USBPHY_3P3_ EN 8 DO VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain.

(U)SIM Interface Pin Name Pin No. I/O Description DC Characteristics Comment USIM_DET *

26 DI

(U)SIM card hot-plug detect 1.8 V power domain. If unused, keep this pin open. USIM_VDD PO

(U)SIM card power supply Vmax = 1.9 V Vmin = 1.7 V Only 1.8 V (U)SIM card is supported. USIM_RST DO

(U)SIM card reset 1.8 V power domain. 18 20 VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V USIM_DATA 21 IO

(U)SIM card data 1.8 V power domain. USIM_CLK 19 DO

(U)SIM card clock 1.8 V power domain. Main UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment MAIN_DTR 37 DI Main UART data terminal ready VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V 1.8 V power domain. If unused, keep this pin open. BG600L-M3_Hardware_Design 23 / 83 LPWA Module Series BG600L-M3 Hardware Design VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V MAIN_RXD 34 DI Main UART receive MAIN_TXD 33 DO Main UART transmit MAIN_CTS 38 DO Main UART clear to send VOLmax = 0.45 V VOHmin = 1.35 V MAIN_RTS 39 DI Main UART request to send MAIN_DCD 36 DO Main UART data carrier detect VOLmax = 0.45 V VOHmin = 1.35 V MAIN_RI 35 DO Main UART ring indication VOLmax = 0.45 V VOHmin = 1.35 V Debug UART Interface DBG_RXD 30 DI Debug UART receive VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V DBG_TXD 29 DO Debug UART transmit VOLmax = 0.45 V VOHmin = 1.35 V GNSS UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment GNSS_TXD 22 DO GNSS UART transmit VOLmax = 0.45 V VOHmin = 1.35 V GNSS_ RXD 23 DI GNSS UART receive VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V BG600L-M3_Hardware_Design 24 / 83 LPWA Module Series BG600L-M3 Hardware Design PCM Interface*

Pin Name Pin No. I/O Description DC Characteristics Comment PCM_CLK 59 DO PCM clock VOLmax = 0.45 V VOHmin = 1.35 V PCM_SYNC 61 DO PCM data frame sync VOLmax = 0.45 V VOHmin = 1.35 V PCM_DIN 62 DI PCM data input PCM_DOUT 60 DO PCM data output I2C Interface*

VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V Pin Name Pin No. I/O Description DC Characteristics Comment I2C_SCL 58 OD I2C serial clock

(for external codec) I2C_SDA 57 OD I2C serial data

(for external codec) Antenna Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment ANT_MAIN 41 IO ANT_GNSS 15 AI Main antenna interface GNSS antenna interface GPIO Interfaces*

Pin Name Pin No. I/O Description DC Characteristics Comment GPIO1 9 IO General-purpose VOLmax = 0.45 V BOOT_CONFIG. BG600L-M3_Hardware_Design 25 / 83 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. External pull-up resistor is required. 1.8 V only. If unused, keep this pin open. External pull-up resistor is required. 1.8 V only. If unused, keep this pin open. 50 impedance 50 impedance. If unused, keep this pin open. LPWA Module Series BG600L-M3 Hardware Design input/output GPIO2 10 IO General-purpose input/output GPIO3 11 IO General-purpose input/output GPIO4 12 IO General-purpose input/output GPIO5 53 IO General-purpose input/output GPIO6 54 IO General-purpose input/output VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V Do not pull it up before startup. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. ADC Interface GRFC Interfaces*

Pin Name Pin No. I/O Description DC Characteristics Comment ADC 6 AI General-purpose ADC interface Voltage range:

0.11.8 V If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment BG600L-M3_Hardware_Design 26 / 83 LPWA Module Series BG600L-M3 Hardware Design GRFC1 63 DO Generic RF controller VOLmax = 0.45 V VOHmin = 1.35 V GRFC2 64 DO Generic RF controller VOLmax = 0.45 V VOHmin = 1.35 V PON_TRIG Interface Pin Name Pin No. I/O Description DC Characteristics Comment PON_TRIG 28 DI Wake up the module from PSM Other Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment USB_BOOT 56 DI Force the module into emergency download mode VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V GNSS_LNA_EN 66 DO External LNA enable control VOLmax = 0.45 V VOHmin = 1.35 V BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. Rising-edge triggered. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment RESERVED Reserved Keep these pins open. RESERVED Pins 13, 7, 46, 52, 55, 65, 67, 68 NOTES 1. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY BG600L-M3_Hardware_Design 27 / 83 LPWA Module Series BG600L-M3 Hardware Design should never be pulled down to GND permanently. 2. RESET_N is connected directly to PWRKEY inside the module. 3. The input voltage range of USB_VBUS is 1.31.8 V. 4. GPIO1 (pin 9), NET_STATUS (pin 47), GRFC1 (pin 63) and GNSS_LNA_EN (pin 66) are BOOT_CONFIG pins, and please do not pull them up before startup. 5. USBPHY_3P3 and USBPHY_3P3_EN pins are used for USB PHY circuits. 6. Keep all RESERVED pins and unused pins unconnected. 7. * means under development. 2.3 Operating Modes The table below briefly summarizes the various operating modes of BG600L-M3. Table 5: Overview of Operating Modes Mode Details Normal Operation Extended Idle Mode DRX

(e-I-DRX) Airplane Mode Minimum Functionality Mode Sleep Mode Connected Network has been connected. In this mode, the power consumption may vary with the network setting and data transfer rate. Idle Software is active. The module remains registered on network, and it is ready to send and receive data. BG600L-M3 module and the network may negotiate over non-access stratum signaling the use of e-I-DRX for reducing power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. AT+CFUN=4 can set the module into airplane mode. In this case, RF function will be invalid. AT+CFUN=0 can set the module into a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. In this mode, the current consumption of the module will be reduced to a lower level. During this mode, the module can still receive paging message, SMS and TCP/UDP data from the network normally. Power OFF Mode In this mode, the power management unit shuts down the power supply. The software is not active. The serial interfaces are not accessible. But the operating voltage

(connected to VBAT_RF and VBAT_BB) remains applied. Power Saving Mode

(PSM) BG600L-M3 module may enter Power Saving Mode to further reduce its power consumption. PSM is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. BG600L-M3_Hardware_Design 28 / 83 LPWA Module Series BG600L-M3 Hardware Design NOTE During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB interface will increase power consumption. 2.4 Power Saving 2.4.1 Airplane Mode When the module enters airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible. The module can be set into Airplane mode through AT+CFUN=<fun>. The command provides choice of the functionality level, through setting <fun> into 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode. RF function is disabled. NOTE The execution of AT+CFUN command will not affect GNSS function. 2.4.2 Power Saving Mode (PSM) BG600L-M3 module can enter PSM to reduce its power consumption. The mode is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. So BG600L-M3 in PSM cannot immediately respond users requests. When the module wants to use the PSM it shall request an Active Time value during every Attach and TAU procedures. If the network supports PSM and accepts that the module uses PSM, it will confirm the usage of PSM by allocating an Active Time value to the module. If the module wants to change the Active Time value, e.g. when the conditions are changed in the module, the module consequently requests the value it wants in the TAU procedure. If PSM is supported by the network, then it can be enabled via AT+CPSMS command. Either of the following methods will wake up the module from PSM:

A rising edge on PON_TRIG will wake up the module from PSM. (Recommended) BG600L-M3_Hardware_Design 29 / 83 LPWA Module Series BG600L-M3 Hardware Design Drive PWRKEY low will wake up the module. When the T3412_Ext timer expires, the module will be woken up automatically. NOTE Please refer to document [2] for details about AT+CPSMS command. 2.4.3 Extended Idle Mode DRX (e-I-DRX) The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX for reducing its power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or data transfers, and in particular they need to consider the delay tolerance of mobile terminated data. In order to negotiate the use of e-I-DRX, the UE requests e-I-DRX parameters during attach procedure and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX. In case the EPC accepts e-I-DRX, the EPC based on operator policies and, if available, the e-I-DRX cycle length value in the subscription data from the HSS, may also provide different values of the e-I-DRX parameters than what was requested by the UE. If the EPC accepts the use of e-I-DRX, the UE applies e-I-DRX based on the received e-I-DRX parameters. If the UE does not receive e-I-DRX parameters in the relevant accept message because the EPC rejected its request or because the request was received by EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception. If e-I-DRX is supported by the network, then it can be enabled by AT+CEDRXS=1 command. Please refer to document [2] for details about AT+CEDRXS command. NOTE 2.4.4 Sleep Mode BG600L-M3 is able to reduce its current consumption to a lower value during the sleep mode. The following sub-chapters describe the power saving procedure of BG600L-M3 module. 2.4.4.1 UART Application If the host communicates with the module via UART interface, the following preconditions can let the module enter sleep mode. BG600L-M3_Hardware_Design 30 / 83 LPWA Module Series BG600L-M3 Hardware Design Execute AT+QSCLK=1 command to enable sleep mode. Drive MAIN_DTR pin high. The following figure shows the connection between the module and the host. Figure 3: Sleep Mode Application via UART When BG600L-M3 has URC to report, MAIN_RI signal will wake up the host. Please refer to Chapter 3.15 for details about MAIN_RI behavior. Driving the MAIN_DTR of host low will wake up the module. 2.5 Power Supply 2.5.1 Power Supply Pins BG600L-M3 provides the following two VBAT pins for connection with an external power supply. There are two separate voltage domains for VBAT. One VBAT_RF pin for modules RF part. One VBAT_BB pin for modules baseband part. The following table shows the details of VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 50 VBAT_BB 51 Power supply for the modules RF part Power supply for the modules baseband part 3.3 3.8 4.3 3.3 3.8 4.3 V V BG600L-M3_Hardware_Design 31 / 83 LPWA Module Series BG600L-M3 Hardware Design 14, 16, 27, 31, 40, 42, 44, 45, 48, 49 Ground

GND 2.5.2 Decrease Voltage Drop The power supply range of the BG600L-M3 is 3.34.3 V. Please make sure that the input voltage will never drop below 3.3 V. The following figure shows the voltage drop during burst transmission in 2G network of BG600L-M3 module. The voltage drop will be less in LTE Cat M1 and/or LTE Cat NB2 networks. Figure 4: Power Supply Limits during Burst Transmission To decrease voltage drop, a bypass capacitor of about 100 F with low ESR should be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing the MLCC array, and place these capacitors close to VBAT pins. The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 0.5 mm, and the width of VBAT_RF trace should be no less than 2 mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to get a stable power source, it is suggested to use a TVS with low leakage current and suitable reverse stand-off voltage, and also it is recommended to place it as close to the VBAT pins as possible. The following figure shows the star structure of the power supply. BG600L-M3_Hardware_Design 32 / 83 LPWA Module Series BG600L-M3 Hardware Design Figure 5: Star Structure of the Power Supply 2.5.3 Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 2.6 Turn on and off Scenarios 2.6.1 Turn on Module with PWRKEY The following table shows the pin definition of PWRKEY. Table 7: Pin Definition of PWRKEY Pin Name Pin No. Description DC Characteristics Comment PWRKEY 5 Turn on/off the module Vnorm = 1.5 V VILmax = 0.45 V The output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. When BG600L-M3 is in power off mode, it can be turned on by driving PWRKEY low for 5001000 ms. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. BG600L-M3_Hardware_Design 33 / 83 LPWA Module Series BG600L-M3 Hardware Design Figure 6: Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. Figure 7: Turn on the Module Using Keystroke BG600L-M3_Hardware_Design 34 / 83 LPWA Module Series BG600L-M3 Hardware Design The power on scenario is illustrated in the following figure. Figure 8: Power-on Timing NOTES 30 ms. 1. Make sure that VBAT is stable before pulling down PWRKEY pin and keep the interval no less than 2. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, PWRKEY should never be pulled down to GND permanently. 2.6.2 Turn off Module Either of the following methods can be used to turn off the module:

Turn off the module with PWRKEY. Turn off the module with AT+QPOWD command. BG600L-M3_Hardware_Design 35 / 83 LPWA Module Series BG600L-M3 Hardware Design 2.6.2.1 Turn off Module with PWRKEY Driving PWRKEY low for 6501500 ms, the module will execute power-down procedure after PWRKEY is released. The power-off scenario is illustrated in the following figure. Figure 9: Power-off Timing 2.6.2.2 Turn off Module with AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module with PWRKEY. Please refer to document [2] for details about AT+QPOWD command. 2.7 Reset the Module RESET_N is used to reset the module. Due to platform limitations, the chipset has integrated the reset function into PWRKEY, and RESET_N is connected directly to PWRKEY inside the module. The module can be reset by driving RESET_N low for 23.8 s. BG600L-M3_Hardware_Design 36 / 83 LPWA Module Series BG600L-M3 Hardware Design Table 8: Pin Definition of RESET_N Pin Name Pin No. Description DC Characteristics Comment RESET_N 4 Reset the module VILmax = 0.45 V The reset scenario is illustrated in the following figure. Multiplexed from PWRKEY

(connected directly to PWRKEY inside the module). VBA T 3.8 s 2 s RESET_N VIL 0.45 V Module Status Running Resetting Restart Figure 10: Reset Timing The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N pin. Figure 11: Reference Circuit of RESET_N by Using Driving Circuit BG600L-M3_Hardware_Design 37 / 83 LPWA Module Series BG600L-M3 Hardware Design S2 TVS RESET_N Close to S2 Figure 12: Reference Circuit of RESET_N by Using Button NOTE Please assure that there is no large capacitance on RESET_N pin. 2.8 PON_TRIG Interface BG600L-M3 module provides one PON_TRIG pin, which is used to wake up the module from PSM. When the pin detects a rising edge, the module will be woken up from PSM. Table 9: Pin Definition of PON_TRIG Interface Pin Name Pin No. I/O Description Comment PON_TRIG 28 DI Wake up the module from PSM A reference circuit is shown in the following figure. Rising-edge triggered. Pulled-down by default. 1.8 V power domain. BG600L-M3_Hardware_Design 38 / 83 LPWA Module Series BG600L-M3 Hardware Design 10K VDD_1V8 PON_TRIG_EXT 10K 100K 100K PON_TRIG Figure 13: Reference Design of PON_TRIG NOTE VDD_1V8 is provided by an external LDO. 2.9 (U)SIM Interface BG600L-M3 supports 1.8 V (U)SIM card only. The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Table 10: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment USIM_DET*

26 DI

(U)SIM card hot-plug detect 1.8 V power domain. USIM_VDD 18 PO

(U)SIM card power supply Only 1.8 V (U)SIM card is supported. USIM_RST 20 DO

(U)SIM card reset 1.8 V power domain. USIM_DATA 21 IO

(U)SIM card data 1.8 V power domain. USIM_CLK 19 DO

(U)SIM card clock 1.8 V power domain. BG600L-M3 supports (U)SIM card hot-plug via the USIM_DET pin, and both high and low level detections are supported. The function is disabled by default, and please refer to AT+QSIMDET command in document [2] for more details. BG600L-M3_Hardware_Design 39 / 83 LPWA Module Series BG600L-M3 Hardware Design The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM card connector. Figure 14: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. Figure 15: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design:

Keep the placement of (U)SIM card connector as close to the module as possible. Keep the trace length as less than 200 mm as possible. BG600L-M3_Hardware_Design 40 / 83 LPWA Module Series BG600L-M3 Hardware Design Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground trace between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5 mm to maintain the same electric potential. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. USIM_RST should also be surrounded with ground. In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic capacitance not exceeding 15 pF. In order to facilitate debugging, it is recommended to reserve series resistors for the (U)SIM signals of the module. The 33 pF capacitors are used for filtering interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the

(U)SIM card connector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion are applied, and should be placed close to the (U)SIM card connector. NOTE

* means under development. 2.10 USB Interface BG600L-M3 provides one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports operation at low-speed (1.5 Mbps) and full-speed (12 Mbps) modes. For more details about USB 2.0 specification, please visit https://www.usb.org/. The USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. The following table shows the pin definition of USB interface. Table 11: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment USB_VBUS AI USB connection detect Input range: 1.31.8 V USB_DP USB_DM IO USB differential data (+) IO USB differential data (-) Require differential impedance of 90 USBPHY_3P3 PI Power supply for USB PHY circuit Vnorm = 3.3 V USBPHY_3P3_EN 8 DO 1.8 V power domain External LDO enable control for USB GND 31 Ground 32 24 25 17 BG600L-M3_Hardware_Design 41 / 83 LPWA Module Series BG600L-M3 Hardware Design The USB interface is recommended to be reserved for firmware upgrade or debugging in application designs. The following figures illustrate reference designs of USB PHY and USB interface. U1 VBAT VIN VOUT USBPHY_3P3 C1 1 F VDD_EXT USBPHY_3P3_EN R1 R2 10K 0R EN GND SG M2040-3.3 C2 1 F Figure 16: Reference Design of USB PHY Figure 17: Reference Circuit of USB Interface In order to ensure the integrity of USB data line signal, components R3 and R4 should be placed close to the module, and also these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles should be complied with while designing the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with ground surrounded. The impedance of USB differential trace is 90 . Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and with ground planes above and below. BG600L-M3_Hardware_Design 42 / 83 LPWA Module Series BG600L-M3 Hardware Design Junction capacitance of the ESD protection device might cause influences on USB data lines, so please pay attention to the selection of the device. Typically, the stray capacitance should be less than 2 pF. Keep the ESD protection devices as close to the USB connector as possible. NOTES 1. BG600L-M3 can only be used as a slave device. 2. The input voltage range of USB_VBUS is 1.31.8 V. 2.11 UART Interfaces The module provides three UART interfaces: the main UART, debug UART and the GNSS UART interfaces. Features of them are illustrated below:

The main UART interface supports 9600, 19200, 38400, 57600, 115200, 230400, 460800 and 921600 bps baud rates, and the default is 115200 bps. It is used for data transmission and AT command communication, and supports hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit). The debug UART interface supports a fixed baud rate of 115200 bps, and is used for software The GNSS UART interface supports 115200 bps baud rate by default, and is used for GNSS data debugging and log output. and NMEA sentences output. The following tables show the pin definition of the three UART interfaces. Table 12: Pin Definition of Main UART Interface Pin Name Pin No. I/O Description Comment MAIN_DTR MAIN_RXD DI DI Main UART data terminal ready 1.8 V power domain Main UART receive 1.8 V power domain MAIN_TXD DO Main UART transmit 1.8 V power domain MAIN_CTS DO Main UART clear to send 1.8 V power domain MAIN_RTS DI Main UART request to send 1.8 V power domain MAIN_DCD DO Main UART data carrier detect 1.8 V power domain 37 34 33 38 39 36 BG600L-M3_Hardware_Design 43 / 83 LPWA Module Series BG600L-M3 Hardware Design MAIN_RI 35 DO Main UART ring indication 1.8 V power domain NOTE AT+IPR command can be used to set the baud rate of the main UART interface, and AT+IFC command can be used to enable/disable hardware flow control (hardware flow control is disabled by default). Please refer to document [2] for more details about these AT commands. Table 13: Pin Definition of Debug UART Interface Pin Name Pin No. I/O Description Comment DBG _TXD 29 Debug UART transmit 1.8 V power domain DBG _RXD 30 Debug UART receive 1.8 V power domain Table 14: Pin Definition of GNSS UART Interface Pin Name Pin No. I/O Description Comment GNSS_ TXD DO GNSS UART transmit 1.8 V power domain GNSS_ RXD DI GNSS UART receive 1.8 V power domain 22 23 The logic levels of UART interfaces are described in the following table. Table 15: Logic Levels of Digital I/O Parameter VIL VIH VOL VOH Max. 0.6 2.0 0.45 1.8 Unit V V V V DO DI Min.

-0.3 1.2 0 1.35 The module provides 1.8 V UART interfaces. A voltage-level translator should be used if customers application is equipped with a 3.3 V UART interface. The voltage-level translator TXS0108EPWR provided by Texas Instruments is recommended, and please visit http://www.ti.com for more information. BG600L-M3_Hardware_Design 44 / 83 LPWA Module Series BG600L-M3 Hardware Design The following figure shows a reference design of the main UART interface:

Figure 18: Main UART Reference Design (Translator Chip) Another example with transistor translation circuit is shown as below. For the design of circuits in dotted lines, please refer to that of circuits in solid lines, but please pay attention to the direction of connection. Figure 19: Main UART Reference Design (Transistor Circuit) Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. NOTE BG600L-M3_Hardware_Design 45 / 83 LPWA Module Series BG600L-M3 Hardware Design 2.12 PCM and I2C Interfaces*

BG600L-M3 provides one Pulse Code Modulation (PCM) digital interface and one I2C interface. The following table shows the pin definition of the two interfaces which can be applied on audio codec design. Table 16: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_CLK 59 DO PCM clock 1.8 V power domain PCM_SYNC 61 DO PCM data frame sync 1.8 V power domain PCM_DIN 62 DI PCM data input 1.8 V power domain PCM_DOUT 60 DO PCM data output 1.8 V power domain I2C_SCL I2C_SDA 58 57 OD OD I2C serial clock

(for external codec) I2C serial data

(for external codec) Require external pull-up to 1.8 V Require external pull-up to 1.8 V The following figure shows a reference design of PCM and I2C interfaces with an external codec IC. Figure 20: Reference Circuit of PCM Application with Audio Codec NOTE

* means under development. BG600L-M3_Hardware_Design 46 / 83 LPWA Module Series BG600L-M3 Hardware Design 2.13 Network Status Indication BG600L-M3 provides one network status indication pin: NET_STATUS. The pin is used to drive a network status indication LED. The following tables describe the pin definition and logic level changes of NET_STATUS in different network activity status. Table 17: Pin Definition of NET_STATUS Pin Name Pin No. I/O Description Comment NET_STATUS 47 DO Indicate the modules network activity status BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain Table 18: Working State of NET_STATUS Pin Name Logic Level Changes Network Status Flicker slowly (200 ms High/1800 ms Low) Network searching NET_STATUS Flicker slowly (1800 ms High/200 ms Low) Idle Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always high Voice calling A reference circuit is shown in the following figure. Figure 21: Reference Circuit of the Network Status Indicator BG600L-M3_Hardware_Design 47 / 83 LPWA Module Series BG600L-M3 Hardware Design 2.14 STATUS The STATUS pin is used to indicate the operation status of BG600L-M3 module. It will output high level when the module is powered on. The following table describes the pin definition of STATUS. Table 19: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 13 DO Indicate the modules operation status 1.8 V power domain The following figure shows a reference circuit of STATUS. Figure 22: Reference Design of STATUS 2.15 Behaviors of MAIN_RI AT+QCFG="risignaltype","physical" command can be used to configure MAIN_RI behavior. No matter on which port URC is presented, URC will trigger the behavior of MAIN_RI pin. The default behaviors of MAIN_RI are shown as below. Table 20: Default Behaviors of MAIN_RI State Idle Response MAIN_RI keeps in high level. BG600L-M3_Hardware_Design 48 / 83 LPWA Module Series BG600L-M3 Hardware Design URC MAIN_RI outputs 120 ms low pulse when a new URC returns. The default MAIN_RI behaviors can be configured flexibly by AT+QCFG="urc/ri/ring" command. For more details about AT+QCFG, please refer to document [2]. NOTE URC can be outputted from UART port, USB AT port and USB modem port, through configuration via AT+QURCCFG command. The default port is USB AT port. 2.16 USB_BOOT Interface BG600L-M3 provides a USB_BOOT pin. During development or factory production, USB_BOOT can force the module to boot from USB port for firmware upgrade. Table 21: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description Comment USB_BOOT 56 DI Force the module into emergency download mode 1.8 V power domain. Active high. If unused, keep it open. The following figure shows a reference circuit of USB_BOOT interface. Figure 23: Reference Design of USB_BOOT Interface BG600L-M3_Hardware_Design 49 / 83 LPWA Module Series BG600L-M3 Hardware Design The following figure shows the timing of USB_BOOT. NOTE VBAT 5001000 ms PWRKEY VIL 0.45 V About 30 ms VDD_EXT USB_BOOT Pulling up USB_BOOT to 1.8 V before VDD_EXT power-

up will force the module into emergency download mode after the module is powered on. Figure 24: Timing of Turning on Module with USB_BOOT NOTES It is recommended to reserve the above circuit design during application design. 1. 2. Please make sure that VBAT is stable before pulling down PWRKEY. It is recommended that the time between powering up VBAT and pulling down PWRKEY is no less than 30 ms. 3. When using MCU to control the module entering emergency download mode, please follow the above timing sequence. Connecting the test points as shown in Figure 23 can manually force the module to enter download mode. 2.17 ADC Interface The module provides one analog-to-digital converter (ADC) interface. AT+QADC=0 command can be used to read the voltage value on ADC pin. For more details about the AT command, please refer to document [2]. In order to improve the accuracy of ADC voltage values, the trace of ADC should be ground surrounded. BG600L-M3_Hardware_Design 50 / 83 Parameter Voltage Range Resolution (LSB) Analog Bandwidth Sample Clock NOTES LPWA Module Series BG600L-M3 Hardware Design Table 22: Pin Definition of ADC Interface Pin Name Pin No. I/O Description Comment ADC 6 AI General-purpose ADC interface Voltage range: 0.11.8 V The following table describes the characteristics of ADC interface. Table 23: Characteristics of ADC Interface Min. 0.1 Typ. 64.979 500 4.8 Max. 1.8 Unit V V kHz MHz M Input Resistance 10 1. ADC input voltage must not exceed 1.8 V. 2. 3. It is prohibited to supply any voltage to ADC pin when VBAT is removed. It is recommended to use resistor divider circuit for ADC application, and the divider resistor accuracy should be no less than 1%. 2.18 GPIO Interfaces*

The module provides nine general-purpose input and output (GPIO) interfaces. AT+QCFG="gpio"*

command can be used to configure the status of corresponding GPIO pins. For more details about the AT command, please refer to document [2]. Table 24: Pin Definition of GPIO Interfaces Pin Name Pin No. I/O Description Comment GPIO1 9 IO General-purpose input/output BOOT_CONFIG. Do not pull it up before startup. BG600L-M3_Hardware_Design 51 / 83 LPWA Module Series BG600L-M3 Hardware Design GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 10 11 12 53 54 IO General-purpose input/output IO General-purpose input/output IO General-purpose input/output IO General-purpose input/output IO General-purpose input/output The following table describes the characteristics of GPIO interfaces. Table 25: Logic Levels of GPIO Interfaces Min.

-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V Parameter VIL VIH VOL VOH NOTES 1. GPIO1 is a BOOT_CONFIG pin, and please do not pull it up before startup. 2. * means under development. 2.19 GRFC Interfaces*

The module provides two general RF control interfaces for control of external antenna tuners. Table 26: Pin Definition of GRFC Interfaces Pin Name Pin No. I/O Description Comment GRFC1 GRFC2 63 64 DO Generic RF controller BOOT_CONFIG. Do not pull it up before startup. DO Generic RF controller BG600L-M3_Hardware_Design 52 / 83 LPWA Module Series BG600L-M3 Hardware Design Table 27: Logic Levels of GRFC Interfaces Parameter VOL VOH Min. 0 1.35 Max. 0.45 1.8 Unit V V Table 28: Truth Table of GRFC Interfaces GRFC1 Level GRFC2 Level Frequency Range (MHz) Band Low High Low Low Low High 8802200 B1, B2, B3, B4, B8, B25, B66 791894 698803 B5, B18, B19, B20, B26, B27 B12, B13, B14, B28, B85 High High 617698 B71 NOTES 1. GRFC1 is a BOOT_CONFIG pin, and please do not pull it up before startup. 2. * means under development. BG600L-M3_Hardware_Design 53 / 83 LPWA Module Series BG600L-M3 Hardware Design 3 GNSS Receiver 3.1 General Description BG600L-M3 includes a fully integrated global navigation satellite system solution that supports Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). The module supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, BG600L-M3 GNSS engine is switched off. It has to be switched on via AT command. For more details about GNSS engine technology and configurations, please refer to document [3]. 3.2 GNSS Performance The following table shows the GNSS performance of BG600L-M3. Table 29: GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) TTFF

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous Cold start

@ open sky Warm start

@ open sky Autonomous XTRA enabled Autonomous XTRA enabled Hot start Autonomous Typ. TBD TBD TBD TBD TBD TBD TBD TBD Unit dBm dBm dBm s s s s s BG600L-M3_Hardware_Design 54 / 83 LPWA Module Series BG600L-M3 Hardware Design

@ open sky CEP-50 XTRA enabled Autonomous

@ open sky TBD TBD s m Accuracy

(GNSS) NOTES 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. 3.3 Layout Guidelines The following layout guidelines should be taken into account in application designs. Maximize the distance between GNSS antenna and main antenna. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar should be kept away from the antennas. isolation and protection. Keep 50 characteristic impedance for ANT_GNSS trace. Please refer to Chapter 5 for GNSS antenna reference design and antenna installation information. BG600L-M3_Hardware_Design 55 / 83 LPWA Module Series BG600L-M3 Hardware Design 4 Antenna Interfaces BG600L-M3 includes a main antenna interface and a GNSS antenna interface. The antenna ports have an impedance of 50 . 4.1 Main Antenna Interface 4.1.1 Pin Definition The pin definition of main antenna interface is shown below. Table 30: Pin Definition of Main Antenna Interface 4.1.2 Operating Frequency Table 31: BG600L-M3 Operating Frequency Pin Name Pin No. I/O Description Comment ANT_MAIN 41 IO Main antenna interface 50 characteristic impedance 3GPP Band Transmit Receive LTE-FDD B1 19201980 21102170 LTE-FDD B2, PCS1900 18501910 19301990 LTE-FDD B3, DCS1800 17101785 18051880 LTE-FDD B4 17101755 21102155 LTE-FDD B5, GSM850 824849 LTE-FDD B8, EGSM900 880915 LTE-FDD B12 699716 869894 925960 729746 Unit MHz MHz MHz MHz MHz MHz MHz BG600L-M3_Hardware_Design 56 / 83 LPWA Module Series BG600L-M3 Hardware Design LTE-FDD B25 18501915 19301995 746756 758768 860875 875890 791821 859894 852869 758803 617652 728746 LTE-FDD B13 777787 LTE-FDD B14 1) 788798 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 815830 830845 832862 LTE-FDD B26 814849 LTE-FDD B27 1) 807824 LTE-FDD B28 703748 LTE-FDD B71 2) 663698 LTE-FDD B85 698716 LTE-FDD B66 17101780 21102180 NOTES 1. 1) LTE-FDD B14 and B27 are supported by LTE Cat M1 only. 2. 2) LTE-FDD B71 is supported by LTE Cat NB2 only. MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz 4.1.3 Reference Design of Main Antenna Interface A reference design of main antenna interface is shown as below. It is recommended to reserve a -type matching circuit for better RF performance, and the -type matching components (R1/C1/C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. BG600L-M3_Hardware_Design 57 / 83 LPWA Module Series BG600L-M3 Hardware Design Figure 25: Reference Design of Main Antenna Interface 4.1.4 Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 26: Microstrip Design on a 2-layer PCB BG600L-M3_Hardware_Design 58 / 83 LPWA Module Series BG600L-M3 Hardware Design Figure 27: Coplanar Waveguide Design on a 2-layer PCB Figure 28: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) BG600L-M3_Hardware_Design 59 / 83 LPWA Module Series BG600L-M3 Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully 50 . connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. The recommended trace angle is 135. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2 W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, please refer to document [4]. 4.2 GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNSS antenna interface. Table 32: Pin Definition of GNSS Antenna Interface Pin Name Pin No. I/O Description Comment ANT_GNSS 15 AI GNSS antenna interface 50 impedance Table 33: GNSS Frequency Type GPS Galileo BeiDou QZSS GLONASS 1597.51605.8 Frequency 1575.42 1.023 1575.42 2.046 1561.098 2.046 1575.42 1.023 Unit MHz MHz MHz MHz MHz BG600L-M3_Hardware_Design 60 / 83 LPWA Module Series BG600L-M3 Hardware Design A reference design of GNSS antenna interface is shown as below. 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. If the module is designed with a passive antenna, then the VDD circuit is not needed. Figure 30: Reference Design of GNSS Antenna Interface NOTES GNSS 1) LTE/GSM 4.3 Antenna Installation 4.3.1 Antenna Requirements The following table shows the requirements on main antenna and GNSS antenna. Table 34: Antenna Requirements Antenna Type Requirements Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Active antenna gain: > 0 dBi Active antenna embedded LNA gain: < 17 dB VSWR: 2 Efficiency: > 30%

BG600L-M3_Hardware_Design 61 / 83 LPWA Module Series BG600L-M3 Hardware Design Max Input Power: 50 W Input Impedance: 50 Cable Insertion Loss: < 1 dB

(LTE B5/B8/B12/B13/B14/B18/B19/B20/B26/B27/B28/B71/B85, GSM850/EGSM900) Cable Insertion Loss: < 1.5 dB

(LTE B1/B2/B3/B4/B25/B66, DCS1800/PCS1900) NOTE 1) It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance. 4.3.2 Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by HIROSE. Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) BG600L-M3_Hardware_Design 62 / 83 LPWA Module Series BG600L-M3 Hardware Design U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 32: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 33: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com. BG600L-M3_Hardware_Design 63 / 83 LPWA Module Series BG600L-M3 Hardware Design 5 Electrical, Reliability and Radio Characteristics 5.1 Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 35: Absolute Maximum Ratings Parameter VBAT_BB VBAT_RF USB_VBUS Voltage at Digital Pins Min.

-0.5

-0.3 1.3

-0.3 5.2 Power Supply Ratings Table 36: Power Supply Ratings Max. 6.0 6.0 1.8 2.09 Unit V V V V Parameter Description Conditions Min. Typ. Max. Unit VBAT VBAT_BB/ VBAT_RF 3.3 3.8 4.3 V The actual input voltages must be kept between the minimum and maximum values. IVBAT Peak supply current

(during transmission slot) Maximum power control level on EGSM900 1.8 2.0 A BG600L-M3_Hardware_Design 64 / 83 LPWA Module Series BG600L-M3 Hardware Design USB_VBUS USB detection 1.3 1.8 V 5.3 Operation and Storage Temperatures The operation and storage temperatures of the module are listed in the following table. Table 37: Operation and Storage Temperatures Parameter Min. Max. Unit Typ.

+25

+75

+85

+90 C C C Operation Temperature Range 1)

-35 Extended Temperature Range 2)

-40 Storage Temperature Range

-40 NOTES 1. 1) Within operation temperature range, the module meets 3GPP specifications. 2. 2) Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice, SMS, data transmission, emergency call, etc., without any unrecoverable malfunction. Radio spectrum and radio network will not be influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again. 5.4 Current Consumption The following table shows current consumption of BG600L-M3 module. Table 38: BG600L-M3 Current Consumption Description Conditions Average Max. Unit Leakage 1) Power-off PSM 2) Power Saving Mode 12.5 4

A A BG600L-M3_Hardware_Design 65 / 83 LPWA Module Series BG600L-M3 Hardware Design Rock Bottom Current AT+CFUN=0 @ Sleep State Sleep State

(USB disconnected) LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 20.48 s, DRX = 2.56 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 20.48 s, DRX = 2.56 s LTE-FDD B1 @ 21.15 dBm LTE-FDD B2 @ 21.01 dBm LTE-FDD B3 @ 20.85 dBm LTE-FDD B4 @ 20.88 dBm LTE-FDD B5 @ 20.92 dBm LTE-FDD B8 @ 21.15 dBm LTE-FDD B12 @ 21.01 dBm LTE-FDD B13 @ 21.14 dBm LTE-FDD B19 @ 21.29 dBm LTE-FDD B20 @ 21 dBm LTE-FDD B25 @ 20.93 dBm LTE-FDD B26 @ 21.09 dBm LTE-FDD B27 @ 20.91 dBm LTE-FDD B28A @ 21.06 dBm LTE-FDD B28B @ 20.79 dBm LTE-FDD B66 @ 20.83 dBm 0.68 1.61 1.34 0.87 1.22 184 182 175 175 192 194 186 204 184 196 199 197 180 196 194 187 189 173

406 400 376 376 440 436 414 478 405 448 466 448 392 448 445 417 421 375 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE Cat M1 data transfer

(GNSS OFF) LTE-FDD B14 @ 20.2 dBm LTE-FDD B18 @ 21.01 dBm BG600L-M3_Hardware_Design 66 / 83 LPWA Module Series BG600L-M3 Hardware Design LTE-FDD B85 @ 21.14 dBm LTE-FDD B1 @ 21.48 dBm LTE-FDD B2 @ 21.5 dBm LTE-FDD B3 @ 20.92 dBm LTE-FDD B4 @ 20.97 dBm LTE-FDD B5 @ 21.13 dBm LTE-FDD B8 @ 21.35 dBm LTE-FDD B12 @ 21.37 dBm LTE-FDD B13 @ 21.1 dBm LTE-FDD B18 @ 21.39 dBm LTE-FDD B19 @ 21.16 dBm LTE-FDD B20 @ 21.34 dBm LTE-FDD B25 @ 21.24 dBm LTE-FDD B26 @ 21.26 dBm LTE-FDD B28 @ 21 dBm LTE-FDD B66 @ 21.24 dBm LTE-FDD B85 @ 21.73 dBm GSM850 4UL 1DL @ 28 dBm GSM850 3UL 2DL @ 29 dBm GSM850 2UL 3DL @ 32 dBm GSM850 1UL 4DL @ 32 dBm EGSM900 4UL 1DL @ 28 dBm EGSM900 3UL 2DL @ 29 dBm EGSM900 2UL 3DL @ 31 dBm 185 146 147 132 133 161 159 155 164 166 161 161 137 161 157 135 157 570 491 426 272 573 495 402 LTE-FDD B71 @ TBD TBD 417 365 379 329 337 423 408 410 432 428 420 415 357 415 407 343 TBD 409 1187 1325 1624 1055 1201 1342 1521 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE Cat NB1 data transfer

(GNSS OFF) GPRS data transfer

(GNSS OFF) BG600L-M3_Hardware_Design 67 / 83 LPWA Module Series BG600L-M3 Hardware Design EGSM900 1UL 4DL @ 32 dBm 1059 DCS1800 4UL 1DL @ 26 dBm DCS1800 3UL 2DL @ 27 dBm DCS1800 2UL 3DL @ 28 dBm DCS1800 1UL 4DL @ 30 dBm PCS1900 4UL 1DL @ 25 dBm PCS1900 3UL 2DL @ 26 dBm PCS1900 2UL 3DL @ 29 dBm PCS1900 1UL 4DL @ 30 dBm GSM850 4UL 1DL @ 23 dBm GSM850 3UL 2DL @ 24 dBm GSM850 2UL 3DL @ 26 dBm GSM850 1UL 4DL @ 26 dBm EGSM900 4UL 1DL @ 23 dBm EGSM900 3UL 2DL @ 24 dBm EGSM900 2UL 3DL @ 26 dBm EGSM900 1UL 4DL @ 26 dBm DCS1800 4UL 1DL @ 22 dBm DCS1800 3UL 2DL @ 23 dBm DCS1800 2UL 3DL @ 25 dBm DCS1800 1UL 4DL @ 26 dBm PCS1900 4UL 1DL @ 22 dBm PCS1900 3UL 2DL @ 23 dBm PCS1900 2UL 3DL @ 25 dBm PCS1900 1UL 4DL @ 26 dBm 272 402 321 253 182 414 331 271 193 404 339 276 182 404 339 273 181 345 276 218 155 351 283 227 160 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 794 804 848 589 824 831 927 660 1272 1301 1313 703 1288 1321 1311 700 834 843 841 488 919 922 922 499 EDGE data transfer

(GNSS OFF) BG600L-M3_Hardware_Design 68 / 83 LPWA Module Series BG600L-M3 Hardware Design NOTES 1. 1) The current consumption in PSM is much lower than that in power off mode, and this is because of the following two designs:

More internal power supplies are powered off in PSM. Also the internal clock frequency is reduced in PSM. 2. 2) The modules USB and UART are disconnected and GSM network does not support PSM. Table 39: GNSS Current Consumption Description Conditions Cold start @ Instrument Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Cold start @ Real network with half sky, Active Antenna TBD Instrument Environment @ DPO off Instrument Environment @ DPO on Half Sky @ Real network, Active Antenna, DPO off Typ. TBD TBD TBD TBD Unit mA mA mA mA mA 5.5 RF Output Power The following table shows the RF output power of BG600L-M3. Table 40: BG600L-M3 RF Output Power Frequency Max. Min. LTE-FDD B1/B2/B3/B4/B5/B8/B12/B13/B14 1)/

B18/B19/B20/B25/B26/B27 1)/B28/B66/B71 2)/B85 GSM850/EGSM900 DCS1800/PCS1900 21 dBm +1.7/-3 dB

<-39 dBm 33 dBm 2 dB 5 dBm 5 dB 30 dBm 2 dB 0 dBm 5 dB GSM850/EGSM900 (8-PSK) 27 dBm 3 dB 5 dBm 5 dB DCS1800/PCS1900 (8-PSK) 26 dBm 3 dB 0 dBm 5 dB BG600L-M3_Hardware_Design 69 / 83 LPWA Module Series BG600L-M3 Hardware Design NOTES 1. 2. 1) LTE-FDD B14 and B27 are supported by LTE Cat M1 only. 2) LTE-FDD B71 is supported by LTE Cat NB2 only. 5.6 RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of BG600L-M3. Table 41: BG600L-M3 Conducted RF Receiving Sensitivity (25 C, 3.8 V) Network Band Primary Diversity LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B14 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B27 Sensitivity (dBm) Cat M1/3GPP Cat NB2 1)/3GPP

-107/-102.3

-115.5/-107.5

-107 /-100.3

-115.5/-107.5

-107 /-99.3

-115.5/-107.5

-107 /-102.3

-115/-107.5

-107 /-100.8

-115.5/-107.5

-107 /-99.8

-115.5/-107.5

-107 /-99.3

-115.5/-107.5

-107 /-99.3 Not Supported

-107 /-102.3

-115.5/-107.5

-107 /-102.3

-115.5/-107.5

-107 /-99.8

-115/-107.5

-107 /-100.3

-115.5/-107.5

-107 /-100.3

-115.5/-107.5

-107 /-100.8 Not Supported LTE-FDD B12

-107 /-99.3

-115.5/-107.5 LTE LTE-FDD B13 Supported Not Supported BG600L-M3_Hardware_Design 70 / 83 LPWA Module Series BG600L-M3 Hardware Design LTE-FDD B28 LTE-FDD B66 LTE-FDD B71 LTE-FDD B85

-107 /-100.8

-115.5/-107.5

-108/-101.8

-116/-107.5 Not Supported

-115/-107.5

-106/-99.3

-115.5/-107.5 Network Band Primary Diversity GSM GSM850/EGSM900 DCS1800/PCS1900 Supported Not Supported Sensitivity (dBm) GSM/3GPP

-107/-102

-107/-102 NOTE 1) LTE Cat NB2 receiving sensitivity without repetitions. 5.7 Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the electrostatic discharge characteristics of BG600L-M3 module. Table 42: Electrostatic Discharge Characteristics (25 C, 45% Relative Humidity) Tested Interfaces Contact Discharge Air Discharge Unit VBAT, GND Main/GNSS Antenna Interfaces 6 5 10 8 kV kV BG600L-M3_Hardware_Design 71 / 83 LPWA Module Series BG600L-M3 Hardware Design 6 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are 0.05 mm unless otherwise specified. 6.1 Mechanical Dimensions 160.15 2.10.2 Pin 1

. 5 1 0 7

. 8 1 Figure 34: Module Top and Side Dimensions BG600L-M3_Hardware_Design 72 / 83 LPWA Module Series BG600L-M3 Hardware Design 16.000.15 5.50 5.50 1.50 0.50 1.00 0.25 0.25 8 5 8

. 0 0 07 5 4

. 0 7 2

. 0 7

. 2 0 5

. 4 0 0

. 7 8 5

. 8 0 4

. 5 1.80 0.90 1.80 1.80 0.55 1.00 Pin 1 0.25 1.00 0.35

. 5 1 0 0 7

. 8 1 0.25 1.80 1.00 3.60 3.60 14x1.10 14x1.10 54x0.7 54x1.05 Figure 35: Module Bottom Dimensions (Bottom View) NOTE The package warpage level of the module conforms to JEITA ED-7306 standard. BG600L-M3_Hardware_Design 73 / 83 LPWA Module Series BG600L-M3 Hardware Design 6.2 Recommended Footprint 16.000.15 1.00 5.50 5.50 1.50 0.50 1.80 1.00 Pin 1 0.25 1.00 0.35 1.80 0 4

. 5 0.90 1.80 0.55 0.25 0.25 8 5

. 8 0 0 0 7 5

. 4 0 7

. 2 0 7

. 2 0 5

. 4 0 0

. 7 8 5

. 8 1.00 1.80 0.25 3.60 3.60 54x0.7 54x1.05 14x1.10 14x1.10 Figure 36: Recommended Footprint (Top View) NOTES 1. For easy maintenance of the module, please keep about 3 mm between the module and other components on the motherboard. 2. All reserved pins must be kept open. BG600L-M3_Hardware_Design 74 / 83 LPWA Module Series BG600L-M3 Hardware Design 6.3 Top and Bottom Views Figure 37: Top View of the Module Figure 38: Bottom View of the Module NOTE These are renderings of BG600L-M3 module. For authentic appearance, please refer to the module received from Quectel. BG600L-M3_Hardware_Design 75 / 83 LPWA Module Series BG600L-M3 Hardware Design 7 Storage, Manufacturing and Packaging 7.1 Storage BG600L-M3 is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 5 C and the relative humidity 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. should be 35%60%. 3. The floor life of the module is 24 hours in a plant where the temperature is 23 5 C and relative humidity is below 60%. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 24 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10% (e.g. a drying cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement above occurs;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

All modules must be soldered to PCB within 24 hours after the baking, otherwise they should be put in a dry environment such as in a drying oven. 5. BG600L-M3_Hardware_Design 76 / 83 LPWA Module Series BG600L-M3 Hardware Design NOTE Please take the module out of the packaging and put it on high-temperature resistant fixtures before the baking. If shorter baking time is desired, please refer to IPC/JEDEC J-STD-033 for baking procedure. 7.2 Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.130.15 mm. For more details, please refer to document [5]. It is suggested that the peak reflow temperature is 238246 C, and the absolute maximum reflow temperature is 246 C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Temp. (C) 246 238 220 200 150 100 Soak Zone A Max slope: 13 C/s Reflow Zone Max slope:

23 C/s C Cooling down slope:

-1 to -4 C/s B D Figure 39: Recommended Reflow Soldering Thermal Profile BG600L-M3_Hardware_Design 77 / 83 LPWA Module Series BG600L-M3 Hardware Design Table 43: Recommended Thermal Profile Parameters Soak time (between A and B: 150C and 200C) 70120 s Factor Soak Zone Max slope Reflow Zone Max slope Reflow time (D: over 220C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle 7.3 Packaging Recommendation 13 C/s 23 C/s 4570 s 238246 C

-1 to -4 C/s 1 BG600L-M3 is packaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until the devices are ready to be soldered onto the application. The reel is 330 mm in diameter and each reel contains 250 modules. The following figures show the packaging details, measured in millimeter (mm). BG600L-M3_Hardware_Design 78 / 83 LPWA Module Series BG600L-M3 Hardware Design Figure 40: Tape Dimensions Figure 41: Reel Dimensions BG600L-M3_Hardware_Design 79 / 83 LPWA Module Series BG600L-M3 Hardware Design Table 44: Module Packaging Specifications MOQ for MP Minimum Package: 250 Minimum Package x 4 = 1000 Size: 370 mm 350 mm 56 mm N.W: TBD G.W: TBD Size: 380 mm 250 mm 365 mm N.W: TBD G.W: TBD 250 BG600L-M3_Hardware_Design 80 / 83 LPWA Module Series BG600L-M3 Hardware Design 8 Appendix A References Table 45: Related Documents SN Document Name Remark

[1] Quectel_UMTS&LTE_EVB_User_Guide UMTS&LTE EVB User Guide Quectel_BG95&BG77&BG600L&BC69_Series_AT_ Commands_Manual AT Commands Manual of BG95 series, BG77, BG600L-M3 and BC69 modules Quectel_ BG95&BG77&BG600L&BC69_Series_ GNSS_Application_Note GNSS Application Note of BG95 series, BG77, BG600L-M3 and BC69 modules

[4] Quectel_RF_Layout_Application_Note RF Layout Application Note Quectel_Module_Secondary_SMT_Application_ Note Module Secondary SMT Application Note Table 46: Terms and Abbreviations Abbreviation Description Analog-to-Digital Converter Bits Per Second Challenge Handshake Authentication Protocol Coding Scheme Clear To Send Delta Firmware Upgrade Over The Air Downlink Discontinuous Transmission Extended Idle Mode Discontinuous Reception Evolved Packet Core

[2]

[3]

[5]

ADC bps CHAP CS CTS DFOTA DL DTX e-I-DRX EPC BG600L-M3_Hardware_Design 81 / 83 LPWA Module Series BG600L-M3 Hardware Design ESD FDD FR GMSK GSM HSS I/O Inorm LED LNA LTE MO MS MT PAP PCB PDU PPP PSM RF RHCP Rx SISO SMS TDD Electrostatic Discharge Frequency Division Duplex Full Rate Gaussian Minimum Shift Keying Global System for Mobile Communications Home Subscriber Server Input/Output Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution Mobile Originated Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Power Saving Mode Radio Frequency Right Hand Circularly Polarized Receive Single Input Single Output Short Message Service Time Division Duplexing BG600L-M3_Hardware_Design 82 / 83 LPWA Module Series BG600L-M3 Hardware Design Transmitting Direction Uplink User Equipment Unsolicited Result Code Maximum Voltage Value Normal Voltage Value Minimum Voltage Value

(Universal) Subscriber Identity Module Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio TX UL UE URC

(U)SIM Vmax Vnorm Vmin VIHmax VIHmin VILmax VILmin VImax VImin VOHmax VOHmin VOLmax VOLmin VSWR BG600L-M3_Hardware_Design 83 / 83 LPWA Module Series BG600L-M3 Hardware Design 9 Appendix B GPRS Coding Schemes Table 47: Description of Different Coding Schemes Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits Data Rate Kb/s Radio Block excl.USF and BCS 181 268 CS-1 CS-2 CS-3 CS-4 2/3 3/4 1/2 3 3 40 4 456 0 3 6 16 4 588 132 3 6 312 16 4 676 220 15.6 9.05 13.4 1 3 12 428 16

456 21.4 BG600L-M3_Hardware_Design 84 / 83 LPWA Module Series BG600L-M3 Hardware Design 10 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 48: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA 1 1 2 1 2 2 3 1 2 2 3 4 3 4 BG600L-M3_Hardware_Design 85 / 83 LPWA Module Series BG600L-M3 Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 BG600L-M3_Hardware_Design 86 / 83 LPWA Module Series BG600L-M3 Hardware Design 11 Appendix D EDGE Modulation and Coding Schemes Table 49: EDGE Modulation and Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot GMSK GMSK GMSK GMSK GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK

C B A C B A B A A 9.05 kbps 18.1 kbps 36.2 kbps 13.4 kbps 26.8 kbps 53.6 kbps 15.6 kbps 31.2 kbps 62.4 kbps 21.4 kbps 42.8 kbps 85.6 kbps 8.80 kbps 17.60 kbps 35.20 kbps 11.2 kbps 22.4 kbps 44.8 kbps 14.8 kbps 29.6 kbps 59.2 kbps 17.6 kbps 35.2 kbps 70.4 kbps 22.4 kbps 44.8 kbps 89.6 kbps 29.6 kbps 59.2 kbps 118.4 kbps 44.8 kbps 89.6 kbps 179.2 kbps 54.4 kbps 108.8 kbps 217.6 kbps 59.2 kbps 118.4 kbps 236.8 kbps Coding Schemes CS-1 CS-2 CS-3 CS-4 MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 BG600L-M3_Hardware_Design 87 / 83

Quecrer BG600L-M3 aa_o1-a3670 BG6OOLM3AA-D08-SGNSA SN:MPA7301 73000029 IMEI:86301 0031218428 FCC 1D:XMR202004BG600LM3 IC: 10224A-20BG600LM3 I ane |

Crane emanate BLE TU

ANTENNA SPECIFICATION Project Number: S0691 Rev. 1.0 Internal Antenna Product Specification Customer Name:

Project Name:

Quectel Wireless Solutions Co., Ltd. 4G-LTE External Antenna Part Number:

SAA30968A VENDOR NAME:

ShanghaiSaintennaElectronic

TechnologyCo.,Ltd. Tel: 021- 36307272 Fax: 021- 36307757 Approval Sheet Customer Saintenna Rev 1.0 Change Summary Preliminary Release Date 2014-07-26 Author Kevin Cui PREPARED BY ShanghaiSaintennaElectronicTechnologyCo.,Ltd. 2005 COPYRIGHT SAINTENNA CO. LTD. This document is issued by Saintenna Electronic Technology Co. Ltd. (hereinafter called Saintenna) in confidence, and is not to be reproduced in whole or in part without the prior written permission of Saintenna. The information contained herein is the property of Saintenna and is to be used only for the purpose for which it is submitted and is not to be released in whole or in part without the prior written permission of Saintenna. Building 8, No. 611 BaoQI Road, Baoshan District Shanghai 200444, P.R. China Saintenna Co. Ltd. Confidential & Proprietary Tel. 0086-21-36307272 SFN01.05A Fax 0086-21-36307757 Page 1 of 1 Catalog Project / content 1. Cover 2. Catalog 3. Product chart 4. Antenna standard parameters 5. Electrical performance test report 6. RoHS No. 1 2 3 4 5-7 8 Standard parameter Specifications Frequency range 699~960MHz/1710~2700MHz S.W.R Gain Connector Impedance 3 4.0dBi SMA Plug 50 Ohm Reliability test Project Test condition Result Storage environment Temperature, humidity, air pressure test are as follows:

1.Temperature: -30+80 Normal electrical and mechanical properties 2.Humidity: 45%-85%

3.Pressure: 86kpa-106kpa

Drop test The 5 cycle is between 70 and 40. Then check the appearance quality Meet the mechanical and electrical properties

Meet the mechanical and electrical properties Vibration frequency 10-55HZ, displacement:

0.35MM, acceleration: 50.0M/S, Frequency sweep frequency: 30 times 1m height drop Normal electrical and mechanical properties Normal electrical and mechanical properties Normal electrical and mechanical properties Drawing force test Push pull tester to test the strength of the instrument10N Voltage resistance 1.Insulation spark voltage 1.5KV 2.Sheath spark voltage 1.5KV 3.Insulation resistance to sheath voltage 0.5KV Normal electrical and mechanical properties Shanghai Saintenna Electronic TechnologyCo.Ltd. Company / project External antenna Working frequency band All Test date 2016/6/22 Test person Victor Peng Version number V1.0 Test sample description Mould Free space test data of whole machine passive efficiency:

Freq 700 710 720 730 740 750 760 770 780 790 800 810 820 830 840 850 860 870 880 890 900 910 920 930 940 950 Gain 1.66 3.26 3.95 3.6 3.85 4.04 3.44 3.98 4.45 3.63 3.47 3.19 2.53 2.13 1.89 2.29 2.64 3.01 2.98 2.46 2.38 2.06 1.91 2.06 2.27 2.04 Efficiency 41.00%

49.30%

58.30%

58.10%

55.50%

54.40%

53.30%

57.30%

63.50%

66.00%

67.30%

62.40%

59.20%

57.60%

56.30%

57.10%

60.50%

61.20%

60.60%

57.00%

54.80%

52.30%

51.50%

51.30%

55.40%

54.10%

Freq 960 970 980 990 1000 1700 1720 1740 1760 1780 1800 1820 1840 1860 1880 1900 1920 1940 1960 1980 2000 2020 2040 2060 2080 2100 Gain 1.7 1.23 1 0.82 1.17 1.67 1.94 2 1.57 0.97 1.33 1.17 1.36 1.25 1.38 1.59 1.36 1.01 1.41 1.53 1.84 2.1 2.65 3.22 3.69 4.01 Efficiency 51.90%

47.10%

44.80%

41.90%

40.70%

63.40%

62.90%

64.80%

60.40%

56.80%

55.90%

56.20%

55.70%

51.40%

49.90%

51.70%

52.00%

49.40%

51.60%

53.20%

52.70%

50.40%

54.50%

56.90%

56.60%

59.20%

The information contained in this product is of a proprietary nature. It may not be reproduced without expressed written permission of Shanghai Saintenna Electronic Technology Co., Ltd. CONFIDENTIAL Freq 2500 2520 2540 2560 2580 2600 2620 2640 2660 2680 2700 Gain 3 2.68 2.44 2.3 2 2.04 2.06 2 1.71 1.71 1.78 Efficiency 67.00%

68.00%

68.80%

66.30%

59.90%

60.30%

61.10%

60.70%

59.90%

58.60%

59.00%

Freq 2120 2140 2160 2180 2300 2320 2340 2360 2380 2400 2420 2440 2460 2480 Gain 3.69 3.22 2.46 1.45 1.25 1.49 1.49 1.49 1.57 1.88 2.15 2.85 3.35 3.6 Efficiency 59.60%

56.00%

52.20%

47.30%

46.90%

50.10%

50.60%

49.90%

51.90%

54.40%

57.80%

60.80%

64.80%

69.50%

LOG MAG:

The information contained in this product is of a proprietary nature. It may not be reproduced without expressed written permission of Shanghai Saintenna Electronic Technology Co., Ltd. Page 2 CONFIDENTIAL VSWR The information contained in this product is of a proprietary nature. It may not be reproduced without expressed written permission of Shanghai Saintenna Electronic Technology Co., Ltd. Page 3 CONFIDENTIAL Product :RF Antenna Assembly ROHS Supplier Part No.

() ITEM

() RAW MATERIAL RAW MATERIAL Cd() Pb() Cr6+(

(//

) SUPPLIER

()

(ppm) Silver plated copper wire RG-178 FEP Tin plated copper wire Brown color Rod sleeve ABS Fixed Solid PBT+PC PBT+PC POM NI-Plated Connector Gold-Plated PTFE Brass Toner Black masterbatch PCB FR4 1 2 3 4 5 6 7 JIANGSU YUANDA N.D N.D N.D N.D Chemical fiber N.D N.D N.D N.D N.D N.D N.D 14 N.D N.D SHIYANG HEN-CHEN LIANFENG LIANFENG Huake Formosa PBBS(

) Hg()

(ppm)

)

(ppm) N.D

(ppm) N.D N.D N.D N.D N.D

(ppm) N.D Negative N.D N.D N.D N.D N.D N.D Negative N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D Negative N.D N.D Negative N.D N.D 31782 Negative N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D PBDES(

)

(ppm) N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D N.D Test organization Test report No. SGS Report date CTI ECL01H051755017 2015.10.23 SGS SGS SGS SGS SGS SGS CTI SGS SGS SGS CE/2016/13616 2016.01.25 CE/2015/C5211 2015.12.30 KE/2015/C2285A-01 CANEC1517911004 CANEC1517911006 SCL01I013440001C CANEC1603095201 CANEC1601390003 SCL01H099132001C 2015.12.28 2015.10.26 2015.10.26 2016.03.07 2016.03.09 2016.01.28 2015.11.23

Quectel Wireless Solutions Company Limited Request for Confidentiality Date: _2020/6/21_ Subject: Confidentiality Request for: _____ FCC ID: XMR202004BG600LM3______ Pursuant to FCC 47 CRF 0.457(d) and 0.459 and IC RSP-100, Section 10, the applicant requests that a part of the subject FCC application be held confidential. Type of Confidentiality Requested Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Permanent Permanent*1 Permanent Permanent Permanent Permanent Permanent*

Exhibit Block Diagrams External Photos Internal Photos Operation Description/Theory of Operation Parts List & Placement/BOM Tune-Up Procedure Schematics Test Setup Photos Users Manual

*Note: ______(Insert Explanation as Necessary)______ ______ FCC ID: XMR202004BG600LM3 has spent substantial effort in developing this product and it is one of the first of its kind in industry. Having the subject information easily available to "competition" would negate the advantage they have achieved by developing this product. Not protecting the details of the design will result in financial hardship. Permanent Confidentiality:

The applicant requests the exhibits listed above as permanently confidential be permanently withheld from public review due to materials that contain trade secrets and proprietary information not customarily released to the public. Short-Term Confidentiality:

The applicant requests the exhibits selected above as short term confidential be withheld from public view for a period of ______ days from the date of the Grant of Equipment Authorization and prior to marketing. This is to avoid premature release of sensitive information prior to marketing or release of the product to the public. Applicant is also aware that they are responsible to notify TCB in the event information regarding the product or the product is made available to the public. TCB will then release the documents listed above for public disclosure pursuant to FCC Public Notice DA 04-1705. NOTE for Industry Canada Applications:

The applicant understands that until such time that IC distinguishes between Short Term and Permanent Confidentiality, either type of marked exhibit above will simply be marked Confidential when submitted to IC. Sincerely, By:

(Signature/Title2) Jean Hu

(Print name)

Quectel Wireless Solutions Company Limited Declaration of the Modular Approval Applicant / Grantee FCC ID:

Model:

The single module transmitter has been evaluated then tested meeting the requirements under Part 15C Section 212 as below:

Quectel Wireless Solutions Company Limited XMR202004BG600LM3 BG600L-M3 Modular approval requirement EUT Condition

(a) The radio elements of the modular transmitter must have their own shielding. The physical crystal and tuning capacitors may be located external to the shielded radio elements. The radio elements of the modular transmitter have their own shielding. Com ply YES

(b) The modular transmitter have buffered modulation/data inputs are provided) to ensure that the module will comply with part 15 requirements under conditions of excessive data rates or over-modulation. inputs (if such must

(c)The modular transmitter must have its own powersupply regulation. The modular has buffered data inputs, it is integrated in chip. Please see schematic.pdf YES All power lines derived from the host device are regulated before energizing other circuits internal to the BG600L-M3. Please see schematic.pdf YES Quectel Wireless Solutions Company Limited

(d)

(e)The The must modular transmitter comply with the antenna and transmission system requirements of Sections 15.203, 15.204(b) and 15.204(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of Section 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph (b) of this section. be must modular transmitter tested in a stand-alone configuration, i.e., the module must not be inside another device during testing for compliance with part 15 requirements. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with the module (see Section 15.27(a)). The length of these lines shall be the length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified and commercially available (see Section 15.31(i))mustnotbeinsideanotherdeviceduringtesting.

(f)The modular be equipped with either a permanently affixed label or must be capable of electronically displaying its FCC identification number. transmitter must

(g) The modular transmitter must comply with any specific rules or operating requirements that ordinarily apply to a complete transmitter and the manufacturer must provide adequate instructions along with the module to explain any suchrequirements. A copy of these instructions must be included in the application for equipmentauthorizationrequirements,whicharebasedonthei ntendeduse/configurations.

(h)The modular transmitter must comply with any applicable RF exposure requirements in its final configuration. A permanently attached antenna or unique antenna connector is not a requirement for licensed modules. YES The BG600L-M3 was tested in a stand alone configuration via a PCMCIA extender. Please see spurious setup YES The label position of BG600L-M3 is clearly indicated. If the FCC ID of the module cannot be seen when it is installed, then the host label must include the text:

Contains FCC ID: XMR202004BG600LM3. Please see the label.pdf The BG600L-M3 is compliant with all applicable FCC rules. Detail instructions are given in the User Manual. The BG600L-M3 is approved to comply with the applicable RF exposure requirement, please see the MPE evaluation with 20cm as the distance restriction. YES YES YES Quectel Wireless Solutions Company Limited Dated By:

2020/6/21 Signature Title: Project Manager Jean Hu Printed On behalf of :

Quectel Wireless Solutions Company Limited Telephone:

+86-21-51086236 ext 800

Quectel Wireless Solutions Company Limited POWER OF ATTORNEY DATE: June 21, 2020 To:

Federal Communications Commission, Authorization & Evaluation Division, 7435 Oakland Mills Road, Columbia, MD 21046 acts of our own. Sincerely, Signature:

Print name: Jean Hu | Project Manager Company: Quectel Wireless Solutions Company Limited We, the undersigned, hereby authorize TA Technology (Shanghai) Co., Ltd.

/Han jinnan on our behalf, to apply to FCC on our equipment for FCC ID:

XMR202004BG600LM3. Any and all acts carried out by TA Technology

(Shanghai) Co., Ltd. / Han jinnan on our behalf shall have the same effect as