FCC ID: XMR202005BG95M5 LTE Cat M1 & Cat NB2 & EGPRS Module

 

BG95 Series Hardware Design LPWA Module Series Rev. BG95_Series_Hardware_Design_V1.2 Date: 2020-07-06 Status: Released www.quectel.com LPWA Module Series BG95 Series Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

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http://www.quectel.com/support/technical.htm Or email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT WITHOUT PERMISSION ARE FORBIDDEN. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2020. All rights reserved. BG95_Series_Hardware_Design 1 / 106 LPWA Module Series BG95 Series Hardware Design About the Document Revision History Version Date Author Description 1.0 2019-09-30 Lyndon LIU/

Garey XIE Initial 1.1 2020-02-28 Lyndon LIU/

Garey XIE 1. Updated the GNSS function into an optional feature. 2. Updated the LTE Power Class 5 to 21 dBm. 3. Added the parameters (power supply, operating frequency, output power, etc.) of BG95-M4 and BG95-M5. 4. Updated the transmitting power parameters in Table 5. Updated the pin name of pin 21 from NETLIGHT into 3 and Table 40. NET_STATUS. 6. Updated the block diagram in Figure 1. 7. Updated the power-on timing in Figure 8. 8. Updated the reference design of USB interface in Figure 16. 9. Updated the name of UART interface pins. 10. Added a recommended GNSS UART reference design (Dual-Transistor Solution) in Figure 19. 11. Added the timing of turning on the module with USB_BOOT in Figure 24. 12. Added the truth table of GRFC interfaces in Table 29. 13. Updated the GNSS performance in Table 30. 14. Updated the current consumption parameters in Chapter 6.4. 15. Updated the RF receiving sensitivity in Chapter 6.6. 1. Added BG95-M6. 2. Removed B14 for LTE Cat M1 and B26 for LTE Cat 3. Updated GNSS function into a standard 1.2 2020-07-06 Lyndon LIU/

Ellison WANG NB2. BG95_Series_Hardware_Design 2 / 106 LPWA Module Series BG95 Series Hardware Design configuration. 4. Added the power supply range of BG95-M4, and the typical power supply of BG95-MF. 5. Added the function diagram of BG95-M4, BG95-M5, BG95-M6 and BG95-MF in Chapter 2.3. 6. Enabled pin 56 (ANT_WIFI) for BG95-MF. 7. Updated the GNSS performance in Table 30. 8. Added the current consumption values of BG95-M1, BG95-M2, BG95-M5 and BG95-M6 in Chapter 6.4. 9. Updated the GNSS current consumption values in Chapter 6.4. 10. Added the RF output power values of BG95-M4, BG95-M5 and BG95-M6 in Chapter 6.5. 11. Updated the RF receiving sensitivity of BG95-M3 and added that of BG95-M5 in Chapter 6.6 12. Updated electrostatic discharge characteristics in Chapter 6.7. Chapter 8.1. 13. Updated the description of storage conditions in 14. Updated the recommended reflow soldering thermal profile parameters in Chapter 8.2. BG95_Series_Hardware_Design 3 / 106 LPWA Module Series BG95 Series Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 4 Table Index ................................................................................................................................................... 6 Figure Index ................................................................................................................................................. 8 1 Introduction ........................................................................................................................................ 10 1.1. Safety Information ..................................................................................................................... 13 2 Product Concept ................................................................................................................................ 14 2.1. General Description .................................................................................................................. 14 2.2. Key Features ............................................................................................................................. 17 2.3. Functional Diagram ................................................................................................................... 19 2.4. Evaluation Board ....................................................................................................................... 23 3 Application Interfaces ....................................................................................................................... 24 3.1. Pin Assignment ......................................................................................................................... 24 3.2. Pin Description .......................................................................................................................... 26 3.3. Operating Modes ....................................................................................................................... 34 3.4. Power Saving ............................................................................................................................ 35 3.4.1. Airplane Mode ................................................................................................................ 35 3.4.2. Power Saving Mode (PSM) ............................................................................................ 36 3.4.3. Extended Idle Mode DRX (e-I-DRX) .............................................................................. 37 3.4.4. Sleep Mode .................................................................................................................... 37 3.4.4.1. UART Application ................................................................................................. 37 3.5. Power Supply ............................................................................................................................ 38 3.5.1. Power Supply Pins ......................................................................................................... 38 3.5.2. Decrease Voltage Drop .................................................................................................. 39 3.5.3. Monitor the Power Supply .............................................................................................. 41 3.6. Turn on and off Scenarios ......................................................................................................... 41 Turn on Module Using the PWRKEY Pin ....................................................................... 41 Turn off Module .............................................................................................................. 43 Turn off Module through PWRKEY ...................................................................... 43 Turn off Module through AT Command ............................................................... 43 3.7. Reset the Module ...................................................................................................................... 44 3.8. PON_TRIG Interface ................................................................................................................. 45 3.9.

(U)SIM Interface ........................................................................................................................ 46 3.10. USB Interface ............................................................................................................................ 48 3.11. UART Interfaces ........................................................................................................................ 50 3.12. PCM and I2C Interfaces* .......................................................................................................... 53 3.13. Network Status Indication ......................................................................................................... 54 3.14. STATUS .................................................................................................................................... 55 3.15. Behaviors of MAIN_RI .............................................................................................................. 56 3.16. USB_BOOT Interface ............................................................................................................... 57 3.6.2.1. 3.6.2.2. 3.6.1. 3.6.2. BG95_Series_Hardware_Design 4 / 106 LPWA Module Series BG95 Series Hardware Design 3.17. ADC Interfaces .......................................................................................................................... 58 3.18. GPIO Interfaces ........................................................................................................................ 59 3.19. GRFC Interfaces ....................................................................................................................... 61 4 GNSS Receiver ................................................................................................................................... 62 4.1. General Description .................................................................................................................. 62 4.2. GNSS Performance .................................................................................................................. 62 4.3. Layout Guidelines ..................................................................................................................... 63 5 Antenna Interfaces ............................................................................................................................. 64 5.1. Main Antenna Interface ............................................................................................................. 64 5.1.1. Pin Definition .................................................................................................................. 64 5.1.2. Operating Frequency ..................................................................................................... 64 5.1.3. Reference Design of Main Antenna Interface ................................................................ 65 5.1.4. Reference Design of RF Layout..................................................................................... 66 5.2. GNSS Antenna Interface .......................................................................................................... 68 5.3. Wi-Fi Antenna Interface* ........................................................................................................... 69 5.4. Antenna Installation .................................................................................................................. 70 5.4.1. Antenna Requirements .................................................................................................. 70 5.4.2. Recommended RF Connector for Antenna Installation ................................................. 70 6 Electrical, Reliability and Radio Characteristics ............................................................................ 73 6.1. Absolute Maximum Ratings ...................................................................................................... 73 6.2. Power Supply Ratings ............................................................................................................... 73 6.3. Operating and Storage Temperatures ...................................................................................... 74 6.4. Current Consumption ................................................................................................................ 74 6.5. RF Output Power ...................................................................................................................... 85 6.6. RF Receiving Sensitivity ........................................................................................................... 86 6.7. Electrostatic Discharge ............................................................................................................. 90 7 Mechanical Dimensions .................................................................................................................... 92 7.1. Top and Side Dimensions ......................................................................................................... 92 7.2. Recommended Footprint .......................................................................................................... 94 7.3. Top and Bottom Views .............................................................................................................. 95 8 Storage, Manufacturing and Packaging .......................................................................................... 96 8.1. Storage ...................................................................................................................................... 96 8.2. Manufacturing and Soldering .................................................................................................... 97 8.3. Packaging ................................................................................................................................. 98 9 Appendix A References ................................................................................................................... 101 10 Appendix B GPRS Coding Schemes ............................................................................................. 104 11 Appendix C GPRS Multi-slot Classes ............................................................................................ 105 12 Appendix D EDGE Modulation and Coding Schemes ................................................................. 107 13 Appendix E Compulsory Certifications ......................................................................................... 108 BG95_Series_Hardware_Design 5 / 106 LPWA Module Series BG95 Series Hardware Design Table Index Table 1: Version Selection for BG95 Series Modules ............................................................................... 14 Table 2: Frequency Bands and GNSS Types of BG95 Series Modules ................................................... 14 Table 3: Key Features of BG95 Series Modules ....................................................................................... 17 Table 4: Definition of I/O Parameters ......................................................................................................... 26 Table 5: Pin Description ............................................................................................................................. 27 Table 6: Overview of BG95 Operating Modes ........................................................................................... 35 Table 7: VBAT and GND Pins .................................................................................................................... 39 Table 8: Pin Definition of PWRKEY ........................................................................................................... 41 Table 9: Pin Definition of RESET_N .......................................................................................................... 44 Table 10: Pin Definition of PON_TRIG Interface ....................................................................................... 45 Table 11: Pin Definition of (U)SIM Interface .............................................................................................. 46 Table 12: Pin Definition of USB Interface .................................................................................................. 48 Table 13: Pin Definition of Main UART Interface ....................................................................................... 50 Table 14: Pin Definition of Debug UART Interface .................................................................................... 51 Table 15: Pin Definition of GNSS UART Interface..................................................................................... 51 Table 16: Logic Levels of Digital I/O .......................................................................................................... 51 Table 17: Pin Definition of PCM and I2C Interfaces .................................................................................. 54 Table 18: Pin Definition of NET_STATUS ................................................................................................. 55 Table 19: Working State of NET_STATUS ................................................................................................ 55 Table 20: Pin Definition of STATUS ........................................................................................................... 56 Table 21: Default Behaviors of MAIN_RI Pin ............................................................................................. 56 Table 22: Pin Definition of USB_BOOT Interface ...................................................................................... 57 Table 23: Pin Definition of ADC Interface .................................................................................................. 59 Table 24: Characteristics of ADC Interfaces .............................................................................................. 59 Table 25: Pin Definition of GPIO Interfaces ............................................................................................... 60 Table 26: Logic Levels of GPIO Interfaces ................................................................................................ 60 Table 27: Pin Definition of GRFC Interfaces .............................................................................................. 61 Table 28: Logic Levels of GRFC Interfaces ............................................................................................... 61 Table 29: Truth Table of GRFC Interfaces................................................................................................. 61 Table 30: GNSS Performance ................................................................................................................... 62 Table 31: Pin Definition of Main Antenna Interface ................................................................................... 64 Table 32: Operating Frequency of BG95 Series Module ........................................................................... 64 Table 33: Pin Definition of GNSS Antenna Interface ................................................................................. 68 Table 34: GNSS Frequency ....................................................................................................................... 68 Table 35: Pin Definition of Wi-Fi Antenna Interface ................................................................................... 69 Table 36: Antenna Requirements .............................................................................................................. 70 Table 37: Absolute Maximum Ratings ....................................................................................................... 73 Table 38: Power Supply Ratings ................................................................................................................ 73 Table 39: Operating and Storage Temperatures ....................................................................................... 74 Table 40: BG95-M1 Current Consumption (3.3 V Power Supply, Room Temperature) ........................... 75 Table 41: BG95-M2 Current Consumption (3.3 V Power Supply, Room Temperature) ........................... 76 BG95_Series_Hardware_Design 6 / 106 LPWA Module Series BG95 Series Hardware Design Table 42: BG95-M3 Current Consumption (3.8 V Power Supply, Room Temperature) ........................... 78 Table 43: BG95-M5 Current Consumption (3.8 V Power Supply, Room Temperature) ........................... 80 Table 44: BG95-M6 Current Consumption (3.8 V Power Supply, Room Temperature) ........................... 82 Table 45: GNSS Current Consumption of BG95-M1/-M2 (3.3 V Power Supply, Room Temperature) .... 84 Table 46: GNSS Current Consumption of BG95-M3 (3.8 V Power Supply, Room Temperature) ............ 84 Table 47: GNSS Current Consumption of BG95-M5/-M6 (3.8 V Power Supply, Room Temperature) .... 85 Table 48: Conducted RF Output Power of BG95-M1/-M2/-M3/-N1/-MF ................................................... 85 Table 49: Conducted RF Output Power of BG95-M4 ................................................................................ 85 Table 50: Conducted RF Output Power of BG95-M5/-M6 ......................................................................... 86 Table 51: Conducted RF Receiving Sensitivity of BG95-M1 ..................................................................... 86 Table 52: Conducted RF Receiving Sensitivity of BG95-M2 ..................................................................... 87 Table 53: Conducted RF Receiving Sensitivity of BG95-M3 ..................................................................... 88 Table 54: Conducted RF Receiving Sensitivity of BG95-M5 ..................................................................... 89 Table 55: Electrostatic Discharge Characteristics (25 C, 45 % Relative Humidity) ................................. 91 Table 56: Recommended Thermal Profile Parameters ............................................................................. 98 Table 57: Packaging Specifications of BG95 ........................................................................................... 100 Table 58: Related Documents .................................................................................................................. 101 Table 59: Terms and Abbreviations ......................................................................................................... 101 Table 60: Description of Different Coding Schemes ................................................................................ 104 Table 61: GPRS Multi-slot Classes .......................................................................................................... 105 Table 62: EDGE Modulation and Coding Schemes................................................................................. 107 BG95_Series_Hardware_Design 7 / 106 LPWA Module Series BG95 Series Hardware Design Figure Index Figure 1: Functional Diagram of BG95-M3 ................................................................................................ 20 Figure 2: Pin Assignment (Top View) ........................................................................................................ 25 Figure 3: Sleep Mode Application via UART ............................................................................................. 38 Figure 4: Power Supply Limits during Burst Transmission (BG95-M3/-M5) .............................................. 40 Figure 5: Star Structure of the Power Supply ............................................................................................ 40 Figure 6: Turn on the Module Using Driving Circuit ................................................................................... 41 Figure 7: Turn on the Module Using Keystroke ......................................................................................... 42 Figure 8: Power-on Timing ......................................................................................................................... 42 Figure 9: Power-off Timing ......................................................................................................................... 43 Figure 10: Reset Timing ............................................................................................................................. 44 Figure 11: Reference Circuit of RESET_N by Using Driving Circuit ......................................................... 44 Figure 12: Reference Circuit of RESET_N by Using Button...................................................................... 45 Figure 13: Reference Circuit of PON_TRIG .............................................................................................. 46 Figure 14: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector ......................... 47 Figure 15: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector ........................... 47 Figure 16: Reference Design of USB Interface ......................................................................................... 49 Figure 17: Main UART Reference Design (Translator Chip) ..................................................................... 52 Figure 18: Main UART Reference Design (Transistor Circuit) .................................................................. 52 Figure 19: Reference Circuit with Dual-Transistor Circuit (Recommended for GNSS UART) .................. 53 Figure 20: Reference Circuit of PCM Application with Audio Codec ......................................................... 54 Figure 21: Reference Circuit of the Network Status Indicator ................................................................... 55 Figure 22: Reference Design of STATUS .................................................................................................. 56 Figure 23: Reference Design of USB_BOOT Interface ............................................................................. 57 Figure 24: Timing of Turning on Module with USB_BOOT ........................................................................ 58 Figure 25: Reference Design of Main Antenna Interface .......................................................................... 66 Figure 26: Microstrip Design on a 2-layer PCB ......................................................................................... 66 Figure 27: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 67 Figure 28: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 67 Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 67 Figure 30: Reference Circuit of GNSS Antenna Interface ......................................................................... 69 Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) ............................................................ 71 Figure 32: Mechanicals of U.FL-LP Connectors ........................................................................................ 71 Figure 33: Space Factor of Mated Connector (Unit: mm) .......................................................................... 72 Figure 34: Module Top and Side Dimensions ............................................................................................ 92 Figure 35: Module Bottom Dimensions (Bottom View) .............................................................................. 93 Figure 36: Recommended Footprint (Top View) ........................................................................................ 94 Figure 37: Top View of the Module ............................................................................................................ 95 Figure 38: Bottom View of the Module ....................................................................................................... 95 Figure 39: Recommended Reflow Soldering Thermal Profile ................................................................... 97 Figure 40: Tape Dimensions ...................................................................................................................... 99 Figure 41: Reel Dimensions ....................................................................................................................... 99 BG95_Series_Hardware_Design 8 / 106 LPWA Module Series BG95 Series Hardware Design Figure 42: JATE/TELEC Certification ID of BG95-M5 ............................................................................. 108 BG95_Series_Hardware_Design 9 / 106 LPWA Module Series BG95 Series Hardware Design 1 Introduction This document defines BG95 series module and describes its air interface and hardware interfaces which are connected with your applications. This document helps you quickly understand the interface specifications, electrical and mechanical details, as well as other related information of BG95 series module. To facilitate application designs, it also includes some reference designs for your reference. The document, coupled with application notes and user guides, makes it easy to design and set up mobile applications with BG95 series module. FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met:

1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time-

averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3.A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR202005BG95M5. 4.To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

GSM850 :8.571dBi GSM1900 :10.03dBi Catm LTE Band2/25:8.000dBi Catm LTE Band4/66:5.000dBi Catm LTE Band5/26:9.541dBi Catm LTE Band12:8.798 dBi Catm LTE Band13:9.214 dBi Catm LTE Band85:8.798 dBi NB LTE Band2/25:8.000 dBi NB LTE Band4/66:5.000dBi NB LTE Band5:9.541 dBi NB LTE Band12:8.798dBi NB LTE Band13:9.214dBi NB LTE Band71:8.687dBi NB LTE Band85:8.798 dBi BG95_Series_Hardware_Design 10 / 106 LPWA Module Series BG95 Series Hardware Design 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:

A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification (labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible;

then an additional permanent label referring to the enclosed module:Contains Transmitter Module FCC ID: XMR202005BG95M5 or Contains FCC ID: XMR202005BG95M5 must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. IC Statement IRSS-GEN

"This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device." or "Le prsent appareil est conforme aux CNR dIndustrie Canada applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes :

1) lappareil ne doit pas produire de brouillage; 2) lutilisateur de lappareil doit accepter tout brouillage BG95_Series_Hardware_Design 11 / 106 LPWA Module Series BG95 Series Hardware Design radiolectrique subi, mme si le brouillage est susceptible den compromettre le fonctionnement."

Dclaration sur l'exposition aux rayonnements RF The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. L'autre utilis pour l'metteur doit tre install pour fournir une distance de sparation d'au moins 20 cm de toutes les personnes et ne doit pas tre colocalis ou fonctionner conjointement avec une autre antenne ou un autre metteur. To comply with IC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

GSM850 :8.571dBi GSM1900 :10.03dBi Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:5.000dBi Catm LTE Band5/26:9.541dBi Catm LTE Band12:8.798 dBi Catm LTE Band13:9.214 dBi Catm LTE Band85:8.798 dBi NB LTE Band2/25:8.000 dBi NB LTE Band4/66:5.000dBi NB LTE Band5:9.541 dBi NB LTE Band12:8.798dBi NB LTE Band13:9.214dBi NB LTE Band71:8.687dBi NB LTE Band85:8.798 dBi The host product shall be properly labelled to identify the modules within the host product. The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host product; otherwise, the host product must be labeled to display the Innovation, Science and Economic Development Canada certification number for the module, preceded by the word Contains or similar wording expressing the same meaning, as follows:

Contains IC: 10224A-2020BG95M5 or where: 10224A-2020BG95M5 is the modules certification number. Le produit hte doit tre correctement tiquet pour identifier les modules dans le produit hte. L'tiquette de certification d'Innovation, Sciences et Dveloppement conomique Canada d'un module doit tre clairement visible en tout temps lorsqu'il est installdans le produit hte; sinon, le produit hte doit porter une tiquette indiquant le numro de certification d'Innovation, Sciences et Dveloppement conomique Canada pour le module, prcd du mot Contient ou d'un libell semblable exprimant la mme signification, comme suit:"Contient IC: 10224A-2020BG95M5 " ou "o: 10224A-2020BG95M5 est le numro de certification du module. BG95_Series_Hardware_Design 12 / 106 LPWA Module Series BG95 Series Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating BG95 series module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for any users failure to observe these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, use emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as mobile phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. BG95_Series_Hardware_Design 13 / 106 LPWA Module Series BG95 Series Hardware Design 2 Product Concept 2.1. General Description BG95 is a series of embedded IoT (LTE Cat M1, LTE Cat NB2 and EGPRS) wireless communication modules. It provides data connectivity on LTE-FDD and GPRS/EGPRS networks, and supports half-duplex operation in LTE network. It also provides GNSS and voice* 1) functionality to meet your specific application demands. Table 1: Version Selection for BG95 Series Modules Model Cat M1 Cat NB2 2) GSM GNSS Wi-Fi Positioning BG95-M1 BG95-M2 BG95-M3 BG95-N1 BG95-M4 BG95-M5 BG95-M6 BG95-MF

Table 2: Frequency Bands and GNSS Types of BG95 Series Modules Module Supported Bands LTE Bands Power Class GNSS BG95-M1 Power Class 5 (21 dBm) Cat M1 Only:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/B28/

GPS, GLONASS, BeiDou, Galileo, QZSS BG95_Series_Hardware_Design 14 / 106 LPWA Module Series BG95 Series Hardware Design BG95-M2 Power Class 5 (21 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS B66/B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/B28/

B66/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/

B28/B66/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 EGPRS:

850/900/1800/1900 MHz Cat NB2 Only:

LTE FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/B28/

B31/B66/B72/B73/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B31/B66/

B72/B73/B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/B28/

B66/B85 BG95-M3 Power Class 5 (21 dBm) BG95-N1 Power Class 5 (21 dBm) BG95-M4 Power Class 2* (26 dBm)

@ B31/B72/B73 Power Class 3 (23 dBm)

@ B31/B72/B73 Power Class 5 (21 dBm)

@ other LTE bands BG95-M5 Power Class 3 (23 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS GPS, GLONASS, BeiDou, Galileo, QZSS GPS, GLONASS, BeiDou, Galileo, QZSS GPS, GLONASS, BeiDou, Galileo, QZSS BG95_Series_Hardware_Design 15 / 106 LPWA Module Series BG95 Series Hardware Design Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 EGPRS:

850/900/1800/1900 MHz Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/B28/

B66/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 Cat M1:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B26/B27/

B28/B66/B85 Cat NB2:

LTE-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/

B18/B19/B20/B25/B28/B66/B71/

B85 Wi-Fi (For Positioning Only):

2.4 GHz BG95-M6 Power Class 3 (23 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS BG95-MF Power Class 5 (21 dBm) GPS, GLONASS, BeiDou, Galileo, QZSS NOTES 1. 1) BG95 series modules support VoLTE (Voice over LTE) under LTE Cat M1. Additionally, BG95-M3 and BG95-M5 support CS voice under GSM. 2) LTE Cat NB2 is backward compatible with LTE Cat NB1. 2. means supported. 3. 4.

* means under development. 5. B18/B19 not be used in USA. With a compact profile of 23.6 mm 19.9 mm 2.2 mm, BG95 can meet almost all requirements for M2M applications such as smart metering, tracking system, security, wireless POS, etc. BG95 is a series of SMD type modules that can be embedded into applications through the 102 LGA pins. BG95_Series_Hardware_Design 16 / 106 LPWA Module Series BG95 Series Hardware Design It supports internet service protocols like TCP, UDP and PPP. Based on extended AT commands developed by Quectel, you can use these internet service protocols easily. 2.2. Key Features The following table describes the detailed features of BG95 series modules. Table 3: Key Features of BG95 Series Modules Features Details Power Supply Transmitting Power BG95-M1/-M2/-N1:

Supply voltage 1): 2.64.8 V Typical supply voltage: 3.3 V BG95-M3/-M5/-M6:

Supply voltage: 3.34.3 V Typical supply voltage: 3.8 V BG95-M4:

Supply voltage: 3.24.2 V Typical supply voltage: 3.8 V BG95-MF:

Typical supply voltage: 3.8 V LTE-FDD bands:

Class 5 (21 dBm +1.7/-3 dB) Class 3 (23 dBm 2 dB) Class 2* (26 dBm 2 dB) GSM bands:

Class 4 (33 dBm 2 dB) for GSM850 Class 4 (33 dBm 2 dB) for EGSM900 Class 1 (30 dBm 2 dB) for DCS1800 Class 1 (30 dBm 2 dB) for PCS1900 Class E2 (27 dBm 3 dB) for GSM850 8-PSK Class E2 (27 dBm 3 dB) for EGSM900 8-PSK Class E2 (26 dBm 3 dB) for DCS1800 8-PSK Class E2 (26 dBm 3 dB) for PCS1900 8-PSK See Table 2 for the LTE bands power class level of each specific model. LTE Features Support 3GPP Rel. 14 Support LTE Cat M1 and LTE Cat NB2 Support 1.4 MHz RF bandwidth for LTE Cat M1 Support 200 KHz RF bandwidth for LTE Cat NB2 Cat M1: Max. 588 kbps (DL)/1119 kbps (UL) BG95_Series_Hardware_Design 17 / 106 LPWA Module Series BG95 Series Hardware Design Cat NB2: Max. 127 kbps (DL)/158.5 kbps (UL) GPRS:

Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107 kbps (DL), Max. 85.6 kbps (UL) EDGE:

Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: MCS 1-9 Uplink coding schemes: MCS 1-9 Max. 296 kbps (DL), Max. 236.8 kbps (UL) Support PPP/TCP/UDP/SSL/TLS/FTP(S)/HTTP(S)/NITZ/PING/MQTT/

Internet Protocol Features CoAP protocols Support PAP (Password Authentication Protocol) and CHAP (Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: ME by default

(U)SIM Interface Support 1.8 V USIM/SIM card only Support one digital audio interface: PCM interface for VoLTE or GSM CS voice only Compliant with USB 2.0 specification (slave only) Support operations at low-speed and full-speed Used for AT command communication, data transmission, GNSS NMEA output, software debugging and firmware upgrade Support USB serial drivers for Windows 7/8/8.1/10, Linux 2.65.4, Android 4.x/5.x/6.x/7.x/8.x/9.x Main UART:

Used for data transmission and AT command communication 115200 bps baud rate by default The default frame format is 8N1 (8 data bits, no parity, 1 stop bit) Support RTS and CTS hardware flow control Debug UART:

Used for software debugging and log output Support 115200 bps baud rate GNSS UART:

Used for GNSS data and NMEA sentences output 115200 bps baud rate by default GSM Features SMS PCM Interface USB Interface UART Interfaces BG95_Series_Hardware_Design 18 / 106 LPWA Module Series BG95 Series Hardware Design GNSS AT Commands Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS) 1 Hz data update rate by default 3GPP TS 27.007 and 3GPP TS 27.005 AT commands, as well as Quectel enhanced AT commands Network Indication One NET_STATUS pin for network connectivity status indication Antenna Interfaces Main antenna (ANT_MAIN) and GNSS antenna (ANT_GNSS) interfaces Physical Characteristics Dimensions: (23.6 0.15) mm (19.9 0.15) mm (2.2 0.20) mm Weight: approx. 2.15 g Temperature Range Operating temperature range: -35 C to +75 C 2) Extended temperature range: -40 C to +85 C 3) Storage temperature range: -40 C to +90 C Firmware Upgrade USB interface, DFOTA*

RoHS All hardware components are fully compliant with EU RoHS directive NOTES 1. 1) For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. 2. 2) Within operating temperature range, the module meets 3GPP specifications. 3. 3) Within extended temperature range, the module remains the ability to establish and maintain functions such as SMS and data transmission, without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature levels, the module meets 3GPP specifications again.

* means under development. 4. 2.3. Functional Diagram The following figures show the block diagram of BG95 series modules and the major functional parts as listed below. Power management Baseband Radio frequency Peripheral interfaces BG95_Series_Hardware_Design 19 / 106 LPWA Module Series BG95 Series Hardware Design Figure 1: Functional Diagram of BG95-M3 Figure 2: Functional Diagram of BG95-M1/-M2/-N1 BG95_Series_Hardware_Design 20 / 106 LPWA Module Series BG95 Series Hardware Design MAIN_ANT ANT_GNSS Coupler Switch B31PA Tx LPF TRx LTE LB TX LPF SAW LNA SAW GNSS PMIC Control Switch/PA/Transceiver IQ Control Baseband 19.2M XO eSIM VBAT_RF VBAT_BB PWRKEY RESET_N PON_TRIG ADC1 ADC0 VDD_EXT USB

(U)SIM PCM I2C UARTs GPIOs STATUS NET_STATUS Figure 3: Functional Diagram of BG95-M4 ANT_MAIN ANT_GNSS VBAT_RF TRX 2GPA+ASM 4G PA GSM/LTE Tx Rx SAW LNA SAW GNSS Switch/PA/Transceiver LPF GSM RX VBAT_BB PWRKEY RESET_N PON_TRIG ADC1 ADC0 IQ Control PMIC Control Baseband 19.2M XO VDD_EXT USB

(U)SIM PCM I2C UARTs GPIOs STATUS NET_STATUS Figure 4: Functional Diagram of BG95-M5 BG95_Series_Hardware_Design 21 / 106 LPWA Module Series BG95 Series Hardware Design ANT_MAIN ANT_GNSS Coupler 4G PA LTE Tx LTE Rx SAW LNA SAW GNSS Switch/PA/Transceiver IQ Control Baseband PMIC Control 19.2M XO VDD_EXT USB

(U)SIM PCM I2C UARTs GPIOs STATUS NET_STATUS Figure 5: Functional Diagram of BG95-M6 ANT_MAIN ANT_GNSS ANT_WIFI Coupler LTE Tx LTE Rx LPF LTE LB Tx Switch/PA/Transceiver SAW LNA SAW GNSS LDO 3.3V WIFI 26M XO UART IQ Control PMIC Control Baseband 19.2M XO eSIM VDD_EXT USB

(U)SIM PCM I2C UARTs GPIOs STATUS NET_STATUS Figure 6: Functional Diagram of BG95-MF VBAT_RF VBAT_BB PWRKEY RESET_N PON_TRIG ADC1 ADC0 VBAT_RF VBAT_BB PWRKEY RESET_N PON_TRIG ADC1 ADC0 BG95_Series_Hardware_Design 22 / 106 LPWA Module Series BG95 Series Hardware Design NOTES 1. eSIM function is optional. If eSIM is selected, then any external (U)SIM cannot be used. BG95-M5 and BG95-M6 do not support eSIM. 2. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, never pull down PWRKEY to GND permanently. 3. RESET_N connects directly to PWRKEY inside the module. 4. Do not use ADC0 and ADC1 simultaneously, as ADC1 connects directly to ADC0 inside the module. BG95 supports use of only one ADC interface at a time: either ADC0 or ADC1. 2.4. Evaluation Board In order to facilitate application development with BG95 conveniently, Quectel supplies the evaluation board (EVB), USB to RS-232 converter cable, USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, see document [1]. BG95_Series_Hardware_Design 23 / 106 LPWA Module Series BG95 Series Hardware Design 3 Application Interfaces

(U)SIM interface BG95 series is equipped with 102 LGA pads for connection to various cellular application platforms. The subsequent chapters provide detailed descriptions of the following interfaces:

Power supply PON_TRIG Interface USB interface UART interfaces PCM and I2C interfaces*

Status indication interfaces USB_BOOT interface ADC interfaces GPIO interfaces GRFC interfaces NOTE

* means under development. 3.1. Pin Assignment The following figure shows the pin assignment of BG95 series module. BG95_Series_Hardware_Design 24 / 106 LPWA Module Series BG95 Series Hardware Design Figure 2: Pin Assignment (Top View) NOTES 1. 1) Only BG95-MF supports ANT_WIFI (pin 56). BG95_Series_Hardware_Design 25 / 106 LPWA Module Series BG95 Series Hardware Design 2) BG95-MF does not support GPIO3 and GPIO4 interfaces (pin 64 and pin 65). 3) BG95-M4 does not support GRFC interfaces (pin 83 and pin 84). 2. 3. 4. Do not use ADC0 and ADC1 simultaneously, as ADC1 connects directly to ADC0 inside the module. BG95 series module supports use of only one ADC interface at a time: either ADC0 or ADC1. 5. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, never pull down PWRKEY to GND permanently. 6. RESET_N connects directly to PWRKEY inside the module. 7. GNSS_TXD (pin 27) and GRFC2 (pin 84) are BOOT_CONFIG pins. Never pull them up before startup, otherwise the module cannot power on normally. 8. Keep all RESERVED pins and unused pins unconnected. 9. Connect GND pins to the ground in the design. 3.2. Pin Description The following tables show the pin definition and description of BG95 series module. Table 4: Definition of I/O Parameters Type AI AO DI DO IO PI PO Description Analog Input Analog Output Digital Input Digital Output Bidirectional Power Input Power Output BG95_Series_Hardware_Design 26 / 106 LPWA Module Series BG95 Series Hardware Design Table 5: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT_BB 32, 33 PI See NOTE 1 Power supply for the modules baseband part VBAT_RF 52, 53 PI See NOTE 1 Power supply for the modules RF part VDD_EXT 29 PO 1.8 V output power supply for external circuits Vnorm = 1.8 V IOmax = 50 mA If unused, keep this pin open GND Ground 3, 31, 48, 50, 54, 55, BG95_Series_Hardware_Design 27 / 106 BG95-M1/-M2/-N1:

Vmax = 4.8 V Vmin = 2.6 V Vnorm = 3.3 V BG95-M3/-M5/-M6 Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V BG95-M4:

Vmax = 4.2 V Vmin = 3.2 V Vnorm = 3.8 V BG95-MF:

Vnorm = 3.8 V BG95-M1/-M2/-N1:

Vmax = 4.8 V Vmin = 2.6 V Vnorm = 3.3 V BG95-M3/-M5/-M6:

Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V BG95-M4:

Vmax = 4.2 V Vmin = 3.2 V Vnorm = 3.8 V BG95-MF:

Vnorm = 3.8 V LPWA Module Series BG95 Series Hardware Design 58, 59, 61, 62, 6774, 7982, 8991, 100102 Turn on/off Reset Pin Name Pin No. I/O Description DC Characteristics Comment PWRKEY 15 DI Turns on/off the module Vnorm = 1.5 V VILmax = 0.45 V Never pull down PWRKEY to GND permanently. Pin Name Pin No. I/O Description DC Characteristics Comment RESET_N 17 DI Resets the module Vnorm = 1.5 V VILmax = 0.45 V Status Indication Pin Name Pin No. I/O Description DC Characteristics Comment PSM_IND 1 DO STATUS 20 DO NET_STATUS 21 DO Power saving mode indication VOHmin = 1.35 V VOLmax = 0.45 V Module operation status indication Module network activity status indication VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment AI IO IO USB connection detection USB differential data (+) USB differential data (-) Vnorm = 5.0 V Typical 5.0 V Compliant with USB 2.0 standard specification. Require differential impedance of 90 . USB Interface USB_VBUS USB_DP 8 9 USB_DM 10

(U)SIM Interface Pin Name Pin No. I/O Description DC Characteristics Comment BG95_Series_Hardware_Design 28 / 106 LPWA Module Series BG95 Series Hardware Design 1.8 V power domain. If unused, keep this pin open. Only 1.8 V (U)SIM card is supported.

(U)SIM card hot-plug detection

(U)SIM card power supply

(U)SIM card reset

(U)SIM card clock

(U)SIM card ground USIM_DET 42 DI USIM_VDD 43 USIM_RST 44 PO DO USIM_DATA 45 IO

(U)SIM card data USIM_CLK 46 DO USIM_GND 47 Main UART Interface MAIN_DTR 30 DI Main UART data terminal ready MAIN_RXD 34 DI Main UART receive MAIN_TXD 35 DO Main UART transmit VOLmax = 0.45 V VOHmin = 1.35 V MAIN_CTS 36 DO Main UART clear to send VOLmax = 0.45 V VOHmin = 1.35 V MAIN_RTS 37 DI Main UART request to send MAIN_DCD 38 DO Main UART data carrier detect VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V Vmax = 1.9 V Vmin = 1.7 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment BG95_Series_Hardware_Design 29 / 106 LPWA Module Series BG95 Series Hardware Design MAIN_RI 39 DO Main UART ring indication VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. If unused, keep this pin open. Debug UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment DBG_RXD 22 DI Debug UART receive VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V DBG_TXD 23 DO Debug UART transmit VOLmax = 0.45 V VOHmin = 1.35 V GNSS UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment Pin Name Pin No. I/O Description DC Characteristics Comment GNSS_TXD 27 DO GNSS UART transmit VOLmax = 0.45 V VOHmin = 1.35 V GNSS_RXD 28 DI GNSS UART receive PCM Interface*

VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V PCM_CLK 4 DO PCM clock VOLmax = 0.45 V VOHmin = 1.35 V PCM_SYNC 5 DO PCM data frame sync VOLmax = 0.45 V VOHmin = 1.35 V PCM_DIN 6 DI PCM data input PCM_DOUT 7 DO PCM data output VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BG95_Series_Hardware_Design 30 / 106 LPWA Module Series BG95 Series Hardware Design I2C Interface*

Pin Name Pin No. I/O Description DC Characteristics Comment I2C_SCL 40 OD I2C_SDA 41 OD I2C serial clock

(for external codec) I2C serial data

(for external codec) Antenna Interfaces ANT_MAIN 60 ANT_GNSS 49 IO AI Main antenna interface GNSS antenna interface ANT_WIFI* 1) 56 AI Wi-Fi antenna interface Pin Name Pin No. I/O Description DC Characteristics Comment GPIO Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment GPIO1 25 IO General-purpose input/output GPIO2 26 IO General-purpose input/output VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V BG95_Series_Hardware_Design 31 / 106 External pull-up resistor is required. 1.8 V only. If unused, keep this pin open. External pull-up resistor is required. 1.8 V only. If unused, keep this pin open. 50 impedance 50 impedance. If unused, keep this pin open. 50 impedance. If unused, keep this pin open. Only BG95-MF supports the interface. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. LPWA Module Series BG95 Series Hardware Design GPIO3 2) 64 IO General-purpose input/output GPIO4 2) 65 IO General-purpose input/output GPIO5 66 IO General-purpose input/output GPIO6 85 IO General-purpose input/output GPIO7 86 IO General-purpose input/output GPIO8 87 IO General-purpose input/output GPIO9 88 IO General-purpose input/output ADC Interfaces VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BG95_Series_Hardware_Design 32 / 106 LPWA Module Series BG95 Series Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment ADC0 ADC1 24 2 Other Interface Pins AI AI General-purpose ADC interface Voltage range:

0.11.8 V General-purpose ADC interface Voltage range:

0.11.8 V Do not use ADC0 and ADC1 simultaneously. If unused, keep these pins open. Pin Name Pin No. I/O Description DC Characteristics Comment W_DISABLE#* 18 DI Airplane mode control VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V AP_READY*

19 DI USB_BOOT 75 DI Application processor sleep state detection Force the module into emergency download mode VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V PON_TRIG 96 DI Wake up the module from PSM GRFC Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment GRFC1 3) 83 DO Generic RF controller VOLmax = 0.45 V VOHmin = 1.35 V GRFC2 3) 84 DO Generic RF controller VOLmax = 0.45 V VOHmin = 1.35 V BG95_Series_Hardware_Design 33 / 106 1.8 V power domain. Pulled up by default. When it is in low voltage level, the module can enter airplane mode. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. Rising-edge triggered. Pulled-down by default. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. LPWA Module Series BG95 Series Hardware Design If unused, keep this pin open. RESERVED Pins Pin Name Pin No. I/O Description DC Characteristics Comment RESERVED Reserved Keep these pins open. 1114, 16, 51, 57, 63, 7678, 9295, 9799 NOTES 1. 1) Only BG95-MF supports ANT_WIFI (pin 56). 2. 2) BG95-MF does not support GPIO3 and GPIO4 interfaces (pin 64 and pin 65). 3. 3) BG95-M4 does not support GRFC interfaces (pin 83 and pin 84). 4. For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. 5. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, never pull down PWRKEY to GND permanently. 6. RESET_N connects directly to PWRKEY inside the module. 7. Do not use ADC0 and ADC1 simultaneously, as ADC1 connects directly to ADC0 inside the module. BG95 series module supports use of only one ADC interface at a time: either ADC0 or ADC1. 8. When PSM is enabled, the function of PSM_IND pin will be activated after the module is rebooted. When PSM_IND is in high voltage level, the module is in normal operation state, when it is in low voltage level, the module is in PSM. 9. GNSS_TXD (pin 27) and GRFC2 (pin 84) are BOOT_CONFIG pins. Never pull them up before startup, otherwise the module cannot power on normally. 10. Keep all RESERVED pins and unused pins open. 11. * means under development. 3.3. Operating Modes The table below briefly summarizes the various operating modes of BG95 series module. BG95_Series_Hardware_Design 34 / 106 LPWA Module Series BG95 Series Hardware Design Table 6: Overview of BG95 Operating Modes Mode Details Normal Operation Extended Idle Mode DRX

(e-I-DRX) Airplane Mode Minimum Functionality Mode Sleep Mode Connected Network has been connected. In this mode, the power consumption may vary with the network setting and data transfer rate. Idle Software is active. The module remains registered on network, and it is ready to send and receive data. BG95 module and the network may negotiate over non-access stratum signaling the use of e-I-DRX for reducing power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. AT+CFUN=4 or W_DISABLE#* pin can set the module into airplane mode. In this case, RF function is invalid. AT+CFUN=0 can set the module into a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card are invalid. In this mode, the current consumption of the module is reduced to a lower level. During this mode, the module can still receive paging message, SMS and TCP/UDP data from the network normally. Power OFF Mode In this mode, the power management unit shuts down the power supply. The software is not active. The serial interfaces are not accessible. But the operating voltage

(connected to VBAT_RF and VBAT_BB) remains applied. Power Saving Mode

(PSM) The module may enter PSM to reduce its power consumption. PSM is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. 1. During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB interface increases power consumption.

* means under development. NOTES 2. 3.4. Power Saving 3.4.1. Airplane Mode When the module enters airplane mode, the RF function does not work, and all AT commands correlative with RF function are inaccessible. This mode can be set via the following ways. BG95_Series_Hardware_Design 35 / 106 LPWA Module Series BG95 Series Hardware Design Hardware:

W_DISABLE#* is pulled up by default. Driving it low makes the module enter airplane mode. Software:

AT+CFUN=<fun> provides choice of the functionality level, through setting <fun> into 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode. RF function is disabled. NOTES 1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by AT+QCFG="airplanecontrol" command which is still under development. See document [2] for the details about the command. 2. The execution of AT+CFUN command will not affect GNSS function. 3.

* means under development. 3.4.2. Power Saving Mode (PSM) BG95 module can enter PSM to reduce its power consumption. The mode is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. So BG95 in PSM cannot immediately respond users requests. When the module wants to use the PSM it shall request an Active Time value during every Attach and TAU procedures. If the network supports PSM and accepts that the module uses PSM, it will confirm the usage of PSM by allocating an Active Time value to the module. If the module wants to change the Active Time value, e.g. when the conditions are changed in the module, the module consequently requests the value it wants in the TAU procedure. If PSM is supported by the network, then it can be enabled via AT+CPSMS command. Either of the following methods can wake up the module from PSM:

Wake up the module from PSM through a rising edge on PON_TRIG. (Recommended) Wake up the module by driving PWRKEY low. The module is woken up automatically when the T3412_Ext timer expires. NOTE See document [2] for details about AT+CPSMS command. BG95_Series_Hardware_Design 36 / 106 LPWA Module Series BG95 Series Hardware Design 3.4.3. Extended Idle Mode DRX (e-I-DRX) The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX for reducing its power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or data transfers, and in particular they need to consider the delay tolerance of mobile terminated data. In order to negotiate the use of e-I-DRX, the UE requests e-I-DRX parameters during attach procedure and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX. In case the EPC accepts e-I-DRX, the EPC based on operator policies and, if available, the e-I-DRX cycle length value in the subscription data from the HSS, may also provide different values of the e-I-DRX parameters than what was requested by the UE. If the EPC accepts the use of e-I-DRX, the UE applies e-I-DRX based on the received e-I-DRX parameters. If the UE does not receive e-I-DRX parameters in the relevant accept message because the EPC rejected its request or because the request was received by EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception. If e-I-DRX is supported by the network, then it can be enabled by AT+CEDRXS=1 command. See document [2] for details about AT+CEDRXS command. NOTE 3.4.4. Sleep Mode 3.4.4.1. UART Application BG95 is able to reduce its current consumption to a lower value during the sleep mode. The following sub-chapters describe the power saving procedure of BG95 series module. If the host communicates with the module via UART interface, the following preconditions can let the module enter sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Drive MAIN_DTR pin high. The following figure shows the connection between the module and the host. BG95_Series_Hardware_Design 37 / 106 LPWA Module Series BG95 Series Hardware Design Figure 3: Sleep Mode Application via UART When the module has URC to report, MAIN_RI signal wakes up the host. See Chapter 3.15 for details about MAIN_RI behavior. Driving MAIN_DTR low wakes up the module. AP_READY* detects the sleep state of the host (can be configured to high level or low level detection). See AT+QCFG="apready" command in document [2] for details. NOTE

* means under development. 3.5. Power Supply 3.5.1. Power Supply Pins BG95 provides the following four VBAT pins for connection with an external power supply. There are two separate voltage domains for VBAT. Two VBAT_RF pins for modules RF part. Two VBAT_BB pins for modules baseband part. The following table shows the details of VBAT pins and ground pins. BG95_Series_Hardware_Design 38 / 106 LPWA Module Series BG95 Series Hardware Design Table 7: VBAT and GND Pins Pin Name Pin No. Description Module Min. Typ. Max. Unit VBAT_RF 52, 53 Power supply for the modules RF part BG95-M3/-M5/-M6 3.3 3.8 4.3 BG95-M4 3.2 3.8 4.2 BG95-M1/-M2/-N1 1) 2.6 3.3 4.8 BG95-MF TBD 3.8 TBD V BG95-M1/-M2/-N1 1) 2.6 3.3 4.8 VBAT_BB 32, 33 Power supply for the modules baseband part BG95-M3/-M5/-M6 3.3 3.8 4.3 BG95-M4 3.2 3.8 4.2 BG95-MF TBD 3.8 TBD V V V V V V V GND Ground

3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 6774, 7982, 8991, 100102 NOTE 1) For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. 3.5.2. Decrease Voltage Drop BG95-M1/-M2/-N1: The power supply range of BG95-M1/-M2/-N1 is 2.64.8 V. For every VBAT transition/re-insertion from 0 V, the minimum power supply voltage should be higher than 2.7 V. After the module starts up normally, the minimum safety voltage is 2.6 V. In order to ensure full-function mode, the minimum power supply voltage should be higher than 2.8 V. Ensure the input voltage never drop below 2.6 V. BG95-M3/-M5/-M6: The power supply range of BG95-M3/-M5/-M6 is from 3.34.3 V. Please assure the input voltage will never drop below 3.3 V. BG95-M4: The power supply range of BG95-M4 is from 3.24.2 V. Ensure the input voltage never BG95_Series_Hardware_Design 39 / 106 LPWA Module Series BG95 Series Hardware Design drop below 3.2 V. BG95-MF: The typical power supply of BG95-MF is 3.8 V. The following figure shows the voltage drop during burst transmission in 2G network of BG95-M3/-M5. The voltage drop is less in LTE Cat M1 and/or LTE Cat NB2 networks. Burst Transmission Burst Transmission VBAT Min.3.3V Drop Ripple Figure 4: Power Supply Limits during Burst Transmission (BG95-M3/-M5) To decrease voltage drop, a bypass capacitor of about 100 F with low ESR should be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing the MLCC array, and place these capacitors close to VBAT pins. The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 0.6 mm, and the width of VBAT_RF trace should be no less than 2 mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to get a stable power source, it is suggested to use a TVS with low leakage current and suitable reverse stand-off voltage, and also it is recommended to place it as close to the VBAT pins as possible. The following figure shows the star structure of the power supply. Figure 5: Star Structure of the Power Supply BG95_Series_Hardware_Design 40 / 106 LPWA Module Series BG95 Series Hardware Design 3.5.3. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, see document

[2]. 3.6. Turn on and off Scenarios 3.6.1. Turn on Module Using the PWRKEY Pin The following table shows the pin definition of PWRKEY. Table 8: Pin Definition of PWRKEY Pin Name Pin No. Description DC Characteristics Comment PWRKEY 15 Turns on/off the module Vnorm = 1.5 V VILmax = 0.45 V The output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. When BG95 is in power off mode, it can be turned on by driving PWRKEY low for 5001000 ms. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. Figure 6: Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. BG95_Series_Hardware_Design 41 / 106 LPWA Module Series BG95 Series Hardware Design Figure 7: Turn on the Module Using Keystroke The power on scenario is illustrated in the following figure. Figure 8: Power-on Timing NOTES 30 ms. 1. Make sure that VBAT is stable before pulling down PWRKEY pin and keep the interval no less than BG95_Series_Hardware_Design 42 / 106 LPWA Module Series BG95 Series Hardware Design 2. PWRKEY output voltage is 1.5 V because of the voltage drop inside the Qualcomm chipset. Due to platform limitations, the chipset has integrated the reset function into PWRKEY. Therefore, never pull down PWRKEY to GND permanently. 3.6.2. Turn off Module Either of the following methods can be used to turn off the module:

Turn off the module through PWRKEY. Turn off the module through AT+QPOWD command. 3.6.2.1. Turn off Module through PWRKEY Driving PWRKEY low for 6501500 ms and then release it, the module will execute power-down procedure. The power-off scenario is illustrated in the following figure. Figure 9: Power-off Timing 3.6.2.2. Turn off Module through AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module via PWRKEY. See document [2] for details about AT+QPOWD command. BG95_Series_Hardware_Design 43 / 106 LPWA Module Series BG95 Series Hardware Design 3.7. Reset the Module RESET_N is used to reset the module. Due to platform limitations, the chipset has integrated the reset function into PWRKEY, and RESET_N connects directly to PWRKEY inside the module. The module can be reset by driving RESET_N low for 23.8 s. Table 9: Pin Definition of RESET_N Pin Name Pin No. Description DC Characteristics Comment RESET_N 17 VILmax = 0.45 V Resets the module Multiplexed from PWRKEY (connected directly to PWRKEY inside the module). The reset scenario is illustrated in the following figure. VBA T 3.8 s 2 s RESET_N VIL 0.45 V Module Status Running Resetting Restart Figure 10: Reset Timing The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N pin. Figure 11: Reference Circuit of RESET_N by Using Driving Circuit BG95_Series_Hardware_Design 44 / 106 LPWA Module Series BG95 Series Hardware Design S2 TVS RESET_N Close to S2 Figure 12: Reference Circuit of RESET_N by Using Button NOTE Please assure that there is no large capacitance on RESET_N pin. 3.8. PON_TRIG Interface BG95 provides one PON_TRIG pin which is used to wake up the module from PSM. When the pin detects a rising edge, the module is woken up from PSM. Table 10: Pin Definition of PON_TRIG Interface Pin Name Pin No. I/O Description Comment PON_TRIG 96 DI Wake up the module from PSM A reference circuit is shown in the following figure. Rising-edge triggered. Pulled-down by default. 1.8 V power domain. BG95_Series_Hardware_Design 45 / 106 LPWA Module Series BG95 Series Hardware Design 10K VDD_1V8 PON_TRIG_EXT 10K 100K 100K PON_TRIG Figure 13: Reference Circuit of PON_TRIG NOTE VDD_1V8 is provided by an external LDO. 3.9. (U)SIM Interface BG95 supports 1.8 V (U)SIM card only. The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Table 11: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment USIM_DET 42 DI

(U)SIM card hot-plug detection 1.8 V power domain. USIM_VDD 43 PO

(U)SIM card power supply Only 1.8 V (U)SIM card is supported. USIM_RST 44 DO

(U)SIM card reset 1.8 V power domain. USIM_DATA 45 IO

(U)SIM card data 1.8 V power domain. USIM_CLK 46 DO

(U)SIM card clock 1.8 V power domain. USIM_GND 47

(U)SIM card ground BG95_Series_Hardware_Design 46 / 106 LPWA Module Series BG95 Series Hardware Design BG95 supports (U)SIM card hot-plug via the USIM_DET pin, and both high and low level detections are supported. The function is disabled by default, and see AT+QSIMDET command in document [2] for more details. The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM card connector. Figure 14: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. USIM_VDD USIM_GND USIM_VDD USIM_RST USIM_CLK USIM_DATA 15K 0R 0R 0R Module 33 pF 33 pF 33 pF 100 nF

(U)SIM Card Connector VCC RST CLK GND VPP IO GND GND Figure 15: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design:

BG95_Series_Hardware_Design 47 / 106 LPWA Module Series BG95 Series Hardware Design Keep the placement of (U)SIM card connector as close to the module as possible. Keep the trace length as less than 200 mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5 mm to maintain the same electric potential. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1 F, and place it as close to (U)SIM card connector as possible. If the system ground plane is complete, USIM_GND can be connected to the system ground directly. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. USIM_RST should also be ground shielded. In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic capacitance not exceeding 15 pF. In order to facilitate debugging, it is recommended to reserve series resistors for the (U)SIM signals of the module. The 33 pF capacitors are used for filtering interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the

(U)SIM card connector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion are applied, and should be placed close to the (U)SIM card connector. NOTES 1. eSIM function is optional. If eSIM is selected, then the external (U)SIM cannot be used simultaneously. 2. BG95-M5 and BG95-M6 do not support eSIM. 3.10. USB Interface BG95 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports operation at low-speed (1.5 Mbps) and full-speed (12 Mbps) modes. The USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. The following table shows the pin definition of USB interface. Table 12: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment USB_VBUS AI USB connection detection Typical 5.0 V 8 9 USB_DP IO USB differential data (+) USB_DM 10 IO USB differential data (-) Require differential impedance of 90 BG95_Series_Hardware_Design 48 / 106 LPWA Module Series BG95 Series Hardware Design GND 3 Ground For more details about USB 2.0 specification, please visit https://www.usb.org/. The USB interface is recommended to be reserved for firmware upgrade in application designs. The following figure shows a reference design of USB interface. Figure 16: Reference Design of USB Interface In order to ensure the integrity of USB data line signal, components R1 and R2 should be placed close to the module. The extra stubs of trace must be as short as possible. The following principles should be complied with while designing the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with ground surrounded. The impedance of USB differential trace is 90 . Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and with ground planes above and below. Junction capacitance of the ESD protection device might cause influences on USB data lines, so please pay attention to the selection of the device. Typically, the stray capacitance should be less than 2 pF. Keep the ESD protection devices as close to the USB connector as possible. NOTE BG95 can only be used as a slave device. BG95_Series_Hardware_Design 49 / 106 LPWA Module Series BG95 Series Hardware Design 3.11. UART Interfaces The module provides three UART interfaces: the main UART, debug UART and the GNSS UART interfaces. Features of them are illustrated below:

The main UART interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps, 230400 bps, 460800 bps and 921600 bps baud rates, and the default is 115200 bps. It is used for data transmission and AT command communication, and supports RTS and CTS hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit). The debug UART interface supports a fixed baud rate of 115200 bps, and is used for software The GNSS UART interface supports 115200 bps baud rate by default, and is used for GNSS data debugging and log output. and NMEA sentences output. The following tables show the pin definition of the three UART interfaces. Table 13: Pin Definition of Main UART Interface Pin Name Pin No. I/O Description Comment MAIN_DTR 30 Main UART data terminal ready 1.8 V power domain MAIN_RXD 34 Main UART receive 1.8 V power domain MAIN_TXD 35 Main UART transmit 1.8 V power domain MAIN_CTS 36 Main UART clear to send 1.8 V power domain MAIN_RTS 37 Main UART request to send 1.8 V power domain MAIN_DCD 38 Main UART data carrier detect 1.8 V power domain MAIN_RI 39 Main UART ring indication 1.8 V power domain DI DI DO DO DI DO DO NOTE AT+IPR command can be used to set the baud rate of the main UART interface, and AT+IFC command can be used to set the hardware flow control (the function is disabled by default). See document [2] for more details about these AT commands. BG95_Series_Hardware_Design 50 / 106 LPWA Module Series BG95 Series Hardware Design Table 14: Pin Definition of Debug UART Interface Pin Name Pin No. I/O Description Comment DBG_RXD DBG_TXD 22 23 DI DO Debug UART receive 1.8 V power domain Debug UART transmit 1.8 V power domain Table 15: Pin Definition of GNSS UART Interface Pin Name Pin No. I/O Description Comment GNSS_TXD 27 DO GNSS UART transmit BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain GNSS_RXD 28 DI GNSS UART receive 1.8 V power domain GNSS_TXD is a BOOT_CONFIG pin. Never pull it up before startup, otherwise the module cannot power on normally. The logic levels of UART interfaces are described in the following table. Table 16: Logic Levels of Digital I/O Min.

-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V The module provides 1.8 V UART interfaces. A voltage-level translator should be used if customers application is equipped with a 3.3 V UART interface. The voltage-level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows a reference design of the main UART interface. NOTE Parameter VIL VIH VOL VOH BG95_Series_Hardware_Design 51 / 106 LPWA Module Series BG95 Series Hardware Design Figure 17: Main UART Reference Design (Translator Chip) Please visit http://www.ti.com/ for more information. Another example with transistor translation circuit is shown as below. For the design of circuits in dotted lines, see that of circuits in solid lines, but please pay attention to the direction of connection. Figure 18: Main UART Reference Design (Transistor Circuit) NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. BG95_Series_Hardware_Design 52 / 106 LPWA Module Series BG95 Series Hardware Design Figure 19: Reference Circuit with Dual-Transistor Circuit (Recommended for GNSS UART) NOTE GNSS_TXD is a BOOT_CONFIG pin (pin 27), therefore voltage-level translation IC solution with pull-up circuit or signal transistor/MOSFET circuit is not applicable to it. The dual-transistor circuit solution is recommended for GNSS UART. 3.12. PCM and I2C Interfaces*

BG95 provides one Pulse Code Modulation (PCM) digital interface and one I2C interface which are used for VoLTE or GSM CS voice only. The following table shows the pin definition of the two interfaces which can be applied on audio codec design. BG95_Series_Hardware_Design 53 / 106 LPWA Module Series BG95 Series Hardware Design Table 17: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_CLK DO PCM clock 1.8 V power domain. PCM_SYNC DO PCM data frame sync 1.8 V power domain. PCM_DIN DI PCM data input 1.8 V power domain. PCM_DOUT DO PCM data output 1.8 V power domain. I2C_SCL I2C_SDA OD OD I2C serial clock (for external codec) I2C serial data (for external codec) Require external pull-up to 1.8 V. Require external pull-up to 1.8 V. The following figure shows a reference design of PCM and I2C interfaces with an external codec IC. 4 5 6 7 40 41 Figure 20: Reference Circuit of PCM Application with Audio Codec NOTES 1. * means under development. 2. PCM and I2C interfaces support VoLTE or GSM CS voice only. 3.13. Network Status Indication BG95 provides one network status indication pin: NET_STATUS. The pin is used to drive a network status indication LED. The following tables describe the pin definition and logic level changes of NET_STATUS in different network activity status. BG95_Series_Hardware_Design 54 / 106 LPWA Module Series BG95 Series Hardware Design Table 18: Pin Definition of NET_STATUS Pin Name Pin No. I/O Description Comment NET_STATUS 21 DO Module network activity status indication 1.8 V power domain Table 19: Working State of NET_STATUS Pin Name Logic Level Changes Network Status Flicker slowly (200 ms High/1800 ms Low) Network searching NET_STATUS Flicker slowly (1800 ms High/200 ms Low) Idle Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always high Voice calling A reference circuit is shown in the following figure. Figure 21: Reference Circuit of the Network Status Indicator 3.14. STATUS The STATUS pin is used to indicate the operation status of the module. It outputs high level when the module is powered on. The following table describes the pin definition of STATUS. BG95_Series_Hardware_Design 55 / 106 LPWA Module Series BG95 Series Hardware Design Table 20: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Module operation status indication 1.8 V power domain The following figure shows a reference circuit of STATUS. Figure 22: Reference Design of STATUS 3.15. Behaviors of MAIN_RI AT+QCFG="risignaltype","physical" command can be used to configure MAIN_RI pin behavior. No matter on which port the URC is presented, the URC will trigger the behavior of MAIN_RI pin. The default behaviors of MAIN_RI pin are shown as below. Table 21: Default Behaviors of MAIN_RI Pin Response MAIN_RI keeps in high level. State Idle URC NOTES MAIN_RI outputs 120 ms low pulse when a new URC returns. The default MAIN_RI pin behaviors can be configured flexibly by AT+QCFG="urc/ri/ring" command. For more details about AT+QCFG*, see document [2]. 1. URC can be outputted from UART port, USB AT port and USB modem port, through configuration via AT+QURCCFG command. The default port is USB AT port. BG95_Series_Hardware_Design 56 / 106 LPWA Module Series BG95 Series Hardware Design 2. * means under development. 3.16. USB_BOOT Interface BG95 provides a USB_BOOT pin. During development or factory production, USB_BOOT can force the module to boot from USB port for firmware upgrade. Table 22: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description Comment USB_BOOT 75 DI Force the module into emergency download mode The following figure shows a reference circuit of USB_BOOT interface. 1.8 V power domain. Active high. If unused, keep it open. Figure 23: Reference Design of USB_BOOT Interface The following figure shows the timing of USB_BOOT. BG95_Series_Hardware_Design 57 / 106 LPWA Module Series BG95 Series Hardware Design Figure 24: Timing of Turning on Module with USB_BOOT NOTES It is recommended to reserve the above circuit design during application design. 1. 2. Please make sure that VBAT is stable before pulling down PWRKEY. It is recommended that the time between powering up VBAT and pulling down PWRKEY is no less than 30 ms. 3. When using MCU to control the module entering emergency download mode, please follow the above timing sequence. Connecting the test points as shown in Figure 23 can manually force the module to enter download mode. 3.17. ADC Interfaces The module provides two analog-to-digital converter (ADC) interfaces but only one ADC interface can be used at a time. ADC1 connects directly to ADC0 inside the module. AT+QADC=0 command can be used to read the voltage value on the ADC being used. For more details about the AT command, see document [2]. In order to improve the accuracy of ADC voltage values, the trace of ADC should be ground surrounded. BG95_Series_Hardware_Design 58 / 106 LPWA Module Series BG95 Series Hardware Design Table 23: Pin Definition of ADC Interface Pin Name Pin No. I/O Description Comment ADC0 ADC1 24 2 AI AI General-purpose ADC interface General-purpose ADC interface Do not use ADC0 and ADC1 simultaneously. The following table describes the characteristics of ADC interfaces. Table 24: Characteristics of ADC Interfaces Min. 0.1 Typ. 64.979 500 4.8 Max. 1.8 Unit V V kHz MHz M Input Resistance 10 1. ADC input voltage must not exceed 1.8 V. 2. 3. It is prohibited to supply any voltage to ADC pin when VBAT is removed. It is recommended to use resistor divider circuit for ADC application, and the divider resistor accuracy should be no less than 1 %. 4. Do not use ADC0 and ADC1 simultaneously, as ADC1 connects directly to ADC0 inside the module. 3.18. GPIO Interfaces The module provides nine general-purpose input and output (GPIO) interfaces. AT+QCFG="gpio"

command can be used to configure the status of GPIO pins. For more details about the AT command, see document [2]. Parameter Voltage Range Resolution (LSB) Analog Bandwidth Sample Clock NOTES BG95_Series_Hardware_Design 59 / 106 LPWA Module Series BG95 Series Hardware Design Table 25: Pin Definition of GPIO Interfaces Pin Name Pin No. Description 25 26 64 65 66 85 86 87 88 General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output The following table describes the characteristics of GPIO interfaces. Table 26: Logic Levels of GPIO Interfaces Min.

-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V 1) BG95-MF does not support GPIO3 and GPIO4. GPIO1 GPIO2 GPIO3 1) GPIO4 1) GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 Parameter VIL VIH VOL VOH NOTE BG95_Series_Hardware_Design 60 / 106 LPWA Module Series BG95 Series Hardware Design 3.19. GRFC Interfaces The module provides two generic RF control interfaces for the control of external antenna tuners. Table 27: Pin Definition of GRFC Interfaces Pin Name Pin No. Description Comments GRFC1 83 Generic RF controller 1.8 V power domain. GRFC2 84 Generic RF controller BOOT_CONFIG. Do not pull it up before startup. 1.8 V power domain. Table 28: Logic Levels of GRFC Interfaces Parameter VOL VOH Min. 0 1.35 Max. 0.45 1.8 Unit V V Table 29: Truth Table of GRFC Interfaces GRFC1 Level GRFC2 Level Frequency Range (MHz) Band Low Low High Low High Low 8802200 B1, B2, B3, B4, B8, B25, B66 791894 698803 B5, B18, B19, B20, B26, B27 B12, B13, B28, B85 High High 617698 B71 1. GRFC2 (pin 84) is a BOOT_CONFIG pin. Never pull it up before startup, otherwise the module cannot NOTES power on normally. 2. BG95-M4 does not support GRFC interfaces. BG95_Series_Hardware_Design 61 / 106 LPWA Module Series BG95 Series Hardware Design 4 GNSS Receiver 4.1. General Description BG95 includes a fully integrated global navigation satellite system solution that supports Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). The module supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, BG95 GNSS engine is switched off. It has to be switched on via AT command. For more details about GNSS engine technology and configurations, see document [3]. 4.2. GNSS Performance The following table shows the GNSS performance of BG95 series module. Table 30: GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) TTFF

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous Cold start

@ open sky Warm start

@ open sky Autonomous XTRA enabled Autonomous XTRA enabled Typ.

-146

-157

-157 35 10.4 23 1.53 Unit dBm dBm dBm s s s s BG95_Series_Hardware_Design 62 / 106 LPWA Module Series BG95 Series Hardware Design Hot start

@ open sky CEP-50 Autonomous XTRA enabled Autonomous

@open sky 1.6 1.5

< 3 s s m Accuracy

(GNSS) NOTES 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. 4.3. Layout Guidelines The following layout guidelines should be taken into account in application designs. Maximize the distance between GNSS antenna and main antenna. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar should be kept away from the antennas. isolation and protection. Keep 50 characteristic impedance for ANT_GNSS trace. See Chapter 5 for GNSS antenna reference design and antenna installation information. BG95_Series_Hardware_Design 63 / 106 LPWA Module Series BG95 Series Hardware Design 5 Antenna Interfaces BG95 includes a main antenna interface and a GNSS antenna interface. The antenna ports have an impedance of 50 . 5.1. Main Antenna Interface 5.1.1. Pin Definition The pin definition of main antenna interface is shown below. Table 31: Pin Definition of Main Antenna Interface Pin Name Pin No. I/O Description Comment ANT_MAIN 60 IO Main antenna interface 50 characteristic impedance 5.1.2. Operating Frequency Table 32: Operating Frequency of BG95 Series Module 3GPP Band Transmit Receive LTE-FDD B1 19201980 21102170 LTE-FDD B2, PCS1900 18501910 19301990 LTE-FDD B3, DCS1800 17101785 18051880 LTE-FDD B4 17101755 21102155 LTE-FDD B5, GSM850 824849 LTE-FDD B8, EGSM900 880915 LTE-FDD B12 699716 869894 925960 729746 Unit MHz MHz MHz MHz MHz MHz MHz BG95_Series_Hardware_Design 64 / 106 LPWA Module Series BG95 Series Hardware Design LTE-FDD B25 18501915 19301995 LTE-FDD B31 3) 452.5457.5 462.5467.5 LTE-FDD B66 17101780 21102180 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 777787 815830 830845 832862 LTE-FDD B26 1) 814849 LTE-FDD B27 1) 807824 LTE-FDD B28 703748 LTE-FDD B71 2) 663698 LTE-FDD B72 3) 451456 LTE-FDD B73 3) 450455 LTE-FDD B85 698716 746756 860875 875890 791821 859894 852869 758803 617652 461466 460465 728746 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz NOTES 1. 1) LTE-FDD B26 and B27 are supported by Cat M1 only. 2. 2) LTE-FDD B71 is supported by Cat NB2 only. 3. 3) LTE-FDD B31, B72 and B73 are supported by BG95-M4 only. 5.1.3. Reference Design of Main Antenna Interface A reference design of main antenna interface is shown as below. It is recommended to reserve a -type matching circuit for better RF performance, and the -type matching components (R1/C1/C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. BG95_Series_Hardware_Design 65 / 106 LPWA Module Series BG95 Series Hardware Design Figure 25: Reference Design of Main Antenna Interface 5.1.4. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, height from the reference ground to the signal layer (H), and the clearance between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 26: Microstrip Design on a 2-layer PCB BG95_Series_Hardware_Design 66 / 106 LPWA Module Series BG95 Series Hardware Design Figure 27: Coplanar Waveguide Design on a 2-layer PCB Figure 28: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) BG95_Series_Hardware_Design 67 / 106 LPWA Module Series BG95 Series Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully 50 . connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times as wide as RF signal traces (2 W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, see document [4]. 5.2. GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNSS antenna interface. Table 33: Pin Definition of GNSS Antenna Interface Pin Name Pin No. I/O Description Comment ANT_GNSS 49 AI GNSS antenna interface 50 impedance Table 34: GNSS Frequency Type GPS Galileo BeiDou QZSS GLONASS 1597.51605.8 Frequency 1575.42 1.023 1575.42 2.046 1561.098 2.046 1575.42 1.023 Unit MHz MHz MHz MHz MHz BG95_Series_Hardware_Design 68 / 106 LPWA Module Series BG95 Series Hardware Design A reference design of GNSS antenna interface is shown as below. Figure 30: Reference Circuit of GNSS Antenna Interface NOTES 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Wi-Fi Antenna Interface*

BG95-MF supports Wi-Fi antenna interface through which the module realizes Wi-Fi positioning

(receiving only). The following tables show the pin definition of Wi-Fi antenna interface. Table 35: Pin Definition of Wi-Fi Antenna Interface Pin Name Pin No. I/O Description Comment ANT_WIFI 56 AI Wi-Fi antenna interface 50 impedance NOTE

* means under development. BG95_Series_Hardware_Design 69 / 106 LPWA Module Series BG95 Series Hardware Design 5.4. Antenna Installation 5.4.1. Antenna Requirements Table 36: Antenna Requirements Antenna Type Requirements The following table shows the requirements on main antenna and GNSS antenna. Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Active antenna gain: > 0 dBi Active antenna embedded LNA gain: < 17 dB VSWR: 2 Efficiency: > 30 %

Max Input Power: 50 W Input Impedance: 50 Cable Insertion Loss: < 1 dB

(LTE B5/B8/B12/B13/B18/B19/B20/B26/B27/B28/B31/B71/B72/B73/B85, GSM850/EGSM900) Cable Insertion Loss: < 1.5 dB

(LTE B1/B2/B3/B4/B25/B66, DCS1800/PCS1900) GNSS 1) LTE/GSM 5.4.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connectors provided by HIROSE. BG95_Series_Hardware_Design 70 / 106 LPWA Module Series BG95 Series Hardware Design Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 32: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. BG95_Series_Hardware_Design 71 / 106 LPWA Module Series BG95 Series Hardware Design Figure 33: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com/. BG95_Series_Hardware_Design 72 / 106 LPWA Module Series BG95 Series Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 37: Absolute Maximum Ratings Parameter VBAT_BB VBAT_RF USB_VBUS Voltage at Digital Pins Min.

-0.5

-0.3

-0.3

-0.3 6.2. Power Supply Ratings Table 38: Power Supply Ratings Max. 6.0 6.0 5.5 2.09 Unit V V V V Parameter Description Conditions Module Min. Typ. Max. Unit VBAT VBAT_BB/

VBAT_RF The actual input voltages must be kept between the minimum and the maximum values. BG95-M1/

BG95-M2/

BG95-N1 BG95-M3/

BG95-M5/

BG95-M6 2.6 3.3 4.8 V 3.3 3.8 4.3 V BG95_Series_Hardware_Design 73 / 106 LPWA Module Series BG95 Series Hardware Design IVBAT Peak supply current (during transmission slot) Maximum power control level on EGSM900 USB_VBUS USB detection 5.0 V BG95-M4 3.2 3.8 4.2 BG95-MF TBD 3.8 TBD V V 1.8 2.0 A BG95-M3/

BG95-M5 BG95 series 6.3. Operating and Storage Temperatures The operating and storage temperatures of the module are listed in the following table. Table 39: Operating and Storage Temperatures Parameter Min. Max. Unit Operation Temperature Range 1)

-35 Extended Temperature Range 2)

-40 Storage Temperature Range

-40 Typ.

+25

+75

+85

+90 C C C NOTES 1. 2. 1) Within operating temperature range, the module meets 3GPP specifications. 2) Within extended temperature range, the module remains the ability to establish and maintain functions such as SMS and data transmission, without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature levels, the module meets 3GPP specifications again. 6.4. Current Consumption The following table shows current consumption of BG95 series module. BG95_Series_Hardware_Design 74 / 106 LPWA Module Series BG95 Series Hardware Design Table 40: BG95-M1 Current Consumption (3.3 V Power Supply, Room Temperature) Description Conditions Average Max. Unit Leakage 1) Power-off @ USB and UART disconnected PSM 2) Power Saving Mode Rock Bottom AT+CFUN=0 @ Sleep mode Sleep Mode

(USB disconnected) Idle Mode

(USB disconnected) LTE Cat M1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 data transfer

(GNSS OFF) Band 13 @ 20.57 dBm Band 18 @ 21.14 dBm Band 1 @ 21.04 dBm Band 2 @ 20.67 dBm Band 3 @ 21.05 dBm Band 4 @ 20.8 dBm Band 5 @ 21.06 dBm Band 8 @ 20.89 dBm Band 12 @ 20.96 dBm Band 19 @ 21.2 dBm Band 20 @ 21 dBm Band 25 @ 20.86 dBm Band 26 @ 21.1 dBm Band 27 @ 21.05 dBm Band 28A @ 20.87 dBm Band 28B @ 20.91 dBm 14 4 0.53 1.7 0.577 20 19.57 201 200 196 193 215 210 205 216 217 206 218 201 221 212 211 214

438 435 418 405 487 464 448 489 481 455 490 437 490 479 469 474 A A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG95_Series_Hardware_Design 75 / 106 LPWA Module Series BG95 Series Hardware Design Band 66 @ 20.65 dBm Band 85 @ 21.01 dBm 193 208 418 458 mA mA Table 41: BG95-M2 Current Consumption (3.3 V Power Supply, Room Temperature) Description Conditions Average Max. Unit Leakage 1) Power-off @ USB and UART disconnected PSM 2) Power Saving Mode Rock Bottom AT+CFUN=0 @ Sleep mode Sleep Mode

(USB disconnected) Idle Mode

(USB disconnected) LTE Cat M1 data transfer

(GNSS OFF) LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s Band 1 @ 21.17 dBm Band 2 @ 21.03 dBm Band 3 @ 20.93 dBm Band 4 @ 21.01 dBm Band 5 @ 21.18 dBm Band 8 @ 21.16 dBm Band 12 @ 21.07 dBm 14 3.9 0.51 1.7 1.6 0.549 0.592 21.2 16.8 20.6 16.4 201 202 191 193 218 211 205

452 434 415 425 504 480 457 A A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG95_Series_Hardware_Design 76 / 106 LPWA Module Series BG95 Series Hardware Design Band 13 @ 21.31 dBm Band 18 @ 21.09 dBm Band 19 @ 21.21 dBm Band 20 @ 21.21 dBm Band 25 @ 21.1 dBm Band 26 @ 21.28 dBm Band 27 @ 21.08 dBm Band 28A @ 21.27 dBm Band 28B @ 21.05 dBm Band 66 @ 20.76 dBm Band 85 @ 21.06 dBm Band 1 @ 21.38 dBm Band 2 @ 21.32 dBm Band 3 @ 21.16 dBm Band 4 @ 21.18 dBm Band 5 @ 20.92 dBm Band 8 @ 21.7 dBm Band 12 @ 21.1 dBm Band 19 @ 21.18 dBm Band 20 @ 21.19 dBm Band 25 @ 21.2 dBm Band 28 @ 20.56 dBm Band 66 @ 21.26 dBm Band 71 @ 21.44 dBm Band 85 @ 21.82 dBm LTE Cat NB1 data transfer

(GNSS OFF) Band 13 @ 21.11 dBm Band 18 @ 20.85 dBm 227 216 219 218 202 219 217 213 215 190 205 163 160 150 149 174 170 160 185 174 177 178 158 164 151 162 164 533 498 508 501 455 508 502 477 497 407 457 410 403 365 376 447 438 403 484 451 462 457 404 421 380 412 419 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG95_Series_Hardware_Design 77 / 106 LPWA Module Series BG95 Series Hardware Design Table 42: BG95-M3 Current Consumption (3.8 V Power Supply, Room Temperature) Description Conditions Average Max. Unit Leakage 1) Power-off @ USB and UART disconnected 14.5 PSM 2) Power Saving Mode Rock Bottom AT+CFUN=0 @ Sleep mode Sleep Mode

(USB disconnected) Idle Mode

(USB disconnected) LTE Cat M1 data transfer

(GNSS OFF) LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s Band 1 @ 21.03 dBm Band 2 @ 21.13 dBm Band 3 @ 21.42 dBm Band 4 @ 21.27 dBm Band 5 @ 21.22 dBm Band 8 @ 21.11 dBm Band 12 @ 20.98 dBm Band 13 @ 21.05 dBm Band 18 @ 21.05 dBm Band 19 @ 20.9 dBm

412 402 403 387 422 413 412 450 434 430 A A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 3.9 0.575 1.65 1.56 0.63 0.67 18.9 14.8 18.2 14.3 186 187 184 182 192 190 185 199 193 191 BG95_Series_Hardware_Design 78 / 106 LPWA Module Series BG95 Series Hardware Design Band 20 @ 20.94 dBm Band 25 @ 20.09 dBm Band 26 @ 21.19 dBm Band 27 @ 21.12 dBm Band 28A @ 20.99 dBm Band 28B @ 20.97 dBm Band 66 @ 20.95 dBm Band 85 @ 21.06 dBm Band 1 @ 21.19 dBm Band 2 @ 21.43 dBm Band 3 @ 21.4 dBm Band 4 @ 21.48 dBm Band 5 @ 21.54 dBm Band 8 @ 21.13 dBm Band 12 @ 21.43 dBm Band 13 @ 21.62 dBm Band 18 @ 21.5 dBm Band 19 @ 21.48 dBm Band 20 @ 21.55 dBm Band 25 @ 21.61 dBm Band 28 @ 21.45 dBm Band 66 @ 21.5 dBm Band 71 @ 20.71 dBm Band 85 @ 21.82 dBm LTE Cat NB1 data transfer

(GNSS OFF) 429 416 436 437 431 425 382 405 373 384 360 364 423 399 385 442 427 431 423 389 410 376 329 395 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 192 186 193 193 188 190 181 185 149 151 144 145 165 155 150 172 164 164 165 153 158 145 132 154 518 524 327 GPRS data transfer (GNSS OFF) GPRS GSM850 4UL/1DL @ 28 dBm GPRS GSM900 4UL/1DL @ 28 dBm GPRS DCS1800 4UL/1DL @ 25 dBm 1165 mA 1189 mA 782 mA BG95_Series_Hardware_Design 79 / 106 LPWA Module Series BG95 Series Hardware Design GPRS PCS1900 4UL/1DL @ 25 dBm EDGE GSM850 4UL/1DL @ 23 dBm EDGE GSM900 4UL/1DL @ 21 dBm EDGE DCS1800 4UL/1DL @ 21 dBm EDGE PCS1900 4UL/1DL @ 21 dBm EDGE data transfer (GNSS OFF) 809 mA 1076 mA 1084 mA 908 868 mA mA Table 43: BG95-M5 Current Consumption (3.8 V Power Supply, Room Temperature) Description Conditions Average Max. Unit Leakage 1) Power-off @ USB and UART disconnected 15 382 523 496 432 421 6 0.633 1.7 1.67 0.72 0.68 17.3 13.5 16.6 13.1 227 220 229 228

554 532 557 553 A A mA mA mA mA mA mA mA mA mA mA mA mA mA PSM 2) Power Saving Mode Rock Bottom AT+CFUN=0 @ Sleep mode LTE Cat M1 DRX = 1.28 sDRX = 1.28 s Sleep Mode

(USB disconnected) Idle Mode

(USB disconnected) LTE Cat M1 DRX = 1.28 sDRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 data transfer

(GNSS OFF) Band 1 @ 23.17 dBm Band 2 @ 22.77 dBm Band 3 @ 22.92dBm Band 4 @ 22.89 dBm BG95_Series_Hardware_Design 80 / 106 LPWA Module Series BG95 Series Hardware Design Band 5 @ 23.49 dBm Band 8 @ 22.99dBm Band 12 @ 22.95 dBm Band 13 @ 22.81 dBm Band 18 @ 22.42 dBm Band 19 @ 23.23 dBm Band 20 @ 22.31 dBm Band 25 @ 22.97 dBm Band 26 @ 23.12 dBm Band 27 @ 23.18 dBm Band 28A @ 23.09 dBm Band 28B @ 22.88 dBm Band 66 @ 22.71 dBm Band 85 @ 22.75 dBm Band 1 @ 22.83 dBm Band 2 @ 23.38 dBm Band 3 @ 23.53 dBm Band 4 @ 23.52 dBm Band 5 @ 23.86 dBm Band 8 @ 23.74 dBm Band 12 @ 23.62 dBm Band 13 @ 23.81 dBm Band 18 @ 23.68 dBm Band 19 @ 23.45 dBm Band 20 @ 23.7 dBm Band 25 @ 22.8 dBm Band 28 @ 23.77 dBm LTE Cat NB1 data transfer

(GNSS OFF) 231 226 210 220 218 227 220 223 227 225 214 215 228 204 185 189 203 207 210 208 189 203 204 200 208 187 188 563 545 494 523 518 550 521 534 549 547 508 509 553 473 493 504 546 561 573 563 510 549 555 540 565 495 505 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG95_Series_Hardware_Design 81 / 106 LPWA Module Series BG95 Series Hardware Design Band 66 @ 23.51 dBm Band 71 @ 23.62 dBm Band 85 @ 22.51 dBm GPRS GSM850 4UL/1DL @ 28 dBm GPRS GSM900 4UL/1DL @ 28 dBm GPRS DCS1800 4UL/1DL @ 26dBm GPRS PCS1900 4UL/1DL @ 26dBm EDGE GSM850 4UL/1DL @ 23 dBm GPRS data transfer (GNSS OFF) EDGE data transfer (GNSS OFF) EDGE GSM900 4UL/1DL @ 22dBm EDGE DCS1800 4UL/1DL @ 22dBm EDGE PCS1900 4UL/1DL @ 22 dBm PSM 2) Power Saving Mode Rock Bottom AT+CFUN=0 @ Sleep mode Sleep Mode

(USB disconnected) Idle Mode

(USB disconnected) LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s 203 185 172 628 535 389 407 531 534 441 442 5 0.5 1.5 1.41 0.58 0.55 18.5 14.2 18.2 554 493 460 1336 1114 796 814 1101 1086 901 887

mA mA mA mA mA mA mA mA mA mA mA A A mA mA mA mA mA mA mA mA Table 44: BG95-M6 Current Consumption (3.8 V Power Supply, Room Temperature) Description Conditions Average Max. Unit Leakage 1) Power-off @ USB and UART disconnected 15 BG95_Series_Hardware_Design 82 / 106 LPWA Module Series BG95 Series Hardware Design LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s 14

Band 1 @ 23.03 dBm Band 2 @ 22.91 dBm Band 3 @ 23.2dBm Band 4 @ 23.18 dBm Band 5 @ 23.02 dBm Band 8 @ 23.47 dBm Band 12 @ 23.08 dBm Band 13 @ 23.04 dBm Band 18 @ 23.22 dBm Band 19 @ 23.14 dBm Band 20 @ 22.31 dBm Band 25 @ 23.06 dBm Band 26 @ 23.19 dBm Band 27 @ 22.99 dBm Band 28A @ 23.43 dBm Band 28B @ 22.41 dBm Band 66 @ 23.18 dBm Band 85 @ 23.07 dBm Band 1 @ 23.15 dBm Band 2 @ 23.11 dBm Band 3 @ 23.13 dBm Band 4 @ 23.12 dBm Band 5 @ 23.11 dBm Band 8 @ 23.11 dBm Band 12 @ 23.32 dBm LTE Cat M1 data transfer

(GNSS OFF) LTE Cat NB1 data transfer

(GNSS OFF) 207 203 211 211 213 231 195 204 212 215 220 209 215 208 200 202 207 196 170 167 180 178 182 194 163 491 473 499 500 505 563 444 473 501 530 530 494 509 490 461 467 485 448 451 433 478 470 482 521 424 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA BG95_Series_Hardware_Design 83 / 106 LPWA Module Series BG95 Series Hardware Design Band 13 @ 23.06 dBm Band 18 @ 23.32 dBm Band 19 @ 23.26 dBm Band 20 @ 23.31 dBm Band 25 @ 23.27 dBm Band 28 @ 23.6 dBm Band 66 @ 23.12 dBm Band 71 @ 23.11 dBm Band 85 @ 23.13 dBm 169 184 188 183 171 167 179 157 160 NOTES PSM. 1. 1) The current consumption of BG95 series module in PSM is much lower than that in power off mode, and this is because of the following two designs:

More internal power supplies are powered off in PSM. Also the internal clock frequency is reduced in PSM. 2. 2) The modules USB and UART are disconnected and GSM network (if available) does not support Table 45: GNSS Current Consumption of BG95-M1/-M2 (3.3 V Power Supply, Room Temperature) Description Conditions Typ. Unit Cold start @ Instrument Host start @ Instrument Lost start @ Instrument Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Instrument Environment @ Passive Antenna Table 46: GNSS Current Consumption of BG95-M3 (3.8 V Power Supply, Room Temperature) Description Conditions Typ. Unit Searching

(AT+CFUN=0) Cold start @ Instrument Host start @ Instrument BG95_Series_Hardware_Design 84 / 106 443 486 493 480 458 432 474 412 409 80 77 79 63 70 71 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LPWA Module Series BG95 Series Hardware Design Warm start @ Instrument Lost start @ Instrument Tracking

(AT+CFUN=0) Instrument Environment @ Passive Antenna Table 47: GNSS Current Consumption of BG95-M5/-M6 (3.8 V Power Supply, Room Temperature) Description Conditions Typ. Unit 71 69 55 68 67 69 53 mA mA mA mA mA mA mA Cold start @ Instrument Host start @ Instrument Lost start @ Instrument Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Instrument Environment @ Passive Antenna 6.5. RF Output Power The following table shows the RF output power of BG95 series module. Table 48: Conducted RF Output Power of BG95-M1/-M2/-M3/-N1/-MF Frequency Max. Min. LTE-FDD B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/

B25/B26 1)/B27 1)/B28/B66/B71 2)/B85 GSM850/EGSM900 DCS1800/PCS1900 21 dBm +1.7/-3 dB

< -39 dBm 33 dBm 2 dB 5 dBm 5 dB 30 dBm 2 dB 0 dBm 5 dB GSM850/EGSM900 (8-PSK) 27 dBm 3 dB 5 dBm 5 dB DCS1800/PCS1900 (8-PSK) 26 dBm 3 dB 0 dBm 5 dB Table 49: Conducted RF Output Power of BG95-M4 Frequency Max. Min. BG95_Series_Hardware_Design 85 / 106 1. 2. 3. NOTES LPWA Module Series BG95 Series Hardware Design LTE-FDD B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/

B25/B26 1)/B27 1)/B28/B66/B85 21 dBm +1.7/-3 dB

< -39 dBm LTE-FDD B31/B72/B73 3) 23 dBm 2 dB

< -39 dBm Table 50: Conducted RF Output Power of BG95-M5/-M6 Frequency Max. Min. LTE-FDD B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/

B25/B26 1)/B27 1)/B28/B66/B71 2) /B85 GSM850/EGSM900 DCS1800/PCS1900 23 dBm 2 dB

< -39 dBm 33 dBm 2 dB 5 dBm 5 dB 30 dBm 2 dB 0 dBm 5 dB GSM850/EGSM900 (8-PSK) 27 dBm 3 dB 5 dBm 5 dB DCS1800/PCS1900 (8-PSK) 26 dBm 3 dB 0 dBm 5 dB 1) LTE-FDD B26 and B27 are supported by Cat M1 only. 2) LTE-FDD B71 is supported by Cat NB2 only. 3) LTE-FDD B31, B72 and B73 for BG95-M4 supports Power Class 2 (26 dBm) and Power Class 3

(23 dBm). Power Class 2 for BG95-M4 is under development. 6.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of BG95 series module. Table 51: Conducted RF Receiving Sensitivity of BG95-M1 Network Band Primary Diversity Sensitivity (dBm) Cat M1/3GPP Cat NB2 LTE-FDD B1

-108/-102.3 LTE LTE-FDD B2 Supported

-108.4/-100.3 Not Supported Not Supported LTE-FDD B3

-108.4/-99.3 BG95_Series_Hardware_Design 86 / 106 LPWA Module Series BG95 Series Hardware Design

-108/-102.3

-107.6/-100.8

-108/-99.8

-108.6/-99.3

-107/-99.3

-108/-102.3

-108/-102.3

-108/-99.8

-108.2/-100.3

-108.2/-100.3

-108.4-100.8

-106.8/-100.8

-107.8/-101.8 Not Supported

-108.4/-99.3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B27 LTE-FDD B28 LTE-FDD B66 LTE-FDD B71 LTE-FDD B85 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B8 Table 52: Conducted RF Receiving Sensitivity of BG95-M2 Network Band Primary Diversity LTE Supported Not Supported Sensitivity ( dBm) Cat M1/3GPP Cat NB2 1)/3GPP

-107/-102.3

-114/-107.5

-107/-100.3

-116/-107.5

-107/-99.3

-113/-107.5

-107/-102.3

-114/-107.5

-107/-100.8

-115/-107.5

-107/-99.8

-113/-107.5 BG95_Series_Hardware_Design 87 / 106 LPWA Module Series BG95 Series Hardware Design LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B27 LTE-FDD B28 LTE-FDD B66 LTE-FDD B71 LTE-FDD B85 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12

-107/-99.3

-116/-107.5

-107/-99.3

-114/-107.5

-107/-102.3

-116/-107.5

-107/-102.3

-116/-107.5

-107/-99.8

-115/-107.5

-107/-100.3

-115/-107.5

-107/-100.3 Not Supported

-107/-100.8 Not Supported

-107/-100.8

-115/-107.5

-107/-101.8

-115/-107.5 Not Supported

-115/-107.5

-107/-99.3

-115/-107.5 Sensitivity ( dBm) Cat M1/3GPP Cat NB2 1)/3GPP

-106.5/-102.3

-113/-107.5

-106/-100.3

-114/-107.5

-106/-99.3

-114/-107.5

-106/-100.8

-115/-107.5

-106/-99.8

-114/-107.5

-106.5/-99.3

-115/-107.5 Table 53: Conducted RF Receiving Sensitivity of BG95-M3 Network Band Primary Diversity LTE LTE-FDD B4 Supported

-106.5/-102.3

-114/-107.5 Not Supported BG95_Series_Hardware_Design 88 / 106 LPWA Module Series BG95 Series Hardware Design LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B27 LTE-FDD B28 LTE-FDD B66 LTE-FDD B71 LTE-FDD B85 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B5 LTE-FDD B8 LTE-FDD B12

-106.5-99.3

-115/-107.5

-106/-102.3

-115/-107.5

-106/-102.3

-115/-107.5

-106/-99.8

-114/-107.5

-106/-100.3

-114/-107.5

-106/-100.3 Not Supported

-106.5/-100.8 Not Supported

-106/-100.8

-115/-107.5

-106.5-101.8

-114/-107.5 Not Supported

-115/-107.5

-106.5/-99.3

-115/-107.5 Sensitivity ( dBm) GSM/3GPP

-107/-102

-107/-102 Sensitivity ( dBm) Cat M1/3GPP Cat NB2 1)/3GPP

-106.5/-102.3

-114/-107.5

-107.5/-100.3

-115/-107.5

-108.0/-99.3

-114/-107.5

-107.5/-100.8

-114/-107.5

-106.5/-99.8

-114/-107.5

-106.5/-99.3

-114/-107.5 Network Band Primary Diversity GSM850/EGSM900 DCS1800/PCS1900 Supported Not Supported GSM Table 54: Conducted RF Receiving Sensitivity of BG95-M5 Network Band Primary Diversity LTE LTE-FDD B4 Supported

-108.0/-102.3

-114/-107.5 Not Supported BG95_Series_Hardware_Design 89 / 106 LPWA Module Series BG95 Series Hardware Design LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B27 LTE-FDD B28 LTE-FDD B66 LTE-FDD B71 LTE-FDD B85

-107.5/-99.3

-114/-107.5

-107.5/-102.3

-115/-107.5

-107.5/-102.3

-114/-107.5

-107.5/-99.8

-114/-107.5

-107.5/-100.3

-114/-107.5

-107.5/-100.3 Not Supported

-107.5/-100.8 Not Supported

-107.5/-100.8

-114/-107.5

-107.5/-101.8

-114/-107.5 Not Supported

-115/-107.5

-107.5/-99.3

-114/-107.5 Sensitivity ( dBm) Network Band Primary Diversity GSM GSM850/EGSM900 DCS1800/PCS1900 Supported Not Supported GSM/3GPP

-107/-102

-107/-102 NOTES 1. 1) LTE Cat NB2 receiving sensitivity without repetitions. 2. * means under development. 6.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the electrostatic discharge characteristics of BG95 series module. BG95_Series_Hardware_Design 90 / 106 LPWA Module Series BG95 Series Hardware Design Table 55: Electrostatic Discharge Characteristics (25 C, 45 % Relative Humidity) Tested Interfaces Contact Discharge Air Discharge Unit VBAT, GND Main/GNSS Antenna Interfaces 6 5 8 6 kV kV BG95_Series_Hardware_Design 91 / 106 LPWA Module Series BG95 Series Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are 0.05 mm unless otherwise specified. 7.1. Top and Side Dimensions 19.90.15 2.20.2 Pin 1

. 5 1 0 6

. 3 2 Figure 34: Module Top and Side Dimensions BG95_Series_Hardware_Design 92 / 106 LPWA Module Series BG95 Series Hardware Design 19.900.15 0.25 1.10 0.55 1.95 1.10 5.10 1.00 0 5

. 8 0.85 1.70

. 5 1 0 0 6

. 3 2 1.00 1.70 1.00 1.70 0.70 1.00 1.00 0.25 Pin 1 1.90 1.10 0.50 0.25 1.10 0.25 0.55 40x1.0 62x0.7 40x1.0 62x1.10 Figure 35: Module Bottom Dimensions (Bottom View) The package warpage level of the module conforms to JEITA ED-7306 standard. NOTE BG95_Series_Hardware_Design 93 / 106 LPWA Module Series BG95 Series Hardware Design 7.2. Recommended Footprint 9.95 9.15 7.45 1.10 19.900.15 9.95 9.15 7.15 1.95 0.55 1.10 0.25 1.00 1.00 Pin 1 1.10 1.70 2.50 1.70 1.70 0.85 5 1

. 0 0 6

. 3 2 0.25 1.70 0.15 1.70 0.85

. 1 7 0 2.55 0.85 1.00 1.10 1.00 0.70 1.10 0.25 1.10 2.50 1.10 4.25 5.95 62x0.7 4.25 5.95 40x1.0 62x1.10 40x1.0 0.25

. 0 2 0

. 1 9 0 5

. 9 5 4

. 2 5

. 4 2 5 5

. 9 5 1 1

. 8 0 1 1

. 0 0 9

. 7 0 7

. 6 5 7

. 6 5

. 9 6 0 1 1

. 0 0 1 1

. 8 0 Figure 36: Recommended Footprint (Top View) NOTES 1. For easy maintenance of the module, please keep about 3 mm between the module and other components on the motherboard. 2. All RESERVED pins must be kept open. 3. For stencil design requirements of the module, see document [5]. BG95_Series_Hardware_Design 94 / 106 LPWA Module Series BG95 Series Hardware Design 7.3. Top and Bottom Views Figure 37: Top View of the Module Figure 38: Bottom View of the Module NOTE These are renderings of BG95 module. For authentic appearance, see the module that you receive from Quectel. BG95_Series_Hardware_Design 95 / 106 LPWA Module Series BG95 Series Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage BG95 series module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 5 C and the relative humidity 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. should be 35 % to 60 %. 3. The floor life of the module is 168 hours 1) in a plant where the temperature is 23 5 C and relative humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10 % (e.g. a drying cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement above occurs;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

All modules must be soldered to PCB within 24 hours after the baking, otherwise they should be put in a dry environment such as in a drying oven. 5. BG95_Series_Hardware_Design 96 / 106 LPWA Module Series BG95 Series Hardware Design NOTES 1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the modules to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60 %, it is recommended to start the solder reflow process within 24 hours after the package is removed. And do not remove the packages of tremendous modules if they are not ready for soldering. 3. Take the module out of the packaging and put it on high-temperature resistant fixtures before the baking. If shorter baking time is desired, refer to IPC/JEDEC J-STD-033 for baking procedure. 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.130.15 mm. For more details, please refer to document [5]. It is suggested that the peak reflow temperature is 238246 C, and the absolute maximum reflow temperature is 246 C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Temp. (C) 246 238 220 200 150 100 Soak Zone A Max slope: 1 to 3C/s Reflow Zone Max slope:

2 to 3C/s C Cooling down slope:

-1.5 to -3C/s B D Figure 39: Recommended Reflow Soldering Thermal Profile BG95_Series_Hardware_Design 97 / 106 LPWA Module Series BG95 Series Hardware Design Table 56: Recommended Thermal Profile Parameters Soak time (between A and B: 150 C and 200 C) 70120 s Factor Soak Zone Max slope Reflow Zone Max slope Reflow time (D: over 220 C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle 8.3. Packaging Recommendation 13 C/s 23 C/s 4570 s 238246 C

-1.5 to -3 C/s 1 BG95 is packaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until the devices are ready to be soldered onto the application. The reel is 330 mm in diameter and each reel contains 250 modules. The following figures show the packaging details, measured in millimeter (mm). BG95_Series_Hardware_Design 98 / 106 LPWA Module Series BG95 Series Hardware Design Figure 40: Tape Dimensions Figure 41: Reel Dimensions BG95_Series_Hardware_Design 99 / 106 LPWA Module Series BG95 Series Hardware Design Table 57: Packaging Specifications of BG95 MOQ for MP Minimum Package: 250 Minimum Package 4 = 1000 Size: 370 mm 350 mm 56 mm N.W: 0.61 kg G.W: 1.35 kg Size: 380 mm 250 mm 365 mm N.W: 2.45 kg G.W: 6.28 kg 250 BG95_Series_Hardware_Design 100 / 106 LPWA Module Series BG95 Series Hardware Design 9 Appendix A References Table 58: Related Documents SN Document Name Remark

[1] Quectel_UMTS&LTE_EVB_User_Guide UMTS&LTE EVB user guide

[2] Quectel_BG95&BG77_AT_Commands_Manual AT commands manual of BG95 series and BG77 modules

[3]

Quectel_BG95&BG77&BG600L_Series_GNSS_ Application_Note GNSS application note of BG95 series, BG77 and BG600L-M3 modules

[4] Quectel_RF_Layout_Application_Note RF layout application note

[5] Quectel_Module_Secondary_SMT_Application_Note Secondary SMT application note for Quectel modules Table 59: Terms and Abbreviations Abbreviation Description Challenge Handshake Authentication Protocol Adaptive Multi-rate Bits Per Second Coding Scheme Clear To Send Delta Firmware Upgrade Over The Air Downlink Data Terminal Ready Discontinuous Transmission AMR bps CHAP CS CTS DFOTA DL DTR DTX e-I-DRX Extended Idle Mode Discontinuous Reception BG95_Series_Hardware_Design 101 / 106 LPWA Module Series BG95 Series Hardware Design EPC ESD FDD FR GMSK GSM HSS I/O Inorm LED LNA LTE MO MS MT PAP PCB PDU PPP PSM RF RHCP Rx SISO SMS Evolved Packet Core Electrostatic Discharge Frequency Division Duplex Full Rate Gaussian Minimum Shift Keying Global System for Mobile Communications Home Subscriber Server Input/Output Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution Mobile Originated Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Power Saving Mode Radio Frequency Right Hand Circularly Polarized Receive Single Input Single Output Short Message Service BG95_Series_Hardware_Design 102 / 106 LPWA Module Series BG95 Series Hardware Design Time Division Duplexing Transmitting Direction Uplink User Equipment Unsolicited Result Code Maximum Voltage Value Normal Voltage Value Minimum Voltage Value

(Universal) Subscriber Identity Module Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio TDD TX UL UE URC

(U)SIM Vmax Vnorm Vmin VIHmax VIHmin VILmax VILmin VImax VImin VOHmax VOHmin VOLmax VOLmin VSWR BG95_Series_Hardware_Design 103 / 106 LPWA Module Series BG95 Series Hardware Design 10 Appendix B GPRS Coding Schemes Table 60: Description of Different Coding Schemes Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits Data Rate Kb/s Radio Block excl.USF and BCS 181 268 CS-1 CS-2 CS-3 CS-4 2/3 3/4 1/2 3 3 40 4 456 0 3 6 16 4 588 132 3 6 312 16 4 676 220 15.6 9.05 13.4 1 3 12 428 16

456 21.4 BG95_Series_Hardware_Design 104 / 106 LPWA Module Series BG95 Series Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 61: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA 1 1 2 1 2 2 3 1 2 2 3 4 3 4 BG95_Series_Hardware_Design 105 / 106 LPWA Module Series BG95 Series Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 BG95_Series_Hardware_Design 106 / 106 LPWA Module Series BG95 Series Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 62: EDGE Modulation and Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK C B A C B A B A A 8.80 kbps 17.60 kbps 35.20 kbps 11.2 kbps 22.4 kbps 44.8 kbps 14.8 kbps 29.6 kbps 59.2 kbps 17.6 kbps 35.2 kbps 70.4 kbps 22.4 kbps 44.8 kbps 89.6 kbps 29.6 kbps 59.2 kbps 118.4 kbps 44.8 kbps 89.6 kbps 179.2 kbps 54.4 kbps 108.8 kbps 217.6 kbps 59.2 kbps 118.4 kbps 236.8 kbps Coding Schemes MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 BG95_Series_Hardware_Design 107 / 106 LPWA Module Series BG95 Series Hardware Design 13 Appendix E Compulsory Certifications By the issue date of the document, BG95-M5 has been certified by JATE and TELEC. Figure 42: JATE/TELEC Certification ID of BG95-M5 BG95_Series_Hardware_Design 108 / 106

 

 

 

 

 

 

 

 

 

 

QUECTEL BG95-M5 a1-a00x LA BG95M5LA-64-SGNS SN:

IMEU:XXXXXXXXKXKKKXK FCC ID:XMR202005BG95M5 1C:10224A-2020BG95M5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Quectel Wireless Solutions Company Limited Request for Confidentiality Date: _2021/10/18_ Subject: Confidentiality Request for: _____ FCC ID: XMR202005BG95M5______ Pursuant to FCC 47 CRF 0.457(d) and 0.459 and IC RSP-100, Section 10, the applicant requests that a part of the subject FCC application be held confidential. Type of Confidentiality Requested Short Term Short Term ______(Insert Explanation as Necessary)______ Permanent Permanent Exhibit Parts List & Placement operational description

*Note:

______ FCC ID: XMR202005BG95M5 has spent substantial effort in developing this product and it is one of the first of its kind in industry. Having the subject information easily available to "competition" would negate the advantage they have achieved by developing this product. Not protecting the details of the design will result in financial hardship. Permanent Confidentiality:

The applicant requests the exhibits listed above as permanently confidential be permanently withheld from public review due to materials that contain trade secrets and proprietary information not customarily released to the public. Short-Term Confidentiality:

The applicant requests the exhibits selected above as short term confidential be withheld from public view for a period of ______ days from the date of the Grant of Equipment Authorization and prior to marketing. This is to avoid premature release of sensitive information prior to marketing or release of the product to the public. Applicant is also aware that they are responsible to notify TCB in the event information regarding the product or the product is made available to the public. TCB will then release the documents listed above for public disclosure pursuant to FCC Public Notice DA 04-1705. NOTE for Industry Canada Applications:

The applicant understands that until such time that IC distinguishes between Short Term and Permanent Confidentiality, either type of marked exhibit above will simply be marked Confidential when submitted to IC. Sincerely, By:

(Signature/Title1) Jean Hu

(Print name)

 

 

Quectel Wireless Solutions Company Limited POWER OF ATTORNEY DATE: October 18, 2021 To:

Federal Communications Commission, Authorization & Evaluation Division, 7435 Oakland Mills Road, Columbia, MD 21046 We, the undersigned, hereby authorize TA Technology (Shanghai) Co., Ltd.

/Han jinnan on our behalf, to apply to FCC on our equipment for FCC ID:

XMR202005BG95M. Any and all acts carried out by TA Technology (Shanghai) Co., Ltd. / Han jinnan on our behalf shall have the same effect as acts of our own. Sincerely, Signature:

Print name: Jean Hu Company: Quectel Wireless Solutions Company Limited 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, ChinaEmail: info@quectel.comWebsite: www.quectel.compage 1

 

 

The Spot-check Cover Sheet To demonstrate the change of deviated non-electrical characteristics components leaves no significant performance change with regards to the compliance concern Summary:

Change part:

U603 as 2G FEM (VC7912-62) to SKY68018-11 U703 as 4G FEM (LTE cat.M/NB-IOT) QM55001 to RR88916-81H Mode of Selection

(The item of re-test and spot check test to ensure consistency of performance Part 22 covering GSM850/LTE 850 bands Test Case Original Variant RF Power Output and Effective Radiated Power PASS Retest(GSM850 / LTE band5 / LTE band 26) Occupied Bandwidth PASS Band Edge Compliance PASS Peak-to-Average Power Ratio PASS Frequency Stability PASS Spurious Emissions at Antenna Terminals PASS Radiates Spurious Emission PASS Verify the worst combination of each frequency band(GSM850 / LTE band5 /

LTE band 26) Verify the worst combination of each frequency band(GSM850 / LTE band5 /

LTE band 26) Retest(GSM850 / LTE band5 / LTE band 26) Verify the worst combination of each frequency band(GSM850 / LTE band5 /

LTE band 26) Verify the worst combination of each frequency band(GSM850 / LTE band5 /

LTE band 26) Verify the worst combination of each frequency band(GSM850 / LTE band5 /

LTE band 26) Part 24 covering GSM1900/LTE 1900 bands Test Case Original Variant RF Power Output and Effective Radiated Power PASS Retest(GSM1900 / LTE Band 2 / LTE Band 25) Occupied Bandwidth PASS Band Edge Compliance PASS Peak-to-Average Power Ratio PASS Frequency Stability PASS Spurious Emissions at Antenna Terminals PASS Radiates Spurious Emission PASS Verify the worst combination of each frequency band(GSM1900 / LTE Band 2 /

LTE Band 25) Verify the worst combination of each frequency band(GSM1900 / LTE Band 2 /

LTE Band 25) Retest(GSM1900 / LTE Band 2 / LTE Band 25) Verify the worst combination of each frequency band(GSM1900 / LTE Band 2 /

LTE Band 25) Verify the worst combination of each frequency band(GSM1900 / LTE Band 2 /

LTE Band 25) Verify the worst combination of each frequency band(GSM1900 / LTE Band 2 /

LTE Band 25) Test Case Original Variant Part 90 covering LTE 800 bands RF Power Output and Effective Radiated Power Occupied Bandwidth Band Edge Compliance Frequency Stability Spurious Emissions at Antenna Terminals Radiates Spurious Emission PASS PASS PASS PASS PASS PASS Retest(LTE Band 26) Verify the worst combination of each frequency band(LTE Band 26) Verify the worst combination of each frequency band(LTE Band 26) Verify the worst combination of each frequency band(LTE Band 26) Verify the worst combination of each frequency band(LTE Band 26) Verify the worst combination of each frequency band(LTE Band 26) Peak-to-Average Power Ratio PASS Retest(LTE Band 26) Part 27 covering LTE 700/1700 bands Test Case Original Variant RF Power Output and Effective Radiated Power PASS Retest(LTE Band 4/66/12/13/71/85) Occupied Bandwidth PASS Band Edge Compliance PASS Verify the worst combination of each frequency band(LTE Band 4/66/12/13//7185) Verify the worst combination of each frequency band(LTE Band 4/66/12/13//7185) Peak-to-Average Power Ratio PASS Retest(LTE Band 4/66/12/13/71/85) Frequency Stability PASS Spurious Emissions at Antenna Terminals PASS Radiates Spurious Emission PASS Verify the worst combination of each frequency band(LTE Band 4/66/12/13/71/85) Verify the worst combination of each frequency band(LTE Band 4/66/12/13/71/85) Verify the worst combination of each frequency band(LTE Band 4/66/12/13/71/85) The comparison Power Output Original worst dBm Power Output New worst dBm 32.47 32.44 GSM850 GSM850 GSM1900 GSM1900 LTE5 CATM LTE5 CATM LTE5 NB-

IOT LTE26 CATM LTE26 CATM LTE26 CATM LTE26 CATM LTE2 CATM LTE2 CATM LTE2 NB-

IOT LTE25 CATM LTE25 CATM LTE25 NB-

IOT LTE4 CATM LTE4 CATM LTE4 NB-

26.41 30.17 25.98 23.98 23.98 23.61 23.99 23.97 23.66 23.38 23.50 23.64 23.95 23.60 23.65 23.95 23.69 23.76 23.74 26.40 29.58 25.74 23.59 23.47 23.26 23.51 23.48 23.55 23.26 23.50 23.64 23.44 23.29 23.33 23.28 23.15 23.28 23.21 Original worst %

deviation New worst %

deviation Emission designat Original worst Emission designat New worst 1.766 0.438 1.040 0.396 0.250 0.250 0.230 0.251 0.249 0.232 0.218 0.224 0.231 0.248 0.229 0.232 0.248 0.234 0.238 1.754 0.437 0.908 0.375 0.229 0.222 0.212 0.224 0.223 0.226 0.212 0.224 0.231 0.221 0.213 0.215 0.213 0.207 0.213 248KGXW 247KGXW 248KG7W 251KG7W 248KGXW 245K GXW 248KG7W 244K G7W 1M12G7D 1M12G7D 962KW7D 961KW7D 184KG7D 127K G7D 1M13MG7D 1M12G7D 961KW7D 956KW7D 1M11G7D 1M12G7D 962KW7D 963KW7D 1M14G7D 1M12G7D 982KW7D 956K W7D 187KG7D 62KG7D 1M14G7D 1M11G7D 991KW7D 952KW7D 185KG7D 121KG7D 1M13G7D 1M12G7D 974KW7D 967KW7D 0.209 184KG7D 132KG7D IOT LTE12 CATM LTE12 CATM LTE12 NB-

IOT LTE13 CATM LTE13 CATM LTE13 NB-

IOT LTE66 CATM LTE66 CATM LTE66 NB-

IOT LTE71 NB-

IOT LTE85 CATM LTE85 CATM LTE85 NB-

IOT 23.60 24.44 23.44 23.30 23.33 23.71 23.89 23.76 23.67 23.69 23.41 23.32 23.54 22.67 22.73 22.84 22.92 22.83 22.80 23.45 23.51 23.16 23.32 22.93 22.87 22.72 0.237 0.229 0.278 0.221 0.214 0.215 0.235 0.245 0.238 0.233 0.234 0.219 0.215 0.226 0.185 0.187 0.192 0.196 0.192 0.191 0.221 0.224 0.207 0.215 0.196 0.194 0.187 1M12G7D 1M1167G7D 952KW7D 963KW7D 185K G7D 130KG7D 1M12G7D 1M11G7D 956KW7D 947KW7D 186K G7D 119KG7D 1M12G7D 1M13G7D 966KW7D 962kW7D 186K G7D 128K G7D 184KG7D 134KG7D 1M14G7D 1.1178G7D 958KW7D 958KW7D 184KG7D 127KG7D LTE5 CATM LTE5 CATM LTE5 NB-

IOT LTE26 part22 CATM LTE26 part22 CATM LTE26 Part90 CATM LTE26 Part90 CATM LTE2 CATM LTE2 CATM LTE2 NB-

IOT LTE25 CATM LTE25 CATM LTE25 NB-IOT LTE4 CATM PAPR Original worst dBm PAPR New worst dBm Frequency Frequency Stability Original worst ppm Stability New (ppm) Radiates Spurious Emission Original worst

(dBm/MHz) Radiates Spurious Emission New

(dBm/MHz) GSM850 1.49 GSM1900 1.49 5.83 5.86 11.46 10.61 0.01 0.01 0.01 11.57 10.61 0.01 7.15 7.23 0.01 9.71 9.74 0.01 34.2 32.82 10.32 10.45 0.01 34.2 32.82 9.75 9.46 0.01 0.01 34.8 33.5 10.3 10.18 0.01 34.8 33.5 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 28.2 25.2 34.7 34.7 33.8 26.2 26.2 27.7 26.3 26.3 26.7 24.5 36.85 30.5 36.56 36.56 19.45 29.84 29.84 30.52 29.88 29.88 30.37 29.04 9.86 10.95 0.01 10.24 10.84 0.01 7.24 7.17 0.01 11.36 9.68 0.01 11.31 10.26 0.01 7.21 7.09 0.01 9.94 9.54 0.01 10.53 9.74 0.01 24.5 29.04 7.3 7.32 0.01 23.52 30.62 LTE4 CATM LTE4 NB-

IOT LTE12 CATM LTE12 CATM LTE12 NB-IOT LTE13 CATM LTE13 CATM LTE13 NB-IOT LTE66 CATM LTE66 CATM LTE66 NB-IOT LTE71 NB-IOT LTE85 CATM LTE85 CATM LTE85 NB-IOT Conclusion:

11.48 10.53 0.01 12.1 11.82 0.01 7.17 7.3 0.01 9.49 9.46 0.01 10.28 10.12 0.01 7.16 0.01 10.09 9.56 0.01 10.74 10.08 0.01 7.23 7.28 0.01 10.25 9.94 0.01 10.23 11.89 0.01 7.17 7.37 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 34.8 34.8 28.2 18.35 18.35 7.1 25.7 25.7 28.8 36.1 36.1 28.7 34.48 34.48 16.79 9.2 9.2 21.76 29.55 29.55 14.55 32.28 32.28 19.81 7.29 7.34 0.01 19.99 32.05 As reflected from the result of the summarized table above, all items of the re-test, and spot check with the original worst remains compliant, further with lower value in percentage of the deviation. Signature:

Print name: Jean Hu Date: 11/11/2021 Company: Quectel Wireless Solutions Co., Ltd.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Quectel Wireless Solutions Company Limited Declaration of the Modular Approval Applicant / Grantee FCC ID:

Model:

The single module transmitter has been evaluated then tested meeting the requirements under Part 15C Section 212 as below:

Quectel Wireless Solutions Company Limited XMR202005BG95M5 BG95-M5 Modular approval requirement EUT Condition

(a) The radio elements of the modular transmitter must have their own shielding. The physical crystal and tuning capacitors may be located external to the shielded radio elements. The radio elements of the modular transmitter have their own shielding. Com ply YES

(b) The modular transmitter have buffered modulation/data inputs are provided) to ensure that the module will comply with part 15 requirements under conditions of excessive data rates or over-modulation. inputs (if such must

(c)The modular transmitter must have its own powersupply regulation. The modular has buffered data inputs, it is integrated in chip. Please see schematic.pdf YES All power lines derived from the host device are regulated before energizing other circuits internal to the BG95-M5. Please see schematic.pdf YES Quectel Wireless Solutions Company Limited

(d) The must modular transmitter comply with the antenna and transmission system requirements of Sections 15.203, 15.204(b) and 15.204(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of Section 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph (b) of this section.

(e)The be must modular transmitter tested in a stand-alone configuration, i.e., the module must not be inside another device during testing for compliance with part 15 requirements. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with the module (see Section 15.27(a)). The length of these lines shall be the length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified and commercially available (see Section 15.31(i))mustnotbeinsideanotherdeviceduringtesting.

(f)The modular be equipped with either a permanently affixed label or must be capable of electronically displaying its FCC identification number. transmitter must

(g) The modular transmitter must comply with any specific rules or operating requirements that ordinarily apply to a complete transmitter and the manufacturer must provide adequate instructions along with the module to explain any suchrequirements. A copy of these instructions must be included in the application for equipmentauthorizationrequirements,whicharebasedonthei ntendeduse/configurations.

(h)The modular transmitter must comply with any applicable RF exposure requirements in its final configuration. A permanently attached antenna or unique antenna connector is not a requirement for licensed modules. YES The BG95-M5 was tested in a stand alone configuration via a PCMCIA extender. Please see spurious setup YES The label position of BG95-M5 is clearly indicated. If the FCC ID of the module cannot be seen when it is installed, then the host label must include the text:

Contains FCC ID: XMR202005BG95M5. Please see the label.pdf The BG95-M5 is compliant with all applicable FCC rules. Detail instructions are given in the User Manual. YES YES The BG95-M5 is approved to comply with the applicable RF exposure requirement, please see the MPE evaluation with 20cm as the distance restriction. YES Quectel Wireless Solutions Company Limited 2020/7/16 Signature Title: Project Manager Limited Dated By:

Jean Hu Printed On behalf of :

Quectel Wireless Solutions Company Telephone:

+86-21-51086236 ext 6511