FCC ID: XMR2021BG951AGL LTE Cat M1/NB Module

BG950A-GL&BG951A-GL Hardware Design LPWA Module Series Version: 1.0.1 Date: 2021-11-04 Status: Preliminary LPWA Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters:

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http://www.quectel.com/support/technical.htm. Or email us at: support@quectel.com. Legal Notices We offer information as a service to you. The provided information is based on your requirements and we make every effort to ensure its quality. You agree that you are responsible for using independent analysis and evaluation in designing intended products, and we provide reference designs for illustrative purposes only. Before using any hardware, software or service guided by this document, please read this notice carefully. Even though we employ commercially reasonable efforts to provide the best possible experience, you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as available basis. We may revise or restate this document from time to time at our sole discretion without any prior notice to you. Use and Disclosure Restrictions License Agreements Documents and information provided by us shall be kept confidential, unless specific permission is granted. They shall not be accessed or used for any purpose except as expressly provided herein. Copyright Our and third-party products hereunder may contain copyrighted material. Such copyrighted material shall not be copied, reproduced, distributed, merged, published, translated, or modified without prior written consent. We and the third party have exclusive rights over copyrighted material. No license shall be granted or conveyed under any patents, copyrights, trademarks, or service mark rights. To avoid ambiguities, purchasing in any form cannot be deemed as granting a license other than the normal non-exclusive, royalty-free license to use the material. We reserve the right to take legal action for noncompliance with abovementioned requirements, unauthorized use, or other illegal or malicious use of the material. BG95xA-GL_Hardware_Design 1 / 84 LPWA Module Series Trademarks Except as otherwise set forth herein, nothing in this document shall be construed as conferring any rights to use any trademark, trade name or name, abbreviation, or counterfeit product thereof owned by Quectel or any third party in advertising, publicity, or other aspects. Third-Party Rights This document may refer to hardware, software and/or documentation owned by one or more third parties

(third-party materials). Use of such third-party materials shall be governed by all restrictions and obligations applicable thereto. We make no warranty or representation, either express or implied, regarding the third-party materials, including but not limited to any implied or statutory, warranties of merchantability or fitness for a particular purpose, quiet enjoyment, system integration, information accuracy, and non-infringement of any third-party intellectual property rights with regard to the licensed technology or use thereof. Nothing herein constitutes a representation or warranty by us to either develop, enhance, modify, distribute, market, sell, offer for sale, or otherwise maintain production of any our products or any other hardware, software, device, tool, information, or product. We moreover disclaim any and all warranties arising from the course of dealing or usage of trade. Disclaimer a) We acknowledge no liability for any injury or damage arising from the reliance upon the information. b) We shall bear no liability resulting from any inaccuracies or omissions, or from the use of the information contained herein. c) While we have made every effort to ensure that the functions and features under development are free from errors, it is possible that they could contain errors, inaccuracies, and omissions. Unless otherwise provided by valid agreement, we make no warranties of any kind, either implied or express, and exclude all liability for any loss or damage suffered in connection with the use of features and functions under development, to the maximum extent permitted by law, regardless of whether such loss or damage may have been foreseeable. d) We are not responsible for the accessibility, safety, accuracy, availability, legality, or completeness of information, advertising, commercial offers, products, services, and materials on third-party websites and third-party resources. Copyright Quectel Wireless Solutions Co., Ltd. 2021. All rights reserved. BG95xA-GL_Hardware_Design 2 / 84 LPWA Module Series Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation interference with of wireless appliances in an aircraft communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. is forbidden to prevent Wireless devices may cause interference on sensitive medical equipment, so the restrictions on the use of wireless devices when in please be aware of hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions, such as when the mobile bill is unpaid or the (U)SIM card is invalid. When emergent help is needed in such conditions, use emergency call if the device supports it. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. In an emergency, the device with emergency call function cannot be used as the only contact method considering network connection cannot be guaranteed under all circumstances. The cellular terminal or mobile contains a transceiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV sets, radios, computers or other electric equipment. In locations with explosive or potentially explosive atmospheres, obey all posted signs and turn off wireless devices such as mobile phone or other cellular terminals. Areas with explosive or potentially explosive atmospheres include fueling areas, below decks on boats, fuel or chemical transfer or storage facilities, and areas where the air contains chemicals or particles such as grain, dust or metal powders. BG950A-GL&BG951A-GL_Hardware_Design 3 / 84 LPWA Module Series About the Document Revision History Version Date Author Description

2021-07-07 Creation of the document 1.0.0 2021-07-07 Preliminary Lex LI/

Ben JIANG Lex LI/

Ben JIANG 1.0.1 2021-11-04 Lex LI/

Ben JIANG

(Table 3). Preliminary:

1. Updated pin 27 from AUX/GNSS_TXD into CLI/GNSS_TXD;

Updated pin 28 from AUX/GNSS_RXD into CLI/GNSS_RXD;

Updated pin 94 from RESERVED into CLI_RXD;

Updated pin 95 from RESERVED into CLI_TXD;

Updated pin 75 from RESERVED into GNSS_BOOT;

Updated pin 76 from RESERVED into GNSS_NRST;

Updated pin 97 from RESERVED into GNSS_EN;

Updated pin 98 from RESERVED into SFNIND_1PPS. 2. Added the weight of BG950A-GL&BG951A-GL (Table 2). 3. Added the GNSS function description of BG951A-GL 4. Updated the USB serial driver information (Table 4). 5. Added the block diagram of BG951A-GL (Figure 2). 6. Updated the power up timing (Figure 9). 7. Updated the power down timing in (Figure 10&11) 8. Added the recovery mode (Chapter 3.1&Chapter 3.6). 9. Added the steps to let the module enter e-l-DRX mode 10. Updated the description of sleep mode (Chapter 3.5). 11. Updated the description of the PON_TRIG pin (Chapter 12. Updated the information UART interface (Table

(Chapter 3.4). 3.3&Chapter 3.11). 4&Chapter 4.3). BG950A-GL&BG951A-GL_Hardware_Design 4 / 84 LPWA Module Series 13. Updated the reference design of PSM_IND, NET_STATUS and STATUS (Figure 22&Figure 23&Figure 24). 14. Added the description of GNSS layout guidelines 15. Updated the power consumption of BG950A-GL (Chpater

(Chapter 5.3). 6.3). 16. Added the top views of BG951A-GL (Chapter 7.3) 17. Updated the packaging specifications (Chpater 8.3). BG950A-GL&BG951A-GL_Hardware_Design 5 / 84 LPWA Module Series Contents Safety Information...................................................................................................................................................... 3 About the Document..................................................................................................................................................4 Contents........................................................................................................................................................................6 Table Index................................................................................................................................................................... 8 Figure Index............................................................................................................................................................... 10 1 2 Introduction....................................................................................................................................................... 11 Special Mark..........................................................................................................................................11 1.1. Product Overview.............................................................................................................................................12 Frequency Bands and Functions.......................................................................................................13 2.1. Key Features.........................................................................................................................................13 2.2. Functional Diagram..............................................................................................................................15 2.3. Pin Assignment..................................................................................................................................... 18 2.4. Pin Description......................................................................................................................................19 2.5. EVB.........................................................................................................................................................25 2.6. 3.5.1. 3.6. 3.7. 3.1. 3.2. 3.3. 3.4. 3.5. 3 Operating Characteristics..............................................................................................................................26 Operating Modes.................................................................................................................................. 26 Airplane Mode.......................................................................................................................................27 Power Saving Mode (PSM)................................................................................................................ 27 Extended Idle Mode DRX (e-I-DRX)................................................................................................. 28 Sleep Mode........................................................................................................................................... 29 UART Application Scenario...................................................................................................... 29 Recovery Mode.....................................................................................................................................30 Power Supply........................................................................................................................................ 31 Power Supply Pins..................................................................................................................... 31 Voltage Stability Requirements................................................................................................31 Power Supply Monitoring.......................................................................................................... 33 Turn On.................................................................................................................................................. 33 Turn on the Module with PWRKEY......................................................................................... 33 Turn Off.................................................................................................................................................. 35 Turn off with PWRKEY and PON_TRIG.................................................................................35 Turn off the Module with AT Command and PON_TRIG.....................................................35 3.10. Reset...................................................................................................................................................... 36 PON_TRIG............................................................................................................................................ 38 3.11. 3.7.1. 3.7.2. 3.7.3. 3.9.1. 3.9.2. 3.8.1. 3.8. 3.9. 4 Application Interfaces.....................................................................................................................................40

(U)SIM Interface................................................................................................................................... 40 4.1. USB Interface*...................................................................................................................................... 42 4.2. UART Interfaces................................................................................................................................... 44 4.3. PCM and I2C Interfaces*.................................................................................................................... 47 4.4. ADC Interfaces......................................................................................................................................48 4.5. BG950A-GL&BG951A-GL_Hardware_Design 6 / 84 LPWA Module Series 4.6. 4.7. 4.8. Indication Signals................................................................................................................................. 49 PSM Status Indication............................................................................................................... 49 4.6.1. Network Status Indication......................................................................................................... 50 4.6.2. STATUS....................................................................................................................................... 51 4.6.3. 4.6.4. MAIN_RI*.....................................................................................................................................52 GRFC Interfaces*................................................................................................................................. 52 GPIO Interface*.................................................................................................................................... 53 5.2. 5.1.1. 5.1.2. 5.1.3. 5.1.4. RF Specifications............................................................................................................................................. 54 Cellular Network................................................................................................................................... 54 5.1. Antenna Interface & Frequency Bands.................................................................................. 54 Tx Power......................................................................................................................................55 Rx Sensitivity...............................................................................................................................56 Reference Design...................................................................................................................... 57 GNSS..................................................................................................................................................... 58 Antenna Interface & Frequency Bands.................................................................................. 58 5.2.1. 5.2.2. GNSS Performance................................................................................................................... 59 Reference Design...................................................................................................................... 60 5.2.3. Layout Guidelines.................................................................................................................................60 RF Routing Guidelines........................................................................................................................ 61 Antenna Design Requirements..........................................................................................................63 RF Connector Recommendation....................................................................................................... 63 5.3. 5.4. 5.5. 5.6. Reliability and Electrical Characteristics.................................................................................................. 65 Absolute Maximum Ratings................................................................................................................65 6.1. Power Supply Ratings......................................................................................................................... 65 6.2. Power Consumption.............................................................................................................................66 6.3. ESD.........................................................................................................................................................70 6.4. Operating and Storage Temperatures.............................................................................................. 71 6.5. 7 Mechanical Information.................................................................................................................................. 72 Mechanical Dimensions...................................................................................................................... 72 Recommended Footprint.................................................................................................................... 74 Top and Bottom Views.........................................................................................................................75 7.1. 7.2. 7.3. Storage, Manufacturing & Packaging.........................................................................................................76 Storage Conditions...............................................................................................................................76 8.1. Manufacturing and Soldering............................................................................................................. 77 8.2. Packaging Specifications.................................................................................................................... 78 8.3. Carrier Tape.................................................................................................................................78 Plastic Reel................................................................................................................................. 79 Packing Process.........................................................................................................................80 8.3.1. 8.3.2. 8.3.3. 9 Appendix References......................................................................................................................................81 5 6 8 BG950A-GL&BG951A-GL_Hardware_Design 7 / 84 LPWA Module Series Table Index Table 1: Special Mark................................................................................................................................................ 11 Table 2: Brief Introduction of BG950A-GL & BG951A-GL Modules..................................................................12 Table 3: Wireless Network Type..............................................................................................................................13 Table 4: Key Features............................................................................................................................................... 13 Table 5: I/O Parameters Definition..........................................................................................................................19 Table 6: Pin Description............................................................................................................................................20 Table 7: Overview of Operating Modes..................................................................................................................26 Table 8: Pin Definition of Power Supply.................................................................................................................31 Table 9: Pin Definition of PWRKEY........................................................................................................................ 33 Table 10: Pin Definition of RESET_N.....................................................................................................................36 Table 11: Pin Definition of PON_TRIG................................................................................................................... 38 Table 12: Pin Definition of (U)SIM Interface..........................................................................................................40 Table 13: Pin Definition of USB Interface.............................................................................................................. 42 Table 14: Pin Definition of Main UART Interface..................................................................................................44 Table 15: Pin Definition of CLI UART Interface.................................................................................................... 45 Table 16: Pin Definition of Debug UART Interface...............................................................................................45 Table 17: Pin Definition of CLI/GNSS UART Interface........................................................................................45 Table 18: Pin Definition of PCM Interface..............................................................................................................47 Table 19: Pin Definition of I2C Interface................................................................................................................ 47 Table 20: Pin Definition of ADC Interfaces............................................................................................................ 48 Table 21: Characteristics of ADC Interfaces......................................................................................................... 49 Table 22: Pin Definition of PSM_IND..................................................................................................................... 49 Table 23: Pin Definition of NET_STATUS..............................................................................................................50 Table 24: Working State of Network Connection Status Indication.................................................................. 50 Table 25: Pin Definition of STATUS........................................................................................................................ 51 Table 26: Pin Definition of MAIN_RI....................................................................................................................... 52 Table 27: Default Behaviors of MAIN_RI...............................................................................................................52 Table 28: Pin Definition of GRFC Interfaces......................................................................................................... 52 Table 29: Truth Table of GRFC Interfaces............................................................................................................. 53 Table 30: Pin Definition of GPIO Interface............................................................................................................ 53 Table 31: Pin Definition of Cellular Network Interface.........................................................................................54 Table 32: Operating Frequency of BG950A-GL & BG951A-GL........................................................................ 54 Table 33: RF Output Power......................................................................................................................................55 Table 34: Conducted RF Receiving Sensitivity of BG950A-GL......................................................................... 56 Table 35: Conducted RF Receiving Sensitivity of BG951A-GL......................................................................... 57 Table 36: Pin Definition of GNSS Antenna Interface........................................................................................... 58 Table 37: GNSS Frequency..................................................................................................................................... 59 Table 38: GNSS Performance................................................................................................................................. 59 Table 39: Antenna Design Requirements.............................................................................................................. 63 Table 40: Absolute Maximum Ratings....................................................................................................................65 Table 41: The Modules Power Supply Ratings....................................................................................................65 BG950A-GL&BG951A-GL_Hardware_Design 8 / 84 LPWA Module Series Table 42: BG950A-GL Power Consumption......................................................................................................... 66 Table 43: BG951A-GL Power Consumption......................................................................................................... 68 Table 44: BG950A-GL GNSS Current Consumption...........................................................................................70 Table 45: BG951A-GL GNSS Current Consumption...........................................................................................70 Table 46: Electrostatics Discharge Characteristics (Temperature: 25 C, Humidity: 45 %)......................... 71 Table 47: Operating and Storage Temperatures.................................................................................................. 71 Table 48: Recommended Thermal Profile Parameters....................................................................................... 78 Table 49: Carrier Tape Dimension Table (Unit: mm)............................................................................................79 Table 50: Plastic Reel Dimension Table (Unit: mm).............................................................................................79 Table 51: Related Documents................................................................................................................................. 81 Table 52: Terms and Abbreviations.........................................................................................................................81 BG950A-GL&BG951A-GL_Hardware_Design 9 / 84 LPWA Module Series Figure Index Figure 1: Functional Diagram of BG950A-GL.......................................................................................................16 Figure 2: Functional Diagram of BG951A-GL.......................................................................................................17 Figure 3: Pin Assignment of BG950A-GL & BG951A-GL (Top View)............................................................... 18 Figure 4: Sleep Mode Application via UART Interface........................................................................................30 Figure 5: Power Supply Limits During Burst Transmission................................................................................ 32 Figure 6: Star Structure of the Power Supply....................................................................................................... 32 Figure 7: Turn on the Module with Driving Circuit................................................................................................33 Figure 8: Turn on the Module a Button.................................................................................................................. 34 Figure 9: Power-up Timing.......................................................................................................................................34 Figure 10: Power-down Timing (PWRKEY & PON_TRIG.............................................................................. 35 Figure 11: Power-down TimingAT Command & PON_TRIG......................................................................36 Figure 12: Reference Circuit of RESET_N with Driving Circuit......................................................................... 37 Figure 13: Reference Circuit of RESET_N with a Button................................................................................... 37 Figure 14: Reset Timing........................................................................................................................................... 37 Figure 15: Reference Circuit of PON_TRIG......................................................................................................... 38 Figure 16: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector.............................41 Figure 17: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector...............................41 Figure 18: Reference Circuit of USB Application................................................................................................. 43 Figure 19: Main UART Reference Design (Translator Chip)..............................................................................46 Figure 20: Main UART Reference Design (Transistor Circuit)...........................................................................46 Figure 21: Reference Design of PCM Application with Audio Codec............................................................... 48 Figure 22: Reference Circuit of the PSM Status Indication................................................................................50 Figure 23: Reference Circuit of Network Status Indication................................................................................ 51 Figure 24: Reference Circuits of STATUS.............................................................................................................51 Figure 25: Reference Circuit of Main Antenna Interface.....................................................................................58 Figure 26: Reference Circuit of GNSS Antenna...................................................................................................60 Figure 27: Microstrip Design on a 2-layer PCB....................................................................................................61 Figure 28: Coplanar Waveguide Design on a 2-layer PCB................................................................................61 Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground).......................62 Figure 30: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground).......................62 Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm)................................................................... 63 Figure 32: Mechanicals of U.FL-LP Connectors.................................................................................................. 64 Figure 33: Space Factor of Mated Connector (Unit: mm).................................................................................. 64 Figure 34: Module Top and Side Dimensions (Unit: mm)...................................................................................72 Figure 35: Module Bottom Dimensions (Bottom View, Unit: mm)..................................................................... 73 Figure 36: Recommended Footprint (Top View).................................................................................................. 74 Figure 37: Top & Bottom Views of BG950A-GL & BG951A-GL.........................................................................75 Figure 38: Recommended Reflow Soldering Thermal Profile........................................................................... 77 Figure 39: Carrier Tape Dimension Drawing.........................................................................................................79 Figure 40: Plastic Reel Dimension Drawing......................................................................................................... 79 Figure 41: Packaging Process................................................................................................................................ 80 BG950A-GL&BG951A-GL_Hardware_Design 10 / 84 LPWA Module Series 1 Introduction This document defines BG950A-GL & BG951A-GL modules and describes their air interfaces and hardware interfaces which connected to your applications. It can help you quickly understand interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, makes it easy to design and to set up mobile applications with the module. 1.1. Special Mark Table 1: Special Mark Mark Definition

Unless otherwise specified, when an asterisk (*) is used after a function, feature, interface, pin name, AT command, or argument, it indicates that the function, feature, interface, pin, AT command, or argument is under development and currently not supported; and the asterisk (*) after a model indicates that the sample of such model is currently unavailable. BG950A-GL&BG951A-GL_Hardware_Design 11 / 84 LPWA Module Series 2 Product Overview BG950A-GL/BG951A-GL module is an embedded IoT (LTE Cat M1, LTE Cat NB1/Cat NB2*) wireless communication module. It provides data connectivity on LTE HD-FDD network, and supports half-duplex functionality to meet your specific operation in LTE network. application demands. It also provides GNSS and voice* 1 BG950A-GL and BG951A-GL modules are industrial-grade modules for industrial and commercial applications only. BG950A-GL/BG951A-GL module is an SMD type module which can be engineered into M2M applications, such as smart metering, tracking system, security, wireless POS, and other wearable devices, etc. Related information and details are listed in the table below:

Table 2: Brief Introduction of BG950A-GL & BG951A-GL Modules Categories Dimensions Weight Packaging and pins number LGA;102 pieces

(23.6 0.2) mm (19.9 0.2) mm (2.2 0.2) mm Approx.2.15 g Wireless functions LTE and GNSS Variants BG950A-GL, BG951A-GL 1 BG950A-GL & BG951A-GL supports VoLTE* (Voice over LTE) under LTE Cat M1. BG950A-GL&BG951A-GL_Hardware_Design 12 / 84 LPWA Module Series 2.1. Frequency Bands and Functions Table 3: Wireless Network Type Module Supported Bands 2 Power Class GNSS Cat M1 3:

LTE HD-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/B18/B19/B20/

B25/B26/B27/B28/B66 Cat NB1/NB2* 4:

LTE HD-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/B17/B18/B19/

B20/B25/B28/B66 Power Class 3

(23 dBm 2.7 dB) GPS, GLONASS GPS, GLONASS, BeiDou, Galileo, QZSS, SBAS. BG950A-GL BG951A-GL NOTE Please noted that BG950A-GL integrates the GNSS function inside the baseband chip, while for BG951A-GL, the internal baseband chip and GNSS chip are separated. Therefore, BG950A-GL does not support concurrent operation of LTE and GNSS, however, LTE and GNSS are concurrency for BG951A-GL. 2.2. Key Features Table 4: Key Features Features Details Power Supply SMS*

Supply voltage: 2.24.35 V Typical supply voltage: 3.3 V Text and PDU mode Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default 2 LTE HD-FDD B26 and B27 are supported by LTE Cat M1 only. 3 BG950A-GL and BG951A-GL support VoLTE* (Voice over LTE) under LTE Cat M1. 4 LTE Cat NB2* is backward compatible with LTE Cat NB1. BG950A-GL&BG951A-GL_Hardware_Design 13 / 84 LPWA Module Series

(U)SIM Interface Supports 1.8 V (U)SIM card only Audio Features PCM Interface*

I2C Interface*

Supports one digital audio interfaces: PCM and I2C LTE: VoLTE* under LTE Cat M1 Support one digital audio interface: PCM interface for VoLTE* only Used for audio function with external codec One I2C interface Multi-master mode is not supported Compliant with USB 2.0 specifications Used AT command communication, data transmission, software USB Interface*

USB serial driver:

debugging and firmware upgrade

- Windows 7/8/8.1/10

Linux 2.65.12

Android 4.x/5.x/6.x/7.x/8.x/9.x/10.x/11.x system Main UART:

Used for AT command communication and data transmission Baud rate: 115200 bps baud by default The default frame format is 8N1 (8 data bits, no parity, 1 stop bit) Supports RTS and CTS hardware flow control CLI UART:

Used for firmware upgrade, software debugging, log output, GNSS data and NMEA sentences output 115200 bps baud rate by default The default frame format is 8N1 (8 data bits, no parity, 1 stop bit) Supports RTS and CTS hardware flow control Debug UART:

Used for RF calibration and log output 961200 bps baud rate by default The default frame format is 8N1 (8 data bits, no parity, 1 stop bit) Supports RTS and CTS hardware flow control CLI/GNSS UART:

Used for GNSS data and NMEA sentences output 115200 bps baud rate by default UART Interfaces Network Indication NET_STATUS to indicate network connectivity status. AT Commands Antenna Interface 3GPP TS 27.007 and 3GPP TS 27.005 AT commands Quectel enhanced AT commands Main antenna interface (ANT_MAIN) GNSS antenna interface (ANT_GNSS) 50 impedance Transmitting Power Class 3 (23 dBm 2.7 dB) for LTE HD-FDD bands LTE Features Support 3GPP Rel-14*

Supports LTE Cat M1 and LTE Cat NB1/NB2*

BG950A-GL&BG951A-GL_Hardware_Design 14 / 84 LPWA Module Series Supports 1.4 MHz RF bandwidth for LTE Cat M1 Support 200 kHz RF bandwidth for LTE Cat NB1/NB2*

Cat M1: 588 kbps (DL)/1119 kbps (UL) Cat NB1: 27.2 kbps (DL)/62.5 kbps (UL) Cat NB2*: 127 kbps (DL)/158 kbps (UL) Support PPP/TCP/UDP/SSL/MQTT/FTP(S)/HTTP(S)/LwM2M/IPv4/IPv6/

TLS/DTLS/PING/CoAP/NITZ protocols Supports PAP and CHAP for PPP connections BG950A-GL: supports GPS, GLONASS BG951A-GL: supports GPS, GLONASS, BeiDou, Galileo, QZSS, SBAS Operating temperature range 5: -35 to +75 C Extended temperature range 6: -40 to +85 C Storage temperature range: -40 to +90 C CLI UART interface USB 2.0 interface*

DFOTA Internet Protocol Features GNSS Features Temperature Range Firmware Upgrade RoHS All hardware components are fully compliant with EU RoHS directive The following figure shows the block diagrams of the modules and illustrates the major functional 2.3. Functional Diagram parts. Power management Baseband Radio frequency Peripheral interface 5 Within the operating temperature range, the module meets 3GPP specifications. 6 Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice*, SMS* and data transmission, without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the temperature returns to the operating temperature range, the module meets 3GPP specifications again. BG950A-GL&BG951A-GL_Hardware_Design 15 / 84 LPWA Module Series Figure 1: Functional Diagram of BG950A-GL BG950A-GL&BG951A-GL_Hardware_Design 16 / 84 LPWA Module Series Figure 2: Functional Diagram of BG951A-GL NOTE PCM and I2C interfaces are used for VoLTE* only. BG950A-GL&BG951A-GL_Hardware_Design 17 / 84 LPWA Module Series 2.4. Pin Assignment The following figure illustrates the pin assignment of BG950A-GL and BG951A-GL. Figure 3: Pin Assignment of BG950A-GL & BG951A-GL (Top View) BG950A-GL&BG951A-GL_Hardware_Design 18 / 84 LPWA Module Series NOTE 1. ADC input voltage must not exceed 1.8 V. 2. Keep all RESERVED pins and unused pins unconnected. 3. GND pins should be connected to ground in the design. 4. PCM and I2C interfaces are used for VoLTE* only. 5. Only BG951A-GL supports GNSS_BOOT (pin 75), GNSS_NRST (pin 76), GNSS_EN (pin 97), SFNIND_1PPS (pin 98). 6. For BG950A-GL, pin 27 and pin 28 can only be used as CLI UART interface. When pin 27 and pin 28 are used as CLI_TXD and CLI_RXD, the two pins should be connected to pin 95 and pin 94 respectively inside the module. For BG951A-GL, pin 27 and pin 28 can only be used as GNSS UART interface. 2.5. Pin Description The following table shows the DC characteristics and pin descriptions. Table 5: I/O Parameters Definition Type AI AIO DI DO DIO OD PI PO Description Analog Input Analog Input/Output Digital Input Digital Output Digital Input/Output Open Drain Power Input Power Output BG950A-GL&BG951A-GL_Hardware_Design 19 / 84 LPWA Module Series Table 6: Pin Description Power Supply Pin No. Pin No. Pin No. Pin No. Pin No. 8 9 Pin Name I/O Description DC Characteristics Comment VBAT_BB 32 PI VBAT_RF 33 PI VDD_EXT 29 PO Power supply for the modules baseband part Power supply for the modules RF part Provide 1.8 V for external circuits Vmax = 4.35 V Vmin = 2.2 V Vnom = 3.3 V See NOTE 1. See NOTE 1. Vnom = 1.8 V IOmax = 50 mA If unused, keep this pin open. GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 6774, 7982, 8991, 100102 Turn on/off Reset Pin Name I/O Description DC Characteristics Comment PWRKEY 15 DI Turn on/off the module VILmax = 0.3 V VIHmin = 1.0 V Internally pulled up with a 470 k resistor. Pin Name I/O Description DC Characteristics Comment RESET_N 17 DI Reset the module Status Indication VILmax = 0.3 V VIHmin = 1.3 V Internally pulled up with a 470 k resistor. Pin Name I/O Description DC Characteristics Comment PSM_IND 1 DO STATUS 20 DO NET_STATUS 21 DO USB Interface*

Indicate the modules power saving mode Indicate the modules operation status Indicate the modules network activity status VOLmax = 0.36 V VOHmin = 1.44 V 1.8 V power domain. If unused, keep these pins open. Pin Name I/O Description DC Characteristics Comment USB_VBUS AI USB connection detect Vnom = 5.0 V Typical 5.0 V USB_DP AIO USB differential data (+) USB_DM 10 AIO USB differential data (-) Vmax = 4.1 V Vmin = -0.2 V Compliant with USB 2.0 standard specification. BG950A-GL&BG951A-GL_Hardware_Design 20 / 84 Pin Name I/O Description DC Characteristics Comment LPWA Module Series Require differential impedance of 90 . 1.8 V power domain. If unused, keep this pin open. Only 1.8 V (U)SIM card is supported. 1.8 V power domain. VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V Vmax = 1.9 V Vmin = 1.7 V VOLmax = 0.36 V VOHmin = 1.44 V VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VOLmax = 0.36 V VOHmin = 1.44 V VOLmax = 0.36 V VOHmin = 1.44 V

(U)SIM Interface Pin No. USIM_DET 42 DI USIM_VDD 43 PO

(U)SIM card hot-plug detect

(U)SIM card power supply USIM_RST 44 DO

(U)SIM card reset USIM_DATA 45 DIO

(U)SIM card data USIM_CLK 46 DO

(U)SIM card clock Specified ground for

(U)SIM card USIM_GND 47 Main UART Interface Pin No. Pin Name I/O Description DC Characteristics Comment MAIN_DTR 30 DI Main UART data terminal ready MAIN_RXD 34 DI Main UART receive MAIN_TXD 35 DO Main UART transmit MAIN_CTS 36 DO MAIN_RTS 37 DI MAIN_DCD 38 DO MAIN_RI*

39 DO DTE clear to send signal from DCE (Connect to DTEs RTS) DTE request to send signal from DCE

(Connect to DTEs RTS) Main UART data carrier detect Main UART ring indication VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VOLmax = 0.36 V VOHmin = 1.44 V VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VOLmax = 0.36 V VOHmin = 1.44 V 1.8 V power domain. If these pins are unused, keep them open. BG950A-GL&BG951A-GL_Hardware_Design 21 / 84 LPWA Module Series Pin No. Pin No. Pin No. Pin No. 4 5 6 7 CLI UART Interface Pin Name I/O Description DC Characteristics Comment CLI_RXD 94 DI CLI UART receive CLI_TXD 95 DO CLI UART transmit DBG UART Interface DBG_RXD 22 DI Debug UART receive DBG_TXD 23 DO Debug UART transmit CLI/GNSS UART Interface 7 VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VOLmax = 0.36 V VOHmin = 1.44 V 1.8 V power domain. If these pins are unused, keep them open. VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VOLmax = 0.36 V VOHmin = 1.44 V 1.8 V power domain. If these pins are unused, keep them open. Pin Name I/O Description DC Characteristics Comment Pin Name I/O Description DC Characteristics Comment CLI/GNSS_TXD 27 DO CLI/GNSS UART transmit CLI/GNSS_RXD 28 DI CLI/GNSS UART receive VOLmax = 0.36 V VOHmin = 1.44 V VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V 1.8 V power domain. If these pins are unused, keep them open. PCM Interface*

Pin Name I/O Description DC Characteristics Comment PCM_CLK DO PCM clock PCM_SYNC DO PCM data frame sync PCM_DIN DI PCM data input PCM_DOUT DO PCM data output VOLmax = 0.36 V VOHmin = 1.44 V VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VOLmax = 0.36 V VOHmin = 1.44 V 1.8 V power domain. If unused, keep them open. I2C Interface*

7 For BG950A-GL module, pin 27 and pin 28 can only be used as CLI UART interface. When pin 27 and pin 28 are used as CLI_TXD and CLI_RXD, the two pins should be connected to pin 95 and pin 94 respectively inside the module. For BG951A-GL module, pin 27 and pin 28 can only be used as GNSS UART interface. BG950A-GL&BG951A-GL_Hardware_Design 22 / 84 Pin Name I/O Description DC Characteristics Comment Pin Name I/O Description DC Characteristics Comment LPWA Module Series External pull-up resistor is required. It is recommended to use VDD_EXT as the power supply of the external pull-up resistor. If unused, keep them open. 50 impedance 50 impedance. If unused, keep this pin open. Pin No. Pin No. I2C_SCL 40 OD I2C serial clock

(for external codec) I2C_SDA 41 OD I2C serial data

(for external codec) Antenna Interfaces ANT_MAIN 60 AIO Main antenna interface ANT_GNSS 49 AI GNSS antenna interface GPIO Interfaces*

GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 ADC Interfaces Pin No. 25 DIO 26 DIO 64 DIO 65 DIO 66 DIO 85 DIO 86 DIO 87 DIO 88 DIO Pin No. Pin Name I/O Description DC Characteristics Comment General-purpose input/output VOLmax = 0.36 V VOHmin = 1.44 V VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep these pins open. Pin Name I/O Description DC Characteristics Comment ADC0 24 AI General-purpose ADC interface Voltage range:

01.8 V If unused, keep them open. BG950A-GL&BG951A-GL_Hardware_Design 23 / 84 LPWA Module Series ADC1 2 AI General-purpose ADC interface Voltage range:

01.8 V Other Interfaces Pin No. Pin Name I/O Description DC Characteristics Comment 1.8 V power domain. Pulled up by default. When it is at low level, the module can enter airplane mode. If unused, keep this pin open. 1.8 V power domain. If unused, keep this pin open. 1.8 V power domain. Pulled-down by default. VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VILmin = -0.2 V VILmax = 0.3 V VIHmin = 1 V VIHmax = 1.98 V W_DISABLE#

18 DI Airplane mode control AP_READY*

19 DI Application processor sleep state detect Used for main UART function control and for entering/exiting e-l-DRX, PSM, sleep and power off modes PON_TRIG 96 DI GRFC Interface*

Pin No. Pin No. Pin Name I/O Description DC Characteristics Comment GRFC1 83 DO Generic RF controller GRFC2 84 DO Generic RF controller VOLmax = 0.36 V VOHmin = 1.44 V VOHmax = 2.0 V 1.8 V power domain. If these pins are unused, keep them open. GNSS Interface 8 Pin Name I/O Description DC Characteristics Comment GNSS_BOOT 75 DI Force the GNSS chip of the module into emergency download mode VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep this pin open. GNSS_NRST 1.8 V power domain. If unused, keep this 8 Only BG951A-GL supports GNSS_BOOT (pin 75), GNSS_NRST (pin 76), GNSS_EN (pin 97), SFNIND_1PPS (pin 98). VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V Reset input signal of the GNSS chip 76 DI BG950A-GL&BG951A-GL_Hardware_Design 24 / 84 LPWA Module Series VIHmax = 2.0 V pin open. GNSS_EN 97 DI Enable internal GNSS chip SFNIND_1PPS 98 DO One pulse per second VILmin = -0.2 V VILmax = 0.54 V VIHmin = 1.26 V VIHmax = 2.0 V VOLmax = 0.36 V VOHmin = 1.44 V RESERVED 1114, 16, 5153, 56, 57, 63, 75, 76, 77, 78, 9293, 9799 RESERVED Pins Pin Name Pin No. NOTE 1.8 V power domain. If unused, keep this pin open. Synchronized at rising edge, the pulse width is 100 ms. If unused, please keep this pin open. Comment Keep these pins open. 1. When the module starts up normally, in order to ensure full-function mode, the minimum power supply voltage should be higher than 2.2 V. For every VBAT transition/re-insertion from 0 V, VBAT slew rate < 25 mV/s. In order to ensure that the module can start normally, pull down PWRKEY to turn on the module after VBAT remains stable for 100 ms. 2. After entering PSM or power off mode, it is prohibited to provide any external voltage to the module's I/O ports that are not defined as a wake-up source (PON_TRIG pin). 3. PCM and I2C interfaces are for VoLTE* only. 4. Keep all RESERVED pins and unused pins unconnected. 2.6. EVB To help customers to develop applications with the module conveniently, Quectel supplies an evaluation board (EVB), USB to RS-232 converter cables, USB data cables, earphone, antennas, and other peripherals to control or to test the module. For more details, see document [1]. BG950A-GL&BG951A-GL_Hardware_Design 25 / 84 LPWA Module Series 3 Operating Characteristics 3.1. Operating Modes The table below outlines operating modes of the module. Table 7: Overview of Operating Modes Mode Details Normal Operation Extended Idle Mode DRX (e-I-DRX) Idle The module remains registered on network, and is ready to send and receive data. In this mode, the software is active. Connected The module remains registered on network, and is ready to send and receive data. In this mode, the software is active. The module and the network may negotiate over non-access stratum signaling the use of e-I-DRX for reducing power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. Airplane Mode AT+CFUN=4 or W_DISABLE# pin can set the module into airplane mode where the RF function is invalid. Minimum Functionality Mode the module into a minimum functionality mode without AT+CFUN=0 can set removing the power supply. In this mode, both RF function and (U)SIM card are invalid. Sleep Mode Power OFF Mode The module remains the ability to receive paging message, SMS* and TCP/UDP data from the network normally. In this mode, the current consumption is reduced to a low level. The modules power supply is shut down by its power management unit. In this interfaces are inaccessible, while the mode, the software is inactive, the serial operating voltage (connected to VBAT_BB and VBAT_RF) remains applied. Power Saving Mode

(PSM) PSM is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. The current consumption is reduced to a minimized level. Recovery Mode The module can burn firmware with an empty serial firmware malfunction. For more details, see Chapter 3.6. flash, or recover from BG950A-GL&BG951A-GL_Hardware_Design 26 / 84 LPWA Module Series During e-I-DRX, it is recommended to use the main UART interface for data communication, as the use of USB interface* will increase power consumption. 3.2. Airplane Mode When the module enters airplane mode, correlative with RF function will be inaccessible. This mode can be set via the following ways. the RF function will be disabled, and all AT commands W_DISABLE# is pulled up by default. Driving it low will let the module enter airplane mode. AT+CFUN=<fun> provides choices of the functionality level through setting <fun> into 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both RF and (U)SIM functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode (RF function is disabled). NOTE Hardware:

Software:

NOTE 1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by AT+QCFG="airplanecontrol". For more details of the command, see document [2]. 2. For BG950A-GL, the execution of AT+CFUN will affect GNSS function. Since the module does not support concurrent operation of WWAN and GNSS, the GNSS function can be used when <fun>=0 or 4, but cannot be used when <fun>=1. 3. For BG951A-GL, the execution of AT+CFUN will not affect GNSS function. 3.3. Power Saving Mode (PSM) BG950A-GL/BG951A-GL module minimizes its power consumption through entering PSM. The mode is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections. Therefore, BG950A-GL/BG951A-GL module in PSM cannot immediately respond to users requests. When the module wants to use the PSM, it shall request an Active Time value during every Attach and BG950A-GL&BG951A-GL_Hardware_Design 27 / 84 LPWA Module Series TAU procedures. If the network supports PSM and accepts that the module uses PSM, it will confirm the usage of PSM by allocating an Active Time value to the module. If the module wants to change the Active Time value, e.g. when the conditions are changed in the module, the module consequently requests the value it wants in the TAU procedure. If PSM is supported by the network, then it can be enabled via AT+CPSMS. In this case, driving PON_TRIG low will set the module into PSM. Any of the following methods can wake up the module from PSM:

Drive PON_TRIG high and remain it high, the module will wake up from PSM. PON_TRIG is pulled down by default. When the T3412 timer expires, the module wakes up from PSM automatically. In this case, the main UART interface is inaccessible until PON_TRIG is pulled high. NOTE 1. PON_TRIG must be pulled high after executing any PSM wake-up event, otherwise the main UART will be inaccessible. In any case, the main UART interface is inaccessible until PON_TRIG is pulled high. 2. See document [3] for details about AT+CPSMS. 3.4. Extended Idle Mode DRX (e-I-DRX) The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX for reducing its power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value. Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or data transfers, and in particular, they need to consider the delay tolerance of mobile terminated data. In order to negotiate the use of e-I-DRX, the UE requests e-I-DRX parameters during attach procedure and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX. In case the EPC accepts e-I-DRX, the EPC based on operator policies and, if available, the e-I-DRX cycle length value in the subscription data from the HSS, may also provide different values of the e-I-DRX parameters than what was requested by the UE. If the EPC accepts the use of e-I-DRX, the UE applies e-I-DRX based on the received e-I-DRX parameters. If the UE does not receive e-I-DRX parameters in the relevant accept message because the EPC rejected its request or because the request was received by EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception. If e-I-DRX is supported by the network, perform the steps below in sequence to let the module enter BG950A-GL&BG951A-GL_Hardware_Design 28 / 84 LPWA Module Series e-l-DRX mode, in which case the main UART interface is inaccessible. 1. Send AT+CPSMS=0 to disable PSM mode. 2. Send AT+CEDRXS=1 to enable e-l-DRX mode. 3. Send AT+QSCLK=2 to enable sleep mode. 4. Drive MAIN_DTR high. 5. Drive PON_TRIG low. NOTE 1. See document [3] for details about the above AT commands. 2. Follow the steps for exiting sleep mode to exit e-I-DRX. 3.5. Sleep Mode BG950A-GL/BG951A-GL can reduce their current consumption to a lower value during the sleep mode. The following sub-chapter describes the power saving procedures of BG950A-GL & BG951A-GL. 3.5.1. UART Application Scenario If the host communicates with the module via main UART interface, perform the steps below in sequence to let the module enter sleep mode, in which case the main UART interface is not accessible. 1. Send AT+CFUN=0 to set the module into minimum function mode. 2. Drive MAIN_DTR low. 3. Execute AT+QSCLK=2 to enable sleep mode. 4. Drive MAIN_DTR high. 5. Drive PON_TRIG low. When the module is in sleep mode, perform the steps below in sequence to let the module exit sleep mode. Drive PON_TRIG high. Drive MAIN_DTR low. Execute AT+QSCLK=0 to disable sleep mode. Send AT+CFUN=1 to set the module into minimum function mode. Drive MAIN_DTR high. The figure illustrates the connection between the module and the host. BG950A-GL&BG951A-GL_Hardware_Design 29 / 84 LPWA Module Series Figure 4: Sleep Mode Application via UART Interface When the module has a URC to report, MAIN_RI* will wake up the host. See Chapter 4.6.4 for details about MAIN_RI* behavior. After the module is turned on, MAIN_DTR is internally pulled up by default. AP_READY* will detect the sleep state of the host (can be configured to high voltage level or low voltage level detection). See AT+QCFG="apready" in document [2] for details. 3.6. Recovery Mode BG770A-GL provides the recovery mode for firmware upgrade in emergency cases. Recovery mode can force the module to boot via debug UART interface for firmware upgrade. The following preconditions can set the module into recovery mode. 1. Short-circuit DBG_TXD and DBG_RXD pins. 2. Drive PWRKEY low to turn on the module. In this case the module will enter recovery mode. 3. After the module enters recovery mode successfully, disconnect the connection between DBG_TXD and DBG_RXD. 4. Upgrade firmware via debug UART interface. NOTE 1. In the design, it is recommended to reserve all the test points of the debug UART interface, and keep DBG_TXD close to DBG_RXD. BG950A-GL&BG951A-GL_Hardware_Design 30 / 84 2. Ensure that VBAT remains stable for at least 100 ms before pulling down PWRKEY. LPWA Module Series The module provides two VBAT pins for connection with an external power supply. 3.7. Power Supply 3.7.1. Power Supply Pins One VBAT_RF pin for RF part. One VBAT_BB pin for baseband part. Table 8: Pin Definition of Power Supply Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_BB 32 Power supply for the modules baseband part 2.2 3.3 4.35 VBAT_RF 33 Power supply for the modules RF part 2.2 3.3 4.35 GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 6774, 7982, 8991, 100102

V V

NOTE For every VBAT transition/re-insertion from 0 V, VBAT slew rate < 25 mV/s. After the module starts up normally, in order to ensure full-function mode, the minimum power supply voltage should be higher than 2.2 V. 3.7.2. Voltage Stability Requirements The power supply range of the module is from 2.2 V to 4.35 V. Make sure the input voltage will never drop below 2.2 V. BG950A-GL&BG951A-GL_Hardware_Design 31 / 84 LPWA Module Series Figure 5: Power Supply Limits During Burst Transmission To decrease voltage drop, a bypass capacitor of about 100 F with low ESR should be used, and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors for composing the MLCC array (100 nF, 33 pF, 10 pF), and place these capacitors close to VBAT pins. The main power supply from an external application must be a single voltage source and can be expanded to two sub paths with the star structure. The width of VBAT_BB trace should be no less than 1 mm. The width of VBAT_RF trace should be no less than 1 mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, to ensure the stability of the power supply, it is necessary to add two high-power TVSs at the front end of each power supply. Reference circuit of power supply is shown as below:

Figure 6: Star Structure of the Power Supply Power design for a module is critical to its performance. The power supply of the module should be able to provide sufficient current of 0.6 A at least, and it is recommended to select a DC-DC converter chip or an LDO chip with ultra-low leakage current and current output no less than 1.0 A for the power supply design. BG950A-GL&BG951A-GL_Hardware_Design 32 / 84 3.7.3. Power Supply Monitoring AT+CBC can monitor the VBAT_BB voltage value. For more details, see document [3]. LPWA Module Series 3.8. Turn On 3.8.1. Turn on the Module with PWRKEY Table 9: Pin Definition of PWRKEY Pin Name Pin No. I/O Description Comment PWRKEY 15 DI Turn on/off the module Internally pulled up with a 470 k resistor. When the module is in power off mode, driving PWRKEY low for 5001000 ms and then releasing it will turn on the module. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference design is illustrated in the following figure. Figure 7: Turn on the Module with Driving Circuit the PWRKEY is by using a button directly. When pressing the button, an Another way to control electrostatic strike may generate from fingers. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. BG950A-GL&BG951A-GL_Hardware_Design 33 / 84 LPWA Module Series Figure 8: Turn on the Module a Button The power-up scenario is illustrated in the following figure. Figure 9: Power-up Timing

. NOTE 3. Ensure that VBAT is stable for at least 100 ms before pulling down the PWRKEY. 4. Pull PON_TRIG high before the module is turned on, and then drive PWRKEY low for 5001000 ms and release, otherwise, the main UART interface will be inaccessible. BG950A-GL&BG951A-GL_Hardware_Design 34 / 84 LPWA Module Series 3.9. Turn Off After the module is turned off or enters PSM, do not pull up any I/O pin of the module. Otherwise, the module will have additional power consumption and may have damaged pins. Either of the following methods can be used to turn off the module normally:

Turn off the module through PWRKEY and PON_TRIG. Turn off the module through AT+QPOWD and PON_TRIG. 3.9.1. Turn off with PWRKEY and PON_TRIG When the module is powered on, driving PWRKEY low for 6501500 ms and then releasing it, and pull down the PON_TRIG with 200 ms, after which the module will execute a power-down procedure. The power-down timing is illustrated in the following figure. Figure 10: Power-down Timing (PWRKEY & PON_TRIG 3.9.2. Turn off the Module with AT Command and PON_TRIG It is also a safe way to use AT+QPOWD to turn off the module, which is similar to turning off the module with PWRKEY. After the AT+QPOWD is sent, pull down PON_TRIG within 200 ms, and the module will execute the power-down procedure. See document [3] for details about AT+QPOWD. BG950A-GL&BG951A-GL_Hardware_Design 35 / 84 LPWA Module Series Figure 11: Power-down TimingAT Command & PON_TRIG 1. To avoid damaging the internal flash, do not switch off the power supply when the module works normally. Only after the module is turned off by PWRKEY & PON_TRIG or AT command &

PON_TRIG, the power supply can be cut off. 2. When turning off themodule with AT command, keep PWRKEY at a high level after the execution of power-off command. Otherwise, the module will be turned on again after turned off. NOTE 3.10. Reset The module can be reset by driving RESET_N low for at least 100 ms and releasing it. The RESET_N is sensitive to interference, so it is recommended to route the trace as short as possible and signal surround it with ground. Table 10: Pin Definition of RESET_N Pin Name Pin No. Description RESET_N 17 Reset the module. Internally pulled up with a 470 k resistor. I/O DI The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control RESET_N. BG950A-GL&BG951A-GL_Hardware_Design 36 / 84 LPWA Module Series Figure 12: Reference Circuit of RESET_N with Driving Circuit Figure 13: Reference Circuit of RESET_N with a Button The reset timing is illustrated in the following figure. Figure 14: Reset Timing BG950A-GL&BG951A-GL_Hardware_Design 37 / 84 LPWA Module Series NOTE Ensure that there is no large capacitance on RESET_N pin. 3.11. PON_TRIG BG950A-GL & BG951A-GL modules provide one PON_TRIG pin which is used to wake up the module from PSM. Table 11: Pin Definition of PON_TRIG Pin Name Pin No. I/O Description Comment PON_TRIG 96 DI Used for main UART function control and for entering/exiting e-l-DRX, PSM, sleep and power off modes 1.8 V power domain Pull down by default. PON_TRIG can realize the following functions:

Control the module to enter or exit PSM mode and sleep mode. Enable/disable the main UART interface communication function. Used for the turn-on/off application of the module. PON_TRIG must be designed to allow for external control. A reference circuit is shown in the following figure. Figure 15: Reference Circuit of PON_TRIG BG950A-GL&BG951A-GL_Hardware_Design 38 / 84 LPWA Module Series NOTE VDD_1V8 is provided by an external LDO. The following is a brief description about the use of PON_TRIG. PON_TRIG is pull down by default. Before the module is turned on, PON_TRIG must be pulled high. Otherwise, the main UART interface will be inaccessible. When the module is powered on, pull down PON_TRIG within 200 ms after you send AT+QPOWED or drive PWRKEY low, after which the module will excute a power-down procedure. For more details, see Chapter 3.9. Pull down PON_TRIG and remain it low in e-l-DRX, PSM, sleep and power off modes. In other cases, pull high PON_TRIG and remain it high to make sure the main UART is accessible. For details about PON_TRIG usage in e-l-DRX and sleep modes, see Chapter 3.4 and Chapter 3.5 respectively. After sending AT+QPSMS to enable PSM, driving PON_TRIG low will set the module into PSM. In this case, the module will wake up from PSM. Drive PON_TRIG high and remain it high, PON_TRIG must remain high, otherwise the module will re-enter PSM. BG950A-GL&BG951A-GL_Hardware_Design 39 / 84 LPWA Module Series 4 Application Interfaces 4.1. (U)SIM Interface BG950A-GL/BG951A-GL support 1.8 V (U)SIM card only. The circuitry of (U)SIM interfaces meet ETSI and IMT-2000 requirements. Table 12: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment USIM_DET 42 DI

(U)SIM card hot-plug detect USIM_VDD PO

(U)SIM card power supply USIM_RST DO

(U)SIM card reset 1.8 V power domain. If unused, keep this pin open. Only 1.8 V (U)SIM card is supported. USIM_DATA DIO

(U)SIM card data 1.8 V power domain. USIM_CLK DO

(U)SIM card clock USIM_GND Specified ground for (U)SIM card 43 44 45 46 47 BG950A-GL/BG951A-GL supports (U)SIM card hot-plug via the USIM_DET, and both high-level and low-level detections are supported. The function is disabled by default, and refer to AT+QSIMDET in document [3] for more details. BG950A-GL&BG951A-GL_Hardware_Design 40 / 84 The following figure illustrates a reference design of (U)SIM interface with an 8-pin (U)SIM card connector. LPWA Module Series Figure 16: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, keep USIM_DET unconnected. A reference circuit for

(U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. Figure 17: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector To enhance the reliability and availability of the (U)SIM card in applications, follow the criteria below in the

(U)SIM circuit design:

BG950A-GL&BG951A-GL_Hardware_Design 41 / 84 LPWA Module Series Keep the placement of (U)SIM card connector as close to the module as possible. Keep the trace length less than 200 mm. Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground trace between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5 mm to maintain the same electric potential. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1 F, and place it as close to (U)SIM card connector as possible. If the system ground plane is complete, USIM_GND can be connected to the system ground directly. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. USIM_RST should also be surrounded with ground. To offer good ESD protection, is recommended to add a TVS diode array with parasitic capacitance not exceeding 15 pF. It is recommended to reserve 0 series resistors for the (U)SIM signals of the module to facilitate debugging. The 33 pF capacitors are used for filtering interference of EGSM900. Note that the (U)SIM peripheral circuit should be close to the (U)SIM card connector. it The pull-up resistor on USIM_DATA trace can improve anti-jamming capability when long layout trace and sensitive occasions are applied, and should be placed close to the (U)SIM card connector. 4.2. USB Interface*

BG950A-GL/BG951A-GL provides one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports full speed mode only. USB interface is used AT command communication, data transmission, software debugging and firmware upgrade. The following table shows the pin definition of USB interface. Table 13: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment USB_VBUS AI USB connection detect Typ. 5.0 V 8 9 USB_DP AIO USB differential data (+) USB_DM 10 AIO USB differential data (-) Compliant with USB 2.0 standard specification. Require differential impedance of 90 . It is recommended to reserve test points for debugging and firmware upgrading in your designs. BG950A-GL&BG951A-GL_Hardware_Design 42 / 84 LPWA Module Series Figure 18: Reference Circuit of USB Application To ensure the integrity of USB data signals, If possible, reserve a 0 resistor on USB_DP and USB_DM traces respectively. And resistors R1 and R2 should be placed close to the module, and these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. To meet USB 2.0 specification, comply with the following principles while designing the USB interface. It is important to route the USB signal traces as differential pairs with ground surrounded. The impedance of USB differential trace is 90 . Do not route signal traces under crystals, oscillators, magnetic devices, and RF signal traces. It is important to route the USB differential traces in inner-layer of the PCB, and surround the traces with ground on that layer and with ground planes above and below. Junction capacitance of the ESD protection device might cause influences on USB data traces, so pay attention to the selection of the device. Typically, the stray capacitance should be less than 2 pF. Keep the ESD protection devices as close to the USB connector as possible. If possible, reserve a 0 resistor on USB_DP and USB_DM traces respectively. For more details about the USB specifications, visit http://www.usb.org/home. NOTE After the module is turned off or enters PSM, do not pull up any pin of USB interface. Otherwise, the module will have additional power consumption and may have damaged pins. BG950A-GL&BG951A-GL_Hardware_Design 43 / 84 LPWA Module Series 4.3. UART Interfaces BG950A-GL/BG951A-GL module provides four UART interfaces and the following shows their features:

Main UART:

CLI UART:

It supports 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 and 3000000 bps baud rates, and the default baud rate is 115200 bps. It is used for AT command communication and data transmission, and supports RTS and CTS hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit). It supports 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 and 3000000 bps baud rates, and the default baud rate is 115200 bps. It is used for firmware upgrade, software debugging, log output, GNSS data and NMEA sentences output, and supports RTS and CTS hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit). Debug UART:

It supports 921600 bps baud rate by default, and is used for RF calibration and log output, and supports RTS and CTS hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit). CLI/GNSS UART:

For BG950A-GL module, this interface can only be used as CLI UART interface. And pin 27 and pin 28 should be connected to pin 95 and pin 94 respectively inside the module. For BG951A-GL module, this interface can only be used as GNSS UART interface. The GNSS UART interface supports 115200 bps baud rate by default, and it is used for GNSS data and NMEA sentences output. The following tables show the pin definition of four UART interfaces. Table 14: Pin Definition of Main UART Interface Pin Name Pin No. I/O Description Comment MAIN_TXD DO Main UART transmit MAIN_DTR MAIN_RXD MAIN_CTS MAIN_RTS MAIN_DCD MAIN_RI 30 34 35 36 37 38 39 DI DI DO DI DO DO Main UART data terminal ready Main UART receive DTE clear to send signal from DCE

(Connect to DTEs RTS) DTE request to send signal from DCE (Connect to DTEs RTS) Main UART data carrier detect Main UART ring indication 1.8 V power domain If these pins are unused, keep them open. BG950A-GL&BG951A-GL_Hardware_Design 44 / 84 LPWA Module Series Table 15: Pin Definition of CLI UART Interface Pin Name Pin No. I/O Description Comment CLI_TXD CLI_RXD DO CLI UART transmit DI CLI UART receive 1.8 V power domain If these pins are unused, keep them open. Table 16: Pin Definition of Debug UART Interface Pin Name Pin No. I/O Description Comment DBG_TXD DO Debug UART transmit DBG_RXD DI Debug UART receive 1.8 V power domain If these pins are unused, keep them open. 95 94 23 22 Table 17: Pin Definition of CLI/GNSS UART Interface Pin Name Pin No. I/O Description Comment CLI/GNSS_TXD DO CLI/GNSS UART transmit CLI/GNSS_RXD DI CLI/GNSS UART receive 27 28 1.8 V power domain If these pins are unused, keep them open. NOTE AT+IPR can be used to set the baud rate of the main UART interface, and AT+IFC can be used to set the hardware flow control (the function is disabled by default). See document [3] for more details about these AT commands. The module provides 1.8 V UART interfaces. A voltage-level translator should be used if your application is equipped with a 3.3 V UART interface. It is recommended to use a level-shifting chip without internal pull-up. The voltage-level translator TXB0108PWR provided by Texas Instruments is recommended. The following figure shows a reference design of the main UART interface:

BG950A-GL&BG951A-GL_Hardware_Design 45 / 84 LPWA Module Series Figure 19: Main UART Reference Design (Translator Chip) Visit http://www.ti.com for more information. Another example with transistor circuit is shown as below. For the design of circuits shown in dotted lines, see that of circuits in solid lines, but pay attention to the direction of connection. Figure 20: Main UART Reference Design (Transistor Circuit) NOTE 1. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. 2. The main UART interface of the module should be disconnected in PSM and power off modes. Otherwise, the module will have additional power consumption and may have damaged pins. It is recommended to use a level-shifting chip without internal pull-up, such as TXB0108PWR, for voltage level translation. 3. BG950A-GL&BG951A-GL_Hardware_Design 46 / 84 4. Please note that the modules CTS is connected to the hosts CTS, and the modules RTS is connected to the hosts RTS. LPWA Module Series 4.4. PCM and I2C Interfaces*

The module provides one Pulse Code Modulation (PCM) digital interface and one I2C interface for VoLTE* only. The following table shows the pin definition of the two interfaces which can be applied on audio codec design. Table 18: Pin Definition of PCM Interface Pin Name Pin No. I/O Description Comment PCM_CLK PCM_SYNC PCM_DIN 4 5 6 7 DO DO DI PCM clock PCM data frame sync PCM data input 1.8 V power domain. If these pins are unused, keep them open. PCM_DOUT DO PCM data output Table 19: Pin Definition of I2C Interface Pin Name Pin No. I/O Description Comment I2C_SCL 40 I2C_SDA 41 OD OD I2C serial clock

(for external codec) I2C serial data

(for external codec) The reference design is illustrated as follows:

Require external pull-up to 1.8 V only. If these pins are unused, keep them open. BG950A-GL&BG951A-GL_Hardware_Design 47 / 84 LPWA Module Series Figure 21: Reference Design of PCM Application with Audio Codec 4.5. ADC Interfaces The module provides two Analog-to-Digital Converter (ADC) interfaces. To improve the accuracy of ADC voltage values, the traces of ADC should be surrounded with ground. Table 20: Pin Definition of ADC Interfaces Pin Name Pin No. I/O Description Comment ADC0 ADC1 24 2 AI AI General-purpose ADC interface General-purpose ADC interface Voltage range: 01.8 V The voltage value on ADC pins can be read via AT+QADC=<port>:

AT+QADC=0: read the voltage value on ADC0 AT+QADC=1: read the voltage value on ADC1 For more details about the AT command, see document [3]. The resolution of the ADC is up to 12 bits. The following table describes the characteristic of the ADC interfaces. BG950A-GL&BG951A-GL_Hardware_Design 48 / 84 LPWA Module Series Table 21: Characteristics of ADC Interfaces Name Min. Typ. Voltage Range Resolution 0 6

Max. 1.8 12 Unit V bit NOTE 1. ADC input voltage must not exceed 1.8 V. 2. 3. It is prohibited to supply any voltage to ADC pin when VBAT is removed. It is recommended to use resistor divider circuit for ADC application, and the dividers resistor accuracy should be no less than 1 %. 4. After the module is turned off or enters PSM, do not pull up any pin of ADC interfaces. Otherwise, the module will have additional power consumption and may have damaged pins. 4.6. Indication Signals 4.6.1. PSM Status Indication Table 22: Pin Definition of PSM_IND Pin Name Pin No. I/O Description Comment PSM_IND 1 DO Indicate the modules power saving mode 1.8 V power domain. If this pin is unused, keep this pin open. When PSM is enabled, the function of PSM_IND will be activated after the module is rebooted. When PSM_IND is in high level, the module is in normal operation state. When it is in low level, the module is in PSM. BG950A-GL&BG951A-GL_Hardware_Design 49 / 84 LPWA Module Series Figure 22: Reference Circuit of the PSM Status Indication 4.6.2. Network Status Indication Table 23: Pin Definition of NET_STATUS Pin Name Pin No. I/O Description Comment NET_STATUS 21 DO Indicate the modules network activity status 1.8 V power domain. If this pin is unused, keep it open. The network indication pins can be used to drive network status indication LEDs. The module provides one network indication pin: NET_STATUS. The following tables describe pin definition and logic level changes in different network status. Table 24: Working State of Network Connection Status Indication Pin Name Status Description Flicker slowly (200 ms High/1800 ms Low) Network searching Flicker slowly (1800 ms High/200 ms Low) Idle NET_STATUS Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always high Voice calling*

BG950A-GL&BG951A-GL_Hardware_Design 50 / 84 A reference circuit is shown in the following figure. LPWA Module Series Figure 23: Reference Circuit of Network Status Indication 4.6.3. STATUS The STATUS pin is an open drain output for indicating the modules operation status. It will output high level when module is powered on successfully. Table 25: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the modules operation status 1.8 V power domain A reference circuit is shown as below. Figure 24: Reference Circuits of STATUS BG950A-GL&BG951A-GL_Hardware_Design 51 / 84 LPWA Module Series 4.6.4. MAIN_RI*

AT+QCFG= risignaltype,physical can be used to configure MAIN_RI behavior. No matter on which port a URC is presented, the URC will trigger the behavior of MAIN_RI pin. Table 26: Pin Definition of MAIN_RI Pin Name Pin No. I/O Description Comment MAIN_RI 39 DO Main UART ring indication 1.8 V power domain. If this pin is unused, keep this pin open. The default MAIN_RI behaviors can be configured flexibly by AT+QCFG="urc/ri/ring"*. Refer document [2] for details. The default behavior of the MAIN_RI is shown as below. to Table 27: Default Behaviors of MAIN_RI Response MAIN_RI keeps at high level. State Idle URC NOTE MAIN_RI outputs 120 ms low pulse in case of a new URC returns. A URC can be outputted from the main UART interface (default), the CLI UART or the debug UART through configuration via AT+QURCCFG. 4.7. GRFC Interfaces*

The module provides two generic RF control interfaces for the control of external antenna tuners. Table 28: Pin Definition of GRFC Interfaces Pin Name Pin No. I/O Description Comment GRFC1 GRFC2 83 84 DO DO Generic RF controller Generic RF controller 1.8 V power domain. If these pins are unused, keep them open. BG950A-GL&BG951A-GL_Hardware_Design 52 / 84 LPWA Module Series Table 29: Truth Table of GRFC Interfaces GRFC1 Level GRFC2 Level Frequency Range (MHz) Band Low Low High Low High Low TBD TBD TBD TBD TBD TBD 4.8. GPIO Interface*

BG950A-GL/BG951A-GL module provides nine general-purpose input and output (GPIO) interfaces. AT+QCFG="gpio" can be used to configure the status of GPIO pins. For more details about the AT command, see document [2]. Table 30: Pin Definition of GPIO Interface Pin Name Pin No. I/O Description Comment GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 25 26 64 65 66 85 86 87 88 DIO DIO DIO DIO DIO DIO DIO DIO DIO General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output 1.8 V power domain. BG950A-GL&BG951A-GL_Hardware_Design 53 / 84 LPWA Module Series 5 RF Specifications 5.1. Cellular Network 5.1.1. Antenna Interface & Frequency Bands The pin definition is shown as below:

Table 31: Pin Definition of Cellular Network Interface Pin Name Pin No. I/O Description Comment ANT_MAIN 60 AIO Main antenna interface 50 impedance NOTE Only passive antennas are supported. Table 32: Operating Frequency of BG950A-GL & BG951A-GL Operating Frequency Transmit (MHz) Receive (MHz) LTE HD-FDD B1 19201980 LTE HD-FDD B2 18501910 LTE HD-FDD B3 17101785 LTE HD-FDD B4 17101755 LTE HD-FDD B5 LTE HD-FDD B8 LTE HD-FDD B12 824849 880915 699716 21102170 19301990 18051880 21102155 869894 925960 729746 Unit MHz MHz MHz MHz MHz MHz MHz BG950A-GL&BG951A-GL_Hardware_Design 54 / 84 LPWA Module Series LTE HD-FDD B13 LTE HD-FDD B17 9 LTE HD-FDD B18 LTE HD-FDD B19 LTE HD-FDD B20 LTE HD-FDD B26 10 LTE HD-FDD B27 10 LTE HD-FDD B28 777787 704716 815830 830845 832862 814849 807824 703748 746756 734746 860875 875890 791821 859894 852869 758803 LTE HD-FDD B25 18501915 19301995 LTE HD-FDD B66 17101780 21102180 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz 5.1.2. Tx Power The following table shows the Tx power of the module. Table 33: RF Output Power Frequency Bands Max. Tx Power Min. Tx Power LTE HD-FDD:

B1/B2/B3/B4/B5/B8/B12/B13/B17 9/B18/B19/

B20/B25/B26 10/B27 10/B28/B66 23 dBm 2.7 dB

< -39 dBm 9 LTE HD-FDD B17 is supported by Cat NB2* only. 10 LTE HD-FDD B26 and B27 are supported by Cat M1 only. BG950A-GL&BG951A-GL_Hardware_Design 55 / 84 LPWA Module Series 5.1.3. Rx Sensitivity The following table shows conducted Rx sensitivity of the module. Table 34: Conducted RF Receiving Sensitivity of BG950A-GL Frequency Band Primary Diversity Sensitivity (dBm) Cat M1/3GPP Cat NB1 11/3GPP LTE HD-FDD B17 12 Supported

TBD/-107.5 LTE HD-FDD B1 LTE HD-FDD B2 LTE HD-FDD B3 LTE HD-FDD B4 LTE HD-FDD B5 LTE HD-FDD B8 LTE HD-FDD B12 LTE HD-FDD B13 LTE HD-FDD B18 LTE HD-FDD B19 LTE HD-FDD B20 LTE HD-FDD B25 LTE HD-FDD B26 13 LTE HD-FDD B27 13 LTE HD-FDD B28 LTE HD-FDD B66 TBD/-102.3 TBD/-107.5 TBD/-100.3 TBD/-107.5 TBD/-99.3 TBD/-107.5 TBD/-102.3 TBD/-107.5 TBD/-100.8 TBD/-107.5 TBD/-99.8 TBD/-107.5 TBD/-99.3 TBD/-107.5 TBD/-99.3 TBD/-107.5 TBD/-102.3 TBD/-107.5 TBD/-102.3 TBD/-107.5 TBD/-99.8 TBD/-107.5 TBD/-100.3 TBD/-107.5 TBD/-100.3 TBD/-100.8

TBD/-100.8 TBD/-107.5 TBD/-101.8 TBD/-107.5 11 LTE Cat NB2* receiving sensitivity without repetitions. 12 LTE HD-FDD B17 is supported by Cat NB2* only. 13 LTE HD-FDD B26 and B27 are supported by Cat M1 only. BG950A-GL&BG951A-GL_Hardware_Design 56 / 84 LPWA Module Series Table 35: Conducted RF Receiving Sensitivity of BG951A-GL Frequency Band Primary Diversity Sensitivity (dBm) Cat M1/3GPP Cat NB1 14/3GPP LTE HD-FDD B17 12 Supported

TBD/-107.5 LTE HD-FDD B1 LTE HD-FDD B2 LTE HD-FDD B3 LTE HD-FDD B4 LTE HD-FDD B5 LTE HD-FDD B8 LTE HD-FDD B12 LTE HD-FDD B13 LTE HD-FDD B18 LTE HD-FDD B19 LTE HD-FDD B20 LTE HD-FDD B25 LTE HD-FDD B26 13 LTE HD-FDD B27 13 LTE HD-FDD B28 LTE HD-FDD B66 TBD/-102.3 TBD/-107.5 TBD/-100.3 TBD/-107.5 TBD/-99.3 TBD/-107.5 TBD/-102.3 TBD/-107.5 TBD/-100.8 TBD/-107.5 TBD/-99.8 TBD/-107.5 TBD/-99.3 TBD/-107.5 TBD/-99.3 TBD/-107.5 TBD/-102.3 TBD/-107.5 TBD/-102.3 TBD/-107.5 TBD/-99.8 TBD/-107.5 TBD/-100.3 TBD/-107.5 TBD/-100.3 TBD/-100.8

TBD/-100.8 TBD/-107.5 TBD/-101.8 TBD/-107.5 5.1.4. Reference Design It is recommended to reserve a -type matching circuit for better RF performance, and the -type matching components (R1, C1 and C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. 14 LTE Cat NB2* receiving sensitivity without repetitions. BG950A-GL&BG951A-GL_Hardware_Design 57 / 84 LPWA Module Series Figure 25: Reference Circuit of Main Antenna Interface 5.2. GNSS BG950A-GL module includes a fully integrated global navigation satellite system solution that supports GPS, GLONASS. BG951A-GL module supports GPS, GLONASS, BeiDou, Galileo, QZSS, SBAS. BG950A-GL/BG951A-GL module supports standard NMEA-0183 protocol, and outputs NMEA sentences via debug UART interface (data update rate: 110 Hz, 1 Hz by default). the modules GNSS engine is switched off. It must be switched on via AT command. By default, BG950A-GL does not support concurrent operation of LTE and GNSS, however, LTE and GNSS are concurrency for BG951A-GL. For more details about GNSS engine technology and configurations, see document [4]. 5.2.1. Antenna Interface & Frequency Bands The following table shows the pin definition, frequency bands, and performance of GNSS antenna interface. Table 36: Pin Definition of GNSS Antenna Interface Pin Name Pin No. Description Comment ANT_GNSS 49 GNSS antenna interface 50 impedance I/O AI BG950A-GL&BG951A-GL_Hardware_Design 58 / 84 LPWA Module Series Table 37: GNSS Frequency Type GPS GLONASS Frequency 1575.42 1.023 1597.51605.8 Unit MHz MHz 5.2.2. GNSS Performance Table 38: GNSS Performance Parameter Description Conditions Cold start Autonomous Sensitivity (GNSS) Reacquisition Autonomous Unit dBm Tracking Cold start @ open sky Hot start @ open sky Autonomous Autonomous XTRA enabled Autonomous XTRA enabled Autonomous XTRA enabled Typ. TBD TBD TBD TBD TBD TBD TBD TBD TBD TTFF (GNSS) Warm start @ open sky s Accuracy (GNSS) CEP-50 Autonomous @ open sky TBD M NOTE 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock positioning for at least 3 minutes continuously). within 3 minutes after loss of lock. 3. Cold start sensitivity:

the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. BG950A-GL&BG951A-GL_Hardware_Design 59 / 84 5.2.3. Reference Design The following is the reference circuit of GNSS antenna. LPWA Module Series Figure 26: Reference Circuit of GNSS Antenna

. NOTE BG950A-GL/BG951A-GL module is designed with a passive antenna. 5.3. Layout Guidelines The following layout guidelines should be taken into account in application designs. Maximize the distance between GNSS antenna and main antenna. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card should be kept away from antennas. Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar isolation and protection. Keep 50 characteristic impedance for ANT_GNSS trace. Refer to Chapter 5.2 for GNSS antenna reference design and antenna installation information. BG950A-GL&BG951A-GL_Hardware_Design 60 / 84 LPWA Module Series 5.4. RF Routing Guidelines the characteristic impedance of all RF traces should be controlled to 50 . The For users PCB, impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 27: Microstrip Design on a 2-layer PCB Figure 28: Coplanar Waveguide Design on a 2-layer PCB BG950A-GL&BG951A-GL_Hardware_Design 61 / 84 LPWA Module Series Figure 29: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 30: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, follow the principles below in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully 50 . connected to ground. The distance between the RF pins and the RF connector should be as short as possible and all the right-angle traces should be changed to curved ones. The recommended trace angle is 135. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2 W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, see document [5]. BG950A-GL&BG951A-GL_Hardware_Design 62 / 84 LPWA Module Series 5.5. Antenna Design Requirements Table 39: Antenna Design Requirements Antenna Type Requirements GNSS LTE Must be a passive antenna Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi VSWR 2 Efficiency: > 30 %

Gain: 1 dBi Max input power: 50 W Input impedance: 50 Polarization: vertical Cable insertion loss:

< 1 dB: LB (< 1 GHz)

< 1.5 dB: MB (12.3 GHz) 5.6. RF Connector Recommendation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connectors provided by HIROSE. Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) BG950A-GL&BG951A-GL_Hardware_Design 63 / 84 U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. LPWA Module Series Figure 32: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 33: Space Factor of Mated Connector (Unit: mm) For more details, visit http://www.hirose.com. BG950A-GL&BG951A-GL_Hardware_Design 64 / 84 LPWA Module Series 6 Reliability and Electrical 7 Characteristics 7.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 40: Absolute Maximum Ratings Parameter VBAT_RF/VBAT_BB USB_VBUS Voltage on Digital Pins Min.

-0.2

-0.3

-0.3 Max. 4.35 6.0 2.0 Unit V V V 7.2. Power Supply Ratings Table 41: The Modules Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit Power supply for the modules baseband part/RF part The actual input voltages must stay between the minimum and maximum values. VBAT_BB/

VBAT_RF USB_VBUS USB connection detect 2.2 3.3 4.35 V

5.0

V BG950A-GL&BG951A-GL_Hardware_Design 65 / 84 LPWA Module Series Description Conditions Avg. Max. Unit 7.3. Power Consumption Table 42: BG950A-GL Power Consumption BG950A-GL (Power Supply: 3.3 V, Room Temperature) Leakage PSM Power-off @ USB/UART disconnected PSM @ USB/UART disconnected Rock bottom AT+CFUN=0 @ Sleep mode Sleep mode

(USB disconnected) Idle state LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s 1.35 1.43 54 1.09 2.14 0.137 0.138 15.62 16.21 15.03 14.64

LTE HD-FDD B1 @ 23.19 dBm 223.62 552.28 LTE Cat M1 data transfer

(GNSS OFF) LTE HD-FDD B2 @ 23.25 dBm 208.00 500.24 LTE HD-FDD B3 @ 23.10 dBm 194.05 447.41 LTE HD-FDD B4 @ 23.08 dBm 195.35 450.43 A A A mA mA mA mA mA mA mA mA mA mA mA mA BG950A-GL&BG951A-GL_Hardware_Design 66 / 84 LPWA Module Series LTE HD-FDD B5 @ 22.99 dBm 189.81 441.28 LTE HD-FDD B8 @ 23 dBm 204.86 493.13 LTE HD-FDD B12 @ 22.91 dBm 185.70 420.22 LTE HD-FDD B13 @ 22.43 dBm 177.34 389.41 LTE HD-FDD B18 @ 22.86 dBm 186.41 432.36 LTE HD-FDD B19 @ 23.06 dBm 190.79 446.71 LTE HD-FDD B20 @ 23.05 dBm 197.48 471.20 LTE HD-FDD B25 @ 23.22 dBm 216.49 528.12 LTE HD-FDD B26 @ 22.89 dBm 193.69 456.99 LTE HD-FDD B27 @ 22.83 dBm 184.06 423.48 LTE HD-FDD B28 @ 22.68 dBm 181.85 419.20 LTE HD-FDD B66 @ 23.01 dBm 196.32 461.80 LTE HD-FDD B1 @ 23.16 dBm 215.81 553.23 LTE HD-FDD B2 @ 23.25 dBm 205.67 536.87 LTE HD-FDD B3 @ 23.15 dBm 188.92 478.17 LTE HD-FDD B4 @ 23.21 dBm 183.31 477.15 LTE HD-FDD B5 @ 23.01 dBm 176.99 445.83 LTE HD-FDD B8 @ 23.09 dBm 197.90 530.05 LTE HD-FDD B17 @ 23.01 dBm 168.53 416.74 LTE HD-FDD B18 @ 23.19 dBm 166.79 425.41 LTE HD-FDD B19 @ 22.61 dBm 174.28 461.28 LTE HD-FDD B20 @ 22.71 dBm 174.52 443.72 LTE HD-FDD B25 @ 23.36 dBm 200.58 512.86 LTE HD-FDD B28 @ 23.12 dBm 176.39 446.66 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE Cat NB1 data transfer

(GNSS OFF) LTE HD-FDD B12 @ 23.01 dBm 175.02 441.49 LTE HD-FDD B13 @ 22.67 dBm 162.38 406.59 BG950A-GL&BG951A-GL_Hardware_Design 67 / 84 LPWA Module Series LTE HD-FDD B66 @ 23.10 dBm 189.72 475.43 mA Table 43: BG951A-GL Power Consumption BG951A-GL (Power Supply: 3.3 V, Room Temperature) Description Conditions Avg. Max. Unit Leakage PSM Power-off @ USB/UART disconnected 2.1 PSM @ USB/UART disconnected Rock bottom AT+CFUN=0 @ Sleep mode

TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD A A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Sleep mode

(USB disconnected) Idle state LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 DRX = 1.28 s LTE Cat NB1 DRX = 1.28 s LTE Cat M1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat NB1 e-I-DRX = 81.92 s

@ PTW = 2.56 s, DRX = 1.28 s LTE Cat M1 data transfer

(GNSS OFF) LTE HD-FDD B1 @ dBm TBD TBD LTE HD-FDD B2 @ dBm TBD TBD LTE HD-FDD B3 @ dBm TBD TBD LTE HD-FDD B4 @ dBm TBD TBD LTE HD-FDD B5 @ dBm TBD TBD LTE HD-FDD B8 @ dBm TBD TBD LTE HD-FDD B12 @ dBm TBD TBD BG950A-GL&BG951A-GL_Hardware_Design 68 / 84 LPWA Module Series LTE HD-FDD B13 @ dBm TBD TBD LTE HD-FDD B18 @ dBm TBD TBD LTE HD-FDD B19 @ dBm TBD TBD LTE HD-FDD B20 @ dBm TBD TBD LTE HD-FDD B25 @ dBm TBD TBD LTE HD-FDD B26 @ dBm TBD TBD LTE HD-FDD B27 @ dBm TBD TBD LTE HD-FDD B28 @ dBm TBD TBD LTE HD-FDD B66 @ dBm TBD TBD LTE HD-FDD B1 @ dBm TBD TBD LTE HD-FDD B2 @ dBm TBD TBD LTE HD-FDD B3 @ dBm TBD TBD LTE HD-FDD B4 @ dBm TBD TBD LTE HD-FDD B5 @ dBm TBD TBD LTE HD-FDD B8 @ dBm TBD TBD LTE HD-FDD B12 @ dBm TBD TBD LTE HD-FDD B13 @ dBm TBD TBD LTE HD-FDD B17 @ dBm TBD TBD LTE HD-FDD B18 @ dBm TBD TBD LTE HD-FDD B19 @ dBm TBD TBD LTE HD-FDD B20 @ dBm TBD TBD LTE HD-FDD B25 @ dBm TBD TBD LTE HD-FDD B28 @ dBm TBD TBD LTE HD-FDD B66 @ dBm TBD TBD mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE Cat NB1 data transfer

(GNSS OFF) BG950A-GL&BG951A-GL_Hardware_Design 69 / 84 LPWA Module Series Table 44: BG950A-GL GNSS Current Consumption BG950A-GL Description Conditions Cold start @ Passive antenna Hot start @ Passive antenna Lost state @ Passive antenna Instrument environment @ Passive antenna Open sky @ Real network, Passive antenna TBD Table 45: BG951A-GL GNSS Current Consumption BG951A-GL Description Conditions Cold start @ Passive antenna Hot start @ Passive antenna Lost state @ Passive antenna Instrument environment @ Passive antenna Open sky @ Real network, Passive antenna TBD Typ. TBD TBD TBD TBD Typ. TBD TBD TBD TBD Unit mA mA mA mA mA Unit mA mA mA mA mA Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) 7.4. ESD If the static electricity generated by various ways discharges to the module, the module maybe damaged to a certain extent. Thus, please take proper ESD countermeasures and handling methods. For example, wearing anti-static gloves during the development, production, assembly and testing of the module;

adding ESD protective components to the ESD sensitive interfaces and points in the product design. BG950A-GL&BG951A-GL_Hardware_Design 70 / 84 LPWA Module Series ESD characteristics of the modules pins are as follows:

Table 46: Electrostatics Discharge Characteristics (Temperature: 25 C, Humidity: 45 %) Tested Interfaces Contact Discharge Air Discharge Unit VBAT, GND TBD All Antenna Interfaces TBD TBD TBD kV kV 7.5. Operating and Storage Temperatures Table 47: Operating and Storage Temperatures Parameter Operating Temperature Range 15 Min.

-35 Extended Operating Temperature Range 16

-40 Storage Temperature Range

-40 Typ.

+25

Max. Unit

+75

+85

+90 C C C 15 Within the operating temperature range, the module meets 3GPP specifications. 16 Within the extended temperature range, the module remains the ability to establish and maintain functions such as voice*, SMS* and data transmission, without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may exceed the specified tolerances of 3GPP. When the temperature returns to the operating temperature range, the module meets 3GPP specifications again. BG950A-GL&BG951A-GL_Hardware_Design 71 / 84 LPWA Module Series 8 Mechanical Information This chapter describes the mechanical dimensions of millimeter (mm), and the dimensional tolerances are 0.2 mm unless otherwise specified. the module. All dimensions are measured in 8.1. Mechanical Dimensions 19.90.2 2.20.2 Pin1

. 2 0 6 3 2

. Figure 34: Module Top and Side Dimensions (Unit: mm) BG950A-GL&BG951A-GL_Hardware_Design 72 / 84 LPWA Module Series 19.900.20 0.25 1.10 0.55 1.95 1.10 5.10 1.00 0 5

. 8 0.85 1.70

. 0 2 0 0 6 3 2

. 1.00 1.70 1.00 1.70 0.70 0.25 0.55 40x1.0 62x0.7 40x1.0 62x1.10 1.00 1.00 Pin1 0.25 1.90 1.10 0.50 0.25 1.10 Figure 35: Module Bottom Dimensions (Bottom View, Unit: mm) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard. BG950A-GL&BG951A-GL_Hardware_Design 73 / 84 LPWA Module Series 8.2. Recommended Footprint 9.95 9.15 7.45 1.10 19.900.20 9.95 9.15 7.15 1.95 0.55 1.10 0.25 1.00 1.00 Pin1 1.10 1.70 2.50 1.70 1.70 0.85

. 0 2 0 0 6

. 3 2 0.25 1.70 0.15 1.70 0.85 1

. 7 0 2.55 0.85 1.00 1.10 1.00 0.70 1.10 0.25 1.10 2.50 1.10 4.25 5.95 62x0.7 4.25 5.95 40x1.0 62x1.10 40x1.0 0.25 0

. 2 0 1

. 9 0 5

. 9 5 4

. 2 5 4

. 2 5 5

. 9 5 1 1

. 8 0 1 1

. 0 0 9

. 7 0 7

. 6 5 7

. 6 5 9

. 6 0 1 1

. 0 0 1 1

. 8 0 Figure 36: Recommended Footprint (Top View)

. NOTE 1. For easy maintenance of the module, keep about 3 mm between the module and other components on the motherboard. 2. All reserved pins must be kept open. 3. For stencil design requirements of the module, see document [6]. BG950A-GL&BG951A-GL_Hardware_Design 74 / 84 LPWA Module Series 8.3. Top and Bottom Views Figure 37: Top & Bottom Views of BG950A-GL & BG951A-GL NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. BG950A-GL&BG951A-GL_Hardware_Design 75 / 84 LPWA Module Series 9 Storage, Manufacturing & Packaging 9.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 5 C and the relative humidity should be 3560 %. 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. 3. The floor life of the module is 168 hours 17 in a plant where the temperature is 23 5 C and relative humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10 % (e.g. a drying cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement above occurs;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. 5. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

All modules must be soldered to PCB within 24 hours after the baking, otherwise they should be put in a dry environment such as in a drying oven. 17 This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. It is recommended to start the solder reflow process within 24 hours after the package is removed if the temperature and moisture do not conform to, or are not sure to conform to IPC/JEDEC J-STD-033. And do not remove the packages of tremendous modules if they are not ready for soldering. BG950A-GL&BG951A-GL_Hardware_Design 76 / 84 LPWA Module Series NOTE the air is forbidden. 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. All modules must be soldered to PCB within 24 hours after the baking, otherwise put them in the drying oven. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules. 9.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. Apply proper force on the squeegee to produce a clean stencil surface on a single pass. To guarantee module soldering quality, the thickness of stencil for the module is recommended to be 0.130.15 mm. For more details, see document [6]. The peak reflow temperature should be 235246 C, with 246 C as the absolute maximum reflow temperature. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted only after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 38: Recommended Reflow Soldering Thermal Profile BG950A-GL&BG951A-GL_Hardware_Design 77 / 84 Table 48: Recommended Thermal Profile Parameters LPWA Module Series Soak time (between A and B: 150 C and 200 C) 70120 s Factor Soak Zone Max slope Reflow Zone Max slope Reflow time (D: over 217 C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle Recommendation 13 C/s 23 C/s 4070 s 235246 C

-1.5 to 3 C/s 1 NOTE 1. module. If a conformal coating is necessary for the module, do NOT use any coating material that may chemically react with the PCB or shielding cover, and prevent the coating material from flowing into the module. 2. Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the 3. Due to the complexity of the SMT process, please contact Quectel Technical Supports in advance for any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic soldering) that is not mentioned in document [6]. 9.3. Packaging Specifications The module adopts carrier tape packaging and details are as follow:

9.3.1. Carrier Tape Dimension details are as follow:

BG950A-GL&BG951A-GL_Hardware_Design 78 / 84 LPWA Module Series Figure 39: Carrier Tape Dimension Drawing Table 49: Carrier Tape Dimension Table (Unit: mm) T A0 K0 K1 F E 0.35 20.2 3.15 6.65 20.2 1.75 B0 24 W 44 P 32 9.3.2. Plastic Reel Figure 40: Plastic Reel Dimension Drawing Table 50: Plastic Reel Dimension Table (Unit: mm) D1 330 D2 100 W 44.5 BG950A-GL&BG951A-GL_Hardware_Design 79 / 84 9.3.3. Packing Process Place the packaged plastic reel, humidity indicator card and desiccant bag into a vacuum bag, then vacuumize it. LPWA Module Series Place the module into the carrier tape and use the cover tape to cover them; then wind the heat-sealed carrier tape to the plastic reel and use the protective tape for protection. One plastic reel can load 250 modules. Place the vacuum-packed plastic reel into a pizza box. Put 4 pizza boxes into 1 carton and seal it. One carton can pack 1000 modules. Figure 41: Packaging Process BG950A-GL&BG951A-GL_Hardware_Design 80 / 84 LPWA Module Series 10 Appendix References Table 51: Related Documents Document Name

[1] Quectel_UMTS&LTE_EVB_User_Guide

[2] Quectel_BG770A-GL&BG95xA-GL_QCFG_AT_Commands_Manual

[3] Quectel_BG770A-GL&BG95xA-GL_AT_Commands_Manual

[4] Quectel_BG770A-GL&BG95xA-GL_GNSS_Application_Note

[5] Quectel_RF_Layout_Application_Note

[6] Quectel_Module_Secondary_SMT_Application_Note Table 52: Terms and Abbreviations Abbreviation Description ADC Balun bps CHAP CoAP CTS DFOTA DL DRX EGSM Analog to Digital Converter Balanced to Unbalanced Bits Per Second Challenge Handshake Authentication Protocol Constrained Application Protocol Clear to Send Delta Firmware Upgrade Over the Air Downlink Discontinuous Reception Extended GSM (Global System for Mobile Communications) BG950A-GL&BG951A-GL_Hardware_Design 81 / 84 e-I-DRX Extended Idle Mode Discontinuous Reception LPWA Module Series GLONASS Global Navigation Satellite System (Russia) EPC ESD EVB FDD FTP(S) GNSS GPIO GPS GRFC HD HSS I/O I2C Inom LDO LED LGA LPF LPWA LTE LwM2M ME MLCC Evolved Packet Core Electrostatic Discharge Evaluation Board Frequency Division Duplex FTP over SSL Global Navigation Satellite System General-purpose Input/Output Global Positioning System Generic RF Controller Half Duplex Home Subscriber Server Input/Output Inter-Integrated Circuit Nominal Current Low-dropout Regulator Light Emitting Diode Land Grid Array Low Pass Filter Long Term Evolution Lightweight M2M Mobile Equipment Multi-layer Ceramic Chip Low-Power Wide-Area (Network) BG950A-GL&BG951A-GL_Hardware_Design 82 / 84 LPWA Module Series NMEA (National Marine Electronics Association) 0183 Interface Standard Mobile Originated Message Queuing Telemetry Transport Moisture Sensitivity Levels Mobile Terminated Network Identity and Time Zone Power Amplifier Password Authentication Protocol Printed Circuit Board Pulse Code Modulation Protocol Data Unit Packet Internet Groper Point of Sale Point-to-Point Protocol Power Saving Mode Radio Frequency Radio Frequency Integrated Circuit Right Hand Circularly Polarized Restriction of Hazardous Substances Request to Send Surface Acoustic Wave Surface Mount Device Short Message Service Secure Sockets Layer Transmission Control Protocol MO MQTT MSL MT NITZ NMEA PA PAP PCB PCM PDU PING POS PPP PSM RF RFIC RHCP RoHS RTS SAW SMD SMS SSL TCP BG950A-GL&BG951A-GL_Hardware_Design 83 / 84 LPWA Module Series TLS Tx UART UDP UL UE URC

(U)SIM Vmax Vnom Vmin VIHmax VIHmin VILmax VILmin VOHmax VOHmin VOLmax VoLTE VSWR WWAN Universal Asynchronous Receiver/Transmitter Transport Layer Security Transmit User Datagram Protocol Uplink User Equipment Unsolicited Result Code Maximum Voltage Nominal Voltage Minimum Voltage

(Universal) Subscriber Identity Module Maximum High-level Input Voltage Minimum High-level Input Voltage Maximum Low-level Input Voltage Minimum Low-level Input Voltage Maximum High-level Output Voltage Minimum High-level Output Voltage Maximum Low-level Output Voltage Voice over LTE. Voltage Standing Wave Ratio Wireless Wide Area Network BG950A-GL&BG951A-GL_Hardware_Design 84 / 84 LPWA Module Series CE Statement The minimum distance between the user and/or any bystander and the radiating structure of the transmitter is 20cm. Hereby, We, Quectel Wireless Solutions Co., Ltd. declares that the radio equipment type BG951A-GL is in compliance with the Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address:

Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China https://www.quectel.com/support/downloadb/TechnicalDocuments.htm The device operates with the following frequency bands and transmitting power:

According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a FCC Certification Requirements. mobile device. And the following conditions must be met:

1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time-

averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3.A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR2021BG951AGL. 4.To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:8.000dBi Catm LTE Band5/26:12.541dBi Catm LTE Band12:11.798dBi Catm LTE Band13:12.214dBi BG950A-GL&BG951A-GL_Hardware_Design 85 / 84 LPWA Module Series NB LTE Band2/25:11.000dBi NB LTE Band4/66:8.000dBi NB LTE Band5:12.541 dBi NB LTE Band12:11.798dBi NB LTE Band13:12.214dBi 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:

A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification (labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible;

then an additional permanent label referring to the enclosed module:Contains Transmitter Module FCC ID: XMR2021BG951AGL or Contains FCC ID: XMR2021BG951AGL must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. BG950A-GL&BG951A-GL_Hardware_Design 86 / 84 LPWA Module Series The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. IC Statement IRSS-GEN

"This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device." or "Le prsent appareil est conforme aux CNR dIndustrie Canada applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes :

1) lappareil ne doit pas produire de brouillage; 2) lutilisateur de lappareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible den compromettre le fonctionnement."

Dclaration sur l'exposition aux rayonnements RF The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body BG950A-GL&BG951A-GL_Hardware_Design 87 / 84 LPWA Module Series and must not transmit simultaneously with any other antenna or transmitter. L'autre utilis pour l'metteur doit tre install pour fournir une distance de sparation d'au moins 20 cm de toutes les personnes et ne doit pas tre colocalis ou fonctionner conjointement avec une autre antenne ou un autre metteur. To comply with IC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

Catm LTE Band2/25:11.000dBi Catm LTE Band4/66:8.000dBi Catm LTE Band5/26:12.541dBi Catm LTE Band12:11.798dBi Catm LTE Band13:12.214dBi Catm LTE Band85:11.798dBi NB LTE Band2/25:11.000dBi NB LTE Band4/66:8.000dBi NB LTE Band5:12.541 dBi NB LTE Band12:11.798dBi NB LTE Band13:12.214dBi The host product shall be properly labelled to identify the modules within the host product. The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host product; otherwise, the host product must be labeled to display the Innovation, Science and Economic Development Canada certification number for the module, preceded by the word Contains or similar wording expressing the same meaning, as follows:

BG950A-GL&BG951A-GL_Hardware_Design 88 / 84 LPWA Module Series Contains IC: 10224A-2021BG951A or where: 10224A-2021BG951A is the modules certification number. Le produit hte doit tre correctement tiquet pour identifier les modules dans le produit hte. L'tiquette de certification d'Innovation, Sciences et Dveloppement conomique Canada d'un module doit tre clairement visible en tout temps lorsqu'il est installdans le produit hte; sinon, le produit hte doit porter une tiquette indiquant le numro de certification d'Innovation, Sciences et Dveloppement conomique Canada pour le module, prcd du mot Contient ou d'un libell semblable exprimant la mme signification, comme suit:"Contient IC: 10224A-2021BG951A " ou "o: 10224A-2021BG951A est le numro de certification du module. BG950A-GL&BG951A-GL_Hardware_Design 89 / 84 LPWA Module Series BG950A-GL&BG951A-GL_Hardware_Design 90 / 84

Quectel Wireless Solutions Co., Ltd March 22, 2023 Eurofins Electrical and Electronic Testing NA, Inc. 914 West Patapsco Avenue Baltimore, MD 21230 RE: Attestation Statements Part 2.911(d)(5)(i) request for FCC IDXMR2021BG951AGL

[Quectel Wireless Solutions Co., Ltd] (the applicant) certifies that the equipment for which authorization is sought is not covered equipment prohibited from receiving an equipment authorization pursuant to section 2.903 of the FCC rules. Sincerely, Applicant signature Applicant printed nameJean Hu Quectel Wireless Solutions Co., Ltd March 23, 2023 Eurofins Electrical and Electronic Testing NA, Inc. 914 West Patapsco Avenue Baltimore, MD 21230 RE: Attestation Statements Part 2.911(d)(5)(ii) request for FCC IDXMR2021BG951AGL

[Quectel Wireless Solutions Co., Ltd] (the applicant) certifies that, as of the date of the filing of the application, the applicant is not identified on the Covered List as an entity producing covered equipment. Sincerely, Applicant signature Applicant printed nameJean Hu

Quectel Wireless Solutions Co.,Ltd Request for Confidentiality Date:

_20223-03-22_ Subject: Confidentiality Request for: _____ FCC ID: XMR2021BG951AGL ______ _____ IC: 10224A-021BG951AGL ______ Pursuant to FCC 47 CRF 0.457(d) and 0.459 and IC RSP-100, Section 12.4, the applicant requests that a part of the subject FCC application be held confidential. Type of Confidentiality Requested Permanent Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term Short Term ______(Insert Explanation as Necessary)______ Permanent*1 Permanent Permanent Permanent Permanent Permanent*

Exhibit Block Diagrams External Photos Internal Photos Operation Description/Theory of Operation Parts List & Placement/BOM Tune-Up Procedure Schematics Test Setup Photos Users Manual

*Note:

______ Quectel Wireless Solutions Co.,Ltd _____ has spent substantial effort in developing this product and it is one of the first of its kind in industry. Having the subject information easily available to "competition" would negate the advantage they have achieved by developing this product. Not protecting the details of the design will result in financial hardship. Permanent Confidentiality:

The applicant requests the exhibits listed above as permanently confidential be permanently withheld from public review due to materials that contain trade secrets and proprietary information not customarily released to the public. Short-Term Confidentiality:

The applicant requests the exhibits selected above as short term confidential be withheld from public view for a period of __180_ days from the date of the Grant of Equipment Authorization and prior to marketing. This is to avoid premature release of sensitive information prior to marketing or release of the product to the public. Applicant is also aware that they are responsible to notify TCB in the event information regarding the product or the product is made available to the public. TCB will then release the documents listed above for public disclosure pursuant to FCC Public Notice DA 04-1705. NOTE for Industry Canada Applications:

The applicant understands that until such time that IC distinguishes between Short Term and Permanent Confidentiality, either type of marked exhibit above will simply be marked Confidential when submitted to IC. Sincerely, By:

(Signature/Title2) Jean Hu

(Print name)

Quectel Wireless Solutions Company Limited Declaration of the Modular Approval Applicant / Grantee FCC ID:

Model:

Quectel Wireless Solutions Company Limited XMR2021BG951AGL BG951A-GL The single module transmitter has been evaluated then tested meeting the requirements under Part 15C Section 212 as below:

Modular approval requirement EUT Condition

(a) The radio elements of the modular transmitter must have their own shielding. The physical crystal and tuning capacitors may be located external to the shielded radio elements. The radio elements of the modular transmitter have their own shielding. Com ply YES

(b) The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with part 15 requirements under conditions of excessive data rates or over-modulation. The modular has buffered data inputs, it is integrated in chip. Please see schematic.pdf YES

(c)The modular transmitter must have its own powersupply regulation.

(d) The modular transmitter must comply with the antenna and transmission system requirements of Sections 15.203, 15.204(b) and 15.204(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of Section 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph (b) of this section.

(e)The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing for compliance with part 15 requirements. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with these the module (see Section 15.27(a)). The length of All power lines derived from the host device are regulated before energizing other circuits internal to the BG951A-GL. Please see schematic.pdf A permanently attached antenna or unique antenna connector is not a requirement for licensed modules. YES YES The BG951A-GL was tested in a stand alone configuration via a PCMCIA extender. Please see spurious setup YES Quectel Wireless Solutions Company Limited lines shall be the length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified and commercially available (see Section 15.31(i))mustnotbeinsideanotherdeviceduringtesting.

(f)The modular transmitter must be equipped with either a permanently affixed label or must be capable of electronically displaying its FCC identification number.

(g) The modular transmitter must comply with any specific rules or operating requirements that ordinarily apply to a complete transmitter and the manufacturer must provide adequate instructions along with the module to explain any suchrequirements. A copy of these instructions must be included in the application for equipmentauthorizationrequirements,whicharebasedonthei ntendeduse/configurations.

(h)The modular transmitter must comply with any applicable RF exposure requirements in its final configuration. The label position of BG951A-GL is clearly indicated. If the FCC ID of the module cannot be seen when it is installed, then the host label must include the text: Contains FCC ID:

XMR2021BG951AGL. Please see the label.pdf The BG951A-GL is compliant with all applicable FCC rules. Detail instructions are given in the User Manual. The BG951A-GL is approved to comply with the applicable RF exposure requirement, please see the MPE evaluation with 20cm as the distance restriction. YES YES YES Dated By:

2023/03/22 Jean Hu Signature Printed Title: Project Manager

Quectel Wireless Solutions Co., Ltd POWER OF ATTORNEY DATE: March 22, 2023 To:

Federal Communications Commission, Authorization & Evaluation Division, 7435 Oakland Mills Road, Columbia, MD 21046 We, the undersigned, hereby authorize TA Technology (Shanghai) Co., Ltd.

/Sun Yue on our behalf, to apply to FCC on our equipment for FCC ID:

XMR2021BG951AGL. Any and all acts carried out by TA Technology

(Shanghai) Co., Ltd. / Sun Yue on our behalf shall have the same effect as acts of our own. Sincerely, Signature:

Print name: Jean Hu Company: Quectel Wireless Solutions Co., Ltd

Quectel Wireless Solutions Co., Ltd Statement We Quectel Wireless Solutions Co., Ltd declare the following models. Product Name: LTE Cat M & Cat NB Module Model Name: BG951A-GL, BG951A-GL use ALT1250 chip, share the same chipset baseline, the same hardware design, and also support the same frequency bands. The only differences are:

BG951A-GL supports from Cat NB1 (3GPP R13) to Cat NB2 (3GPP R14) only by FW updating, the hardware remains the same. 3GPP Release 14 upgrade from Release 13 is a software upgrade, there is no hardware change for it. Your assistance on this matter is highly appreciated. Sincerely, Name: Jean Hu Title: Certification Section Manager

Quectel Wireless Solutions Co., Ltd Office of Engineering Technology Federal Communications Commission 7435 Oakland Mills Road Columbia, MD21046 Subject; Request for Long Term Confidentiality FCC ID: XMR2021BG951AGL To Whom It May Concern, Pursuant to the provisions of the Commissions rules Title 47 Sections 0.457 and 0.459, we are requesting the Commission to withhold the following attachment(s) as confidential documents from public disclosure indefinitely. These documents contain detailed system and equipment descriptions and are considered as proprietary information in operation of the equipment. The public disclosure of these documents might be harmful to our company and would give competitors an unfair advantage in the market. Schematic Diagram Block Diagram Parts List Operational Description Tune up procedure It is our understanding that all measurement test reports, FCC ID label format and correspondence during the certification review process cannot be granted as confidential documents and this information will be available for public review once the grant of equipment authorization is issued. Signature :

Print name:

Jean Hu Company: Quectel Wireless Solutions Co., Ltd

Quectel Wireless Solutions Company Limited Declaration of the Modular Approval Applicant / Grantee FCC ID:

Model:

Quectel Wireless Solutions Company Limited XMR2021BG951AGL BG951A-GL The single module transmitter has been evaluated then tested meeting the requirements under Part 15C Section 212 as below:

Modular approval requirement EUT Condition

(a) The radio elements of the modular transmitter must have their own shielding. The physical crystal and tuning capacitors may be located external to the shielded radio elements. The radio elements of the modular transmitter have their own shielding. Com ply YES

(b) The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with part 15 requirements under conditions of excessive data rates or over-modulation. The modular has buffered data inputs, it is integrated in chip. Please see schematic.pdf YES

(c)The modular transmitter must have its own powersupply regulation. All power lines derived from the host device are regulated before energizing other circuits internal to the BG951A-GL. Please see schematic.pdf YES Quectel Wireless Solutions Company Limited

(d) The modular transmitter must comply with the antenna and transmission system requirements of Sections 15.203, 15.204(b) and 15.204(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of Section 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph (b) of this section.

(e)The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing for compliance with part 15 requirements. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with these the module (see Section 15.27(a)). The length of lines shall be the length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified and commercially available (see Section 15.31(i))mustnotbeinsideanotherdeviceduringtesting.

(f)The modular transmitter must be equipped with either a permanently affixed label or must be capable of electronically displaying its FCC identification number.

(g) The modular transmitter must comply with any specific rules or operating requirements that ordinarily apply to a complete transmitter and the manufacturer must provide adequate instructions along with the module to explain any suchrequirements. A copy of these instructions must be included in the application for equipmentauthorizationrequirements,whicharebasedonthei ntendeduse/configurations. A permanently attached antenna or unique antenna connector is not a requirement for licensed modules. YES The BG951A-GLwas tested in a stand alone configuration via a PCMCIA extender. Please see spurious setup YES The label position of BG951A-GLis clearly indicated. If the FCC ID of the module cannot be seen when it is installed, then the host label must include the text:

Contains FCC ID: XMR2021BG951AGL. Please see the label.pdf The BG951A-GL is compliant with all applicable FCC rules. Detail instructions are given in the User Manual. YES YES

(h)The modular transmitter must comply with any applicable RF exposure requirements in its final configuration. The BG951A-GL is approved to comply with the applicable RF exposure requirement, please see the MPE YES Quectel Wireless Solutions Company Limited evaluation with 20cm as the distance restriction. Dated By:

2022/03/08 Jean Hu Signature Printed Title: Project Manager

Quectel Wireless Solutions Co., Ltd Statement We Quectel Wireless Solutions Co., Ltd declare the following models. Product Name: LTE Cat M1 & Cat NB1 Module Model Number: BG950A-GL, BG951A-GL BG950A-GL and BG951A-GL both use ALT1250 chip, share the same chipset baseline, the same hardware (LTE) and software design, and support the same frequency band. The difference is that BG950A-GL uses ALT1250s internal GNSS that just support GPS & GLONASS, while BG951A-GL add external GNSS chip CXD5605AGF to support BeiDou, Galileo, QZSS, and LTE&GNSS concurrency additionally. The main hardware difference is the GNSS chip CXD5605AGF and its peripheral circuit are NM on the BG950A-GL as follow table, and BG951A-GL changed the Boost DC-DC circuit and the layout of this circuit. There is no other change for RF parts. Module Chipset Version Frequency BG950A-GL ALT1250TG-D0 1.3 Cat M1 & Cat NB1 GNSS: GPS, GLONASS BG951A-GL 1.5 ALT1250TG-D0 CXD5605AGF Cat M1 & Cat NB1 GNSS: GPS, GLONASS, BeiDou, Galileo, QZSS Quectel Wireless Solutions Co., Ltd Designator BG950A-GL BG951A-GL

(Part Description)

(Part Description) Q0401 U0401 U0402 U0404 U0406 U0407 X0401 X0402 D0402\D0403\D0404 NM NM NM NM NM NM NM NM NM AUD PMOS VDS=-20V -0.66A VTH=-0.3~-

1.1V SOT-523 RO IC RF RX FILTER BEIDOU/GPS/GLONASS UNBALANCE 1.1MMX0.9MM H0.65MM RO IC ANALOG SWITCH 10-UTQFN 0.4PITCH 1.81.4MM H0.6MM RO MERO NOR 16MBIT 1.65-2.1V SPI LGA-8 2.0X3.0MM H0.5MM RO IC RF GNSS RECEIVER CXD5605AGF 49-

UFBGA 0.4PITCH 3.01X3.1MM H0.6MM RO PMIC LDO 1.6-5.5V 1.8V 300MA UTDFN-1 1-4L H0.6MM RO DIO SCHOTTKY VR=30V IF=100MA DFNWB0.6 X 0.3-2L-B RO CRY TCXO 26MHZ +/-0.5PPM 1.8V 2.0X1.6MM H0.8MM RO CRY TCXO 32.768KHZ +/-3PPM 1.8V 2.0X1.2MM H0.7MM RO Your assistance on this matter is highly appreciated. Sincerely, Name: Jean Hu Title: Certification Section