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EC21 Hardware Design LTE Module Series Rev. EC21_Hardware_Design_V1.5 Date: 2017-03-05 Status: Released www.quectel.com LTE Module Series EC21 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:
Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit:
http://quectel.com/support/sales.htm For technical support, or to report documentation errors, please visit:
http://quectel.com/support/technical.htm Or Email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE FORBIDDEN WITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2018. All rights reserved. EC21_Hardware_Design 1 / 105 LTE Module Series EC21 Hardware Design About the Document History Revision Date Author Description 1.0 2016-04-15 Yeoman CHEN Initial 1.1 2016-09-22 Yeoman CHEN/
Frank WANG/
Lyndon LIU 1.3 2017-01-24 Lyndon LIU/
Rex WANG 1. Updated frequency bands in Table 1. 2. Updated transmitting power, supported maximum baud rate of main UART, supported internet protocols, supported USB drivers of USB interface, and temperature range in Table 2. 3. Updated timing of turning on module in Figure 12. 4. Updated timing of turning off module in Figure 13. 5. Updated timing of resetting module in Figure 16. 6. Updated main UART supports baud rate in Chapter 3.11. 7. Added notes for ADC interface in Chapter 3.13. 8. Updated GNSS Performance in Table 21. 9. Updated operating frequencies of module in Table 23. 10. Added current consumption in Chapter 6.4. 11. Updated RF output power in Chapter 6.5. 12. Added RF receiving sensitivity in Chapter 6.6. 1. Updated frequency bands in Table 1. 2. Updated function diagram in Figure 1. 3. Updated pin assignment (top view) in Figure 2. 4. Added BT interface in Chapter 3.18.2. 5. Updated reference circuit of wireless connectivity interfaces with FC20 module in Figure 29. 6. Updated GNSS performance in Table 24. 7. Updated module operating frequencies in Table 26. 8. Added EC21-AUV current consumption in Table 38. 9. Updated EC21-A conducted RF receiving sensitivity of in Table 42. 10. Added EC21-J conducted RF receiving sensitivity in EC21_Hardware_Design 2 / 105 LTE Module Series EC21 Hardware Design Table 48. 1.4 2017-03-01 Geely YANG Deleted the LTE band TDD B41 of EC21-CT 1. Updated functional diagram in Figure 1. 2. Updated frequency bands in Table 1. 3. Updated UMTS and GSM features in Table 2. 4. Updated description of pin 40/136/137/138. 5. Updated PWRKEY pulled down time to 500ms in chapter 3.7.1 and reference circuit in Figure 10. 6. Updated reference circuit of (U)SIM interface in Figure 17&18. 7. Updated reference circuit of USB interface in Figure 19. 8. Updated PCM mode in Chapter 3.12. 9. Updated USB_BOOT reference circuit in Chapter 3.20. 1.5 2018-03-05 Annice ZHANG/
Lyndon LIU/
Frank WANG 10. Added SD card interface in Chapter 3.13. 11. Updated module operating frequencies in Table 26. 12. Updated EC21 series modules current consumption in Chapter 6.5. 13. Updated EC21 series modules conducted RF receiving sensitivity in Chapter 6.6. 14. Added thermal consideration description in Chapter 6.8. 15. Updated dimension tolerance information in Chapter 7. 16. Added storage temperature range in Table 2 and Chapter 6.3. 17. Updated RF output power in Table 42. 18. Updated antenna requirements in Table 29. 19. Updated GPRS multi-slot classes in Table 55. 20. Updated storage information in Chapter 8.1 EC21_Hardware_Design 3 / 105 LTE Module Series EC21 Hardware Design Contents About the Document.................................................................................................................................................2 Contents.......................................................................................................................................................................4 Table Index.................................................................................................................................................................. 7 Figure Index.................................................................................................................................................................9 1 Introduction...........................................................................................................................................................11 1.1. Safety Information......................................................................................................................................12 2 Product Concept..................................................................................................................................................13 2.1. General Description...................................................................................................................................13 2.2. Key Features.............................................................................................................................................. 14 2.3. Functional Diagram....................................................................................................................................17 2.4. Evaluation Board........................................................................................................................................17 3 Application Interfaces........................................................................................................................................ 18 3.1. General Description...................................................................................................................................18
.............................................................................................................................................. 3.2. Pin Description........................................................................................................................................... 19 3.3. Operating Modes........................................................................................................................................28 3.4. Power Saving..............................................................................................................................................29 3.4.1. Sleep Mode......................................................................................................................................29 3.4.1.1. UART Application................................................................................................................29 3.4.1.2. USB Application with USB Remote Wakeup Function................................................. 30 3.4.1.3. USB Application with USB Suspend/Resume and RI Function..................................31 3.4.1.4. USB Application without USB Suspend Function..........................................................31 3.4.2. Airplane Mode................................................................................................................................. 32 3.5. Power Supply..............................................................................................................................................33 3.5.1. Power Supply Pins......................................................................................................................... 33 3.5.2. Decrease Voltage Drop................................................................................................................. 33 3.5.3. Reference Design for Power Supply...........................................................................................34 3.5.4. Monitor the Power Supply.............................................................................................................35 3.6. Turn on and off Scenarios........................................................................................................................ 35 3.6.1. Turn on Module Using the PWRKEY.......................................................................................... 35 3.6.2. Turn off Module...............................................................................................................................37 3.6.2.1. Turn off Module Using the PWRKEY Pin........................................................................37 3.6.2.2. Turn off Module Using AT Command...............................................................................38 3.7. Reset the Module.......................................................................................................................................38 3.8. (U)SIM Interface.........................................................................................................................................40 3.9. USB Interface............................................................................................................................................. 42 3.10. UART Interfaces.......................................................................................................................................44 3.11. PCM and I2C Interfaces......................................................................................................................... 46 EC21_Hardware_Design 4 / 105 LTE Module Series EC21 Hardware Design 3.12. SD Card Interface....................................................................................................................................48 3.13. ADC Interfaces.........................................................................................................................................51 3.14. Network Status Indication...................................................................................................................... 51 3.15. STATUS.....................................................................................................................................................53 3.16. Behaviors of RI.........................................................................................................................................53 3.17. SGMII Interface........................................................................................................................................54 4 GNSS Receiver.....................................................................................................................................................58 4.1. General Description...................................................................................................................................58 4.2. GNSS Performance...................................................................................................................................58 4.3. Layout Guidelines...................................................................................................................................... 59 5 Antenna Interfaces..............................................................................................................................................60 5.1. Main/Rx-diversity Antenna Interfaces.....................................................................................................60 5.1.1. Pin Definition................................................................................................................................... 60 5.1.2. Operating Frequency.....................................................................................................................60 5.1.3. Reference Design of RF Antenna Interface...............................................................................61 5.1.4. Reference Design of RF Layout...................................................................................................62 5.2. GNSS Antenna Interface.......................................................................................................................... 64 5.3. Antenna Installation...................................................................................................................................65 5.3.1. Antenna Requirement....................................................................................................................65 5.3.2. Recommended RF Connector for Antenna Installation........................................................... 66 6 Electrical, Reliability and Radio Characteristics........................................................................................ 68 6.1. Absolute Maximum Ratings..................................................................................................................... 68 6.2. Power Supply Ratings...............................................................................................................................69 6.3. Operation and Storage Temperatures....................................................................................................69 6.4. Current Consumption................................................................................................................................70 6.5. RF Output Power....................................................................................................................................... 76 6.6. RF Receiving Sensitivity...........................................................................................................................77 6.7. Electrostatic Discharge............................................................................................................................. 81 6.8. Thermal Consideration..............................................................................................................................81 7 Mechanical Dimensions.....................................................................................................................................84 7.1. Mechanical Dimensions of the Module.................................................................................................. 84 7.2. Recommended Footprint..........................................................................................................................86 7.3. Design Effect Drawings of the Module...................................................................................................87 8 Storage, Manufacturing and Packaging........................................................................................................88 8.1. Storage........................................................................................................................................................ 88 8.2. Manufacturing and Soldering...................................................................................................................89 8.3. Packaging....................................................................................................................................................90 9 Appendix A References.....................................................................................................................................91 10 Appendix B GPRS Coding Schemes...........................................................................................................95 11 Appendix C GPRS Multi-slot Classes......................................................................................................... 96 EC21_Hardware_Design 5 / 105 12 Appendix D EDGE Modulation and Coding Schemes............................................................................98 LTE Module Series EC21 Hardware Design EC21_Hardware_Design 6 / 105 LTE Module Series EC21 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF EC21 SERIES MODULE................................................................................ 13 TABLE 2: KEY FEATURES OF EC21 MODULE..........................................................................................................14 TABLE 3: I/O PARAMETERS DEFINITION...................................................................................................................19 TABLE 4: PIN DESCRIPTION......................................................................................................................................... 19 TABLE 5: OVERVIEW OF OPERATING MODES........................................................................................................28 TABLE 6: VBAT AND GND PINS.................................................................................................................................... 33 TABLE 7: PIN DEFINITION OF PWRKEY.....................................................................................................................35 TABLE 8: PIN DEFINITION OF RESET_N................................................................................................................... 38 TABLE 9: PIN DEFINITION OF THE (U)SIM INTERFACE.........................................................................................40 TABLE 10: PIN DESCRIPTION OF USB INTERFACE............................................................................................... 42 TABLE 11: PIN DEFINITION OF MAIN UART INTERFACE.......................................................................................44 TABLE 12: PIN DEFINITION OF DEBUG UART INTERFACE.................................................................................. 44 TABLE 13: LOGIC LEVELS OF DIGITAL I/O................................................................................................................ 45 TABLE 14: PIN DEFINITION OF PCM AND I2C INTERFACES................................................................................47 TABLE 15: PIN DEFINITION OF SD CARD INTERFACE.......................................................................................... 49 TABLE 16: PIN DEFINITION OF ADC INTERFACES................................................................................................. 51 TABLE 17: CHARACTERISTIC OF ADC....................................................................................................................... 51 TABLE 18: PIN DEFINITION OF NETWORK CONNECTION STATUS/ACTIVITY INDICATOR.......................... 52 TABLE 19: WORKING STATE OF NETWORK CONNECTION STATUS/ACTIVITY INDICATOR........................52 TABLE 20: PIN DEFINITION OF STATUS.....................................................................................................................53 TABLE 21: BEHAVIOR OF RI......................................................................................................................................... 54 TABLE 22: PIN DEFINITION OF THE SGMII INTERFACE........................................................................................54 TABLE 23: PIN DEFINITION OF WIRELESS CONNECTIVITY INTERFACES....................... TABLE 24: PIN DEFINITION OF USB_BOOT INTERFACE.......................................................................................56 TABLE 25: GNSS PERFORMANCE.............................................................................................................................. 58 TABLE 26: PIN DEFINITION OF RF ANTENNAS........................................................................................................ 60 TABLE 27: MODULE OPERATING FREQUENCIES.................................................................................................. 60 TABLE 28: PIN DEFINITION OF GNSS ANTENNA INTERFACE..............................................................................64 TABLE 29: GNSS FREQUENCY.................................................................................................................................... 64 TABLE 30: ANTENNA REQUIREMENTS.......................................................................................................................65 TABLE 31: ABSOLUTE MAXIMUM RATINGS..............................................................................................................68 TABLE 32: POWER SUPPLY RATINGS....................................................................................................................... 69 TABLE 33: OPERATION AND STORAGE TEMPERATURES................................................................................... 69 TABLE 34: EC21-E CURRENT CONSUMPTION........................................................................................................ 70 TABLE 35: EC21-A CURRENT CONSUMPTION........................................................................................................ 72 TABLE 36: EC21-V CURRENT CONSUMPTION........................................................................................................ 73 TABLE 37: EC21-AUT CURRENT CONSUMPTION................................................................................................... 73 TABLE 38: EC21-AUV CURRENT CONSUMPTION...................................................................................................74 TABLE 39: EC21-J CURRENT CONSUMPTION.........................................................................................................75 TABLE 40: EC21-KL CURRENT CONSUMPTION...................................................................................................... 76 TABLE 41: GNSS CURRENT CONSUMPTION OF EC21 SERIES MODULE....................................................... 76 EC21_Hardware_Design 7 / 105 LTE Module Series EC21 Hardware Design TABLE 42: RF OUTPUT POWER...................................................................................................................................77 TABLE 43: EC21-E CONDUCTED RF RECEIVING SENSITIVITY...........................................................................77 TABLE 44: EC21-A CONDUCTED RF RECEIVING SENSITIVITY........................................................................... 78 TABLE 45: EC21-V CONDUCTED RF RECEIVING SENSITIVITY...........................................................................78 TABLE 46: EC21-AUT CONDUCTED RF RECEIVING SENSITIVITY......................................................................78 TABLE 47: EC21-KL CONDUCTED RF RECEIVING SENSITIVITY.........................................................................79 TABLE 48: EC21-J CONDUCTED RF RECEIVING SENSITIVITY............................................................................79 TABLE 49: EC21-AUV CONDUCTED RF RECEIVING SENSITIVITY..................................................................... 79 TABLE 50: EC21-AU CONDUCTED RF RECEIVING SENSITIVITY........................................................................ 80 TABLE 51: ELECTROSTATIC DISCHARGE CHARACTERISTICS.......................................................................... 81 TABLE 52: RELATED DOCUMENTS............................................................................................................................. 91 TABLE 53: TERMS AND ABBREVIATIONS..................................................................................................................91 TABLE 54: DESCRIPTION OF DIFFERENT CODING SCHEMES.......................................................................... 95 TABLE 55: GPRS MULTI-SLOT CLASSES.................................................................................................................. 96 TABLE 56: EDGE MODULATION AND CODING SCHEMES................................................................................... 98 EC21_Hardware_Design 8 / 105 LTE Module Series EC21 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM............................................................................................................................ 17 FIGURE 2: PIN ASSIGNMENT (TOP VIEW)................................................................................. FIGURE 3: SLEEP MODE APPLICATION VIA UART.................................................................................................29 FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP........................................................... 30 FIGURE 5: SLEEP MODE APPLICATION WITH RI....................................................................................................31 FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION...................................................... 32 FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION............................................................. 33 FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY.....................................................................................34 FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY........................................................................................35 FIGURE 10: TURN ON THE MODULE BY USING DRIVING CIRCUIT.................................................................. 36 FIGURE 11: TURN ON THE MODULE BY USING BUTTON.....................................................................................36 FIGURE 12: TIMING OF TURNING ON MODULE...................................................................................................... 37 FIGURE 13: TIMING OF TURNING OFF MODULE.................................................................................................... 38 FIGURE 14: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT............................................39 FIGURE 15: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON............................................................. 39 FIGURE 16: TIMING OF RESETTING MODULE........................................................................................................ 40 FIGURE 17: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
..................................................................................................................................................................................... 41 FIGURE 18: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR.. 41 FIGURE 19: REFERENCE CIRCUIT OF USB APPLICATION..................................................................................43 FIGURE 20: REFERENCE CIRCUIT WITH TRANSLATOR CHIP............................................................................45 FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT...................................................................... 46 FIGURE 22: PRIMARY MODE TIMING.........................................................................................................................47 FIGURE 23: AUXILIARY MODE TIMING...................................................................................................................... 47 FIGURE 24: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC.........................................48 FIGURE 25: REFERENCE CIRCUIT OF SD CARD................................................................................................... 50 FIGURE 26: REFERENCE CIRCUIT OF THE NETWORK INDICATOR................................................................. 52 FIGURE 27: REFERENCE CIRCUITS OF STATUS....................................................................................................53 FIGURE 28: SIMPLIFIED BLOCK DIAGRAM FOR ETHERNET APPLICATION...................................................55 FIGURE 29: REFERENCE CIRCUIT OF SGMII INTERFACE WITH PHY AR8033 APPLICATION................... 56 FIGURE 30: REFERENCE CIRCUIT OF WIRELESS CONNECTIVITY INTERFACES WITH FC20 MODULE FIGURE 31: REFERENCE CIRCUIT OF USB_BOOT INTERFACE........................................................................ 57 FIGURE 32: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE..................................................................... 62 FIGURE 33: MICROSTRIP LINE DESIGN ON A 2-LAYER PCB.............................................................................. 62 FIGURE 34: COPLANAR WAVEGUIDE LINE DESIGN ON A 2-LAYER PCB........................................................63 FIGURE 35: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND).................................................................................................................................................................. 63 FIGURE 36: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND).................................................................................................................................................................. 63 FIGURE 37: REFERENCE CIRCUIT OF GNSS ANTENNA...................................................................................... 65 EC21_Hardware_Design 9 / 105 LTE Module Series EC21 Hardware Design FIGURE 38: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM)...................................................... 66 FIGURE 39: MECHANICALS OF U.FL-LP CONNECTORS...................................................................................... 67 FIGURE 40: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM)...................................................................67 FIGURE 41: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE).....................82 FIGURE 42: REFERENCED HEATSINK DESIGN (HEATSINK AT THE BOTTOM OF CUSTOMERS PCB)...82 FIGURE 43: MODULE TOP AND SIDE DIMENSIONS...............................................................................................84 FIGURE 44: MODULE BOTTOM DIMENSIONS (BOTTOM VIEW)..........................................................................85 FIGURE 45: RECOMMENDED FOOTPRINT (TOP VIEW)........................................................................................86 FIGURE 46: TOP VIEW OF THE MODULE.................................................................................................................. 87 FIGURE 47: BOTTOM VIEW OF THE MODULE......................................................................................................... 87 FIGURE 48: REFLOW SOLDERING THERMAL PROFILE.......................................................................................89 FIGURE 49: TAPE AND REEL SPECIFICATIONS......................................................................................................90 EC21_Hardware_Design 10 / 105 LTE Module Series EC21 Hardware Design 1 Introduction This document defines the EC21 module and describes its air interface and hardware interface which are connected with customers applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details, as well as other related information of EC21 module. Associated with application note and user guide, customers can use EC21 module to design and set up mobile applications easily. EC21_Hardware_Design 1-11 / 105 LTE Module Series EC21 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating EC21 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for the customers failure to comply with these precautions. Full attention must be given to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. You must comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it is switched off. The operation of wireless appliances in an aircraft is forbidden, so as to prevent interference with communication systems. Consult the airline staff about the use of wireless devices on boarding the aircraft, if your device offers an Airplane Mode which must be enabled prior to boarding an aircraft. Switch off your wireless device when in hospitals,clinics or other health care facilities. These requests are desinged to prevent possible interference with sensitive medical equipment. Cellular terminals or mobiles operating over radio frequency signal and cellular network cannot be guaranteed to connect in all conditions, for example no mobile fee or with an invalid (U)SIM card. While you are in this condition and need emergent help, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on and in a service area with adequate cellular signal strength. Your cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency energy. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as your phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. EC21_Hardware_Design 1-12 / 105 LTE Module Series EC21 Hardware Design 2 Product Concept 2.1. General Description EC21 is a series of LTE-FDD/LTE-TDD/WCDMA/GSM wireless communication module with receive diversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE and GPRS networks. It also provides GNSS1) and voice functionality2) for customers specific applications. EC21 contains nine variants: EC21-E, EC21-A, EC21-V, EC21-AU, EC21-AUT, EC21-AUV, EC21-J, EC21-KL and EC20-CEL. Customers can choose a dedicated type based on the region or operator. The following table shows the frequency bands of EC21 series module. Table 1: Frequency Bands of EC21 Series Module Modules2) LTE Bands UMTS Bands GSM Rx-
diversity GNSS1) EC21-E FDD: B1/B3/B5/B7/B8/B20 EC21-A FDD: B2/B4/B12 EC21-V FDD: B4/B13 FDD: B1/B2/B3/B4/B5/B7/B8/
EC21-AU3) B28 TDD: B40 EC21-AUT FDD: B1/B3/B5/B7/B28 EC21-AUV FDD: B1/B3/B5/B8/B28 EC21-J FDD: B1/B3/B8/B18/B19/B26 EC21-KL FDD: B1/B3/B5/B7/B8 EC20-CEL FDD: B1/B3/B5 WCDMA:
B1/B5/B8 WCDMA:
B2/B4/B5 N 900/1800 N N WCDMA:
B1/B2/B5/B8 850/900/
1800/1900 WCDMA:
B1/B5 B1/B5/B8 N N N N N N N N Y Y Y Y Y Y Y Y N GPS, GLONASS, BeiDou/
Compass, Galileo, QZSS N N N N EC21_Hardware_Design 2-13 / 105 NOTES LTE Module Series EC21 Hardware Design 1. 2. 1) GNSS function is optional. 2) EC21 series module (EC21-E, EC21-A, EC21-V, EC21-AU, EC21-AUT, EC21-AUV, EC21-J, EC21-KL and EC20-CEL) contains Telematics version and Data-only version. Telematics version supports voice and data functions, while Data-only version only supports data function. 3) B2 band on EC21-AU module does not support Rx-diversity. 3. 4. Y = Supported. N = Not supported. With a compact profile of 29.0mm 32.0mm 2.4mm, EC21 can meet almost all requirements for M2M applications such as automotive, metering, tracking system, security, router, wireless POS, mobile computing device, PDA phone, tablet PC, etc. EC21 is an SMD type module which can be embedded into applications through its 144-pin pads, including 80 LCC signal pads and 64 other pads. 2.2. Key Features The following table describes the detailed features of EC21 module. Table 2: Key Features of EC21 Module Features Power Supply Transmitting Power LTE Features Details Supply voltage: 3.3V~4.3V Typical supply voltage: 3.8V Class 4 (33dBm2dB) for GSM850 Class 4 (33dBm2dB) for GSM900 Class 1 (30dBm2dB) for DCS1800 Class 1 (30dBm2dB) for PCS1900 Class E2 (27dBm3dB) for GSM850 8-PSK Class E2 (27dBm3dB) for GSM900 8-PSK Class E2 (26dBm3dB) for DCS1800 8-PSK Class E2 (26dBm3dB) for PCS1900 8-PSK Class 3 (24dBm+1/-3dB) for WCDMA bands Class 3 (23dBm2dB) for LTE-FDD bands Class 3 (23dBm2dB) for LTE-TDD bands Support up to non-CA Cat 1 FDD and TDD Support 1.4MHz~20MHz RF bandwidth Support MIMO in DL direction LTE-FDD: Max 10Mbps (DL)/5Mbps (UL) EC21_Hardware_Design 2-14 / 105 LTE Module Series EC21 Hardware Design LTE-TDD: Max 8.96Mbps (DL)/3.1Mbps (UL) Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA Support QPSK, 16-QAM and 64-QAM modulation DC-HSDPA: Max 42Mbps (DL) HSUPA: Max 5.76Mbps (UL) WCDMA: Max 384Kbps (DL)/384Kbps (UL) GPRS:
Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 107Kbps (DL)/85.6Kbps (UL) EDGE:
Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max 296Kbps (DL)/ 236.8Kbps (UL) Support TCP/UDP/PPP/FTP/HTTP/NTP/PING/QMI/ CMUX*/HTTPS*/
SMTP*/ MMS*/FTPS*/SMTPS*/SSL*/FILE* protocols Support PAP (Password Authentication Protocol) and CHAP (Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: ME by default UMTS Features GSM Features Internet Protocol Features SMS
(U)SIM Interface Support USIM/SIM card: 1.8V, 3.0V Audio Features PCM Interface USB Interface Support one digital audio interface: PCM interface GSM: HR/FR/EFR/AMR/AMR-WB WCDMA: AMR/AMR-WB LTE: AMR/AMR-WB Support echo cancellation and noise suppression Used for audio function with external codec Support 8-bit A-law*, -law* and 16-bit linear data formats Support long frame synchronization and short frame synchronization Support master and slave modes, but must be the master in long frame synchronization Compliant with USB 2.0 specification (slave only); the data transfer rate can reach up to 480Mbps Used for AT command communication, data transmission, GNSS NMEA output, software debugging, firmware upgrade and voice over USB*
Support USB serial drivers for: Windows XP, Windows Vista, Windows EC21_Hardware_Design 2-15 / 105 LTE Module Series EC21 Hardware Design UART Interface 7/8/8.1/10, Windows CE 5.0/6.0/7.0*, Linux 2.6/3.x/4.1, Android 4.x/5.x/6.x/7.x Main UART:
Used for AT command communication and data transmission Baud rates reach up to 921600bps, 115200bps by default Support RTS and CTS hardware flow control Debug UART:
Used for Linux console and log output 115200bps baud rate SD Card Interface Support SD 3.0 protocol SGMII Interface Support 10/100/1000Mbps Ethernet connectivity Rx-diversity Support LTE/WCDMA Rx-diversity GNSS Features AT Commands Network Indication Antenna Interface Physical Characteristics Temperature Range Gen8C Lite of Qualcomm Protocol: NMEA 0183 Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT commands Two pins including NET_MODE and NET_STATUS to indicate network connectivity status Including main antenna interface (ANT_MAIN), Rx-diversity antenna interface (ANT_DIV) and GNSS antenna interface (ANT_GNSS) Size: (29.00.15)mm (32.00.15)mm (2.40.2)mm Weight: approx. 4.9g Operation temperature range: -35C ~ +75C1) Extended temperature range: -40C ~ +85C2) Storage temperature range: -40C ~ +90C Firmware Upgrade USB interface and DFOTA*
RoHS All hardware components are fully compliant with EU RoHS directive NOTES 1. 2. 1) Within operating temperature range, the module is 3GPP compliant. 2) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to normal operating temperature levels, the module will meet 3GPP specifications again.
* means under development. 3. EC21_Hardware_Design 2-16 / 105 LTE Module Series EC21 Hardware Design 2.3. Functional Diagram The following figure shows a block diagram of EC21 and illustrates the major functional parts. Power management Baseband DDR+NAND flash Radio frequency Peripheral interfaces Figure 1: Functional Diagram 2.4. Evaluation Board In order to help customers develop applications with EC21, Quectel supplies an evaluation board (EVB), USB to RS-232 converter cable, earphone, antenna and other peripherals to control or test the module. EC21_Hardware_Design 2-17 / 105 LTE Module Series EC21 Hardware Design 3 Application Interfaces 3.1. General Description EC21 is equipped with 80 LCC pads plus 64 LGA pads that can be connected to cellular application platform. Sub-interfaces included in these pads are described in detail in the following chapters:
Power supply
(U)SIM interface USB interface UART interfaces PCM and I2C interfaces SD card interface ADC interfaces Status indication SGMII interface Wireless connectivity interfaces USB_BOOT interface EC21_Hardware_Design 3-18 / 105 LTE Module Series EC21 Hardware Design 3.2. Pin Description The following tables show the pin definition of EC21 module. Table 3: I/O Parameters Definition Type IO DI DO PI PO AI AO OD Description Bidirectional Digital input Digital output Power input Power output Analog input Analog output Open drain Table 4: Pin Description Power Supply Pin Name Pin No. I/O Description VBAT_BB 59, 60 VBAT_RF 57, 58 PI PI Power supply for modules baseband part Power supply for modules RF part DC Characteristics Comment Vmax=4.3V Vmin=3.3V Vnorm=3.8V Vmax=4.3V Vmin=3.3V Vnorm=3.8V It must be able to provide sufficient current up to 0.8A. It must be able to provide sufficient current up to 1.8A in a burst transmission. Power supply for external GPIOs pull-up circuits. If unused, keep it open. VDD_EXT 7 PO Provide 1.8V for external circuit Vnorm=1.8V IOmax=50mA GND 8, 9, 19, 22, 36, 46, Ground EC21_Hardware_Design 3-19 / 105 LTE Module Series EC21 Hardware Design 48, 50~54, 56, 72, 85~112 Turn on/off Pin Name Pin No. I/O Description DC Characteristics PWRKEY 21 RESET_N 20 Status Indication DI DI Turn on/off the module Reset signal of the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pin Name Pin No. I/O Description STATUS 61 OD Indicate the module operating status DC Characteristics The drive current should be less than 0.9mA. NET_MODE 5 DO 6 DO NET_ STATUS USB Interface Indicate the module network registration mode Indicate the module network activity status VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V Comment The output voltage is 0.8V because of the diode drop in the Qualcomm chipset. If unused, keep it open. Comment Require external pull-up. If unused, keep it open. 1.8V power domain. It cannot be pulled up before startup. If unused, keep it open. 1.8V power domain. If unused, keep it open. Pin Name Pin No. I/O Description USB_VBUS 71 PI USB detection USB_DP 69 USB_DM 70 IO IO USB differential data bus (+) USB differential data bus (-) DC Characteristics Vmax=5.25V Vmin=3.0V Vnorm=5.0V Compliant with USB 2.0 standard specification. Compliant with USB 2.0 standard specification. Comment Typical: 5.0V If unused, keep it open. Require differential impedance of 90. If unused, keep it open. Require differential impedance of 90. If unused, keep it open. EC21_Hardware_Design 3-20 / 105 LTE Module Series EC21 Hardware Design
(U)SIM Interface Pin Name Pin No. I/O Description DC Characteristics Comment USIM_GND 10 Specified ground for
(U)SIM card USIM_VDD 14 PO Power supply for
(U)SIM card USIM_DATA 15 IO Data signal of
(U)SIM card USIM_CLK 16 DO Clock signal of
(U)SIM card USIM_RST 17 DO Reset signal of
(U)SIM card USIM_ PRESENCE 13 DI
(U)SIM card insertion detection For 1.8V (U)SIM:
Vmax=1.9V Vmin=1.7V For 3.0V (U)SIM:
Vmax=3.05V Vmin=2.7V IOmax=50mA For 1.8V (U)SIM:
VILmax=0.6V VIHmin=1.2V VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM:
VILmax=1.0V VIHmin=1.95V VOLmax=0.45V VOHmin=2.55V For 1.8V (U)SIM:
VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM:
VOLmax=0.45V VOHmin=2.55V For 1.8V (U)SIM:
VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM:
VOLmax=0.45V VOHmin=2.55V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Either 1.8V or 3.0V is supported by the module automatically. 1.8V power domain. If unused, keep it open. EC21_Hardware_Design 3-21 / 105 LTE Module Series EC21 Hardware Design Main UART Interface Pin Name Pin No. I/O Description DC Characteristics RI DCD CTS RTS 62 63 64 65 DO Ring indicator DO Data carrier detection DO Clear to send DI Request to send DTR 66 DI Data terminal ready, sleep mode control TXD RXD 67 68 DO Transmit data DI Receive data VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Debug UART Interface Pin Name Pin No. I/O Description DC Characteristics DBG_TXD 12 DO Transmit data DBG_RXD 11 DI Receive data ADC Interface VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Comment 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. Pulled up by default. Low level wakes up the module. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. Comment 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment EC21_Hardware_Design 3-22 / 105 LTE Module Series EC21 Hardware Design ADC0 ADC1 45 44 PCM Interface AI AI General purpose analog to digital converter General purpose analog to digital converter Voltage range:
0.3V to VBAT_BB If unused, keep it open. Voltage range:
0.3V to VBAT_BB If unused, keep it open. Pin Name Pin No. I/O Description PCM_IN 24 DI PCM data input DC Characteristics VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Comment 1.8V power domain. If keep open. unused, it PCM_OUT 25 DO PCM data output PCM_SYNC 26 IO frame PCM data synchronization signal PCM_CLK 27 IO PCM clock VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V I2C Interface Pin Name Pin No. I/O Description DC Characteristics I2C_SCL 41 OD I2C_SDA 42 OD I2C serial clock. Used for external codec I2C serial data. Used for external codec 1.8V power domain. If unused, keep it open. 1.8V power domain. In master mode, it is an output signal. In slave mode, it is an input signal. If unused, keep it open. 1.8V power domain. In master mode, it is an output signal. In slave mode, it is an input signal. If unused, keep it open. Comment External pull-up resistor is required. 1.8V only. If unused, keep it open. External pull-up resistor is required. 1.8V only. If unused, keep it EC21_Hardware_Design 3-23 / 105 SD Card Interface Pin Name Pin No. I/O Description SDC2_ DATA3 28 IO SD card SDIO bus DATA3 SDC2_ DATA2 29 IO SD card SDIO bus DATA2 SDC2_ DATA1 30 IO SD card SDIO bus DATA1 LTE Module Series EC21 Hardware Design open. Comment SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. DC Characteristics 1.8V signaling:
VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling:
VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling:
VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling:
VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling:
VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling:
EC21_Hardware_Design 3-24 / 105 LTE Module Series EC21 Hardware Design SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling:
VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling:
VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling:
VOLmax=0.45V VOHmin=1.4V 3.0V signaling:
VOLmax=0.38V VOHmin=2.01V 1.8V signaling:
VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling:
VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V SDC2_ DATA0 31 IO SD card SDIO bus DATA0 SDC2_CLK 32 DO SD card SDIO bus clock SDC2_CMD 33 IO SD card SDIO bus command EC21_Hardware_Design 3-25 / 105 SD_INS_ DET 23 DI SD card insertion detect VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VDD_SDIO 34 PO SD card SDIO bus pull-up power IOmax=50mA SGMII Interface Pin Name Pin No. I/O Description EPHY_RST_N 119 DO Ethernet PHY reset EPHY_INT_N 120 DI Ethernet PHY interrupt SGMII_ MDATA 121 IO SGMII MDIO
(Management Data Input/Output) data SGMII_ MCLK 122 DO SGMII MDIO
(Management Data Input/Output) clock DC Characteristics For 1.8V:
VOLmax=0.45V VOHmin=1.4V For 2.85V:
VOLmax=0.35V VOHmin=2.14V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V For 1.8V:
VOLmax=0.45V VOHmin=1.4V VILmax=0.58V VIHmin=1.27V For 2.85V:
VOLmax=0.35V VOHmin=2.14V VILmax=0.71V VIHmin=1.78V For 1.8V:
VOLmax=0.45V VOHmin=1.4V For 2.85V:
VOLmax=0.35V VOHmin=2.14V LTE Module Series EC21 Hardware Design 1.8V power domain. If unused, keep it open. 1.8V/2.85V configurable. Cannot be used for SD card power. If unused, keep it open. Comment 1.8V/2.85V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V/2.85V power domain. If unused, keep it open. 1.8V/2.85V power domain. If unused, keep it open. EC21_Hardware_Design 3-26 / 105 USIM2_VDD 128 PO SGMII MDIO pull-up power source SGMII_TX_M 123 SGMII_TX_P 124 SGMII_RX_P 125 SGMII_RX_M 126 RF Interface AO AO AI AI SGMII transmission
- minus SGMII transmission
- plus SGMII receiving
- plus SGMII receiving
- minus Pin Name Pin No. I/O Description DC Characteristics AI Diversity antenna pad IO Main antenna pad AI GNSS antenna pad 35 49 47 ANT_DIV ANT_MAIN ANT_GNSS GPIO Pins Pin Name Pin No. I/O Description DC Characteristics WAKEUP_IN 1 DI Sleep mode control W_DISABLE# 4 DI Airplane mode control VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V LTE Module Series EC21 Hardware Design Configurable power source. 1.8V/2.85V power domain. External pull-up for SGMII MDIO pins. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. Comment 50 impedance If unused, keep it open. 50 impedance 50 impedance If unused, keep it open. Comment 1.8V power domain. Cannot be pulled up before startup. Low level wakes up the module. If unused, keep it open. 1.8V power domain. Pull-up by default. At low voltage level, module can enter into airplane mode. If unused, keep it EC21_Hardware_Design 3-27 / 105 AP_READY 2 DI Application processor sleep state detection VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V LTE Module Series EC21 Hardware Design open. 1.8V power domain. If unused, keep it open. USB_BOOT Interface Pin Name Pin No. I/O Description USB_BOOT 115 DI Force the module to enter into emergency download mode. DC Characteristics VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Comment 1.8V power domain. Active high. If unused, keep it open. I/O Description DC Characteristics Comment Reserved Keep these pins unconnected. RESERVED Pins Pin Name RESERVED Pin No. 3, 18, 23, 43, 55, 73~84, 113, 114, 116, 117, 140-144. NOTES
* means under development. 1. 2. Pads 24~27 are multiplexing pins used for audio design on EC21 module and BT function on FC20 module. 3.3. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Details Normal Operation Idle Talk/Data Software is active. The module has registered on the network, and it is ready to send and receive data. Network connection is ongoing. In this mode, the power consumption is decided by network setting and data transfer rate. EC21_Hardware_Design 3-28 / 105 LTE Module Series EC21 Hardware Design Minimum Functionality Mode Airplane Mode Sleep Mode Power down Mode AT+CFUN command can set the module to a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. AT+CFUN command or W_DISABLE# pin can set the module to airplane mode. In this case, RF function will be invalid. In this mode, the current consumption of the module will be reduced to the minimal level. During this mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally. In this mode, the power management unit shuts down the power supply. Software is not active. The serial interface is not accessible. Operating voltage (connected to VBAT_RF and VBAT_BB) remains applied. 3.4. Power Saving 3.4.1. Sleep Mode EC21 is able to reduce its current consumption to a minimum value during the sleep mode. The following section describes power saving procedures of EC21 module. 3.4.1.1. UART Application If the host communicates with module via UART interface, the following preconditions can let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Drive DTR to high level. The following figure shows the connection between the module and the host. Figure 3: Sleep Mode Application via UART EC21_Hardware_Design 3-29 / 105 LTE Module Series EC21 Hardware Design Driving the host DTR to low level will wake up the module. When EC21 has a URC to report, RI signal will wake up the host. Refer to Chapter 3.17 for details about RI behaviors. AP_READY will detect the sleep state of the host (can be configured to high level or low level detection). Please refer to AT+QCFG="apready"* command for details. NOTE
* means under development. 3.4.1.2. USB Application with USB Remote Wakeup Function If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions must be met to let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open. The hosts USB bus, which is connected with the modules USB interface, enters into suspended state. The following figure shows the connection between the module and the host. Figure 4: Sleep Mode Application with USB Remote Wakeup Sending data to EC21 through USB will wake up the module. When EC21 has a URC to report, the module will send remote wake-up signals via USB bus so as to wake up the host. EC21_Hardware_Design 3-30 / 105 LTE Module Series EC21 Hardware Design 3.4.1.3. USB Application with USB Suspend/Resume and RI Function If the host supports USB suspend/resume, but does not support remote wake-up function, the RI signal is needed to wake up the host. There are three preconditions to let the module enter into the sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open. The hosts USB bus, which is connected with the modules USB interface, enters into suspended state. The following figure shows the connection between the module and the host. Figure 5: Sleep Mode Application with RI Sending data to EC21 through USB will wake up the module. When EC21 has a URC to report, RI signal will wake up the host. 3.4.1.4. USB Application without USB Suspend Function If the host does not support USB suspend function, USB_VBUS should be disconnected via an additional control circuit to let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open. Disconnect USB_VBUS. The following figure shows the connection between the module and the host. EC21_Hardware_Design 3-31 / 105 LTE Module Series EC21 Hardware Design Figure 6: Sleep Mode Application without Suspend Function Switching on the power switch to supply power to USB_VBUS will wake up the module. NOTE Please pay attention to the level match shown in dotted line between the module and the host. Refer to document [1] for more details about EC21 power management application. 3.4.2. Airplane Mode When the module enters into airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible. This mode can be set via the following ways. Hardware:
The W_DISABLE# pin is pulled up by default. Driving it to low level will let the module enter into airplane mode. Software:
AT+CFUN command provides the choice of the functionality level through setting <fun> into 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode. RF function is disabled. NOTES 1. W_DISABLE# control function is disabled in firmware by default. It can be enabled by AT+QCFG="airplanecontrol" command. This command is under development. 2. The execution of AT+CFUN command will not affect GNSS function. EC21_Hardware_Design 3-32 / 105 LTE Module Series EC21 Hardware Design 3.5. Power Supply 3.5.1. Power Supply Pins EC21 provides four VBAT pins for connection with the external power supply. There are two separate voltage domains for VBAT. Two VBAT_RF pins for modules RF part. Two VBAT_BB pins for modules baseband part. The following table shows the details of VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. VBAT_RF 57, 58 VBAT_BB 59, 60 Description Power supply for modules RF part. Power supply for modules baseband part. GND 8, 9, 19, 22, 36, 46, 48, 50~54, 56, 72, 85~112 Ground 3.5.2. Decrease Voltage Drop Min. Typ. Max. Unit 3.3 3.3
-
3.8 3.8 0 4.3 4.3
-
V V V The power supply range of the module is from 3.3V to 4.3V. Please make sure that the input voltage will never drop below 3.3V. The following figure shows the voltage drop during burst transmission in 2G network. The voltage drop will be less in 3G and 4G networks. Figure 7: Power Supply Limits during Burst Transmission EC21_Hardware_Design 3-33 / 105 LTE Module Series EC21 Hardware Design To decrease voltage drop, a bypass capacitor of about 100F with low ESR (ESR=0.7) should be used, and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT_BB/VBAT_RF pins. The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 1mm; and the width of VBAT_RF trace should be no less than 2mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to get a stable power source, it is suggested that a zener diode whose reverse zener voltage is 5.1V and dissipation power is more than 0.5W should be used. The following figure shows the star structure of the power supply. Figure 8: Star Structure of the Power Supply 3.5.3. Reference Design for Power Supply Power design for the module is very important, as the performance of the module largely depends on the power source. The power supply should be able to provide sufficient current up to 2A at least. If the voltage drop between the input and output is not too high, it is suggested that an LDO should be used to supply power for the module. If there is a big voltage difference between the input source and the desired output (VBAT), a buck converter is preferred to be used as the power supply. The following figure shows a reference design for +5V input power source. The typical output of the power supply is about 3.8V and the maximum load current is 3A. EC21_Hardware_Design 3-34 / 105 LTE Module Series EC21 Hardware Design Figure 9: Reference Circuit of Power Supply NOTE In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, the power supply can be cut off. 3.5.4. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.6. Turn on and off Scenarios 3.6.1. Turn on Module Using the PWRKEY The following table shows the pin definition of PWRKEY. Table 7: Pin Definition of PWRKEY Pin Name Pin No. PWRKEY 21 I/O DI Description Turn on/off the module Comment The output voltage is 0.8V because of the diode drop in the Qualcomm chipset. When EC21 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level for at least 500ms. It is recommended to use an open drain/collector driver to control the PWRKEY. After STATUS pin (require external pull-up) outputting a low level, PWRKEY pin can be released. A simple reference circuit is illustrated in the following figure. EC21_Hardware_Design 3-35 / 105 LTE Module Series EC21 Hardware Design Figure 10: Turn on the Module by Using Driving Circuit The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. Figure 11: Turn on the Module by Using Button The turn on scenario is illustrated in the following figure. EC21_Hardware_Design 3-36 / 105 LTE Module Series EC21 Hardware Design Figure 12: Timing of Turning on Module NOTE Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms. 3.6.2. Turn off Module The following procedures can be used to turn off the module:
Normal power down procedure: Turn off the module using the PWRKEY pin. Normal power down procedure: Turn off the module using AT+QPOWD command. 3.6.2.1. Turn off Module Using the PWRKEY Pin Driving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-down procedure after the PWRKEY is released. The power-down scenario is illustrated in the following figure. EC21_Hardware_Design 3-37 / 105 LTE Module Series EC21 Hardware Design Figure 13: Timing of Turning off Module 3.6.2.2. Turn off Module Using AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module via PWRKEY pin. Please refer to document [2] for details about AT+QPOWD command. NOTE 1. In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, the power supply can be cut off. 2. When turn off module with AT command, please keep PWRKEY at high level after the execution of power-off command. Otherwise the module will be turned on again after successfully turn-off. 3.7. Reset the Module The RESET_N pin can be used to reset the module. The module can be reset by driving RESET_N to a low level voltage for time between 150ms and 460ms. Table 8: Pin Definition of RESET_N Pin Name Pin No. I/O Description Comment EC21_Hardware_Design 3-38 / 105 LTE Module Series EC21 Hardware Design RESET_N 20 DI Reset the module 1.8V power domain The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N. Figure 14: Reference Circuit of RESET_N by Using Driving Circuit Figure 15: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated in the following figure. EC21_Hardware_Design 3-39 / 105 LTE Module Series EC21 Hardware Design Figure 16: Timing of Resetting Module NOTES 1. Use RESET_N only when turning off the module by AT+QPOWD command and PWRKEY pin failed. 2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.8. (U)SIM Interface The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards are supported. Table 9: Pin Definition of the (U)SIM Interface Pin Name Pin No. I/O Description USIM_VDD USIM_DATA USIM_CLK USIM_RST USIM_ PRESENCE USIM_GND 14 15 16 17 13 10 PO IO DO DO DI Power supply for (U)SIM card Data signal of (U)SIM card Clock signal of (U)SIM card Reset signal of (U)SIM card
(U)SIM card insertion detection Specified ground for (U)SIM card Comment Either 1.8V or 3.0V is supported by the module automatically. 1.8V power domain. If unused, keep it open. EC21 supports (U)SIM card hot-plug via the USIM_PRESENCE pin. The function supports low level and EC21_Hardware_Design 3-40 / 105 LTE Module Series EC21 Hardware Design high level detections, and is disabled by default. Please refer to document [2] about AT+QSIMDET command for details. The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector. Figure 17: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. A reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. Figure 18: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in customers applications, please EC21_Hardware_Design 3-41 / 105 LTE Module Series EC21 Hardware Design follow the criteria below in (U)SIM circuit design:
Keep placement of (U)SIM card connector to the module as close as possible. Keep the trace length as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1uF, and place it as close to (U)SIM card connector as possible. the ground is complete on customers PCB, USIM_GND can be connected to PCB ground directly. If To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasitic capacitance should not be more than 15pF. The 0 resistors should be added in series between the module and the (U)SIM card to facilitate debugging. The 33pF capacitors are used for filtering interference of GSM900MHz. Please note that the (U)SIM peripheral circuit should be close to the
(U)SIM card connector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion are applied, and should be placed close to the (U)SIM card connector. 3.9. USB Interface EC21 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports high-speed (480Mbps) and full-speed (12Mbps) modes. The USB interface is used for AT command communication, data transmission, GNSS NMEA sentences output, software debugging, firmware upgrade and voice over USB*. The following table shows the pin definition of USB interface. Table 10: Pin Description of USB Interface Pin Name Pin No. I/O Description USB_DP USB_DM USB_VBUS GND 69 70 71 72 IO IO PI Comment Require differential impedance of 90 Require differential impedance of 90 USB differential data bus (+) USB differential data bus (-) Used for detecting the USB connection Typically 5.0V Ground For more details about the USB 2.0 specification, please visit http://www.usb.org/home. EC21_Hardware_Design 3-42 / 105 LTE Module Series EC21 Hardware Design The USB interface is recommended to be reserved for firmware upgrade in customers designs. The following figure shows a reference circuit of USB interface. Figure 19: Reference Circuit of USB Application A common mode choke L1 is recommended to be added in series between the module and customers MCU in order to suppress EMI spurious transmission. Meanwhile, the 0 resistors (R3 and R4) should be added in series between the module and the test points so as to facilitate debugging, and the resistors are not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components must be placed close to the module, and also these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles should be complied with when design the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90. Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer with ground shielding on not only upper and lower layers but also right and left sides. Pay attention to the influence of junction capacitance of ESD protection components on USB data lines. Typically, the capacitance value should be less than 2pF. Keep the ESD protection components to the USB connector as close as possible. NOTES 1. EC21 module can only be used as a slave device. 2.
* means under development. EC21_Hardware_Design 3-43 / 105 LTE Module Series EC21 Hardware Design 3.10. UART Interfaces The module provides two UART interfaces: the main UART interface and the debug UART interface. The following shows their features. The main UART interface supports 4800bps, 9600bps, 19200bps, 38400bps, 57600bps, 115200bps, 230400bps, 460800bps and 921600bps baud rates, and the default is 115200bps. The interface is used for data transmission and AT command communication. The debug UART interface supports 115200bps baud rate. It is used for Linux console and log output. The following tables show the pin definition of the UART interfaces. Table 11: Pin Definition of Main UART Interface Pin Name Pin No. RI DCD CTS RTS DTR TXD RXD 62 63 64 65 66 67 68 I/O DO DO DO DI DI DO DI Comment Description Ring indicator Data carrier detection Clear to send Request to send 1.8V power domain Data terminal ready Transmit data Receive data Table 12: Pin Definition of Debug UART Interface Pin Name Pin No. DBG_TXD DBG_RXD 12 11 I/O DO DI Description Transmit data Receive data Comment 1.8V power domain 1.8V power domain EC21_Hardware_Design 3-44 / 105 LTE Module Series EC21 Hardware Design The logic levels are described in the following table. Table 13: Logic Levels of Digital I/O Parameter VIL VIH VOL VOH Min.
-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V The module provides 1.8V UART interface. A level translator should be used if customers application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows a reference design. Figure 20: Reference Circuit with Translator Chip Please visit http://www.ti.com for more information. Another example with transistor translation circuit is shown as below. The circuit design of dotted line section can refer to the design of solid line section, in terms of both module input and output circuit designs, but please pay attention to the direction of connection. EC21_Hardware_Design 3-45 / 105 LTE Module Series EC21 Hardware Design Figure 21: Reference Circuit with Transistor Circuit NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 3.11. PCM and I2C Interfaces EC21 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the following modes and one I2C interface:
Primary mode (short frame synchronization, works as both master and slave) Auxiliary mode (long frame synchronization, works as master only) In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHz PCM_CLK at 16kHz PCM_SYNC. In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates with a 256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC. EC21 supports 8-bit A-law* and -law*, and also 16-bit linear data formats. The following figures show the primary modes timing relationship with 8kHz PCM_SYNC and 2048kHz PCM_CLK, as well as the auxiliary modes timing relationship with 8kHz PCM_SYNC and 256kHz PCM_CLK. EC21_Hardware_Design 3-46 / 105 LTE Module Series EC21 Hardware Design Figure 22: Primary Mode Timing Figure 23: Auxiliary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design. Table 14: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_IN PCM_OUT 24 25 DI DO PCM data input 1.8V power domain PCM data output 1.8V power domain EC21_Hardware_Design 3-47 / 105 LTE Module Series EC21 Hardware Design PCM_SYNC PCM_CLK I2C_SCL I2C_SDA 26 27 41 42 IO IO OD OD PCM data frame synchronization signal 1.8V power domain PCM data bit clock 1.8V power domain I2C serial clock I2C serial data Require external pull-up to 1.8V Require external pull-up to 1.8V Clock and mode can be configured by AT command, and the default configuration is master mode using short frame synchronization format with 2048KHz PCM_CLK and 8KHz PCM_SYNC. Please refer to document [2] about AT+QDAI command for details. The following figure shows a reference design of PCM interface with external codec IC. Figure 24: Reference Circuit of PCM Application with Audio Codec NOTES 1. 2.
* means under development. It PCM_CLK. is recommended to reserve RC (R=22, C=22pF) circuits on the PCM lines, especially for 3. EC21 works as a master device pertaining to I2C interface. 3.12. SD Card Interface EC21 supports SDIO3.0 interface for SD card. The following table shows the pin definition of SD card interface. EC21_Hardware_Design 3-48 / 105 Table 15: Pin Definition of SD Card Interface Pin Name Pin No. I/O Description SDC2_DATA3 28 IO SD card SDIO bus DATA3 SDC2_DATA2 29 IO SD card SDIO bus DATA2 SDC2_DATA1 30 IO SD card SDIO bus DATA1 SDC2_DATA0 31 IO SD card SDIO bus DATA0 SDC2_CLK 32 DO SD card SDIO bus clock SDC2_CMD 33 IO SD card SDIO bus command VDD_SDIO 34 PO SD card SDIO bus pull up power LTE Module Series EC21 Hardware Design Comment SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open. 1.8V/2.85V configurable. Cannot be used for SD card power. If unused, keep it open. EC21_Hardware_Design 3-49 / 105 SD_INS_DET 23 DI SD card insertion detection The following figure shows a reference design of SD card. LTE Module Series EC21 Hardware Design 1.8V power domain. If unused, keep it open. Figure 25: Reference Circuit of SD card In SD card interface design, in order to ensure good communication performance with SD card, the following design principles should be complied with:
The voltage range of SD card power supply VDD_3V is 2.7V~3.6V and a sufficient current up to 0.8A should be provided. As the maximum output current of VDD_SDIO is 50mA which can only be used for SDIO pull-up resistors, an externally power supply is needed for SD card. To avoid jitter of bus, resistors R7~R11 are needed to pull up the SDIO to VDD_SDIO. Value of these resistors is among 10K~100K and the recommended value is 100K. VDD_SDIO should be used as the pull-up power. In order to adjust signal quality, it is recommended to add 0 resistors R1~R6 in series between the module and the SD card. The bypass capacitors C1~C6 are reserved and not mounted by default. All resistors and bypass capacitors should be placed close to the module. In order to offer good ESD protection, it is recommended to add a TVS diode on SD card pins near the SD card connector with junction capacitance less than 15pF. Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals, etc., as well as noisy signals such as clock signals, DCDC signals, etc. It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data trace is 50 (10%). Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of SDIO bus should be less than 15pF. It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm and the total routing length less than 50mm. The total trace length inside the module is 27mm, so the exterior total trace length should be less than 23mm. EC21_Hardware_Design 3-50 / 105 LTE Module Series EC21 Hardware Design 3.13. ADC Interfaces The module provides two analog-to-digital converter (ADC) interfaces. AT+QADC=0 command can be used to read the voltage value on ADC0 pin. AT+QADC=1 command can be used to read the voltage value on ADC1 pin. For more details about these AT commands, please refer to document [2]. In order to improve the accuracy of ADC, the trace of ADC should be surrounded by ground. Table 16: Pin Definition of ADC Interfaces Pin Name Pin No. Description ADC0 ADC1 45 44 General purpose analog to digital converter General purpose analog to digital converter The following table describes the characteristic of ADC function. Table 17: Characteristic of ADC Parameter ADC0 Voltage Range ADC1 Voltage Range ADC Resolution NOTES Min. 0.3 0.3 Typ. Max. VBAT_BB VBAT_BB 15 Unit V V bits 1. ADC input voltage must not exceed VBAT_BB. 2. 3. It is prohibited to supply any voltage to ADC pins when VBAT is removed. It is recommended to use a resistor divider circuit for ADC application. 3.14. Network Status Indication The network indication pins can be used to drive network status indication LEDs. The module provides two pins which are NET_MODE and NET_STATUS. The following tables describe the pin definition and logic level changes in different network status. EC21_Hardware_Design 3-51 / 105 LTE Module Series EC21 Hardware Design Table 18: Pin Definition of Network Connection Status/Activity Indicator Pin Name Pin No. I/O Description NET_MODE1) 5 NET_STATUS 6 DO DO Indicate the modules network registration status Indicate the modules network activity status Comment 1.8V power domain Cannot be pulled up before startup 1.8V power domain Table 19: Working State of Network Connection Status/Activity Indicator Pin Name Logic Level Changes Network Status NET_MODE Always High Always Low Registered on LTE network Others NET_STATUS Flicker slowly (200ms High/1800ms Low) Network searching Flicker slowly (1800ms High/200ms Low) Idle Flicker quickly (125ms High/125ms Low) Data transfer is ongoing Always High Voice calling A reference circuit is shown in the following figure. Figure 26: Reference Circuit of the Network Indicator EC21_Hardware_Design 3-52 / 105 LTE Module Series EC21 Hardware Design 3.15. STATUS The STATUS pin is an open drain output for indicating the modules operation status. Customers can connect it to a GPIO of DTE with a pull up resistor, or as the LED indication circuit shown below. When the module is turned on normally, the STATUS will present the low state. Otherwise, the STATUS will present high-impedance state. Table 20: Pin Definition of STATUS Pin Name Pin No. I/O Description STATUS 61 OD Indicate the modules operation status Comment An external pull-up resistor is required. If unused, keep it open. The following figure shows different circuit designs of STATUS, and customers can choose either one according to their application demands. Figure 27: Reference Circuits of STATUS 3.16. Behaviors of RI AT+QCFG="risignaltype","physical" command can be used to configure RI behavior. No matter on which port URC is presented, URC will trigger the behavior of RI pin. EC21_Hardware_Design 3-53 / 105 LTE Module Series EC21 Hardware Design NOTE URC can be outputted from UART port, USB AT port and USB modem port through configuration via AT+QURCCFG command. The default port is USB AT port. In addition, RI behavior can be configured flexibly. The default behavior of the RI is shown as below. Table 21: Behavior of RI State Idle URC Response RI keeps at high level RI outputs 120ms low pulse when a new URC returns The RI behavior can be changed by AT+QCFG="urc/ri/ring" command. Please refer to document [2] for details. 3.17. SGMII Interface EC21 includes an integrated Ethernet MAC with an SGMII interface and two management interfaces, key features of the SGMII interface are shown below:
IEEE802.3 compliance Support 10M/100M/1000M Ethernet work mode Support VLAN tagging Support IEEE1588 and Precision Time Protocol (PTP) Can be used to connect to external Ethernet PHY like AR8033, or to an external switch Management interfaces support dual voltage 1.8V/2.85V The following table shows the pin definition of SGMII interface. Table 22: Pin Definition of the SGMII Interface Pin Name Pin No. I/O Description Comment Control Signal Part EPHY_RST_N 119 EPHY_INT_N 120 DO DI Ethernet PHY reset 1.8V/2.85V power domain Ethernet PHY interrupt 1.8V power domain EC21_Hardware_Design 3-54 / 105 LTE Module Series EC21 Hardware Design SGMII_MDATA 121 IO SGMII_MCLK 122 DO SGMII MDIO (Management Data Input/Output) data SGMII MDIO (Management Data Input/Output) clock 1.8V/2.85V power domain 1.8V/2.85V power domain USIM2_VDD 128 PO SGMII MDIO pull-up power source SGMII Signal Part SGMII_TX_M 123 SGMII_TX_P 124 SGMII_RX_P 125 SGMII_RX_M 126 AO AO AI AI SGMII transmission-minus SGMII transmission-plus SGMII receiving-plus SGMII receiving-minus Configurable power source. 1.8V/2.85V power domain. External pull-up power source for SGMII MDIO pins. Connect with a 0.1uF capacitor, close to the PHY side. Connect with a 0.1uF capacitor, close to the PHY side. Connect with a 0.1uF capacitor, close to EC21 module. Connect with a 0.1uF capacitor, close to EC21 module. The following figure shows the simplified block diagram for Ethernet application. Figure 28: Simplified Block Diagram for Ethernet Application EC21_Hardware_Design 3-55 / 105 The following figure shows a reference design of SGMII interface with PHY AR8033 application. LTE Module Series EC21 Hardware Design Figure 29: Reference Circuit of SGMII Interface with PHY AR8033 Application In order to enhance the reliability and availability in customers applications, please follow the criteria below in the Ethernet PHY circuit design:
Keep SGMII data and control signals away from other sensitive circuits/signals such as RF circuits, analog signals, etc., as well as noisy signals such as clock signals, DCDC signals, etc. Keep the maximum trace length less than 10-inch and keep skew on the differential pairs less than 20mil. The differential impedance of SGMII data trace is 10010%, and the reference ground of the area should be complete. Make sure the trace spacing between SGMII RX and TX is at least 3 times of the trace width, and the same to the adjacent signal traces. Table 24: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description USB_BOOT 115 DI Force the module enter into emergency download mode The following figure shows a reference circuit of USB_BOOT interface. Comment 1.8V power domain. Active high. It is recommended to reserve test point. EC21_Hardware_Design 3-56 / 105 LTE Module Series EC21 Hardware Design Figure 31: Reference Circuit of USB_BOOT Interface EC21_Hardware_Design 3-57 / 105 LTE Module Series EC21 Hardware Design 4 GNSS Receiver 4.1. General Description EC21 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). EC21 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface by default. By default, EC21 GNSS engine is switched off. It has to be switched on via AT command. For more details about GNSS engine technology and configurations, please refer to document [3]. 4.2. GNSS Performance The following table shows the GNSS performance of EC21. Table 25: GNSS Performance Parameter Description Sensitivity
(GNSS) TTFF
(GNSS) Cold start Reacquisition Tracking Cold start
@open sky Warm start
@open sky Conditions Autonomous Autonomous Autonomous Autonomous XTRA enabled Autonomous XTRA enabled Typ.
-146
-157
-157 35 18 26 2.2 Unit dBm dBm dBm s s s s EC21_Hardware_Design 4-58 / 105 LTE Module Series EC21 Hardware Design Hot start
@open sky CEP-50 Autonomous XTRA enabled Autonomous
@open sky 2.5 1.8
<1.5 s s m Accuracy
(GNSS) NOTES 1. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. 2. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock. 3. Cold start sensitivity: the lowest GNSS signal value at the antenna port on which the module fixes position within 3 minutes after executing cold start command. 4.3. Layout Guidelines The following layout guidelines should be taken into account in customers designs. Maximize the distance among GNSS antenna, main antenna and the Rx-diversity antenna. Digital circuits such as (U)SIM card, USB interface, camera module and display connector should be kept away from the antennas. Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar isolation and protection. Keep 50 characteristic impedance for the ANT_GNSS trace. Please refer to Chapter 5 for GNSS antenna reference design and antenna installation consideration. EC21_Hardware_Design 4-59 / 105 LTE Module Series EC21 Hardware Design 5 Antenna Interfaces EC21 antenna interfaces include a main antenna interface, an Rx-diversity antenna interface which is used to resist the fall of signals caused by high speed movement and multipath effect, and a GNSS antenna interface. The impedance of the antenna port is 50. 5.1. Main/Rx-diversity Antenna Interfaces 5.1.1. Pin Definition The pin definition of main antenna and Rx-diversity antenna interfaces is shown below. Table 26: Pin Definition of RF Antennas Pin Name Pin No. ANT_MAIN ANT_DIV 49 35 I/O IO AI Description Comment Main antenna pad 50 impedance Receive diversity antenna pad 50 impedance 5.1.2. Operating Frequency Table 27: Module Operating Frequencies 3GPP Band GSM850 EGSM900 DCS1800 PCS1900 WCDMA B1 WCDMA B2 Transmit 824~849 880~915 1710~1785 1850~1910 1920~1980 1850~1910 Receive 869~894 925~960 1805~1880 1930~1990 2110~2170 1930~1990 Unit MHz MHz MHz MHz MHz MHz EC21_Hardware_Design 5-60 / 105 LTE Module Series EC21 Hardware Design WCDMA B4 WCDMA B5 WCDMA B8 LTE FDD B1 LTE FDD B2 LTE FDD B3 LTE FDD B4 LTE FDD B5 LTE FDD B7 LTE FDD B8 LTE FDD B12 LTE FDD B13 LTE FDD B18 LTE FDD B19 LTE FDD B20 LTE FDD B26 LTE FDD B28 LTE TDD B40 1710~1755 824~849 880~915 1920~1980 1850~1910 1710~1785 1710~1755 824~849 2500~2570 880~915 699~716 777~787 815~830 830~845 832~862 814~849 703~748 2110~2155 869~894 925~960 2110~2170 1930~1990 1805~1880 2110~2155 869~894 2620~2690 925~960 729~746 746~756 860~875 875~890 791~821 859~894 758~803 2300~2400 2300~2400 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz 5.1.3. Reference Design of RF Antenna Interface A reference design of ANT_MAIN and ANT_DIV antenna pads is shown as below. A -type matching circuit should be reserved for better RF performance. The capacitors are not mounted by default. EC21_Hardware_Design 5-61 / 105 LTE Module Series EC21 Hardware Design Figure 32: Reference Circuit of RF Antenna Interface NOTES 1. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve the receiving sensitivity. 2. ANT_DIV function is enabled by default. 3. Place the -type matching components (R1, C1, C2, R2, C3, C4) as close to the antenna as possible. 5.1.4. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled as 50. The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the distance between signal layer and reference ground (H), and the clearance between RF trace and ground (S). Microstrip line or coplanar waveguide line is typically used in RF layout for characteristic impedance control. The following are reference designs of microstrip line or coplanar waveguide line with different PCB structures
. Figure 33: Microstrip Line Design on a 2-layer PCB EC21_Hardware_Design 5-62 / 105 LTE Module Series EC21 Hardware Design Figure 34: Coplanar Waveguide Line Design on a 2-layer PCB Figure 35: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 36: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:
EC21_Hardware_Design 5-63 / 105 LTE Module Series EC21 Hardware Design Use impedance simulation tool to control the characteristic impedance of RF traces as 50. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right angle traces should be changed to curved ones. There should be clearance area under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2*W). For more details about RF layout, please refer to document [6]. 5.2. GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNSS antenna interface. Table 28: Pin Definition of GNSS Antenna Interface Pin Name Pin No. ANT_GNSS 47 I/O AI Description Comment GNSS antenna 50 impedance Table 29: GNSS Frequency Type Frequency GPS/Galileo/QZSS 1575.421.023 GLONASS BeiDou 1597.5~1605.8 1561.0982.046 Unit MHz MHz MHz EC21_Hardware_Design 5-64 / 105 A reference design of GNSS antenna is shown as below. LTE Module Series EC21 Hardware Design Figure 37: Reference Circuit of GNSS Antenna NOTES 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1. Antenna Requirement The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna. Table 30: Antenna Requirements Type GNSS1) GSM/WCDMA/LTE Requirements Frequency range: 1561MHz~1615MHz Polarization: RHCP or linear VSWR: <2 (Typ.) Passive antenna gain: > 0dBi Active antenna noise figure: <1.5dB Active antenna gain: > 0dBi Active antenna embedded LNA gain: <17 dB VSWR: 2 Efficiency: > 30%
EC21_Hardware_Design 5-65 / 105 LTE Module Series EC21 Hardware Design Max Input Power: 50 W Input Impedance: 50 Cable insertion loss: <1dB
(GSM850, GSM900, WCDMA B5/B8, LTE-FDD B5/B8/B12/B13/B18/B19/B20/B26/B28) Cable insertion loss: <1.5dB
(DCS1800, PCS1900, WCDMA B1/B2/B4, LTE B1/B2/B3/B4) Cable insertion loss <2dB
(LTE-FDD B7, LTE-TDD B40) NOTE is recommended to use a passive antenna when the module supports B13 or B14, because 1) It harmonics will be generated when using an active antenna, which will affect the GNSS performance 5.3.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connector provided by Hirose. Figure 38: Dimensions of the U.FL-R-SMT Connector (Unit: mm) EC21_Hardware_Design 5-66 / 105 U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. LTE Module Series EC21 Hardware Design Figure 39: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 40: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com. EC21_Hardware_Design 5-67 / 105 LTE Module Series EC21 Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 31: Absolute Maximum Ratings Parameter VBAT_RF/VBAT_BB USB_VBUS Peak Current of VBAT_BB Peak Current of VBAT_RF Voltage at Digital Pins Voltage at ADC0 Voltage at ADC1 Min.
-0.3
-0.3 0 0
-0.3 0 0 Max. Unit 4.7 5.5 0.8 1.8 2.3 VBAT_BB VBAT_BB V V A A V V V EC21_Hardware_Design 6-68 / 105 LTE Module Series EC21 Hardware Design 6.2. Power Supply Ratings Table 32: Power Supply Ratings Parameter Description VBAT IVBAT VBAT_BB and VBAT_RF Voltage drop during burst transmission Peak supply current
(during transmission slot) USB_VBUS USB detection Conditions The actual input voltages must stay between the minimum and maximum values. Maximum power control level on GSM900 Maximum power control level on GSM900 Min. Typ. Max. Unit 3.3 3.8 4.3 V 400 mV 1.8 5.0 2.0 5.25 A V 3.0 6.3. Operation and Storage Temperatures The operation and storage temperatures are listed in the following table. Table 33: Operation and Storage Temperatures Parameter Operation Temperature Range1) Extended Temperature Range2) Storage Temperature Range Min.
-35
-40
-40 Typ.
+25 Max.
+75
+85
+90 Unit C C C NOTES 1. 2. 1) Within operation temperature range, the module is 3GPP compliant. 2) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to the normal operating temperature levels, the module will meet 3GPP specifications again. EC21_Hardware_Design 6-69 / 105 LTE Module Series EC21 Hardware Design Typ. Unit 6.4. Current Consumption The values of current consumption are shown below. Table 34: EC21-E Current Consumption Parameter Description OFF state Conditions Power down AT+CFUN=0 (USB disconnected) GSM900 @DRX=9 (USB disconnected) DCS1800 @DRX=9 (USB disconnected) Sleep state WCDMA PF=64 (USB disconnected) IVBAT Idle state
(GNSS OFF) WCDMA PF=128 (USB disconnected) FDD-LTE PF=64 (USB disconnected) FDD-LTE PF=128 (USB disconnected) GSM900 @DRX=5 (USB disconnected) GSM900 @DRX=5 (USB connected) WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB connected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) GSM900 4DL/1UL @32.3dBm GSM900 3DL/2UL @32.18dBm GPRS data transfer
(GNSS OFF) GSM900 2DL/3UL @30.3dBm GSM900 1DL/4UL @29.4dBm DCS1800 4DL/1UL @29.6dBm DCS1800 3DL/2UL @29.1dBm 13 1.4 1.8 1.8 2.4 1.9 3.2 2.1 22.0 32.0 22.5 32.7 22.5 32.5 220 387 467 555 185 305 uA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA EC21_Hardware_Design 6-70 / 105 EDGE data transfer
(GNSS OFF) DCS1800 2DL/3UL @28.8dBm DCS1800 1DL/4UL @29.1dBm GSM900 4DL/1UL @26dBm GSM900 3DL/2UL @26dBm GSM900 2DL/3UL @25dBm GSM900 1DL/4UL @25dBm DCS1800 4DL/1UL @26dBm DCS1800 3DL/2UL @25dBm DCS1800 2DL/3UL @25dBm DCS1800 1DL/4UL @25dBm WCDMA B1 HSDPA @22.5dBm WCDMA B1 HSUPA @21.11dBm WCDMA data transfer
(GNSS OFF) WCDMA B5 HSDPA @23.5dBm WCDMA B5 HSUPA @21.4dBm WCDMA B8 HSDPA @22.41dBm WCDMA B8 HSUPA @21.2dBm LTE-FDD B1 @23.45dBm LTE-FDD B3 @23.4dBm LTE-FDD B5 @23.4dBm LTE-FDD B7 @23.86dBm LTE-FDD B8 @23.5dBm LTE-FDD B20 @23.57dBm GSM900 PCL=5 @32.8dBm PCS1800 PCL=0 @29.3dBm LTE data transfer
(GNSS OFF) GSM voice call WCDMA voice call WCDMA B1 @23.69dBm LTE Module Series EC21 Hardware Design 431 540 148 245 338 432 150 243 337 430 659 545 767 537 543 445 807 825 786 887 675 770 336 291 683 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA EC21_Hardware_Design 6-71 / 105 LTE Module Series EC21 Hardware Design WCDMA B5 @23.61dBm WCDMA B8 @23.35dBm Table 35: EC21-A Current Consumption Parameter Description OFF state Conditions Power down AT+CFUN=0 (USB disconnected) WCDMA PF=64 (USB disconnected) Sleep state WCDMA PF=128 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=128 (USB disconnected) WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB connected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) WCDMA B2 HSDPA @21.54dBm WCDMA B2 HSUPA @22.19dBm WCDMA B4 HSDPA @22.15dBm WCDMA B4 HSUPA @21.82dBm WCDMA B5 HSDPA @22.22dBm WCDMA B5 HSUPA @21.45dBm LTE-FDD B2 @23.11dBm LTE-FDD B4 @23.16dBm LTE-FDD B12 @23.25dBm Idle state
(GNSS OFF) IVBAT WCDMA data transfer
(GNSS OFF) LTE data transfer
(GNSS OFF) WCDMA voice call WCDMA B2 @22.97dBm 741 564 Typ. 10 1.25 2.03 1.65 2.31 1.85 23.1 32.8 22.8 32.8 479.0 530.0 539.0 531.0 454.0 433.0 721.0 748.0 668.0 565.0 mA mA Unit uA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA EC21_Hardware_Design 6-72 / 105 LTE Module Series EC21 Hardware Design WCDMA B4 @22.91dBm WCDMA B5 @23.06dBm 590.0 493.0 mA mA Table 36: EC21-V Current Consumption Parameter Description OFF state Conditions Power down AT+CFUN=0 (USB disconnected) Sleep state LTE-FDD PF=64 (USB disconnected) IVBAT Idle state
(GNSS OFF) LTE-FDD PF=128 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) LTE data transfer
(GNSS OFF) LTE-FDD B4 @22.77dBm LTE-FDD B13 @23.05dBm Table 37: EC21-AUT Current Consumption Parameter Description Conditions OFF state Power down AT+CFUN=0 (USB disconnected) WCDMA PF=64 (USB disconnected) Sleep state WCDMA PF=128 (USB disconnected) IVBAT Idle state LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=128 (USB disconnected) WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB connected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) Typ. 10 1.07 2.85 2.26 22.0 32.0 762.0 533.0 Typ. 10 0.99 2.1 1.7 2.9 2.4 22.0 32.0 23.6 33.6 Unit uA mA mA mA mA mA mA mA Unit uA mA mA mA mA mA mA mA mA mA EC21_Hardware_Design 6-73 / 105 WCDMA data
(GNSS OFF) LTE data transfer
(GNSS OFF) WCDMA B1 HSDPA @22.59dBm WCDMA B1 HSUPA @22.29dBm WCDMA B5 HSDPA @22.22dBm WCDMA B5 HSUPA @21.64dBm LTE-FDD B1 @23.38dBm LTE-FDD B3 @22.87dBm LTE-FDD B5 @23.12dBm LTE-FDD B7 @22.96dBm LTE-FDD B28 @23.31dBm WCDMA voice call WCDMA B1 @24.21dBm WCDMA B5 @23.18dBm Table 38: EC21-AUV Current Consumption Parameter Description OFF state Conditions Power down AT+CFUN=0 (USB disconnected) WCDMA PF=64 (USB disconnected) Sleep state WCDMA PF=128 (USB disconnected) IVBAT Idle state
(GNSS OFF) WCDMA data transfer (GNSS OFF) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=128 (USB disconnected) WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB connected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) WCDMA B1 HSDPA @22.59dBm WCDMA B1 HSUPA @22.47dBm WCDMA B5 HSDPA @22.95dBm LTE Module Series EC21 Hardware Design 589.0 623.0 511.0 503.0 813.0 840.0 613.0 761.0 650.0 687.0 535.0 Typ. 10 1.15 2.06 1.65 2.46 1.86 22.0 32.0 23.5 33.5 623.0 628.0 605.0 mA mA mA mA mA mA mA mA mA mA mA Unit uA mA mA mA mA mA mA mA mA mA mA mA mA EC21_Hardware_Design 6-74 / 105 WCDMA B5 HSUPA @22.87dBm WCDMA B8 HSDPA @22.37dBm WCDMA B8 HSUPA @22.09dBm LTE-FDD B1 @23.28dBm LTE-FDD B3 @23.2dBm LTE-FDD B5 @23.05dBm LTE-FDD B8 @23.21dBm LTE-FDD B28 @22.9dBm WCDMA B1 @23.43dBm LTE data transfer
(GNSS OFF) WCDMA voice call WCDMA B5 @23.32dBm WCDMA B8 @23.31dBm Table 39: EC21-J Current Consumption Parameter Description OFF state Conditions Power down AT+CFUN=0 (USB disconnected) Sleep state LTE-FDD PF=64 (USB disconnected) Idle state
(GNSS OFF) IVBAT LTE data transfer
(GNSS OFF) LTE-FDD PF=128 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) LTE-FDD B1 @23.35dBm LTE-FDD B3 @22.95dBm LTE-FDD B8 @22.81dBm LTE-FDD B18 @23.15dBm LTE-FDD B19 @23.17dBm LTE-FDD B26 @23.37dBm LTE Module Series EC21 Hardware Design 610.0 549.0 564.0 789.0 768.0 669.0 693.0 795.0 672.0 616.0 592.0 Typ. 10 0.85 2.20 1.46 23.5 33.8 734.0 778.0 722.0 677.0 688.0 723.0 mA mA mA mA mA mA mA mA mA mA mA Unit uA mA mA mA mA mA mA mA mA mA mA mA EC21_Hardware_Design 6-75 / 105 Table 40: EC21-KL Current Consumption Parameter Description OFF state Conditions Power down AT+CFUN=0 (USB disconnected) Sleep state LTE-FDD PF=64 (USB disconnected) Idle state
(GNSS OFF) IVBAT LTE-FDD PF=128 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) LTE data transfer
(GNSS OFF) LTE-FDD B1 @23.0dBm LTE-FDD B3 @23.36dBm LTE-FDD B5 @23.56dBm LTE-FDD B7 @23.32dBm LTE-FDD B8 @23.33dBm LTE Module Series EC21 Hardware Design Typ. 10 1.08 2.1 1.4 24.8 33.5 771.0 780.0 628.0 754.0 680.0 Unit uA mA mA mA mA mA mA mA mA mA mA Table 41: GNSS Current Consumption of EC21 Series Module Parameter Description Conditions Typ. Unit IVBAT
(GNSS) Searching
(AT+CFUN=0) Tracking
(AT+CFUN=0) Cold start @Passive Antenna Lost state @Passive Antenna Instrument Environment Open Sky @Passive Antenna Open Sky @Active Antenna 58 58 33 35 43 mA mA mA mA mA 6.5. RF Output Power The following table shows the RF output power of EC21 module. EC21_Hardware_Design 6-76 / 105 Table 42: RF Output Power Frequency GSM850/GSM900 DCS1800/PCS1900 Max. 33dBm2dB 30dBm2dB GSM850/GSM900 (8-PSK) 27dBm3dB DCS1800/PCS1900 (8-PSK) 26dBm3dB WCDMA bands LTE-FDD bands LTE-TDD bands NOTE 24dBm+1/-3dB 23dBm2dB 23dBm2dB LTE Module Series EC21 Hardware Design Min. 5dBm5dB 0dBm5dB 5dBm5dB 0dBm5dB
<-49dBm
<-39dBm
<-39dBm In GPRS 4 slots TX mode, the maximum output power is reduced by 3.0dB. The design conforms to the GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1. 6.6. RF Receiving Sensitivity The following tables show the conducted RF receiving sensitivity of EC21 series module. Table 43: EC21-E Conducted RF Receiving Sensitivity Diversity SIMO1) 3GPP (SIMO) Frequency GSM900 DCS1800 Primary
-109.0dBm
-109.0dBm WCDMA Band 1
-110.5dBm WCDMA Band 5
-110.5dBm WCDMA Band 8
-110.5dBm
/
/
/
/
/
/
/
/
/
/
LTE-FDD B1 (10M)
-98.0dBm LTE-FDD B3 (10M)
-96.5dBm
-98.0dBm
-98.5dBm
-101.5dBm
-101.5dBm
-102.0dBm
-102.0dbm
-106.7dBm
-104.7dBm
-103.7dBm
-96.3dBm
-93.3dBm EC21_Hardware_Design 6-77 / 105 LTE Module Series EC21 Hardware Design LTE-FDD B5 (10M)
-98.0dBm LTE-FDD B7 (10M)
-97.0dBm LTE-FDD B8 (10M)
-97.0dBm LTE-FDD B20 (10M)
-97.5dBm
-98.5dBm
-94.5dBm
-97.0dBm
-99.0dBm
-101.0dBm
-99.5dBm
-101.0dBm
-102.5dBm
-94.3dBm
-94.3dBm
-93.3dBm
-93.3dBm Table 44: EC21-A Conducted RF Receiving Sensitivity Frequency WCDMA B2 WCDMA B4 WCDMA B5 Primary
-110.0dBm
-110.0dBm
-110.5dBm LTE-FDD B2 (10M)
-98.0dBm LTE-FDD B4 (10M)
-97.5dBm LTE-FDD B12 (10M)
-96.5dBm Diversity SIMO1) 3GPP (SIMO)
/
/
/
-98.0dBm
-99.0dBm
-98.0dBm
/
/
/
-101.0dBm
-101.0dBm
-101.0dBm
-104.7dBm
-106.7dBm
-104.7dBm
-94.3dBm
-96.3dBm
-93.3dBm Table 45: EC21-V Conducted RF Receiving Sensitivity Frequency Primary LTE-FDD B4 (10M)
-97.5dBm LTE-FDD B13 (10M)
-95.0dBm Diversity
-99.0dBm
-97.0dBm SIMO1)
-101.0dBm
-100.0dBm 3GPP (SIMO)
-96.3dBm
-93.3dBm Table 46: EC21-AUT Conducted RF Receiving Sensitivity Frequency WCDMA B1 WCDMA B5 Primary
-110.0dBm
-110.5dBm
/
/
/
/
Diversity SIMO1) 3GPP (SIMO) LTE-FDD B1 (10M)
-98.5dBm LTE-FDD B3 (10M)
-98.0dBm
-98.0dBm
-96.0dBm
-101.0dBm
-100.0dBm
-106.7dBm
-104.7dBm
-96.3dBm
-93.3dBm EC21_Hardware_Design 6-78 / 105 LTE Module Series EC21 Hardware Design LTE-FDD B5 (10M)
-98.0dBm LTE-FDD B7 (10M)
-97.0dBm LTE-FDD B28 (10M)
-97.0dBm
-99.0dBm
-95.0dBm
-99.0dBm
-102.5dBm
-98.5dBm
-102.0dBm
-94.3dBm
-94.3dBm
-94.8dBm Table 47: EC21-KL Conducted RF Receiving Sensitivity Frequency Primary LTE-FDD B1 (10M)
-98.0dBm LTE-FDD B3 (10M)
-97.0dBm LTE-FDD B5 (10M)
-98.0dBm LTE-FDD B7 (10M)
-96.0dBm LTE-FDD B8 (10M)
-97.0dBm Diversity
-99.5dBm
-97.5dBm
-99.5dBm
-96.0dBm
-99.0dBm SIMO1)
-100.5dBm
-99.5dBm
-100.5dBm
-98.5dBm
-101.0dBm 3GPP (SIMO)
-96.3dBm
-93.3dBm
-94.3dBm
-94.3dBm
-93.3dBm Table 48: EC21-J Conducted RF Receiving Sensitivity Frequency Primary LTE-FDD B1 (10M)
-97.5dBm LTE-FDD B3 (10M)
-96.5dBm LTE-FDD B8 (10M)
-98.4dBm LTE-FDD B18 (10M)
-99.5dBm LTE-FDD B19 (10M)
-99.2dBm LTE-FDD B26 (10M)
-99.5dBm Diversity
-98.7dBm
-97.1dBm
-99.0dBm
-99.0dBm
-99.0dBm
-99.0dBm SIMO1)
-100.2dBm
-100.5dBm
-101.2dBm
-101.7dBm
-101.4dBm
-101.5dBm 3GPP (SIMO)
-96.3dBm
-93.3dBm
-93.3dBm
-96.3dBm
-96.3dBm
-93.8dBm Table 49: EC21-AUV Conducted RF Receiving Sensitivity Frequency WCDMA B1 WCDMA B5 Primary
-109.5dBm
-111.0dBm Diversity SIMO1) 3GPP (SIMO)
/
/
/
/
-106.7dBm
-104.7dBm EC21_Hardware_Design 6-79 / 105 LTE Module Series EC21 Hardware Design WCDMA B8
-111.0dBm
/
/
-103.7dBm LTE-FDD B1 (10M)
-97.7dBm LTE-FDD B3 (10M)
-98.2dBm LTE-FDD B5 (10M)
-98.7dBm LTE-FDD B8 (10M)
-98.2dBm LTE-FDD B28 (10M)
-98.0dBm
-97.5dBm
-98.6dBm
-98.2dBm
-98.2dBm
-98.7dBm
-101.3dBm
-102.7dBm
-102.5dBm
-102.3dBm
-102.1dBm
-96.3dBm
-93.3dBm
-94.3dBm
-93.3dBm
-94.8dBm Table 50: EC21-AU Conducted RF Receiving Sensitivity Diversity SIMO1) 3GPP (SIMO) Frequency GSM850 GSM900 DCS1800 PCS1900 WCDMA B1 WCDMA B2 WCDMA B5 WCDMA B8 Primary
-109.0dBm
-109.0dBm
-109.0dBm
-109.0dBm
-110.0dBm
-110.0dBm
-111.0dBm
-111.0dBm
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
LTE-FDD B1 (10M)
-97.2dBm
-97.5dBm
-100.2dBm LTE-FDD B2 (10M)
-98.2dBm
/
/
LTE-FDD B3 (10M)
-98.7dBm LTE-FDD B4 (10M)
-97.7dBm LTE-FDD B5 (10M)
-98.0dBm LTE-FDD B7 (10M)
-97.7dBm LTE-FDD B8 (10M)
-99.2dBm LTE-FDD B28 (10M)
-98.6dBm
-98.6dBm
-97.4dBm
-98.2dBm
-97.7dBm
-98.2dBm
-98.7dBm
-102.2dBm
-100.2dBm
-101.0dBm
-101.2dBm
-102.2dBm
-102.0dBm
-102.0dBm
-102.0dBm
-102.0dBm
-102.0dBm
-106.7dBm
-104.7dBm
-104.7dBm
-103.7dBm
-96.3dBm
-94.3dBm
-93.3dBm
-96.3dBm
-94.3dBm
-94.3dBm
-93.3dBm
-94.8dBm EC21_Hardware_Design 6-80 / 105 LTE Module Series EC21 Hardware Design LTE-TDD B40 (10M)
-97.2dBm
-98.4dBm
-101.2dBm
-96.3dBm NOTE 1) SIMO is a smart antenna technology that uses a single antenna at the transmitter side and two antennas at the receiver side, which can improve RX performance. 6.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the modules electrostatic discharge characteristics. Table 51: Electrostatic Discharge Characteristics Tested Points VBAT, GND All Antenna Interfaces Other Interfaces Contact Discharge Air Discharge 5 4 0.5 10 8 1 Unit kV kV kV 6.8. Thermal Consideration In order to achieve better performance of the module, it is recommended to comply with the following principles for thermal consideration:
On customers PCB design, please keep placement of the module away from heating sources, especially high power components such as ARM processor, audio power amplifier, power supply, etc. Do not place components on the opposite side of the PCB area where the module is mounted, in order to facilitate adding of heatsink when necessary. Do not apply solder mask on the opposite side of the PCB area where the module is mounted, so as to ensure better heat dissipation performance. The reference ground of the area where the module is mounted should be complete, and add ground vias as many as possible for better heat dissipation. EC21_Hardware_Design 6-81 / 105 LTE Module Series EC21 Hardware Design Make sure the ground pads of the module and PCB are fully connected. According to customers application demands, the heatsink can be mounted on the top of the module, or the opposite side of the PCB area where the module is mounted, or both of them. The heatsink should be designed with as many fins as possible to increase heat dissipation area. Meanwhile, a thermal pad with high thermal conductivity should be used between the heatsink and module/PCB. The following shows two kinds of heatsink designs for reference and customers can choose one or both of them according to their application structure. Figure 41: Referenced Heatsink Design (Heatsink at the Top of the Module) Figure 42: Referenced Heatsink Design (Heatsink at the Bottom of Customers PCB) EC21_Hardware_Design 6-82 / 105 LTE Module Series EC21 Hardware Design NOTE The module offers the best performance when the internal BB chip stays below 105C. When the maximum temperature of the BB chip reaches or exceeds 105C, the module works normal but provides reduced performance (such as RF output power, data rate, etc.). When the maximum BB chip temperature reaches or exceeds 115C, the module will disconnect from the network, and it will recover to network connected state after the maximum temperature falls below 115C. Therefore, the thermal design should be maximally optimized to make sure the maximum BB chip temperature always maintains below 105C. Customers can execute AT+QTEMP command and get the maximum BB chip temperature from the first returned value. EC21_Hardware_Design 6-83 / 105 LTE Module Series EC21 Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. The tolerances for dimensions without tolerance values are 0.05mm. 7.1. Mechanical Dimensions of the Module 32.00.15 2.40.2 5 1
. 0 0
. 9 2 Figure 43: Module Top and Side Dimensions 0.8 EC21_Hardware_Design 7-84 / 105 LTE Module Series EC21 Hardware Design Figure 44: Module Bottom Dimensions (Bottom View) EC21_Hardware_Design 7-85 / 105 7.2. Recommended Footprint LTE Module Series EC21 Hardware Design Figure 45: Recommended Footprint (Top View) NOTES 1. The keep out area should not be designed. 2. For easy maintenance of the module, please keep about 3mm between the module and other components in the host PCB. EC21_Hardware_Design 7-86 / 105 7.3. Design Effect Drawings of the Module LTE Module Series EC21 Hardware Design Figure 46: Top View of the Module Figure 47: Bottom View of the Module NOTE These are design effect drawings of EC21 module. For more accurate pictures, please refer to the module that you get from Quectel. EC21_Hardware_Design 7-87 / 105 LTE Module Series EC21 Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage EC21 is stored in a vacuum-sealed bag. The storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40C/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:
Mounted within 168 hours at the factory environment of 30C/60%RH Stored at <10%RH 3. Devices require baking before mounting, if any circumstances below occurs:
When the ambient temperature is 23C5C and the humidity indicator card shows the humidity is >10% before opening the vacuum-sealed bag. Device mounting cannot be finished within 168 hours at factory conditions of 30C/60%RH. 4. If baking is required, devices may be baked for 8 hours at 120C5C. NOTE As the plastic package cannot be subjected to high temperature, it should be removed from devices before high temperature (120C) baking. to IPC/JEDECJ-STD-033 for baking procedure. If shorter baking time is desired, please refer EC21_Hardware_Design 8-88 / 105 LTE Module Series EC21 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.20mm. For more details, please refer to document [4]. It is suggested that the peak reflow temperature is 235C~245C (for SnAg3.0Cu0.5 alloy). The absolute maximum reflow temperature is 260C. To avoid damage to the module caused by repeated heating, it is suggested that the module should be mounted after reflow soldering for the other side of PCB has been completed. Recommended reflow soldering thermal profile is shown below:
Figure 48: Reflow Soldering Thermal Profile NOTE During manufacturing and soldering, or any other processes that may contact the module directly, NEVER wipe the module label with organic solvents, such as acetone, ethyl alcohol, isopropyl alcohol, trichloroethylene, etc. EC21_Hardware_Design 8-89 / 105 LTE Module Series EC21 Hardware Design 8.3. Packaging EC21 is packaged in tape and reel carriers. One reel is 11.88m long and contains 250pcs modules. The figure below shows the packaging details, measured in mm. 1 0 5 7
. 1 5 1
. 0 0 2
. 0 2
. 3 0 0 0
. 4 4 44.00 0.1 2.00 0.1 4.00 0.1 1.50 0.1 0.35 0.05 5 1
. 0 3
. 9 2 5 1
. 0 3
. 0 3 5 1
. 0 3
. 0 3 32.5 0.15 33.5 0.15 4.2 0.15 3.1 0.15 32.5 0.15 33.5 0.15 Cover tape Direction of feed 48.5 0 0 1 13 44.5+0.20
-0.00 Figure 49: Tape and Reel Specifications EC21_Hardware_Design 8-90 / 105 LTE Module Series EC21 Hardware Design 9 Appendix A References Table 52: Related Documents SN Document Name Quectel_EC2x&EG9x&EM05_Power_Management_ Application_Note Remark Power management application notefor EC25, EC21, EC20 R2.0, EC20 R2.1, EG95, EG91 and EM05 modules Quectel_EC25&EC21_AT_Commands_Manual EC25 and EC21 AT commands manual Quectel_EC25&EC21_GNSS_AT_Commands_Manual EC25 and EC21 GNSS AT commands manual Quectel_Module_Secondary_SMT_User_Guide Module secondary SMT user guide Quectel_EC21_Reference_Design EC21 reference design Quectel_RF_Layout_Application_Note RF layout application note
[1]
[2]
[3]
[4]
[5]
[6]
Table 53: Terms and Abbreviations Abbreviation Description AMR bps CHAP CS CSD CTS Adaptive Multi-rate Bits Per Second Challenge Handshake Authentication Protocol Coding Scheme Circuit Switched Data Clear To Send DC-HSPA+
Dual-carrier High Speed Packet Access DFOTA DL Delta Firmware Upgrade Over The Air Downlink EC21_Hardware_Design 9-91 / 105 LTE Module Series EC21 Hardware Design DTR DTX EFR ESD FDD FR Data Terminal Ready Discontinuous Transmission Enhanced Full Rate Electrostatic Discharge Frequency Division Duplex Full Rate GLONASS GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System GMSK GNSS GPS GSM HR HSPA HSDPA HSUPA I/O Inorm LED LNA LTE MIMO MO MS MT PAP Gaussian Minimum Shift Keying Global Navigation Satellite System Global Positioning System Global System for Mobile Communications Half Rate High Speed Packet Access High Speed Downlink Packet Access High Speed Uplink Packet Access Input/Output Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution Multiple Input Multiple Output Mobile Originated Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol EC21_Hardware_Design 9-92 / 105 LTE Module Series EC21 Hardware Design PCB PDU PPP QAM QPSK RF RHCP Rx SGMII SIM SIMO SMS TDD TDMA Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Quadrature Amplitude Modulation Quadrature Phase Shift Keying Radio Frequency Right Hand Circularly Polarized Receive Serial Gigabit Media Independent Interface Subscriber Identification Module Single Input Multiple Output Short Message Service Time Division Duplexing Time Division Multiple Access TD-SCDMA Time Division-Synchronous Code Division Multiple Access TX UL UMTS URC USIM Vmax Vnorm Vmin VIHmax VIHmin Transmitting Direction Uplink Universal Mobile Telecommunications System Unsolicited Result Code Universal Subscriber Identity Module Maximum Voltage Value Normal Voltage Value Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value EC21_Hardware_Design 9-93 / 105 LTE Module Series EC21 Hardware Design VILmax VILmin VImax VImin VOHmax VOHmin VOLmax VOLmin VSWR Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access EC21_Hardware_Design 9-94 / 105 LTE Module Series EC21 Hardware Design 10 Appendix B GPRS Coding Schemes Table 54: Description of Different Coding Schemes Scheme Code Rate USF Pre-coded USF Radio Block excl. USF and BCS BCS Tail Coded Bits Punctured Bits Data Rate Kb/s CS-1 1/2 3 3 181 40 4 456 0 9.05 CS-2 2/3 3 6 268 16 4 588 132 13.4 CS-3 3/4 3 6 312 16 4 676 220 15.6 CS-4 1 3 12 428 16
-
456
-
21.4 EC21_Hardware_Design 10-95 / 105 LTE Module Series EC21 Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 55: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 1 1 2 1 2 2 3 1 2 2 3 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA EC21_Hardware_Design 11-96 / 105 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 LTE Module Series EC21 Hardware Design NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 EC21_Hardware_Design 11-97 / 105 LTE Module Sires EC21 Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 56: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1:
CS-2:
CS-3:
CS-4:
MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 GMSK GMSK GMSK GMSK GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK
/
/
/
/
C B A C B A B A A 9.05kbps 13.4kbps 15.6kbps 21.4kbps 8.80kbps 11.2kbps 14.8kbps 17.6kbps 22.4kbps 29.6kbps 44.8kbps 54.4kbps 59.2kbps 18.1kbps 36.2kbps 26.8kbps 53.6kbps 31.2kbps 62.4kbps 42.8kbps 85.6kbps 17.60kbps 35.20kbps 22.4kbps 44.8kbps 29.6kbps 59.2kbps 35.2kbps 70.4kbps 44.8kbps 89.6kbps 59.2kbps 118.4kbps 89.6kbps 179.2kbps 108.8kbps 217.6kbps 118.4kbps 236.8kbps EC21_Hardware_Design 12-98 / 105 FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met:
1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time- averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3.A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR201609EC21V. 4.To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:
GSM/850/GSM1900/ WCDMA B2/B5/LTE B2/B4/B5/B7: <4dBi 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:
A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labelled withan FCC ID -
Section 2.926 (see 2.2 Certification (labelling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labelling requirements,options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is notvisible when installed in the host, or (2) if the host is marketed so that end users do not havestraightforward commonly used methods for access to remove the module so that the FCC ID ofthe module is visible; then an additional permanent label referring to the enclosed module:Contains Transmitter Module FCC ID:XMR201606EC21A or Contains FCC ID: XMR201609EC21V mustbe used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. To ensure compliance with all non-transmitter functions the host manufacturer is responsible for ensuring compliance with the module(s) installed and fully operational. For example, if a host was previously authorized as an unintentional radiator under the Declaration of Conformity procedure without a transmitter certified module and a module is added, the host manufacturer is responsible for ensuring that the after the module is installed and operational the host continues to be compliant with the Part 15B unintentional radiator requirements.
| frequency | equipment class | purpose | ||
|---|---|---|---|---|
| 1 | 2018-08-30 | 1720 ~ 1745 | TNB - Licensed Non-Broadcast Station Transmitter | Class II permissive change or modification of presently authorized equipment |
| 2 | 2016-09-30 | 1720 ~ 1745 | TNB - Licensed Non-Broadcast Station Transmitter | Change in identification of presently authorized equipment. Original FCC ID: XMR201607EC25V Grant Date: 09/19/2016 |
| app s | Applicant Information | |||||
|---|---|---|---|---|---|---|
| 1 2 | Effective |
2018-08-30
|
||||
| 1 2 |
2016-09-30
|
|||||
| 1 2 | Applicant's complete, legal business name |
Quectel Wireless Solutions Company Limited
|
||||
| 1 2 | FCC Registration Number (FRN) |
0018988279
|
||||
| 1 2 | Physical Address |
Building 5, Shanghai Business Park PhaseIII
|
||||
| 1 2 |
Shanghai, N/A 200233
|
|||||
| 1 2 |
China
|
|||||
| app s | TCB Information | |||||
| 1 2 | TCB Application Email Address |
c******@telefication.com
|
||||
| 1 2 |
b******@baclcorp.com
|
|||||
| 1 2 | TCB Scope |
B1: Commercial mobile radio services equipment in the following 47 CFR Parts 20, 22 (cellular), 24,25 (below 3 GHz) & 27
|
||||
| app s | FCC ID | |||||
| 1 2 | Grantee Code |
XMR
|
||||
| 1 2 | Equipment Product Code |
201609EC21V
|
||||
| app s | Person at the applicant's address to receive grant or for contact | |||||
| 1 2 | Name |
J****** x******
|
||||
| 1 2 | Telephone Number |
+8602******** Extension:
|
||||
| 1 2 | Fax Number |
+8621********
|
||||
| 1 2 |
j******@quectel.com
|
|||||
| app s | Technical Contact | |||||
| 1 2 | Firm Name |
TA Technology(Shanghai) Company, Limited
|
||||
| 1 2 | Name |
K****** X********
|
||||
| 1 2 | Physical Address |
No.145,Jintang Rd,Tangzhen IndustryPark,Pudong
|
||||
| 1 2 |
China
|
|||||
| 1 2 | Telephone Number |
86-21******** Extension:
|
||||
| 1 2 | Fax Number |
86-21********
|
||||
| 1 2 |
x******@ta-shanghai.com
|
|||||
| app s | Non Technical Contact | |||||
| 1 2 | Firm Name |
TA Technology(Shanghai) Company, Limited
|
||||
| 1 2 | Name |
j**** Z****
|
||||
| 1 2 | Physical Address |
No.145,Jintang Rd,Tangzhen IndustryPark,Pudong
|
||||
| 1 2 |
China
|
|||||
| 1 2 | Telephone Number |
86-21******** Extension:
|
||||
| 1 2 | Fax Number |
86-21********
|
||||
| 1 2 |
z******@ta-shanghai.com
|
|||||
| app s | Confidentiality (long or short term) | |||||
| 1 2 | Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | Yes | ||||
| 1 2 | No | |||||
| 1 2 | Long-Term Confidentiality Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | No | ||||
| if no date is supplied, the release date will be set to 45 calendar days past the date of grant. | ||||||
| app s | Cognitive Radio & Software Defined Radio, Class, etc | |||||
| 1 2 | Is this application for software defined/cognitive radio authorization? | No | ||||
| 1 2 | Equipment Class | TNB - Licensed Non-Broadcast Station Transmitter | ||||
| 1 2 | Description of product as it is marketed: (NOTE: This text will appear below the equipment class on the grant) | LTE Module | ||||
| 1 2 | Related OET KnowledgeDataBase Inquiry: Is there a KDB inquiry associated with this application? | Yes | ||||
| 1 2 | No | |||||
| 1 2 | Modular Equipment Type | Single Modular Approval | ||||
| 1 2 | Purpose / Application is for | Class II permissive change or modification of presently authorized equipment | ||||
| 1 2 | Change in identification of presently authorized equipment. Original FCC ID: XMR201607EC25V Grant Date: 09/19/2016 | |||||
| 1 2 | Composite Equipment: Is the equipment in this application a composite device subject to an additional equipment authorization? | No | ||||
| 1 2 | Related Equipment: Is the equipment in this application part of a system that operates with, or is marketed with, another device that requires an equipment authorization? | No | ||||
| 1 2 | Grant Comments | Class II Permissive Change : only some of minor components are removed, replaced or added to improve performance of power supply. Output power listed is conducted. Modular Approval for use as a module in mobile-only RF exposure conditions. The device supports 1.4/3/5/10/15/20 MHz BW in Band 4 and 5/10 MHz BW in Band 13 described in this filing. Antenna gain including cable loss must not exceed 10.65 dBi in the Band 13 and 6.5 dBi in the Band 4 for the purpose of satisfying the RF exposure requirements as defined in 2.1091. This device is allowed only for OEM integration into host products. The antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi-transmitter evaluation procedures. Compliance of this device in all final product configurations is the responsibility of the Grantee. End-users must be provided with specific information required to satisfy RF exposure compliance for final host devices and installations. Installation of this device into portable RF Exposure category host devices requires the submission of a Class II permissive change or new application. | ||||
| 1 2 | Output power listed is conducted. Modular Approval for use as a module in mobile-only RF exposure conditions. The device supports 1.4/3/5/10/15/20 MHz BW in Band 4 and 5/10 MHz BW in Band 13 described in this filing. Antenna gain including cable loss must not exceed 10.65 dBi in the Band 13 and 6.5 dBi in the Band 4 for the purpose of satisfying the RF exposure requirements as defined in 2.1091. This device is allowed only for OEM integration into host products. The antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi-transmitter evaluation procedures. Compliance of this device in all final product configurations is the responsibility of the Grantee. End-users must be provided with specific information required to satisfy RF exposure compliance for final host devices and installations. Installation of this device into portable RF Exposure category host devices requires the submission of a Class II permissive change or new application. | |||||
| 1 2 | Is there an equipment authorization waiver associated with this application? | No | ||||
| 1 2 | If there is an equipment authorization waiver associated with this application, has the associated waiver been approved and all information uploaded? | No | ||||
| app s | Test Firm Name and Contact Information | |||||
| 1 2 | Firm Name |
TA Technology (Shanghai) Co., Ltd.
|
||||
| 1 2 |
Bay Area Compliance Laboratories Corp.(kunshan)
|
|||||
| 1 2 | Name |
M******** L********
|
||||
| 1 2 |
j******** c****
|
|||||
| 1 2 | Telephone Number |
86-21********
|
||||
| 1 2 |
86051******** Extension:
|
|||||
| 1 2 | Fax Number |
+86 (********
|
||||
| 1 2 |
l******@ta-shanghai.com
|
|||||
| 1 2 |
j******@baclcorp.com
|
|||||
| Equipment Specifications | |||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Line | Rule Parts | Grant Notes | Lower Frequency | Upper Frequency | Power Output | Tolerance | Emission Designator | Microprocessor Number | |||||||||||||||||||||||||||||||||
| 1 | 1 | 27 | 1710.7 | 1754.3 | 0.21 | 2.5 ppm | 1M10G7D | ||||||||||||||||||||||||||||||||||
| 1 | 2 | 27 | 1710.7 | 1754.3 | 0.208 | 2.5 ppm | 1M11D7W | ||||||||||||||||||||||||||||||||||
| 1 | 3 | 27 | 1711.5 | 1753.5 | 0.213 | 2.5 ppm | 2M74G7D | ||||||||||||||||||||||||||||||||||
| 1 | 4 | 27 | 1711.5 | 1753.5 | 0.211 | 2.5 ppm | 2M77D7W | ||||||||||||||||||||||||||||||||||
| 1 | 5 | 27 | 1712.5 | 1752.5 | 0.214 | 2.5 ppm | 4M54G7D | ||||||||||||||||||||||||||||||||||
| 1 | 6 | 27 | 1712.5 | 1752.5 | 0.212 | 2.5 ppm | 4M52D7W | ||||||||||||||||||||||||||||||||||
| 1 | 7 | 27 | 1715 | 1750 | 0.209 | 2.5 ppm | 9M08G7D | ||||||||||||||||||||||||||||||||||
| 1 | 8 | 27 | 1715 | 1750 | 0.212 | 2.5 ppm | 9M08D7W | ||||||||||||||||||||||||||||||||||
| 1 | 9 | 27 | 1717.5 | 1747.5 | 0.212 | 2.5 ppm | 13M5G7D | ||||||||||||||||||||||||||||||||||
| 1 | 1 | 27 | 1717.5 | 1747.5 | 0.21 | 2.5 ppm | 13M5D7W | ||||||||||||||||||||||||||||||||||
| 1 | 11 | 27 | 1720 | 1745 | 0.212 | 2.5 ppm | 17M9G7D | ||||||||||||||||||||||||||||||||||
| 1 | 12 | 27 | 1720 | 1745 | 0.21 | 2.5 ppm | 17M9D7W | ||||||||||||||||||||||||||||||||||
| 1 | 13 | 27 | 779.5 | 784.5 | 0.208 | 2.5 ppm | 4M54G7D | ||||||||||||||||||||||||||||||||||
| 1 | 14 | 27 | 779.5 | 784.5 | 0.212 | 2.5 ppm | 4M54D7W | ||||||||||||||||||||||||||||||||||
| 1 | 15 | 27 | 782 | 782 | 0.208 | 2.5 ppm | 9M16G7D | ||||||||||||||||||||||||||||||||||
| 1 | 16 | 27 | 782 | 782 | 0.213 | 2.5 ppm | 9M16D7W | ||||||||||||||||||||||||||||||||||
| Line | Rule Parts | Grant Notes | Lower Frequency | Upper Frequency | Power Output | Tolerance | Emission Designator | Microprocessor Number | |||||||||||||||||||||||||||||||||
| 2 | 1 | 27 | 1710.7 | 1754.3 | 0.21 | 2.5 ppm | 1M10G7D | ||||||||||||||||||||||||||||||||||
| 2 | 2 | 27 | 1710.7 | 1754.3 | 0.208 | 2.5 ppm | 1M11D7W | ||||||||||||||||||||||||||||||||||
| 2 | 3 | 27 | 1711.5 | 1753.5 | 0.213 | 2.5 ppm | 2M74G7D | ||||||||||||||||||||||||||||||||||
| 2 | 4 | 27 | 1711.5 | 1753.5 | 0.211 | 2.5 ppm | 2M77D7W | ||||||||||||||||||||||||||||||||||
| 2 | 5 | 27 | 1712.5 | 1752.5 | 0.214 | 2.5 ppm | 4M54G7D | ||||||||||||||||||||||||||||||||||
| 2 | 6 | 27 | 1712.5 | 1752.5 | 0.212 | 2.5 ppm | 4M52D7W | ||||||||||||||||||||||||||||||||||
| 2 | 7 | 27 | 1715 | 1750 | 0.209 | 2.5 ppm | 9M08G7D | ||||||||||||||||||||||||||||||||||
| 2 | 8 | 27 | 1715 | 1750 | 0.212 | 2.5 ppm | 9M08D7W | ||||||||||||||||||||||||||||||||||
| 2 | 9 | 27 | 1717.5 | 1747.5 | 0.212 | 2.5 ppm | 13M5G7D | ||||||||||||||||||||||||||||||||||
| 2 | 1 | 27 | 1717.5 | 1747.5 | 0.21 | 2.5 ppm | 13M5D7W | ||||||||||||||||||||||||||||||||||
| 2 | 11 | 27 | 1720 | 1745 | 0.212 | 2.5 ppm | 17M9G7D | ||||||||||||||||||||||||||||||||||
| 2 | 12 | 27 | 1720 | 1745 | 0.21 | 2.5 ppm | 17M9D7W | ||||||||||||||||||||||||||||||||||
| 2 | 13 | 27 | 779.5 | 784.5 | 0.208 | 2.5 ppm | 4M54G7D | ||||||||||||||||||||||||||||||||||
| 2 | 14 | 27 | 779.5 | 784.5 | 0.212 | 2.5 ppm | 4M54D7W | ||||||||||||||||||||||||||||||||||
| 2 | 15 | 27 | 782 | 782 | 0.208 | 2.5 ppm | 9M16G7D | ||||||||||||||||||||||||||||||||||
| 2 | 16 | 27 | 782 | 782 | 0.213 | 2.5 ppm | 9M16D7W | ||||||||||||||||||||||||||||||||||
some individual PII (Personally Identifiable Information) available on the public forms may be redacted, original source may include additional details
This product uses the FCC Data API but is not endorsed or certified by the FCC