FCC ID: XMR201907AG35E LTE Module

 

AG35 Hardware Design Automotive Module Series Rev. AG35_Hardware_Design_V1.3 Date: 2019-05-20 Status: Released www.quectel.com Automotive Module Series AG35 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit:

http://www.quectel.com/support/sales.htm For technical support, or to report documentation errors, please visit:

http://www.quectel.com/support/technical.htm Or email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE FORBIDDEN WITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2019. All rights reserved. AG35_Hardware_Design 1 / 129 Automotive Module Series AG35 Hardware Design About the Document History Revision Date Author Description 1.0 2018-03-19 Eden LIU/

Dominic GONG Initial 1.1 2018-12-12 9. Added the description of RTC function (Chapter Eden LIU/

Dominic GONG/

Ethan SHAN

(Chapter 3.15). 3.22). 1. Updated the variants and/or frequency bands of AG35 (Table 1). 2. Updated the functional diagram (Figure 1). 3. Updated the pin assignment of AG35 (Figure 2). 4. Updated the drive current of STATUS pin (Table 4). 5. Enabled SHDN_N (pin 176), and added the description of the interface in Chapter 3.7.2.3. 6. Enabled an optional audio interface (pins 132~141) for AG35 (Chapter 3.12). 7. Updated the pin definition of PCM and I2C interfaces in Chapter 3.13. 8. Updated the power domain of SGMII interface 10. Added GNSS performance values of AG35-NA and AG35-J (Chapter 4.2). 11. Completed the operating frequency of the module 12. Updated the frequency of Galileo and QZSS (Table 13. Updated current consumption values of the module

(Chapter 5.1.2), 34).

(Chapter 6.4). 14. Completed the RF output power values of the module (Chapter 6.5). 15. Added the RF receiving sensitivity of AG35-E, AG35-NA and AG35-J (Chapter 6.6). AG35_Hardware_Design 2 / 129 Automotive Module Series AG35 Hardware Design 16. Updated the recommended reflow soldering thermal profile and involved parameters (Chapter 8.2). 1. Removed the optional LTE-FDD B28 from AG35-NA. 2. Enabled HSIC interface (pin 194/195) and added related information thereof (Chapter 2.2, Chapter 2.3, Chapter 3.2, Chapter 3.3 and Chapter 3.23). 3. Added audio interface characteristics (Table 17). 4. Updated the reference circuit for connection with AF20 module (Figure 29). 5. Added AG35-E and AG35-LA GNSS performance 7. Updated GNSS frequency (Table 44). 8. Updated current consumption values of the module 9. Updated RF receiving sensitivity (Chapter 6.6). 10. Updated electrostatic discharge characteristics

(Table 36).

(Chapter 6.4).

(Table 69). 11. Updated the recommended stencil thickness and the peak reflow temperature (Chapter 8.2). Corrected some pin names in the pin assignment figure (Figure 2). 1.2 2019-04-30 Eden LIU/

Dominic GONG parameters (Table 33 and Table 35). 6. Updated AG35-J GNSS performance parameters 1.3 2019-05-20 Eden LIU AG35_Hardware_Design 3 / 129 Automotive Module Series AG35 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 4 Table Index ................................................................................................................................................... 7 Figure Index ................................................................................................................................................. 9 1 Introduction ........................................................................................................................................ 11 1.1. Safety Information ..................................................................................................................... 15 2 Product Concept ................................................................................................................................ 17 2.1. General Description .................................................................................................................. 17 2.2. Key Features ............................................................................................................................. 18 2.3. Functional Diagram ................................................................................................................... 21 2.4. Evaluation Board ....................................................................................................................... 22 3 Application Interfaces ....................................................................................................................... 23 3.1. General Description .................................................................................................................. 23 3.2. Pin Assignment ......................................................................................................................... 24 3.3. Pin Description .......................................................................................................................... 25 3.4. Operating Modes ....................................................................................................................... 36 3.5. Power Saving ............................................................................................................................ 37 3.5.1. Sleep Mode .................................................................................................................... 37 3.5.1.1. UART Application ................................................................................................ 38 3.5.1.2. USB Application with USB Remote Wakeup Function ....................................... 38 3.5.1.3. USB Application with USB Suspend/Resume and RI Functions ........................ 39 3.5.1.4. USB Application without USB Suspend Function ............................................... 40 3.5.2. Airplane Mode ................................................................................................................ 40 3.6. Power Supply ............................................................................................................................ 41 3.6.1. Power Supply Pins ......................................................................................................... 41 3.6.2. Decrease Voltage Drop .................................................................................................. 42 3.6.3. Reference Design for Power Supply .............................................................................. 43 3.6.4. Monitor the Power Supply .............................................................................................. 43 3.7. Turn on and off Scenarios ......................................................................................................... 43 Turn on Module Using the PWRKEY ............................................................................. 43 Turn off Module .............................................................................................................. 45 Turn off Module Using the PWRKEY Pin ............................................................ 45 Turn off Module Using AT Command .................................................................. 46 Turn off Module Using SHDN_N ......................................................................... 46 3.8. Reset the Module ...................................................................................................................... 48 3.9.

(U)SIM Interface ........................................................................................................................ 49 3.10. USB Interface ............................................................................................................................ 51 3.11. UART Interfaces ........................................................................................................................ 53 3.7.2.1. 3.7.2.2. 3.7.2.3. 3.7.1. 3.7.2. AG35_Hardware_Design 4 / 129 Automotive Module Series AG35 Hardware Design 3.12. Audio Interface (Optional) ......................................................................................................... 55 3.13. PCM and I2C Interfaces ............................................................................................................ 57 3.14. SDIO Interfaces ......................................................................................................................... 60 3.14.1. SDIO1 Interface ............................................................................................................. 60 3.14.2. SDIO2 Interface ............................................................................................................. 60 3.15. SGMII Interface (Optional) ........................................................................................................ 62 3.16. Wireless Connectivity Interfaces ............................................................................................... 64 3.16.1. WLAN Interface .............................................................................................................. 66 3.16.2. BT Interface* .................................................................................................................. 67 3.17. ADC Interfaces .......................................................................................................................... 67 3.18. Network Status Indication ......................................................................................................... 68 3.19. STATUS ..................................................................................................................................... 69 3.20. Behaviors of RI .......................................................................................................................... 70 3.21. USB_BOOT Interface................................................................................................................ 71 3.22. RTC ........................................................................................................................................... 72 3.23. HSIC Interface* ......................................................................................................................... 72 4 GNSS Receiver ................................................................................................................................... 74 4.1. General Description .................................................................................................................. 74 4.2. GNSS Performance .................................................................................................................. 74 4.3. Layout Guidelines ..................................................................................................................... 77 5 Antenna Interfaces ............................................................................................................................. 78 5.1. Main/Rx-diversity Antenna Interface ......................................................................................... 78 5.1.1. Pin Definition .................................................................................................................. 78 5.1.2. Operating Frequency ..................................................................................................... 78 5.1.3. Reference Design of RF Antenna Interfaces ................................................................. 82 5.1.4. Reference Design of RF Layout..................................................................................... 83 5.2. GNSS Antenna Interface ........................................................................................................... 85 5.3. Antenna Installation .................................................................................................................. 86 5.3.1. Antenna Requirements .................................................................................................. 86 5.3.2. Recommended RF Connector for Antenna Installation ................................................. 87 6 Electrical, Reliability and Radio Characteristics ............................................................................ 89 6.1. Absolute Maximum Ratings ...................................................................................................... 89 6.2. Power Supply Ratings ............................................................................................................... 90 6.3. Operation and Storage Temperatures ...................................................................................... 90 6.4. Current Consumption ................................................................................................................ 91 6.5. RF Output Power .................................................................................................................... 107 6.6. RF Receiving Sensitivity ..........................................................................................................111 6.7. Electrostatic Discharge ........................................................................................................... 115 6.8. Thermal Consideration ............................................................................................................ 115 7 Mechanical Dimensions .................................................................................................................. 118 7.1. Mechanical Dimensions of the Module ................................................................................... 118 7.2. Recommended Footprint ........................................................................................................ 120 AG35_Hardware_Design 5 / 129 Automotive Module Series AG35 Hardware Design 7.3. Design Effect Drawings of the Module .................................................................................... 121 8 Storage, Manufacturing and Packaging ........................................................................................ 122 8.1. Storage .................................................................................................................................... 122 8.2. Manufacturing and Soldering .................................................................................................. 123 8.3. Packaging ............................................................................................................................... 124 9 Appendix A References ................................................................................................................... 126 10 Appendix B GPRS Coding Schemes ............................................................................................. 130 11 Appendix C GPRS Multi-slot Classes ............................................................................................ 131 12 Appendix D EDGE Modulation and Coding Schemes ................................................................. 133 AG35_Hardware_Design 6 / 129 Automotive Module Series AG35 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF AG35 SERIES MODULES ..................................................................... 17 TABLE 2: AG35 KEY FEATURES ..................................................................................................................... 18 TABLE 3: I/O PARAMETERS DEFINITION ....................................................................................................... 25 TABLE 4: PIN DESCRIPTION ........................................................................................................................... 25 TABLE 5: OVERVIEW OF OPERATING MODES ............................................................................................. 36 TABLE 6: VBAT AND GND PINS ....................................................................................................................... 41 TABLE 7: PWRKEY PIN DESCRIPTION .......................................................................................................... 44 TABLE 8: PIN DEFINITION OF SHDN_N ......................................................................................................... 46 TABLE 9: RESET_N PIN DESCRIPTION ......................................................................................................... 48 TABLE 10: PIN DEFINITION OF (U)SIM INTERFACE ..................................................................................... 49 TABLE 11: PIN DEFINITION OF USB INTERFACE .......................................................................................... 51 TABLE 12: PIN DEFINITION OF MAIN UART INTERFACE ............................................................................. 53 TABLE 13: PIN DEFINITION OF UART2 INTERFACE (FOR BT FUNCTION*) ............................................... 53 TABLE 14: PIN DEFINITION OF DEBUG UART INTERFACE ......................................................................... 54 TABLE 15: LOGIC LEVELS OF DIGITAL I/O .................................................................................................... 54 TABLE 16: PIN DEFINITION OF ANALOG AUDIO INTERFACE ...................................................................... 55 TABLE 17: AUDIO INTERFACE CHARACTERISTICS ..................................................................................... 56 TABLE 18: PIN DEFINITION OF PCM INTERFACE ......................................................................................... 58 TABLE 19: PIN DEFINITION OF I2C INTERFACES ......................................................................................... 58 TABLE 20: PIN DEFINITION OF SDIO2 INTERFACE ...................................................................................... 60 TABLE 21: PIN DEFINITION OF SGMII INTERFACE ...................................................................................... 62 TABLE 22: PIN DEFINITION OF WIRELESS CONNECTIVITY INTERFACES ................................................ 64 TABLE 23: PIN DEFINITION OF ADC INTERFACES ....................................................................................... 67 TABLE 24: CHARACTERISTICS OF ADC INTERFACES ................................................................................ 68 TABLE 25: PIN DEFINITION OF NETWORK CONNECTION STATUS /ACTIVITY INDICATOR ..................... 68 TABLE 26: WORKING STATE OF THE NETWORK CONNECTION STATUS /ACTIVITY INDICATOR .......... 69 TABLE 27: PIN DEFINITION OF STATUS ........................................................................................................ 70 TABLE 28: DEFAULT BEHAVIORS OF RI ........................................................................................................ 71 TABLE 29: PIN DEFINITION OF USB_BOOT INTERFACE ............................................................................. 71 TABLE 30: PIN DEFINITION OF HSIC INTERFACE ........................................................................................ 72 TABLE 31: DESIGN GUIDELINES FOR HSIC.................................................................................................. 72 TABLE 32: AG35-CE GNSS PERFORMANCE ................................................................................................. 74 TABLE 33: AG35-E GNSS PERFORMANCE .................................................................................................... 75 TABLE 34: AG35-NA GNSS PERFORMANCE ................................................................................................. 75 TABLE 35: AG35-LA GNSS PERFORMANCE .................................................................................................. 76 TABLE 36: AG35-J GNSS PERFORMANCE .................................................................................................... 76 TABLE 37: PIN DEFINITION OF RF ANTENNA INTERFACES ........................................................................ 78 TABLE 38: AG35-CE OPERATING FREQUENCIES ........................................................................................ 78 TABLE 39: AG35-E OPERATING FREQUENCIES ........................................................................................... 79 TABLE 40: AG35-NA OPERATING FREQUENCIES ........................................................................................ 80 TABLE 41: AG35-LA OPERATING FREQUENCIES ......................................................................................... 80 AG35_Hardware_Design 7 / 129 Automotive Module Series AG35 Hardware Design TABLE 42: AG35-J OPERATING FREQUENCIES ........................................................................................... 81 TABLE 43: PIN DEFINITION OF GNSS ANTENNA INTERFACE ..................................................................... 85 TABLE 44: GNSS FREQUENCY ....................................................................................................................... 85 TABLE 45: ANTENNA REQUIREMENTS .......................................................................................................... 86 TABLE 46: ABSOLUTE MAXIMUM RATINGS .................................................................................................. 89 TABLE 47: POWER SUPPLY RATINGS ........................................................................................................... 90 TABLE 48: OPERATION AND STORAGE TEMPERATURES .......................................................................... 90 TABLE 49: AG35-CE CURRENT CONSUMPTION (25C, 3.8V POWER SUPPLY) ........................................ 91 TABLE 50: AG35-E CURRENT CONSUMPTION ............................................................................................. 94 TABLE 51: AG35-NA CURRENT CONSUMPTION ........................................................................................... 97 TABLE 52: AG35-LA CURRENT CONSUMPTION ......................................................................................... 100 TABLE 53: AG35-J CURRENT CONSUMPTION ............................................................................................ 104 TABLE 54: AG35-CE GNSS CURRENT CONSUMPTION ............................................................................. 106 TABLE 55: AG35-E GNSS CURRENT CONSUMPTION ................................................................................ 106 TABLE 56: AG35-NA GNSS CURRENT CONSUMPTION ............................................................................. 106 TABLE 57: AG35-LA GNSS CURRENT CONSUMPTION .............................................................................. 107 TABLE 58: AG35-J GNSS CURRENT CONSUMPTION................................................................................. 107 TABLE 59: AG35-CE RF OUTPUT POWER ................................................................................................... 107 TABLE 60: AG35-E RF OUTPUT POWER ...................................................................................................... 108 TABLE 61: AG35-NA RF OUTPUT POWER ................................................................................................... 109 TABLE 62: AG35-LA RF OUTPUT POWER .................................................................................................... 109 TABLE 63: AG35-J RF OUTPUT POWER ....................................................................................................... 110 TABLE 64: AG35-CE RF RECEIVING SENSITIVITY ...................................................................................... 111 TABLE 65: AG35-E RF RECEIVING SENSITIVITY ......................................................................................... 112 TABLE 66: AG35-NA RF RECEIVING SENSITIVITY ....................................................................................... 113 TABLE 67: AG35-LA RF RECEIVING SENSITIVITY ....................................................................................... 113 TABLE 68: AG35-J RF RECEIVING SENSITIVITY .......................................................................................... 114 TABLE 69: ELECTROSTATIC DISCHARGE CHARACTERISTICS ................................................................ 115 TABLE 70: RECOMMENDED THERMAL PROFILE PARAMETERS ............................................................. 123 TABLE 71: RELATED DOCUMENTS .............................................................................................................. 126 TABLE 72: TERMS AND ABBREVIATIONS .................................................................................................... 126 TABLE 73: DESCRIPTION OF DIFFERENT CODING SCHEMES ................................................................ 130 TABLE 74: GPRS MULTI-SLOT CLASSES .................................................................................................... 131 TABLE 75: EDGE MODULATION AND CODING SCHEMES ......................................................................... 133 AG35_Hardware_Design 8 / 129 Automotive Module Series AG35 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 22 FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 24 FIGURE 3: SLEEP MODE CURRENT CONSUMPTION DIAGRAM ................................................................ 37 FIGURE 4: SLEEP MODE APPLICATION VIA UART ....................................................................................... 38 FIGURE 5: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 39 FIGURE 6: SLEEP MODE APPLICATION WITH RI ......................................................................................... 39 FIGURE 7: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION ................................................ 40 FIGURE 8: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ...................................................... 42 FIGURE 9: STAR STRUCTURE OF THE POWER SUPPLY............................................................................ 42 FIGURE 10: REFERENCE CIRCUIT OF POWER SUPPLY ............................................................................ 43 FIGURE 11: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................. 44 FIGURE 12: TURN ON THE MODULE USING KEYSTROKE ......................................................................... 44 FIGURE 13: TIMING OF TURNING ON MODULE ........................................................................................... 45 FIGURE 14: TIMING OF TURNING OFF MODULE ......................................................................................... 46 FIGURE 15: SHUT DOWN THE MODULE USING DRIVING CIRCUIT ........................................................... 47 FIGURE 16: TIMING OF TURNING OFF MODULE VIA SHDN_N ................................................................... 47 FIGURE 17: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 48 FIGURE 18: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 48 FIGURE 19: TIMING OF RESETTING MODULE ............................................................................................. 49 FIGURE 20: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR

................................................................................................................................................................... 50 FIGURE 21: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR . 50 FIGURE 22: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 52 FIGURE 23: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 54 FIGURE 24: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 55 FIGURE 25: PRIMARY MODE TIMING ............................................................................................................ 57 FIGURE 26: AUXILIARY MODE TIMING .......................................................................................................... 58 FIGURE 27: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC .................................... 59 FIGURE 28: REFERENCE CIRCUIT OF SD CARD APPLICATION ................................................................ 61 FIGURE 29: REFERENCE CIRCUIT FOR CONNECTION WITH AF20 MODULE .......................................... 66 FIGURE 30: REFERENCE CIRCUIT OF THE NETWORK INDICATOR .......................................................... 69 FIGURE 31: REFERENCE CIRCUIT OF THE STATUS ................................................................................... 70 FIGURE 32: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 71 FIGURE 33: REFERENCE CIRCUIT OF RF ANTENNA INTERFACES ........................................................... 82 FIGURE 34: MICROSTRIP DESIGN ON A 2-LAYER PCB ............................................................................... 83 FIGURE 35: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB ........................................................... 83 FIGURE 36: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)

................................................................................................................................................................... 84 FIGURE 37: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND)

................................................................................................................................................................... 84 FIGURE 38: REFERENCE CIRCUIT OF GNSS ANTENNA ............................................................................. 85 AG35_Hardware_Design 9 / 129 Automotive Module Series AG35 Hardware Design FIGURE 39: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ................................................ 87 FIGURE 40: MECHANICALS OF U.FL-LP CONNECTORS ............................................................................. 87 FIGURE 41: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) ........................................................... 88 FIGURE 42: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE) ................. 116 FIGURE 43: REFERENCED HEATSINK DESIGN (HEATSINK AT THE BACKSIDE OF CUSTOMERS PCB)

.................................................................................................................................................................. 117 FIGURE 44: MODULE TOP AND SIDE DIMENSIONS .................................................................................... 118 FIGURE 45: MODULE BOTTOM DIMENSIONS (TOP VIEW) ........................................................................ 119 FIGURE 46: MODULE BOTTOM DIMENSIONS (TOP VIEW) ....................................................................... 120 FIGURE 47: TOP VIEW OF THE MODULE .................................................................................................... 121 FIGURE 48: BOTTOM VIEW OF THE MODULE ............................................................................................ 121 FIGURE 49: RECOMMENDED REFLOW SOLDERING THERMAL PROFILE .............................................. 123 FIGURE 50: TAPE SPECIFICATIONS ............................................................................................................ 124 FIGURE 51: REEL SPECIFICATIONS ............................................................................................................ 125 AG35_Hardware_Design 10 / 129 Automotive Module Series AG35 Hardware Design 1 Introduction This document defines the AG35 module and describes its air interface and hardware interfaces which are connected with customers applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, customers can use AG35 to design and set up automotive industry mobile applications easily. Hereby, [Quectel Wireless Solutions Co., Ltd.] declares that the radio equipment type [AG35-E, AG35-LA]

is in compliance with Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address:

http://www.quectel.com The device could be used with a separation distance of 20cm to the human body. AG35_Hardware_Design 11 / 129 Automotive Module Series AG35 Hardware Design OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed. Important Note notice that any deviation(s) from the defined parameters of the antenna trace, as described by the instructions, require that the host product manufacturer must notify to Quectel Wireless Solutions Co., Ltd. that they wish to change the antenna trace design. In this case, a Class II permissive change application is required to be filed by the USI, or the host manufacturer can take responsibility through the change in FCC ID (new application) procedure followed by a Class II permissive change application. End Product Labeling When the module is installed in the host device, the FCC/IC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text: Contains FCC ID: XMR201905AG35LA Or Contains FCC ID: XMR201907AG35E The FCC ID/IC ID can be used only when all FCC/IC compliance requirements are met. Antenna Installation

(1) The antenna must be installed such that 20 cm is maintained between the antenna and users,

(2) The transmitter module may not be co-located with any other transmitter or antenna.

(3) Only antennas of the same type and with equal or less gains as shown below may be used with this module. Other types of antennas and/or higher gain antennas may require additional authorization for operation. AG35_Hardware_Design 12 / 129 Automotive Module Series AG35 Hardware Design GSM1900 Gain (dBi) 2.00 WCDMA Band II Gain

(dBi) 2.00 WCDMA Band IV Gain

(dBi) 5.00 WCDMA Band V Gain

(dBi) 4.50 Antenna type GSM850 Gain (dBi) 4.50 Fixed External Antenna Antenna type LTE Band 2 Gain (dBi) 2.00 LTE Band 4 Gain (dBi) 5.00 LTE Band 5 Gain (dBi) 4.50 LTE Band 7 Gain (dBi) 7.00 Fixed External Antenna AG35-E:

Fixed External Antenna Antenna type WCDMA LTE Band 5 Gain (dBi) LTE Band 7 Gain (dBi) LTE Band 38 Gain (dBi) Band V Gain

(dBi) 9.00 9.00 8.00 8.00 In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can AG35_Hardware_Design 13 / 129 Automotive Module Series AG35 Hardware Design be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:

- Reorient or relocate the receiving antenna.

- Increase the separation between the equipment and receiver.

- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

- Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. List of applicable FCC rules This module has been tested and found to comply with part 22, part 27 requirements for Modular Approval. The modular transmitter is only FCC authorized for the specific rule parts (i.e., FCC transmitter rules) listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification. If the grantee markets their product as being Part 15 Subpart B compliant (when it also contains unintentional-radiator digital circuity), then the grantee shall provide a notice stating that the final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed. This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator &

your body. AG35_Hardware_Design 14 / 129 Automotive Module Series AG35 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating AG35 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be given to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If the device offers an Airplane Mode, then it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on boarding the aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. AG35_Hardware_Design 15 / 129 Automotive Module Series AG35 Hardware Design In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as your phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. AG35_Hardware_Design 16 / 129 Automotive Module Series AG35 Hardware Design 2 Product Concept 2.1. General Description AG35 is a series of automotive-grade LTE-FDD/LTE-TDD/WCDMA/TD-SCDMA/EVDO/CDMA/GSM wireless communication module with LTE/WCDMA receive diversity. Engineered to meet the demanding requirements in automotive applications and other harsh operating conditions, it offers a premium solution for high performance automotive and intelligent transportation system (ITS) applications, such as fleet management, onboard vehicle telematics, in-car entertainment systems, emergency calling, and roadside assistance. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, TD-SCDMA, EVDO, CDMA, EDGE and GPRS networks. Also it can provide GNSS and voice functionality to meet customers specific application demands. AG35 contains five variants: AG35-CE, AG35-E, AG35-NA, AG35-LA and AG35-J. Customers can choose a dedicated type based on the region or operator. The following table shows the frequency bands of AG35 series modules. Table 1: Frequency Bands of AG35 Series Modules AG35-CE AG35-E AG35-NA AG35-LA AG35-J B1/B3/B5/

B7/B8/B20/

B28 B2/B4/B5/

B7/B12/B13/

B17 B1/B2/B3/

B4/B5/B7/

B8/B28 B1/B3/B5/B8/

B9/B19/B21/

B28 B38/B40 N/A N/A B41 Network Type LTE-FDD

(with Rx-diversity) LTE-TDD

(with Rx-diversity) WCDMA

(with Rx-diversity) B1/B3/

B5/B8 B34/B38/

B39/B40/

B41 B1/B8 B1/B5/B8 B2/B4/B5 B1/B2/B3/

B4/B5/B8 B1/B3/B5/

B6/B8/B19 TD-SCDMA B34/B39 EVDO/CDMA BC0 1) N/A N/A N/A N/A N/A N/A GSM 900/1800MHz 900/1800MHz 850/1900MHz N/A N/A N/A 850/900/

1800/1900MHz AG35_Hardware_Design 17 / 129 Automotive Module Series AG35 Hardware Design GPS, GLONASS, BeiDou/

Compass, Galileo, QZSS GPS, GLONASS, BeiDou/

Compass, Galileo, QZSS GPS, GLONASS, BeiDou/

Compass, Galileo, QZSS GPS, GLONASS, BeiDou/

Compass, Galileo, QZSS,SBAS GPS, GLONASS, BeiDou/

Compass, Galileo, QZSS AG35 is an SMD type module which can be embedded in applications through its 299-pin LGA pads. This, coupled with its compact profile of 33.0mm 37.5mm 3.0mm, makes AG35 a ruggedized module for the most demanding applications and environments. GNSS NOTES 1. 1) EVDO/CDMA BC0 for AG35-CE is optional. 2. * means under development. 2.2. Key Features The following table describes the detailed features of AG35 module. Table 2: AG35 Key Features Feature Details Power Supply Supply voltage: 3.3V~4.3V Typical supply voltage: 3.8V Class 4 (33dBm2dB) for GSM850 Class 4 (33dBm2dB) for EGSM900 Class 1 (30dBm2dB) for DCS1800 Class 1 (30dBm2dB) for PCS1900 Class E2 (27dBm3dB) for GSM850 8-PSK Class E2 (27dBm3dB) for EGSM900 8-PSK Class E2 (26dBm3dB) for DCS1800 8-PSK Class E2 (26dBm3dB) for PCS1900 8-PSK Class 3 (24dBm+2/-1dB) for EVDO/CDMA BC0 Class 3 (24dBm+1/-3dB) for WCDMA bands Class 2 (24dBm+1/-3dB) for TD-SCDMA bands Class 3 (23dBm2dB) for LTE-FDD bands Class 3 (23dBm2dB) for LTE-TDD bands Support up to non-CA Cat 4 FDD and TDD Support 1.4 to 20MHz RF bandwidth Transmitting Power LTE Features AG35_Hardware_Design 18 / 129 TD-SCDMA Features Support CCSA Release 3 TD-SCDMA Max 4.2Mbps (DL)/2.2Mbps (UL) Automotive Module Series AG35 Hardware Design Support Multiuser MIMO in DL direction FDD: Max 150Mbps (DL)/50Mbps (UL) TDD: Max 130Mbps (DL)/30Mbps (UL) Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA Support QPSK, 16-QAM and 64-QAM modulation DC-HSDPA: Max 42Mbps (DL) HSUPA: Max 5.76Mbps (UL) WCDMA: Max 384Kbps (DL)/384Kbps (UL) Support 3GPP2 CDMA2000 1X Advanced, CDMA2000 1x EV-DO Rev.A EVDO: Max 3.1Mbps (DL)/1.8Mbps (UL) 1X Advanced: Max 307.2Kbps (DL)/307.2Kbps (UL) GPRS:

Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 107Kbps (DL)/85.6Kbps (UL) EDGE:

Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max 296Kbps (DL)/236.8Kbps (UL) Support TCP/UDP/PPP/FTP/HTTP/NTP/PING/QMI/HTTPS/SMTP/MMS/

FTPS/SMTPS/SSL protocols Support the protocols PAP (Password Authentication Protocol) and CHAP

(Challenge Handshake Authentication Protocol) usually used for PPP connections Internet Protocol Features Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: ME by default

(U)SIM Interface Support USIM/SIM card: 1.8V, 3.0V Built-in audio codec with two microphone inputs and one stereo output or two mono outputs GSM: HR/FR/EFR/AMR/AMR-WB WCDMA: AMR/AMR-WB LTE: AMR/AMR-WB Support echo cancellation and noise suppression Used for audio function with external codec Support 16-bit linear data format Support long frame synchronization and short frame synchronization AG35_Hardware_Design 19 / 129 WCDMA Features CDMA2000 Features GSM Features SMS Audio Features

(Optional) PCM Interface Automotive Module Series AG35 Hardware Design Support master and slave modes, but must be the master in long frame synchronization SGMII Interface (Optional) Support 10/100/1000Mbps WLAN Interface Compliant with 802.11, 4-bit, 1.8V WLAN interface SDIO Interfaces USB Interface UART Interfaces SDIO1:

Compliant with SD 3.0 protocol Used for WLAN function SDIO2:

Compliant with SD 3.0 protocol Compliant with USB 2.0 specification (slave only), and the data transfer rate can reach up to 480Mbps Used for AT command communication, data transmission, GNSS NMEA output, software debugging and firmware upgrade Support USB serial driver under Windows 7/8/8.1/10, Windows CE 5.0/6.0/7.0*, Linux 2.6/3.x/4.1~4.14, Android 4.x/5.x/6.x/7.x/8.x/9.x Main UART:

Used for AT command communication and data transmission Baud rate reach up to 921600bps, 115200bps by default Support RTS and CTS hardware flow control UART2:

Used for BT function*

Baud rate reach up to 921600bps, 115200bps by default Support RTS and CTS hardware flow control Debug UART:

Used for Linux console and log output 115200bps baud rate HSIC Interface*

High-speed inter-chip USB electrical specification compliant Rx-diversity Support LTE/WCDMA Rx-diversity GNSS Features AT Commands Network Indication Antenna Interface Gen8C-Lite of Qualcomm Protocol: NMEA 0183 Data update rate: 1Hz by default and maximally up to 10Hz 3GPP TS 27.007/3GPP TS 27.005 AT commands and Quectel enhanced AT commands Two pins including NET_MODE and NET_STATUS to indicate network connectivity status Including main antenna interface (ANT_MAIN), Rx-diversity antenna interface (ANT_DIV) and GNSS antenna interface (ANT_GNSS) Physical Characteristics Size: (33.00.15)mm (37.50.15)mm (3.00.2)mm Weight: Approx. 8.1g Temperature Range Operation temperature range: -35C ~ +75C 1) AG35_Hardware_Design 20 / 129 Automotive Module Series AG35 Hardware Design Extended temperature range: -40C ~ +85C 2) eCall temperature range: -40C ~ +90C 3) Storage temperature range: -40C ~ +95C Firmware Upgrade USB interface DFOTA RoHS All hardware components are fully compliant with EU RoHS directive NOTES 1. 2. 3. 4. 1) Within operation temperature range, the module is 3GPP compliant, and emergency call can be dialed out with a maximum power and data rate. 2) Within extended temperature range, the module remains fully functional and retains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to normal operation temperature levels, the module will meet 3GPP specifications again. 3) Within eCall temperature range, the emergency call function must be functional until the module is broken. When the ambient temperature is between 75C and 90C and the module temperature has reached the threshold value, the module will trigger protective measures (such as reduce power, decrease throughput, unregister the device, etc.) to ensure the full function of emergency call.

* means under development. 2.3. Functional Diagram The following figure shows a block diagram of AG35 and illustrates the major functional parts. Power management Baseband DDR+NAND flash Radio frequency Peripheral interface AG35_Hardware_Design 21 / 129 Automotive Module Series AG35 Hardware Design Figure 1: Functional Diagram NOTE

* means under development. 2.4. Evaluation Board In order to help customers develop applications with AG35 conveniently, Quectel supplies the evaluation board (EVB), USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [3]. AG35_Hardware_Design 22 / 129 ANT_MAIN ANT_GNSS ANT_DIV PAM SAW Switch SAW Duplex LNA SAW DRx APT PA Tx PRx Transceiver NAND DDR2 SDRAM IQ Control Baseband PMIC Control 19.2M XO RTC Audio VBAT_RF VBAT_BB VDD_EXT SHDN_N PWRKEY RESET_N ADCs STATUS STATUS BT_EN*

NET_STATUS PM_ENABLE SPKS MICS PCM SGMII WLAN SDIOs USB (U)SIM I2CS UARTs HSIC*

Automotive Module Series AG35 Hardware Design 3 Application Interfaces 3.1. General Description

(U)SIM interface AG35 is equipped with 299-pin LGA pads that can be connected to cellular application platform. Sub-interfaces included in these pads are described in detail in the following sub-chapters:

Power supply USB interface UART interfaces Audio interface (optional) PCM and I2C interfaces SDIO interfaces SGMII interface (optional) Wireless connectivity interfaces ADC interfaces Status indication interfaces USB_BOOT interface HSIC interface*

NOTE

* means under development. AG35_Hardware_Design 23 / 129 Automotive Module Series AG35 Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of AG35 module. Figure 2: Pin Assignment (Top View) AG35_Hardware_Design 24 / 129 I V D _ T N A S S N G _ T N A D E V R E S E R D E V R E S E R I N A M _ T N A D E V R E S E R D E V R E S E R 9 2 1 7 2 1 5 2 1 3 2 1 1 2 1 9 1 1 7 1 1 5 1 1 3 1 1 1 1 1 9 0 1 7 0 1 5 0 1 3 0 1 1 0 1 9 9 7 9 5 9 3 9 1 9 9 8 8 9 2 8 2 1 6 2 1 4 2 1 2 2 1 0 2 1 8 1 1 6 1 1 4 1 1 2 1 1 0 1 1 8 0 1 6 0 1 4 0 1 2 0 1 0 0 1 8 9 6 9 4 9 2 9 0 9 4 1 2 3 1 2 2 1 2 1 1 2 0 1 2 9 0 2 8 0 2 7 0 2 6 0 2 5 0 2 4 0 2 3 0 2 2 0 2 1 0 2 0 0 2 9 9 1 8 9 1 7 9 1 6 9 1 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 GND SPK2_P SPK1_P MICBIAS MIC2_P MIC_P GND GND SPK2_N SPK1_N MIC2_N MIC1_N AGND SLEEP_IND RESERVED COEX_UART_TX COEX_UART_RX

/USB_BOOT GND NET_MODE WLAN_EN WAKEUP_IN W_DISABLE#

VBAT_BB GND GND RESERVED RESERVED UART2_TXD UART2_RXD GND STATUS ADC0 ADC1 MCLK GND VBAT_BB GND WLAN_WAKE RESERVED UART2_CTS UART2_RTS VDD_EXT NET_STATUS ADC2 GND SHDN_N 9 9 2 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 WLAN_SLP_CLK 287 288 289 290 291 292 293 294 295 7 7 1 8 7 1 9 7 1 0 8 1 1 8 1 2 8 1 3 8 1 4 8 1 5 8 1 6 8 1 7 8 1 8 8 1 9 8 1 0 9 1 1 9 1 2 9 1 3 9 1 4 9 1 5 9 1 2 4 6 8 0 1 2 1 4 1 6 1 8 1 0 2 2 2 4 2 6 2 8 2 0 3 2 3 4 3 6 3 8 3 0 4 296 1 3 5 7 9 1 1 3 1 5 1 7 1 9 1 1 2 3 2 5 2 7 2 9 2 1 3 3 3 5 3 7 3 9 3 1 4 D E V R E S E R D E V R E S E R A T A D M _ I I D E V R E S E R D N G P _ X R _ I I M G S P _ X T _ I I M G S D N G D N G I O D M _ D D V Y E K R W P N _ T S R _ Y H P E M G K S L C M _ I I M G S D N N G _ T N _ Y H P E I M _ X R _ I I M G S E L B A N E _ M P D E V R E S E R M _ X T _ I I M G S N _ T E S E R

N E _ T B D N G D N G D N G D M C _ 1 C D S D N G 0 A T A D _ 1 C D S D E V R E S E R E C N E S E R P _ M S U I D E V R E S E R K L C _ M S U I D E V R E S E R A T A D _ M S U I D N G _ M S U I D D V _ M S U I T S R _ M S U I D E V R E S E R

A T A D _ C S H I D E V R E S E R D E V R E S E R D E V R E S E R P D _ B S U D N G S U B V _ B S U D N G D N G D N G D N G D E V R E S E R M D _ B S U

E B O R T S _ C S H I D E V R E S E R D E V R E S E R IIC Pins SD Pins GPIO Pins PCM Pins RESVRVED Pins USB Pins Debug UART Pins Audio Pins D E V R E S E R K L C _ 1 C D S D E V R E S E R 1 A T A D _ 1 C D S 2 A T A D _ 1 C D S D N G 3 A T A D _ 1 C D S Signal Pins

(U)SIM Pins UART1 Pins SPI Pins GND Pins SDIO Pins UART2 Pins COEX_UART Pins SGMII Pins Power Pins MDIO Pins ADC Pins HSIC Pins VBAT_RF VBAT_RF GND GND RESERVED RESERVED GND I2C2_SCL DBG_RXD GND PCM_OUT PCM_IN GND VBAT_RF VBAT_RF GND GND RESERVED RESERVED GND I2C2_SDA DBG_TXD GND PCM_CLK PCM_SYNC GND UART1_DTR UART1_TXD UART1_RXD UART1_CTS GND SD_INS_DET SDC2_DATA1 SDC2_DATA3 UART1_RI UART1_DCD UART1_RTS GND SDC2_CLK SDC2_CMD SDC2_DATA0 SDC2_DATA2 GND I2C1_SCL VDD_SDIO GND I2C1_SDA 87 85 83 81 79 77 75 73 71 69 67 65 63 61 59 57 55 53 51 49 47 45 43 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50 48 46 44 42 7 9 2 Automotive Module Series AG35 Hardware Design 1. Pins 59, 65, 67, 144~147 and 149 cannot be pulled up before power-up. 2. PWRKEY (pin 2) output voltage is 0.8V because of the diode drop in the Qualcomm chipset. 3. GND pins 215~299 should be connected to ground in the design. 4. Keep all RESERVED pins and unused pins unconnected. 5.

* means under development. 3.3. Pin Description The following tables show the pin definition and description of AG35. Table 3: I/O Parameters Definition NOTES Type AI AO DI DO IO PI PO Description Analog input Analog output Digital input Digital output Bidirectional Power input Power output Table 4: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT_BB 155, 156 PI VBAT_RF 85, 86, 87, 88 PI Power supply for modules baseband part Power supply for modules RF part Vmax=4.3V Vmin=3.3V Vnorm=3.8V Vmax=4.3V Vmin=3.3V Vnorm=3.8V It must be able to provide sufficient current up to 0.8A. It must be able to provide sufficient current up to 1.8A in a AG35_Hardware_Design 25 / 129 Automotive Module Series AG35 Hardware Design VDD_EXT 168 PO Provide 1.8V for external circuit Vnorm=1.8V IOmax=50mA transmitting burst. Power supply for external GPIOs pull up circuits. GND Ground 10, 13, 16, 17, 30, 31, 35, 39, 44, 45, 54, 55, 63, 64, 69, 70, 75, 76, 81~84, 89~94, 96~100, 102~106, 108~112, 114, 116~118, 120~126, 128~131, 142, 148, 153, 154, 157, 158, 167, 174, 177, 178, 181, 184, 187, 191, 196~299 Turn on/off Pin Name Pin No. I/O Description DC Characteristics Comment PWRKEY 2 DI Turn on/off the module RESET_N 1 DI Reset the module SHDN_N 176 DI Emergency shutdown for the module Status Indication The output voltage is 0.8V because of the diode drop in the Qualcomm chipset. Internally pulled up to 1.8V. Active low. VIHmax=2.1V VIHmin=1.3V VILmax=0.5V VIHmax=2.1V VIHmin=1.3V VILmax=0.5V VIHmax=2.1V VIHmin=1.3V VILmax=0.5V AG35_Hardware_Design 26 / 129 Automotive Module Series AG35 Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment STATUS 171 OD NET_MODE 147 DO NET_ STATUS 170 DO USB Interface Indicate the modules operation status The drive current should be less than 0.15mA. Require external pull-up. If unused, keep it open. Indicate the modules network registration status Indicate the modules network activity status VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS 32 PI USB_DM 33 IO USB_DP 34 IO USB connection detection USB differential data bus (-) USB differential data bus (+) Vmax=5.25V Vmin=3.0V Vnorm=5.0V Compliant with USB 2.0 standard specification. Compliant with USB 2.0 standard specification. Maximum Current:

1mA Require differential impedance of 90. Require differential impedance of 90. HSIC Interface*

HSIC_ STROBE*

194 HSIC_DATA*

195

(U)SIM Interface Pin Name Pin No. I/O Description DC Characteristics Comment IO IO High speed inter chip interface -

strobe High speed inter chip interface - data VILmax=0.4V VIHmin=0.8V VOLmax=0.3V VOHmin=0.9V 1.2V power domain. If unused, keep them open. Pin Name Pin No. I/O Description DC Characteristics Comment USIM_GND 24 Specified ground for

(U)SIM card USIM_ PRESENCE 25 DI

(U)SIM card insertion detection VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Connect to ground of

(U)SIM card connector. 1.8V power domain. If unused, keep it open. AG35_Hardware_Design 27 / 129 Automotive Module Series AG35 Hardware Design USIM_VDD 26 PO Power supply for

(U)SIM card Either 1.8V or 3V is supported by the module automatically. For 1.8V (U)SIM:

Vmax=1.9V Vmin=1.7V For 3.0V (U)SIM:

Vmax=3.05V Vmin=2.7V IOmax=50mA For 1.8V USIM:

VOLmax=0.45V VOHmin=1.35V For 3.0V USIM:

VOLmax=0.45V VOHmin=2.55V For 1.8V USIM:

VOLmax=0.45V VOHmin=1.35V For 3.0V USIM:

VOLmax=0.45V VOHmin=2.55V USIM_CLK 27 DO Clock signal of

(U)SIM card USIM_RST 28 DO Reset signal of

(U)SIM card USIM_DATA 29 IO Data signal of

(U)SIM card Main UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment UART1_CTS 56 DO DTE clear to send UART1_RTS 57 DI DTE request to send VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. AG35_Hardware_Design 28 / 129 For 1.8V USIM:

VILmax=0.6V VIHmin=1.2V VOLmax=0.45V VOHmin=1.35V For 3.0V USIM:

VILmax=1.0V VIHmin=1.95V VOLmax=0.45V VOHmin=2.55V Automotive Module Series AG35 Hardware Design UART1_RXD 58 DI Receive data UART1_DCD 59 DO Data carrier detection VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. Pulled up by default. Low level wakes up the module. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. UART1_TXD 60 DO Transmit data UART1_RI 61 DO Ring indicator UART1_DTR 62 DI Data terminal ready. Sleep mode control UART2 Interface (for BT Function*) UART2_TXD 163 DO Transmit data UART2_CTS 164 DO DTE clear to send UART2_RXD 165 DI Receive data UART2_RTS 166 DI DTE request to send Debug UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment DBG_TXD 71 DO Transmit data DBG_RXD 72 DI Receive data VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it AG35_Hardware_Design 29 / 129 ADC Interfaces ADC2 172 ADC0 173 ADC1 175 SPK2_P 132 SPK2_N 133 SPK1_P 134 SPK1_N 135 MIC2_N 137 MIC2_P 138 MIC1_N 139 MIC1_P 140 PCM Interface Automotive Module Series AG35 Hardware Design VIHmin=1.2V VIHmax=2.0V open. Pin Name Pin No. I/O Description DC Characteristics Comment AI AI AI General purpose analog to digital converter interface General purpose analog to digital converter interface General purpose analog to digital converter interface Voltage Range:

0.1V to 1.7V If unused, keep it open. Voltage Range:

0.3V to VBAT_BB If unused, keep it open. Voltage Range:

0.3V to VBAT_BB If unused, keep it open. Audio Interface (Optional) Pin Name Pin No. I/O Description DC Characteristics Comment MICBIAS 136 AO Vmax=1.55V Vmin=1.5V Vnorm=1.525V AO AO AO AO Earphone analog output 2 (+) Earphone analog output 2 (-) Earphone analog output 1 (+) Earphone analog output 1 (-) Bias voltage output for microphone Microphone analog input 2 (-) Microphone analog input 2 (+) Microphone analog input 1 (-) Microphone analog input 1 (+) AI AI AI AI If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. If unused, keep it open. AGND 141 Analog ground Pin Name Pin No. I/O Description DC Characteristics Comment AG35_Hardware_Design 30 / 129 Automotive Module Series AG35 Hardware Design PCM_SYNC 65 IO PCM data frame synchronization signal PCM_IN 66 DI PCM data input PCM_CLK 67 IO PCM clock PCM_OUT 68 DO PCM data output MCLK 152 DO Output 12.288MHZ I2C1 Interface (for Codec Configuration by Default) I2C1_SDA 42 IO I2C1_SCL 43 DO I2C2 Interface I2C1 serial data. Used for external codec. I2C1 serial clock. Used for external codec. VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V 1.8V power domain. In master mode, it is an output signal. In slave mode, it is an input signal. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. In master mode, it is an output signal. In slave mode, it is an input signal. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. External pull-up resistor is required. 1.8V only. If unused, keep it open. External pull-up resistor is required. 1.8V only. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment Pin Name Pin No. I/O Description DC Characteristics Comment I2C2_SDA 73 IO I2C2 serial data VOLmax=0.45V VOHmin=1.35V External pull-up resistor is required. AG35_Hardware_Design 31 / 129 Automotive Module Series AG35 Hardware Design I2C2_SCL 74 DO I2C2 serial data SDIO2 Interface (for SD Card) Pin Name Pin No. I/O Description DC Characteristics Comment VDD_SDIO 46 PO SDIO pull up power source for SD card IOmax=50mA VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V 1.8V only. If unused, keep it open. External pull-up resistor is required. 1.8V only. If unused, keep it open. 1.8V/2.85V configurable power output. If unused, keep it open. SDIO signal level can be selected according to the one supported by SD card. Please refer to SD 3.0 protocol for more details. If unused, keep it open. 1.8V power domain. If unused, keep it open. For 1.8V signaling:

VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V For 3.0V signaling:

VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V For 1.8V Signaling:

VOLmax=0.45V VOHmin=1.4V For 3.0V Signaling:

VOLmax=0.38V SDIO signal level can be selected according to the one supported by SD card. Please refer to SD 3.0 protocol for more SDC2_ DATA2 SDC2_ DATA3 SDC2_ DATA0 SDC2_ DATA1 47 48 49 50 IO IO IO IO SDIO data signal

(bit 2) SDIO data signal

(bit 3) SDIO data signal

(bit 0) SDIO data signal

(bit 1) SDC2_CMD 51 IO SDIO command signal SD_INS_ DET 52 DI Insertion detection for SD card SDC2_CLK 53 DO SDIO bus clock AG35_Hardware_Design 32 / 129 Automotive Module Series AG35 Hardware Design VOHmin=2.01V MDIO Interface Pin Name Pin No. I/O Description DC Characteristics Comment details. If unused, keep it open. 1.8V/2.85V configurable power output. If unused, keep it open. 1.8V/2.85V power domain. If unused, keep it open. 1.8V/2.85V power domain. If unused, keep it open. 1.8V/2.85V power domain. External 1.5K resistor pulled up to VDD_MDIO is required. If unused, keep it open. 1.8V power domain. If unused, keep it open. VDD_MDIO 4 PO SGMII_MDATA pull-up power source EPHY_RST_N 6 DO Ethernet PHY reset SGMII_MCLK 7 DO SGMII MDIO

(Management Data Input/Output) clock SGMII_ MDATA 8 IO SGMII MDIO

(Management Data Input/Output) data EPHY_INT_N 9 DI Ethernet PHY interrupt SGMII Interface 1.8V VOLmax=0.45V VOHmin=1.35V 2.85V VOLmax=0.35V VOHmin=2.14V 1.8V VOLmax=0.45V VOHmin=1.35V 2.85V VOLmax=0.35V VOHmin=2.14V 1.8V VILmax=0.58V VIHmin=1.27V VOLmax=0.45V VOHmin=1.4V 2.85V VILmax=1.0V VIHmin=1.95V VOLmax=0.45V VOHmin=2.55V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Pin Name Pin No. I/O Description DC Characteristics Comment SGMII_RX_M 11 AI SGMII receiving (-) SGMII_RX_P 12 AI SGMII receiving (+) If unused, keep it open. If unused, keep it AG35_Hardware_Design 33 / 129 Automotive Module Series AG35 Hardware Design SGMII_TX_P 14 AO SGMII_TX_M 15 AO SGMII transmission

(+) SGMII transmission

(-) WLAN Interface (SDIO1 and WLAN Control Interfaces) Pin Name Pin No. I/O Description DC Characteristics Comment SDC1_CMD 18 IO WLAN SDIO command signal VOLmax=0.45V VOHmin=1.35V SDC1_CLK 19 DO WLAN SDIO clock signal VOLmax=0.45V VOHmin=1.35V SDC1_DATA0 20 IO WLAN SDIO data bus (bit 0) SDC1_DATA1 21 IO WLAN SDIO data bus (bit 1) SDC1_DATA2 22 IO WLAN SDIO data bus (bit 2) SDC1_DATA3 23 IO WLAN SDIO data bus (bit 3) VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V PM_ENABLE 5 DO External power enable control VOLmax=0.45V VOHmin=1.35V open. If unused, keep it open. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. AG35_Hardware_Design 34 / 129 Automotive Module Series AG35 Hardware Design WLAN_EN 149 DO WLAN function enable control via Wi-Fi module WLAN_ WAKE 160 DI Wake up the module via WLAN WLAN_ SLP_CLK 169 DO WLAN sleep clock COEX_UART_ RX/USB_BOOT 146 DI LTE/WLAN&BT coexistence signal./

Force the module to enter into emergency download mode. VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V COEX_ UART_TX RF Interfaces 145 DO LTE/WLAN&BT coexistence signal VOLmax=0.45V VOHmin=1.35V If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. 1.8V power domain. If unused, keep it open. If unused, keep it open. 50 impedance. 50 impedance. If unused, keep it open. 50 impedance. If unused, keep it open. ANT_MAIN 107 IO ANT_GNSS 119 AI ANT_DIV 127 AI Other Interfaces Main antenna interface GNSS antenna interface Receive diversity antenna interface BT_EN*

3 DO Bluetooth enable control SLEEP_IND 144 DO Sleep indication WAKEUP_IN 150 DI Sleep mode control VOLmax=0.45V VOHmin=1.35V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. Pulled up by default. Low level wakes up the module. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment AG35_Hardware_Design 35 / 129 Automotive Module Series AG35 Hardware Design W_DISABLE#

151 DI Airplane mode control VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. Pulled up by default. In low voltage level, module can enter into airplane mode. If unused, keep it open. RESERVED Pins Pin Name Pin No. I/O Description DC Characteristics Comment 36~38, 40, 41, 95, 101, 113, 115, 77~80, 143, 159 161, 162, 179, 180, 182, 183, 185, 186, 188~190, 192~193 RESERVED Reserved Keep these pins unconnected. NOTES 1. * means under development. 2. Keep all RESERVED pins and unused pins unconnected. 3.4. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Details Normal Operation Idle Talk/Data Software is active. The module has registered on the network, and it is ready to send and receive data. Network connection is ongoing. In this mode, the power consumption is decided by network setting and data transfer rate. Minimum Functionality AT+CFUN=0 can set the module to a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. AG35_Hardware_Design 36 / 129 Automotive Module Series AG35 Hardware Design AT+CFUN=4 or W_DISABLE# pin can set the module to airplane mode. In this case, RF function will be invalid. In this mode, the current consumption of the module will be reduced to the minimal level. During this mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally. In this mode, the power management unit shuts down the power supply. Software is not active. The serial interfaces are not accessible. Operating voltage (connected to VBAT_RF and VBAT_BB) remains applied. Mode Airplane Mode Sleep Mode Power down Mode 3.5. Power Saving 3.5.1. Sleep Mode AG35 is able to reduce its current consumption to a minimum value during the sleep mode. This chapter mainly introduces some ways to enter into or exit from sleep mode. The diagram below illustrates the current consumption of AG35 during sleep mode. Figure 3: Sleep Mode Current Consumption Diagram NOTE DRX cycle index values are broadcasted by the wireless network. AG35_Hardware_Design 37 / 129 t n e r r u C DRX OFF ON OFF ON OFF ON OFF ON OFF Run Time Automotive Module Series AG35 Hardware Design 3.5.1.1. UART Application If the host communicates with module via UART interface, the following preconditions can let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Drive DTR to high level. The following figure shows the connection between the module and the host. Figure 4: Sleep Mode Application via UART Driving the host DTR to low level will wake up the module. When AG35 has URC to report, RI signal will wake up the host. Please refer to Chapter 3.20 for details about RI behavior. 3.5.1.2. USB Application with USB Remote Wakeup Function If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions must be met to let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held in high level or keep it open. The hosts USB bus, which is connected with the modules USB interface, enters into suspended state. The following figure shows the connection between the module and the host. AG35_Hardware_Design 38 / 129 Module Host RXD TXD RI DTR GND TXD RXD EINT GPIO GND Automotive Module Series AG35 Hardware Design Figure 5: Sleep Mode Application with USB Remote Wakeup Sending data to AG35 through USB will wake up the module. When AG35 has URC to report, the module will send remote wake-up signals via USB bus so as to wake up the host. 3.5.1.3. USB Application with USB Suspend/Resume and RI Functions If the host supports USB suspend/resume, but does not support remote wake-up function, the RI signal is needed to wake up the host. There are three preconditions to let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held in high level or keep it open. The hosts USB bus, which is connected with the modules USB interface, enters into suspended state. The following figure shows the connection between the module and the host. Figure 6: Sleep Mode Application with RI AG35_Hardware_Design 39 / 129 Module USB_VBUS USB_DP USB_DM GND Host VDD USB_DP USB_DM GND Module USB_VBUS USB_DP USB_DM RI GND Host VDD USB_DP USB_DM EINT GND Automotive Module Series AG35 Hardware Design Sending data to AG35 through USB will wake up the module. When AG35 has URC to report, RI signal will wake up the host. 3.5.1.4. USB Application without USB Suspend Function If the host does not support USB suspend function, USB_VBUS should be disconnected via an external control circuit to let the module enter into sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held in high level or keep it open. Disconnect USB_VBUS. The following figure shows the connection between the module and the host. Figure 7: Sleep Mode Application without Suspend Function Switching on the power switch to supply power to USB_VBUS will wake up the module. Please pay attention to the level match shown in dotted line between the module and the host. Refer to document [1] for more details about the modules power management application. NOTE 3.5.2. Airplane Mode When the module enters into airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible. This mode can be set via the following ways. Hardware:

The W_DISABLE# pin is pulled up by default. Driving it to low level will let the module enter into airplane mode. AG35_Hardware_Design 40 / 129 Power Switch Module USB_VBUS USB_DP USB_DM RI GND Host GPIO VDD USB_DP USB_DM EINT GND Automotive Module Series AG35 Hardware Design Software:

NOTES AT+CFUN command provides choices of the functionality level, through setting <fun> into 0, 1, or 4. AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode. RF function is disabled. 1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by AT+QCFG=airplanecontrol command. Please refer to document [2] for more details. 2. The execution of AT+CFUN command will not affect GNSS function. 3.6. Power Supply 3.6.1. Power Supply Pins AG35 provides six VBAT pins for connection with the external power supply. There are two separate voltage domains for VBAT. Four VBAT_RF pins for modules RF part Two VBAT_BB pins for modules baseband part The following table shows the details of VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 85, 86, 87, 88 VBAT_BB 155, 156 Power supply for modules RF part Power supply for modules baseband part 3.3 3.8 4.3 3.3 3.8 4.3 V V GND Ground

0

V 10, 13, 16, 17, 30, 31, 35, 39, 44, 45, 54, 55, 63, 64, 69, 70, 75, 76, 81~84, 89~94, 96~100, 102~106, 108~112, 114, 116~118, 120~126, 128~131, 142, 148, 153, 154, AG35_Hardware_Design 41 / 129 Automotive Module Series AG35 Hardware Design 157, 158, 167, 174, 177, 178, 181, 184, 187, 191, 196~299 3.6.2. Decrease Voltage Drop The power supply range of the module is from 3.3V to 4.3V. Please make sure the input voltage will never drop below 3.3V. The following figure shows the voltage drop during burst transmission in 2G network. The voltage drop will be less in 3G and 4G networks. Figure 8: Power Supply Limits during Burst Transmission To decrease voltage drop, a bypass capacitor of about 100F with low ESR should be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR. It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT pins. The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 1mm, and the width of VBAT_RF trace should be no less than 2mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to get a stable power source, it is suggested to use a power TVS ( e.g. WS4.5DPF-B, VRWM=4.5V, Ppp=450W) and a zener diode with dissipation power more than 0.5W, and place them as close to the VBAT pins as possible. The following figure shows the star structure of the power supply. Figure 9: Star Structure of the Power Supply AG35_Hardware_Design 42 / 129 Burst Transmission Burst Transmission VBAT Min.3.3V Drop Ripple VBAT D1 D2 C1

C2 C3 C4 100uF 100nF 33pF 10pF C6

C6 C7 C8 100uF 100nF 33pF 10pF Module VBAT_RF VBAT_BB Automotive Module Series AG35 Hardware Design 3.6.3. Reference Design for Power Supply Power design for the module is very important, as the performance of the module largely depends on the power source. The power supply of AG35 should be able to provide sufficient current up to 2A at least. If the voltage drop between the input and output is not too high, it is recommended to use an LDO to supply power for the module. If there is a big voltage difference between the input source and the desired output

(VBAT), a buck converter is preferred to be used as the power supply. The following figure shows a reference design for +12V/+24V input power source. The designed output for the power supply is about 3.8V and the maximum rated current is 5A. Figure 10: Reference Circuit of Power Supply 3.6.4. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.7. Turn on and off Scenarios 3.7.1. Turn on Module Using the PWRKEY The following table shows the pin definition of PWRKEY. AG35_Hardware_Design 43 / 129 DC_IN 100uH B560C 47uF 47uF 47uF 0.1uF 1 2 3 4 BOOT IN EN RT/CLK TPS54560-Q1 D P R W P 9 SW GND COMP FB 8 7 6 5 7.2uH VBAT FB 16.9K 1%

47pF FB 47nF 75K 1%

20K 1%

51K 100nF 470uF VBAT_EN 4.7K 243K 47K Automotive Module Series AG35 Hardware Design Table 7: PWRKEY Pin Description Pin Name Pin No. Description DC Characteristics Comment PWRKEY 2 Turn on/off the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The output voltage is 0.8V because of the diode drop in the Qualcomm chipset. When AG35 is in power down mode, it can be turned on by driving the PWRKEY pin to a low level for at least 500ms. It is recommended to use an open drain/collector driver to control the PWRKEY. After STATUS pin (require external pull-up) outputting a low level, PWRKEY pin can be released. A simple reference circuit is illustrated in the following figure. Figure 11: Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. Figure 12: Turn on the Module Using Keystroke AG35_Hardware_Design 44 / 129 PWRKEY 500ms Turn on pulse 4.7K 47K S1 PWRKEY TVS Close to S1 Automotive Module Series AG35 Hardware Design The turn on scenario is illustrated in the following figure. Figure 13: Timing of Turning on Module NOTE Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms. 3.7.2. Turn off Module Either of the following methods can be used to turn off the module:

Normal power down procedure: Turn off the module using the PWRKEY pin. Normal power down procedure: Turn off the module using AT+QPOWD command. 3.7.2.1. Turn off Module Using the PWRKEY Pin Driving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-down procedure after PWRKEY is released. The power-down scenario is illustrated in the following figure. AG35_Hardware_Design 45 / 129 NOTE VBAT 500ms VIH1.3V PWRKEY VIL0.5V UART Inactive RESET_N STATUS

(OD) USB VDD_EXT 2.5s 12s 13s Inactive About 100ms Active Active Automotive Module Series AG35 Hardware Design Figure 14: Timing of Turning off Module NOTES 1. 3.7.2.2. Turn off Module Using AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module via PWRKEY Pin. Please refer to document [2] for details about the AT+QPOWD command. In order to avoid damaging the internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, the power supply can be cut off. 2. When turn off module with AT command, please keep PWRKEY at high level after the execution of power-off command. Otherwise the module will be turned on again after successfully turn-off. 3.7.2.3. Turn off Module Using SHDN_N The following table shows the pin definition of SHDN_N. Table 8: Pin Definition of SHDN_N Pin Name Pin No. Description DC Characteristics Comment SHDN_N 176 Emergency shutdown VIHmax=2.1V AG35_Hardware_Design 46 / 129 VBAT PWRKEY STATUS

(OD) Module Status VDD_EXT 650ms 29.5s RUNNING Power-down procedure OFF Automotive Module Series AG35 Hardware Design for the module VIHmin=1.3V VILmax=0.5V Driving the SHDN_N pin to a low level voltage and then releasing it will make the module shut down unconditionally. The shut-down scenario is illustrated in the following figure. Figure 15: Shut Down the Module Using Driving Circuit Figure 16: Timing of Turning off Module via SHDN_N NOTES 1. Pulling down SHDN_N for module shutdown is an emergency option when there are failures in turning off the module by PWRKEY or AT command. And it is recommended to use an external OD circuit to control the SHDN_N pin. 2. Never pull up SHDN_N pin. AG35_Hardware_Design 47 / 129 SHDN_N R1 N MOS Shut down pulse R2 VBA T SHDN_N STATUS

(OD) Module Status

200ms TBD RUNNING OFF Automotive Module Series AG35 Hardware Design 3.8. Reset the Module The RESET_N can be used to reset the module. The module can be reset by driving the RESET_N to a low level voltage for 150~460ms. As the RESET_N pin is sensitive to interference, the routing trace on the interface board of the module is recommended to be as short as possible and totally ground shielded. Table 9: RESET_N Pin Description Pin Name Pin No. Description DC Characteristics Comment RESET_N 1 Reset the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to 1.8V internally. Active low. The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N. Figure 17: Reference Circuit of RESET_N by Using Driving Circuit Figure 18: Reference Circuit of RESET_N by Using Button AG35_Hardware_Design 48 / 129 RESET_N 150ms~460ms Reset pulse 4.7K 47K S2 RESET_N TVS Close to S2 Automotive Module Series AG35 Hardware Design The reset scenario is illustrated in the following figure. Figure 19: Timing of Resetting Module NOTES failed. 1. Use RESET_N only when turning off the module by AT+QPOWD command and PWRKEY pin both 2. Please assure that there is no large capacitance on PWRKEY and RESET_N pins. 3.9. (U)SIM Interface The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards are supported. Table 10: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment USIM_VDD 26 PO Power supply for (U)SIM card Either 1.8V or 3.0V is supported by the module automatically. USIM_DATA 29 IO Data signal of (U)SIM card USIM_CLK 27 DO Clock signal of (U)SIM card USIM_RST 28 DO Reset signal of (U)SIM card USIM_ PRESENCE 25 DI

(U)SIM card insertion detection USIM_GND 24 Specified ground for (U)SIM card AG35_Hardware_Design 49 / 129 VBAT RESET_N Module Status 150ms 460ms VIL 0.5V VIH 1.3V Running Resetting Restart Automotive Module Series AG35 Hardware Design AG35 supports (U)SIM card hot-plug via the USIM_PRESENCE pin. The function supports low level and high level detections, and is disabled by default. Please refer to document [2] about AT+QSIMDET command for details. The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM card connector. Figure 20: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. A reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. Figure 21: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in customers applications, please follow the criteria below in the (U)SIM circuit design:

AG35_Hardware_Design 50 / 129 VDD_EXT USIM_VDD 51K 15K Module USIM_GND USIM_VDD USIM_RST USIM_CLK USIM_PRESENCE USIM_DATA 0R 0R 0R 100nF

(U)SIM Card Connector VCC RST CLK GND VPP IO 33pF 33pF 33pF GND GND GND USIM_VDD USIM_GND USIM_VDD USIM_RST USIM_CLK USIM_DATA 15K 0R 0R 0R Module 100nF

(U)SIM Card Connector VCC RST CLK GND VPP IO 33pF 33pF 33pF GND GND Automotive Module Series AG35 Hardware Design Keep the placement of (U)SIM card connector as close as possible to the module. Keep the trace length as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic capacitance not exceeding 10pF. The 0 resistors should be added in series between the module and the (U)SIM card connector so as to suppress EMI spurious transmission and enhance ESD protection. The 33pFcapacitors are used for filtering interference of EGSM900. Please note that the

(U)SIM peripheral circuit should be close to the (U)SIM card connector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasions are applied, and should be placed close to the (U)SIM card connector. NOTE The load capacitance of (U)SIM interface will affect rise and fall time of data exchange. 3.10. USB Interface AG35 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports high-speed (480Mbps) and full-speed (12Mbps) modes. The USB interface is used for AT command communication, data transmission, GNSS NMEA sentences output, software debugging, firmware upgrade and voice over USB*. The following table shows the pin definition of USB interface. Table 11: Pin Definition of USB Interface Pin Name Pin No. I/O Description Comment USB_VBUS 32 USB connection detection Typical 5.0V Maximum current: 1mA USB_DM USB_DP GND 33 34 30 USB differential data bus (-) USB differential data bus (+) Require differential impedance of 90 Ground For more details about USB 2.0 specifications, please visit http://www.usb.org/home. PI IO IO AG35_Hardware_Design 51 / 129 Automotive Module Series AG35 Hardware Design The USB interface is recommended to be reserved for firmware upgrade in application design. The following figure shows a reference circuit of USB interface. Figure 22: Reference Circuit of USB Application In order to ensure signal integrity of USB data lines, components R1, R2 and L1 must be placed close to the module, and also these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles should be complied with when design the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90. Do not route signal traces under crystals, oscillators, magnetic devices or RF signal traces. It is important to route the USB differential traces in inner-layer with ground shielding on not only upper and lower layers but also right and left sides. Pay attention to the influence of junction capacitance of ESD protection components on USB data lines. Typically, the capacitance value should be less than 2pF. Keep the ESD protection components as close to the USB connector as possible. NOTES 1. AG35 can be used as a slave device only. 2. * means under development. AG35_Hardware_Design 52 / 129 Minimize these stubs Test Points Module VDD NM_0R NM_0R R1 R2 L1 Close to Module ESD Array USB_VBUS USB_DM USB_DP GND MCU USB_DM USB_DP GND Automotive Module Series AG35 Hardware Design 3.11. UART Interfaces The module provides three UART interfaces: main UART interface, UART2 interface and debug UART interface. The following are the features of these UART interfaces. The main UART interface supports 9600bps, 19200bps, 38400bps, 57600bps, 115200bps, 230400bps, 460800bps and 921600bps baud rates, and the default is 115200bps. The interface is used for data transmission and AT command communication. The UART2 interface supports 9600bps, 19200bps, 38400bps, 57600bps, 115200bps, 230400bps, 460800bps and 921600bps baud rates, and the default is 115200bps. The interface is designed for BT function*. The debug UART interface supports 115200bps baud rate. It is used for Linux console and log output. The following tables show the pin definition of the three UART interfaces. Table 12: Pin Definition of Main UART Interface Pin Name Pin No. I/O Description Comment UART1_RI 61 Ring indicator 1.8V power domain UART1_DCD 59 Data carrier detection 1.8V power domain UART1_CTS 56 Clear to send 1.8V power domain UART1_RTS 57 Request to send 1.8V power domain UART1_DTR 62 Sleep mode control 1.8V power domain UART1_TXD 60 Transmit data 1.8V power domain UART1_RXD 58 Receive data 1.8V power domain Table 13: Pin Definition of UART2 Interface (for BT Function*) Pin Name Pin No. I/O Description Comment UART2_TXD 163 Transmit data 1.8V power domain UART2_CTS 164 Clear to send 1.8V power domain UART2_RXD 165 Receive data 1.8V power domain DO DO DO DI DI DO DI DO DO DI AG35_Hardware_Design 53 / 129 Automotive Module Series AG35 Hardware Design UART2_RTS 166 DI Request to send 1.8V power domain Table 14: Pin Definition of Debug UART Interface Pin Name Pin No. I/O Description Comment DBG_TXD DBG_RXD 71 72 DO DI Transmit data 1.8V power domain Receive data 1.8V power domain The logic levels are described in the following table. Table 15: Logic Levels of Digital I/O Parameter VIL VIH VOL VOH Min.

-0.3 1.2 0 1.35 Max. 0.6 2.0 0.45 1.8 Unit V V V V The module provides 1.8V UART interfaces. A level translator should be used if customers application is equipped with a 3.3V UART interface. A level translator TXS0108E-Q1 provided by Texas Instruments is recommended. The following figure shows a reference design. Figure 23: Reference Circuit with Translator Chip AG35_Hardware_Design 54 / 129 VDD_1V8 VCCA 0.1uF 0.1uF VDD_MCU Translator VCCB GND B1 B2 B3 B4 B5 B6 B7 B8 OE A1 A2 A3 A4 A5 A6 A7 A8 51K 51K RI DCD CTS RTS DTR TXD RXD RI_MCU DCD_MCU CTS_MCU RTS_MCU DTR_MCU TXD_MCU RXD_MCU Automotive Module Series AG35 Hardware Design Please visit http://www.ti.com for more information. Another example with transistor translation circuit is shown as below. The circuit design of dotted line section can refer to the design of solid line section, in terms of both module input and output circuit designs. But please pay attention to the direction of connection. Figure 24: Reference Circuit with Transistor Circuit NOTES 4. 1. The above is a reference circuit of UART1 interface, which is similar to that of other UART interfaces. 2. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 3. When the module enters into sleep mode, it is recommended to switch off the power supply for VDD_1V8 so as to reduce power consumption.

* means under development. 3.12. Audio Interface (Optional) AG35 is designed with an optional built-in audio codec to enable analog audio function. The following table shows the pin definition of analog audio interface. Table 16: Pin Definition of Analog Audio Interface Pin Name Pin No. I/O Description Comment SPK2_P 132 AO Earphone analog output 2 (+) AG35_Hardware_Design 55 / 129 Module UART1_RXD UART1_TXD UART1_RTS UART1_CTS UART1_DTR UART1_RI UART1_DCD GND VDD_1V8 VDD_1V8 4.7K 1nF 10K MCU/ARM VDD_1V8 1nF 10K 4.7K VCC_MCU

/TXD

/RXD

/RTS

/CTS GPIO EINT GPIO GND Automotive Module Series AG35 Hardware Design SPK2_N 133 AO Earphone analog output 2 (-) SPK1_P 134 AO Earphone analog output 1 (+) SPK1_N 135 AO Earphone analog output 1 (-) MICBIAS 136 AO Bias voltage output for microphone MIC2_N 137 Microphone analog input 2 (-) MIC2_P 138 Microphone analog input 2 (+) MIC1_N 139 Microphone analog input 1 (-) MIC1_P 140 Microphone analog input 1 (+) AGND 141 Analog ground AI AI AI AI MIC1_P/N Full-Scale Input Noise SPK1_P/N THD+N NOTES Table 17: Audio Interface Characteristics Parameter Condition Min Typ. Max Unit 1.0 Vp-p

-80 dB AVLINE =0dB f =1kHz AVLINE =0dB f =1kHz Differential mode RL=32 f =1kHz Output Gain=0dB f =1kHz 0.28%

Max power output 462.5 mV 1. The built-in codec uses the same signals as the modules PCM interface (pins 65~68) for external digital audio design. Therefore, when the built-in codec is utilized, the PCM interface cannot be used for other purposes (that is, keep pins 65~68 unconnected or set the interface to high impedance state). 2. The built-in audio codec (analog audio function) is optional. 3. MOS 3.8. AG35_Hardware_Design 56 / 129 Automotive Module Series AG35 Hardware Design 3.13. PCM and I2C Interfaces AG35 provides one Pulse Code Modulation (PCM) digital interface for audio design. The interface supports the following modes:

Primary mode (short frame synchronization, works as both master and slave) Auxiliary mode (long frame synchronization, works as master only) In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHz PCM_CLK at 16kHz PCM_SYNC. In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates with a 256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC. AG35 supports 16-bit linear data format. The following figures show the primary modes timing relationship with 8kHz PCM_SYNC and 2048kHz PCM_CLK, as well as the auxiliary modes timing relationship with 8kHz PCM_SYNC and 256kHz PCM_CLK. Figure 25: Primary Mode Timing AG35_Hardware_Design 57 / 129 125us PCM_CLK 1 2 255 256 PCM_SYNC PCM_OUT PCM_IN MSB LSB MSB MSB LSB MSB Automotive Module Series AG35 Hardware Design Figure 26: Auxiliary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design. Table 18: Pin Definition of PCM Interface Pin Name Pin No. I/O Description Comment PCM_IN DI PCM data input 1.8V power domain 66 68 IO IO PCM_OUT DO PCM data output 1.8V power domain PCM_SYNC 65 PCM data frame sync signal 1.8V power domain PCM_CLK 67 PCM data bit clock 1.8V power domain MCLK 152 DO Output 12.288MHZ 1.8V power domain Table 19: Pin Definition of I2C Interfaces Pin Name Pin No. I/O Description Comment I2C1_SDA I2C1_SCL I2C2_SDA 42 43 73 IO DO IO I2C1 serial data Require external pull-up to 1.8V I2C1 serial clock Require external pull-up to 1.8V I2C2 serial data Require external pull-up to 1.8V AG35_Hardware_Design 58 / 129 125us PCM_CLK 1 2 31 32 PCM_SYNC PCM_OUT PCM_IN MSB MSB LSB LSB Automotive Module Series AG35 Hardware Design I2C2_SCL 74 DO I2C2 serial clock Require external pull-up to 1.8V NOTES configuration driver. 1. By default, I2C1 is used for codec configuration while I2C2 is not available with any codec 2. When the built-in codec is used, its 8-bit address is 0x31 when reading and 0x30 when writing. In order to avoid conflicts, please avoid using I2C1 peripherals with the same addresses. 3. When the built-in codec is used, pin 152 and pins 65~68 will not be used. Clock and mode can be configured by AT command, and the default configuration is master mode using short frame synchronization format with 2048kHz PCM_CLK and 8kHz PCM_SYNC. Please refer to document [2] about AT+QDAI command for details. The following figure shows a reference design of PCM interface with external codec IC. Figure 27: Reference Circuit of PCM Application with Audio Codec 1. It is recommended to reserve an RC (R=22, C=22pF) circuit on the PCM lines, especially for 2. AG35 works as a master device pertaining to I2C interface. PCM_CLK. NOTES AG35_Hardware_Design 59 / 129 PCM_CLK PCM_SYNC PCM_OUT PCM_IN I2C_SCL I2C_SDA S A B I MICBIAS INP INN LOUTP LOUTN BCLK LRCK DAC ADC SCL SDA Module K 2 2

. K 2 2

. 1.8V Codec Automotive Module Series AG35 Hardware Design 3.14. SDIO Interfaces AG35 provides two SDIO interfaces which support SD 3.0 protocol. 3.14.1. SDIO1 Interface SDIO1 interface is used for WLAN function. More details are provided in Chapter 3.16. Pin Name Pin No. I/O Description Comment 3.14.2. SDIO2 Interface SDIO2 interface supports SD card. The following tables show the pin definition of SDIO2 interface. Table 20: Pin Definition of SDIO2 Interface SDC2_DATA3 48 SDIO data signal (bit 3) SDC2_DATA2 47 SDIO data signal (bit 2) SDC2_DATA1 50 SDIO data signal (bit 1) SDC2_DATA0 49 SDIO data signal (bit 0) IO IO IO IO SDC2_CLK 53 DO SDIO bus clock SDC2_CMD 51 IO SDIO command signal VDD_SDIO 46 PO SDIO pull up power source SD_INS_DET 52 DI Insertion detection for SD card The following figure shows a reference design of SD card interface. SDIO signal level can be selected according to the one supported by SD card. Please refer to SD 3.0 protocol for more details. 1.8V/2.85V configurable output. Cannot be used for SD card power supply. AG35_Hardware_Design 60 / 129 Automotive Module Series AG35 Hardware Design Figure 28: Reference Circuit of SD Card Application Please follow the principles below in the SD card circuit design:

The voltage range of SD card power supply VDD_3V is 2.7~3.6V and a sufficient current up to 0.8A should be provided. As the maximum output current of VDD_SDIO is 50mA which can only be used for SDIO pull-up resistors, an externally power supply is needed for SD card. To avoid jitter of bus, resistors R7~R11 are needed to pull up the SDIO to VDD_SDIO. Value of these resistors is among 10~100kohm and the recommended value is 100kohm. In order to improve signal quality, it is recommended to add 0 resistors R1~R6 in series between the module and the SD card. The bypass capacitors C1~C6 are reserved and not mounted by default. All resistors and bypass capacitors should be placed close to the module. In order to offer good ESD protection, it is recommended to add TVS with capacitance value less than 2pF on SD card pins. It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data trace is 50 (10%). Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals, etc., as well as noisy signals such as clock signals, DCDC signals, etc. It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm and the total routing length less than 50mm. The total trace length inside the module is 23mm, so the exterior total trace length should be less than 27mm. Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of SDIO bus should be less than 40pF. AG35_Hardware_Design 61 / 129 Module VDD_SDIO SDC2_DATA3 SDC2_DATA2 SDC2_DATA1 SDC2_DATA0 SDC2_CLK SDC2_CMD SD_INS_DET R1 0R R2 0R R3 0R R4 0R R5 0R R6 0R VDD_EXT VDD_3V SD Card Connector R7 NM R8 NM R9 NM R10 NM R11 NM R12 470K F u 0 0 1 C10 C9 C8 C7 VDD 100nF 100pF 33pF CD/DAT3 DAT2 DAT1 DAT0 CLK CMD VSS DETECTIVE C1 NM D1 C2 NM D2 C3 NM D3 C4 NM D4 C5 NM D5 D7 D6 C6 NM Automotive Module Series AG35 Hardware Design 3.15. SGMII Interface (Optional) IEEE802.3 compliance AG35 includes an integrated Ethernet MAC with an SGMII interface and two management interfaces. Key features of the SGMII interface are shown below:

Half/full duplex for 10/100/1000Mbps Support VLAN tagging Support IEEE1588 and Precision Time Protocol (PTP) Can be connected to an external Ethernet PHY like AR8033, or an external switch Management interfaces support dual power domains: 1.8V and 2.85V. The following table shows the pin definition of SGMII interface. Table 21: Pin Definition of SGMII Interface Pin Name Pin No. I/O Description Comment EPHY_RST_N 6 DO Ethernet PHY reset 1.8V/2.85V power domain EPHY_INT_N Ethernet PHY interrupt 1.8V power domain MDIO Interface 9 8 DI IO SGMII_ MDATA VDD_MDIO 4 PO SGMII Signal Part SGMII_MCLK 7 DO 1.8V/2.85V power domain SGMII MDIO (Management Data Input/Output) data SGMII MDIO (Management Data Input/Output) clock SGMII MDIO pull-up power source 1.8V/2.85V power domain 1.8V/2.85V power domain. External pull-up power source for SGMII MDIO pins. Connect with a 0.1uF capacitor, close to the PHY side. Connect with a 0.1uF capacitor, close to the PHY side. SGMII_TX_M 15 AO SGMII transmission (-) SGMII_TX_P AO SGMII transmission (+) 14 12 11 SGMII_RX_P SGMII_RX_M AI AI SGMII receiving (+) SGMII receiving (-) The following figure shows the simplified block diagram for Ethernet application. AG35_Hardware_Design 62 / 129 Automotive Module Series AG35 Hardware Design Figure 25: Simplified Block Diagram for Ethernet Application The following figure shows a reference design of SGMII interface with PHY AR8033 application. Figure 26: Reference Circuit of SGMII Interface with PHY AR8033 Application In order to enhance the reliability and availability of customers application, please follow the criteria below in the Ethernet PHY circuit design:

Keep SGMII data and control signals away from RF and VBAT traces. Keep the maximum trace length less than 10 inches and keep skew on the differential pairs less than 20 mils. The differential impedance of SGMII data trace is 10010%. To minimize crosstalk, the distance between separate adjacent pairs that are on the same layer must be equal to or larger than 40 mils. AG35_Hardware_Design 63 / 129 Module AR8033 MDI Ethernet Transformer RJ45 SGMII Control Module Control SGMII Data EPHY_INT_N EPHY_RST_N MDIO_DATA MDIO_CLK SGMII_RX_P SGMII_RX_M SGMII_TX_P SGMII_TX_M R1 R2 10K 1.5K VDD_EXT VDD_MDIO AR8033 INT RSTN MDIO MDC SOP SON SIP SIN C3 C4 Close to AR8033 Automotive Module Series AG35 Hardware Design 3.16. Wireless Connectivity Interfaces AG35 supports a low-power SDIO 3.0 interface (SDIO1 interface) for WLAN function, and UART2 & PCM interfaces for BT function*. The following table shows the pin definition of wireless connectivity interfaces. Table 22: Pin Definition of Wireless Connectivity Interfaces Pin Name Pin No. I/O Description Comment PM_ENABLE 5 DO WLAN power enable 1.8V power domain WLAN Power Supply WLAN Interface IO IO IO IO DO IO DO SDC1_DATA3 23 SDIO data bus (bit 3) 1.8V power domain SDC1_DATA2 22 SDIO data bus (bit 2) 1.8V power domain SDC1_DATA1 21 SDIO data bus (bit 1) 1.8V power domain SDC1_DATA0 20 SDIO data bus (bit 0) 1.8V power domain SDC1_CLK 19 SDIO clock signal 1.8V power domain SDC1_CMD 18 SDIO command signal 1.8V power domain WLAN_EN 149 WLAN function control via Wi-Fi module. Active high. 1.8V power domain WLAN_WAKE 160 DI 1.8V power domain Wake up the host (AG35 module) by Wi-Fi module 169 DO WLAN sleep clock 1.8V power domain Coexistence Interface WLAN_ SLP_CLK COEX_ UART_RX/

USB_BOOT COEX_ UART_TX BT Interface*

146 DI 1.8V power domain 145 DO 1.8V power domain LTE/WLAN&BT coexistence signal LTE/WLAN&BT coexistence signal BT_EN*

3 DO Bluetooth enable control VOLmax=0.45V AG35_Hardware_Design 64 / 129 Automotive Module Series AG35 Hardware Design VOHmin=1.35V UART2_TXD 163 Transmit data 1.8V power domain UART2_CTS 164 DTE clear to send 1.8V power domain UART2_RXD 165 Receive data 1.8V power domain UART2_RTS 166 DTE request to send 1.8V power domain PCM_IN PCM data input 1.8V power domain PCM_OUT DO PCM data output 1.8V power domain 66 68 PCM_SYNC 65 PCM data frame sync signal 1.8V power domain DO DO DI DI DI IO IO PCM_CLK 67 PCM data bit clock 1.8V power domain The following figure shows a reference design for the connection between wireless connectivity interfaces and Quectel AF20 module. AG35_Hardware_Design 65 / 129 Automotive Module Series AG35 Hardware Design Figure 29: Reference Circuit for Connection with AF20 Module 3.16.1. WLAN Interface AG35 provides a low power SDIO 3.0 interface and a control interface for WLAN design. The WLAN interface (SDIO interface) supports the following modes:

Single data rate (SDR) mode (up to 208MHz) Double data rate (DDR) mode (up to 50MHz) As SDIO signals are very high-speed signals, in order to ensure the SDIO interface design corresponds with the SDIO 3.0 specification, please comply with the following principles:

It is important to route the SDIO signal traces with total grounding. The impedance of SDIO signal AG35_Hardware_Design 66 / 129 Module POWER PM_ENABL E DCDC/LDO VDD_3V3 WLAN SDC1_CLK 15~24R Close to module NM-0R K 5 1 K 0 1 VDD_EXT SDC1_DATA3 SDC1_DATA2 SDC1_DATA1 SDC1_DATA0 SDC1_CMD WLAN_EN WLAN_SLP_CLK WLAN_WAKE COEX_UART_RX COEX_UART_TX BT_EN UART2_RTS UART2_CTS UART2_TXD UART2_RXD PCM_1A_IN PCM_1A_OUT PCM_1A_SYNC PCM_1A_CLK COEX Bluetooth

(Under Development) AF20 VIO SDIO_D3 SDIO_D2 SDIO_D1 SDIO_D0 SDIO_CLK SDIO_CMD WLAN_EN 32KHZ_IN LTE_UART_TXD LTE_UART_RXD BT_EN*

BT_UART_RTS BT_UART_CTS BT_UART_RXD BT_UART_TXD PCM_OUT PCM_IN PCM_SYNC PCM_CLK Automotive Module Series AG35 Hardware Design trace is 50 (10%). Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals, etc., as well as noisy signals such as clock signals, DCDC signals, etc. It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm and the total routing length less than 50mm. The total length of SDIO signal traces inside AG35 module is 12mm and that inside AF20 is 10mm, so the exterior total trace length should be less than 28mm. Keep termination resistors within 15~24 on clock lines near the module and keep the route distance from the module clock pins to termination resistors less than 5mm. Make sure the adjacent trace spacing is two times of the trace width and the bus capacitance is less More information about BT interface will be added in the future version of this document. than 40pF. 3.16.2. BT Interface*

NOTE

* means under development. 3.17. ADC Interfaces The module provides three analog-to-digital converter (ADC) interfaces. The voltage value on ADC pins can be read via AT+QADC=<port> command, through setting <port> into 0, 1 or 2. For more details about the AT command, please refer to document [2]. AT+QADC=0: read the voltage value on ADC0 AT+QADC=1: read the voltage value on ADC1 AT+QADC=2: read the voltage value on ADC2 In order to improve the accuracy of ADC, the trace of ADC interfaces should be surrounded by ground. Table 23: Pin Definition of ADC Interfaces Pin Name Pin No. Description ADC2 ADC0 172 173 General purpose analog to digital converter interface General purpose analog to digital converter interface AG35_Hardware_Design 67 / 129 Automotive Module Series AG35 Hardware Design ADC1 175 General purpose analog to digital converter interface The following table describes the characteristics of ADC interfaces. Table 24: Characteristics of ADC Interfaces Parameter Min. Typ. Max. Unit ADC2 Voltage Range ADC0 Voltage Range ADC1 Voltage Range ADC Resolution ADC Sample Rate NOTES 0.1 0.3 0.3 1.7 VBAT_BB VBAT_BB V V V bits MHz 15 2.4 1. The input voltage for each ADC interface must not exceed its corresponding voltage range. 2. 3. It is prohibited to supply any voltage to ADC pins when VBAT is removed. It is recommended to use resistor divider circuit for ADC application. 3.18. Network Status Indication The network indication pins can be used to drive network status indication LEDs. The module provides two network indication pins: NET_MODE and NET_STATUS. The following tables describe the pin definition and logic level changes in different network status. Table 25: Pin Definition of Network Connection Status /Activity Indicator Pin Name Pin No. I/O Description Comment NET_MODE 147 DO 1.8V power domain Indicate the modules network registration status NET_STATUS 170 DO Indicate the modules network activity status 1.8V power domain AG35_Hardware_Design 68 / 129 Automotive Module Series AG35 Hardware Design Table 26: Working State of the Network Connection Status /Activity Indicator Pin Name Logic Level Changes Network Status NET_MODE Always High Always Low Registered on LTE network Others Flicker slowly (200ms High/1800ms Low) Network searching NET_STATUS Flicker slowly (1800ms High/200ms Low) Idle Flicker quickly (125ms High/125ms Low) Data transfer is ongoing Always High Voice calling A reference circuit is shown in the following figure. Figure 30: Reference Circuit of the Network Indicator 3.19. STATUS The STATUS pin is an open drain output for indicating the modules operation status. It can be connected to a GPIO of DTE with a pull up resistor, or as an LED indication circuit as shown below. When the module is turned on normally, the STATUS pin will present a low level state. Otherwise, it will present high-impedance state. AG35_Hardware_Design 69 / 129 Module Network Indicator 4.7K VBAT 2.2K 47K Automotive Module Series AG35 Hardware Design Table 27: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 171 OD Indicate the modules operation status Require external pull-up The following figure shows different design circuits of STATUS, and customers can choose either one according to application demands. Figure 31: Reference Circuit of the STATUS NOTES 1. 2. NOTE In sleep state, STATUS will still output a low voltage to drive the LED, causing an extra current consumption on VBAT. So it is recommended to replace VBAT with an external controllable power supply, and use it to switch off the power source during sleep state so as to reduce power consumption. It is not recommended to use level translator circuit for STATUS. 3.20. Behaviors of RI AT+QCFG=risignaltype,physical command can be used to configure RI behavior. No matter on which port URC is presented, URC will trigger the behavior of RI pin. URC can be outputted from UART port, USB AT port and USB modem port by AT+QURCCFG command. The default port is USB AT port. The default behaviors of RI are shown as below. AG35_Hardware_Design 70 / 129 VDD_MCU 33K VBAT 2.2K STATUS MCU_GPIO STATUS Module Module Automotive Module Series AG35 Hardware Design Table 28: Default Behaviors of RI State Idle URC Response RI keeps in high level RI outputs 120ms low pulse when new URC returns The default RI behaviors can be configured flexibly by AT+QCFG=urc/ri/ring command. Please refer to document [2] for more details. 3.21. USB_BOOT Interface AG35 provides a USB_BOOT pin which is multiplexed with COEX_UART_RX. Developers can pull up USB_BOOT to VDD_EXT before powering on the module, thus the module will enter into emergency download mode when powered on. In this mode, the module supports firmware upgrade over USB interface. Table 29: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description Comment COEX_ UART_RX/

USB_BOOT 146 DI Force the module to enter into emergency download mode 1.8V power domain. Active high. If unused, keep it open. The following figure shows a reference circuit design of USB_BOOT interface. Figure 32: Reference Circuit of USB_BOOT Interface AG35_Hardware_Design 71 / 129 Module USB_BOOT VDD_EXT 4.7K Test point 4.7K TVS TVS l e u d o m o t e s o C l Automotive Module Series AG35 Hardware Design 3.22. RTC NOTE AG35 has a real time clock within the PMIC, but has no dedicated RTC power supply pin. The RTC is powered by VBAT_BB. If VBAT_BB is removed, the RTC will not be maintained. If RTC needs to be maintained, then VBAT_BB must be powered all the time. 3.23. HSIC Interface*

AG35 provides a HSIC interface for EAVB. HSIC is a 2-signal source synchronous serial interface which uses 240MHZ DDR signaling to provide High-Speed 480Mbps USB transfers which are 100% host driver compatible with traditional USB cable-connected topologies. The HSIC interface supports the following features:

High-Speed 480Mbps data rate only No power consumed unless a transfer in progress Signals driven at 1.2V standard LVCMOS levels. The following table shows the pin definition of HSIC interface. Table 30: Pin Definition of HSIC Interface Pin Name Pin No. I/O Description Comment 1.2V power domain. If unused, keep them open. HSIC_STROBE 194 IO HSIC_DATA 195 IO High speed inter chip interface -

strobe High speed inter chip interface -

data The following table shows the layout guidelines of HSIC interface. Table 31: Design Guidelines for HSIC Designs General Data rate Guidelines 480Mbps AG35_Hardware_Design 72 / 129 Automotive Module Series AG35 Hardware Design Impedance 45 ~ 55 Intra-pair match

< 2.5mm (15ps) Length matching Maximum trace length 8cm HSIC to all other signals

> 3 line width HSIC_DATA to HSIC_STROBE

> 3 line width Spacing NOTES 1. * means under development. 2. More details will be provided in a future release of this document. AG35_Hardware_Design 73 / 129 Automotive Module Series AG35 Hardware Design 4 GNSS Receiver 4.1. General Description AG35 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). AG35 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface by default. By default, AG35 GNSS engine is switched off. It has to be switched on with AT command. For more details about GNSS engine technology and configurations, please refer to document [4]. 4.2. GNSS Performance The following table shows the GNSS performance of AG35. Table 32: AG35-CE GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) TTFF

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous Cold start

@open sky Warm start

@open sky Autonomous XTRA enabled Autonomous XTRA enabled Typ.

-146

-158

-162 35 18 26 2.2 Unit dBm dBm dBm s s s s AG35_Hardware_Design 74 / 129 Automotive Module Series AG35 Hardware Design Autonomous XTRA enabled Autonomous

@open sky Autonomous XTRA enabled Autonomous XTRA enabled Autonomous XTRA enabled Autonomous

@open sky Hot start

@open sky CEP-50 Accuracy

(GNSS) Table 33: AG35-E GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous TTFF

(GNSS) Warm start

@open sky Cold start

@open sky Hot start

@open sky CEP-50 Accuracy

(GNSS) Sensitivity

(GNSS) TTFF

(GNSS) Table 34: AG35-NA GNSS Performance Parameter Description Conditions Cold start Autonomous Reacquisition Autonomous Tracking Autonomous Cold start

@open sky Autonomous XTRA enabled Warm start Autonomous 2.5 1.8

< 2.5 Typ.

-146

-158

-162 35 18 26 2.2 2.5 1.8 Typ.

-146

-158

-162 35 18 26 Unit dBm dBm dBm s s m s s s s s s Unit dBm dBm dBm s s s

< 2.5 m AG35_Hardware_Design 75 / 129 Automotive Module Series AG35 Hardware Design

@open sky Hot start

@open sky CEP-50 Cold start

@open sky Hot start

@open sky CEP-50 XTRA enabled Autonomous XTRA enabled Autonomous

@open sky Autonomous XTRA enabled Autonomous XTRA enabled Autonomous XTRA enabled Autonomous

@open sky Accuracy

(GNSS) Table 35: AG35-LA GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous TTFF

(GNSS) Warm start

@open sky Accuracy

(GNSS) Table 36: AG35-J GNSS Performance Parameter Description Conditions Sensitivity

(GNSS) Cold start Autonomous Reacquisition Autonomous Tracking Autonomous TTFF

(GNSS) Cold start

@open sky Autonomous XTRA enabled 2.2 2.5 1.8

< 2.5 Typ.

-146

-158

-162 35 18 26 2.2 2.5 1.8 Typ.

-146

-158

-162 35 18 s s s m s s s s s s Unit dBm dBm dBm Unit dBm dBm dBm s s

< 2.5 m AG35_Hardware_Design 76 / 129 Automotive Module Series AG35 Hardware Design Warm start

@open sky Hot start

@open sky CEP-50 Autonomous XTRA enabled Autonomous XTRA enabled Autonomous

@open sky 26 2.2 2.5 1.8 s s s s

< 2.5 m Accuracy

(GNSS) NOTES 1. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. 2. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock. 3. Cold start sensitivity: the lowest GNSS signal value at the antenna port on which the module fixes position within 3 minutes after executing cold start command. 4.3. Layout Guidelines The following layout guidelines should be taken into account in application design. Maximize the distance among GNSS antenna, main antenna and Rx-diversity antenna. Digital circuits such as (U)SIM card, USB interface, camera module, display connector and SD card Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar should be kept away from the antennas. isolation and protection. Keep the characteristic impedance for ANT_GNSS trace as 50. Please refer to Chapter 5 for GNSS antenna reference design and antenna installation information. AG35_Hardware_Design 77 / 129 Automotive Module Series AG35 Hardware Design 5 Antenna Interfaces AG35 includes a main antenna interface, an Rx-diversity antenna interface which is used to resist the fall of signals caused by high speed movement and multipath effect, and a GNSS antenna interface. The antenna ports have an impedance of 50. 5.1. Main/Rx-diversity Antenna Interface 5.1.1. Pin Definition The pin definition of main antenna and Rx-diversity antenna interfaces are shown below. Table 37: Pin Definition of RF Antenna Interfaces Pin Name Pin No. I/O Description Comment ANT_MAIN ANT_DIV 107 127 IO AI 5.1.2. Operating Frequency Main antenna interface 50 impedance Receive diversity antenna interface 50 impedance Table 38: AG35-CE Operating Frequencies 3GPP Band EGSM900 DCS1800 Transmit 880~915 1710~1785 1805~1880 WCDMA B1 1920~1980 2110~2170 WCDMA B8 880~915 EVDO/CDMA BC0 1) 824~849 TD-SCDMA B34 2010~2025 2010~2025 Receive 925~960 925~960 869~894 Unit MHz MHz MHz MHz MHz MHz AG35_Hardware_Design 78 / 129 Automotive Module Series AG35 Hardware Design TD-SCDMA B39 1880~1920 1880~1920 LTE-FDD B1 1920~1980 2110~2170 LTE-FDD B3 1710~1785 1805~1880 LTE-FDD B5 LTE-FDD B8 824~849 880~915 869~894 925~960 LTE-TDD B34 2010~2025 2010~2025 LTE-TDD B38 2570~2620 2570~2620 LTE-TDD B39 1880~1920 1880~1920 LTE-TDD B40 2300~2400 2300~2400 LTE-TDD B41 2555~2655 2555~2655 Table 39: AG35-E Operating Frequencies 3GPP Band EGSM900 DCS1800 WCDMA B5 WCDMA B8 Transmit 880~915 824~849 880~915 1710~1785 1805~1880 WCDMA B1 1920~1980 2110~2170 LTE-FDD B1 1920~1980 2110~2170 LTE-FDD B3 1710~1785 1805~1880 LTE-FDD B5 824~849 869~894 LTE-FDD B7 2500~2570 2620~2690 LTE-FDD B8 LTE-FDD B20 LTE-FDD B28 880~915 832~862 703~748 Receive 925~960 869~894 925~960 925~960 791~821 758~803 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz AG35_Hardware_Design 79 / 129 Automotive Module Series AG35 Hardware Design LTE-TDD B38 2570~2620 2570~2620 LTE-TDD B40 2300~2400 2300~2400 Table 40: AG35-NA Operating Frequencies 3GPP Band GSM850 PCS1900 Transmit 824~849 Receive 869~894 1850~1910 1930~1990 WCDMA B2 1850~1910 1930~1990 WCDMA B4 1710~1755 2110~2155 WCDMA B5 824~849 869~894 LTE-FDD B2 1850~1910 1930~1990 LTE-FDD B4 1710~1755 2110~2155 LTE-FDD B5 824~849 869~894 LTE-FDD B7 2500~2570 2620~2690 699~716 777~787 704~716 824~849 880~915 729~746 746~756 734~746 Receive 869~894 925~960 Table 41: AG35-LA Operating Frequencies 3GPP Band Transmit LTE-FDD B12 LTE-FDD B13 LTE-FDD B17 GSM850 EGSM900 DCS1800 PCS1900 1710~1785 1805~1880 1850~1910 1930~1990 WCDMA B1 1920~1980 2110~2170 MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz AG35_Hardware_Design 80 / 129 Automotive Module Series AG35 Hardware Design WCDMA B2 1850~1910 1930~1990 WCDMA B3 1710~1785 1805~1880 WCDMA B4 1710~1755 2110~2155 WCDMA B5 WCDMA B8 824~849 880~915 869~894 925~960 LTE-FDD B1 1920~1980 2110~2170 LTE-FDD B2 1850~1910 1930~1990 LTE-FDD B3 1710~1785 1805~1880 LTE-FDD B4 1710~1755 2110~2155 LTE-FDD B5 824~849 869~894 LTE-FDD B7 2500~2570 2620~2690 LTE-FDD B8 LTE FDD B28 880~915 703~748 925~960 758~803 Table 42: AG35-J Operating Frequencies 3GPP Band Transmit Receive WCDMA B1 1920~1980 2110~2170 WCDMA B3 1710~1785 1805~1880 WCDMA B5 WCDMA B6 WCDMA B8 WCDMA B19 824~849 830~840 880~915 830~845 869~894 875~885 925~960 875~890 LTE-FDD B1 1920~1980 2110~2170 LTE-FDD B3 1710~1785 1805~1880 LTE-FDD B5 824~848.9 869~893.9 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz AG35_Hardware_Design 81 / 129 Automotive Module Series AG35 Hardware Design LTE-FDD B8 880~915 925~960 LTE-FDD B9 1749.9~1784.8 1844.9~1879.8 LTE-FDD B19 830~845 875~890 LTE-FDD B21 1747.9~1462.8 1495.9~1510.8 LTE FDD B28 703~748 758~803 LTE TDD B41 2535~2655 2535~2655 MHz MHz MHz MHz MHz MHz NOTE 1) EVDO/CDMA BC0 for AG35-CE is optional. 5.1.3. Reference Design of RF Antenna Interfaces A reference design of main and Rx-diversity antenna interfaces is shown as below. It is recommended to reserve a -type matching circuit for better RF performance, and the -type matching components

(R1/C1/C2 and R2/C3/C4) should be placed as close to the antennas as possible. The capacitors are not mounted by default. Figure 33: Reference Circuit of RF Antenna Interfaces AG35_Hardware_Design 82 / 129 Main antenna Diversity antenna Module ANT_MAIN R1 0R ANT_DIV R2 0R C1 NM C3 NM C2 NM C4 NM Automotive Module Series AG35 Hardware Design NOTES sensitivity. 1. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve receiving 2. ANT_DIV function is enabled by default. AT+QCFG="diversity",0 command can be used to disable receive diversity. Please refer to document [2] for details. 5.1.4. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled to 50. The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, height from the reference ground to the signal layer (H), and the clearance between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 34: Microstrip Design on a 2-layer PCB Figure 35: Coplanar Waveguide Design on a 2-layer PCB AG35_Hardware_Design 83 / 129 Automotive Module Series AG35 Hardware Design Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 37: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces as to 50. connected to ground. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully The distance between the RF pins and the RF connector should be as short as possible, and all the right- angle traces should be changed to curved ones. There should be clearance area under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times as wide as the width of RF signal traces (2*W). AG35_Hardware_Design 84 / 129 Automotive Module Series AG35 Hardware Design For more details about RF layout, please refer to document [5]. 5.2. GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNSS antenna interface. Table 43: Pin Definition of GNSS Antenna Interface Pin Name Pin No. I/O Description Comment ANT_GNSS 119 AI GNSS antenna interface 50 impedance Type GPS Galileo BeiDou QZSS Table 44: GNSS Frequency GLONASS 1597.5~1605.8 Frequency 1575.421.023 1575.422.046 1561.0982.046 1575.42 Unit MHz MHz MHz MHz MHz A reference design of GNSS antenna interface is shown as below. Figure 38: Reference Circuit of GNSS Antenna AG35_Hardware_Design 85 / 129 VDD 0.1uF 10R GNSS Antenna Module ANT_GNSS 47nH 100pF 0R NM NM Automotive Module Series AG35 Hardware Design 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1. Antenna Requirements Table 45: Antenna Requirements Antenna Type Requirements The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna. Frequency range: 1559MHz~1609MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0dBi Active antenna noise figure: < 1.5dB Active antenna gain: > 0dBi Active antenna embedded LNA gain: < 17dB VSWR: 2 Efficiency: > 30%

Max input power: 50W Input impedance: 50 Cable insertion loss: < 1dB

(GSM850/EGSM900, WCDMA B5/B6/B8/B19, LTE-FDD B5/B8/B12/B13/B17/B19/B20/B28, EVDO/CDMA BC0) Cable insertion loss: < 1.5dB

(DCS1800/PCS900, WCDMA B1/B2/B3/B4, LTE-FDD B1/B2/B3/B4/B9/B11/B21, LTE-TDD B34/B39, TD-SCDMA B34/B39) Cable insertion loss: < 2dB

(LTE-FDD B7, LTE-TDD B38/B40/B41) GSM/EVDO/CDMA/UMTS/

TD-SCDMA/LTE NOTES GNSS 1) NOTE 1) It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance. AG35_Hardware_Design 86 / 129 Automotive Module Series AG35 Hardware Design 5.3.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connector provided by HIROSE. Figure 39: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 40: Mechanicals of U.FL-LP Connectors AG35_Hardware_Design 87 / 129 Automotive Module Series AG35 Hardware Design The following figure describes the space factor of mated connector. Figure 41: Space Factor of Mated Connector (Unit: mm) For more details, please visit https://www.hirose.com. AG35_Hardware_Design 88 / 129 Automotive Module Series AG35 Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 46: Absolute Maximum Ratings Parameter VBAT_RF/VBAT_BB USB_VBUS Peak Current of VBAT_BB Peak Current of VBAT_RF Voltage at Digital Pins Voltage at ADC0 Voltage at ADC1 Voltage at ADC2 Min.

-0.3

-0.3 0 0

-0.3 0.3 0.3 0.1 Max. Unit 4.7 5.5 0.8 1.8 2.3 VBAT_BB VBAT_BB 1.7 V V A A V V V V AG35_Hardware_Design 89 / 129 Automotive Module Series AG35 Hardware Design Parameter Description Conditions Min. Typ. Max. Unit 6.2. Power Supply Ratings Table 47: Power Supply Ratings VBAT IVBAT VBAT_BB and VBAT_RF The actual input voltages must stay between the minimum and maximum values. Voltage drop during burst transmission Maximum power control level on EGSM900. Peak supply current

(during transmission slot) USB connection detection Maximum power control level on EGSM900. 6.3. Operation and Storage Temperatures 3.3 3.8 4.3 V 400 mV 1.8 2.0 A USB_VBUS 3.0 5.0 5.25 V Table 48: Operation and Storage Temperatures Parameter Min. Max. Unit Operation Temperature Range 1)

-35 Extended Temperature Range 2)

-40 eCall Temperature Range 3)

-40 Storage Temperature Range

-40 NOTES Typ. 25

+75

+85

+90

+95 C C C C 1. 2. 1) Within operation temperature range, the module is 3GPP compliant, and emergency call can be dialed out with a maximum power and data rate. 2) Within extended temperature range, the module remains fully functional and retains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified AG35_Hardware_Design 90 / 129 3. IVBAT Automotive Module Series AG35 Hardware Design tolerances. When the temperature returns to normal operation temperature levels, the module will meet 3GPP specifications again. 3) Within eCall temperature range, the emergency call function must be functional until the module is broken. When the ambient temperature is between 75C and 90C and the module temperature has reached the threshold value, the module will trigger protective measures (such as reduce power, decrease throughput, unregister the device, etc.) to ensure the full function of emergency call. 6.4. Current Consumption Table 49: AG35-CE Current Consumption (25C, 3.8V Power Supply) Parameter Description Conditions Typ. Unit OFF state Power down AT+CFUN=0 (USB disconnected) EGSM900 DRX=2 (USB disconnected) 2.3 EGSM900 DRX=5 (USB disconnected) 1.9 EGSM900 DRX=5 (USB suspend) 2.2 EGSM900 DRX=9 (USB disconnected) 1.6 DCS1800 DRX=2 (USB disconnected) 1.8 DCS1800 DRX=5 (USB disconnected) 1.4 Sleep state DCS1800 DRX=5 (USB suspend) 1.8 DCS1800 DRX=9 (USB disconnected) 1.1 TD-SCDMA B34 DRX=6 (USB disconnected) TD-SCDMA B34 DRX=6 (USB suspend) TD-SCDMA B34 DRX=7 (USB disconnected) TD-SCDMA B34 DRX=8 (USB disconnected) TD-SCDMA B34 DRX=9 (USB disconnected) 20 1.2 2.0 2.1 1.8 1.6 1.5 uA mA mA mA mA mA mA mA mA mA mA mA mA mA mA AG35_Hardware_Design 91 / 129 Automotive Module Series AG35 Hardware Design WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB suspend) WCDMA PF=128 (USB disconnected) 1.8 WCDMA PF=256 (USB disconnected) 1.5 WCDMA PF=512 (USB disconnected) 1.4 BC0 SCI=1 (USB disconnected) BC0 SCI=1 (USB suspend) LTE-FDD PF=32 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB suspend) LTE-FDD PF=128 (USB disconnected) 2.2 LTE-FDD PF=256 (USB disconnected) 1.9 LTE-TDD PF=32 (USB disconnected) LTE-TDD PF=64 (USB disconnected) LTE-TDD PF=64 (USB suspend) LTE-TDD PF=128 (USB disconnected) 2.4 LTE-TDD PF=256 (USB disconnected) 1.7 GSM DRX=5 (USB connected) GSM DRX=5 (USB disconnected) WCDMA PF=64 (USB connected) BC0 SCI=1 (USB disconnected) BC0 SCI=1 (USB connected) LTE-FDD PF=64 (USB connected) 2.0 2.4 3.5 3.7 3.8 2.7 3.3 3.8 3.1 3.2 20.0 34.0 35.0 22.0 34.0 35.0 LTE-FDD PF=64 (USB disconnected) 22.0 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Idle state WCDMA PF=64 (USB disconnected) 22.0 AG35_Hardware_Design 92 / 129 Automotive Module Series AG35 Hardware Design LTE-TDD PF=64 (USB connected) 35.0 LTE-TDD PF=64 (USB disconnected) 23.0 mA mA EGSM900 4DL/1UL @32.66dBm 249.2 mA EGSM900 3DL/2UL @32.51dBm 421.6 mA EGSM900 2DL/3UL @30.65dBm 495.0 mA EGSM900 1DL/4UL @29.37dBm 568.9 mA DCS1800 4DL/1UL @29.21dBm 174.1 mA DCS1800 3DL/2UL @29.03dBm 276.1 mA DCS1800 2DL/3UL @28.95dBm 374.9 mA DCS1800 1DL/4UL @28.81dBm 476.8 mA EGSM900 4DL/1UL @27.02dBm 155.2 mA EGSM900 3DL/2UL @27.05dBm 256.9 mA EGSM900 2DL/3UL @26.82dBm 350.0 mA EGSM900 1DL/4UL @26.69dBm 446.0 mA DCS1800 4DL/1UL @25.21dBm 146.0 mA DCS1800 3DL/2UL @25.11dBm 226.7 mA DCS1800 2DL/3UL @25.01dBm 312.0 mA DCS1800 1DL/4UL @24.84dBm 401.6 mA GPRS data transfer

(GNSS OFF) EDGE data transfer

(GNSS OFF) EVDO/CDMA data transfer (GNSS OFF) BC0 1) @23.71dBm TD-SCDMA data transfer (GNSS OFF) B34 @22.73dBm B39 @22.94dBm 609.06 mA 131.51 mA 132.77 mA WCDMA B1 HSDPA @21.95dBm 540.18 mA WCDMA data transfer

(GNSS OFF) WCDMA B8 HSDPA @22.32dBm 481.27 mA WCDMA B1 HSUPA @21.52dBm 532.06 mA WCDMA B8 HSUPA @21.49dBm 466.51 mA AG35_Hardware_Design 93 / 129 Automotive Module Series AG35 Hardware Design LTE data transfer

(GNSS OFF) LTE-FDD B1 @23.01dBm 698.07 mA LTE-FDD B3 @23.24dBm 708.78 mA LTE-FDD B5 @23.28dBm 629.16 mA LTE-FDD B8 @23.27dBm 597.21 mA LTE-TDD B34 @22.73dBm 334.99 mA LTE-TDD B38 @22.85dBm 430.39 mA LTE-TDD B39 @22.97dBm 330.62 mA LTE-TDD B40 @22.94dBm 405.78 mA LTE-TDD B41 @22.91dBm 456.63 mA EGSM900, PCL=5 @32.3dBm 230.4 mA EGSM900, PCL=12 @19.3dBm 103.2 mA GSM voice call EGSM900, PCL=19 @5.3dBm 73.0 mA DCS1800, PCL=0 @29.26dBm 155.5 mA DCS1800, PCL=7 @16.52dBm 117.3 mA DCS1800, PCL=15 @0.3dBm 97 mA EVDO/CDMA voice call BC0 1) @23.78dBm BC0 1) @-60.55dBm 592.7 mA 112.7 mA WCDMA voice call WCDMA B1 @23.15dBm 502.2 mA WCDMA B8 @23.24dBm 525.6 mA Table 50: AG35-E Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down IVBAT AT+CFUN=0 (USB disconnected) Sleep state GSM DRX=2 (USB disconnected) 20 1.2 2.3 uA mA mA AG35_Hardware_Design 94 / 129 Automotive Module Series AG35 Hardware Design 1.7 1.9 1.6 2.0 2.4 3.7 2.5 2.8 3.6 2.5 2.7 GSM DRX=5 (USB disconnected) GSM DRX=5 (USB suspend) GSM DRX=9 (USB disconnected) WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB suspend) WCDMA PF=128 (USB disconnected) 1.7 WCDMA PF=256 (USB disconnected) 1.5 WCDMA PF=512 (USB disconnected) 1.4 LTE-FDD PF=32 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB suspend) LTE-FDD PF=128 (USB disconnected) 2.1 LTE-FDD PF=256 (USB disconnected) 1.8 LTE-TDD PF=32 (USB disconnected) LTE-TDD PF=64 (USB disconnected) LTE-TDD PF=64 (USB suspend) LTE-TDD PF=128 (USB disconnected) 1.9 LTE-TDD PF=256 (USB disconnected) 1.7 GSM DRX=5 (USB connected) GSM DRX=5(USB disconnected) WCDMA PF=64 (USB connected) 17.5 29.2 29.4 LTE-FDD PF=64 (USB connected) 28.3 LTE-FDD PF=64 (USB disconnected) 18.5 LTE-TDD PF=64 (USB connected) 29.5 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Idle state WCDMA PF=64 (USB disconnected) 18.4 AG35_Hardware_Design 95 / 129 Automotive Module Series AG35 Hardware Design LTE-TDD PF=64 (USB disconnected) 17.5 GPRS data transfer

(GNSS OFF) EDGE data transfer

(GNSS OFF) WCDMA data transfer

(GNSS OFF) EGSM900 4DL/1UL @33.02dBm EGSM900 3DL/2UL @32.85dBm EGSM900 2DL/3UL @30.4dBm EGSM900 1DL/4UL @29.2dBm DCS1800 4DL/1UL @29.7dBm DCS1800 3DL/2UL @29.6dBm DCS1800 2DL/3UL @29dBm DCS1800 1DL/4UL @28dBm EGSM900 4DL/1UL @27.5dBm EGSM900 3DL/2UL @27.5dBm EGSM900 2DL/3UL @26.9dBm EGSM900 1DL/4UL @25.3dBm DCS1800 4DL/1UL @26.2dBm DCS1800 3DL/2UL @26dBm DCS1800 2DL/3UL @25dBm DCS1800 1DL/4UL @24.6dBm WCDMA B1 HSDPA @22.2dBm WCDMA B5 HSDPA @22.8dBm WCDMA B8 HSDPA @22.2dBm WCDMA B1 HSUPA @21.9dBm WCDMA B5 HSUPA @22.2dBm WCDMA B8 HSUPA @22dBm mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 235 405 445 515 175 275 370 440 158 251 331 385 150 232 307 386 552 435 495 569 432 512 730 750 LTE data transfer

(GNSS OFF) LTE-FDD B1 @23.5dBm LTE-FDD B3 @23.8dBm mA mA AG35_Hardware_Design 96 / 129 Automotive Module Series AG35 Hardware Design LTE-FDD B5 @23.18dBm LTE-FDD B7 @23.7dBm LTE-FDD B8 @23.6dBm LTE-FDD B20 @23.8dBm LTE-FDD B28A @23.3dBm LTE-FDD B28B @23.5dBm LTE-TDD B38 @23.3dBm LTE-TDD B40 @22.95dBm EGSM900 @PCL=5 EGSM900 @PCL=12 EGSM900 @PCL=19 DCS1800 @PCL=0 DCS1800 @PCL=7 DCS1800 @PCL=15 GSM voice call WCDMA B1 (max power) @23.07dBm 640 WCDMA voice call WCDMA B5 (max power) @23.24dBm 450 WCDMA B8 (max power) @23.1dBm 550 Table 51: AG35-NA Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down IVBAT Sleep state AT+CFUN=0 (USB disconnected) GSM DRX=2 (USB disconnected) GSM DRX=5 (USB disconnected) GSM DRX=5 (USB suspend) AG35_Hardware_Design 97 / 129 530 710 600 600 780 700 385 370 246 116 88 177 128 109 20 1.2 2.3 2.0 2.3 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA uA mA mA mA mA Automotive Module Series AG35 Hardware Design GSM DRX=9 (USB disconnected) WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB suspend) WCDMA PF=128 (USB disconnected) 1.8 WCDMA PF=256 (USB disconnected) 1.6 WCDMA PF=512 (USB disconnected) 1.5 LTE-FDD PF=32 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB suspend) LTE-FDD PF=128 (USB disconnected) 2.0 LTE-FDD PF=256 (USB disconnected) 1.7 GSM DRX=5 (USB disconnected) GSM DRX=5 (USB connected) WCDMA PF=64 (USB connected) WCDMA PF=64 (USB disconnected) 19.0 LTE-FDD PF=64 (USB connected) 31.0 LTE-FDD PF=64 (USB disconnected) 19.0 GSM850 4DL/1UL @32.66dBm GSM850 3DL/2UL @32.51dBm GSM850 2DL/3UL @30.65dBm GSM850 1DL/4UL @29.37dBm PCS1900 4DL/1UL @29.21dBm PCS1900 3DL/2UL @29.03dBm PCS1900 2DL/3UL @28.95dBm PCS1900 1DL/4UL @28.81dBm 1.7 2.2 2.5 3.6 2.6 2.8 14.0 25.0 31.0 256 425 510 580 185 296 390 480 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Idle state GPRS data transfer

(GNSS OFF) AG35_Hardware_Design 98 / 129 Automotive Module Series AG35 Hardware Design EDGE data transfer

(GNSS OFF) WCDMA data transfer

(GNSS OFF) GSM850 4DL/1UL @27.02dBm GSM850 3DL/2UL @27.05dBm GSM850 2DL/3UL @26.82dBm GSM850 1DL/4UL @26.69dBm PCS1900 4DL/1UL @25.21dBm PCS1900 3DL/2UL @25.11dBm PCS1900 2DL/3UL @25.01dBm PCS1900 1DL/4UL @24.84dBm WCDMA B2 HSDPA (max power)

@22.32dBm WCDMA B4 HSDPA (max power)

@22.32dBm WCDMA B5 HSDPA (max power)

@22.48dBm WCDMA B2 HSUPA (max power)

@22.09dBm WCDMA B4 HSUPA (max power)

@22.32dBm WCDMA B5 HSUPA (max power)

@22.28dBm LTE data transfer

(GNSS OFF) LTE-FDD B2 (max power) @22.85dBm 650 mA LTE-FDD B4 (max power) @23.08dBm 640 LTE-FDD B5 (max power) @23.18dBm 650 LTE-FDD B7 (max power) @23dBm 710 LTE-FDD B12 (max power) @23dBm 660 LTE-FDD B13 (max power) @23.19dBm 650 LTE-FDD B17 (max power) @23.2dBm 670 GSM voice call GSM850 @PCL=12 GSM850 @PCL=5 GSM850 @PCL=19 80 190 110 AG35_Hardware_Design 99 / 129 160 265 355 456 155 230 320 410 560 570 mA 560 mA 520 mA 560 mA 550 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Automotive Module Series AG35 Hardware Design PCS1900 @PCL=0 PCS1900 @PCL=7 PCS1900 @PCL=15 WCDMA B2 (max power) @22.96dBm 580 WCDMA voice call WCDMA B4 (max power) @22.96dBm 560 WCDMA B5 (max power) @23.15dBm 570 Table 52: AG35-LA Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down IVBAT Sleep state WCDMA PF=128 (USB disconnected) 1.6 WCDMA PF=256 (USB disconnected) 1.5 AT+CFUN=0 (USB disconnected) GSM DRX=2 (USB disconnected) GSM DRX=5 (USB disconnected) GSM DRX=9 (USB disconnected) WCDMA PF=64 (USB disconnected) WCDMA PF=512 (USB disconnected) 1.4 LTE-FDD PF=32 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=128 (USB disconnected) 1.8 LTE-FDD PF=256 (USB disconnected) 1.6 GSM DRX=5 (USB connected) Idle state GSM DRX=5 (USB disconnected) WCDMA PF=64 (USB connected) 90 590 595 10 1.0 1.9 1.5 1.3 2.0 3.4 2.3 30 20 30 mA mA mA mA mA mA uA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA AG35_Hardware_Design 100 / 129 Automotive Module Series AG35 Hardware Design GPRS data transfer

(GNSS OFF) WCDMA PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) LTE-FDD PF=64 (USB disconnected) GSM850 4DL/1UL @32.62dBm GSM850 3DL/2UL @32.0dBm GSM850 2DL/3UL @30.12dBm GSM850 1DL/4UL @29.38dBm EGSM900 4DL/1UL @32.96dBm EGSM900 3DL/2UL @32.51dBm EGSM900 2DL/3UL @30.55dBm EGSM900 1DL/4UL @29.77dBm DCS1800 4DL/1UL @29.52dBm DCS1800 3DL/2UL @29.28dBm DCS1800 2DL/3UL @28.15dBm DCS1800 1DL/4UL @27.32dBm PCS1900 4DL/1UL @30.05dBm PCS1900 3DL/2UL @29.02dBm PCS1900 2DL/3UL @26.84dBm PCS1900 1DL/4UL @26.01dBm GSM850 4DL/1UL @26.3dBm GSM850 3DL/2UL @25.52dBm 20 31 21 228 369 435 527 241 364 459 558 177 283 353 432 177 263 317 384 139 217 266 332 148 219 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA EDGE data transfer

(GNSS OFF) GSM850 2DL/3UL @23.45dBm GSM850 1DL/4UL @22.86dBm EGSM900 4DL/1UL @26.67dBm EGSM900 3DL/2UL @25.33dBm AG35_Hardware_Design 101 / 129 Automotive Module Series AG35 Hardware Design EGSM900 2DL/3UL @23.71dBm EGSM900 1DL/4UL @22.85dBm DCS1800 4DL/1UL @25.86dBm DCS1800 3DL/2UL @25.24dBm DCS1800 2DL/3UL @23.54dBm DCS1800 1DL/4UL @22.56dBm PCS1900 4DL/1UL @25.41dBm PCS1900 3DL/2UL @25.21dBm PCS1900 2DL/3UL @23.28dBm PCS1900 1DL/4UL @22.21dBm WCDMA B1 HSDPA @22.56dBm WCDMA B2 HSDPA @22.62dBm WCDMA B3 HSDPA @22.43dBm WCDMA B4 HSDPA @22.49dBm WCDMA B5 HSDPA @23.32dBm WCDMA B2 HSUPA @22.57dBm WCDMA B3 HSUPA @21.85dBm WCDMA B4 HSUPA @22.0dBm WCDMA B5 HSUPA @22.51dBm WCDMA B8 HSUPA @22.45dBm 274 333 147 226 293 367 138 220 286 359 517 489 539 558 481 523 525 505 525 579 471 527 632 632 692 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA WCDMA data transfer

(GNSS OFF) WCDMA B8 HSDPA @22.69dBm WCDMA B1 HSUPA @22.47dBm LTE-FDD B1 @23.1dBm mA LTE data transfer

(GNSS OFF) LTE-FDD B2 @23.5dBm LTE-FDD B3 @23.24dBm AG35_Hardware_Design 102 / 129 Automotive Module Series AG35 Hardware Design LTE-FDD B4 @23.5dBm LTE-FDD B5 @23.55dBm LTE-FDD B7 @23.61dBm LTE-FDD B8 @23.59dBm LTE-FDD B28A @23.5dBm LTE-FDD B28B @23.64dBm GSM850 @PCL=5 GSM850 @PCL=12 GSM850 @PCL=19 EGSM900 @PCL=5 EGSM900 @PCL=12 EGSM900 @PCL=19 DCS1800 @PCL=0 DCS1800 @PCL=7 DCS1800 @PCL=15 PCS1900 @PCL=0 PCS1900 @PCL=7 PCS1900 @PCL=15 GSM voice call 675 555 654 629 709 722 236 112 87 243 115 88 180 128 109 182 128 108 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA WCDMA B1 (max power) @23.2dBm 559 WCDMA B2 (max power) @23.21dBm 536 WCDMA B3 (max power) @23.06dBm 593 WCDMA B4 (max power) @23.15dBm 593 WCDMA B5 (max power) @23.42dBm 493 WCDMA B8 (max power) @23.34dBm 570 WCDMA voice call AG35_Hardware_Design 103 / 129 Automotive Module Series AG35 Hardware Design Table 53: AG35-J Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down AT+CFUN=0 (USB disconnected) WCDMA PF=64 (USB disconnected) WCDMA PF=64 (USB suspend) WCDMA PF=128 (USB disconnected) 1.6 WCDMA PF=256 (USB disconnected) 1.4 WCDMA PF=512 (USB disconnected) 1.3 LTE-FDD PF=32 (USB disconnected) LTE-FDD PF=64 (USB disconnected) LTE-FDD PF=64 (USB suspend) LTE-FDD PF=128 (USB disconnected) 1.8 LTE-FDD PF=256 (USB disconnected) 1.5 LTE-TDD PF=32 (USB disconnected) LTE-TDD PF=64 (USB disconnected) LTE-TDD PF=64 (USB suspend) LTE-TDD PF=128 (USB disconnected) 1.9 LTE-TDD PF=256 (USB disconnected) 1.6 WCDMA PF=64 (USB connected) WCDMA PF=64 (USB disconnected) LTE-FDD PF=64 (USB connected) LTE-FDD PF=64 (USB disconnected) LTE-TDD PF=64 (USB connected) LTE-TDD PF=64 (USB disconnected) 20 1.1 1.9 2.2 3.4 2.3 2.6 3.5 2.4 2.7 29 19 30 19 29 19 uA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Sleep state IVBAT Idle state AG35_Hardware_Design 104 / 129 Automotive Module Series AG35 Hardware Design WCDMA B1 HSDPA @22.32dBm WCDMA B3 HSDPA @22.32dBm WCDMA B5 HSDPA @22.32dBm WCDMA B6 HSDPA @22.32dBm WCDMA B8 HSDPA @22.48dBm WCDMA B19 HSDPA @22.32dBm WCDMA B1 HSUPA @22.09dBm WCDMA B3 HSUPA @22.09dBm WCDMA B5 HSUPA @22.32dBm WCDMA B6 HSUPA @22.28dBm WCDMA B8 HSUPA @22.28dBm WCDMA B19 HSUPA @22.28dBm LTE-FDD B3 @23.08dBm LTE-FDD B5 @23.08dBm LTE-FDD B8 @23.18dBm LTE-FDD B9 @23dBm LTE-FDD B19 @23.19dBm LTE-FDD B21 @23dBm LTE-FDD B28 @23dBm LTE-TDD B41 @23dBm 550 590 530 536 580 550 565 596 550 545 578 565 660 680 670 630 629 645 600 700 430 WCDMA data transfer

(GNSS OFF) LTE data transfer

(GNSS OFF) WCDMA voice call WCDMA B1 (max power) @22.96dBm 590 WCDMA B3 (max power) @22.96dBm 630 WCDMA B5 (max power) @22.96dBm 600 WCDMA B6 (max power) @22.96dBm 596 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE-FDD B1 @22.85dBm mA AG35_Hardware_Design 105 / 129 mA mA mA mA mA mA mA mA mA 47.5 45.2 44.1 28.8 45.5 45.6 46.1 Automotive Module Series AG35 Hardware Design WCDMA B8 (max power) @22.96dBm 598 WCDMA B19 (max power) @23.15dBm 590 Table 54: AG35-CE GNSS Current Consumption Parameter Description Conditions Typ. Unit Parameter Description Conditions Typ. Unit IVBAT

(GNSS) Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Cold Start @Passive Antenna Hot Start @Passive Antenna Lost State @Passive Antenna Open Sky @Passive Antenna Table 55: AG35-E GNSS Current Consumption Cold Start @Passive Antenna Hot Start @Passive Antenna Lost State @Passive Antenna IVBAT

(GNSS) Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Table 56: AG35-NA GNSS Current Consumption Open Sky @Passive Antenna 28.7 mA Parameter Description Conditions Typ. Unit IVBAT

(GNSS) Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Cold Start @Passive Antenna Hot Start @Passive Antenna Lost State @Passive Antenna 47.9 51.5 46.1 mA mA mA Open Sky @Passive Antenna 25.2 mA AG35_Hardware_Design 106 / 129 Automotive Module Series AG35 Hardware Design Table 57: AG35-LA GNSS Current Consumption Parameter Description Conditions Typ. Unit IVBAT

(GNSS) Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) Cold Start @Passive Antenna Hot Start @Passive Antenna Lost State @Passive Antenna 46.8 47.1 47.1 mA mA mA Open Sky @Passive Antenna 32.3 mA Table 58: AG35-J GNSS Current Consumption Parameter Description Conditions Typ. Unit Cold Start @Passive Antenna Hot Start @Passive Antenna Lost State @Passive Antenna 46.1 45.1 45.2 mA mA mA Open Sky @Passive Antenna 31.9 mA Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) IVBAT

(GNSS) NOTE 1) EVDO/CDMA BC0 for AG35-CE is optional. 6.5. RF Output Power The following table shows the RF output power of AG35 module. Table 59: AG35-CE RF Output Power Frequency EGSM900 DCS1800 Max. 33dBm2dB 30dBm2dB Min. 5dBm5dB 0dBm5dB WCDMA B1 24dBm+1/-3dB

<-49dBm AG35_Hardware_Design 107 / 129 Automotive Module Series AG35 Hardware Design WCDMA B8 24dBm+1/-3dB EVDO/CDMA BC0 1) 24dBm+2/-1dB TD-SCDMA B34 24dBm+1/-3dB TD-SCDMA B39 24dBm+1/-3dB Table 60: AG35-E RF Output Power LTE-FDD B1 LTE-FDD B3 LTE-FDD B5 LTE-FDD B8 LTE-TDD B34 LTE-TDD B38 LTE-TDD B39 LTE-TDD B40 LTE-TDD B41 Frequency EGSM900 DCS1800 WCDMA B1 WCDMA B5 WCDMA B8 LTE-FDD B1 LTE-FDD B3 LTE-FDD B5 LTE-FDD B7 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB Max. 33dBm2dB 30dBm2dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm Min. 5dBm5dB 0dBm5dB

<-49dBm

<-49dBm

<-49dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm AG35_Hardware_Design 108 / 129 Automotive Module Series AG35 Hardware Design Table 61: AG35-NA RF Output Power Frequency Max. LTE-FDD B8 LTE-FDD B20 LTE-FDD B28 LTE-TDD B38 LTE-TDD B40 GSM850 PCS1900 WCDMA B2 WCDMA B4 WCDMA B5 LTE-FDD B2 LTE-FDD B4 LTE-FDD B5 LTE-FDD B7 LTE-FDD B12 LTE-FDD B13 LTE-FDD B17 Frequency GSM850 EGSM900 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 33dBm2dB 30dBm2dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB Max. 33dBm2dB 33dBm2dB

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm Min. 5dBm5dB 0dBm5dB

<-49dBm

<-49dBm

<-49dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm Min. 5dBm5dB 5dBm5dB Table 62: AG35-LA RF Output Power AG35_Hardware_Design 109 / 129 Automotive Module Series AG35 Hardware Design DCS1800 PCS1900 WCDMA B1 WCDMA B2 WCDMA B3 WCDMA B4 WCDMA B5 WCDMA B8 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B7 LTE-FDD B8 LTE-FDD B28 Frequency WCDMA B1 WCDMA B3 WCDMA B5 WCDMA B6 WCDMA B8 30dBm2dB 30dBm2dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB Max. 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB Table 63: AG35-J RF Output Power 0dBm5dB 0dBm5dB

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm Min.

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm WCDMA B19 24dBm+1/-3dB AG35_Hardware_Design 110 / 129 LTE-FDD B1 LTE-FDD B3 LTE-FDD B5 LTE-FDD B8 LTE-FDD B9 LTE-FDD B19 LTE-FDD B21 LTE-FDD B28 LTE-TDD B41 NOTES Frequency EGSM900 DCS1800 WCDMA B1 WCDMA B8 Automotive Module Series AG35 Hardware Design 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm 1. 1) EVDO/CDMA BC0 for AG35-CE is optional. 2. In GPRS 4 slots TX mode, the max output power is reduced by 3.0dB. This design conforms to the GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1. 6.6. RF Receiving Sensitivity Table 64: AG35-CE RF Receiving Sensitivity Receive Sensitivity (Typ.) (Unit: dBm) Primary Diversity SIMO 3GPP (SIMO)

-109

-109

-109

-110

-109

-110

-110

-110

-112

-112.5

-102

-102

-106.7

-103.7

-104

-108

-108 EVDO/CDMA BC0 1)

-109 TD-SCDMA B34 TD-SCDMA B39 AG35_Hardware_Design 111 / 129 Automotive Module Series AG35 Hardware Design LTE-FDD B1 (10M)

-98 LTE-FDD B3 (10M)

-98.6 LTE-FDD B5 (10M)

-98.5 LTE-FDD B8 (10M)

-98.5 LTE-TDD B34 (10M)

-98.1 LTE-TDD B38 (10M)

-98.5 LTE-TDD B39 (10M)

-98.4 LTE-TDD B40 (10M)

-98.3 Frequency EGSM900 DCS1800 WCDMA B1 WCDMA B5 WCDMA B8

-108.5

-108.7

-110

-110.5

-110 LTE-TDD B41 (10M)

-97.6

-98 Table 65: AG35-E RF Receiving Sensitivity LTE-FDD B5 (10M)

-99.5

-100.5 LTE-FDD B1 (10M)

-98.1 LTE-FDD B3 (10M)

-98.5 LTE-FDD B7 (10M)

-97 LTE-FDD B8 (10M)

-98.5 LTE-FDD B20 (10M)

-98.2 LTE-FDD B28 (10M)

-98.5 LTE-TDD B38 (10M)

-96.5

-99

-99

-100

-100

-99

-98

-99

-99

-110

-111

-99

-99

-99

-99.8

-99.2

-99.2

-98.6

-102

-102

-102.5

-102.5

-101.7

-101

-102

-101.5

-100.5

-96.3

-93.3

-94.3

-93.3

-96.3

-94.3

-96.3

-96.3

-94.3

-102

-102

-112

-106.7

-112.5

-104.7

-101.5

-101.7

-102.5

-101.1

-101.7

-101.5

-101.8

-100.8

-96.3

-93.3

-94.3

-94.3

-93.3

-93.3

-94.8

-94.3 Receive Sensitivity (Typ.) (Unit: dBm) Primary Diversity SIMO 3GPP (SIMO)

-110.5

-112

-103.7 AG35_Hardware_Design 112 / 129 Automotive Module Series AG35 Hardware Design LTE-TDD B40 (10M)

-98

-98.3

-101.3

-96.3 Table 66: AG35-NA RF Receiving Sensitivity Receive Sensitivity (Typ.) (Unit: dBm) Primary Diversity SIMO 3GPP (SIMO) LTE-FDD B2 (10M)

-98 LTE-FDD B4 (10M)

-97.9 LTE-FDD B5 (10M)

-98.5 LTE-FDD B7 (10M)

-97.3 LTE-FDD B12 (10M)

-98.5 LTE-FDD B13 (10M)

-98 LTE-FDD B17 (10M)

-98.3 Frequency GSM850 PCS1900 WCDMA B2 WCDMA B4 WCDMA B5 Frequency GSM850 EGSM900 DCS1800 PCS1900 WCDMA B1 WCDMA B2

-108.5

-108.2

-109.5

-109.8

-110

-109.5

-108.5

-108.5

-108.5

-110

-110 NA NA

-110.2

-109.5

-109.5

-98.5

-98.2

-99

-97.6

-99

-99.6

-98.5

-111

-111 NA NA

-110.4

-110.9

-110.8

-100.6

-100.3

-100.8

-99.9

-99.9

-100

-100.3

-112

-112

-102

-102

-104.7

-106.7

-104.7

-94.3

-96.3

-94.3

-94.3

-93.3

-93.3

-93.3

-102

-102

-102

-102

-106.7

-104.7 Table 67: AG35-LA RF Receiving Sensitivity Receive Sensitivity (Typ.) (Unit: dBm) Primary Diversity SIMO 3GPP (SIMO) AG35_Hardware_Design 113 / 129 Automotive Module Series AG35 Hardware Design LTE-FDD B5 (10M)

-99.2

-100.2 WCDMA B3 WCDMA B4 WCDMA B5 WCDMA B8

-109

-109.5

-110

-109.5 LTE-FDD B1 (10M)

-98.2 LTE-FDD B2 (10M)

-98.6 LTE-FDD B3 (10M)

-98.6 LTE-FDD B4 (10M)

-97.4 LTE-FDD B7 (10M)

-97.4 LTE-FDD B8 (10M)

-98.3 LTE-FDD B28 (10M)

-98.3 Frequency WCDMA B1 WCDMA B3 WCDMA B5 WCDMA B6 WCDMA B8 WCDMA B19

-109

-110

-109.6

-109.2

-110

-109.8 LTE-FDD B1 (10M)

-97.8 LTE-FDD B3 (10M)

-97.2 LTE-FDD B5 (10M)

-98.2 LTE-FDD B8 (10M)

-98.5

-110

-110

-111.5

-111

-99.1

-99.8

-98.9

-99

-98.4

-99.7

-98.7

-109.8

-109.5

-109.5

-109.8

-109.9

-109.7

-98.2

-98.5

-98

-98.6

-111

-111

-112

-111.5

-101.8

-102.4

-102

-101.3

-102.5

-101

-102.3

-101.8

-110.2

-110.3

-110.6

-110.3

-110.9

-110.3

-99.8

-99.3

-99.9

-100

-103.7

-106.7

-104.7

-103.7

-96.3

-94.3

-93.3

-96.3

-94.3

-94.3

-93.3

-94.8

-106.7

-103.7

-104.7

-106.7

-103.7

-106.7

-96.3

-93.3

-94.3

-93.3 Table 68: AG35-J RF Receiving Sensitivity Receive Sensitivity (Typ.) (Unit: dBm) Primary Diversity SIMO 3GPP (SIMO) AG35_Hardware_Design 114 / 129 Automotive Module Series AG35 Hardware Design LTE-FDD B9 (10M)

-98.2 LTE-FDD B19 (10M)

-97.9 LTE-FDD B21 (10M)

-98 LTE-FDD B28 (10M)

-98.5 LTE-TDD B41 (10M)

-97.9

-98

-98

-98.5

-98.5

-98

-100

-99.8

-100

-100.9

-99.5

-95.3

-96.3

-96.3

-94.8

-94.3 NOTE 1) EVDO/CDMA BC0 for AG35-CE is optional. 6.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the module electrostatic discharge characteristics. Table 69: Electrostatic Discharge Characteristics Tested Points Contact Discharge Air Discharge Unit VBAT, GND All Antenna Interfaces Other Interfaces 8 8 0.5 10 10 1 kV kV kV 6.8. Thermal Consideration In order to achieve better performance of the module, it is recommended to comply with the following principles for thermal consideration:

AG35_Hardware_Design 115 / 129 Automotive Module Series AG35 Hardware Design On customers PCB design, please keep placement of the module away from heating sources, especially high power components such as ARM processor, audio power amplifier, power supply, etc. Do not place components on the opposite side of the PCB area where the module is mounted, in order to facilitate adding of heatsink when necessary. Do not apply solder mask on the opposite side of the PCB area where the module is mounted, so as to ensure better heat dissipation performance. The reference ground of the area where the module is mounted should be complete, and add ground vias as many as possible for better heat dissipation. Through-holes will create better heat dissipation performance. Make sure the ground pads of the module and PCB are fully connected. According to customers application demands, the heatsink can be mounted on the top of the module, or the opposite side of the PCB area where the module is mounted, or both of them. The heatsink should be designed with as many fins as possible to increase heat dissipation area. Meanwhile, a thermal pad with high thermal conductivity should be used between the heatsink and module/PCB. The following shows two kinds of heatsink designs for reference and customers can choose one or both of them according to their application structure. Figure 42: Referenced Heatsink Design (Heatsink at the Top of the Module) AG35_Hardware_Design 116 / 129 AG35 Module Heatsink Heatsink Thermal Pad Shielding Cover Application Board Application Board Automotive Module Series AG35 Hardware Design Figure 43: Referenced Heatsink Design (Heatsink at the Backside of Customers PCB) NOTES 1. For better performance, the maximum temperature of the internal BB chip should be kept below 105C. When the maximum temperature of the BB chip reaches or exceeds 105C, the module works normal but provides reduced performance (such as RF output power, data rate, etc.). When the maximum BB chip temperature reaches or exceeds 118C, the module will disconnect from the network, and it will recover to network connected state after the maximum temperature falls below 118C. Therefore, the thermal design should be maximally optimized to make sure the maximum BB chip temperature always maintains below 105C. Customers can execute AT+QTEMP command and get the maximum BB chip temperature from the first returned value. 2. For more detailed introduction on thermal design, please refer to document [7]. AG35_Hardware_Design 117 / 129 AG35 Module Thermal Pad Thermal Pad Heatsink Application Board Shielding Cover Application Board Heatsink Automotive Module Series AG35 Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm, and the tolerances for dimensions without tolerance values are 0.05mm. 7.1. Mechanical Dimensions of the Module Pin 1 Figure 44: Module Top and Side Dimensions AG35_Hardware_Design 118 / 129 3.00 0.20 5 1

. 0 0 0

. 3 3 37.50 0.15 Automotive Module Series AG35 Hardware Design Figure 45: Module Bottom Dimensions (Top View) Pin 1 AG35_Hardware_Design 119 / 129 3.45 3.15 3.45 3.50 R0.70 2.50 2.75 1.40 33.00 0.15 1.30 3.15 1.65 3.30 0.70 37.50 0.15 0.70 1.00 Automotive Module Series AG35 Hardware Design 7.2. Recommended Footprint Pin 1 Figure 46: Module Bottom Dimensions (Top View) NOTE For convenient maintenance of the module, please keep about 3mm between the module and other components on the host PCB. AG35_Hardware_Design 120 / 129 3.45 4.45 3.80 3.15 0.70 R0.70 2.75 3.30 4.1 3.45 3.50 33.000.15 1.40 2.50 1.30 3.15 1.00 1.65 0.70 1.30 1.30 37.500.15 3.45 0.30 0.35 3.15 3.80 0.50 1.30 1.00 0.70 Automotive Module Series AG35 Hardware Design 7.3. Design Effect Drawings of the Module Figure 47: Top View of the Module Figure 48: Bottom View of the Module NOTE These are renderings of AG35 module. For authentic appearance, please refer to the module that you receive from Quectel. AG35_Hardware_Design 121 / 129 Automotive Module Series AG35 Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage AG35 is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at < 40C/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:

Mounted within 168 hours at the factory environment of 30C/60%RH. Stored at <10% RH. 3. Devices require baking before mounting, if any circumstance below occurs:

When the ambient temperature is 23C5C and the humidity indicator card shows the humidity is >10% before opening the vacuum-sealed bag. Device mounting cannot be finished within 168 hours at factory conditions of 30C/60% RH. If baking is required, devices may be baked for 8 hours at 120C5C. As the plastic package cannot be subjected to high temperature, it should be removed from devices before high to temperature (120C) baking. IPC/JEDECJ-STD-033 for baking procedure. is desired, please refer If shorter baking time 4. NOTE AG35_Hardware_Design 122 / 129 Automotive Module Series AG35 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.13mm~0.15mm. For more details, please refer to document [6]. It is suggested that the peak reflow temperature is 238~245C, and the absolute maximum reflow temperature is 245C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 49: Recommended Reflow Soldering Thermal Profile Factor Soak Zone Max slope Table 70: Recommended Thermal Profile Parameters Recommendation 1 to 3C/sec Soak time (between A and B: 150C and 200C) 60 to 120 sec AG35_Hardware_Design 123 / 129 Temp. (C) 245 238 220 200 150 100 Soak Zone A Max slope: 1~3C/sec Reflow Zone Max slope:

2~3C/sec C Cooling down slope: 1~4C/sec B D Automotive Module Series AG35 Hardware Design Reflow Zone Max slope Reflow time (D: over 220C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle 8.3. Packaging 2 to 3C/sec 40 to 60 sec 238C ~ 245C 1 to 4C/sec 1 AG35 is packaged in tape and reel carriers. One reel is 10.56 meters long and contains 220 modules. The figures below show the package details, measured in mm. Figure 50: Tape Specifications AG35_Hardware_Design 124 / 129 Automotive Module Series AG35 Hardware Design Figure 51: Reel Specifications AG35_Hardware_Design 125 / 129 Cover tape Direction of Feed Automotive Module Series AG35 Hardware Design 9 Appendix A References Table 71: Related Documents SN Document Name Remark Quectel_AG35_Power_Management_Application_ Note AG35 Power Management Application Note Quectel_AG35_AT_Commands_Manual AG35 AT Commands Manual Quectel_UMTS&LTE_EVB_User_Guide UMTS&LTE EVB User Guide Quectel_AG35_GNSS_AT_Commands_Manual AG35 GNSS AT Commands Manual Quectel_RF_Layout_Application_Note RF Layout Application Note Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Quectel_LTE_Module_Thermal_Design_Guide Thermal Design Guide for Quectel LTE

(LTE/LTE-A/Automotive) modules Table 72: Terms and Abbreviations Abbreviation Description Adaptive Multi-rate Bits Per Second Coding Scheme Circuit Switched Data Clear To Send CHAP Challenge Handshake Authentication Protocol DC-HSPA+

Dual-carrier High Speed Packet Access DFOTA Delta Firmware Upgrade Over The Air

[1]

[2]

[3]

[4]

[5]

[6]

[7]

AMR bps CS CSD CTS AG35_Hardware_Design 126 / 129 Automotive Module Series AG35 Hardware Design GLONASS GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System DL DTR DTX EAVB EFR ESD EVDO FDD FR GMSK GNSS GPS GSM HR HSPA HSDPA HSUPA I/O LED LNA LTE MIMO MO Downlink Data Terminal Ready Discontinuous Transmission Ethernet Audio Video Bridging Enhanced Full Rate Electrostatic Discharge Evolution-Data Optimized Frequency Division Duplex Full Rate Gaussian Minimum Shift Keying Global Navigation Satellite System Global Positioning System Global System for Mobile Communications Half Rate High Speed Packet Access High Speed Downlink Packet Access High Speed Uplink Packet Access Input/Output Light Emitting Diode Low Noise Amplifier Long Term Evolution Multiple Input Multiple Output Mobile Originated LVCMOS Low Voltage Complementary Metal Oxide Semiconductor AG35_Hardware_Design 127 / 129 Automotive Module Series AG35 Hardware Design MOS MS MT PAP PCB PDU PPP QAM QPSK RF RHCP Rx SIM SMS TDD TX UL UMTS URC

(U)SIM Vmax Vnorm Vmin Mean Opinion Score Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Quadrature Amplitude Modulation Quadrature Phase Shift Keying Radio Frequency Right Hand Circularly Polarized Receive Subscriber Identification Module Short Message Service Time Division Duplexing Transmitting Direction Uplink Universal Mobile Telecommunications System Unsolicited Result Code

(Universal) Subscriber Identity Module Maximum Voltage Value Normal Voltage Value Minimum Voltage Value TDMA Time Division Multiple Access TD-SCDMA Time Division-Synchronous Code Division Multiple Access AG35_Hardware_Design 128 / 129 Automotive Module Series AG35 Hardware Design Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio VIHmax VIHmin VILmax VILmin VImax VImin Vax Vin VOLmax VOLmin VSWR WCDMA Wideband Code Division Multiple Access AG35_Hardware_Design 129 / 129 Automotive Module Series AG35 Hardware Design 10 Appendix B GPRS Coding Schemes Table 73: Description of Different Coding Schemes Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits Data Rate Kb/s Radio Block excl.USF and BCS 181 268 CS-1 CS-2 CS-3 CS-4 2/3 3/4 1/2 3 3 40 4 456 0 3 6 16 4 588 132 9.05 13.4 1 3 12 428 16 456

21.4 3 6 312 16 4 676 220 15.6 AG35_Hardware_Design 130 / 129 Automotive Module Series AG35 Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 74: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA 1 1 2 1 2 2 3 1 2 2 3 4 3 4 AG35_Hardware_Design 131 / 129 Automotive Module Series AG35 Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 AG35_Hardware_Design 132 / 129 Automotive Module Series AG35 Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 75: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot GMSK GMSK GMSK GMSK GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK

C B A C B A B A A 9.05kbps 18.1kbps 36.2kbps 13.4kbps 26.8kbps 53.6kbps 15.6kbps 31.2kbps 62.4kbps 21.4kbps 42.8kbps 85.6kbps 8.80kbps 17.60kbps 35.20kbps 11.2kbps 22.4kbps 44.8kbps 14.8kbps 29.6kbps 59.2kbps 17.6kbps 35.2kbps 70.4kbps 22.4kbps 44.8kbps 89.6kbps 29.6kbps 59.2kbps 118.4kbps 44.8kbps 89.6kbps 179.2kbps 54.4kbps 108.8kbps 217.6kbps 59.2kbps 118.4kbps 236.8kbps CS-1:

CS-2:

CS-3:

CS-4:

MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 AG35_Hardware_Design 133 / 129