FCC ID: XMR202106EG95AUX LTE Module

 

EG95 Series Hardware Design LTE Standard Module Series Version: 1.8 Date: 2020-08-24 Status: Preliminary www.quectel.com LTE Standard Module Series EG95 Series Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.htm. For technical support, or to report documentation errors, please visit:

http://www.quectel.com/support/technical.htm or email to support@quectel.com. GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. DISCLAIMER WHILE QUECTEL HAS MADE EFFORTS TO ENSURE THAT THE FUNCTIONS AND FEATURES UNDER DEVELOPMENT ARE FREE FROM ERRORS, IT IS POSSIBLE THAT THESE FUNCTIONS AND FEATURES COULD CONTAIN ERRORS, INACCURACIES AND OMISSIONS. UNLESS OTHERWISE PROVIDED BY VALID AGREEMENT, QUECTEL MAKES NO WARRANTIES OF ANY KIND, IMPLIED OR EXPRESS, WITH RESPECT TO THE USE OF FEATURES AND FUNCTIONS UNDER DEVELOPMENT. TO THE MAXIMUM EXTENT PERMITTED BY LAW, QUECTEL EXCLUDES ALL LIABILITY FOR ANY LOSS OR DAMAGE SUFFERED IN CONNECTION WITH THE USE OF THE FUNCTIONS AND FEATURES UNDER DEVELOPMENT, REGARDLESS OF WHETHER SUCH LOSS OR DAMAGE MAY HAVE BEEN FORESEEABLE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCING, DISSEMINATING AND EDITING THIS DOCUMENT AS WELL AS USING THE CONTENT WITHOUT PERMISSION ARE FORBIDDEN. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2020. All rights reserved. EG95_Series_Hardware_Design 1 / 99 LTE Standard Module Series EG95 Series Hardware Design About the Document Revision History Version Date Author Description 1.0 2017-03-22 Initial Felix YIN/

Yeoman CHEN/

Jackie WANG 1.1 2018-01-04 Yeoman CHEN/

Rex WANG 1.2 2018-03-14 Felix YIN/

Rex WANG 1. Added band B28A. 2. Updated the description of UMTS and GSM features in Table 2. 3. Updated the functional diagram in Figure 1. 4. Updated module operating frequencies in 5. Updated current consumption in Table 26. 6. Updated the conducted RF receiving sensitivity in Table 28. 7. Updated the GPRS multi-slot classes in Table 21. Table 33. 8. Added thermal consideration in Chapter 5.8 9. Added a GND pad in each of the four corners of the modules footprint in Chapter 6.2. 10. Added packaging information in Chapter 7.3. 1. Added the description of EG95-NA. 2. Updated the functional diagram in Figure 1. 3. Updated pin assignment in Figure 2. 4. Updated GNSS function in Table 1. 5. Updated GNSS Features in Table 2. 6. Updated reference circuit of USB interface in 7. Added description of GNSS receiver in 8. Updated pin definition of RF antenna in Table Figure 21. Chapter 4. 21. EG95_Series_Hardware_Design 2 / 99 1.3 2019-05-24 Ward WANG/

Nathan LIU/

Rex WANG LTE Standard Module Series EG95 Series Hardware Design 9. Updated module operating frequencies in Table 22. 10. Added description of GNSS antenna interface in Chapter 5.2. 11. Updated antenna requirements in Table 25. 12. Updated RF output power in Table 32. 1. Added variant EG95-EX and related 2. Updated functional diagram in Figure 1. 3. Updated pin assignment (top view) in 4. Updated pin description in Table 4. 5. Updated star structure of power supply in information. Figure 2. Figure 8. 6. Updated the reference circuit of turning on the module using PWRKEY in Figure 10. 7. Updated the power-on scenario in Figure 12. 8. Updated reference circuit of SPI interface with peripherals in Figure 25. 9. Updated GNSS performance in Table 20. 10. Updated module operating frequencies in 11. Updated GNSS frequency in Table 24. 12. Updated antenna requirements in Table 25. 13. Updated EG95-NA current consumption in 14. Adeed EG95-EX current consumption in 15. Updated EG95-E conducted RF receiving 16. Updated EG95-NA conducted RF receiving sensitivity in Table 34. sensitivity in Table 35. 17. Added EG95-EX conducted RF receiving in Table 36.Updated GNSS sensitivity in Table current consumption of EG95 in Table 32.Updated related documents 38.Updated reference circuit of PWRKEY interface in Figure 10. 18. Updated description of (U)SIM in Chapter 3.9. 3.11. 19. Updated description of UART in Chapter 20. Added description of ADC interface in Chapter 3.16. Table 22. Table 30. Table 31. EG95_Series_Hardware_Design 3 / 99 1.4 2019-07-05 Ward WANG 1.5 2019-08-09 Fanny CHEN/

Rex WANG 1.7 2020-04-15 Ward WANG LTE Standard Module Series EG95 Series Hardware Design 21. Added description of USB_BOOT interface in Chapter 3.18. 22. Updated description of manufacturing and soldering in Chapter 8.2. 1. Updated supported protocols (Table 2). 2. Updated timing of turning on module (Figure 12). 3. DFOTA is developed. 4. Updated description of USB_BOOT interface and timing sequence for entering emergency download mode (Chapter 3.18 and Figure 29). 1. Added ThreadX module EG95-NAX and updated related contents (Table 1 and 4, Chapter 2.2, 2.3, 3.2 and 5). 2. Updated module operating frequencies 3. Updated antenna requirements (Table 28). 4. Added current consumption of EG95-NAX

(Table 25).

(Table 35). 5. Updated RF output power (Table 37). 6. Updated EG95-NA conducted RF receiving 7. Added EG95-NAX conducted RF receiving sensitivity (Table 39). sensitivity (Table 41). 1. Removed related information of ThreadX OS. 2. Updated the supported USB serial drivers

(Table 2)

(Chapter 4.2). 4. Updated the AT command be used to disable the receive diversity (Chapter 5.1.3). 1. Updated description of airplane mode

(Chapter 3.5.2). 2. Updated the interface (Chapter 3.11). functions of main UART 3. Added the note about the standard that the the module level of package warpage conforms to (Chapter 7.1). 4. Updated module

(Chapter 8.1). storage information 5. Updated module manufacturing soldering information (Chapter 8.2). and 1.6 2019-11-07 Ward WANG 3. Updated the notes for GNSS performance EG95_Series_Hardware_Design 4 / 99 1.8 2020-08-24 Frank WANG Added EG95-AUX and related information (Table 1, 36 and 43). LTE Standard Module Series EG95 Series Hardware Design EG95_Series_Hardware_Design 5 / 99 Contents LTE Standard Module Series EG95 Series Hardware Design About the Document ...................................................................................................................................2 Contents .......................................................................................................................................................6 Table Index ...................................................................................................................................................8 Figure Index .............................................................................................................................................. 10 1 Introduction ....................................................................................................................................... 12 Safety Information ................................................................................................................... 13 1.1. 2 Product Concept ............................................................................................................................... 14 2.1. General Description ................................................................................................................ 14 Key Features ........................................................................................................................... 15 2.2. Functional Diagram ................................................................................................................. 18 2.3. Evaluation Board ..................................................................................................................... 19 2.4. 3.6. 3 Application Interfaces ....................................................................................................................... 20 3.1. General Description ................................................................................................................ 20 Pin Assignment ....................................................................................................................... 21 3.2. 3.3. Pin Description ........................................................................................................................ 22 3.4. Operating Modes..................................................................................................................... 29 Power Saving .......................................................................................................................... 30 3.5. 3.5.1. Sleep Mode ................................................................................................................... 30 3.5.1.1. UART Application ................................................................................................ 30 3.5.1.2. USB Application with USB Remote Wakeup Function ........................................ 31 3.5.1.3. USB Application with USB Suspend/Resume and RI Function ........................... 31 3.5.1.4. USB Application without USB Suspend Function ................................................ 32 3.5.2. Airplane Mode ............................................................................................................... 33 Power Supply .......................................................................................................................... 33 3.6.1. Power Supply Pins ........................................................................................................ 33 3.6.2. Decrease Voltage Drop ................................................................................................. 34 3.6.3. Reference Design for Power Supply ............................................................................. 35 3.6.4. Monitor the Power Supply ............................................................................................. 36 Power-on/off Scenarios ........................................................................................................... 36 Turn on Module Using the PWRKEY ............................................................................. 36 Turn off Module ............................................................................................................. 38 Turn off Module Using the PWRKEY Pin ............................................................ 38 Turn off Module Using AT Command .................................................................. 38 3.8. Reset the Module .................................................................................................................... 39

(U)SIM Interfaces .................................................................................................................... 40 3.9. 3.10. USB Interface .......................................................................................................................... 43 3.11. UART Interfaces ...................................................................................................................... 44 3.12. PCM and I2C Interfaces .......................................................................................................... 47 3.13. SPI Interface ........................................................................................................................... 49 3.14. Network Status Indication ....................................................................................................... 50 3.7.2.1. 3.7.2.2. 3.7.1. 3.7.2. 3.7. EG95_Series_Hardware_Design 6 / 99 LTE Standard Module Series EG95 Series Hardware Design 3.15. STATUS .................................................................................................................................. 51 3.16. ADC Interface ......................................................................................................................... 52 3.17. Behaviors of RI........................................................................................................................ 52 3.18. USB_BOOT Interface.............................................................................................................. 53 4 GNSS Receiver .................................................................................................................................. 55 4.1. General Description ................................................................................................................ 55 4.2. GNSS Performance ................................................................................................................ 55 Layout Guidelines ................................................................................................................... 56 4.3. 5 Antenna Interfaces ............................................................................................................................ 57 5.1. Main/Rx-diversity Antenna Interfaces ..................................................................................... 57 5.1.1. Pin Definition ................................................................................................................. 57 5.1.2. Operating Frequency ..................................................................................................... 57 5.1.3. Reference Design of RF Antenna Interface ................................................................... 58 5.1.4. Reference Design of RF Layout .................................................................................... 59 5.2. GNSS Antenna Interface ......................................................................................................... 61 Antenna Installation ................................................................................................................. 62 5.3. 5.3.1. Antenna Requirement .................................................................................................... 62 5.3.2. Recommended RF Connector for Antenna Installation ................................................. 63 6 Electrical, Reliability and Radio Characteristics ............................................................................ 65 Absolute Maximum Ratings .................................................................................................... 65 6.1. 6.2. Power Supply Ratings ............................................................................................................. 65 6.3. Operation and Storage Temperatures ..................................................................................... 66 6.4. Current Consumption .............................................................................................................. 67 6.5. RF Output Power .................................................................................................................... 77 6.6. RF Receiving Sensitivity ......................................................................................................... 77 Electrostatic Discharge ........................................................................................................... 80 6.7. Thermal Consideration ............................................................................................................ 81 6.8. 7 Mechanical Dimensions ................................................................................................................... 83 7.1. Mechanical Dimensions of the Module ................................................................................... 83 7.2. Recommended Footprint ........................................................................................................ 85 Top and Bottom Views of the Module ..................................................................................... 86 7.3. 8 Storage, Manufacturing and Packaging .......................................................................................... 87 8.1. Storage .................................................................................................................................... 87 8.2. Manufacturing and Soldering .................................................................................................. 88 Packaging ............................................................................................................................... 89 8.3. 9 Appendix A References .................................................................................................................... 92 10 Appendix B GPRS Coding Schemes ............................................................................................... 96 11 Appendix C GPRS Multi-slot Classes ............................................................................................. 97 12 Appendix D EDGE Modulation and Coding Schemes ................................................................... 99 EG95_Series_Hardware_Design 7 / 99 LTE Standard Module Series EG95 Series Hardware Design Table Index Table 1: Frequency Bands of EG95 Series Module .................................................................................... 14 Table 2: Key Features of EG95 Module ...................................................................................................... 15 Table 3: IO Parameters Definition ............................................................................................................... 22 Table 4: Pin Description .............................................................................................................................. 22 Table 5: Overview of Operating Modes ........................................................................................................... 29 Table 6: Pin Definition of VBAT and GND Pins ........................................................................................... 33 Table 7: Pin Definition of PWRKEY ............................................................................................................ 36 Table 8: Pin Definition of RESET_N ........................................................................................................... 39 Table 9: Pin Definition of (U)SIM Interfaces ................................................................................................ 41 Table 10: Pin Definition of USB Interface.................................................................................................... 43 Table 11: Pin Definition of Main UART Interfaces ....................................................................................... 45 Table 12: Pin Definition of Debug UART Interface ...................................................................................... 45 Table 13: Logic Levels of Digital I/O ........................................................................................................... 45 Table 14: Pin Definition of PCM and I2C Interfaces .................................................................................... 48 Table 15: Pin Definition of SPI Interface ..................................................................................................... 49 Table 16: Pin Definition of Network Status Indicator ................................................................................... 50 Table 17: Working State of Network Status Indicator ................................................................................. 50 Table 18: Pin Definition of STATUS ............................................................................................................ 51 Table 19: Pin Definition of ADC Interface ................................................................................................... 52 Table 20: Characteristics of ADC Interface ................................................................................................. 52 Table 21: Default Behaviors of RI ............................................................................................................... 53 Table 22: Pin Definition of USB_BOOT Interface ....................................................................................... 53 Table 23: GNSS Performance .................................................................................................................... 55 Table 24: Pin Definition of RF Antennas ..................................................................................................... 57 Table 25: Module Operating Frequencies ................................................................................................... 57 Table 26: Pin Definition of GNSS Antenna Interface ................................................................................... 61 Table 27: GNSS Frequency ........................................................................................................................ 61 Table 28: Antenna Requirements ................................................................................................................ 62 Table 29: Absolute Maximum Ratings ........................................................................................................ 65 Table 30: Power Supply Ratings ................................................................................................................. 65 Table 31: Operation and Storage Temperatures ......................................................................................... 66 Table 32: EG95-E Current Consumption .................................................................................................... 67 Table 33: EG95-NA Current Consumption .................................................................................................. 69 Table 34: EG95-EX Current Consumption .................................................................................................. 70 Table 35: EG95-NAX Current Consumption ............................................................................................... 72 Table 36: EG95-AUX Current Consumption ............................................................................................... 73 Table 37: GNSS Current Consumption of EG95 ........................................................................................ 76 Table 38: RF Output Power ........................................................................................................................ 77 Table 39: EG95-E Conducted RF Receiving Sensitivity ............................................................................. 77 Table 40: EG95-NA Conducted RF Receiving Sensitivity ........................................................................... 78 Table 41: EG95-EX Conducted RF Receiving Sensitivity ........................................................................... 78 Table 42: EG95-NAX Conducted RF Receiving Sensitivity ........................................................................ 79 EG95_Series_Hardware_Design 8 / 99 LTE Standard Module Series EG95 Series Hardware Design Table 43: EG95-AUX Conducted RF Receiving Sensitivity ........................................................................ 79 Table 44: Electrostatic Discharge Characteristics (25 C, 45% Relative Humidity) .................................... 80 Table 45: Recommended Thermal Profile Parameters ............................................................................... 89 Table 46: Related Documents ..................................................................................................................... 92 Table 47: Terms and Abbreviations ............................................................................................................. 92 Table 48: Description of Different Coding Schemes ................................................................................... 96 Table 49: GPRS Multi-slot Classes ............................................................................................................. 97 Table 50: EDGE Modulation and Coding Schemes .................................................................................... 99 EG95_Series_Hardware_Design 9 / 99 Figure Index LTE Standard Module Series EG95 Series Hardware Design Figure 1: Functional Diagram ..................................................................................................................... 18 Figure 2: Pin Assignment (Top View) .......................................................................................................... 21 Figure 3: Sleep Mode Application via UART ............................................................................................... 30 Figure 4: Sleep Mode Application with USB Remote Wakeup ................................................................... 31 Figure 5: Sleep Mode Application with RI ................................................................................................... 32 Figure 6: Sleep Mode Application without Suspend Function .................................................................... 32 Figure 7: Power Supply Limits during Burst Transmission ......................................................................... 34 Figure 8: Star Structure of Power Supply ................................................................................................... 35 Figure 9: Reference Circuit of Power Supply ............................................................................................. 35 Figure 10: Turn on the Module by Using Driving Circuit ............................................................................. 36 Figure 11: Turn on the Module by Using Keystroke .................................................................................... 37 Figure 12: Timing of Turning on Module ..................................................................................................... 37 Figure 13: Timing of Turning off Module ..................................................................................................... 38 Figure 14: Reference Circuit of RESET_N by Using Driving Circuit .......................................................... 39 Figure 15: Reference Circuit of RESET_N by Using Button ....................................................................... 40 Figure 16: Timing of Resetting Module ....................................................................................................... 40 Figure 17: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector ........................... 42 Figure 18: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector ............................. 42 Figure 19: Reference Circuit of USB Interface ........................................................................................... 44 Figure 20: Reference Circuit with Translator Chip ...................................................................................... 46 Figure 21: Reference Circuit with Transistor Circuit ................................................................................... 46 Figure 22: Primary Mode Timing ................................................................................................................ 47 Figure 23: Auxiliary Mode Timing ............................................................................................................... 48 Figure 24: Reference Circuit of PCM and I2C Application with Audio Codec ............................................. 49 Figure 25: Reference Circuit of SPI Interface with Peripherals .................................................................. 50 Figure 26: Reference Circuit of Network Status Indicator........................................................................... 51 Figure 27: Reference Circuit of STATUS .................................................................................................... 51 Figure 28: Reference Circuit of USB_BOOT Interface ............................................................................... 54 Figure 29: Timing Sequence for Entering Emergency Download Mode ..................................................... 54 Figure 30: Reference Circuit of RF Antenna Interface ................................................................................ 59 Figure 31: Microstrip Design on a 2-layer PCB .......................................................................................... 59 Figure 32: Coplanar Waveguide Design on a 2-layer PCB ........................................................................ 60 Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) ..................... 60 Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) ..................... 60 Figure 35: Reference Circuit of GNSS Antenna ......................................................................................... 62 Figure 36: Dimensions of the U.FL-R-SMT Connector (Unit: mm) ............................................................. 63 Figure 37: Mechanicals of U.FL-LP Connectors ......................................................................................... 64 Figure 38: Space Factor of Mated Connector (Unit: mm) ........................................................................... 64 Figure 39: Referenced Heatsink Design (Heatsink at the Top of the Module) ............................................ 81 Figure 40: Referenced Heatsink Design (Heatsink at the Backside of Customers PCB) .......................... 82 Figure 41: Module Top and Side Dimensions ............................................................................................. 83 EG95_Series_Hardware_Design 10 / 99 LTE Standard Module Series EG95 Series Hardware Design Figure 42: Module Bottom Dimensions (Top View) .................................................................................... 84 Figure 43: Recommended Footprint (Top View) ......................................................................................... 85 Figure 44: Top View of the Module ............................................................................................................. 86 Figure 45: Bottom View of the Module ........................................................................................................ 86 Figure 46: Recommended Reflow Soldering Thermal Profile .................................................................... 88 Figure 47: Tape Specifications .................................................................................................................... 90 Figure 48: Reel Specifications .................................................................................................................... 90 Figure 49: Tape and Reel Directions .......................................................................................................... 91 EG95_Series_Hardware_Design 11 / 99 LTE Standard Module Series EG95 Series Hardware Design 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed. End Product Labeling When the module is installed in the host device, the FCC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text:

Contains FCC ID: XMR202106EG95AUX The FCC ID can be used only when all FCC compliance requirements are met. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-

evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can EG95_Series_Hardware_Design 12 / 99 LTE Standard Module Series EG95 Series Hardware Design be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:

- Reorient or relocate the receiving antenna.

- Increase the separation between the equipment and receiver.

- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

- Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation,maximum antenna gain (including cable loss)must not exceed:

GSM850/WCDMA Band5/LTE Band 5: 7.0dBi GSM1900/WCDMA Band2/LTE Band 2: 3.0dBi LTE Band 4/ LTE Band 66 5.0dBi LTE Band 7: 8.0dBi Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator &

your body. EG95_Series_Hardware_Design 13 / 99 LTE Standard Module Series EG95 Series Hardware Design 1 Introduction This document defines EG95 series module, and describes its air interface and hardware interfaces which are connected with customers applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details as well as other related information of EG95 series module. To facilitate its application in different fields, relevant reference design is also provided for customers reference. Associated with application note and user guide, customers can use EG95 series module to design and set up mobile applications easily. Hereby, Quectel Wireless Solutions Co., Ltd. declares that the radio equipment type LTE Module EG95-

AUX is in compliance with Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address:

https://www.quectel.com/ProductDownload/

EG95_Series_Hardware_Design 14 / 99 LTE Standard Module Series EG95 Series Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating EG95 series module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be given to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If the device offers an Airplane Mode, then it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on boarding the aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as your phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. EG95_Series_Hardware_Design 15 / 99 LTE Standard Module Series EG95 Series Hardware Design 2 Product Concept 2.1. General Description EG95 series module is an embedded 4G wireless communication module with receive diversity. It supports LTE-FDD/WCDMA/GSM wireless communication, and provides data connectivity on LTE-FDD, DC-

HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE and GPRS networks. It can also provide voice functionality 1) to meet customers specific application demands. EG95 series contains 5 variants: EG95-

E, EG95-NA, EG95-EX, EG95-NAX and EG95-AUX.The following table shows the frequency bands of EG95 series module. Table 1: Frequency Bands of EG95 Series Module Module EG95-E LTE Bands

(with Rx-diversity) WCDMA

(with Rx-diversity) GSM GNSS 2) FDD:

B1/B3/B7/B8/B20/B28A B1/B8 900/1800 MHz Not supported EG95-NA FDD:

B2/B4/B5/B12/B13 B2/B4/B5 Not supported EG95-EX FDD:

B1/B3/B7/B8/B20/B28 B1/B8 900/1800 MHz EG95-NAX B2/B4/B5 Not supported EG95-AUX B1/B2/B5/B8 850/900/1800/1 900 FDD:

B2/B4/B5/B12/B13/B25/

B26 FDD:

B1/B2/B3/B4/B5/B7/B8 B28/B66 GPS, GLONASS, BeiDou/Compass, Galileo, QZSS GPS, GLONASS, BeiDou/Compass, Galileo, QZSS GPS, GLONASS, BeiDou/Compass, Galileo, QZSS GPS, GLONASS, BeiDou/Compass, Galileo, QZSS NOTES 1. 1) EG95 contains Telematics version and Data-only version. Telematics version supports voice and data functions, while Data-only version only supports data function. 2. 2) GNSS function is optional. EG95_Series_Hardware_Design 16 / 99 LTE Standard Module Series EG95 Series Hardware Design With a compact profile of 29.0mm 25.0mm 2.3mm, EG95 can meet almost all requirements for M2M applications such as automotive, smart metering, tracking system, security, router, wireless POS, mobile computing device, PDA phone, tablet PC, etc. EG95 is an SMD type module which can be embedded into applications through its 106 LGA pads. EG95 is integrated with internet service protocols like TCP, UDP and PPP. Extended AT commands have been developed for customers to use these internet service protocols easily. 2.2. Key Features The following table describes the detailed features of EG95 module. Table 2: Key Features of EG95 Module Description Features Power Supply Supply voltage: 3.34.3 V Typical supply voltage: 3.8 V Class 4 (33dBm2dB) for GSM850 Class 4 (33dBm2dB) for EGSM900 Class 1 (30dBm2dB) for DCS1800 Class 1 (30dBm2dB) for PCS1900 Class E2 (27dBm3dB) for GSM850 8-PSK Class E2 (27dBm3dB) for EGSM900 8-PSK Class E2 (26dBm3dB) for DCS1800 8-PSK Class E2 (26dBm3dB) for PCS1900 8-PSK Class 3 (24dBm+1/-3dB) for WCDMA bands Class 3 (23dBm2dB) for LTE-FDD bands Support up to non-CA Cat 4 FDD Support 1.4/3/5/10/15/20 MHz RF bandwidth Support MIMO in DL direction FDD: Max 150 Mbps (DL)/Max 50 Mbps (UL) Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA Support QPSK, 16-QAM and 64-QAM modulation DC-HSDPA: Max 42 Mbps (DL) HSUPA: Max 5.76 Mbps (UL) WCDMA: Max 384 kbps (DL)/ Max 384 kbps (UL) R99:

CSD: 9.6 kbps GPRS:

Transmitting Power LTE Features UMTS Features GSM Features EG95_Series_Hardware_Design 17 / 99 Internet Protocol Features Text and PDU modes Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default

(U)SIM Interfaces Support 1.8 V and 3.0 V (U)SIM cards LTE Standard Module Series EG95 Series Hardware Design Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 107 kbps (DL), Max 85.6 kbps (UL) EDGE:

Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: MCS 1-9 Uplink coding schemes: MCS 1-9 Max 296 kbps (DL)/Max 236.8 kbps (UL) Support TCP/UDP/PPP/FTP/FTPS/HTTP/HTTPS/NTP/PING/QMI/NITZ/

SMTP/SSL/MQTT/CMUX/SMTPS/MMS*/FILE* protocols Support PAP (Password Authentication Protocol) and CHAP (Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections Support one digital audio interface: PCM interface GSM: HR/FR/EFR/AMR/AMR-WB WCDMA: AMR/AMR-WB LTE: AMR/AMR-WB Support echo cancellation and noise suppression Used for audio function with external codec Support 16-bit linear data format Support long frame synchronization and short frame synchronization Support master and slave modes, but must be the master in long frame synchronization Compliant with USB 2.0 specification (slave only); the data transfer rate can reach up to 480 Mbps Used for AT command communication, data transmission, GNSS NMEA sentences output, software debugging, firmware upgrade and voice over USB Support USB serial drivers for: Windows 7/8/8.1/10, Linux 2.65.4, Android 4.x/5.x/6.x/7.x/8.x/9.x, etc. Main UART:

Used for AT command communication and data transmission Baud rates reach up to 921600 bps, 115200 bps by default Support RTS and CTS hardware flow control Debug UART:

Used for Linux console and log output SMS Audio Features PCM Interface USB Interface UART Interface EG95_Series_Hardware_Design 18 / 99 LTE Standard Module Series EG95 Series Hardware Design 115200 bps baud rate Provides a duplex, synchronous and serial communication link with the peripheral devices. Dedicated to one-to-one connection, without chip selection. 1.8 V operation voltage with clock rates up to 50 MHz. SPI Interface GNSS Features AT Commands Rx-diversity Support LTE/WCDMA Rx-diversity Gen8C Lite of Qualcomm Protocol: NMEA 0183 Data update rate: 1Hz by default Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT commands Network Indication NETLIGHT pin for network activity status indication Antenna Interfaces Including main antenna interface (ANT_MAIN), Rx-diversity antenna

(ANT_DIV) interface and GNSS antenna interface (ANT_GNSS)1) Physical Characteristics Temperature Range Size: (29.0 0.15) mm (25.0 0.15) mm (2.3 0.2) mm Package: LGA Weight: approx. 3.8 g Operation temperature range: -35 C to +75 C 2) Extended temperature range: -40 C to +85 C 3) Storage temperature range: -40 C to +90 C Firmware Upgrade USB interface or DFOTA RoHS All hardware components are fully compliant with EU RoHS directive NOTES 1. 2. 3. 4. 1) GNSS antenna interface is only supported on EG95-NA/-EX/-NAX/-AUX. 2) Within operation temperature range, the module is 3GPP compliant. 3) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call*, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to normal operation temperature levels, the module will meet 3GPP specifications again.

* means under development. EG95_Series_Hardware_Design 19 / 99 LTE Standard Module Series EG95 Series Hardware Design The following figure shows a block diagram of EG95 and illustrates the major functional parts. 2.3. Functional Diagram Power management Baseband DDR+NAND flash Radio frequency Peripheral interfaces VBAT_RF VBAT_BB PWRKEY RESET_N STATUS ANT_MAIN ANT_GNSS 1) ANT_DIV PAM Duplexer PRx SAW LNA SAW GPS Switch SAW DRx Transceiver PA Tx IQ Control NAND DDR2 SDRAM PMIC Control 19.2M XO Baseband VDD_EXT USB (U)SIM1 (U)SIM2 PCM I2C SPI UART GPIOs Figure 1: Functional Diagram NOTE 1) GNSS antenna interface is only supported on EG95-NA/-EX/-NAX/-AUX. EG95_Series_Hardware_Design 20 / 99 2.4. Evaluation Board LTE Standard Module Series EG95 Series Hardware Design In order to help customers develop applications with EG95, Quectel supplies an evaluation board

(UMTS&LTE EVB), USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [7]. EG95_Series_Hardware_Design 21 / 99 LTE Standard Module Series EG95 Series Hardware Design 3 Application Interfaces 3.1. General Description EG95 is equipped with 62 SMT pads and 44-pin ground/reserved pads that can be connected to cellular application platform. The subsequent chapters will provide detailed descriptions of the following functions/interfaces. Power supply

(U)SIM interfaces USB interface UART interfaces PCM and I2C interfaces SPI interface Status indication USB_BOOT interface EG95_Series_Hardware_Design 22 / 99 LTE Standard Module Series EG95 Series Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of EG95 module.

) X U A

X A N

X E

A N

5 9 G E

I V D _ T N A

) E

5 9 G E n o 6 5 n P i

D E V R E S E R ANT_GNSS (EG95-NA/-EX/-NAX/-AUX) ANT_DIV (EG95-E) I N A M _ T N A D N G D N G D N G D N G C N F R _ T A B V F R _ T A B V D N G D N G C N D N G 103 2 6 1 6 0 6 9 5 5 8 7 5 6 5 5 5 4 5 3 5 2 5 1 5 0 5 106 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 NC NC GND PCM_CLK PCM_SYNC PCM_DIN PCM_DOUT USB_VBUS USB_DP USB_DM NC NC NC NC PWRKEY 1) NC RESET_N RESERVED 80 79 100 99 82 102 63 83 USIM2_PRES ENCE 64 65 66 84 USIM2_CLK 85 USIM2_RST 86 USIM2_DATA 81 101 67 87 USIM2_VDD 94 74 68 88 89 90 91 92 69 70 71 72 98 97 96 95 78 77 76 93 73 75 USB_BOOT 46 48 45 47 49 44 43 42 41 39 40 38 37 36 35 34 33 32 105 GND USIM_GND USIM1_CLK USIM1_DATA USIM1_RST USIM1_VDD USIM1_PRESENCE I2C_SDA I2C_SCL RI DCD RTS CTS TX D RXD VBAT_BB VBAT_BB 104 9 1 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 0 3 1 3 Y D A E R _ P A S U T A T S T H G I L T E N D X R _ G B D D X T _ G B D 0 C D A D E V R E S E R K L C _ I P S I S O M _ I P S I O S M _ I P S T X E _ D D V R T D D N G POWER USB UART

(U)SIM PCM SPI ANT GND RESERVED OTHERS NC Figure 2: Pin Assignment (Top View) EG95_Series_Hardware_Design 23 / 99 Type AI AO DI DO IO OD PI PO LTE Standard Module Series EG95 Series Hardware Design NOTES 1) PWRKEY output voltage is 0.8 V because of the diode drop in the Qualcomm chipset. 1. 2. Keep all RESERVED pins and unused pins unconnected. 3. GND pads should be connected to ground in the design. 4. Please note that the definition of pin 49 and 56 are different among EG95-E and EG95-NA/-EX/-

NAX/-AUX. For more details, please refer to Table 4. 3.3. Pin Description The following tables show the pin definition of EG95 module. Table 3: IO Parameters Definition Description Analog Input Analog Output Digital Input Digital Output Bidirectional Open Drain Power Input Power Output Table 4: Pin Description Power Supply Pin Name Pin No. I/O Description Comment DC Characteristics Vmax = 4.3 V Vmin = 3.3 V Vnorm = 3.8 V Power supply for modules baseband part VBAT_BB 32, 33 PI It must be provided with sufficient current up to 0.8 A. VBAT_RF 52, 53 PI Power supply for Vmax = 4.3 V It must be provided EG95_Series_Hardware_Design 24 / 99 modules RF part Vmin = 3.3 V Vnorm = 3.8 V VDD_EXT 29 PO Provide 1.8 V for external circuit Vnorm = 1.8 V IOmax = 50 mA LTE Standard Module Series EG95 Series Hardware Design with sufficient current up to 1.8 A in a burst transmission. Power supply for external GPIOs pull up circuits. If unused, keep it open. GND Ground 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 6774, 7982, 8991, 100106 Power-on/off Pin Name Pin No. I/O Description DC Characteristics Comment PWRKEY 15 DI Turn on/off the module VH = 0.8 V RESET_N 17 DI Reset signal of the module VIHmax = 2.1 V VIHmin = 1.3 V VILmax = 0.5 V The output voltage is 0.8 V because of the diode drop in the Qualcomm chipset. Pull-up to 1.8 V internally. Active low. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment Indicate the modules operation status Indicate the modules network activity status VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. Status Indication STATUS 20 DO NETLIGHT 21 DO USB Interface Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS 8 PI USB connection detection Vmax = 5.25 V Vmin = 3.0 V Vnorm = 5.0 V Typical: 5.0 V If unused, keep it open. EG95_Series_Hardware_Design 25 / 99 LTE Standard Module Series EG95 Series Hardware Design USB 2.0 Compliant. Require differential USB 2.0 Compliant. impedance of 90 . Require differential impedance of 90 . USB_DP 9 USB_DM 10 IO IO USB differential data bus (+) USB differential data bus (-)

(U)SIM Interfaces Pin No. USIM_GND Specified ground for (U)SIM card Pin Name I/O Description DC Characteristics Comment USIM1_VDD PO Power supply for

(U)SIM card Either 1.8 V or 3.0 V is supported by the module automatically. 47 43 45 46 USIM1_DATA IO Data signal of

(U)SIM card USIM1_CLK DO Clock signal of

(U)SIM card IOmax = 50 mA For 1.8 V (U)SIM:

Vmax = 1.9 V Vmin = 1.7 V For 3.0 V (U)SIM:

Vmax = 3.05 V Vmin = 2.7 V For 1.8 V (U)SIM:

VILmax = 0.6 V VIHmin = 1.2 V VOLmax = 0.45 V VOHmin = 1.35 V For 3.0 V (U)SIM:

VILmax = 1.0 V VIHmin = 1.95 V VOLmax = 0.45 V VOHmin = 2.55 V For 1.8 V (U)SIM:

VOLmax = 0.45 V VOHmin = 1.35 V For 3.0 V (U)SIM:

VOLmax = 0.45 V VOHmin = 2.55 V EG95_Series_Hardware_Design 26 / 99 LTE Standard Module Series EG95 Series Hardware Design 1.8 V power domain. If unused, keep it open. Either 1.8 V or 3.0 V is supported by the module automatically. USIM1_RST 44 DO Reset signal of

(U)SIM card USIM1_ PRESENCE 42 DI

(U)SIM card insertion detection USIM2_VDD 87 PO Power supply for

(U)SIM card USIM2_DATA 86 IO Data signal of

(U)SIM card USIM2_CLK 84 DO Clock signal of

(U)SIM card USIM2_RST 85 DO Reset signal of

(U)SIM card For 1.8 V (U)SIM:

VOLmax = 0.45 V VOHmin = 1.35 V For 3.0 V (U)SIM:

VOLmax = 0.45 V VOHmin = 2.55 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V For 1.8 V (U)SIM:

Vmax = 1.9 V Vmin = 1.7 V For 3.0 V (U)SIM:

Vmax = 3.05 V Vmin = 2.7 V IOmax = 50 mA For 1.8 V (U)SIM:

VILmax = 0.6 V VIHmin = 1.2 V VOLmax = 0.45 V VOHmin = 1.35 V For 3.0 V (U)SIM:

VILmax = 1.0 V VIHmin = 1.95 V VOLmax = 0.45 V VOHmin = 2.55 V For 1.8 V (U)SIM:

VOLmax = 0.45 V VOHmin = 1.35 V For 3.0 V (U)SIM:

VOLmax = 0.45 V VOHmin = 2.55 V For 1.8 V (U)SIM:

VOLmax = 0.45 V VOHmin = 1.35 V For 3.0 V (U)SIM:

VOLmax = 0.45 V VOHmin = 2.55 V EG95_Series_Hardware_Design 27 / 99 LTE Standard Module Series EG95 Series Hardware Design USIM2_ PRESENCE 83 DI

(U)SIM card insertion detection Main UART Interface VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment RI 39 DO Ring indicator VOLmax = 0.45 V VOHmin = 1.35 V DCD 38 DO Data carrier detection VOLmax = 0.45 V VOHmin = 1.35 V CTS 36 DO Clear to send RTS 37 DI Request to send DTR 30 DI Data terminal ready. Sleep mode control. TXD 35 DO Transmit data RXD 34 DI Receive data Debug UART Interface VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. 1.8 V power domain. Pull-up by default. Low level wakes up the module. If unused, keep it open. 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment DBG_TXD 23 DO Transmit data DBG_RXD 22 DI Receive data VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. EG95_Series_Hardware_Design 28 / 99 PCM Interface Pin Name Pin No. I/O Description DC Characteristics Comment LTE Standard Module Series EG95 Series Hardware Design VIHmax = 2.0V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. 1.8 V power domain. In master mode, it is an output signal. In slave mode, it is an input signal. If unused, keep it open. 1.8 V power domain. In master mode, it is an output signal. In slave mode, it is an input signal. If unused, keep it open. An external pull-up to 1.8 V is required. If unused, keep it open. An external pull-up to 1.8 V is required. If unused, keep it open. PCM_DIN 6 DI PCM data input PCM_DOUT 7 DO PCM data output PCM_SYNC 5 IO PCM data frame synchronization signal PCM_CLK 4 IO PCM clock I2C_SCL 40 OD I2C_SDA 41 OD ADC Interface I2C serial clock. Used for external codec I2C serial data. Used for external codec I2C Interface Pin Name Pin No. I/O Description DC Characteristics Comment Pin Name Pin No. I/O Description DC Characteristics Comment ADC0 24 AI General purpose analog to digital Voltage range:

0.3 V to VBAT_BB If unused, keep it open. EG95_Series_Hardware_Design 29 / 99 LTE Standard Module Series EG95 Series Hardware Design SPI Interface 1) converter Pin Name Pin No. I/O Description DC Characteristics Comment SPI_CLK 26 DO SPI_MOSI 27 DO SPI_MISO 28 DI RF Interfaces Clock signal of SPI interface VOLmax = 0.45 V VOHmin = 1.35 V Master output slave input of SPI interface Master input slave output of SPI interface VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. 1.8 V power domain. If unused, keep it open. Pin Name Pin No. I/O Description DC Characteristics Comment ANT_GNSS AI GNSS antenna pad ANT_DIV AI Receive diversity antenna pad 50 impedance. If unused, keep it open. The pin is defined as ANT_DIV on EG95-E. 50 impedance. If unused, keep it open. Pin 56 is reserved on EG95-E. 49

(EG95-

NA/-EX/

-NAX/-

AUX) 49

(EG95-E) 56

(EG95-

NA/-EX/

-NAX/-

AUX) ANT_MAIN 60 IO Main antenna pad 50 impedance. Other Pins Pin Name Pin No. I/O Description DC Characteristics Comment AP_READY 19 DI Application processor sleep state detection VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep it open. EG95_Series_Hardware_Design 30 / 99 LTE Standard Module Series EG95 Series Hardware Design USB_BOOT 75 RESERVED Pins Force the module to enter emergency download mode VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. It is recommended to reserve the test points. Pin Name Pin No. Description DC Characteristics Comment DI I/O 1,2, 1114, 16, 51, 57, 6366, 7678, 88, 9299 NC NC RESERVED 18, 25, 56 Reserved Keep these pins unconnected. Keep these pins unconnected. Pin 56 is only reserved on EG95-E. NOTE Keep all RESERVED pins and unused pins unconnected. 3.4. Operating Modes The following table briefly outlines the operating modes to be mentioned in the following chapters. Table 5: Overview of Operating Modes Mode Details Normal Operation Minimum Functionality Mode Idle Talk/Data Software is active. The module has registered on the network, and it is ready to send and receive data. Network connection is ongoing. In this mode, the power consumption is decided by network setting and data transfer rate. AT+CFUN=0 command can set the module to a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. Airplane Mode AT+CFUN=4 command or W_DISABLE# pin can set the module to enter airplane mode. In this case, RF function will be invalid. Sleep Mode In this mode, the current consumption of the module will be reduced to the minimal level. EG95_Series_Hardware_Design 31 / 99 LTE Standard Module Series EG95 Series Hardware Design During this mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally. Power Down Mode In this mode, the power management unit shuts down the power supply. Softwar goes inactive. The serial interface is not accessible. Operating voltage (connected to VBAT_RF and VBAT_BB) remains applied. 3.5. Power Saving 3.5.1. Sleep Mode 3.5.1.1. UART Application EG95 is able to reduce its current consumption to a minimum value during the sleep mode. The following sub-chapters describe the power saving procedures of EG95 module. If the host communicates with module via UART interface, the following preconditions can let the module enter sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Drive DTR to high level or keep it open. The following figure shows the connection between the module and the host. Module Host RXD TXD RI DTR AP_READY GND TXD RXD EINT GPIO GPIO GND Figure 3: Sleep Mode Application via UART Driving the host DTR to low level will wake up the module. When EG95 has a URC to report, RI signal will wake up the host. Please refer to Chapter 3.17 for details about RI behaviors. AP_READY will detect the sleep state of host (can be configured to high level or low level detection). Please refer to AT+QCFG="apready" for details. EG95_Series_Hardware_Design 32 / 99 LTE Standard Module Series EG95 Series Hardware Design 3.5.1.2. USB Application with USB Remote Wakeup Function If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions must be met to let the module enter sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open. The hosts USB bus, which is connected with the modules USB interface, enters suspend state. The following figure shows the connection between the module and the host. Module USB_VBUS USB_DP USB_DM AP_READY GND Host VDD USB_DP USB_DM GPIO GND Figure 4: Sleep Mode Application with USB Remote Wakeup Sending data to EG95 through USB will wake up the module. When EG95 has a URC to report, the module will send remote wakeup signals via USB bus so as to wake up the host. 3.5.1.3. USB Application with USB Suspend/Resume and RI Function If the host supports USB suspend/resume, but does not support remote wake-up function, the RI signal is needed to wake up the host. There are three preconditions to let the module enter sleep mode. Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open. The hosts USB bus, which is connected with the modules USB interface, enters suspended state. The following figure shows the connection between the module and the host. EG95_Series_Hardware_Design 33 / 99 LTE Standard Module Series EG95 Series Hardware Design Module USB_VBUS USB_DP USB_DM AP_READY RI GND Host VDD USB_DP USB_DM GPIO EINT GND Figure 5: Sleep Mode Application with RI Sending data to EG95 via USB will wake up the module. When module has a URC to report, RI signal will wake up the host. 3.5.1.4. USB Application without USB Suspend Function If the host does not support USB suspend function, USB_VBUS should be disconnected with an external control circuit to let the module enter sleep mode. Execute AT+QSCLK=1 command to enable the sleep mode. Ensure the DTR is held at high level or keep it open. Disconnect USB_VBUS. The following figure shows the connection between the module and the host. Module Host Power Switch USB_VBUS USB_DP USB_DM AP_READY RI GND GPIO VDD USB_DP USB_DM EINT GPIO GND Figure 6: Sleep Mode Application without Suspend Function Switching on the power switch to supply power to USB_VBUS will wake up the module. EG95_Series_Hardware_Design 34 / 99 LTE Standard Module Series EG95 Series Hardware Design Please pay attention to the level match shown in dotted line between the module and the host. Please refer to document [1] for more details about EG95 power management application. 3.5.2. Airplane Mode When the module enters airplane mode, the RF function will be disabled, and all AT commands related to it will be inaccessible. This mode can be set via the following ways. AT+CFUN command provides the choice of the functionality level through setting <fun> as 0, 1 or 4. AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled. AT+CFUN=1: Full functionality mode (by default). AT+CFUN=4: Airplane mode. RF function is disabled. NOTE Software:

NOTES 1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by AT+QCFG="airplanecontrol" command. 2. The execution of AT+CFUN command will not affect GNSS function. 3.6. Power Supply 3.6.1. Power Supply Pins EG95 provides four VBAT pins for connection with the external power supply. There are two separate voltage domains for VBAT. Two VBAT_RF pins for modules RF part. Two VBAT_BB pins for modules baseband part. The following table shows the details of VBAT pins and ground pins. Table 6: Pin Definition of VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 52, 53 Power supply for modules RF part. 3.3 3.8 4.3 V EG95_Series_Hardware_Design 35 / 99 LTE Standard Module Series EG95 Series Hardware Design 3.3 3.8 4.3 V GND Ground

0

V VBAT_BB 32, 33 Power supply for modules baseband part. 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 6774, 7982, 8991, 100106 3.6.2. Decrease Voltage Drop The power supply range of the module is from 3.3V to 4.3V. Please make sure that the input voltage will never drop below 3.3V. The following figure shows the voltage drop during burst transmission in 2G network. The voltage drop will be less in 3G and 4G networks. Burst Transmission Burst Transmission VBAT Min.3.3V Drop Ripple Figure 7: Power Supply Limits during Burst Transmission To decrease voltage drop, a bypass capacitor of about 100F with low ESR (ESR = 0.7 ) should be used, and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing the MLCC array, and place these capacitors close to VBAT_BB/VBAT_RF pins. The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 1 mm, and the width of VBAT_RF trace should be no less than 2 mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to avoid the damage caused by electric surge and electrostatics discharge (ESD), it is suggested that a TVS diode with suggested low reverse stand-off voltage VRWM, low clamping voltage VC and high reverse peak pulse current IPP should be used. The following figure shows the star structure of the power supply. EG95_Series_Hardware_Design 36 / 99 LTE Standard Module Series EG95 Series Hardware Design VBAT

D1 C1 100 F WS4.5D3HV C2 C3 C4 C5 C6 C7 C8 100 nF 33 pF 10 pF 100 F 100 nF 33 pF 10 pF

VBAT_RF VBAT_BB Module Figure 8: Star Structure of Power Supply 3.6.3. Reference Design for Power Supply Power design for the module is very important, as the performance of the module largely depends on the power source. The power supply should be able to provide sufficient current up to 2A at least. If the voltage drop between the input and output is not too high, it is suggested that an LDO should be used to supply power for the module. If there is a big voltage difference between the input source and the desired output

(VBAT), a buck converter is preferred to be used as the power supply. The following figure shows a reference design for +5V input power source. The typical output of the power supply is about 3.8V and the maximum load current is 3.0A. DC_IN VBAT MIC29302WU 2 IN N E 1 OUT 4 J D A D N G 3 5 100K 1%

47K 1%

470 F 100 nF 51K 4.7K VBAT_EN 47K 470R 470 F 100 nF Figure 9: Reference Circuit of Power Supply EG95_Series_Hardware_Design 37 / 99 LTE Standard Module Series EG95 Series Hardware Design NOTE In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply can be cut off. 3.6.4. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.7. Power-on/off Scenarios 3.7.1. Turn on Module Using the PWRKEY The following table shows the pin definition of PWRKEY. Pin Name Pin No. Description DC Characteristics Comment Table 7: Pin Definition of PWRKEY PWRKEY 15 Turn on/off the module VIH = 0.8 V The output voltage is 0.8 V because of the diode drop in the Qualcomm chipset. When EG95 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level for at least 500ms. It is recommended to use an open drain/collector driver to control the PWRKEY. After STATUS pin outputting a high level, PWRKEY pin can be released. A simple reference circuit is illustrated in the following figure. PWRKEY 10 nF 500 ms Turn-on pulse 4.7K 47K Figure 10: Turn on the Module by Using Driving Circuit EG95_Series_Hardware_Design 38 / 99 LTE Standard Module Series EG95 Series Hardware Design The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. S1 PWRKEY TVS Close to S1 Figure 11: Turn on the Module by Using Keystroke The power-on scenario is illustrated in the following figure. NOTE 1 VBAT PWRKEY VDD_EXT BOOT_CONFIG &

USB_BOOT Pins RESET_N STATUS

( DO) UART USB 500 ms VIL0.5 V About 100 ms VH = 0.8 V 100 ms. After this time, the BOOT_CONFIG pins can be set to high level by external circuit. 10 s 12 s 13 s I nactive I nactive Active Active Figure 12: Timing of Turning on Module EG95_Series_Hardware_Design 39 / 99 LTE Standard Module Series EG95 Series Hardware Design NOTES 1. Please make sure that VBAT is stable before pulling down PWRKEY pin. It is recommended that the time between powering up VBAT and pulling down PWRKEY pin is no less than 30ms. 2. PWRKEY can be pulled down directly to GND with a recommended 10 k resistor if module needs to be powered on automatically and shutdown is not needed. 3.7.2. Turn off Module The following procedures can be used to turn off the module normally:

Use the PWRKEY pin. Use AT+QPOWD command. 3.7.2.1. Turn off Module Using the PWRKEY Pin Driving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-off procedure after the PWRKEY is released. The power-off scenario is illustrated in the following figure. 650 ms 30 s VBAT PWRKEY STATUS Module Status RUNNING Power-down procedure OFF Figure 13: Timing of Turning off Module 3.7.2.2. Turn off Module Using AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module via PWRKEY pin. Please refer to document [2] for details about the AT+QPOWD command. EG95_Series_Hardware_Design 40 / 99 LTE Standard Module Series EG95 Series Hardware Design NOTES 1. In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply can be cut off. 2. When turning off module with the AT command, please keep PWRKEY at high level after the execution of the command. Otherwise the module will be turned on again after successfully turn-

off. 3.8. Reset the Module The RESET_N pin can be used to reset the module. The module can be reset by driving RESET_N to a low level voltage for 150460 ms. Pin Name Pin No. Description DC Characteristics Comment Table 8: Pin Definition of RESET_N RESET_N 17 Reset the module VIHmax = 2.1V VIHmin = 1.3V VILmax = 0.5V The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N. RESET_N 150460 ms Reset pulse 4.7K 47K Figure 14: Reference Circuit of RESET_N by Using Driving Circuit EG95_Series_Hardware_Design 41 / 99 LTE Standard Module Series EG95 Series Hardware Design S2 RESET_N TVS Close to S2 Figure 15: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated in the following figure. 460 ms VIL 0.5 V 150 ms VBAT RESET_N Module Status Running Resetting Restart VIH 1.3 V Figure 16: Timing of Resetting Module NOTES pin. 1. Use RESET_N only when failed to turn off the module by AT+QPOWD command and PWRKEY 2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.9. (U)SIM Interfaces EG95 provides two (U)SIM interfaces, and only one (U)SIM card can work at a time. The (U)SIM 1 and

(U)SIM 2 cards can be switched by AT+QDSIM command. For more details, please refer to document

[2]. The (U)SIM interfaces circuitry meet ETSI and IMT-2000 requirements. Both 1.8 V and 3.0 V (U)SIM cards EG95_Series_Hardware_Design 42 / 99 LTE Standard Module Series EG95 Series Hardware Design Pin Name Pin No. I/O Description Comment are supported. Table 9: Pin Definition of (U)SIM Interfaces IO DO DO IO DO DO USIM1_VDD 43 PO Power supply for (U)SIM1 card USIM1_DATA 45 Data signal of (U)SIM1 card USIM1_CLK 46 Clock signal of (U)SIM1 card USIM1_RST 44 Reset signal of (U)SIM1 card USIM1_ PRESENCE 42 DI

(U)SIM1 card insertion detection USIM_GND 47 Specified ground for (U)SIM card USIM2_VDD 87 PO Power supply for (U)SIM2 card USIM2_DATA 86 Data signal of (U)SIM2 card USIM2_CLK 84 Clock signal of (U)SIM2 card USIM2_RST 85 Reset signal of (U)SIM2 card USIM2_ PRESENCE 83 DI

(U)SIM2 card insertion detection Either 1.8 V or 3.0 V is supported by the module automatically. Either 1.8 V or 3.0 V is supported by the module automatically. EG95 supports (U)SIM card hot-plug via USIM_PRESENCE (USIM1_PRESENCE/USIM2_PRESENCE) pin. The function supports low level and high level detections. By default, it is disabled, and can be configured via AT+QSIMDET command. Please refer to document [2] for more details about the command. The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector. EG95_Series_Hardware_Design 43 / 99 LTE Standard Module Series EG95 Series Hardware Design VDD_EXT USIM_VDD 15K 100 nF 51K USIM_GND USIM_VDD USIM_RST USIM_CLK USIM_PRESENCE USIM_DATA 0R 0R 0R Module

(U)SIM Card Connector VCC RST CLK GND VPP IO 33 pF 33 pF 33 pF GND GND GND Figure 17: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. A reference circuit of (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. USIM_VDD 100 nF Module USIM_GND USIM_VDD USIM_RST USIM_CLK USIM_DATA 15K 0R 0R 0R

(U)SIM Card Connector VCC RST CLK GND VPP IO 33 pF 33 pF 33 pF GND GND Figure 18: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM cards in customers applications, please follow the criteria below in the (U)SIM circuit design:

Keep placement of (U)SIM card connector to the module as close as possible. Keep the trace length as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1 F, and place it as EG95_Series_Hardware_Design 44 / 99 LTE Standard Module Series EG95 Series Hardware Design close to (U)SIM card connector as possible. If the ground is complete on customers PCB, USIM_GND can be connected to PCB ground directly. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasitic capacitance should not be more than 15 pF. The 0 resistors should be added in series between the module and the (U)SIM card to facilitate debugging. The 33 pF capacitors are used for filtering interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the (U)SIM card connector. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion are applied, and should be placed close to the (U)SIM card connector. 3.10. USB Interface EG95 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports high-speed (480 Mbps) and full-speed (12 Mbps) modes. The USB interface can only serves as a slave device and is used for AT command communication, data transmission, GNSS NMEA sentences output, software debugging, firmware upgrade and voice over USB. The following table shows the pin definition of USB interface. Pin Name Pin No. I/O Description Comment Table 10: Pin Definition of USB Interface USB_DP USB_DM USB_VBUS GND 9 10 8 3 IO IO PI Ground USB differential data bus (+) USB differential data bus (-) Require differential impedance of 90 . Require differential impedance of 90 . USB connection detection Typical: 5.0 V For more details about USB 2.0 specifications, please visit http://www.usb.org/home. The USB interface is recommended to be reserved for firmware upgrade in customers design. The following figure shows a reference circuit of USB interface. EG95_Series_Hardware_Design 45 / 99 LTE Standard Module Series EG95 Series Hardware Design Minimize these stubs Test Points Module VDD USB_VBUS USB_DM USB_DP GND NM_0R NM_0R R3 R4 L1 Close to Module ESD Array MCU USB_DM USB_DP GND Figure 19: Reference Circuit of USB Interface A common mode choke L1 is recommended to be added in series between the module and customers MCU in order to suppress EMI spurious transmission. Meanwhile, the 0 resistors (R3 and R4) should be added in series between the module and the test points so as to facilitate debugging, and the resistors are not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components must be placed close to the module, and also these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles should be complied with when design the USB interface, so as to meet USB 2.0 specification. It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90 . Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer with ground shielding on not only upper and lower layers but also right and left sides. Junction capacitance of the ESD protection component might cause influences on USB data lines, so please pay attention to the selection of the component. Typically, the stray capacitance should be less than 2 pF. Keep the ESD protection components to the USB connector as close as possible. 3.11. UART Interfaces The module provides two UART interfaces: the main UART interface and the debug UART interface. The following shows their features. EG95_Series_Hardware_Design 46 / 99 RI DCD CTS RTS DTR TXD RXD LTE Standard Module Series EG95 Series Hardware Design The main UART interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps, 230400 bps, 460800 bps, 921600 bps and 3000000 bps baud rates, and the default is 115200 bps. It supports RTS and CTS hardware flow control, and is used for AT command communication and data transmission. The debug UART interface supports 115200 bps baud rate. It is used for Linux console and log output. The following tables show the pin definition of the UART interfaces. Table 11: Pin Definition of Main UART Interfaces Pin Name Pin No. I/O Description Comment Ring indicator Data carrier detection Clear to send Data terminal ready, sleep mode control Transmit data Receive data Request to send 1.8 V power domain 39 38 36 37 30 35 34 DO DO DO DI DI DO DI Table 12: Pin Definition of Debug UART Interface Pin Name Pin No. I/O Description Comment DBG_TXD DBG_RXD 23 22 DO DI Transmit data 1.8 V power domain Receive data 1.8 V power domain The logic levels are described in the following table. Table 13: Logic Levels of Digital I/O Parameter VIL Min.

-0.3 Max. 0.6 Unit V EG95_Series_Hardware_Design 47 / 99 LTE Standard Module Series EG95 Series Hardware Design VIH 1.2 2.0 V EG95_Series_Hardware_Design 48 / 99 LTE Standard Module Series EG95 Series Hardware Design VOL VOH 0 1.35 0.45 1.8 V V The module provides 1.8 V UART interfaces. A level translator should be used if customers application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows a reference design. Please visit http://www.ti.com for more information. Another example with transistor translation circuit is shown as below. For the design of circuits in dotted lines, please refer to that of circuits in solid lines, but please pay attention to the direction of connection. 0.1 F VDD_MCU VDD_EXT VCCA 0.1 F 1 0 K 120K VCCB GND B1 B2 B3 B4 B5 B6 B7 B8 A3 Translator A4 OE A1 A2 A5 A6 A7 A8 51K 51K RI DCD CTS RTS DTR TXD RXD RI_MCU DCD_MCU CTS_MCU RTS_MCU DTR_MCU TXD_MCU RXD_MCU Figure 20: Reference Circuit with Translator Chip MCU/ARM Module VDD_EX T 4.7K 1 nF VDD_EXT 10K 10K 1 nF VCC_MCU 4.7K VDD_EX T TXD RXD RTS CTS GPIO EINT GPIO GND RXD TXD RTS CTS DT R RI DCD GND Figure 21: Reference Circuit with Transistor Circuit NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. EG95_Series_Hardware_Design 49 / 99 LTE Standard Module Series EG95 Series Hardware Design 3.12. PCM and I2C Interfaces EG95 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the following modes and one I2C interface:

Primary mode (short frame synchronization, works as both master and slave) Auxiliary mode (long frame synchronization, works as master only) In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and also supports 4096 kHz PCM_CLK at 16 kHz PCM_SYNC. In auxiliary mode, the data is also sampled on the falling edge of the PCM_CLK and transmitted on the rising edge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates with a 256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK and an 8 kHz, 50% duty cycle PCM_SYNC. EG95 supports 16-bit linear data format. The following figures show the primary modes timing relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK, as well as the auxiliary modes timing relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK. 125 s PCM_CLK 1 2 255 256 PCM_SYNC PCM_DOUT PCM_DIN MSB LSB MSB MSB LSB MSB Figure 22: Primary Mode Timing EG95_Series_Hardware_Design 50 / 99 LTE Standard Module Series EG95 Series Hardware Design 125 s PCM_CLK 1 2 31 32 PCM_SYNC PCM_DOUT PCM_DIN MSB MSB LSB LSB Figure 23: Auxiliary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design. Table 14: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_DIN DI PCM data input 1.8 V power domain PCM_DOUT DO PCM data output 1.8 V power domain PCM_SYNC PCM_CLK IO IO PCM data frame nal synchronization sig 1.8 V power domain PCM data bit clock 1.8 V power domain 6 7 5 4 40 41 I2C_SCL OD I2C serial clock I2C_SDA OD I2C serial data An external pull-up to 1.8 V is required. required. An external pull-up to 1.8 V is Clock and mode can be configured by AT command, and the default configuration is master mode using short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. Please refer to document [2] about AT+QDAI command for details. The following figure shows a reference design of PCM and I2C interfaces with external codec IC. EG95_Series_Hardware_Design 51 / 99 LTE Standard Module Series EG95 Series Hardware Design S A B I MICBIAS INP INN LOUTP LOUTN BCLK DAC LRCK ADC SCL SDA K 7

. 4 K 7

. 4 Codec PCM_CLK PCM_SYNC PCM_DOUT PCM_DIN I2C_SCL I2C_SDA Module 1.8 V Figure 24: Reference Circuit of PCM and I2C Application with Audio Codec NOTES 1. It is recommended to reserve an RC (R = 22 , C = 22 pF) circuit on the PCM lines, especially for PCM_CLK. 2. EG95 works as a master device pertaining to I2C interface. 3.13. SPI Interface SPI interface of EG95 acts as the master only. It provides a duplex, synchronous and serial communication link with the peripheral devices. It is dedicated to one-to-one connection, without chip select. Its operation voltage is 1.8 V with clock rates up to 50 MHz. The following table shows the pin definition of SPI interface. Table 15: Pin Definition of SPI Interface Pin Name Pin No. I/O Description Comment 26 27 SPI_CLK DO Clock signal of SPI interface 1.8 V power domain SPI_MOSI DO 1.8 V power domain Master output slave input of SPI interface EG95_Series_Hardware_Design 52 / 99 LTE Standard Module Series EG95 Series Hardware Design SPI_MISO 28 DI Master input slave output of SPI interface 1.8 V power domain The following figure shows a reference design of SPI interface with peripherals. SPI_CLK SPI_MOSI SPI_MISO SPI_CLK SPI_MOSI SPI_MISO Module Peripherals Figure 25: Reference Circuit of SPI Interface with Peripherals NOTE The module provides 1.8 V SPI interface. A level translator should be used between the module and the host if customers application is equipped with a 3.3V processor or device interface. 3.14. Network Status Indication The module provides one network indication pin: NETLIGHT. The pin is used to drive a network status indication LED. The following tables describe the pin definition and logic level changes of NETLIGHT in different network status. Table 16: Pin Definition of Network Status Indicator Pin Name Pin No. I/O Description Comment NETLIGHT 21 DO Indicate the modules network activity status 1.8 V power domain Table 17: Working State of Network Status Indicator Pin Name Logic Level Changes Network Status Flicker slowly (200 ms High/1800 ms Low) Network searching NETLIGHT Flicker slowly (1800 ms High/200 ms Low) Idle EG95_Series_Hardware_Design 53 / 99 LTE Standard Module Series EG95 Series Hardware Design Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always High Voice calling A reference circuit is shown in the following figure. VBAT Module NETLIGHT 2.2K 4.7K 47K Figure 26: Reference Circuit of Network Status Indicator 3.15. STATUS The STATUS pin is set as the modules operation status indicator. It will output high level when the module is powered on. The following table describes the pin definition of STATUS. Table 18: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the modules operation status 1.8 V power domain. If unused, keep it open. The following figure shows the reference circuit of STATUS. Module STATUS VBAT 4.7K 2.2K 47K Figure 27: Reference Circuit of STATUS EG95_Series_Hardware_Design 54 / 99 LTE Standard Module Series EG95 Series Hardware Design 3.16. ADC Interface The module provides one analog-to-digital converter (ADC) interface. AT+QADC=0 command can be used to read the voltage value on ADC0 pin. For more details about the command, please refer to document

[2]. In order to improve the accuracy of ADC voltage values, the traces of ADC should be surrounded by ground. Table 19: Pin Definition of ADC Interface Pin Name Pin No. I/O Description ADC0 24 AI Comment Force the module to enter emergency download mode If unused, keep this pin open. The following table describes the characteristics of ADC interface. Table 20: Characteristics of ADC Interface Parameter Min. Typ. Max. ADC0 Voltage Range 0.3 ADC Resolution VBAT_BB 15 Unit V bits NOTES 1. 2. It is prohibited to supply any voltage to ADC pins when ADC pins are not powered by VBAT. It is recommended to use resistor divider circuit for ADC application. 3.17. Behaviors of RI AT+QCFG="risignaltype","physical" command can be used to configure RI behaviors. Please refer to document [2] for details. No matter on which port URC is presented, URC will trigger the behavior of RI pin. EG95_Series_Hardware_Design 55 / 99 LTE Standard Module Series EG95 Series Hardware Design NOTE State Idle URC URC can be outputted from UART port, USB AT port and USB modem port through configuration via AT+QURCCFG command. The default port is USB AT port. The default behaviors of the RI are shown as below, and can be changed by AT+QCFG="urc/ri/ring"

command. Please refer to document [2] for details. Table 21: Default Behaviors of RI Response RI keeps at high level RI outputs 120ms low pulse when a new URC returns 3.18. USB_BOOT Interface EG95 provides a USB_BOOT pin. Customers can pull up USB_BOOT to 1.8 V before VDD_EXT is powered up, and the module will enter emergency download mode when it is powered on. In this mode, the module supports firmware upgrade over USB interface. Table 22: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description Comment USB_BOOT 75 DI Force the module to enter emergency download mode 1.8 V power domain. Active high. It is recommended to reserve test points. The following figures show the reference circuit of USB_BOOT interface and timing sequence of entering emergency download mode. EG95_Series_Hardware_Design 56 / 99 LTE Standard Module Series EG95 Series Hardware Design Module USB_BOOT Test points 4.7K VDD_EXT Close to test points TVS Figure 28: Reference Circuit of USB_BOOT Interface NOTE 1 VBAT PWRKEY VDD_EXT USB_BOOT RESET_N 500 ms VIL 0.5 V About 100 ms VH = 0.8 V USB_BOOT can be pulled up to 1.8 V before VDD_EXT Is powered up, and the module will enter emerge ncy download mode wh en i t is powered on. Figure 29: Timing Sequence for Entering Emergency Download Mode NOTES 1. Please make sure that VBAT is stable before pulling down PWRKEY pin. It is recommended that the time between powering up VBAT and pulling down PWRKEY pin is no less than 30 ms. 2. When using MCU to control module to enter the emergency download mode, please follow the above timing sequence. It is not recommended to pull up USB_BOOT to 1.8 V before powering up VBAT. Connect the test points as shown in Figure 28 can manually force the module to enter download mode. EG95_Series_Hardware_Design 57 / 99 LTE Standard Module Series EG95 Series Hardware Design 4 GNSS Receiver 4.1. General Description EG95 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). EG95 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, EG95 GNSS engine is switched off. It has to be switched on via AT command. For more details about GNSS engine technology and configurations, please refer to document [3]. 4.2. GNSS Performance The following table shows GNSS performance of EG95. Table 23: GNSS Performance Parameter Description Conditions Cold start Autonomous Sensitivity

(GNSS) Reacquisition Autonomous Tracking Autonomous Cold start

@ open sky Warm start

@ open sky TTFF

(GNSS) Autonomous XTRA enabled Autonomous XTRA enabled Hot start Autonomous Typ.

-146

-157

-157 34.6 11.57 26.09 3.7 1.8 Unit dBm dBm dBm s s s s s EG95_Series_Hardware_Design 58 / 99 LTE Standard Module Series EG95 Series Hardware Design

@ open sky Accuracy

(GNSS) CEP-50 XTRA enabled Autonomous

@ open sky 3.4

<2.5 s m NOTES 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. 4.3. Layout Guidelines The following layout guidelines should be taken into account in customers design. Maximize the distance among GNSS antenna, main antenna and Rx-diversity antenna. Digital circuits such as (U)SIM card, USB interface, camera module and display connector should be kept away from the antennas. Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar isolation and protection. Keep 50 characteristic impedance for the ANT_GNSS trace. Please refer to Chapter 5 for GNSS antenna reference design and antenna installation information. EG95_Series_Hardware_Design 59 / 99 LTE Standard Module Series EG95 Series Hardware Design 5 Antenna Interfaces EG95 antenna interfaces include a main antenna interface and an Rx-diversity antenna interface which is used to resist the fall of signals caused by high speed movement and multipath effect, and a GNSS antenna interface which is only supported on EG95-NA/-EX/-NAX/-AUX. The impedance of the antenna ports is 50 . 5.1. Main/Rx-diversity Antenna Interfaces 5.1.1. Pin Definition The pin definition of main antenna and Rx-diversity antenna interfaces is shown below. Pin Name Pin No. I/O Description Comment ANT_MAIN Main antenna pad 50 impedance Receive diversity antenna pad 50 impedance Receive diversity antenna pad 50 impedance Table 24: Pin Definition of RF Antennas ANT_DIV (EG95-E) ANT_DIV (EG95-NA/-

EX/-NAX/-AUX) 60 49 56 IO AI AI 5.1.2. Operating Frequency Table 25: Module Operating Frequencies 3GPP Band GSM850 EGSM900 DCS1800 PCS1900 Transmit 824~849 880~915 1710~1785 1850~1910 Receive 869~894 925~960 1805~1880 1930~1990 Unit MHz MHz MHz MHz EG95_Series_Hardware_Design 60 / 99 LTE Standard Module Series EG95 Series Hardware Design WCDMA B1 WCDMA B2 WCDMA B4 WCDMA B5 WCDMA B8 19201980 18501910 17101755 824849 880915 LTE-FDD B1 19201980 LTE-FDD B2 18501910 LTE-FDD B3 17101785 LTE-FDD B4 17101755 LTE-FDD B5 824849 LTE-FDD B8 LTE-FDD B12 LTE-FDD B13 LTE-FDD B20 LTE-FDD B26 LTE-FDD B28 880915 699716 777787 832862 814849 703748 21102170 19301990 21102155 869894 925960 21102170 19301990 18051880 21102155 869894 925960 729746 746756 791821 859894 758803 LTE-FDD B7 25002570 26202690 LTE-FDD B25 18501915 19301995 LTE-FDD B66 1710~1780 2100~2200 5.1.3. Reference Design of RF Antenna Interface A reference design of ANT_MAIN and ANT_DIV antenna pads is shown as below. A -type matching circuit should be reserved for better RF performance. The capacitors are not mounted by default. MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz EG95_Series_Hardware_Design 61 / 99 LTE Standard Module Series EG95 Series Hardware Design Main antenna Diversity antenna Module ANT_MAIN R1 0R ANT_DIV R2 0R C1 NM C3 NM C2 NM C4 NM Figure 30: Reference Circuit of RF Antenna Interface NOTES receiving sensitivity. possible. 1. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve the 2. ANT_DIV function is enabled by default. AT+QCFG="divctl",0 command can be used to disable receive diversity. Please refer to document [2] for details. 3. Place the -type matching components (R1&C1&C2, R2&C3&C4) as close to the antenna as 5.1.4. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 31: Microstrip Design on a 2-layer PCB EG95_Series_Hardware_Design 62 / 99 LTE Standard Module Series EG95 Series Hardware Design Figure 32: Coplanar Waveguide Design on a 2-layer PCB Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) EG95_Series_Hardware_Design 63 / 99 LTE Standard Module Series EG95 Series Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 . connected to ground. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. The recommended trace angle is 135. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2 x W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, please refer to document [5]. 5.2. GNSS Antenna Interface The GNSS antenna interface is only supported on EG95-NA/-EX/-NAX/-AUX.The following tables show pin definition and frequency specification of GNSS antenna interface. Pin Name Pin No. I/O Description Comment Table 26: Pin Definition of GNSS Antenna Interface ANT_GNSS (EG95-

NA/-EX/-NAX/-AUX) 49 AI GNSS antenna 50 impedance Table 27: GNSS Frequency Type GPS Frequency 1575.42 1.023 GLONASS 1597.51605.8 Galileo 1575.42 2.046 BeiDou (Compass) 1561.098 2.046 Unit MHz MHz MHz MHz EG95_Series_Hardware_Design 64 / 99 LTE Standard Module Series EG95 Series Hardware Design QZSS 1575.42 MHz A reference design of GNSS antenna is shown as below. VDD 0.1 F 10R GNSS Antenna 47 nH 100 pF Module ANT_GNSS 0R NM NM Figure 35: Reference Circuit of GNSS Antenna NOTES 1. An external LDO can be selected to supply power according to the active antenna requirement. 2. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1. Antenna Requirement The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna. Table 28: Antenna Requirements Type Requirements GNSS1) Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Active antenna gain: > 0 dBi EG95_Series_Hardware_Design 65 / 99 LTE Standard Module Series EG95 Series Hardware Design Active antenna embedded LNA gain: < 17 dB VSWR: 2 Efficiency: > 30%

Max input power: 50 W Input impedance: 50 Cable insertion loss: < 1 dB

(GSM850,EGSM900, WCDMA B5/B8, LTE-FDD B5/B8/B12/B13/B20/B26/B28) Cable insertion loss: < 1.5 dB

(DCS1800, PCS1900,WCDMA B1/B2/B4, LTE-FDD B1/B2/B3/B4/B25/B66) Cable insertion loss: < 2 dB (LTE-

FDD B7) GSM/WCDMA/LTE NOTE 1) It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance. 5.3.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connector provided by Hirose. Figure 36: Dimensions of the U.FL-R-SMT Connector (Unit: mm) EG95_Series_Hardware_Design 66 / 99 U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. LTE Standard Module Series EG95 Series Hardware Design Figure 37: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 38: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com. EG95_Series_Hardware_Design 67 / 99 LTE Standard Module Series EG95 Series Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 29: Absolute Maximum Ratings Parameter VBAT_RF/VBAT_BB USB_VBUS Peak Current of VBAT_BB Peak Current of VBAT_RF Voltage at Digital Pins Min.

-0.3

-0.3 0 0

-0.3 Max. Unit 4.7 5.5 0.8 1.8 2.3 V V A A V 6.2. Power Supply Ratings Table 30: Power Supply Ratings VBAT VBAT_BB and VBAT_RF Parameter Description Conditions Min. Typ. Max. Unit 3.3 3.8 4.3 V The actual input voltages must be kept between the minimum and maximum values. EG95_Series_Hardware_Design 68 / 99 LTE Standard Module Series EG95 Series Hardware Design Voltage drop during Maximum power control burst transmission Peak supply current

(during transmission slot) USB connection detection IVBAT USB_VBUS level on EGSM900 Maximum power control level on EGSM900 400 mV 1.8 2.0 A 3.0 5.0 5.25 V 6.3. Operation and Storage Temperatures The operation and storage temperatures are listed in the following table. Table 31: Operation and Storage Temperatures Parameter Operation Temperature Range 1) Extended Temperature Range 2) Storage Temperature Range Min.

-35

-40

-40 Typ.

+25 Unit C C C Max.

+75

+85

+90 1. NOTES 2. 1) Within operation temperature range, the module is 3GPP compliant. 2) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call*, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to the normal operation temperature levels, the module will meet 3GPP specifications again.

* means under development. 3. EG95_Series_Hardware_Design 69 / 99 LTE Standard Module Series EG95 Series Hardware Design 6.4. Current Consumption The values of current consumption are shown below. Table 32: EG95-E Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down AT+CFUN=0 (USB disconnected) GSM DRX = 2 (USB disconnected) GSM DRX = 5 (USB suspended) GSM DRX = 9 (USB disconnected) WCDMA PF = 64 (USB disconnected) Sleep state IVBAT WCDMA PF = 64 (USB suspended) WCDMA PF = 512 (USB disconnected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB suspended) Idle state LTE-FDD PF = 256 (USB disconnected) GSM DRX = 5 (USB disconnected) GSM DRX = 5 (USB connected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB connected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB connected) EGSM900 4DL/1UL @ 32.35 dBm EG95_Series_Hardware_Design GPRS data EGSM900 3DL/2UL @ 32.16 dBm 15 1.3 2.3 2.0 1.6 1.8 2.1 1.3 2.3 2.6 1.5 21.0 31.0 21.0 31.0 21.0 31.0 268 459 A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 70 / 99 mA mA LTE Standard Module Series EG95 Series Hardware Design EGSM900 1DL/4UL @ 29.45 dBm DCS1800 4DL/1UL @ 29.14 dBm DCS1800 3DL/2UL @ 29.07 dBm DCS1800 2DL/3UL @ 28.97 dBm DCS1800 1DL/4UL @ 28.88 dBm EGSM900 4DL/1UL PCL = 8 @ 26.88 dBm EGSM900 3DL/2UL PCL = 8 @ 26.84 dBm EGSM900 2DL/3UL PCL = 8 @ 26.76 dBm EGSM900 1DL/4UL PCL = 8 @ 26.54 dBm DCS1800 4DL/1UL PCL = 2 @ 25.66 dBm DCS1800 3DL/2UL PCL = 2 @ 25.59 dBm DCS1800 2DL/3UL PCL = 2 @ 25.51 dBm DCS1800 1DL/4UL PCL = 2 @ 25.38 dBm EDGE data transfer WCDMA data transfer WCDMA B1 HSDPA @ 22.48 dBm WCDMA B1 HSUPA @ 22.29 dBm WCDMA B8 HSDPA @ 22.24 dBm WCDMA B8 HSUPA @ 21.99 dBm LTE data transfer LTE-FDD B1 @ 23.37 dBm LTE-FDD B3 @ 22.97 dBm LTE-FDD B7 @ 23.17 dBm LTE-FDD B8 @ 23.04 dBm LTE-FDD B20 @ 23.21 dBm LTE-FDD B28A @ 22.76 dBm GSM voice call EGSM900 PCL = 5 @ 32.36 dBm DCS1800 PCL = 0 @ 29.19 dBm 631 177 290 406 517 167 278 385 492 169 256 341 432 586 591 498 511 736 710 775 651 699 714 271 181 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA EG95_Series_Hardware_Design 71 / 99 LTE Standard Module Series EG95 Series Hardware Design WCDMA voice call WCDMA B1 @ 22.91 dBm WCDMA B8 @ 23.14 dBm 632 546 mA mA Table 33: EG95-NA Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down AT+CFUN=0 (USB disconnected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB suspended) Sleep state WCDMA PF = 512 (USB disconnected) LTE-FDD PF = 64 (USB disconnected) IVBAT Idle state LTE-FDD PF = 64 (USB suspended) LTE-FDD PF = 256 (USB disconnected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB connected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB connected) WCDMA B2 HSDPA CH9938 @ 22.45 dBm WCDMA B2 HSUPA CH9938 @ 21.73 dBm WCDMA data transfer WCDMA B4 HSDPA CH1537 @ 23.05 dBm WCDMA B4 HSUPA CH1537 @ 22.86 dBm WCDMA B5 HSDPA CH4407 @ 23 dBm EG95_Series_Hardware_Design WCDMA B5 HSUPA CH4407 @ 22.88 dBm 72 / 99 mA LTE data LTE-FDD B2 CH1100 @ 23.29 dBm A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 13 1.0 2.2 2.5 1.4 2.6 2.9 1.7 14.0 26.0 15.0 26.0 569 559 572 586 518 514 705 LTE Standard Module Series EG95 Series Hardware Design LTE-FDD B5 CH2525 @ 23.39 dBm LTE-FDD B12 CH5060 @ 23.16 dBm LTE-FDD B13 CH5230 @ 23.36 dBm WCDMA voice call WCDMA B2 CH9938 @ 23.34 dBm WCDMA B4 CH1537 @ 23.47 dBm WCDMA B5 CH4357 @ 23.37 dBm 536 mA Table 34: EG95-EX Current Consumption OFF state Power down Parameter Description Conditions Typ. Unit Sleep state IVBAT AT+CFUN=0 (USB disconnected) GSM DRX = 2 (USB disconnected) GSM DRX = 5 (USB suspend) GSM DRX = 9 (USB disconnected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB suspend) WCDMA PF = 512 (USB disconnected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB suspend) LTE-FDD PF = 256 (USB disconnected) GSM DRX = 5 (USB disconnected) GSM DRX = 5 (USB connected) Idle state WCDMA PF = 64 (USB disconnected) EG95_Series_Hardware_Design WCDMA PF = 64 (USB connected) 73 / 99 mA LTE-FDD PF = 64 (USB disconnected) 601 650 602 627 591 15 1.3 2.3 2.0 1.6 1.8 2.1 1.3 2.3 2.6 1.5 21.0 31.0 21.0 31.0 21.0 mA mA mA mA mA A mA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE Standard Module Series EG95 Series Hardware Design EGSM900 4DL/1UL PCL = 8 @ 27.29 dBm 169.5 EGSM900 3DL/2UL PCL = 8 @ 27.01 dBm 305.06 LTE-FDD PF = 64 (USB connected) EGSM900 4DL/1UL @ 33.06 dBm EGSM900 3DL/2UL @ 32.93 dBm EGSM900 2DL/3UL @ 31.1 dBm EGSM900 1DL/4UL @ 29.78 dBm DCS1800 4DL/1UL @ 29.3 dBm DCS1800 3DL/2UL @ 29.3 dBm DCS1800 2DL/3UL @ 29.21 dBm DCS1800 1DL/4UL @ 29.07 dBm GPRS data transfer EGSM900 2DL/3UL PCL = 8 @ 26.86 dBm EGSM900 1DL/4UL PCL = 8 @ 25.95 dBm DCS1800 4DL/1UL PCL = 2 @ 26.11 dBm EDGE data transfer DCS1800 3DL/2UL PCL = 2 @ 25.8 dBm DCS1800 2DL/3UL PCL = 2 @ 25.7 dBm DCS1800 1DL/4UL PCL = 2 @ 25.6 dBm WCDMA data transfer WCDMA B1 HSDPA @ 22.48 dBm WCDMA B1 HSUPA @ 21.9 dBm WCDMA B8 HSDPA @ 22.6 dBm WCDMA B8 HSUPA @ 22.02 dBm LTE data transfer LTE-FDD B1 @ 23.37 dBm LTE-FDD B3 @ 23.3 dBm LTE-FDD B7 @ 23.2 dBm LTE-FDD B8 @ 23.09 dBm 31.0 247.9 450.8 536.4 618 144 253.4 355.4 455.7 434 548 135 244 349 455 485 458 556 520 605 667 783 637 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA EG95_Series_Hardware_Design 74 / 99 Table 35: EG95-NAX Current Consumption Parameter Description Conditions Typ. Unit LTE-FDD B20 @ 23.21 dBm LTE-FDD B28 @ 22.76 dBm EGSM900 PCL = 5 @ 32.36 dBm DCS1800 PCL = 0 @ 29.5 dBm WCDMA B1 @ 23.4 dBm WCDMA B8 @ 23.6 dBm GSM voice call WCDMA voice call OFF state Power down AT+CFUN=0 (USB disconnected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB suspend) Sleep state WCDMA PF = 512 (USB disconnected) IVBAT LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB suspend) Idle state LTE-FDD PF = 256 (USB disconnected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB connected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB connected) WCDMA B2 HSDPA @ 21.64 dBm WCDMA B2 HSUPA @ 21.13 dBm WCDMA B4 HSDPA @ 22.15 dBm WCDMA B4 HSUPA @ 22.21 dBm WCDMA data transfer EG95_Series_Hardware_Design LTE Standard Module Series EG95 Series Hardware Design mA mA mA mA mA mA A mA mA mA mA mA mA mA mA mA mA mA mA mA 646 661 259 149 494 608 11 1.1 2.0 2.4 1.5 2.6 2.8 1.8 17.4 34.3 17.8 34.7 547 543 554 541 mA 75 / 99 mA WCDMA B5 HSDPA @ 22.39 dBm WCDMA B5 HSUPA @ 22.12 dBm LTE-FDD B2 @ 23.07 dBm LTE-FDD B4 @ 23.09 dBm LTE-FDD B5 @ 23.31 dBm LTE-FDD B12 @ 23.30 dBm LTE-FDD B13 @ 23.32 dBm LTE-FDD B25 @ 23.03 dBm LTE-FDD B26 @ 22.97 dBm WCDMA B2 @ 22.89 dBm WCDMA B4 @ 22.76 dBm LTE data transfer WCDMA voice call LTE Standard Module Series EG95 Series Hardware Design 502 509 691 713 580 627 619 693 628 591 577 10 1.2 2.3 2.0 1.5 1.8 2.1 1.3 2.3 mA mA mA mA mA mA mA mA mA mA mA A mA mA mA mA mA mA mA mA WCDMA B5 @ 23.03 dBm 516 mA Table 36: EG95-AUX Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down AT+CFUN=0 (USB disconnected) GSM DRX = 2 (USB disconnected) GSM DRX = 5 (USB suspend) IVBAT Sleep state WCDMA PF = 64 (USB disconnected) GSM DRX = 9 (USB disconnected) WCDMA PF = 64 (USB suspend) WCDMA PF = 512 (USB disconnected) LTE-FDD PF = 64 (USB disconnected) EG95_Series_Hardware_Design 76 / 99 LTE-FDD PF = 64 (USB suspend) 2.6 mA LTE Standard Module Series EG95 Series Hardware Design EG95_Series_Hardware_Design 77 / 99 LTE Standard Module Series EG95 Series Hardware Design LTE-FDD PF = 256 (USB disconnected) 1.5 Idle state GSM DRX = 5 (USB disconnected) GSM DRX = 5 (USB connected) WCDMA PF = 64 (USB disconnected) WCDMA PF = 64 (USB connected) LTE-FDD PF = 64 (USB disconnected) LTE-FDD PF = 64 (USB connected) GPRS data transfer GSM850 4DL/1UL @ 32.48 dBm GSM850 3DL/2UL @ 31.89dBm GSM850 2DL/3UL @ 29.45 dBm GSM850 1DL/4UL @ 28.31 dBm EGSM900 4DL/1UL @ 33.17 dBm EGSM900 3DL/2UL @ 32.16 dBm EGSM900 2DL/3UL @ 29.77 dBm EGSM900 1DL/4UL @ 28.59 dBm DCS1800 4DL/1UL @ 30.19 dBm DCS1800 3DL/2UL @ 29.23 dBm DCS1800 2DL/3UL @ 27.19 dBm DCS1800 1DL/4UL @ 26.14 dBm PCS1900 4DL/1UL @ 30.22 dBm PCS1900 3DL/2UL @ 29.48 dBm PCS1900 2DL/3UL @ 27.50 dBm PCS1900 1DL/4UL @ 26.44 dBm EDGE data transfer GSM850 4DL/1UL PCL = 8 @ 25.75 dBm GSM850 3DL/2UL PCL = 8 @ 25.49 dBm mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 18 28 18 28 18 29 217.9 372.3 432.9 513.9 235.1 387.7 446.5 540.0 154.4 258.0 332.4 419.1 155.0 259.5 333.1 416.8 161.8 291.8 EG95_Series_Hardware_Design 78 / 99 LTE Standard Module Series EG95 Series Hardware Design GSM850 2DL/3UL PCL = 8 @ 23.26 dBm GSM850 1DL/4UL PCL = 8 @ 22.01 dBm 410.2 520.5 EGSM900 4DL/1UL PCL = 8 @ 26.04 dBm 161.5 EGSM900 3DL/2UL PCL = 8 @ 25.86 dBm 294.6 EGSM900 2DL/3UL PCL = 8 @ 23.62 dBm 411.4 EGSM900 1DL/4UL PCL = 8 @ 22.27 dBm 520.8 DCS1800 4DL/1UL PCL = 2 @ 26.12 dBm 139.4 DCS1800 3DL/2UL PCL = 2 @ 25.02 dBm 250.7 DCS1800 2DL/3UL PCL = 2 @ 22.75 dBm 355.3 DCS1800 1DL/4UL PCL = 2 @ 21.47 dBm 452.1 PCS1900 4DL/1UL PCL = 2 @ 26.36 dBm 138.3 PCS1900 3DL/2UL PCL = 2 @ 25.2 dBm 248.2 PCS1900 2DL/3UL PCL = 2 @ 22.94 dBm 351.5 PCS1900 1DL/4UL PCL = 2 @ 21.67 dBm 448.8 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 609.6 640.5 557.4 539.4 588.2 545.2 578.1 592.5 777.4 634.4 WCDMA data transfer WCDMA B1 HSDPA @ 22.30 dBm WCDMA B1 HSUPA @ 21.50 dBm WCDMA B2 HSDPA @ 22.14 dBm WCDMA B2 HSUPA @ 21.18 dBm WCDMA B5 HSDPA @ 22.6 dBm WCDMA B5 HSUPA @ 21.45 dBm WCDMA B8 HSDPA @ 21.92 dBm WCDMA B8 HSUPA @ 21.93 dBm LTE data transfer LTE-FDD B1 @ 22.96 dBm LTE-FDD B2 @ 22.79 dBm LTE-FDD B3 @ 23.09 dBm 697.9 mA EG95_Series_Hardware_Design 79 / 99 LTE-FDD B4 @ 22.83 dBm LTE-FDD B5 @ 23.05 dBm LTE-FDD B7 @ 22.71 dBm LTE-FDD B8 @ 22.80 dBm LTE-FDD B28 @ 22.84 dBm LTE-FDD B66 @ 22.73 dBm GSM850 PCL5 @32.57dBm DCS1800 PCL0 @30.24dBm PCS1900 PCL0 @30.33dBm WCDMA B1 @22.93dBm WCDMA B2 @22.95dBm WCDMA B5 @22.54dBm WCDMA B8 @22.47dBm GSM voice call WCDMA voice call LTE Standard Module Series EG95 Series Hardware Design 704.6 657.1 765.3 635.3 670.0 725.9 227.8 168.0 166.8 656.2 579.8 589.8 627.8 mA mA mA mA mA mA mA mA mA mA mA mA mA EGSM900 PCL5 @33.21dBm 253.8 mA Parameter Description Conditions Typ. Unit Table 37: GNSS Current Consumption of EG95 IVBAT

(GNSS) Cold start @ Passive Antenna Hot Start @ Passive Antenna Lost state @ Passive Antenna Open Sky @ Passive Antenna Searching

(AT+CFUN=0) Tracking

(AT+CFUN=0) mA mA mA mA 54 54 53 32 EG95_Series_Hardware_Design 80 / 99 LTE Standard Module Series EG95 Series Hardware Design 6.5. RF Output Power The following table shows the RF output power of EG95 module. Table 38: RF Output Power Frequency Max. Min. GSM850/EGSM900 33 dBm 2 dB 5 dBm 5 dB DCS1800/PCS1900 30 dBm 2 dB 0 dBm 5 dB GSM850/EGSM900 (8-PSK) 27 dBm 3 dB 5 dBm 5 dB DCS1800/PCS1900 (8-PSK) 26 dBm 3 dB 0 dBm 5 dB WCDMA B1/B2/B4/B5/B8 24 dBm +1/ -3 dB

< -49 dBm LTE-FDD B1/B2/B3/B4/B5/B7/

B8/B12/B13/B20/B25/B26/B28/B66 23 dBm 2 dB

< -39 dBm NOTE In GPRS 4 slots TX mode, the maximum output power is reduced by 3.0dB. The design conforms to the GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1. 6.6. RF Receiving Sensitivity The following tables show the conducted RF receiving sensitivity of EG95 module. Table 39: EG95-E Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP EGSM900 DCS1800

-108.6 dBm

-109.4 dBm NA NA NA NA

-102 dBm

-102 dBm WCDMA B1

-109.5 dBm

-110 dBm

-112.5 dBm

-106.7 dBm WCDMA B8

-109.5 dBm

-110 dBm

-112.5 dBm

-103.7 dBm EG95_Series_Hardware_Design 81 / 99 LTE Standard Module Series EG95 Series Hardware Design LTE-FDD B1 (10 MHz)

-97.5 dBm

-98.3 dBm

-101.4 dBm

-96.3 dBm LTE-FDD B3 (10 MHz)

-98.3 dBm

-98.5 dBm

-101.5 dBm

-93.3 dBm LTE-FDD B7 (10 MHz)

-96.3 dBm

-98.4 dBm

-101.3 dBm

-94.3 dBm LTE-FDD B8 (10 MHz)

-97.1 dBm

-99.1 dBm

-101.2 dBm

-93.3 dBm LTE-FDD B20 (10 MHz)

-97 dBm

-99 dBm

-101.3 dBm

-93.3 dBm LTE-FDD B28A (10 MHz)

-98.3 dBm

-99 dBm

-101.4 dBm

-94.8 dBm Table 40: EG95-NA Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP WCDMA B2

-110 dBm

-110 dBm

-112.5 dBm

-104.7 dBm WCDMA B4

-110 dBm

-110 dBm

-112.5 dBm

-106.7 dBm WCDMA B5

-111 dBm

-111 dBm

-113 dBm

-104.7 dBm LTE-FDD B2 (10 MHz)

-98 dBm

-99 dBm

-102.2 dBm

-94.3 dBm LTE-FDD B4 (10 MHz)

-97.8 dBm

-99.5 dBm

-102.2 dBm

-96.3 dBm LTE-FDD B5 (10 MHz)

-99.6 dBm

-100.3 dBm

-103 dBm

-94.3 dBm LTE-FDD B12 (10 MHz)

-99.5 dBm

-100 dBm

-102.5 dBm

-93.3 dBm LTE-FDD B13 (10 MHz)

-99.2 dBm

-100 dBm

-102.5 dBm

-93.3 dBm Table 41: EG95-EX Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP EGSM900

-109.8 dBm NA DCS1800

-109.8 dBm NA NA NA

-102 dBm

-102dbm WCDMA B1

-110 dBm

-111 dBm

-112.5 dBm

-106.7 dBm WCDMA B8

-110 dBm

-111 dBm

-112.5 dBm

-103.7 dBm LTE-FDD B1 (10 MHz)

-98.7 dBm

-98.8 dBm

-102.4 dBm

-96.3 dBm EG95_Series_Hardware_Design 82 / 99 LTE Standard Module Series EG95 Series Hardware Design LTE-FDD B3 (10 MHz)

-98.3 dBm

-99.5 dBm

-102.5 dBm

-93.3 dBm LTE-FDD B7 (10 MHz)

-97.5 dBm

-98.4 dBm

-100.3 dBm

-94.3 dBm LTE-FDD B8 (10 MHz)

-98.7 dBm

-99.6 dBm

-102.2 dBm

-93.3 dBm LTE-FDD B20 (10 MHz)

-97 dBm

-97.5 dBm

-102.2 dBm

-93.3 dBm LTE-FDD B28 (10 MHz)

-98.2 dBm

-99.5 dBm

-102 dBm

-94.8 dBm Table 42: EG95-NAX Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP WCDMA B2

-110 dBm

-110 dBm

-112.5 dBm

-104.7 dBm WCDMA B4

-110 dBm

-110 dBm

-112.5 dBm

-106.7 dBm WCDMA B5

-111 dBm

-111 dBm

-113 dBm

-104.7 dBm LTE-FDD B2 (10 MHz)

-98 dBm

-99 dBm

-102.2 dBm

-94.3 dBm LTE-FDD B4 (10 MHz)

-97.8 dBm

-99.5 dBm

-102.2 dBm

-96.3 dBm LTE-FDD B5 (10 MHz)

-99.4 dBm

-100 dBm

-102.7 dBm

-94.3 dBm LTE-FDD B12 (10 MHz)

-99.5 dBm

-100 dBm

-102.5 dBm

-93.3 dBm LTE-FDD B13 (10 MHz)

-99.2 dBm

-100 dBm

-102.5 dBm

-93.3 dBm LTE-FDD B25 (10 MHz)

-97.6 dBm

-99 dBm

-102.2 dBm

-92.8 dBm LTE-FDD B26 (10 MHz)

-99.1 dBm

-99.9 dBm

-102.7 dBm

-93.8 dBm Table 43: EG95-AUX Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP GSM850 EGSM900 DCS1800 PCS1900

-109.1 dBm NA

-109.7 dBm NA

-110.0 dBm NA

-109.4 dBm NA NA NA NA NA

-102 dBm

-102 dBm

-102 dBm

-102 dBm EG95_Series_Hardware_Design 83 / 99 LTE Standard Module Series EG95 Series Hardware Design WCDMA B1

-109.2 dBm

-109.5 dBm NA

-106.7 dBm WCDMA B2

-109.8 dBm

-111 dBm WCDMA B5

-110 dBm

-111 dBm WCDMA B8

-110 dBm

-111 dBm NA NA NA

-104.7 dBm

-104.7 dBm

-103.7 dBm LTE-FDD B1 (10MHz)

-97.2dBm

-98.9dBm

-101.2dBm

-96.3dBm LTE-FDD B2 (10MHz)

-97.7dBm

-98.9dBm

-101.7dBm

-94.3dBm LTE-FDD B3 (10MHz)

-98.2dBm

-99.1dBm

-102.2dBm

-93.3dBm LTE-FDD B4 (10MHz)

-97.7dBm

-98.7dBm

-101.2dBm

-96.3dBm LTE-FDD B5 (10MHz)

-99.2dBm

-99.7dBm

-102.7dBm

-94.3dBm LTE-FDD B7 (10MHz)

-96.7dBm

-97.1dBm

-99.7dBm

-94.3dBm LTE-FDD B8 (10MHz)

-98.0dBm

-98.4dBm

-102.2dBm

-93.3dBm LTE-FDD B28 (10MHz)

-98.7dBm

-98.5dBm

-101.7dBm

-94.8dBm LTE-FDD B66 (10MHz)

-97.7dBm

-98.8dBm

-101.2dBm

-95.8dBm 6.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the modules electrostatic discharge characteristics. Table 44: Electrostatic Discharge Characteristics (25 C, 45% Relative Humidity) Tested Interfaces Contact Discharge Air Discharge VBAT, GND All Antenna Interfaces Other Interfaces 5 4 0.5 10 8 1 Unit kV kV kV EG95_Series_Hardware_Design 84 / 99 LTE Standard Module Series EG95 Series Hardware Design 6.8. Thermal Consideration In order to achieve better performance of the module, it is recommended to comply with the following principles for thermal consideration:

On customers PCB design, please keep placement of the module away from heating sources, especially high power components such as ARM processor, audio power amplifier, power supply, etc. Do not place components on the opposite side of the PCB area where the module is mounted, in order Do not apply solder mask on the opposite side of the PCB area where the module is mounted, so as to facilitate adding of heatsink when necessary. to ensure better heat dissipation performance. The reference ground of the area where the module is mounted should be complete, and add ground vias as many as possible for better heat dissipation. Make sure the ground pads of the module and PCB are fully connected. According to customers application demands, the heatsink can be mounted on the top of the module, or the opposite side of the PCB area where the module is mounted, or both of them. The heatsink should be designed with as many fins as possible to increase heat dissipation area. Meanwhile, a thermal pad with high thermal conductivity should be used between the heatsink and module/PCB. The following shows two kinds of heatsink designs for reference and customers can choose one or both of them according to their application structure. EC20 R2.1 Module Heatsink Heatsink Thermal Pad Shielding Cover Application Board Application Board Figure 39: Referenced Heatsink Design (Heatsink at the Top of the Module) EG95_Series_Hardware_Design 85 / 99 LTE Standard Module Series EG95 Series Hardware Design EC20 R2.1 Module Heatsink Thermal Pad Thermal Pad Application Board Shielding Cover Application Board Heatsink Figure 40: Referenced Heatsink Design (Heatsink at the Backside of Customers PCB) NOTE The module offers the best performance when the internal BB chip stays below 105C. When the maximum temperature of the BB chip reaches or exceeds 105C, the module works normal but provides reduced performance (such as RF output power, data rate, etc.). When the maximum BB chip temperature reaches or exceeds 115C, the module will disconnect from the network, and it will recover to network connected state after the maximum temperature falls below 115C. Therefore, the thermal design should be maximally optimized to make sure the maximum BB chip temperature always maintains below 105C. Customers can execute AT+QTEMP command and get the maximum BB chip temperature from the first returned value. EG95_Series_Hardware_Design 86 / 99 LTE Standard Module Series EG95 Series Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm, and the dimensional tolerances are 0.05 mm unless otherwise specified. 7.1. Mechanical Dimensions of the Module 250.15 2.300.2 Pin 1 5 1

. 0 9 2 Figure 41: Module Top and Side Dimensions EG95_Series_Hardware_Design 87 / 99 LTE Standard Module Series EG95 Series Hardware Design Figure 42: Module Bottom Dimensions (Top View) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard. EG95_Series_Hardware_Design 88 / 99 7.2. Recommended Footprint LTE Standard Module Series EG95 Series Hardware Design Figure 43: Recommended Footprint (Top View) NOTE For easy maintenance of the module, please keep about 3mm between the module and other components in the host PCB. EG95_Series_Hardware_Design 89 / 99 7.3. Top and Bottom Views of the Module LTE Standard Module Series EG95 Series Hardware Design Figure 44: Top View of the Module Figure 45: Bottom View of the Module NOTE These are renderings of the module. For authentic appearance, please refer to the module received from Quectel. EG95_Series_Hardware_Design 90 / 99 LTE Standard Module Series EG95 Series Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 5 C and the relative humidity should be 35%60%. 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. 3. The floor life of the module is 168 hours 1) in a plant where the temperature is 23 5 C and relative humidity is below 60%. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10% (e.g. a drying cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement above occurs;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. 5. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

All modules must be soldered to PCB within 24 hours after the baking, otherwise they should be put in a dry environment such as in a drying oven. EG95_Series_Hardware_Design 91 / 99 LTE Standard Module Series EG95 Series Hardware Design NOTES 1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the modules to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60%, It is recommended to start the solder reflow process within 24 hours after the package is removed. And do not remove the packages of tremendous modules if they are not ready for soldering. 3. Please take the module out of the packaging and put it on high-temperature resistant fixtures before the baking. If shorter baking time is desired, please refer to IPC/JEDEC J-STD-033 for baking procedure. 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.130.15 mm. For more details, please refer to document

[4]. It is suggested that the peak reflow temperature is 238246 C, and the absolute maximum reflow temperature is 246 C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Tem p. (C ) 246 238 220 200 150 100 S oak Z one A M ax slop e: 1 to 3C /s R eflow Z one M ax slop e:

2 to 3C /s C -1.5 to -3C /s C ooling dow n slope:

B D Figure 46: Recommended Reflow Soldering Thermal Profile EG95_Series_Hardware_Design 92 / 99 Table 45: Recommended Thermal Profile Parameters LTE Standard Module Series EG95 Series Hardware Design Soak time (between A and B: 150 C and 200 C) 70120 s Factor Soak Zone Max slope Reflow Zone Max slope Reflow time (D: over 220C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle 8.3. Packaging Recommendation 13 C/s 23 C/s 4570 s 238 C to 246 C

-1.5 to -3 C/s 1 EG95 is packaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until the devices are ready to be soldered onto the application. The reel is 330 mm in diameter and each reel contains 250pcs modules. The following figures show the packaging details, measured in mm. EG95_Series_Hardware_Design 93 / 99 LTE Standard Module Series EG95 Series Hardware Design Figure 47: Tape Specifications 48.5 13 0 0 1 44.5

+0.20

-0.00 Figure 48: Reel Specifications Cover tape Direction of feed EG95_Series_Hardware_Design 94 / 99 LTE Standard Module Series EG95 Series Hardware Design 1083 Carrier tape packing module Carrier tape unfolding Figure 49: Tape and Reel Directions EG95_Series_Hardware_Design 95 / 99

[1]

[2]

[3]

[4]

[5]

AMR bps CHAP CS CSD CTS LTE Standard Module Series EG95 Series Hardware Design 9 Appendix A References Table 46: Related Documents SN Document Name Remark Quectel_EC2x&EG9x_Power_Management_ Application_Note Power management application note for EC25 series, EC21 series, EC20 R2.1, EG95 series and EG91 series Quectel_LTE_Standard_AT_Commands_ Manual AT commands manual for LTE Standard modules Quectel_LTE_Standard_GNSS_Application_Note GNSS application note Standard modules for LTE Quectel_Module_Secondary_SMT_User_Guide Module secondary SMT user guide Quectel_RF_Layout_Application_Note RF layout application note

[6]

Quectel_LTE_Module_Thermal_Design_Guide

[7]

Quectel_UMTS&LTE_EVB_User_Guide Thermal design guide for LTE standard, LTE-A and Automotive modules UMTS&LTE EVB user guide for UMTS&LTE modules Table 47: Terms and Abbreviations Abbreviation Description Challenge Handshake Authentication Protocol Adaptive Multi-rate Bits Per Second Coding Scheme Circuit Switched Data Clear To Send DC-HSPA+

Dual-carrier High Speed Packet Access EG95_Series_Hardware_Design 96 / 99 GLONASS GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System DFOTA Delta Firmware Upgrade Over The Air LTE Standard Module Series EG95 Series Hardware Design DL DTR DTX EFR ESD FDD FR GMSK GNSS GPS GSM HR HSPA HSDPA HSUPA I/O Inorm LED LNA LTE MIMO MO MS Downlink Data Terminal Ready Discontinuous Transmission Enhanced Full Rate Electrostatic Discharge Frequency Division Duplex Full Rate Gaussian Minimum Shift Keying Global Navigation Satellite System Global Positioning System Global System for Mobile Communications Half Rate High Speed Packet Access High Speed Downlink Packet Access High Speed Uplink Packet Access Input/Output Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution Multiple Input Multiple Output Mobile Originated Mobile Station (GSM engine) EG95_Series_Hardware_Design 97 / 99 LTE Standard Module Series EG95 Series Hardware Design MSL MT PAP PCB PDU PPP QAM QPSK RF RHCP Rx SMS TDD TX UL UMTS URC

(U)SIM Vmax Vnorm Vmin VIHmax VIHmin VILmax VILmin Moisture Sensitivity Level Mobile Terminated Password Authentication Protocol Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Quadrature Amplitude Modulation Quadrature Phase Shift Keying Radio Frequency Right Hand Circularly Polarized Receive Short Message Service Time Division Duplexing Transmitting Direction Uplink Universal Mobile Telecommunications System Unsolicited Result Code

(Universal) Subscriber Identity Module Maximum Voltage Value Normal Voltage Value Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value EG95_Series_Hardware_Design 98 / 99 LTE Standard Module Series EG95 Series Hardware Design VImax VImin VOHin VOLmax VOLmin VSWR Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Minimum Output Low Level Voltage Value Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access EG95_Series_Hardware_Design 99 / 99 LTE Standard Module Series EG95 Series Hardware Design 10 Appendix B GPRS Coding Schemes Table 48: Description of Different Coding Schemes Radio Block excl.USF and BCS Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits Data Rate Kb/s CS-1 CS-2 CS-3 CS-4 1/2 3 3 181 40 4 456 0 9.05 2/3 3 6 268 16 4 588 132 13.4 3/4 3 6 312 16 4 676 220 15.6 1 3 12 428 16

456 21.4 EG95_Series_Hardware_Design 100 /

99 LTE Standard Module Series EG95 Series Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 49: GPRS Multi-slot Classes Multi-slot Class Downlink Slots Uplink Slots Active Slots 1 2 2 3 2 3 3 4 3 4 4 4 3 1 1 2 1 2 2 3 1 2 2 3 4 3 2 3 3 4 4 4 4 5 5 5 5 5 NA 1 2 3 4 5 6 7 8 9 10 11 12 13 EG95_Series_Hardware_Design 101 /

99 LTE Standard Module Series EG95 Series Hardware Design 4 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 4 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 EG95_Series_Hardware_Design 102 /

99 LTE Standard Module Series EG95 Series Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 50: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK C B A C B A B A A 8.80 kbps 17.60 kbps 35.20 kbps 11.2 kbps 22.4 kbps 44.8 kbps 14.8 kbps 29.6 kbps 59.2 kbps 17.6 kbps 35.2 kbps 70.4 kbps 22.4 kbps 44.8 kbps 89.6 kbps 29.6 kbps 59.2 kbps 118.4 kbps 44.8 kbps 89.6 kbps 179.2 kbps 54.4 kbps 108.8 kbps 217.6 kbps 59.2 kbps 118.4 kbps 236.8 kbps EG95_Series_Hardware_Design 103 /

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QUECTEL EG95-AUX a1-A6111 GA EG95AUXGA-1 28-SGNS SN: ES22629D3004xXXx1 IMEI:8630710101 aan C FCC ID: XMR202106EG95AUX

 

 

Quectel Wireless Solutions Company Limited Date: 2021/04/27 Federal Communications Commission Authorization and Evaluation Division Confidentiality Request regarding application for certification of FCC ID: XMR202106EG95AUX Pursuant to Sections 0.457 and 0.459 of the Commissions Rules, we hereby request confidential treatment of information accompanying this application as outlined below:

Block Diagram Schematics Operational Description Part Lists and Tune-up information The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these materials may be harmful to the applicant and provide unjustified benefits to its competitors. The applicant understands that pursuant to Section 0.457 of the Rules, disclosure of this application and all accompanying documentation will not be made before the date of the Grant for this application. Sincerely,

Grantee Contacts Signature Quectel Wireless Solutions Company Limited Jean Hu

 

 

Quectel Wireless Solutions Company Limited FCC Modular Approval Statement Receiver Federal Communication Commission Equipment Authorization Devision, Application Processing Branch 7435 Oakland Mills Road Columbia, MD 21048 Subject:

Modular Approval Statement Date: 2021/04/27 FCC Certification Number: XMR202106EG95AUX Model Name/Number: LTE Module / EG95-AUX TO WHOM IT MAY CONCERN Pursuant to Paragraphs CFR 15.212, we herewith declare for our module. Modular approval requirement Yes No *

(a) The radio elements must have the radio frequency circuitry be shielded. Physical/discrete and tuning capacitors may be located external to the shield, but must be on the module assembly.

*Please provide a detailed explanation if the answer is No.:

(b) The module shall have buffered modulation/data input(s) (if such inputs are provided) to ensure that the module will comply with the requirements set out in the applicable standard under conditions of excessive data rates or over-

modulation.

*Please provide a detailed explanation if the answer is No.:

(c) The module shall have its own power supply regulation on the module. This is to ensure that the module will comply with the requirements set out in the applicable standard regardless of the design of the power supplying circuitry in the host device which houses the module.

*Please provide a detailed explanation if the answer is No.:

(d) The module shall comply with the provisions for external power amplifiers and antennas detailed in this standard. The equipment certification submission shall contain a detailed description of the configuration of all antennas that will be used with the module.

*Please provide a detailed explanation if the answer is No.:

(e) The module shall be tested for compliance with the applicable standard in a stand-alone configuration, i.e. the module must not be inside another device during testing.

*Please provide a detailed explanation if the answer is No.:

(f) The module shall comply with the Category I equipment requirements and CFR 15.212(a)(1)(vi).

*Please provide a detailed explanation if the answer is No.:

1 Yes Yes Yes Yes Yes labeling Yes Quectel Wireless Solutions Company Limited FCC Modular Approval Statement Yes

(g) The module shall comply with applicable RSS-102 exposure requirements and any applicable FCC RF exposure requirement which are based on the intended use/configurations.

*Please provide a detailed explanation if the answer is No.:

(i) The modular transmitter complies with all applicable FCC rules. Instructions for maintaining compliance are given in the user instructions. If you have any questions, please feel free to contact us at the address shown below Best Regards, ____________________

(Signed) Name / Title: Jean Hu/ Certification Section Yes 2

 

 

Quectel Wireless Solutions Company Limited Declaration of Authorization We Name: Quectel Wireless Solutions Company Limited Address: Building 5, Shanghai Business Park PhaseIII, (Area B), No.1016 Tianlin Road, Minhang District, Shanghai China, 200233 Declare that:

Name Representative of agent: Ms. Riley Wei Agent Company name: BTL Inc. Address: No. 29, Jintang Road, Tangzhen Industry Park Pudong New Area City: Shanghai Country: China is authorized to apply for Certification of the following product(s) and signing all the related documents including 731 forms:

Product description: LTE Module Type designation: EG95-AUX Trademark: Quectel FCC ID: XMR202106EG95AUX on our behalf. Date: 2021-04-27 City: Shanghai Name: Jean Hu Function: Certification Section Signature: