FCC ID: XMR2021SC606TNAD LTE Module with Bluetooth and WiFi

 

SC606T Series Hardware Design Smart Module Series Version: 1.0 Date: 2021-03-16 Status: Released Smart Module Series SC606T Series Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit:

http://www.quectel.com/support/sales.htm. For technical support, or to report documentation errors, please visit:

http://www.quectel.com/support/technical.htm Or email to support@quectel.com. General Notes Quectel offers the information as a service to its customers. The information provided is based upon customers requirements. Quectel makes every effort to ensure the quality of the information it makes available. Quectel does not make any warranty as to the information contained herein, and does not accept any liability for any injury, loss or damage of any kind incurred by use of or reliance upon the information. All information supplied herein is subject to change without prior notice. Disclaimer While Quectel has made efforts to ensure that the functions and features under development are free from errors, it is possible that these functions and features could contain errors, inaccuracies and omissions. Unless otherwise provided by valid agreement, Quectel makes no warranties of any kind, implied or express, with respect to the use of features and functions under development. To the maximum extent permitted by law, Quectel excludes all liability for any loss or damage suffered in connection with the use of the functions and features under development, regardless of whether such loss or damage may have been foreseeable. Duty of Confidentiality The Receiving Party shall keep confidential all documentation and information provided by Quectel, except when the specific permission has been granted by Quectel. The Receiving Party shall not access or use Quectels documentation and information for any purpose except as expressly provided herein. Furthermore, the Receiving Party shall not disclose any of the Quectel's documentation and information to any third party without the prior written consent by Quectel. For any noncompliance to the above requirements, unauthorized use, or other illegal or malicious use of the documentation and information, Quectel will reserve the right to take legal action. SC606T_Series_Hardware_Design 1 / 116 Smart Module Series SC606T Series Hardware Design Copyright The information contained here is proprietary technical information of Quectel. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design. Copyright Quectel Wireless Solutions Co., Ltd. 2021. All rights reserved. SC606T_Series_Hardware_Design 2 / 116 Smart Module Series SC606T Series Hardware Design Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions, such as when the mobile bill is unpaid or the (U)SIM card is invalid. When emergency help is needed in such conditions, use emergency call if the device supports it. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. In an emergency, the device with emergency call function cannot be used as the only contact method considering network connection cannot be guaranteed under all circumstances. The cellular terminal or mobile contains a transceiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV sets, radios, computers or other electric equipment. In locations with explosive or potentially explosive atmospheres, obey all posted signs and turn off wireless devices such as mobile phone or other cellular terminals. Areas with explosive or potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, and areas where the air contains chemicals or particles such as grain, dust or metal powders. SC606T_Series_Hardware_Design 3 / 116 Smart Module Series SC606T Series Hardware Design About the Document Revision History Version Date Author Description

2021-01-25 Creation of the document 1.0 2021-03-16 First official release Dorian MENG/

Mike ZENG Dorian MENG/

Mike ZENG SC606T_Series_Hardware_Design 4 / 116 Smart Module Series SC606T Series Hardware Design Contents Safety Information ....................................................................................................................................... 3 About the Document ................................................................................................................................... 4 Contents ....................................................................................................................................................... 5 Table Index ................................................................................................................................................... 8 Figure Index ............................................................................................................................................... 10 1 Introduction ........................................................................................................................................ 12 2 Product Concept ................................................................................................................................ 15 2.1. General Description .................................................................................................................. 15 2.2. Key Features ............................................................................................................................. 17 2.3. Functional Diagram ................................................................................................................... 20 2.4. Evaluation Board ....................................................................................................................... 21 3.5.1. 3.5.2. 3 Application Interfaces ....................................................................................................................... 22 3.1. General Description .................................................................................................................. 22 3.2. Pin Assignment ......................................................................................................................... 23 3.3. Pin Description .......................................................................................................................... 24 3.4. Power Supply ............................................................................................................................ 37 3.4.1. Power Supply Pins ......................................................................................................... 37 3.4.2. Decrease Voltage Drop .................................................................................................. 37 3.4.3. Reference Design for Power Supply .............................................................................. 38 3.5. Turn-On and Turn-Off Timing .................................................................................................... 39 Turn On Module ............................................................................................................. 39 Turn Off Module ............................................................................................................. 41 3.6. VRTC Interface ......................................................................................................................... 41 3.7. Power Output ............................................................................................................................ 42 3.8. USB Interface ............................................................................................................................ 43 3.9. UART Interfaces ........................................................................................................................ 46 3.10. (U)SIM Interfaces ...................................................................................................................... 48 3.11. SD Card Interface ..................................................................................................................... 50 3.12. GPIO Interfaces ........................................................................................................................ 52 3.13. I2C Interfaces ............................................................................................................................ 53 3.14. SPI Interfaces ............................................................................................................................ 53 3.15. ADC Interface ............................................................................................................................ 54 3.16. LCM Interfaces .......................................................................................................................... 54 3.17. Touch Panel Interfaces ............................................................................................................. 58 3.18. Camera Interfaces..................................................................................................................... 59 3.18.1. Design Considerations ................................................................................................... 63 3.19. Sensor Interfaces ...................................................................................................................... 66 3.20. Audio Interfaces ........................................................................................................................ 66 SC606T_Series_Hardware_Design 5 / 116 Smart Module Series SC606T Series Hardware Design 3.20.1. Reference Design for Microphone Interfaces ................................................................ 68 3.20.2. Reference Design for Earpiece Interface ....................................................................... 69 3.20.3. Reference Design for Headphone Interface .................................................................. 69 3.20.4. Reference Design for Loudspeaker Interface ................................................................ 70 3.20.5. Design Considerations ................................................................................................... 70 3.21. Emergency Download Interface ................................................................................................ 70 4 Wi-Fi and BT ....................................................................................................................................... 72 4.1. Wi-Fi Function Overview ........................................................................................................... 72 4.1.1. Wi-Fi Performance ......................................................................................................... 72 4.2. BT Function Overview ............................................................................................................... 74 4.2.1. BT Performance ............................................................................................................. 75 5 GNSS ................................................................................................................................................... 76 5.1. GNSS Performance .................................................................................................................. 76 5.2. GNSS Design Guidelines .......................................................................................................... 76 6 Antenna Interfaces ............................................................................................................................. 78 6.1. Main and Rx-diversity Antenna Interfaces ................................................................................ 78 6.1.1. Reference Design for Main and Rx-diversity Antenna Interfaces .................................. 81 6.1.2. Reference Designs for RF Layouts ................................................................................ 81 6.2. Wi-Fi/BT and FM Antenna Interfaces ........................................................................................ 83 6.3. GNSS Antenna Interface ........................................................................................................... 84 6.3.1. Reference Design for Passive Antenna ......................................................................... 85 6.3.2. Reference Design for Active Antenna ............................................................................ 86 6.4. Antenna Installation................................................................................................................... 86 6.4.1. Antenna Requirements .................................................................................................. 86 6.4.2. Recommended RF Connector for Antenna Installation ................................................. 87 7 Reliability, Electrical and Radio Characteristics ............................................................................ 90 7.1. Absolute Maximum Ratings ...................................................................................................... 90 7.2. Operating Power ....................................................................................................................... 90 7.3. Operating and Storage Temperatures ...................................................................................... 91 7.4. Current Consumption ................................................................................................................ 91 7.5. RF Output Power ...................................................................................................................... 96 7.6. RF Receiving Sensitivity ........................................................................................................... 99 7.7. Electrostatic Discharge ........................................................................................................... 102 8 Mechanical Dimensions .................................................................................................................. 103 8.1. Mechanical Dimensions of the Module ................................................................................... 103 8.2. Recommended Footprint ........................................................................................................ 105 8.3. Top and Bottom Views of the Module ..................................................................................... 106 9 Storage, Manufacturing and Packaging ........................................................................................ 107 9.1. Storage .................................................................................................................................... 107 9.2. Manufacturing and Soldering .................................................................................................. 108 9.3. Packaging................................................................................................................................ 109 SC606T_Series_Hardware_Design 6 / 116 Smart Module Series SC606T Series Hardware Design 10 Appendix A References................................................................................................................... 111 11 Appendix B GPRS Coding Schemes ............................................................................................. 116 12 Appendix C GPRS Multi-slot Classes ............................................................................................ 117 13 Appendix D EDGE Modulation and Coding Schemes ................................................................. 119 SC606T_Series_Hardware_Design 7 / 116 Smart Module Series SC606T Series Hardware Design Table Index Table 1: Frequency Bands, CA Combinations and GNSS Types of SC606T-EM ..................................... 15 Table 2: Frequency Bands, CA Combinations and GNSS Types of SC606T-NAD ................................... 16 Table 3: Frequency Bands, CA Combinations and GNSS Types of SC606T-JP ...................................... 16 Table 4: Frequency Bands of SC606T-WF ................................................................................................ 17 Table 5: Key Features ................................................................................................................................ 17 Table 6: I/O Parameters Definition ............................................................................................................. 24 Table 7: Pin Description ............................................................................................................................. 24 Table 8: Power Description ........................................................................................................................ 42 Table 9: Pin Definition of USB Interface ..................................................................................................... 43 Table 10: USB Trace Length Inside the Module ........................................................................................ 46 Table 11: Pin Definition of UART Interfaces ............................................................................................... 46 Table 12: Pin Definition of (U)SIM Interfaces ............................................................................................. 48 Table 13: Pin Definition of SD Card Interface ............................................................................................ 50 Table 14: SD Card Signal Trace Length Inside the Module ....................................................................... 51 Table 15: Pin Definition of GPIO Interfaces ............................................................................................... 52 Table 16: Pin Definition of I2C Interfaces ................................................................................................... 53 Table 17: Pin Definition of SPI Interfaces................................................................................................... 54 Table 18: Pin Definition of ADC Interface ................................................................................................... 54 Table 19: Pin Definition of LCM Interfaces ................................................................................................. 55 Table 20: Pin Definition of Touch Panel Interfaces .................................................................................... 58 Table 21: Pin Definition of Camera Interfaces ........................................................................................... 59 Table 22: MIPI Trace Length Inside the Module ........................................................................................ 64 Table 23: Pin Definition of Sensor Interfaces ............................................................................................. 66 Table 24: Pin Definition of Audio Interfaces ............................................................................................... 67 Table 25: Wi-Fi Transmitting Performance ................................................................................................. 72 Table 26: Wi-Fi Receiving Performance ..................................................................................................... 73 Table 27: BT Data Rate and Versions ........................................................................................................ 75 Table 28: BT Transmitting and Receiving Performance............................................................................. 75 Table 29: GNSS Performance .................................................................................................................... 76 Table 30: Pin Definition of Main and Rx-diversity Antenna Interfaces ....................................................... 78 Table 31: SC606T-JP Operating Frequencies ........................................................................................... 78 Table 32: SC606T-EM Operating Frequencies .......................................................................................... 79 Table 33: SC606T-NAD Operating Frequencies ........................................................................................ 80 Table 34: Pin Definition of Wi-Fi/BT and FM Antenna Interfaces............................................................... 83 Table 35: Wi-Fi/BT and FM Frequency ...................................................................................................... 84 Table 36: Pin Definition of GNSS Antenna ................................................................................................. 85 Table 37: GNSS Frequency ....................................................................................................................... 85 Table 38: Antenna Requirements ............................................................................................................... 86 Table 39: Absolute Maximum Ratings ........................................................................................................ 90 Table 40: Operating Power ......................................................................................................................... 90 Table 41: Operating and Storage Temperatures ........................................................................................ 91 SC606T_Series_Hardware_Design 8 / 116 Smart Module Series SC606T Series Hardware Design Table 42: SC606T-JP Current Consumption .............................................................................................. 91 Table 43: SC606T-EM Current Consumption ............................................................................................ 93 Table 44: SC606T-JP RF Output Power .................................................................................................... 97 Table 45: SC606T-EM RF Output Power ................................................................................................... 97 Table 46: SC606T-NAD RF Output Power ................................................................................................. 98 Table 47: SC606T-JP RF Receiving Sensitivity ......................................................................................... 99 Table 48: SC606T-EM RF Receiving Sensitivity ...................................................................................... 100 Table 49: SC606T-NAD RF Receiving Sensitivity .................................................................................... 101 Table 50: ESD Characteristics (Temperature: 25 C, Humidity: 45 %) .................................................... 102 Table 51: Recommended Thermal Profile Parameters ............................................................................ 109 Table 52: Reel Packaging ........................................................................................................................ 110 Table 53: Related Documents ................................................................................................................... 111 Table 54: Terms and Abbreviations ........................................................................................................... 111 Table 55: Description of Different Coding Schemes ................................................................................ 116 Table 56: GPRS Multi-slot Classes .......................................................................................................... 117 Table 57: EDGE Modulation and Coding Schemes ................................................................................. 119 SC606T_Series_Hardware_Design 9 / 116 Smart Module Series SC606T Series Hardware Design Figure Index Figure 1: Functional Diagram ..................................................................................................................... 21 Figure 2: Pin Assignment (Perspective View) ............................................................................................ 23 Figure 3: Voltage Drop Sample .................................................................................................................. 38 Figure 4: Star Structure of Power Supply .................................................................................................. 38 Figure 5: Reference Design for Power Supply .......................................................................................... 39 Figure 6: Turn On Module Using Driving Circuit ........................................................................................ 39 Figure 7: Turn On Module Using Button .................................................................................................... 40 Figure 8: Power-up Timing ......................................................................................................................... 40 Figure 9: Power-off Timing ......................................................................................................................... 41 Figure 10: RTC Powered by Coin Cell ....................................................................................................... 41 Figure 11: USB 2.0 Interface Reference Design ........................................................................................ 44 Figure 12: USB Type-C Interface Reference Design ................................................................................. 45 Figure 13: Reference Design for Level Translator Chip (for UART5) ........................................................ 47 Figure 14: RS-232 Level Match Circuit (for UART5) ................................................................................. 47 Figure 15: Reference Design for (U)SIM Interface with an 8-pin (U)SIM Card Connector ....................... 49 Figure 16: Reference Design for (U)SIM Interface with a 6-pin (U)SIM Card Connector ......................... 49 Figure 17: Reference Design for SD Card Interface .................................................................................. 51 Figure 18: Reference Design for LCM0 Interface ...................................................................................... 56 Figure 19: Reference Design for LCM1 Interface ...................................................................................... 57 Figure 20: Reference Design for LCM External Backlight Driver .............................................................. 58 Figure 21: Reference Design for Touch Panel Interface ............................................................................ 59 Figure 22: Reference Design for Dual Camera Application ....................................................................... 62 Figure 23: Reference Design for Triple Camera Application ..................................................................... 63 Figure 24: Reference Design for Analog ECM-type Microphone .............................................................. 68 Figure 25: Reference Design for MEMS-type Microphone ........................................................................ 68 Figure 26: Reference Design for Earpiece Interface ................................................................................. 69 Figure 27: Reference Design for Headphone Interface with Normally Open Jack.................................... 69 Figure 28: Reference Design for Loudspeaker Interface ........................................................................... 70 Figure 29: Reference Design for USB_BOOT ........................................................................................... 71 Figure 30: Reference Circuit Design for Main and Rx-diversity Antenna Interfaces ................................. 81 Figure 31: Microstrip Design on a 2-layer PCB ......................................................................................... 82 Figure 32: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 82 Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 82 Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 83 Figure 35: Reference Circuit Design for Wi-Fi/BT Antenna Interface ........................................................ 84 Figure 36: Reference Circuit Design for FM Antenna Interface ................................................................. 84 Figure 37: Reference Design for GNSS Passive Antenna ........................................................................ 85 Figure 38: Reference Design for GNSS Active Antenna ........................................................................... 86 Figure 39: Dimensions of the U.FL-R-SMT Connector (Unit: mm) ............................................................ 88 Figure 40: Mechanicals of U.FL-LP Connectors ........................................................................................ 88 Figure 41: Form Factor of Mated Connectors (Unit: mm) .......................................................................... 89 SC606T_Series_Hardware_Design 10 / 116 Smart Module Series SC606T Series Hardware Design Figure 42: Top and Side Dimensions (Unit: mm) ..................................................................................... 103 Figure 43: Bottom Dimensions (Perspective View) ................................................................................. 104 Figure 44: Recommended Footprint (Perspective View) ......................................................................... 105 Figure 45: Top and Bottom Views ............................................................................................................ 106 Figure 46: Recommended Reflow Soldering Thermal Profile ................................................................. 108 Figure 47: Tape Dimensions .................................................................................................................... 110 Figure 48: Reel Dimensions ..................................................................................................................... 110 SC606T_Series_Hardware_Design 11 / 116 Smart Module Series SC606T Series Hardware Design 1 Introduction This document provides information on the functional features, interface specifications, as well as electrical and mechanical details of the SC606T series modules (SC606T-EM, SC606T-NAD, SC606T-JP, and SC606T-WF). Consult this document to learn about the air and hardware interfaces and external application reference designs among other related information of the series modules. This document, coupled with application notes and user guides, makes it easy to design applications with the module. FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met:

1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based timeaveraging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091. 2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the users body and must not transmit simultaneously with any other antenna or transmitter. 3. A label with the following statements must be attached to the host end product: This device contains FCC ID: XMR2021SC606TNAD 4. To comply with FCC regulations limiting both maximum RF output power and human exposure to RF radiation, maximum antenna gain (including cable loss) must not exceed:

FCC Max Antenna GaindBi IC Max Antenna GaindBi radiation, maximum antenna gain (including cable loss) must not exceed: Operating Band WCDMA BAND 2 WCDMA BAND 4 WCDMA BAND 5 LTE BAND 2 LTE BAND 4 LTE BAND 5 LTE BAND 7 LTE BAND 12 LTE BAND 13 LTE BAND 14 LTE BAND 17 8.00 5.00 9.42 8.00 5.00 9.41 8.00 8.70 9.16 9.23 8.74 8.00 5.00 8.26 8.00 5.00 8.25 8.00 7.76 8.09 8.13 7.79 SC606T_Series_Hardware_Design 12 / 116 Smart Module Series SC606T Series Hardware Design LTE BAND 25 LTE BAND 26(814-824) LTE BAND 26(824-849) LTE BAND 41 LTE BAND 66 LTE BAND 71 8.00 9.36 9.41 8.00 5.00 7.15 8.00 N/A 8.25 8.00 5.00 7.62 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:

A certified modular has the option to use a permanently affixed label, or an electronic label. For a permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2 Certification (labeling requirements) above). The OEM manual must provide clear instructions explaining to the OEM the labeling requirements, options and OEM user manual instructions that are required (see next paragraph). For a host using a certified modular with a standard fixed label, if (1) the modules FCC ID is not visible when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible;

then an additional permanent label referring to the enclosed module: Contains Transmitter Module FCC ID: XMR2021SC606TNAD or Contains FCC ID: XMR2021SC606TNAD must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The users manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. In cases where the manual is provided only in a form other than paper, such as on a computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the manufacturer could void the users authority to operate the equipment. To ensure compliance with all non-transmitter functions the host manufacturer is responsible for ensuring compliance with the module(s) installed and fully operational. For example, if a host was previously authorized as an unintentional radiator under the Suppliers Declaration of Conformity procedure without SC606T_Series_Hardware_Design 13 / 116 Smart Module Series SC606T Series Hardware Design a transmitter certified module and a module is added, the host manufacturer is responsible for ensuring that the after the module is installed and operational the host continues to be compliant with the Part 15B unintentional radiator requirements. Manual Information To the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. IC Statement IRSS-GEN

"This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device." or "Le prsent appareil est conforme aux CNR dIndustrie Canada applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes :

1) lappareil ne doit pas produire de brouillage; 2) lutilisateur de lappareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible den compromettre le fonctionnement."

Dclaration sur l'exposition aux rayonnements RF L'autre utilis pour l'metteur doit tre install pour fournir une distance de sparation d'au moins 20 cm de toutes les personnes et ne doit pas tre colocalis ou fonctionner conjointement avec une autre antenne ou un autre metteur. The host product shall be properly labeled to identify the modules within the host product. The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host product; otherwise, the host product must be labeled to display the Innovation, Science and Economic Development Canada certification number for the module, preceded by the word Contains or similar wording expressing the same meaning, as follows:

Contains IC: 10224A-21SC606TNAD or where: 10224A- 21SC606TNAD is the modules certification number. Le produit hte doit tre correctement tiquet pour identifier les modules dans le produit hte. L'tiquette de certification d'Innovation, Sciences et Dveloppement conomique Canada d'un module doit tre clairement visible en tout temps lorsqu'il est installdans le produit hte; sinon, le produit hte doit porter une tiquette indiquant le numro de certification d'Innovation, Sciences et Dveloppement conomique Canada pour le module, prcd du mot Contient ou d'un libell semblable exprimant la mme signification, comme suit:

"Contient IC: 10224A-21SC606TNAD " ou "o: 10224A-21SC606TNAD est le numro de certification du module". SC606T_Series_Hardware_Design 14 / 116 Smart Module Series SC606T Series Hardware Design 2 Product Concept 2.1. General Description SC606T is a series of smart modules applicable to Linux operating system and provides industrial-grade performance. Their general features are listed below:

Support LTE-FDD, LTE-TDD, DC-HSDPA, DC-HSUPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE, GPRS and GSM;

Integrate GPS/GLONASS/BeiDou satellite positioning systems;

Support short-range wireless communication via Wi-Fi 802.11a/b/g/n/ac and BT 4.2 LE;

Support multiple audio and video codecs;

With the built-in high-performance AdrenoTM506 graphics processing unit;

Provide multiple audio and video input/output interfaces as well as abundant GPIO interfaces. The series comes in SC606T-EM, SC606T-NAD, SC606T-JP, and SC606T-WF models. The following tables show the frequency bands, CA combinations, as well as the Wi-Fi, Bluetooth, and GNSS frequency bands supported by each model. Table 1: Frequency Bands, CA Combinations and GNSS Types of SC606T-EM Mode LTE-FDD LTE-TDD WCDMA GSM Details B38/B40/B41 B1/B2/B3/B4/B5/B7/B8/B20/B28A/B28B B1/B2/B4/B5/B8 850/900/1800/1900 MHz Intra-band 2CA (DL) 1A-1A, 1C, 2A-2A, 2C, 3A-3A, 3C, 4A-4A, 5A-5A, 5B, 7A-7A, 7C, 38C, 39C, 40C, 41A-41A, 41C Wi-Fi 802.11a/b/g/n/ac 24022482 MHz; 51805825 MHz BT 4.2 LE 24022480 MHz SC606T_Series_Hardware_Design 15 / 116 Smart Module Series SC606T Series Hardware Design GPS: 1575.42 1.023 MHz GLONASS: 1597.51605.8 MHz BeiDou: 1561.098 2.046 MHz Table 2: Frequency Bands, CA Combinations and GNSS Types of SC606T-NAD B2/B4/B5/B7/B12/B13/B14/B17/B25/B26/B66/B71 Intra-band 2CA (DL) 2A-2A, 2C, 4A-4A, 5A-5A, 5B, 7A-7A,7C, 66A-66A, 66B, 66C, 41A-41A, 41C Details B41

Details B41

B1/B6/B8/B19 Wi-Fi 802.11a/b/g/n/ac 24022482 MHz; 51805825 MHz 24022480 MHz GPS: 1575.42 1.023 MHz GLONASS: 1597.51605.8 MHz BeiDou: 1561.098 2.046 MHz Table 3: Frequency Bands, CA Combinations and GNSS Types of SC606T-JP B1/B3/B5/B8/B11/B18/B19/B21/B26/B28A/B28B Intra-band 2CA (DL) 1A-1A, 1C, 3A-3A, 3C, 5A-5A, 5B, 41A-41A, 41C Wi-Fi 802.11a/b/g/n/ac 24022482 MHz; 51805825 MHz 24022480 MHz GPS: 1575.42 1.023 MHz GLONASS: 1597.51605.8 MHz BeiDou: 1561.098 2.046 MHz GNSS Mode LTE-FDD LTE-TDD WCDMA GSM BT 4.2 LE GNSS Mode LTE-FDD LTE-TDD WCDMA GSM BT 4.2 LE GNSS SC606T_Series_Hardware_Design 16 / 116 Smart Module Series SC606T Series Hardware Design Table 4: Frequency Bands of SC606T-WF Mode LTE-FDD LTE-TDD WCDMA GSM BT 4.2 LE GNSS Details

24022480 MHz Wi-Fi 802.11a/b/g/n/ac 24022482 MHz; 51805825 MHz SC606T series module is an SMD-type module, which can be embedded into applications through its 323 pins (152 LCC and 171 LGA pins). With a compact profile of 43.0 mm 44.0 mm 2.85 mm, the module can meet almost all requirements for M2M applications such as smart metering, smart home, security, wireless POS, mobile computing devices, PDA phone and tablet PC. 2.2. Key Features Table 5: Key Features Features Details Application Processor Octa-core ARM Cortex-A53 64-bit CPU @ 2.0 GHz (high performance) One quad-core with 1 MB L2 cache One quad-core with 512 KB L2 cache Modem system Hexagon DSP V56 core, up to 850 MHz 768 KB L2 caches GPU AdrenoTM 506 with 64-bit addressing, designed for 650 MHz Memory 16 GB eMMC + 2 GB LPDDR3 (default) 32 GB eMMC + 3 GB LPDDR3 (optional) 64 GB eMMC + 4 GB LPDDR3 (optional) Operating System Linux OS Power Supply VBAT Supply Voltage: 3.554.4 V Typical: 3.8 V SC606T_Series_Hardware_Design 17 / 116 Smart Module Series SC606T Series Hardware Design Class 4 (33 dBm 2 dB) for GSM850 Class 4 (33 dBm 2 dB) for EGSM900 Class 1 (30 dBm 2 dB) for DCS1800 Class 1 (30 dBm 2 dB) for PCS1900 Class E2 (27 dBm 3 dB) for GSM850 8-PSK Class E2 (27 dBm 3 dB) for EGSM900 8-PSK Class E2 (26 dBm 3 dB) for DCS1800 8-PSK Class E2 (26 dBm 3 dB) for PCS1900 8-PSK Class 3 (24 dBm +1/-3 dB) for WCDMA bands Class 3 (23 dBm 2 dB) for LTE-FDD bands Class 3 (23 dBm 2 dB) for LTE-TDD bands Support 3GPP Rel-10 Cat 6 and Cat 4 Support 1.4 to 20 MHz RF bandwidths Support Multiuser MIMO in DL direction Cat 6 FDD: Max 300 Mbps (DL)/Max 50 Mbps (UL) Cat 6 TDD: Max 265 Mbps (DL)/Max 30 Mbps (UL) Cat 4 FDD: Max 150 Mbps (DL)/Max 50 Mbps (UL) Cat 4 TDD: Max 130 Mbps (DL)/Max 30 Mbps (UL) Support 3GPP Rel-9 DC-HSDPA/DC-HSUPA/HSPA+/HSDPA/HSUPA/WCDMA Support QPSK, 16QAM and 64QAM modulation DC-HSDPA: Max. 42 Mbps (DL) DC-HSUPA: Max. 11.2 Mbps (UL) WCDMA: Max. 384 kbps (DL)/Max. 384 kbps (UL) Transmitting Power LTE Features UMTS Features GSM Features R99 CSD: 9.6 kbps, 14.4 kbps GPRS Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107 kbps (DL), 85.6 kbps (UL) EDGE Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: MCS 1-9 Uplink coding schemes: MCS 1-9 Max. 296 kbps (DL), 236.8 kbps (UL) WLAN Features 2.4/5 GHz, 802.11a/b/g/n/ac, maximally up to 433 Mbps Support AP and STA modes Bluetooth Features BT 4.2 LE GNSS Features GPS/GLONASS/BeiDou SMS Text and PDU mode Point-to-point MO and MT SC606T_Series_Hardware_Design 18 / 116 Smart Module Series SC606T Series Hardware Design Video Codec Video encoding and decoding: up to 4 K @ 30 fps, up to 1080 P @ 60 fps Wi-Fi Video: encoding up to 1080 P @ 30 fps; decoding up to 1080 P @ 60 fps LCM Interfaces Camera Interfaces Audio Interfaces Audio Codec USB Interface SMS cell broadcast Support two groups of 4-lane MIPI_DSI Support dual LCDs Support WUXGA up to 1200 (RGB) 1920 @ 60 fps Support three groups of 4-lane MIPI_CSI, up to 2.1 Gbps per lane Support 3 cameras (4-lane + 4-lane + 4-lane) or 4 cameras (4-lane + 4-lane +

2-lane + 1-lane) Up to 24 MP with dual ISP Audio Input Three analog microphone inputs Audio Output Class AB stereo headphone output Class AB earpiece differential output Class D speaker differential amplifier output Support G711, QCELP, EVRC, EVRC-B, EVRC-WB, AMR-NB, AMR-WB, GSM-EFR, GSM-FR, GSM-HR Support USB 3.0 or 2.0, with transmission rates up to 5 Gbps on USB 3.0 and 480 Mbps on USB 2.0 Support USB OTG Used for AT command communication, data transmission, software debugging and firmware upgrade Three UART Interfaces: UART5, UART4, and UART2 UART5: 4-wire UART interface with hardware flow control (RTS/CTS), UART Interfaces baud rate up to 4 Mbps UART4: 2-wire UART interface UART2: 2-wire UART interface used for debugging SD Card Interface Support SD 3.0 Support SD card hot-plug

(U)SIM Interfaces Two (U)SIM interfaces Support USIM/SIM card: 1.8/2.95 V Support Dual SIM Dual Standby by default I2C Interfaces Five I2C interfaces, used for peripherals such as TP, camera and sensor ADC Interface SPI Interfaces One general-purpose ADC interface Support up to 15-bit ADC resolution Two SPI interfaces, only support master mode One SPI interface used for peripheral device One SPI interface used for sensor application, such as fingerprint sensor Real Time Clock Supported SC606T_Series_Hardware_Design 19 / 116 Smart Module Series SC606T Series Hardware Design Antenna Interfaces Main antenna, Rx-diversity antenna, GNSS antenna, Wi-Fi/BT antenna, and FM antenna Physical Characteristics Size: (43.0 0.15) mm (44.0 0.15) mm (2.85 0.2) mm Package: LCC + LGA Weight: approx. 13.0 g Temperature Range Operating temperature range: -35 to +75 C 1) Storage temperature range: -40 to +90 C Firmware Upgrade Over USB interface RoHS All hardware components are fully compliant with EU RoHS directive NOTE 1) Within the operating temperature range, the module is 3GPP compliant. 2.3. Functional Diagram The following figure shows a block diagram of the series and illustrates the major functional parts. Power management Radio frequency Baseband LPDDR3 + eMMC flash Peripheral interfaces

-- VRTC interface

-- USB interface

-- UART interfaces

-- (U)SIM interfaces

-- SD card interface

-- GPIO interfaces

-- I2C interfaces

-- SPI interfaces

-- ADC interface

-- LCM (MIPI) interfaces

-- Touch Panel (TP) interfaces

-- Camera (MIPI) interfaces

-- Sensor interfaces

-- Audio interfaces

-- USB_BOOT interface SC606T_Series_Hardware_Design 20 / 116 Smart Module Series SC606T Series Hardware Design Figure 1: Functional Diagram 2.4. Evaluation Board To help you develop applications with the module conveniently, Quectel supplies an evaluation board, a USB to RS232 converter cable, a USB Type-C data cable, a power adapter, an earphone, an antenna, and other peripherals to control or test the module. For more details, see document [1]. SC606T_Series_Hardware_Design 21 / 116 BasebandTransceiverWCNLPDDReMMC DIPXOANT_GNSSANT_WIFI/BTGPIOsI2CsSD 3.0UARTs 2(U)SIMUSB2.0&3.03CAM2TP2LCM2SPIEARSPKMICsADCRFCLKBBCLKMEMMultimediaConnectivityAir InterfaceProcessorsCodecPowerSignalPowerFunctionSAW48MHz5G FEMDuplexsPAPAMSAWLNASAWSAWSwitchSAWANT_DRXANT_MAIN19.2MXOPMUHK ADC &MPPsPWMHeadsetVRTCAPTVDD_RFPWRKEYC1SD_LDO11USIM1_VDDUSIM2_VDDLDO6_1P8LDO5_1P8SD_LDO12LDO22_2P8LDO10_2P8LDO17_2P85LDO23_1P2LDO2_1P1VBATVPH_PWRANT_FMVOL_UPVOL_DOWNI2S Smart Module Series SC606T Series Hardware Design 3 Application Interfaces 3.1. General Description The following chapters describe in detail the pins/interfaces listed below. Power supply VRTC interface USB interface UART interfaces

(U)SIM interfaces SD card interface GPIO interfaces I2C interfaces SPI interfaces ADC interface LCM interfaces TP interfaces Camera interfaces Sensor interfaces Audio interfaces USB_BOOT interface SC606T_Series_Hardware_Design 22 / 116 Smart Module Series SC606T Series Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of the series. Figure 2: Pin Assignment (Perspective View) SC606T_Series_Hardware_Design 23 / 116 313314315316317318319306307308309310311312299300301302303304305292293294295296297298285286287288289290291278279280281282283284271272273274275276277264265266268269270267257258259261262263260123456789101112323321322115116117118120121122123124125126128129130131132133134135136137138139141142143145146147148149150151152127140119GNDPOWERAUDIOUSB(U)SIMSDTPLCMCAMERAANTUARTGPIORESERVEDOTHERS320PMU_MPP4PMU_MPP2GNDANT_DRXGNDVOL_DOWNVOL_UPUSIM1_DETUSIM1_CLKUSIM1_DATAUSIM1_VDDTP0_I2C_SCLTP0_INTTP0_RSTTP1_INTTP1_RSTGNDANT_GNSSGNDSENSOR_I2C_SCLGNDANT_WIFI/BTGNDLCD0_RSTLCD0_TEGNDDSI0_LN3_NDSI0_LN3_PDSI0_LN2_NDSI0_LN2_PDSI0_LN1_NDSI0_LN1_PDSI0_LN0_NDSI0_LN0_PDSI0_CLK_NDSI0_CLK_PUSIM2_VDDUSIM2_DATAUSIM2_CLKUSIM2_RSTTP0_I2C_SDATP1_I2C_SCLTP1_I2C_SDAFP_SPI_CSGNSS_LNA_ENGPIO_2GPIO_3UART5_TXDUART5_RXDDCAM_I2C_SDADCAM_I2C_SCLUSIM2_DETGPIO_45GPIO_44GPIO_43GPIO_42FP_SPI_MISOFP_SPI_CLKFP_SPI_MOSIGPIO_0GPIO_1UART5_CTSUART5_RTSGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDVDD_RFVDD_RFGNDGNDUART2_TXDUART2_RXDUART4_TXDUART4_RXDLDO5_1P8131415LDO10_2P8LDO2_1P1LDO17_2P85LDO22_2P8LDO23_1P216VRTC17RESERVED18GND19ANT_MAINGND21RESERVED22RESERVED2023RESERVED24RESERVED25RESERVED26RESERVED27RESERVED28RESERVED29RESERVED30USB_ID31GND32USB_DP33USB_DM34GND35GND36VBAT37VBAT38VBAT114LCD1_TE113LCD1_RST112GND111DSI1_LN3_N110DSI1_LN3_P109DSI1_LN2_N108DSI1_LN2_P107DSI1_LN1_N106DSI1_LN1_P105DSI1_LN0_N104DSI1_LN0_P103DSI1_CLK_N102DSI1_CLK_P101GND100SCAM_MCLK99MCAM_MCLK98GND97CSI0_LN3_N96CSI0_LN3_P95CSI0_LN2_N94CSI0_LN2_P93CSI0_LN1_N92CSI0_LN1_P91CSI0_LN0_N90CSI0_LN0_P89CSI0_CLK_N88CSI0_CLK_P87GND86CSI2_LN3_N85CSI2_LN3_P84CSI2_LN2_N83CSI2_LN2_P82CSI2_LN1_N81CSI2_LN1_P80CSI2_LN0_N79CSI2_LN0_P78CSI2_CLK_N77CSI2_CLK_P153RESERVED154RESERVED155RESERVED156RESERVED157RESERVED158RESERVED159GND160GND161RESERVED162RESERVED163GND164RESERVED165RESERVED166RESERVED211S2A212RESERVED213RESERVED214RESERVED215S1A216S1B217RESERVED218RESERVED219GND220VPH_PWR221VPH_PWR195GND194DCAM_MCLK193GND192CSI1_LN3_N191CSI1_LN3_P190CSI1_LN2_N189CSI1_LN2_P188CSI1_LN1_N187CSI1_LN1_P186CSI1_LN0_N185CSI1_LN0_P184CSI1_CLK_N183CSI1_CLK_P182GND244FM_ANT243GND242GRFC_5241GRFC_7240RESERVED239RESERVED238GPIO_33237GPIO_36236CAM4_MCLK235RESERVED234GPIO_66RESERVEDUSBC_CC2USBC_CC1GNDUSB_SS_SELLINE_OUT_PLINE_OUT_NGPIO_97GPIO_96GPIO_90GPIO_89S2BMIC_BIASMIC_GNDMIC3_PGNDUSB_SS_RX_PUSB_SS_RX_MGNDUSB_SS_TX_PUSB_SS_TX_MGNDGPIO_98GPIO_99SD_LDO12DCAM_RSTDCAM_PWDN76CAM_I2C_SDA39PWRKEY40GND41USB_VBUS42USB_VBUS43GND44MIC1_P45MIC1_N46MIC2_P47GND48HS_DET49HPH_L50HPH_REF51HPH_R52EAR_N53EAR_P54SPK_N55SPK_P56GND57USB_BOOT58SPI_CS59SPI_CLK60SPI_MOSI61SPI_MISO62GND63SD_LDO1164SD_DET65SD_DATA366SD_DATA267SD_DATA168SD_DATA069SD_CMD70SD_CLK71SCAM_PWDN72SCAM_RST73MCAM_PWDN74MCAM_RST75CAM_I2C_SCL144USIM1_RSTSENSOR_I2C_SDALDO6_1P8 Smart Module Series SC606T Series Hardware Design 3.3. Pin Description Table 6: I/O Parameters Definition Type AI AO AIO DI DO DIO OD PI PO Description Analog input Analog output Analog input/output Digital input Digital output Digital input/output Open drain Power input Power output The following tables show the modules pin definition and electrical characteristics. Table 7: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT 36, 37, 38 PI/

PO Power supply for the module Vmax = 4.4 V Vmin = 3.55 V Vnom = 3.8 V VDD_RF 1, 2 PO Connects to external bypass capacitors to eliminate voltage fluctuation of the RF part. It must be provided with a sufficient current of at least 3.0 A. It is suggested to use a TVS to increase the voltage surge withstand capability. It cannot be used to power external loads. SC606T_Series_Hardware_Design 24 / 116 Smart Module Series SC606T Series Hardware Design VPH_PWR 220, 221 PO Power supply for peripherals Vmax = 4.4 V Vmin = 3.55 V Vnom = 3.8 V VRTC 16 PI/

PO Power supply for RTC VOmax = 3.2 V VI = 2.03.25 V LDO5_1P8 9 PO LDO10_2P8 11 PO LDO6_1P8 10 PO 1.8 V output power for external GPIOs pull-up circuits and level shifter Vnom = 1.8 V IOmax = 20 mA 2.8 V output power for VDD of sensors and TPs Vnom = 2.8 V IOmax = 150 mA 1.8 V output power for I/O VDD of cameras, LCDs and sensors. Vnom = 1.8 V IOmax = 300 mA LDO17_ 2P85 12 PO 2.85 V output power for cameras and LCDs. Vnom = 2.85 V IOmax = 300 mA LDO23_1P2 15 PO 1.2 V output power for DVDD of the front camera. Vnom = 1.2 V IOmax = 600 mA LDO2_1P1 13 PO 1.1 V output power for DVDD of the rear camera. Vnom = 1.1 V IOmax = 1200 mA LDO22_2P8 14 PO 2.8 V output power for AVDD of camera. Vnom = 2.8 V IOmax = 150 mA It can provide a maximum continuous current of 1 A approximately. The value of capacitors placed on this pin should not exceeds 120 F. Add a 1.04.7 F bypass capacitor if the pin is used. If unused, keep this pin open. Add a 1.02.2 F bypass capacitor if the pin is used. If unused, keep this pin open. Add a 1.04.7 F bypass capacitor if this pin is used. If unused, keep this pin open. Add a 1.02.2 F bypass capacitor if this pin is used. If unused, keep this pin open. Add a 1.02.2 F bypass capacitor if this pin is used. If unused, keep this pin open. Add a 1.04.7 F bypass capacitor if this pin is used. If unused, keep this SC606T_Series_Hardware_Design 25 / 116 Smart Module Series SC606T Series Hardware Design pin open. GND 3, 4, 18, 20, 31, 34, 35, 40, 43, 47, 56, 62, 87, 98, 101, 112, 125, 128, 130, 133, 135, 148, 150, 159, 160, 163, 170, 173, 176, 182, 193, 195, 219, 225, 243, 257323 Audio Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment MIC_BIAS 167 PO VO = 1.62.85V Bias voltage output for microphone Microphone input for channel 1 (+) Microphone input for channel 1 (-) Microphone reference ground Microphone input for headset (+) Microphone input for channel 2 (+) AI AI AI AI AO Earpiece output (+) AO Earpiece output (-) AO Speaker output (+) AO Speaker output (-) AO Headphone right channel output MIC1_P MIC1_N 44 45 MIC_GND 168 MIC2_P 46 MIC3_P 169 EAR_P EAR_N SPK_P SPK_N HPH_R 53 52 55 54 51 49 48 HPH_REF 50 AI HPH_L HS_DET AO AI LINE_OUT_P 227 AO LINE_OUT_N 228 AO USB Interface Headphone reference ground Headphone left channel output Headset hot-plug detect Audio line differential output

(+) Audio line differential output

(-) If this pin is unused, connect it to the ground. It should be connected to the main GND. Pulled up internally. SC606T_Series_Hardware_Design 26 / 116 Smart Module Series SC606T Series Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS 41, 42 AI USB_DM 33 AIO USB_DP USB_ID 32 30 AIO DO USB ID detect Vmax = 10.0 V Vmin = 4.0 V Vnom = 5.0 V USB connection detect USB differential data (-) USB differential data (+) GPIO_1 247 DI USB ID interrupt detection USB_SS_ RX_P USB_SS_ RX_M USB_SS_ TX_P USB_SS_ TX_M 171 AI 172 AI 174 AO 175 AO USB 3.0 super-speed receive (+) USB 3.0 super-speed receive (-) USB 3.0 super-speed transmit (+) USB 3.0 super-speed transmit (-) USBC_CC2 223 AIO USBC_CC1 224 AIO USB_SS_ SEL 226 DO

(U)SIM Interfaces USB Type-C control configuration channel 2 USB Type-C control configuration channel 1 USB Type-C switch control 90 differential impedance. USB 2.0 standard compliant. High level by default. Pulled up internally. If the default function of this pin is not used, it can be configured into a general-purpose GPIO. 90 differential impedance. USB 3.0 standard compliant. Pin Name Pin No. I/O Description DC Characteristics Comment USIM1_DET 145 DI

(U)SIM1 card hot-plug detect VILmax = 0.63 V VIHmin = 1.17 V Active low. Require to be externally pulled up to SC606T_Series_Hardware_Design 27 / 116 Smart Module Series SC606T Series Hardware Design 1.8 V. If unused, keep this pin open. Disabled by default, and can be enabled through software configuration. Require to be pulled up to USIM1_VDD with a 10 k resistor. Either 1.8 V or 2.95 V

(U)SIM card is supported. Active low. Require to be externally pulled up to 1.8 V. If unused, keep this pin open. Disabled by default and can be enabled through software configuration. USIM1_RST 144 DO

(U)SIM1 card reset USIM1_CLK 143 DO

(U)SIM1 card clock USIM1_DATA 142 DIO

(U)SIM1 card data USIM1_VDD 141 PO

(U)SIM1 card power supply VOLmax = 0.4 V VOHmin =

0.8 USIM1_VDD VOLmax = 0.4 V VOHmin =

0.8 USIM1_VDD VILmax =

0.2 USIM1_VDD VIHmin =

0.7 USIM1_VDD VOLmax = 0.4 V VOHmin =

0.8 USIM1_VDD 1.8 V (U)SIM:

Vmax = 1.90 V Vmin = 1.70 V 2.95 V (U)SIM:

Vmax = 3.04 V Vmin = 2.7 V USIM2_DET 256 DI

(U)SIM2 card hot-plug detect VILmax = 0.63 V VIHmin = 1.17 V USIM2_RST 207 DO

(U)SIM2 card reset USIM2_CLK 208 DO

(U)SIM2 card clock VOLmax = 0.4 V VOHmin =

0.8 USIM2_VDD VOLmax = 0.4 V VOHmin =

0.8 USIM2_VDD USIM2_DATA 209 DIO

(U)SIM2 card data VILmax =

Require to be pulled SC606T_Series_Hardware_Design 28 / 116 Smart Module Series SC606T Series Hardware Design up to USIM2_VDD with a 10 k resistor. 0.2 USIM2_VDD VIHmin =

0.7 USIM2_VDD VOLmax = 0.4 V VOHmin =

0.8 USIM2_VDD 1.8 V (U)SIM:

Vmax = 1.90 V Vmin = 1.70 V 2.95 V (U)SIM:

Vmax = 3.04 V Vmin = 2.7 V VOLmax = 0.45 V VOHmin = 1.35 V VILmax = 0.63 V VIHmin = 1.17 V VOLmax = 0.45 V VOHmin = 1.35 V VILmax = 0.63 V VIHmin = 1.17 V VILmax = 0.63 V VIHmin = 1.17 V VOLmax = 0.45 V VOHmin = 1.35 V USIM2_VDD 210 PO

(U)SIM2 card power supply Either 1.8 V or 2.95 V

(U)SIM card is supported. UART Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment UART2_TXD 5 DO UART2 transmit UART2_RXD 6 DI UART2 receive UART4_TXD 7 DO UART4 transmit UART4_RXD 8 DI UART4 receive UART5_RXD 198 DI UART5 receive UART5_TXD 199 DO UART5 transmit 1.8 V power domain. If unused, keep these pins open. UART5_RTS 245 DO UART5_CTS 246 DI SD Card Interface UART5 request to send VOLmax = 0.45 V VOHmin = 1.35 V UART5 clear to send VILmax = 0.63 V VIHmin = 1.17 V Pin Name Pin No. I/O Description DC Characteristics Comment SD_CLK 70 DO SD card clock SD_CMD 69 DIO SD card command 1.8 V SD card:

VOLmax = 0.45 V VOHmin = 1.4 V 2.95 V SD card:

VOLmax = 0.37 V VOHmin = 2.2 V 1.8 V SD card:

VILmax = 0.58 V SC606T_Series_Hardware_Design 29 / 116 Smart Module Series SC606T Series Hardware Design VIHmin = 1.27 V VOLmax = 0.45 V VOHmin = 1.4 V 2.95 V SD card:

VILmax = 0.73 V VIHmin = 1.84 V VOLmax = 0.37 V VOHmin = 2.2 V 1.8 V SD card:

VILmax = 0.58 V VIHmin = 1.27 V VOLmax = 0.45 V VOHmin = 1.4 V 2.95 V SD card:

VILmax = 0.73 V VIHmin = 1.84 V VOLmax = 0.37 V VOHmin = 2.2 V VILmax = 0.63 V VIHmin = 1.17 V Vnom = 2.95 V IOmax = 800 mA Vnom = 1.8/2.95 V IOmax = 50 mA SD_DATA0 DIO SDIO data bit 0 SD_DATA1 DIO SDIO data bit 1 SD_DATA2 DIO SDIO data bit 2 68 67 66 SD_DATA3 65 DIO SDIO data bit 3 SD card hot-plug detect SD card power supply 1.8/2.95 V output power for SD card pull-up circuits SD_LDO11 63 PO SD_LDO12 179 PO TP (Touch Panel) Interfaces SD_DET 64 DI Active low. Pin Name Pin No. I/O Description DC Characteristics Comment TP0_RST 138 DO TP0 reset TP0_INT 139 DI TP0 interrupt TP0_I2C_SCL 140 OD TP0 I2C clock TP0_I2C_SDA 206 OD TP0 I2C data TP1_RST 136 DO TP1 reset TP1_INT 137 DI TP1 interrupt TP1_I2C_SDA 204 OD TP1 I2C data TP1_I2C_SCL 205 OD TP1 I2C clock VOLmax = 0.45 V VOHmin = 1.35 V VILmax = 0.63 V VIHmin = 1.17 V VOLmax = 0.45 V VOHmin = 1.35 V VILmax = 0.63 V VIHmin = 1.17 V 1.8 V power domain. Active low. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. Active low. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. SC606T_Series_Hardware_Design 30 / 116 Smart Module Series SC606T Series Hardware Design LCM Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment PMU_MPP4 152 DO General-purpose ADC interface VOLmax = 0.45 V VOHmin = 1.35 V GPIO_33 238 DO General-purpose clock output for blacklight driver. LCD0_RST 127 DO LCD0 reset LCD0_TE 126 DI LCD0 tearing effect 1.8 V power domain. LCD1_RST 113 DO LCD1 reset LCD1_TE 114 DI LCD1 tearing effect 1.8 V power domain. VOLmax = 0.45 V VOHmin = 1.35 V VILmax = 0.63 V VIHmin = 1.17 V VOLmax = 0.45 V VOHmin = 1.35 V VILmax = 0.63 V VIHmin = 1.17 V If the default function of this pin is not used, it can be configured into a general-purpose GPIO. 1.8 V power domain. Active low. 1.8 V power domain. Active low. DSI0_CLK_N 116 AO LCD0 MIPI clock (-) DSI0_CLK_P 115 AO DSI0_LN0_N 118 AO DSI0_LN0_P 117 AO DSI0_LN1_N 120 AO DSI0_LN1_P 119 AO DSI0_LN2_N 122 AO DSI0_LN2_P 121 AO DSI0_LN3_N 124 AO DSI0_LN3_P 123 AO LCD0 MIPI clock

(+) LCD0 MIPI lane 0 data (-) LCD0 MIPI lane 0 data (+) LCD0 MIPI lane 1 data (-) LCD0 MIPI lane 1 data (+) LCD0 MIPI lane 2 data (-) LCD0 MIPI lane 2 data (+) LCD0 MIPI lane 3 data (-) LCD0 MIPI lane 3 data (+) DSI1_CLK_N 103 AO LCD1 MIPI clock (-) DSI1_CLK_P 102 AO LCD1 MIPI clock

(+) SC606T_Series_Hardware_Design 31 / 116 Smart Module Series SC606T Series Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment DSI1_LN0_N 105 AO DSI1_LN0_P 104 AO DSI1_LN1_N 107 AO DSI1_LN1_P 106 AO DSI1_LN2_N 109 AO DSI1_LN2_P 108 AO DSI1_LN3_N 111 AO DSI1_LN3_P 110 AO Camera Interfaces LCD1 MIPI lane 0 data (-) LCD1 MIPI lane 0 data (+) LCD1 MIPI lane 1 data (-) LCD1 MIPI lane 1 data (+) LCD1 MIPI lane 2 data (-) LCD1 MIPI lane 2 data (+) LCD1 MIPI lane 3 data (-) LCD1 MIPI lane 3 data (+) CSI0_CLK_N 89 CSI0_CLK_P 88 CSI0_LN0_N 91 CSI0_LN0_P 90 CSI0_LN1_N 93 CSI0_LN1_P 92 CSI0_LN2_N 95 CSI0_LN2_P 94 CSI0_LN3_N 97 CSI0_LN3_P 96 CSI1_CLK_N 184 AI AI AI AI AI AI AI AI AI AI AI MIPI clock of rear camera (-) MIPI clock of rear camera (+) MIPI lane 0 data of rear camera (-) MIPI lane 0 data of rear camera (+) MIPI lane 1 data of rear camera (-) MIPI lane 1 data of rear camera (+) MIPI lane 2 data of rear camera (-) MIPI lane 2 data of rear camera (+) MIPI lane 3 data of rear camera (-) MIPI lane 3 data of rear camera (+) MIPI clock of depth camera (-) SC606T_Series_Hardware_Design 32 / 116 Smart Module Series SC606T Series Hardware Design CSI1_CLK_P 183 CSI1_LN0_N 186 CSI1_LN0_P 185 CSI1_LN1_N 188 CSI1_LN1_P 187 CSI1_LN2_N 190 CSI1_LN2_P 189 CSI1_LN3_N 192 CSI1_LN3_P 191 CSI2_CLK_N 78 CSI2_CLK_P 77 CSI2_LN0_N 80 CSI2_LN0_P 79 CSI2_LN1_N 82 CSI2_LN1_P 81 CSI2_LN2_N 84 CSI2_LN2_P 83 CSI2_LN3_N 86 CSI2_LN3_P 85 AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI MIPI clock of depth camera (+) MIPI lane 0 data of depth camera (-) MIPI lane 0 data of depth camera (+) MIPI lane 1 data of depth camera (-) MIPI lane 1 data of depth camera (+) MIPI lane 2 data of depth camera (-) MIPI lane 2 data of depth camera (+) MIPI lane 3 data of depth camera (-) MIPI lane 3 data of depth camera (+) MIPI clock of front camera (-) MIPI clock of front camera (+) MIPI lane 0 data of front camera (-) MIPI lane 0 data of front camera (+) MIPI lane 1 data of front camera (-) MIPI lane 1 data of front camera (+) MIPI lane 2 data of front camera (-) MIPI lane 2 data of front camera (+) MIPI lane 3 data of front camera (-) MIPI lane 3 data of front camera (+) MCAM_MCLK 99 DO SCAM_MCLK 100 DO Master clock of rear camera VOLmax = 0.45 V VOHmin = 1.35 V Master clock of front camera VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. 1.8 V power domain. SC606T_Series_Hardware_Design 33 / 116 Smart Module Series SC606T Series Hardware Design MCAM_RST 74 DO MCAM_PWDN 73 DO SCAM_RST 72 DO SCAM_PWDN 71 DO Reset of rear camera VOLmax = 0.45 V VOHmin = 1.35 V Power down of rear camera VOLmax = 0.45 V VOHmin = 1.35 V Reset of front camera VOLmax = 0.45 V VOHmin = 1.35 V Power down of front camera VOLmax = 0.45 V VOHmin = 1.35 V CAM_I2C_ SCL CAM_I2C_ SDA 75 76 OD OD I2C clock of front and rear cameras I2C data of front and rear cameras DCAM_MCLK 194 DO CAM4_MCLK 236 DO DCAM_RST 180 DO DCAM_PWDN 181 DO Master clock of depth camera Master clock of fourth camera Reset of depth camera Power down of depth camera VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V VOLmax = 0.45 V VOHmin = 1.35 V DCAM_I2C_ SDA DCAM_I2C_ SCL 197 OD 196 OD I2C data of depth camera I2C clock of depth camera Keypad Interfaces PWRKEY 39 DI Turn on/off the module VILmax = 0.63 V VIHmin = 1.17 V VOL_UP 146 DI Volume up VOL_ DOWN SENSOR_I2C Interface 147 DI Volume down VILmax = 0.63 V VIHmin=1.17 V VILmax=0.63 V VIHmin= 1.17 V 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. 1.8 V power domain. Pulled up to 1.8 V internally. Active low. If unused, keep this pin open. If unused, keep this pin open. 1.8 V power domain. 1.8 V power domain. Pin Name Pin No. I/O Description DC Characteristics Comment SENSOR_I2C _SCL SENSOR_I2C _SDA 131 OD 132 OD I2C clock for external sensor I2C data for external sensor SC606T_Series_Hardware_Design 34 / 116 Pin Name Pin No. I/O Description DC Characteristics Comment 50 impedance. Smart Module Series SC606T Series Hardware Design ADC Interface Antenna Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment PMU_MPP2 151 AI General-purpose ADC interface Maximum input voltage: 1.7 V. Pin Name Pin No. I/O Description DC Characteristics Comment Pin Name Pin No. I/O Description DC Characteristics Comment ANT_MAIN 19 AIO ANT_DRX 149 ANT_GNSS 134 AI AI ANT_WIFI/BT 129 AIO FM_ANT 244 AI GPIO Interfaces Main antenna interface Diversity antenna interface GNSS antenna interface Wi-Fi/BT antenna interface FM antenna interface GPIO_0 248 DIO GPIO_2 201 DIO GPIO_3 200 DIO GPIO_33 238 DIO GPIO_36 237 DIO GPIO_42 252 DIO GPIO_43 253 DIO GPIO_44 254 DIO GPIO_45 255 DIO GPIO_66 234 DIO General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output VILmax = 0.63 V VIHmin = 1.17 V VOLmax = 0.45 V VOHmin = 1.4 V SC606T_Series_Hardware_Design 35 / 116 Smart Module Series SC606T Series Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment GPIO_89 232 DIO GPIO_90 231 DIO GPIO_96 230 DIO GPIO_97 229 DIO GPIO_98 177 DIO GPIO_99 178 DIO SPI Interfaces General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output SPI_CS SPI_CLK SPI_MOSI 58 59 60 DO SPI chip select DO SPI clock DO SPI master-out slave-in SPI master-in salve-out SPI_MISO 61 DI FP_SPI_CS 203 DO FP SPI chip select FP_SPI_CLK 250 DO FP SPI clock FP_SPI_MOSI 249 DO FP_SPI_MISO 251 DI USB_BOOT Interface FP SPI master-out slave-in FP SPI master-in salve-out USB_BOOT 57 DI Force the module into emergency download mode Pin Name Pin No. I/O Description DC Characteristics Comment Pulled up to LDO5_1P8 during power-up will force the module into emergency download mode. Other Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment SC606T_Series_Hardware_Design 36 / 116 Smart Module Series SC606T Series Hardware Design GNSS_LNA_ EN 202 DO GNSS LNA enable control Generic RF controller Generic RF controller S1A and S1B are connected in the module S2A and S2B are connected in the module For test purpose only. If unused, keep this pin open. Only used for RF tuner control. Pin Name Pin No. I/O Description DC Characteristics Comment RESERVED 17, 2129, 153158, 161, 162, 164166, 212214, 217, 218, 222, 235, 239, 240 Keep these pins open. GRFC_5 242 DIO GRFC_7 241 DIO 215 216 211 233 Reserved Interface S1A S1B S2A S2B 3.4. Power Supply 3.4.1. Power Supply Pins The module provides 3 VBAT pins and 2 VPH_PWR pins. VBAT pins are dedicated for connection with an external power supply. VPH_PWR pins can supply power for peripherals, and they can provide a maximum continuous current of 1 A approximately. The value of capacitors placed on the VPH_PWR pins should not exceed 120 F. 3.4.2. Decrease Voltage Drop The power supply range of the module is from 3.55 V to 4.4 V, and the recommended value is 3.8 V. The power supply performance, such as the power supply capacity and voltage ripple, directly influences the modules performance and stability. Under extreme conditions, the module may have a transient peak current up to 3 A. If the power supply capacity is not sufficient, there will be the risk that the voltage drops below 3.1 V and as a result the module powers off automatically. Therefore, it is necessary to ensure that the input voltage never drops below 3.1 V. SC606T_Series_Hardware_Design 37 / 116 Smart Module Series SC606T Series Hardware Design Figure 3: Voltage Drop Sample To decrease voltage drop, a bypass capacitor of about 100 F with low ESR (0.7 ) should be used for VBAT pins, and multi-layer ceramic chip capacitor (MLCC) arrays should also be added for their ultra-low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) to compose each MLCC array and place these arrays close to the VBAT/VDD_RF/VPH_PWR pins separately. The width of the VBAT trace should be no less than 3 mm. In principle, the longer the VBAT trace is, the wider it should be. In addition, in order to get a stable power source, it is suggested to place a 2000 W TVS as close to the VBAT pins as possible to increase voltage surge withstand capability. The following figure shows the structure of the power supply. Figure 4: Star Structure of Power Supply 3.4.3. Reference Design for Power Supply A good power design for the module is essential, as the performance of the module largely depends on the capacity and reliability of the power supply. The power supply of the module should be able to provide a sufficient current of at least 3 A. It is recommended to use a battery to supply power for the module, and that if not using a battery, add a voltage regulator. In the latter case, if the voltage drop is not too much, use a low dropout regulator (LDO); otherwise, use a buck converter instead. SC606T_Series_Hardware_Design 38 / 116 3.1 VVoltage3.8 VInput current3 AModuleVPH_PWRVBATVBATC1100 FC6100 nFC7C8+C2100 nFC333 pFC4D1VDD_RFVPH_PWRC10C11C1233 pF33 pF10 pF10 pF10 pF100 nF Smart Module Series SC606T Series Hardware Design The following figure shows the reference design for a +5 V power supply which is regulated with an LDO

(MIC29502WU) from Microchip. The typical output volage of the LDO is 3.8 V and the rated current of it is 5.0 A. Figure 5: Reference Design for Power Supply NOTE If the module happens to get into an abnormal state, it is recommended to switch off and on its power supply to restart it. 3.5. Turn-On and Turn-Off Timing 3.5.1. Turn On Module The PWRKEY pin is pulled up to 1.8 V internally. Driving it low for at least 1.6 s turns on the module. It is recommended to control the pin with an open drain/collector driver. A simple reference design is shown in the following figure. Figure 6: Turn On Module Using Driving Circuit SC606T_Series_Hardware_Design 39 / 116 DC_INC1C2MIC29502WUU1INOUTENGNDADJ24135VBAT 100 nFC3470 FC4100 nFR2100K47KR3470 F470R51KR4R11%1%Turn on pulsePWRKEY4.7K47K>1.6sR1R2Q1R31K Smart Module Series SC606T Series Hardware Design Another way to control PWRKEY is with a button. A Transient Voltage Suppressor (TVS) should be placed nearby the button for ESD protection. A reference design is shown in the following figure. Figure 7: Turn On Module Using Button The timing of turning on the module is illustrated in the following figure. Figure 8: Power-up Timing NOTES 1. When the module powers on for the first time, the power-up timing might be different from what is shown in the figure above. 2. Ensure that VBAT is stable for at least 30 ms before pulling down the PWRKEY pin. SC606T_Series_Hardware_Design 40 / 116 PWRKEYS1Close to S1TVS1KVBAT (Typ.3.8 V)PWRKEY> 1.6 sOthersLDO5_1P838 sLDO6_1P861.2 msSoftware controlledLDO17_2P85ActiveLDO10_2P8Note2Software controlled Smart Module Series SC606T Series Hardware Design 3.5.2. Turn Off Module One way to turn off the module is to pull down PWRKEY for at least 1 s, and then choose to turn off when the prompt window comes up on the display screen connected to an LCM interface of the module. Another way is to drive PWRKEY low for at least 8 s, which forces the module to shut down. The forced power-down timing is illustrated in the following figure. Figure 9: Power-off Timing 3.6. VRTC Interface The RTC (Real Time Clock) can be powered by an external power source through VRTC when the module is powered down and there is no power supplied to the VBAT. The external power source can be a rechargeable battery (such as coil cells) according to application demands. The following figure shows a reference design for powering RTC with an external battery. Figure 10: RTC Powered by Coin Cell If RTC is ineffective, it can be synchronized through network after the module is powered on. When VBAT is disconnected, the input voltage range of VRTC is 2.03.25 V with the typical value SC606T_Series_Hardware_Design 41 / 116 VBATPWRKEYOthers> 8sPower downCoin CellModuleRTC CoreVRTC Smart Module Series SC606T Series Hardware Design When powered by VBAT, the RTC has an error rate of 50 ppm, while when powered by VRTC, the RTC deviation is about 200 ppm;

If a rechargeable battery is used, the ESR of the battery should be less than 2 k, and it is recommended to use the battery MS621FE FL11E from Seiko. being 3.0 V;

3.7. Power Output The module can output regulated voltages for peripheral circuits. During application, it is recommended to use parallel capacitors (33 pF and 10 pF) on the circuits to suppress high-frequency noise. Pin Name Default Voltage (V) Drive Current (mA) Comment So long as the module is powered on, the pin retains its power. Table 8: Power Description LDO5_1P8 1.8 LDO17_2P85 2.85 LDO6_1P8 LDO10_2P8 LDO2_1P1 LDO22_2P8 LDO23_1P2 1.8 2.8 1.1 2.8 1.2 SD_LDO12 1.8/2.95 SD_LDO11 2.95 USIM1_VDD 1.8/2.95 USIM2_VDD 1.8/2.95 1200 20 300 150 300 150 600 50 800 50 50 VPH_PWR Equal to VBAT voltage 1000 So long as the module is powered on, the pin retains its power. SC606T_Series_Hardware_Design 42 / 116 Smart Module Series SC606T Series Hardware Design 3.8. USB Interface The module is integrated with a USB interface that is USB 3.0/2.0 specifications compliant and supports super speed (5 Gbps) on USB 3.0, high speed (480 Mbps) and full speed (12 Mbps) modes on USB 2.0, as well as USB OTG function on both USB 2.0 and USB 3.0. This USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. USB_ID 1) DO USB ID detect High level by default. Comment Vmax = 10.0 V Vmin = 4.0 V Vnom = 5.0 V 90 differential impedance. USB 2.0 standard compliant. Pulled up internally. If the default function is not used, it can be configured into a general-purpose GPIO. 90 differential impedance. USB 3.0 standard compliant. Table 9: Pin Definition of USB Interface Pin Name Pin No. I/O Description USB_VBUS 41, 42 AI USB connection detect USB_DM AIO USB differential data (-) USB_DP AIO USB differential data (+) 33 32 30 GPIO_1 247 DI USB ID interrupt detection USB_SS_RX_P 171 USB 3.0 super-speed receive (+) USB_SS_RX_M 172 USB 3.0 super-speed receive (-) AI AI USB_SS_TX_P 174 AO USB 3.0 super-speed transmit (+) USB_SS_TX_M 175 AO USB 3.0 super-speed transmit (-) USBC_CC2 223 AIO USBC_CC1 224 AIO USB Type-C control configuration channel 2 USB Type-C control configuration channel 1 USB_SS_SEL 226 DO USB Type-C switch control NOTE 1) The module supports USB ID detection for USB Type-C interface through USBC_CC1, USBC_CC2, SC606T_Series_Hardware_Design 43 / 116 Smart Module Series SC606T Series Hardware Design USB_ID and GPIO_1 pins. When an OTG is connected to the USB Type-C interface, the USBC_CC1 and USBC_CC2 will force the USB_ID to output a low voltage level to pull down GPIO_1, thus making the module enter Host mode. If USB OTG is not used, the USB_ID should be kept open. In the design of the USB 2.0 interface, it is recommended to connect the modules GPIO_1 directly to the USB_ID of external micro USB interface for USB ID detection. If the external micro USB interface serves as a host, the modules GPIO_1 will be pulled down to force the module into Host mode. The following figure is a reference design for the USB 2.0 interface:

Figure 11: USB 2.0 Interface Reference Design For the reference design of the USB 3.0 interface, see document [5]. SC606T_Series_Hardware_Design 44 / 116 USB_DPUSB_DMUSB_VBUS12345USB_DPUSB_DMVBUSUSB_IDGNDGNDGNDGNDGND6789100 nFModuleC1D1D2D3ESDESDESDGPIO_11.0 HL1 AW3605DNRSWVINEN451VOUTVOUT78NC6C222 FC310 FR110KVPH_PWRGPIO_97AGNDPGNDPGND239 Smart Module Series SC606T Series Hardware Design The following is a reference design for the USB Type-C interface:

Figure 12: USB Type-C Interface Reference Design To ensure sound USB performance, please follow these principles in your design:

Route the USB signal traces as differential pairs with total grounding and keep the impedance of USB differential traces at 90 . Pay attention to the influence of junction capacitance of ESD protection devices upon USB data lines. Typically, the capacitance should be less than 2 pF for USB 2.0 and less than 0.5 pF for USB 3.0. Avoid routing the USB signal traces under crystals, oscillators, magnetic devices, or RF signal traces. Route the traces in the inner-layer of PCB with ground shielding on not only upper and lower layers but also right and left sides. Keep the ESD protection devices as close to the USB connector as possible. Ensure the trace length differences between the USB 2.0 DM/DP differential pair and between the USB 3.0 RX/TX differential pairs do not exceed 0.7 mm. SC606T_Series_Hardware_Design 45 / 116 USB_DP100nFModuleC14SwitchC2C3C4C5A0+A0-A1+A0-B0+B0-B1+B1-C0+C0-C1+C1-SELPDUSB_SS_TX_PUSB_SS_TX_MUSB_SS_RX_PUSB_SS_RX_MUSB_SS_SELR1VDD4.7FC1VDD_3V0TX1+TX1-VBUS_VBUSCC1D+D-RX1-RX1+CC2CC1CC2TX2+TX2-RX2+RX2-USB Type_CC6C7C8C9C10C11C12C13USB_DMUSB_VBUSUSB_IDGPIO_1AW3605DNRSWVIN22 FC210 F10K1.0 HC1L1R1ENAGNDVOUTVOUTNCPGNDPGND12945678VBUSVPH_PWRGPIO_973 Smart Module Series SC606T Series Hardware Design Table 10: USB Trace Length Inside the Module Pin No. Signal Length (mm) Length Difference (mm) 33 32 171 172 174 175 USB_DM USB_DP USB_SS_RX_P USB_SS_RX_M USB_SS_TX_P USB_SS_TX_M 39.52 39.07 28.55 28.23 19.58 19.35

-0.45 0.32 0.23 3.9. UART Interfaces The module provides the following three UART interfaces:

UART2: 2-wire UART interface, used for debugging. UART4: 2-wire UART interface. UART5: 4-wire UART interface, hardware flow control supported. Table 11: Pin Definition of UART Interfaces UART2_TXD UART2_RXD UART4_TXD 5 6 7 UART4_RXD 8 UART2 transmit UART2 receive UART4 transmit UART4 receive UART5_RXD 198 UART5 receive UART5_TXD 199 UART5 transmit UART5_CTS 246 UART5 clear to send UART5_RTS 245 UART5 request to send I/O DO DI DO DI DI DO DI DO Pin Name Pin No. Description Comment 1.8 V power domain. Keep the unused of these pins open. UART5 is a 4-wire UART interface with 1.8 V power domain. A level translator chip should be used if your SC606T_Series_Hardware_Design 46 / 116 Smart Module Series SC606T Series Hardware Design application is equipped with a 3.3 V UART interface. The level translator chip TXS0104EPWR provided by Texas Instruments is recommended. The following figure shows a reference design for the level translator chip. Figure 13: Reference Design for Level Translator Chip (for UART5) The following figure is an example connection between the module and PC. A voltage level translator and an RS-232 transceiver are recommended to be added between the module and PC, as shown in the figure below:

Figure 14: RS-232 Level Match Circuit (for UART5) NOTE The level translation reference designs for UART2 and UART4 are similar with those for UART5. SC606T_Series_Hardware_Design 47 / 116 VCCAVCCBOEA1A2A3A4GNDB1B2B3B4LDO5_1P8UART5_RTSUART5_RXDUART5_CTSUART5_TXDRXD_3.3VCTS_3.3VTXD_3.3VVDD_3.3VTXS0104EPWRC1100 pFC2U1100 pFRTS_3.3VTXS0104EPWRRXD_3.3VCTS_3.3VVCCAModuleGNDGND1.8VVCCB3.3VDIN1ROUT3ROUT2ROUT1DIN4DIN3DIN2DIN5FORCEON3.3VDOUT1DOUT2DOUT3DOUT4DOUT5RIN3RIN2RIN1VCCGNDOESN65C3238DB-9RTSTXDCTSRXDGNDRTS_3.3VUART5_TXDUART5_RTSUART5_RXDUART5_CTSTXD_1.8VRTS_1.8VRXD_1.8VCTS_1.8V/FORCEOFF/INVALIDR1OUTBTXD_3.3V Smart Module Series SC606T Series Hardware Design 3.10. (U)SIM Interfaces The module provides two (U)SIM interfaces which meet ETSI and IMT-2000 requirements. Dual SIM Dual Standby is supported by default. Both 1.8 V and 2.95 V (U)SIM cards are supported, and the (U)SIM interfaces are powered via dedicated LDOs in the module. Table 12: Pin Definition of (U)SIM Interfaces Pin Name Pin No. I/O Description Comment USIM1_DET 145 DI

(U)SIM1 card hot-plug detect USIM1_RST 144 DO

(U)SIM1 card reset USIM1_CLK 143 DO

(U)SIM1 card clock USIM1_DATA 142 DIO

(U)SIM1 card data USIM1_VDD 141 PO

(U)SIM1 card power supply USIM2_DET 256 DI

(U)SIM2 card hot-plug detect USIM2_RST 207 DO

(U)SIM2 card reset USIM2_CLK 208 DO

(U)SIM2 card clock USIM2_DATA 209 DIO

(U)SIM2 card data Active low. Require to be externally pulled up to 1.8 V. If unused, keep this pin open. Disabled by default, and can be enabled through software configuration. Require to be pulled up to USIM1_VDD with a 10 k resistor. Either 1.8 V or 2.95 V (U)SIM card is supported. Active low. Require to be externally pulled up to 1.8 V. If unused, keep this pin open. Disabled by default and can be enabled through software configuration. to be pulled up Require to USIM2_VDD with a 10 k resistor. Either 1.8 V or 2.95 V (U)SIM card is supported. USIM2_VDD 210 PO

(U)SIM2 card power supply The module supports (U)SIM card hot-plug via the USIM_DET pin, which is disabled by default and can be enabled through software configuration. A reference design for the (U)SIM interfaces connected with SC606T_Series_Hardware_Design 48 / 116 Smart Module Series SC606T Series Hardware Design an 8-pin (U)SIM card connector is shown below. Figure 15: Reference Design for (U)SIM Interface with an 8-pin (U)SIM Card Connector If there is no need to use USIM_DET, keep it open. The following is a reference design for the (U)SIM interfaces connected with a 6-pin (U)SIM card connector. Figure 16: Reference Design for (U)SIM Interface with a 6-pin (U)SIM Card Connector To ensure good performance and avoid damage of (U)SIM cards, please follow these principles in your design:

Place the (U)SIM card connector as close to the module as possible. Keep the (U)SIM trace length as less than 200 mm as possible. Keep (U)SIM card signal traces away from RF and VBAT traces. Reserve a filter capacitor for USIM_VDD, and keep the capacitance of the capacitor within 1 F. Place the capacitor near to the (U)SIM card. To avoid cross-talk between USIM_DATA and USIM_CLK traces, keep them away from each other and shield them with the ground. USIM_RST also needs such ground protection. To offer good ESD protection, add a TVS diode array with a parasitic capacitance within 50 pF. The 22 resistors should be added in series between the module and (U)SIM card so as to suppress SC606T_Series_Hardware_Design 49 / 116 USIM_VDDUSIM_RSTUSIM_CLKUSIM_DATAUSIM_DET22RLD05_1P8100K100nF(U)SIM Card ConnectorESD22pFVCCRSTCLKIOVPPGNDUSIM_VDD10KModuleR1R2C122pF22pFC2C3C4D122R22RR3R4R5ModuleUSIM_VDDUSIM_RSTUSIM_CLKUSIM_DATA22R22R22R100nFESD22pFVCCRSTCLKIOVPPGND10KUSIM_VDD22pF22pFR1C1D1R2R3R4C2C3C4USIM_DET(U)SIM Card Connector Smart Module Series SC606T Series Hardware Design EMI spurious transmission and enhance ESD protection. Ensure the ESD device is close to the

(U)SIM card connector. Add 22 pF capacitors in parallel on USIM_DATA, USIM_CLK and USIM_RST signal traces so as to filter RF interference, and place these capacitors as close to the (U)SIM card connector as possible. 3.11. SD Card Interface The SD card interface of the module complies with SD 3.0 specifications. The pin definition of the SD card interface is shown below. Table 13: Pin Definition of SD Card Interface Pin Name Pin No. I/O Description SD_LDO11 63 PO SD card power supply SD_LDO12 179 PO 1.8/2.95 V output power for SD card pull-up circuits Comment Vnom = 2.95 V IOmax = 800 mA 1.8/2.95 V output. SD_CLK DO SD card clock SD_CMD DIO SD card command 70 69 SD_DATA0 68 DIO SDIO data bit 0 SD_DATA1 67 DIO SDIO data bit 1 SD_DATA2 66 DIO SDIO data bit 2 SD_DATA3 65 DIO SDIO data bit 3 Control the characteristic impedance at 50 . SD_DET 64 DI SD card hot-plug detect Active low. A reference design for SD card interface is shown as below. SC606T_Series_Hardware_Design 50 / 116 Smart Module Series SC606T Series Hardware Design Figure 17: Reference Design for SD Card Interface SD_LDO11 is a peripheral driver power supply for SD card. The maximum drive current of the pin is approximately 800 mA. Because of the high drive current, it is recommended to keep the trace width at 0.5 mm or above. To ensure the stability of supply power, a 4.7 F and a 33 pF capacitor should be added in parallel near the SD card connector. SD_CMD, SD_CLK, SD_DATA0, SD_DATA1, SD_DATA2, and SD_DATA3 traces are all high speed signal traces. In PCB design, control the characteristic impedance of these traces at 50 10 %, and avoid crossing them with other traces. It is recommended to route the traces on the inner layer of PCB and keep their lengths the same. The CLK trace should be encircled by ground traces individually. Please follow these guidelines in your design:

SD_DATA0, SD_DATA1, SD_DATA2, and SD_DATA3 should be encircled by ground traces. The trace length difference between CLK and other signal traces should not exceed 1 mm. Keep the maximum bus capacitance of SD card traces within 15 pF. Table 14: SD Card Signal Trace Length Inside the Module Pin No. Signal Length (mm) 70 69 68 67 SD_CLK SD_CMD SD_DATA0 SD_DATA1 32.11 32.11 32.11 32.11 SC606T_Series_Hardware_Design 51 / 116 SD_CMD120KNM_51KSD_DATA3SD_DATA2LDO5_1P8SD_CLKSD_DATA0SD_DETSD_DATA1P1-DAT2P2-CD/DAT3P3-CMDP4-VDDP5-CLKP8-DAT1GNDP6-VSSP7-DAT0DETECTIVEGNDGNDGND12345678910111213SD_LDO1133R33R33R33R33R33R1K33 pF4.7 FSD_LDO12ModuleR1R2R3R4R5R6NM_51KNM_10KNM_51KNM_51KR7R8R9R10R11R12R13D1D2D3D4D5D6D7D8C1C2SD Card Connector Smart Module Series SC606T Series Hardware Design 66 65 SD_DATA2 SD_DATA3 32.11 32.11 3.12. GPIO Interfaces The module has multiple GPIO interfaces with power domain of 1.8 V. The pin definition is listed below. Table 15: Pin Definition of GPIO Interfaces Pin Name Pin No. Description Comment GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_33 GPIO_36 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_66 GPIO_89 GPIO_90 GPIO_96 GPIO_97 GPIO_98 GPIO_99 248 247 201 200 238 237 252 253 254 255 234 232 231 230 229 177 178 General-purpose input/output General-purpose input/output Wakeup 1) General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output Wakeup General-purpose input/output Wakeup General-purpose input/output Wakeup General-purpose input/output Wakeup General-purpose input/output Wakeup General-purpose input/output General-purpose input/output General-purpose input/output Wakeup General-purpose input/output General-purpose input/output Wakeup General-purpose input/output General-purpose input/output SC606T_Series_Hardware_Design 52 / 116 Smart Module Series SC606T Series Hardware Design NOTES 1) Wakeup: interrupt pins that can wake up the system. 1. 2. For more details about GPIO configuration, see document [2]. 3.13. I2C Interfaces Every model of the series provides five groups of I2C interfaces. As an open-drain output, each I2C interface should be pulled up to 1.8 V. The SENSOR_I2C interface supports only sensors of the ADSP architecture. CAM/DCAM_I2C bus is controlled by Linux Kernel code and can be connected to video output related devices. Table 16: Pin Definition of I2C Interfaces Pin Name Pin No I/O Description Comment TP0_I2C_SCL TP0_I2C_SDA TP1_I2C_SCL TP1_I2C_SDA CAM_I2C_SCL CAM_I2C_SDA DCAM_I2C_SCL DCAM_I2C_SDA 140 206 205 204 75 76 196 197 TP0 I2C clock TP0 I2C data TP1 I2C clock TP1 I2C data I2C clock of front and rear cameras I2C data of front and rear cameras I2C clock of depth camera I2C data of depth camera OD OD OD OD OD OD OD OD OD OD Used for TP0 Used for TP1 Used for front and rear cameras Used for the depth camera Used for external sensors SENSOR_I2C_SCL 131 I2C clock for external sensor SENSOR_I2C_SDA 132 I2C data for external sensor 3.14. SPI Interfaces The module provides two SPI interfaces which only support Master mode. The two interfaces are typically applied for fingerprint identification. SC606T_Series_Hardware_Design 53 / 116 Smart Module Series SC606T Series Hardware Design Table 17: Pin Definition of SPI Interfaces Pin Name Pin No I/O Description Comment SPI_CS SPI_CLK SPI_MOSI SPI_MISO 58 59 60 61 DO SPI chip select DO SPI clock DO SPI master-out slave-in DI SPI master-in salve-out FP_SPI_CS 203 DO FP SPI chip select FP_SPI_CLK 250 DO FP SPI clock FP_SPI_MOSI 249 DO FP SPI master-out slave-in FP_SPI_MISO 251 DI FP SPI master-in salve-out 3.15. ADC Interface The module provides one analog-to-digital converter (ADC) interfaces, and the pin definition is shown below. The resolution of the ADC is up to 15 bits. Table 18: Pin Definition of ADC Interface Pin Name Pin No. I/O Description Comment PMU_MPP2 151 AI General-purpose ADC interface Maximum input voltage: 1.7 V. 3.16. LCM Interfaces The module provides two LCM interfaces, supports dual LCDs and features WUXGA display with a resolution up to 1200 (RGB) 1920. These interfaces support high-speed differential data transmission along up to 8 lanes. SC606T_Series_Hardware_Design 54 / 116 Smart Module Series SC606T Series Hardware Design Table 19: Pin Definition of LCM Interfaces Pin Name Pin No. I/O Description Comment LDO6_1P8 10 PO 1.8 V output LDO17_2P85 12 PO 2.85 V output PMU_MPP4 152 DO PWM output GPIO_33 238 DIO General-purpose clock signal output for backlight driver LCD0_RST DO LCD0 reset Active low. LCD0_TE DI LCD0 tearing effect LCD1_RST DO LCD1 reset Active low. 127 126 113 114 Power supply for VDD of sensor, camera, LCD and I2Cs pull-up circuits. Power supply for VDD of LCD and camera. If its default function is not used, it can be configured into a general-purpose GPIO. LCD1_TE DI LCD1 tearing effect DSI0_CLK_N 116 AO LCD0 MIPI clock (-) DSI0_CLK_P 115 AO LCD0 MIPI clock (+) DSI0_LN0_N 118 AO LCD0 MIPI lane 0 data (-) DSI0_LN0_P 117 AO LCD0 MIPI lane 0 data (+) DSI0_LN1_N 120 AO LCD0 MIPI lane 1 data (-) DSI0_LN1_P 119 AO LCD0 MIPI lane 1 data (+) DSI0_LN2_N 122 AO LCD0 MIPI lane 2 data (-) DSI0_LN2_P 121 AO LCD0 MIPI lane 2 data (+) DSI0_LN3_N 124 AO LCD0 MIPI lane 3 data (-) DSI0_LN3_P 123 AO LCD0 MIPI lane 3 data (+) DSI1_CLK_N 103 AO LCD1 MIPI clock (-) DSI1_CLK_P 102 AO LCD1 MIPI clock (+) DSI1_LN0_N 105 AO LCD1 MIPI lane 0 data (-) SC606T_Series_Hardware_Design 55 / 116 Smart Module Series SC606T Series Hardware Design DSI1_LN0_P 104 AO LCD1 MIPI lane 0 data (+) DSI1_LN1_N 107 AO LCD1 MIPI lane 1 data (-) DSI1_LN1_P 106 AO LCD1 MIPI lane 1 data (+) DSI1_LN2_N 109 AO LCD1 MIPI lane 2 data (-) DSI1_LN2_P 108 AO LCD1 MIPI lane 2 data (+) DSI1_LN3_N 111 AO LCD1 MIPI lane 3 data (-) DSI1_LN3_P 110 AO LCD1 MIPI lane 3 data (+) The following figures are reference designs for LCM interfaces. Figure 18: Reference Design for LCM0 Interface SC606T_Series_Hardware_Design 56 / 116 DSI0_CLK_PLEDANCLEDKLPTENC (SDA-TP) VIO18NC (VTP-TP) DSI0_LN3_PLCD0_TELCD0_RSTDSI0_LN3_NDSI0_LN2_PDSI0_CLK_NDSI0_LN2_NRESETLCD_IDNC (SCL-TP) NC (RST-TP) NC (EINT-TP) GNDVCC28GNDMIPI_TDP3MIPI_TDN3GNDMIPI_TDP2MIPI_TDN2GNDMIPI_TDP1MIPI_TDN1GNDLDO17_2P85LDO6_1P8LCM0_LED+LCM0_LED-1234567891012131415161718192021222324252627MIPI_TDP0MIPI_TDN0GNDMIPI_TCPMIPI_TCN2928303456345634563456DSI0_LN1_NDSI0_LN1_PDSI0_LN0_NDSI0_LN0_P1234561112121212100nF4.7F1FModuleLCM0FL1FL2FL3FL4FL5EMI filterC3C2C1NCGNDGNDGNDGNDPMI_MPP131323334 Smart Module Series SC606T Series Hardware Design Figure 19: Reference Design for LCM1 Interface For high-speed MIPI_CSI signals, common-mode filters should be added in series near the LCM connector to improve protection against electromagnetic radiation interference. When compatible design with other displays is required, connect the LCD_ID pin of LCM to the modules ADC pin, and ensure the output voltage of LCD_ID never exceeds the voltage range of ADC. Use an external backlight driving circuit for LCM according to the practical demand. The following figure is a reference design for the driving circuit with PMU_MPP4 and GPIO_33 used to adjust the backlight brightness. SC606T_Series_Hardware_Design 57 / 116 DSI1_CLK_PLEDANCLEDKLPTENC (SDA-TP)VIO18NC (VTP-TP)DSI1_LN3_PLCD1_TELCD1_RSTDSI1_LN3_NDSI1_LN2_PDSI1_CLK_NDSI1_LN2_NRESETLCD_IDNC (SCL-TP) NC (RST-TP) NC (EINT-TP) GNDVCC28GNDMIPI_TDP3MIPI_TDN3GNDMIPI_TDP2MIPI_TDN2GNDMIPI_TDP1MIPI_TDN1GNDLDO17_2P85LDO6_1P8LCM1_LED+1234567891012131415161718192021222324252627MIPI_TDP0MIPI_TDN0GNDMIPI_TCPMIPI_TCN2928303456345634563456DSI1_LN1_NDSI1_LN1_PDSI1_LN0_NDSI1_LN0_P1234561112121212100nF4.7F1FModuleLCM1FL1FL2FL3FL4FL5EMI filterC3C2C1NCGNDGNDGNDGNDPMU_MPP231323334LCM1_LED- Smart Module Series SC606T Series Hardware Design Figure 20: Reference Design for LCM External Backlight Driver 3.17. Touch Panel Interfaces The module provides two touch panel interfaces for connection with touch panel, and also provides the corresponding power pins and interrupt pins. The pin definition of the touch panel interfaces is illustrated below. Table 20: Pin Definition of Touch Panel Interfaces Pin Name Pin No I/O Description Comment LDO10_2P8 11 PO LDO6_1P8 10 PO 2.8 V output power for VDD of Sensor and TP Vnom = 2.8 V IOmax = 150 mA 1.8 V output power for VDD of Sensor, Camera, LCD and I2Cs pull-up circuits Vnom = 1.8 V IOmax = 300 mA TP0_INT 139 DI TP0 Interrupt 1.8 V power domain. TP0_RST 138 DO TP0 reset 1.8 V power domain. Active low. TP0_I2C_SCL OD TP0 I2C clock 1.8 V power domain. TP0_I2C_SDA OD TP0 I2C data 1.8 V power domain. TP1_INT TP1_RST DI TP1 Interrupt 1.8 V power domain. DO TP1 reset Active low. 140 206 137 136 SC606T_Series_Hardware_Design 58 / 116 LCM0 (1)_LED+Module2.2 FBacklight DriverLCM0 (1)_LED-VBATC1PMU_MPP4/GPIO_33 Smart Module Series SC606T Series Hardware Design TP1_I2C_SCL OD TP1 I2C clock 1.8 V power domain. TP1_I2C_SDA OD TP1 I2C data 1.8 V power domain. 205 204 A reference design for touch panel interfaces is shown below. Figure 21: Reference Design for Touch Panel Interface NOTE By default, TP is powered by LDO10_2P8, which outputs a current of 150 mA. When dual-TP or other applications need to be supported, it is recommended to use an external LDO instead. 3.18. Camera Interfaces Based on standard MIPI_CSI input interface, The module supports 3 cameras (4-lane + 4-lane + 4-lane) or 4 cameras (4-lane + 4-lane + 2-lane + 1-lane). The video and photo quality is determined by various factors such as the quality of camera sensor and camera lens. Table 21: Pin Definition of Camera Interfaces Pin Name Pin No. I/O Description Comment LDO2_1P1 13 PO 1.1 V output power for DVDD of rear Camera Vnom = 1.1 V IOmax = 1200 mA SC606T_Series_Hardware_Design 59 / 116 TP_RSTTP_I2C_SCLTP_I2C_SDATP_INT1234562.2K2.2K4.7 F100nFModuleRESET 1.8V SCL 1.8VSDA 1.8V INT 1.8V GNDVDD 2.8V TPR2R1C1C2D1D2D3D4D5LDO10_2P8LDO6_1P8 Smart Module Series SC606T Series Hardware Design LDO6_1P8 10 PO 1.8 V output power for VDD of Sensor, Camera, LCD and I2Cs pull-up circuits Vnom = 1.8 V IOmax = 300 mA PO PO PO 2.85 V output power for VDD of LCD and Camera Vnom = 2.85 V IOmax = 300 mA 2.8 V output power for AVDD of Camera Vnom = 2.8 V IOmax = 150 mA 1.2 V output power for DVDD of front Camera. Vnom = 1.2 V IOmax = 600 mA LDO17_2P85 LDO22_2P8 LDO23_1P2 CSI0_CLK_N CSI0_CLK_P CSI0_LN0_N CSI0_LN0_P CSI0_LN1_N CSI0_LN1_P CSI0_LN2_N CSI0_LN2_P CSI0_LN3_N CSI0_LN3_P CSI1_CLK_P CSI1_LN0_N CSI1_LN0_P CSI1_LN1_N CSI1_LN1_P CSI1_LN2_N CSI1_LN3_N CSI1_LN3_P 12 14 15 89 88 91 90 93 92 95 94 97 96 183 186 185 188 187 190 192 191 AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI MIPI clock of rear camera (-) MIPI clock of rear camera (+) MIPI lane 0 data of rear camera (-) MIPI lane 0 data of rear camera (+) MIPI lane 1 data of rear camera (-) MIPI lane 1 data of rear camera (+) MIPI lane 2 data of rear camera (-) MIPI lane 2 data of rear camera (+) MIPI lane 3 data of rear camera (-) MIPI lane 3 data of rear camera (+) MIPI clock signal of depth camera (+) MIPI lane 0 data of depth camera (-) MIPI lane 0 data of depth camera (+) MIPI lane 1 data of depth camera (-) MIPI lane 1 data of depth camera (+) MIPI lane 2 data of depth camera (-) MIPI lane 3 data of depth camera (-) MIPI lane 3 data of depth camera (+) CSI1_CLK_N 184 MIPI clock signal of depth camera (-) CSI1_LN2_P 189 MIPI lane 2 data of depth camera (+) SC606T_Series_Hardware_Design 60 / 116 Smart Module Series SC606T Series Hardware Design 78 77 80 79 82 81 84 83 86 85 99 74 73 72 71 CSI2_CLK_N CSI2_CLK_P CSI2_LN0_N CSI2_LN0_P CSI2_LN1_N CSI2_LN1_P CSI2_LN2_N CSI2_LN2_P CSI2_LN3_N CSI2_LN3_P AI AI AI AI AI AI AI AI AI AI MIPI clock of front camera (-) MIPI clock of front camera (+) MIPI lane 0 data of front camera (-) MIPI lane 0 data of front camera (+) MIPI lane 1 data of front camera (-) MIPI lane 1 data of front camera (+) MIPI lane 2 data of front camera (-) MIPI lane 2 data of front camera (+) MIPI lane 3 data of front camera (-) MIPI lane 3 data of front camera (+) MCAM_MCLK DO Master clock of rear camera 1.8 V power domain. SCAM_MCLK 100 DO Master clock of front camera 1.8 V power domain. MCAM_RST DO Reset of rear camera 1.8 V power domain. MCAM_PWDN DO Power down of rear camera 1.8 V power domain. SCAM_RST DO Reset of front camera 1.8 V power domain. SCAM_PWDN DO Power down of front camera 1.8 V power domain. CAM_I2C_SCL 75 OD I2C clock of front and rear cameras 1.8 V power domain. CAM_I2C_SDA 76 OD I2C data of front and rear cameras 1.8 V power domain. DCAM_MCLK 194 DO Master clock of depth camera 1.8 V power domain. CAM4_MCLK 236 DO Master clock of fourth camera 1.8 V power domain. DCAM_RST 180 DO Reset of depth camera 1.8 V power domain. DCAM_PWDN 181 DO Power down of depth camera 1.8 V power domain. DCAM_I2C_SDA 197 OD I2C data of depth camera 1.8 V power domain. DCAM_I2C_SCL 196 OD I2C clock of depth camera 1.8 V power domain. The following is a reference design for dual camera application. SC606T_Series_Hardware_Design 61 / 116 Smart Module Series SC606T Series Hardware Design Figure 22: Reference Design for Dual Camera Application The following is a reference design for triple camera application. SC606T_Series_Hardware_Design 62 / 116 Rear camera connectorMCAM_PWDNMCAM_MCLKCAM_I2C_SDACAM_I2C_SCLSCAM_RSTSCAM_PWDNSCAM_MCLKCSI0_CLK_PCSI0_CLK_NCSI2_CLK_PCSI2_CLK_NLDO6_1P8LDO2_1P1LDO22_2P82.2K2.2KFront camera connector4.7F1F1FMCAM_RSTEMIEMIEMIEMIEMIEMIEMIEMIEMIEMILDO17_2P85AVDDAF_VDDDVDDDOVDD1FCSI0_LN0_PCSI0_LN0_NCSI0_LN1_PCSI0_LN1_NCSI0_LN2_PCSI0_LN2_NCSI0_LN3_PCSI0_LN3_NCSI2_LN0_PCSI2_LN0_NCSI2_LN1_PCSI2_LN1_NCSI2_LN2_PCSI2_LN2_NCSI2_LN3_PCSI2_LN3_NLDO23_1P2DVDD1F4.7F4.7FAVDDDOVDD Smart Module Series SC606T Series Hardware Design Figure 23: Reference Design for Triple Camera Application 3.18.1. Design Considerations Pay attention to the pin definitions of LCM and camera connectors to ensure the module and the connectors are connected correctly. MIPI is a high-speed signal line whose data rate reaches 2.1 Gbps. The differential impedance should be kept at 100 , and the trace be routed on the inner layer of PCB and not crossed with other SC606T_Series_Hardware_Design 63 / 116 Rear camera connectorMCAM_PWDNMCAM_MCLKCAM_I2C_SDACAM_I2C_SCL_CSI0_LN3_PCSI0_LN3_NCSI0_LN2_PCSI0_LN2_NCSI0_LN1_PCSI0_LN1_NCSI0_LN0_PCSI0_LN0_NSCAM_RSTSCAM_PWDNSCAM_MCLKCSI1_CLK_PCSI1_CLK_NCSI1_LN0_PCSI1_LN0_NCSI2_LN1_PCSI2_LN1_NCSI2_LN0_PCSI2_LN0_NCSI0_CLK_PCSI0_CLK_NCSI2_CLK_PCSI2_CLK_NLDO6_1P8LDO22_2P82.2K2.2KFront camera connector1F4.7F4.7F1F1F4.7FMCAM_RSTDCAM_PWDNDCAM_MCLKDCAM_I2C_SDA_DCAM_I2C_SCLDCAM_RSTDepth camera connector LDO17_2P85AVDDAF_VDDDVDDDOVDDEMIEMIEMIEMIEMIEMIEMIEMILDO2_1P11FLDO23_1P22.2K2.2KDVDDEMIEMI4.71FFAVDDDOVDD Smart Module Series SC606T Series Hardware Design traces. For the same group of DSI or CSI signals, the length of all MIPI traces should be kept the same. In order to avoid crosstalk, keep the intra-lane spacing as wide as the MIPI trace and the inter-lane spacing two times the MIPI trace width. Avoid any cut or hole on the GND reference plane under MIPI signal traces. It is recommended to select a low capacitance TVS for ESD protection and the recommended parasitic capacitance is below 1 pF. Route MIPI traces according to the following rules:

a) The total trace length should not exceed 305 mm;

b) Keep the differential impedance at 100 10 %;

c) Control the intra-lane length difference within 0.67 mm;

d) Control the inter-lane length difference within 1.3 mm. Table 22: MIPI Trace Length Inside the Module Pin Name Pin No. Length (mm) Length Difference (mm) DSI0_CLK_N DSI0_CLK_P DSI0_LN0_N DSI0_LN0_P DSI0_LN1_N DSI0_LN1_P DSI0_LN2_N DSI0_LN2_P DSI0_LN3_N DSI0_LN3_P DSI1_CLK_N DSI1_CLK_P DSI1_LN0_N DSI1_LN0_P DSI1_LN1_N DSI1_LN1_P 116 115 118 117 120 119 122 121 124 123 103 102 105 104 107 106 20.82 20.37 24.84 24.84 24.85 24.82 25.94 26.18 29.31 29.51 9.52 9.47 10.27 10.16 11.75 11.58

-0.45 0

-0.03 0.24 0.2

-0.05

-0.11

-0.17 SC606T_Series_Hardware_Design 64 / 116 Smart Module Series SC606T Series Hardware Design DSI1_LN2_N DSI1_LN2_P DSI1_LN3_N DSI1_LN3_P CSI0_CLK_N CSI0_CLK_P CSI0_LN0_N CSI0_LN0_P CSI0_LN1_N CSI0_LN1_P CSI0_LN2_N CSI0_LN2_P CSI0_LN3_N CSI0_LN3_P CSI1_CLK_N CSI1_CLK_P CSI1_LN0_N CSI1_LN0_P CSI1_LN1_N CSI1_LN1_P CSI1_LN2_N CSI1_LN2_P CSI1_LN3_N CSI1_LN3_P CSI2_CLK_N CSI2_CLK_P 109 108 111 110 89 88 91 90 93 92 95 94 97 96 184 183 186 185 188 187 190 189 192 191 78 77 14.86 14.5 15.73 15.88 16.54 16.57 17.47 17.4 12.13 12.08 9.56 9.7 8.73 8.86 20.32 20.09 12.09 12.66 11.33 11.70 5.86 6.05 10.49 10.06 22.00 22.17

-0.36 0.15 0.03

-0.07

-0.05 0.14 0.13

-0.23 0.57 0.37 0.19

-0.43 0.17 SC606T_Series_Hardware_Design 65 / 116 Smart Module Series SC606T Series Hardware Design CSI2_LN0_N CSI2_LN0_P CSI2_LN1_N CSI2_LN1_P CSI2_LN2_N CSI2_LN2_P CSI2_LN3_N CSI2_LN3_P 80 79 82 81 84 83 86 85 22.07 22.00 22.54 22.05 22.03 21.92 21.90 22.49

-0.07

-0.49

-0.11 0.59 3.19. Sensor Interfaces The module communicates with sensors via the I2C interface, which supports the communication with various sensors such as acceleration sensors, gyroscopic sensors, compasses, optical sensors and temperature sensors. Table 23: Pin Definition of Sensor Interfaces Pin Name I/O Description Comment Pin No. SENSOR_I2C_SCL 131 OD I2C clock for external sensor SENSOR_I2C_SDA 132 OD I2C data for external sensor Dedicated for external sensors. Cannot be used for other devices such as touch panel, NFC and keypad. 3.20. Audio Interfaces The module provides three analog input channels and three analog output channels. The following table shows the pin definition. SC606T_Series_Hardware_Design 66 / 116 Smart Module Series SC606T Series Hardware Design Table 24: Pin Definition of Audio Interfaces Pin Name Pin No. I/O Description Comment MIC1_P MIC1_N 44 45 Microphone input for channel 1 (+) Microphone input for channel 1 (-) MIC_GND 168 Microphone reference ground If unused, connect this pin to the ground. MIC2_P 46 Microphone input for headset (+) MIC3_P 169 Microphone input for channel 2 (+) MIC_BIAS 167 PO Bias voltage output for microphone AI AI AI AI AO Earpiece output (+) AO Earpiece output (-) AO Speaker output (+) AO Speaker output (-) EAR_P EAR_N SPK_P SPK_N HPH_R HPH_L HS_DET 53 52 55 54 51 49 48 AO Headphone right channel output HPH_REF 50 AI Headphone reference ground It should be connected to the main GND. AO Headphone left channel output AI Headset hot-plug detect High level by default. The module offers three audio input channels, including one differential input pair and two single-ended channels. The three sets of MICs are integrated with internal bias voltage. The output voltage range of MIC_BIAS can be set at between 1.6 V and 2.85 V, and the maximum output current is 3 mA. The earpiece interface is a differential output pair. The loudspeaker interface is a differential output pair as well. This output channel is available with a Class-D amplifier whose maximum output power is 1.5 W when the load is 8 . The headphone interface features stereo audio output via left and right channels, as well as the function of headphone insertion detect. SC606T_Series_Hardware_Design 67 / 116 Smart Module Series SC606T Series Hardware Design 3.20.1. Reference Design for Microphone Interfaces Figure 24: Reference Design for Analog ECM-type Microphone Figure 25: Reference Design for MEMS-type Microphone SC606T_Series_Hardware_Design 68 / 116 MIC1_PECM-MICR2R1ModuleD1MIC1_N33 pFC10R0RR30RMIC3_P33 pFMEMS-MICR2R1C2ModuleMIC_GND0RC1MIC_BIAS1234F1D1OUTGNDGNDVDD100 pFC40R33 pF Smart Module Series SC606T Series Hardware Design 3.20.2. Reference Design for Earpiece Interface Figure 26: Reference Design for Earpiece Interface 3.20.3. Reference Design for Headphone Interface Figure 27: Reference Design for Headphone Interface with Normally Open Jack SC606T_Series_Hardware_Design 69 / 116 EAR_PEAR_NR233 pF33 pF33 pFC2C3C1R1ModuleD1D20R0R20KESDMIC_GNDMIC2_PHPH_LHS_DETHPH_RHPH_REF33 pFModuleR10R36452133 pF33 pFC3C4C5F3F2F1D1D2D3D4F4R2R30R Smart Module Series SC606T Series Hardware Design 3.20.4. Reference Design for Loudspeaker Interface Figure 28: Reference Design for Loudspeaker Interface 3.20.5. Design Considerations It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10 pF and 33 pF) for filtering out RF interference, and thereby reducing TDD noise. The 33 pF capacitor is applied for filtering out RF interference when the module is transmitting at EGSM900. Without this capacitor, TDD noise could be heard. The 10 pF capacitor here is used for filtering out RF interference at DCS1800. Note that the self-resonant frequency point of a capacitor largely depends on the material and production technique. Therefore, it is advisable to choose the most suitable capacitor for filtering out high-frequency noises after consulting your capacitor supplier. The severity degree of the RF interference in the voice channel during GSM transmitting largely depends on the application design. In some cases, EGSM900 TDD noise is more severe; while in other cases, DCS1800 TDD noise is more obvious. Therefore, a suitable capacitor should be selected based on test results. Sometimes, even no RF filtering capacitor is required. To decrease radio or other signal interference, RF antennas and power traces should be placed away from audio interfaces and audio traces. Besides, power traces cannot be in parallel with the audio traces. The differential audio traces must be kept at the same length. 3.21. Emergency Download Interface USB_BOOT is used to force USB booting. Pulling it up to LDO5_1P8 before power-up will force the module into download mode. This is a solution when there are failures such as an abnormal startup or operation. For convenient firmware upgrade and debugging in the future, it is recommended to reserve SC606T_Series_Hardware_Design 70 / 116 EARPEARNF2SPK_PSPK_N33 pF33 pFC1C2F1ModuleD1D2 Smart Module Series SC606T Series Hardware Design the reference design shown below. Figure 29: Reference Design for USB_BOOT SC606T_Series_Hardware_Design 71 / 116 LDO5_1P8S1 ModuleUSB_BOOTR110K Smart Module Series SC606T Series Hardware Design 4 Wi-Fi and BT The module provides a shared antenna interface ANT_WIFI/BT for Wi-Fi and Bluetooth (BT) functions. The interface impedance is 50 . External antennas such as the PCB antenna, the sucker antenna, and the ceramic antenna can be connected to the module via the interface to provide Wi-Fi and BT functions. 4.1. Wi-Fi Function Overview The module supports 2.4 GHz and 5 GHz dual-band WLAN wireless communications based on IEEE 802.11a/b/g/n/ac standard protocols. The maximum data rate is 433 Mbps. The features available are as follows:

Support Wake-on-WLAN (WoWLAN) Support ad hoc mode Support WAPI SMS4 hardware encryption Support AP mode Support Wi-Fi Direct Support MCS 0-7 for HT20 and HT40 Support MCS 0-8 for VHT20 Support MCS 0-9 for VHT40 and VHT80 4.1.1. Wi-Fi Performance The following table lists the Wi-Fi transmitting and receiving performance of the module. Table 25: Wi-Fi Transmitting Performance Standard 802.11b Rate 1 Mbps Output Power 16 dBm 2.5 dB 2.4 GHz 802.11b 11 Mbps 16 dBm 2.5 dB 802.11g 6 Mbps 16 dBm 2.5 dB SC606T_Series_Hardware_Design 72 / 116 Smart Module Series SC606T Series Hardware Design 802.11g 54 Mbps 14 dBm 2.5 dB 802.11n HT20 802.11n HT20 802.11n HT40 802.11n HT40 802.11a 802.11a 802.11n HT20 802.11n HT20 802.11n HT40 802.11n HT40 MCS0 MCS7 MCS0 MCS7 6Mbps MCS0 MCS7 MCS0 MCS7 15 dBm 2.5 dB 13 dBm 2.5 dB 14 dBm 2.5 dB 13 dBm 2.5 dB 14 dBm 2.5 dB 15 dBm 2.5 dB 13 dBm 2.5 dB 15 dBm 2.5 dB 13 dBm 2.5 dB 54Mbps 13 dBm 2.5 dB 802.11ac VHT20 MCS0 15 dBm 2.5 dB 802.11ac VHT20 MCS8 13 dBm 2.5 dB 802.11ac VHT40 MCS0 14 dBm 2.5 dB 802.11ac VHT40 MCS9 13 dBm 2.5 dB 802.11ac VHT80 MCS0 13 dBm 2.5 dB 802.11ac VHT80 MCS9 12 dBm 2.5 dB 5 GHz Table 26: Wi-Fi Receiving Performance Standard Rate Sensitivity 802.11b 802.11b 1 Mbps

-94 dBm 11 Mbps

-86 dBm 2.4 GHz 802.11g 6 Mbps

-88 dBm 802.11g 54 Mbps

-71 dBm 802.11n HT20 MCS0

-87 dBm SC606T_Series_Hardware_Design 73 / 116

-69 dBm

-85 dBm

-67 dBm

-90 dBm

-86 dBm

-66 dBm

-84 dBm

-65 dBm

-65 dBm

-61 dBm

-56 dBm Smart Module Series SC606T Series Hardware Design 802.11n HT20 802.11n HT40 802.11a 802.11a MCS7 MCS0 6 Mbps 802.11n HT40 MCS7 54 Mbps

-71 dBm 802.11n HT20 MCS0 802.11n HT20 MCS7 5 GHz 802.11n HT40 MCS0 802.11n HT40 MCS7 802.11ac VHT20 MCS8 802.11ac VHT40 MCS9 802.11ac VHT80 MCS9 The reference specifications are listed below:

IEEE 802.11n WLAN MAC and PHY, October 2009 + IEEE 802.11-2007 WLAN MAC and PHY, June 2007 IEEE Std 802.11b, IEEE Std 802.11d, IEEE Std 802.11e, IEEE Std 802.11g, IEEE Std 802.11i: IEEE 802.11-2007 WLAN MAC and PHY, June 2007 4.2. BT Function Overview The module supports BT 4.2 (BR/EDR + BLE) specifications, as well as GFSK, 8-DPSK, /4-DQPSK modulation modes. Support up to 7 wireless connections Support up to 3.5 piconets at the same time Support one SCO or eSCO (Extended Synchronous Connection Oriented) connection The BR/EDR channel bandwidth is 1 MHz and can accommodate 79 channels. The BLE channel bandwidth is 2 MHz and can accommodate 40 channels. SC606T_Series_Hardware_Design 74 / 116 Smart Module Series SC606T Series Hardware Design Table 27: BT Data Rate and Versions Version Data rate Maximum Application Throughput 1.2 1 Mbit/s

> 80 kbit/s 2.0+EDR 3 Mbit/s

> 80 kbit/s 3.0+HS 24 Mbit/s Refer to 3.0+HS 4.0 4.2 24 Mbit/s Refer to 4.0 LE 60 Mbit/s Refer to 4.2 LE The reference specifications are listed below:

Bluetooth Radio Frequency TSS and TP Specifications 1.2/2.0/2.0 + EDR/2.1/2.1+ EDR/3.0/3.0 + HS, August 6, 2009 Bluetooth Low Energy RF PHY Test Specifications, RF-PHY.TS/4.0.0, December 15, 2009 Bluetooth Low Energy RF PHY Test Specifications, Core_v4.2, December 12, 2014 4.2.1. BT Performance The following table lists the BT transmitting and receiving performance of the module. Table 28: BT Transmitting and Receiving Performance Transmitter Performance Packet Types DH5 2-DH5 3-DH5 Transmitting Power 10 dBm 2.5 dB 8 dBm 2.5 dB 8 dBm 2.5 dB Receiver Performance Packet Types DH5 2-DH5 Receiving Sensitivity

-90 dBm

-90 dBm 3-DH5

-85 dBm SC606T_Series_Hardware_Design 75 / 116 Smart Module Series SC606T Series Hardware Design 5 GNSS The module integrates a GNSS engine (Gen 8C) which supports multiple positioning and navigation systems including GPS, GLONASS, and BeiDou. With an embedded LNA, the positioning accuracy of the module has been significantly improved. 5.1. GNSS Performance The following table lists the GNSS performance of the module in conduction mode. Table 29: GNSS Performance Parameter Description Sensitivity (GNSS) Reacquisition Cold start Tracking Cold start Hot start Typ.

-145

-157

-157 34.3 26.9 3.7 TTFF (GNSS) Warm start Static Drift (GNSS) CEP-50

< 2.5 5.2. GNSS Design Guidelines Unit dBm dBm dBm s s s m Bad design of antenna signal traces layout may cause reduced GNSS receiving sensitivity, longer GNSS positioning time, and reduced positioning accuracy. To avoid these, follow the design rules listed below:

Maximize the distance between the GNSS RF part and the GPRS RF part (including trace routing and antenna traces layout) to avoid mutual interference. SC606T_Series_Hardware_Design 76 / 116 Smart Module Series SC606T Series Hardware Design In user systems, GNSS RF signal traces and RF components should be placed far away from high-speed circuits, switched-mode power supplies, power inductors, the clock circuit of single-chip microcomputers, etc. For applications with a harsh electromagnetic environment or high ESD-protection requirements, it is recommended to add ESD protection diodes for the antenna interface. Only diodes with ultra-low junction capacitance such as 0.5 pF can be selected. Otherwise, there will be effects on the impedance characteristic of the RF circuit loop or attenuation of the bypass RF signal may be caused. Control the impedance of both the antenna feeder and PCB trace at 50 , and keep the trace length as short as possible. See Chapter 6.3 for GNSS antenna reference circuit designs. SC606T_Series_Hardware_Design 77 / 116 Smart Module Series SC606T Series Hardware Design 6 Antenna Interfaces The module provides five antenna interfaces for five types of antennas: the main antenna, the Rx-diversity/MIMO antenna, the GNSS antenna, the Wi-Fi/BT antenna and the FM antenna. Each antenna port has an impedance of 50 . 6.1. Main and Rx-diversity Antenna Interfaces The pin definition of main/Rx-diversity antenna interfaces is shown below. Table 30: Pin Definition of Main and Rx-diversity Antenna Interfaces I/O AIO AI Pin Name Pin No. Description Comment ANT_MAIN 19 Main antenna interface 50 impedance ANT_DRX 149 Diversity and MIMO antenna interface 50 impedance The operating frequencies of the series are listed in the following tables. Table 31: SC606T-JP Operating Frequencies 3GPP Band Receive Transmit WCDMA B1 21102170 19201980 WCDMA B6 WCDMA B8 WCDMA B19 875885 925960 875890 830840 880915 830845 LTE-FDD B1 21102170 19201980 LTE-FDD B3 18051880 17101785 Unit MHz MHz MHz MHz MHz MHz SC606T_Series_Hardware_Design 78 / 116 Smart Module Series SC606T Series Hardware Design LTE-FDD B11 14761496 14281448 LTE-FDD B21 14961511 14481463 LTE-TDD B41 1) 24962690 24962690 Table 32: SC606T-EM Operating Frequencies LTE-FDD B5 LTE-FDD B8 LTE-FDD B18 LTE-FDD B19 869894 925960 860875 875890 LTE-FDD B26 758788 LTE-FDD B28A 758788 LTE-FDD B28B 773803 3GPP Band GSM850 EGSM900 DCS1800 PCS1900 Receive 869894 925960 824849 880915 815830 830845 703733 703733 718748 Transmit 824849 880915 18051880 17101785 19301990 18501910 WCDMA B1 21102170 19201980 WCDMA B2 19301990 18501910 WCDMA B4 21102155 17101755 WCDMA B5 WCDMA B8 869894 925960 824849 880915 LTE-FDD B1 21102170 19201980 LTE-FDD B2 19301990 18501910 LTE-FDD B3 18051880 17101785 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz SC606T_Series_Hardware_Design 79 / 116 Smart Module Series SC606T Series Hardware Design LTE-FDD B4 21102155 17101755 LTE-FDD B5 869894 824849 LTE-FDD B7 26202690 25002570 LTE-FDD B8 LTE-FDD B20 925960 791821 LTE-FDD B28A 758788 LTE-FDD B28B 773803 880915 832862 703733 718748 LTE-TDD B38 25702620 25702620 LTE-TDD B40 23002400 23002400 LTE-TDD B41 1) 24962690 24962690 Table 33: SC606T-NAD Operating Frequencies 3GPP Band Receive LTE-FDD B2 19301990 Transmit 1851910 LTE-FDD B4 21102155 17101755 LTE-FDD B5 869894 824849 LTE-FDD B7 26202690 25002570 LTE-FDD B12 LTE-FDD B13 LTE-FDD B14 LTE-FDD B17 729746 746756 758768 734746 699716 777787 788798 704716 LTE-FDD B25 19301995 18501915 LTE-FDD B26 859894 814849 LTE-FDD B66 21102200 17101780 LTE-FDD B71 617652 663698 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz SC606T_Series_Hardware_Design 80 / 116 Smart Module Series SC606T Series Hardware Design LTE-TDD B41 1) 24962690 24962690 MHz NOTE 1) The bandwidth of LTE-TDD B41 for SC606T-EM, SC606T-JP, SC606T-NAD is 200 MHz (24962690 MHz), and the corresponding uplink EARFCN ranges from 39650 to 41589. 6.1.1. Reference Design for Main and Rx-diversity Antenna Interfaces A reference circuit design for the main and Rx-diversity antenna interfaces is shown as below. A -type matching circuit should be reserved for both ANT_MAIN and ANT_DRX for better RF performance, and the -type matching components (R1/C1/C2, R2/C3/C4) should be placed as close to the antennas as possible. The capacitors are not mounted by default and the resistors are 0 . Figure 30: Reference Circuit Design for Main and Rx-diversity Antenna Interfaces 6.1.2. Reference Designs for RF Layouts For the users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic SC606T_Series_Hardware_Design 81 / 116 ANT_MAINR1 0RC1ModuleMainantennaNMC2NMR2 0RC3DiversityantennaNMC4NMANT_DRX Smart Module Series SC606T Series Hardware Design impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 31: Microstrip Design on a 2-layer PCB Figure 32: Coplanar Waveguide Design on a 2-layer PCB Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) SC606T_Series_Hardware_Design 82 / 116 Smart Module Series SC606T Series Hardware Design Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to The GND pins adjacent to RF pins should not be designed as thermal relief pins and should be fully 50 . connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curve ones. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times as wide as RF signal traces (2 W). For more details about the RF layout, see document [3]. 6.2. Wi-Fi/BT and FM Antenna Interfaces The pin definition of Wi-Fi/BT and FM antenna interfaces and operating frequencies are shown below. Table 34: Pin Definition of Wi-Fi/BT and FM Antenna Interfaces Pin Name Pin No. I/O Description Comment ANT_WIFI/BT 129 AIO Wi-Fi/BT antenna interface 50 impedance ANT_FM 244 AI FM antenna interface 50 impedance SC606T_Series_Hardware_Design 83 / 116 Unit MHz MHz MHz Smart Module Series SC606T Series Hardware Design Table 35: Wi-Fi/BT and FM Frequency Type 802.11a/b/g/n/ac BT 4.2 LE FM Frequency 24022482 51805825 24022480 76108 The reference circuit designs for the Wi-Fi/BT antenna interface and the FM antenna interface are shown below. A -type matching circuit is recommended to be reserved for both interfaces for better RF performance. The capacitors are not mounted by default and resistors are 0 . Figure 35: Reference Circuit Design for Wi-Fi/BT Antenna Interface Figure 36: Reference Circuit Design for FM Antenna Interface 6.3. GNSS Antenna Interface The pin definition of GNSS antenna interface and operating frequencies are shown below. SC606T_Series_Hardware_Design 84 / 116 ANT_WIFI/BTR1 0RC1ModuleNMC2NM ANT_FMR1 0RC1ModuleNMC2NM Smart Module Series SC606T Series Hardware Design Table 36: Pin Definition of GNSS Antenna Pin Name Pin No. I/O Description Comment ANT_GNSS 134 AI GNSS antenna Interface 50 impedance GNSS_LNA_EN 202 DO LNA enable control For test purpose only. If unused, keep it open. Table 37: GNSS Frequency Type GPS Frequency 1575.42 1.023 GLONASS 1597.51605.8 BeiDou 1561.098 2.046 6.3.1. Reference Design for Passive Antenna The GNSS antenna interface supports passive ceramic antennas and other types of passive antennas. A reference circuit design is given below. Unit MHz MHz MHz Figure 37: Reference Design for GNSS Passive Antenna NOTE When the passive antenna is placed far away from the module and the trace is long, it is recommended to add an external LNA circuit for better GNSS receiving performance, and the LNA should be placed close to the antenna. SC606T_Series_Hardware_Design 85 / 116 Passive AntennaModuleANT_GNSSNMC1C2R1C4NM0R Smart Module Series SC606T Series Hardware Design 6.3.2. Reference Design for Active Antenna The active antenna is powered by a 56 nH inductor through the antenna's signal path. The common power supply voltage ranges from 3.3 V to 5.0 V. Featuring low power consumption, the active antenna requires a stable and clean power. It is recommended to use a high-performance LDO to regulate the supply voltage for the active antenna. A reference design of GNSS active antenna is shown below. Figure 38: Reference Design for GNSS Active Antenna It is strongly recommended to reserve the - type attenuation network. NOTE 6.4. Antenna Installation 6.4.1. Antenna Requirements The following table shows the requirements on the main antenna, the Rx-diversity antenna, the Wi-Fi/BT antenna, and the GNSS antenna. Table 38: Antenna Requirements Antenna Type Requirements GSM/WCDMA/

LTE VSWR: 2 Gain (dBi): 1 Max Input Power (W): 50 Input Impedance (): 50 SC606T_Series_Hardware_Design 86 / 116 3V3ModuleANT_GNSS56 nH10R1 F100 pFNMNMC4C1R1L1R20RC5C3C2100 pFR4R3R5Active Antenna0R Smart Module Series SC606T Series Hardware Design Polarization Type: Vertical Cable Insertion Loss: < 1 dB

(GSM850, EGSM900, WCDMA B5/B6/B8/B19, LTE B5/B8/B12/B13/B14/B17/B18/B19/B20/B26/B28A/B28B/B71) Cable Insertion Loss: < 1.5 dB

(DCS1800, PCS1900, WCDMA B1/B2/B4, LTE B1/B2/B3/B4/B11/B21/B25/B34/B39/B66) Cable Insertion Loss: < 2 dB (LTE-FDD B7, LTE-TDD B38/B40/B41) VSWR: 2 Gain (dBi): 1 Max Input Power (W): 50 Input Impedance (): 50 Polarization Type: Vertical Cable Insertion Loss: < 1 dB Frequency range: 15591609 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive Antenna Gain: > 0 dBi Active Antenna Noise Figure: <1.5 dB (Typ.) Active Antenna Gain: > -2 dBi Active Antenna Embedded LNA Gain: < 17 dB (Typ.) Active Antenna Total Gain: < 17 dBi (Typ.) 1) As the harmonics generated by LTE B13 and B14 may saturate the LNA of active antennas, it is recommended to use the passive antenna in such networks. 6.4.2. Recommended RF Connector for Antenna Installation If an RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by HIROSE. Wi-Fi/BT GNSS 1) NOTE SC606T_Series_Hardware_Design 87 / 116 Smart Module Series SC606T Series Hardware Design Figure 39: Dimensions of the U.FL-R-SMT Connector (Unit: mm) The U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 40: Mechanicals of U.FL-LP Connectors The following figure describes the form factor of the mated connectors. SC606T_Series_Hardware_Design 88 / 116 Smart Module Series SC606T Series Hardware Design Figure 41: Form Factor of Mated Connectors (Unit: mm) For more details, please visit http://www.hirose.com. SC606T_Series_Hardware_Design 89 / 116 Smart Module Series SC606T Series Hardware Design 7 Reliability, Electrical and Radio Characteristics 7.1. Absolute Maximum Ratings The absolute maximum ratings of the power and voltage supplied to the digital and analog pins of the module are listed in the following table. Table 39: Absolute Maximum Ratings Parameter VBAT USB_VBUS Current on VBAT Voltage on Digital Pins Min.

-0.5

-0.3 0

-0.3 Max. Unit 6 10 3 2.16 V V A V 7.2. Operating Power Table 40: Operating Power Parameter Description Conditions Min. Typ. Max. Unit VBAT Peak supply voltage for VBAT The actual input voltage must fall between the minimum and maximum values Voltage drop during a transmitting burst Maximum power control level at EGSM900 3.55 3.8 4.4 V

400 mV SC606T_Series_Hardware_Design 90 / 116 Smart Module Series SC606T Series Hardware Design Peak supply current

(during a transmission slot) IVBAT USB_VBUS VRTC Supply voltage of a backup battery Maximum power control level at EGSM900

1.8 3.0 A 4.0 5.0 6.0 2.0 3.0 3.25 V V 7.3. Operating and Storage Temperatures The operating and storage temperatures are listed in the following table. Table 41: Operating and Storage Temperatures Parameter Min. Max. Unit Operating temperature range 1)

-35 Storage temperature range

-40

+75

+90 C C Typ.

+25 NOTE 1) Within the operating temperature range, the module is 3GPP compliant. 7.4. Current Consumption The current consumptions of the module in different conditions are listed in the following tables. Table 42: SC606T-JP Current Consumption Description Conditions Typ. Unit OFF state Power down WCDMA supply current Sleep (USB disconnected)

@ DRX = 6 Sleep (USB disconnected) 80 4.57 3.1 A mA mA SC606T_Series_Hardware_Design 91 / 116 Smart Module Series SC606T Series Hardware Design LTE-FDD supply current LTE-TDD supply current WCDMA voice call WCDMA data transfer LTE data transfer

@ DRX=8 Sleep (USB disconnected)

@ DRX = 9 Sleep (USB disconnected)

@ DRX = 6 Sleep (USB disconnected)

@ DRX = 8 Sleep (USB disconnected)

@ DRX = 6 Sleep (USB disconnected)

@ DRX = 8 B1 @ max power B6 @ max power B8 @ max power B19 @ max power B1 (HSDPA) @ max power B6 (HSDPA) @ max power B8 (HSDPA) @ max power B19 (HSDPA) @ max power B1 (HSUPA) @ max power B6 (HSUPA) @ max power B8 (HSUPA) @ max power B19 (HSUPA) @ max power LTE-FDD B1 @ max power LTE-FDD B3 @ max power LTE-FDD B5 @ max power LTE-FDD B8 @ max power LTE-FDD B11 @ max power LTE-FDD B18 @ max power 3.0 mA 4.13 mA 3.15 mA 3.95 mA 3.03 597 620 584 610 550 580 550 580 562 595 556 600 570 610 530 540 550 595 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC606T_Series_Hardware_Design 92 / 116 Smart Module Series SC606T Series Hardware Design Description Conditions Typ. Unit LTE-FDD B19 @ max power LTE-FDD B21 @ max power LTE-FDD B26 @ max power LTE-FDD B28A @ max power LTE-FDD B28B @ max power LTE-TDD B41 @ max power Table 43: SC606T-EM Current Consumption OFF state Power down GSM supply current WCDMA supply current LTE-FDD supply current LTE-TDD supply current Sleep (USB disconnected)

@ DRX = 2 Sleep (USB disconnected)

@ DRX = 5 Sleep (USB disconnected)

@ DRX = 9 Sleep (USB disconnected)

@ DRX = 6 Sleep (USB disconnected)

@ DRX = 8 Sleep (USB disconnected)

@ DRX = 9 Sleep (USB disconnected)

@ DRX = 6 Sleep (USB disconnected)

@ DRX = 8 Sleep (USB disconnected)

@ DRX = 6 Sleep (USB disconnected)

@ DRX = 8 GSM850 @ PCL 5 GSM voice call GSM850 @ PCL 12 GSM850 @ PCL 19 540 560 570 680 625 530 80 4.5 3.5 3 mA mA mA mA mA mA A mA mA mA 3.47 mA 3.11 mA 2.75 mA 3.85 mA 2.96 mA 4.27 mA 3.17 280 125 110 mA mA mA mA SC606T_Series_Hardware_Design 93 / 116 Smart Module Series SC606T Series Hardware Design EGSM900 @ PCL 5 EGSM900 @ PCL 12 EGSM900 @ PCL 19 DCS1800 @ PCL 0 DCS1800 @ PCL 7 DCS1800 @ PCL 15 PCS1900 @ PCL 0 PCS1900 @ PCL 7 PCS1900 @ PCL 15 B1 @ max power B2 @ max power B5 @ max power B8 @ max power GSM850 (1UL/4DL) @ PCL 5 GSM850 (2UL/3DL) @ PCL 5 GSM850 (3UL/2DL) @ PCL 5 GSM850 (4UL/1DL) @ PCL 5 EGSM900 (1UL/4DL) @ PCL 5 EGSM900 (3UL/2DL) @ PCL 5 EGSM900 (4UL/1DL) @ PCL 5 DCS1800 (1UL/4DL) @ PCL 0 DCS1800 (2UL/3DL) @ PCL 0 DCS1800 (3UL/2DL) @ PCL 0 WCDMA voice call B4 @ max power GPRS data transfer EGSM900 (2UL/3DL) @ PCL 5 280 120 100 210 140 130 210 130 125 620 550 580 590 560 240 370 440 500 260 380 490 520 190 280 350 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC606T_Series_Hardware_Design 94 / 116 Smart Module Series SC606T Series Hardware Design DCS1800 (4UL/1DL) @ PCL 0 PCS1900 (1UL/4DL) @ PCL 0 PCS1900 (2UL/3DL) @ PCL 0 PCS1900 (3UL/2DL) @ PCL 0 PCS1900 (4UL/1DL) @ PCL 0 GSM850 (1UL/4DL) @ PCL 8 GSM850 (2UL/3DL) @ PCL 8 GSM850 (3UL/2DL) @ PCL 8 GSM850 (4UL/1DL) @ PCL 8 EGSM900 (1UL/4DL) @ PCL 8 EGSM900 (2UL/3DL) @ PCL 8 EGSM900 (3UL/2DL) @ PCL8 EGSM900 (4UL/1DL) @ PCL 8 DCS1800 (1UL/4DL) @ PCL 2 DCS1800 (2UL/3DL) @ PCL 2 DCS1800 (3UL/2DL) @ PCL 2 DCS1800 (4UL/1DL) @ PCL 2 PCS1900 (1UL/4DL) @ PCL 2 PCS1900 (2UL/3DL) @ PCL 2 PCS1900 (3UL/2DL) @ PCL 2 PCS1900 (4UL/1DL) @ PCL 2 B1 (HSDPA) @ max power B2 (HSDPA) @ max power B4 (HSDPA) @ max power B5 (HSDPA) @ max power EDGE data transfer WCDMA data transfer 420 190 290 370 420 170 250 320 370 170 260 340 380 170 260 330 400 170 260 400 410 550 510 530 550 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC606T_Series_Hardware_Design 95 / 116 Smart Module Series SC606T Series Hardware Design B8 (HSDPA) @ max power B1 (HSUPA) @ max power B2 (HSUPA) @ max power B4 (HSUPA) @ max power B5 (HSUPA) @ max power B8 (HSUPA) @ max power LTE-FDD B1 @ max power LTE-FDD B2 @ max power LTE-FDD B3 @ max power LTE-FDD B4 @ max power LTE-FDD B5 @ max power LTE-FDD B7 @ max power LTE-FDD B20 @ max power LTE-FDD B28A @ max power LTE-FDD B28B @ max power LTE-TDD B38 @ max power LTE-TDD B40 @ max power LTE-TDD B41 @ max power 510 580 530 550 520 520 550 530 650 530 560 680 550 530 580 570 600 430 580 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA LTE data transfer LTE-FDD B8 @ max power 7.5. RF Output Power The following tables show the RF output power of the module. SC606T_Series_Hardware_Design 96 / 116 Smart Module Series SC606T Series Hardware Design Table 44: SC606T-JP RF Output Power Max. Min. 24 dBm +1/-3 dB

< -49 dBm 24 dBm +1/-3 dB

<- 49 dBm 24 dBm +1/-3 dB

< -49 dBm WCDMA B19 24 dBm +1/-3 dB

< -49 dBm Frequency WCDMA B1 WCDMA B6 WCDMA B8 LTE-FDD B1 LTE-FDD B3 LTE-FDD B5 LTE-FDD B8 GSM850 EGSM900 DCS1800 PCS1900 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB LTE-FDD B11 23 dBm 2 dB LTE-FDD B18 23 dBm 2 dB LTE-FDD B19 23 dBm 2 dB LTE-FDD B21 23 dBm 2 dB LTE-FDD B26 23 dBm 2 dB LTE-FDD B28A 23 dBm 2 dB LTE-FDD B28B 23 dBm 2 dB LTE-TDD B41 23 dBm 2 dB

< -39 dBm

< -39 dBm

< -39 dBm

<-39 dBm

<-39 dBm

<-39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm Table 45: SC606T-EM RF Output Power Frequency Max. Min. 33 dBm 2 dB 5 dBm 5 dB 33 dBm 2 dB 5 dBm 5 dB 30 dBm 2 dB 0dBm 5 dB 30 dBm 2 dB 0dBm 5 dB SC606T_Series_Hardware_Design 97 / 116 Smart Module Series SC606T Series Hardware Design 24 dBm +1/-3 dB

< -49 dBm 24 dBm +1/-3 dB

< -49 dBm 24 dBm +1/-3 dB

< -49 dBm 24 dBm +1/-3 dB

< -49 dBm 24 dBm +1/-3 dB

< -49 dBm WCDMA B1 WCDMA B2 WCDMA B4 WCDMA B5 WCDMA B8 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B7 LTE-FDD B8 Frequency LTE-FDD B2 LTE-FDD B4 LTE-FDD B5 LTE-FDD B7 LTE-FDD B20 23 dBm 2 dB LTE-FDD B28A 23 dBm 2 dB LTE-FDD B28B 23 dBm 2 dB LTE-TDD B38 23 dBm 2 dB LTE-TDD B40 23 dBm 2 dB LTE-TDD B41 23 dBm 2 dB Table 46: SC606T-NAD RF Output Power 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB Max. 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm Min.

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm SC606T_Series_Hardware_Design 98 / 116 Smart Module Series SC606T Series Hardware Design LTE-FDD B12 23 dBm 2 dB LTE-FDD B13 23 dBm 2 dB LTE-FDD B14 23 dBm 2 dB LTE-FDD B17 23 dBm 2 dB LTE-FDD B25 23 dBm 2 dB LTE-FDD B26 23 dBm 2 dB LTE-FDD B66 23 dBm 2 dB LTE-FDD B71 23 dBm 2 dB LTE-TDD B41 23 dBm 2 dB

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm

< -39 dBm NOTE In GPRS 4 slots TX mode, the maximum output power is reduced by 3 dB. This design conforms to the GSM specifications as described in Chapter 13.16 of 3GPP TS 51.010-1. 7.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of the module. Table 47: SC606T-JP RF Receiving Sensitivity Frequency 3GPP (SIMO) Primary Diversity SIMO Receive Sensitivity (Typ.) WCDMA B1

-108.5

-109.5

-110.5

-106.7 dBm WCDMA B6

-109.5

-108 WCDMA B8

-109.5

-109.5 WCDMA B19

-109.5 LTE-FDD B1 (10 MHz)

-97

-108

-98

-111

-111

-110.5

-99.5

-106.7 dBm

-104.7 dBm

-106.7 dBm

-96.3 dBm SC606T_Series_Hardware_Design 99 / 116 Smart Module Series SC606T Series Hardware Design LTE-FDD B21(10 MHz)

-97

-96.5 LTE-FDD B3 (10 MHz)

-97 LTE-FDD B5 (10 MHz)

-97 LTE-FDD B8 (10 MHz)

-97 LTE-FDD B11 (10 MHz)

-96 LTE-FDD B18(10 MHz)

-97 LTE-FDD B19 (10 MHz)

-97 LTE-FDD B26 (10 MHz)

-97 LTE-FDD B28A (10 MHz)

-95 LTE-FDD B28B(10 MHz)

-95 LTE-TDD B41 (10 MHz)

-95 Frequency GSM850 EGSM900 DCS1800 PCS1900 WCDMA B1 WCDMA B2 WCDMA B4 WCDMA B5 WCDMA B8

-109

-108

-107

-107

-109

-109

-109

-109.5

-109 LTE-FDD B1 (10 MHz)

-97

-97

-97

-97

-97

-98

-98

-98

-97

-97

-96

-109

-109

-108.5

-108

-109

-97

-99.5

-99

-99.5

-99

-100

-100

-99.5

-100

-98.5

-98.5

-98

-110

-110

-110

-110.5

-110.5

-100

-93.3 dBm

-94.3 dBm

-93.3 dBm

-96.3 dBm

-96.3 dBm

-96.3 dBm

-96.3 dBm

-93.8 dBm

-94.8 dBm

-94.8 dBm

-94.3 dBm

-102.4 dBm

-102.4 dBm

-102.4 dBm

-102.4 dBm

-106.7 dBm

-106.7 dBm

-104.7 dBm

-104.7 dBm

-104.7 dBm

-96.3 dBm Table 48: SC606T-EM RF Receiving Sensitivity Receive Sensitivity (Typ.) Primary Diversity SIMO 3GPP (SIMO) SC606T_Series_Hardware_Design 100 / 116 Smart Module Series SC606T Series Hardware Design LTE-FDD B2 (10 MHz)

-97

-97 LTE-FDD B3 (10 MHz)

-96.5

-96.5 LTE-FDD B8 (10 MHz)

-97.5

-100.5

-93.3 dBm LTE-FDD B4 (10 MHz)

-97 LTE-FDD B5 (10 MHz)

-97.5 LTE-FDD B7 (10 MHz)

-96 LTE-FDD B20 (10 MHz)

-96.5 LTE-FDD B28A (1 0MHz)

-97 LTE-FDD B28B (10 MHz)

-97 LTE-TDD B38 (10 MHz)

-96.5

-96 LTE-TDD B40 (10 MHz)

-96.5 LTE-TDD B41 (10 MHz)

-96.5 Table 49: SC606T-NAD RF Receiving Sensitivity LTE-FDD B2 (10 MHz)

-97 LTE-FDD B4 (10 MHz)

-97 LTE-FDD B5 (10 MHz)

-98 LTE-FDD B7 (10 MHz)

-96 LTE-FDD B12 (10 MHz)

-96 LTE-FDD B13 (10 MHz)

-95.5 LTE-FDD B14 (10 MHz)

-97 LTE-FDD B17 (10 MHz)

-96 LTE-FDD B25 (10 MHz)

-97

-97

-98

-96

-97.5

-97.5

-96.5

-95.5

-95.5

-95.5

-97

-96.5

-97.5

-96

-97.5

-97.5

-97

-97

-97

-100

-99

-100

-100

-99

-100

-99.5

-99

-99

-99

-99

-99.5

-98.5

-100

-98

-98.5

-98

-99

-98

-99

-94.3 dBm

-93.3 dBm

-96.3 dBm

-94.3 dBm

-94.3 dBm

-93.3 dBm

-94.8 dBm

-94.8 dBm

-96.3 dBm

-96.3 dBm

-94.3 dBm

-94.3 dBm

-96.3 dBm

-94.3 dBm

-94.3 dBm

-93.3 dBm

-93.3 dBm

-93.3 dBm

-93.3 dBm

-92.8 dBm Frequency 3GPP (SIMO) Primary Diversity SIMO Receive Sensitivity (Typ.) SC606T_Series_Hardware_Design 101 / 116 Smart Module Series SC606T Series Hardware Design LTE-FDD B26 (10 MHz)

-97.5 LTE-FDD B66 (10 MHz)

-97 LTE-FDD B71 (10 MHz)

-96.5 LTE-TDD B41 (10 MHz)

-96

-98

-96.5

-96.5

-96

-99.5

-98.5

-99

-98

-93.8 dBm

-95.8 dBm

-93.5 dBm

-94.3 dBm 7.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that are typically applied to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling, and operation of any application that incorporates the module. The following table shows the electrostatic discharge characteristics of the module. Table 50: ESD Characteristics (Temperature: 25 C, Humidity: 45 %) Test Points Contact Discharge Air Discharge Unit VBAT, GND

+/-5 All Antenna Interfaces

+/-5 Other Interfaces

+/-0.5

+/-10

+/-10

+/-1 kV kV kV SC606T_Series_Hardware_Design 102 / 116 Smart Module Series SC606T Series Hardware Design 8 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimension tolerances are 0.05 mm unless otherwise specified. 8.1. Mechanical Dimensions of the Module Figure 42: Top and Side Dimensions (Unit: mm) SC606T_Series_Hardware_Design 103 / 116 Side viewTop viewPin1 Smart Module Series SC606T Series Hardware Design Figure 43: Bottom Dimensions (Perspective View) The package warpage level of the module conforms to JEITA ED-7306 standard. NOTE SC606T_Series_Hardware_Design 104 / 116 Smart Module Series SC606T Series Hardware Design 8.2. Recommended Footprint Figure 44: Recommended Footprint (Perspective View) NOTES on the host PCB. 1. For easy maintenance of the module, keep about 3 mm between the module and other components 2. All RESERVED pins should be kept open and MUST NOT be connected to ground. SC606T_Series_Hardware_Design 105 / 116 Smart Module Series SC606T Series Hardware Design 8.3. Top and Bottom Views of the Module Figure 45: Top and Bottom Views NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. SC606T_Series_Hardware_Design 106 / 116 Smart Module Series SC606T Series Hardware Design 9 Storage, Manufacturing and Packaging 9.1. Storage The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 5 C and the relative humidity 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. should be 3560%. 3. The floor life of the module is 168 hours 1) in a plant where the temperature is 23 5 C and relative humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10 % (e.g. a drying cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement above occurs;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

All modules must be soldered to PCB within 24 hours after the baking, otherwise they should be put in a dry environment such as in a drying oven. 5. SC606T_Series_Hardware_Design 107 / 116 Smart Module Series SC606T Series Hardware Design NOTES 1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the module to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60%, It is recommended to start the solder reflow process within 24 hours after the package is removed. And do not remove the packages of tremendous modules if they are not ready for soldering. 3. Please take the module out of the packaging and put it on high-temperature resistant fixtures before the baking. If shorter baking time is desired, please refer to IPC/JEDEC J-STD-033 for the baking procedure. 9.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.180.20 mm. It is recommended to slightly reduce the amount of solder paste for LGA pads, thus avoiding short-circuit. For more details, please refer to document [4]. It is suggested that the peak reflow temperature is 238 C to 246 C, and the absolute maximum reflow temperature is 245 C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 46: Recommended Reflow Soldering Thermal Profile SC606T_Series_Hardware_Design 108 / 116 Temp. (C)Reflow ZoneSoak Zone246200220238CDBA150100Max slope: 1 to 3C/sCooling down slope: -1.5 to -3C/sMax slope: 2 to 3C/s Factor Soak Zone Max slope Reflow Zone Max slope Reflow time (D: over 220C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle NOTES Smart Module Series SC606T Series Hardware Design Table 51: Recommended Thermal Profile Parameters Soak time (between A and B: 150C and 200C) 70120 s Recommendation 13 C/s 23 C/s 4570 s 238 C to 246 C

-1.5 to -3 C/s 1 1. During manufacturing and soldering, or any other processes that may contact the module directly, NEVER wipe the modules shielding can with organic solvents, such as acetone, ethyl alcohol, isopropyl alcohol, trichloroethylene, etc. Otherwise, the shielding can may become rusted. 2. The shielding can for the module is made of Cupro-Nickel base material. It is tested that after 12 hours Neutral Salt Spray test, the laser engraved label information on the shielding can is still clearly identifiable and the QR code is still readable, although white rust may be found. If a conformal coating is necessary for the module, do NOT use any coating material that may chemically react with the PCB or shielding cover, and prevent the coating material from flowing into the module 3. 9.3. Packaging SC606T series module is packaged in tape and reel carriers. Each reel is 330 mm in diameter and contains 200 modules. The following figures show the package details, measured in mm. SC606T_Series_Hardware_Design 109 / 116 Smart Module Series SC606T Series Hardware Design Figure 47: Tape Dimensions Figure 48: Reel Dimensions Table 52: Reel Packaging Model Name MOQ for MP Minimum Package: 200 pcs Minimum Package 4 = 800 pcs SC606T series 200 Size: 398 mm 383 mm 83 mm N.W: 1.92 kg G.W: 3.67 kg Size: 420 mm 350 mm 405 mm N.W: 8.18 kg G.W: 15.18 kg SC606T_Series_Hardware_Design 110 / 116 Smart Module Series SC606T Series Hardware Design 10 Appendix A References Table 53: Related Documents SN Document Name Description

[1]

Quectel_Smart_EVB-G2_User_Guide EVB User Guide for SC606T Series

[2]

Quectel_SC606T_Series_GPIO_Configuration GPIO Configuration of SC606T Series

[3]

Quectel_RF_Layout_Application_Note RF Layout Application Note

[4]

Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide

[5]

Quectel_SC606T_Series_Reference_Design Reference Design for SC606T Series Table 54: Terms and Abbreviations Abbreviation Description ADC AMR BLE bps BR CA CS CSD CSI CTS DIP Analog-to-Digital Converter Adaptive Multi-rate Bluetooth Low Energy Bits per Second Basic Rate Carrier Aggregation Coding Scheme Circuit Switched Data Channel State Information Clear to Send Dual In-line Package SC606T_Series_Hardware_Design 111 / 116 Smart Module Series SC606T Series Hardware Design DL DRX DSP ECM EDR EFR EGSM ERM eSCO ESD ESR FEM FM FR GPS GPU GSM HR HSDPA HSPA IQ ISP LCC Downlink Discontinuous Reception Digital Signal Processor Electret Condenser Microphone Enhanced Data Rate Enhanced Full Rate Electrostatic Discharge Equivalent Series Resistance Front-End Module Frequency Modulation Full Rate Extended GSM900 band (includes standard GSM900 band) Eccentric Rotating Mass Extended Synchronous Connection Oriented Global Positioning System Graphics Processing Unit Global System for Mobile Communications Half Rate High Speed Down Link Packet Access High Speed Packet Access Inphase and Quadrature Image Signal Processing Leadless Chip Carrier (package) GLONASS Globalnaya Navigazionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System GMSK Gaussian Minimum Shift Keying SC606T_Series_Hardware_Design 112 / 116 Smart Module Series SC606T Series Hardware Design LTE-TDD Long-Term Evolution Time-Division Duplex LCD LCM LED LGA LNA LRA MAC MCS MEMS MIMO MIPI MO MP MT OTG PCB PDU PHY PMI PMU PSK QAM QPSK RF Liquid Crystal Display LCD Module Light Emitting Diode Land Grid Array Low Noise Amplifier Linear Resonant Actuator Medium Access Control Modulation and Coding Scheme Micro-Electro-Mechanical System Multiple Input Multiple Output Mobile Industry Processor Interface Mobile Originated/Origination Megapixel Mobile Terminal/Termination On-The-Go Printed Circuit Board Protocol Data Unit Physical Power Management Interface Power Management Unit Phase Shift Keying Quadrature Amplitude Modulation Quadrature Phase Shift Keying Radio Frequency SC606T_Series_Hardware_Design 113 / 116 Smart Module Series SC606T Series Hardware Design RGB RH RHCP RTC RTS Rx SCO SMS SPI STA TDD TE TP TX UART UL UMTS

(U)SIM VI VIHmin VILmax Vmax Vmin Vnom VO Right Hand Circularly Polarized Red-Green-Blue Relative Humidity Real Time Clock Request to Send Receive Synchronous Connection Oriented Short Message Service Serial Peripheral Interface Station Time Division Distortion Terminal Equipment Touch Panel Transmitting Direction Universal Asynchronous Receiver & Transmitter Uplink Universal Mobile Telecommunications System

(Universal) Subscriber Identity Module Voltage Input Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Maximum Voltage Value Minimum Voltage Value Nominal Voltage Value Voltage Output SC606T_Series_Hardware_Design 114 / 116 Smart Module Series SC606T Series Hardware Design WCDMA Wideband Code Division Multiple Access Minimum Output High Level Voltage Value Maximum Output Low Level Voltage Value Voltage Standing Wave Ratio Wireless Local Area Network White Light-Emitting Diode WUXGA Widescreen Ultra Extended Graphics Array VOHmin VOLmax VSWR WLAN WLED SC606T_Series_Hardware_Design 115 / 116 Smart Module Series SC606T Series Hardware Design 11 Appendix B GPRS Coding Schemes Table 55: Description of Different Coding Schemes Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits Data Rate Kb/s Radio Block excl.USF and BCS 181 268 CS-1 CS-2 CS-3 CS-4 2/3 3/4 1/2 3 3 40 4 456 0 3 6 16 4 588 132 3 6 312 16 4 676 220 15.6 9.05 13.4 1 3 12 428 16

456 21.4 SC606T_Series_Hardware_Design 116 / 116 Smart Module Series SC606T Series Hardware Design 12 Appendix C GPRS Multi-slot Classes Thirty-three classes of GPRS multi-slot modes are defined for MS in GPRS specifications. The multi-slot class varies from product to product, and determines the maximum achievable data rates in both uplink and downlink directions. The numbers in the column of active slots are the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 56: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 1 1 2 1 2 2 3 1 2 2 3 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA SC606T_Series_Hardware_Design 117 / 116 Smart Module Series SC606T Series Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 SC606T_Series_Hardware_Design 118 / 116 Smart Module Series SC606T Series Hardware Design 13 Appendix D EDGE Modulation and Coding Schemes Table 57: EDGE Modulation and Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK C B A C B A B A A 8.80 kbps 17.60 kbps 35.20 kbps 11.2 kbps 22.4 kbps 44.8 kbps 14.8 kbps 29.6 kbps 59.2 kbps 17.6 kbps 35.2 kbps 70.4 kbps 22.4 kbps 44.8 kbps 89.6 kbps 29.6 kbps 59.2 kbps 118.4 kbps 44.8 kbps 89.6 kbps 179.2 kbps 54.4 kbps 108.8 kbps 217.6 kbps 59.2 kbps 118.4 kbps 236.8 kbps Coding Schemes MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 SC606T_Series_Hardware_Design 119 / 116

 

 

 

 

 

 

Label location Label Location DQUWUECTrEee SC606T-NAD Q1-AXXXX NA SCB06TNADNA-E53-UGADA FCC ID:XMR2021SC606TNAD IC:10224A-21SC606TNAD SN:XXXXXXXXXXXXXXX IMEI: XXXXXXXXXXXXXXX

 

 

QUECTEL SC606T-NAD Q1-AXXXX NA SC606TNADNA-E53-UGADA FCC ID:XMR2021SC606T NAD IC: 10224A-215C606T NAD ON: XXXXXXXXXXXXKXX IMEI: XXXXXXXXXXXAXKX

 

 

 

 

 

 

RF_160, Issue 04 Quectel Wireless Solutions Co., Ltd. Declaration of Authorization We Name: Quectel Wireless Solutions Co., Ltd. Address: Building 5, Shanghai Business Park PhaseIII (Area B),No.1016 Tianlin Road, Minhang District City: Shanghai Country: China Declare that:

Name Representative of agent: Well Wei Agent Company name: SGS-CSTC Standards Technical Services Co., Ltd. Suzhou Branch Address: South of No. 6 Plant, No. 1, Runsheng Road ,Suzhou Industrial Park, Suzhou Area, China

(Jiangsu) Pilot Free Trade Zone City: Suzhou Country: China is authorized to apply for Certification of the following product(s):

Product description: LTE Module Type designation: SC606T-NAD Trademark: Quectel on our behalf. Date:

City:

Name:

Function:

Jean hu (2) Manager. Shanghai 2022/01/04 Signature:

Notes:

(1): Required for FCC application

(2): For FCC it must be the Grantee Code owner or the authorized agent.

 

 

 

 

 

 

 

 

 

 

Quectel Wireless Solutions Co., Ltd. Request for Class II Permissive Change FCC IDXMR2021SC606TNAD Date2022-01-16 TOFederal Communication Commission Please be notified that wethe undersigned(Quectel Wireless Solutions Co., Ltd.) declare that the reasons for this Class II permissive change are as below The main change of software is disabled WCDMA and voice part. Apart from software disabling, there are no other changes. FVIN(SC606TNADNAR09A01) is novel and unique. Sincerely, Jean hu Manager

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Quectel Wireless Solutions Co., Ltd. January 10, 2022 Federal Communications Commission Authorization & Evaluation Division 7435 Oakland Mills Road Columbia, MD 21046 RE: CHANGE IN IDENTIFICATION OF EQUIPMENT Dear Sir or Madam:

Original FCC ID: XMR2020SC606NA Original Model: SC606T-NA Original Grant Date: 2020-10-28 New FCC ID: XMR2021SC606TNAD Model: SC606T-NAD We, Quectel Wireless Solutions Co., Ltd., hereby request a new FCC ID as established in 47CFR2.933(b) for a currently approved device. This request is to establish the new FCC ID: XMR2021SC606TNAD. The equipment is only differ on model name, there is no change in the design, circuitry, or construction, and the original test results continue to be representative of and applicable to the equipment. If you have any questions, please contact Rolando Torricella via phone +8602150086326 / 800 or email at jean.hu@quectel.com Sincerely, Jean Hu Manager