FCC ID: XMR201911SC20AL Smart Module

 

SC20 Hardware Design Smart LTE Module Series Rev: SC20_Hardware_Design_V1.0 Date: 2019-12-03 www.quectel.com Smart LTE Module Series SC20 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters:

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http://www.quectel.com/support/technical.htm Or email to: support@quectel.com GENERAL NOTES QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE FORBIDDEN WITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright Quectel Wireless Solutions Co., Ltd. 2019. All rights reserved. SC20_Hardware_Design 1 / 130 Smart LTE Module Series SC20 Hardware Design About the Document History Revision Date Author Description 1.0 2019-12-03 Tony GAO Initial SC20_Hardware_Design 2 / 130 Smart LTE Module Series SC20 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index ................................................................................................................................................... 6 Figure Index ................................................................................................................................................. 8 1 Introduction ........................................................................................................................................ 13 Safety Information.................................................................................................................... 13 1.1. 2 Product Concept ................................................................................................................................ 15 2.1. General Description ................................................................................................................. 15 Key Features ........................................................................................................................... 18 2.2. Functional Diagram ................................................................................................................. 21 2.3. 2.4. Evaluation Board ..................................................................................................................... 22 3.5. 3 Application Interfaces ....................................................................................................................... 23 3.1. General Description ................................................................................................................. 23 3.2. Pin Assignment ........................................................................................................................ 24 Pin Description ......................................................................................................................... 25 3.3. 3.4. Power Supply ........................................................................................................................... 36 3.4.1. Power Supply Pins ......................................................................................................... 36 3.4.2. Decrease Voltage Drop .................................................................................................. 36 3.4.3. Reference Design for Power Supply .............................................................................. 37 Turn on and off Scenarios ....................................................................................................... 38 3.5.1. Turn on Module Using the PWRKEY ............................................................................. 38 3.5.2. Turn off Module .............................................................................................................. 40 VRTC Interface ........................................................................................................................ 40 3.6. Power Output ........................................................................................................................... 41 3.7. 3.8. Battery Charge and Management ........................................................................................... 42 3.9. USB Interface .......................................................................................................................... 43 3.10. UART Interfaces ...................................................................................................................... 45 3.11.

(U)SIM Interfaces..................................................................................................................... 47 3.12. SD Card Interface .................................................................................................................... 49 3.13. GPIO Interfaces ....................................................................................................................... 51 3.14. SPI Interface ............................................................................................................................ 53 3.15. I2C Interfaces .......................................................................................................................... 54 3.16. ADC Interfaces ........................................................................................................................ 54 3.17. Motor Drive Interface ............................................................................................................... 55 3.18. LCM Interface .......................................................................................................................... 56 3.19. Touch Panel Interface .............................................................................................................. 58 3.20. Camera Interfaces ................................................................................................................... 59 3.20.1. Rear Camera Interface................................................................................................... 59 SC20_Hardware_Design 3 / 130 Smart LTE Module Series SC20 Hardware Design 3.20.2. Front Camera Interface .................................................................................................. 61 3.20.3. Design Considerations ................................................................................................... 63 3.21. Sensor Interfaces..................................................................................................................... 64 3.22. Audio Interfaces ....................................................................................................................... 65 3.22.1. Reference Circuit Design for Microphone Interfaces ..................................................... 66 3.22.2. Reference Circuit Design for Receiver Interface ........................................................... 66 3.22.3. Reference Circuit Design for Headphone Interface ....................................................... 67 3.22.4. Reference Circuit Design for Loudspeaker Interface..................................................... 67 3.22.5. Audio Interfaces Design Considerations........................................................................ 67 3.23. Emergency Download Interface .............................................................................................. 68 4 Wi-Fi and BT ....................................................................................................................................... 69 4.1. Wi-Fi Overview ........................................................................................................................ 69 4.1.1. Wi-Fi Performance ......................................................................................................... 69 BT Overview ............................................................................................................................ 70 4.2. 5 GNSS ................................................................................................................................................... 72 5.1. GNSS Performance ................................................................................................................. 72 5.2. GNSS RF Design Guidelines .................................................................................................. 72 6 Antenna Interfaces ............................................................................................................................. 74 6.1. Main/Rx-diversity Antenna Interfaces ...................................................................................... 74 6.1.1. Operating Frequency ..................................................................................................... 74 6.1.2. Main and Rx-diversity Antenna Interfaces Reference Design ....................................... 78 6.1.3. Reference Design of RF Layout..................................................................................... 78 6.2. Wi-Fi/BT Antenna Interface ..................................................................................................... 80 6.3. GNSS Antenna Interface ......................................................................................................... 81 6.3.1. Recommended Circuit for Passive Antenna .................................................................. 82 6.3.2. Recommended Circuit for Active Antenna ..................................................................... 82 Antenna Installation ................................................................................................................. 83 6.4.1. Antenna Requirements .................................................................................................. 83 6.4.2. Recommended RF Connector for Antenna Installation ................................................. 84 6.4. 7 Electrical, Reliability and Radio Characteristics ............................................................................ 86 Absolute Maximum Ratings ..................................................................................................... 86 7.1. 7.2. Power Supply Ratings ............................................................................................................. 86 7.3. Charging Performance Specifications ..................................................................................... 87 7.4. Operation and Storage Temperatures ..................................................................................... 88 7.5. Current Consumption .............................................................................................................. 88 7.6. RF Output Power ................................................................................................................... 103 7.7. RF Receiving Sensitivity ........................................................................................................ 105 Electrostatic Discharge .......................................................................................................... 108 7.8. 8 Mechanical Dimensions .................................................................................................................. 110 8.1. Mechanical Dimensions of the Module.................................................................................. 110 8.2. Recommended Footprint ....................................................................................................... 112 8.3. Top and Bottom Views of the Module .................................................................................... 113 SC20_Hardware_Design 4 / 130 Smart LTE Module Series SC20 Hardware Design 9 Storage, Manufacturing and Packaging ........................................................................................ 114 9.1. Storage .................................................................................................................................. 114 9.2. Manufacturing and Soldering ................................................................................................ 115 9.3. Packaging .............................................................................................................................. 117 10 Appendix A References ................................................................................................................... 119 11 Appendix B GPRS Coding Schemes ............................................................................................. 122 12 Appendix C GPRS Multi-slot Classes ............................................................................................ 123 13 Appendix D EDGE Modulation and Coding Schemes ................................................................. 125 SC20_Hardware_Design 5 / 130 Smart LTE Module Series SC20 Hardware Design Table Index TABLE 1: SC20-CE R1.1 FREQUENCY BANDS .............................................................................................. 15 TABLE 2: SC20-EL FREQUENCY BANDS ....................................................................................................... 16 TABLE 3: SC20-AL FREQUENCY BANDS ....................................................................................................... 16 TABLE 4: SC20-AUL FREQUENCY BANDS .................................................................................................... 17 TABLE 5: SC20-JL FREQUENCY BANDS ........................................................................................................ 17 TABLE 7: SC20 KEY FEATURES ..................................................................................................................... 18 TABLE 8: I/O PARAMETERS DEFINITION ....................................................................................................... 25 TABLE 9: PIN DESCRIPTION ........................................................................................................................... 25 TABLE 10: POWER DESCRIPTION ................................................................................................................. 41 TABLE 11: PIN DEFINITION OF USB INTERFACE .......................................................................................... 43 TABLE 12: USB TRACE LENGTH INSIDE THE MODULE............................................................................... 45 TABLE 13: PIN DEFINITION OF UART INTERFACES ..................................................................................... 45 TABLE 14: PIN DEFINITION OF (U)SIM INTERFACES ................................................................................... 47 TABLE 15: PIN DEFINITION OF SD CARD INTERFACE ................................................................................ 49 TABLE 16: SD CARD TRACE LENGTH INSIDE THE MODULE ...................................................................... 50 TABLE 17: PIN DEFINITION OF GPIO INTERFACES ..................................................................................... 51 TABLE 18: PIN DEFINITION OF SPI INTERFACE ........................................................................................... 53 TABLE 19: PIN DEFINITION OF I2C INTERFACES ......................................................................................... 54 TABLE 20: PIN DEFINITION OF ADC INTERFACES ....................................................................................... 54 TABLE 21: PIN DEFINITION OF MOTOR DRIVE INTERFACE ....................................................................... 55 TABLE 22: PIN DEFINITION OF LCM INTERFACE ......................................................................................... 56 TABLE 23: PIN DEFINITION OF TOUCH PANEL INTERFACE ....................................................................... 58 TABLE 24: PIN DEFINITION OF REAR CAMERA INTERFACE ...................................................................... 59 TABLE 25: PIN DEFINITION OF FRONT CAMERA INTERFACE .................................................................... 61 TABLE 26: MIPI TRACE LENGTH INSIDE THE MODULE............................................................................... 63 TABLE 27: PIN DEFINITION OF SENSOR INTERFACES ............................................................................... 64 TABLE 28: PIN DEFINITION OF AUDIO INTERFACES ................................................................................... 65 TABLE 29: WI-FI TRANSMITTING PERFORMANCE ....................................................................................... 69 TABLE 30: WI-FI RECEIVING PERFORMANCE .............................................................................................. 69 TABLE 31: BT DATA RATE AND VERSION ...................................................................................................... 71 TABLE 32: BT TRANSMITTING AND RECEIVING PERFORMANCE ............................................................. 71 TABLE 33: GNSS PERFORMANCE ................................................................................................................. 72 TABLE 34: PIN DEFINITION OF MAIN/RX-DIVERSITY ANTENNA INTERFACES ......................................... 74 TABLE 35: SC20-CE R1.1 MODULE OPERATING FREQUENCIES ............................................................... 74 TABLE 36: SC20-EL MODULE OPERATING FREQUENCIES ........................................................................ 75 TABLE 37: SC20-AL MODULE OPERATING FREQUENCIES ........................................................................ 76 TABLE 38: SC20-AUL MODULE OPERATING FREQUENCIES ...................................................................... 76 TABLE 39: SC20-JL MODULE OPERATING FREQUENCIES ......................................................................... 77 TABLE 41: PIN DEFINITION OF WI-FI/BT ANTENNA INTERFACE ................................................................ 80 TABLE 42: WI-FI/BT FREQUENCY................................................................................................................... 81 TABLE 43: PIN DEFINITION OF GNSS ANTENNA INTERFACE ..................................................................... 81 SC20_Hardware_Design 6 / 130 Smart LTE Module Series SC20 Hardware Design TABLE 44: GNSS FREQUENCY ....................................................................................................................... 82 TABLE 45: ANTENNA REQUIREMENTS .......................................................................................................... 83 TABLE 46: ABSOLUTE MAXIMUM RATINGS .................................................................................................. 86 TABLE 47: SC20 MODULE POWER SUPPLY RATINGS ................................................................................. 86 TABLE 48: CHARGING PERFORMANCE SPECIFICATIONS ......................................................................... 87 TABLE 49: OPERATION AND STORAGE TEMPERATURES .......................................................................... 88 TABLE 50: SC20-CE R1.1 CURRENT CONSUMPTION .................................................................................. 88 TABLE 51: SC20-EL CURRENT CONSUMPTION ........................................................................................... 91 TABLE 52: SC20-AL CURRENT CONSUMPTION ........................................................................................... 94 TABLE 53: SC20-AUL CURRENT CONSUMPTION ......................................................................................... 97 TABLE 54: SC20-JL CURRENT CONSUMPTION .......................................................................................... 101 TABLE 56: RF OUTPUT POWER ................................................................................................................... 103 TABLE 57: SC20-CE R1.1 RF RECEIVING SENSITIVITY ............................................................................. 105 TABLE 58: SC20-EL RF RECEIVING SENSITIVITY ...................................................................................... 106 TABLE 59: SC20-AL RF RECEIVING SENSITIVITY ...................................................................................... 106 TABLE 60: SC20-AUL RF RECEIVING SENSITIVITY .................................................................................... 107 TABLE 61: SC20-JL RF RECEIVING SENSITIVITY ....................................................................................... 108 TABLE 63: ESD CHARACTERISTICS ( TEMPERATURE: 25C, HUMIDITY: 45%) ...................................... 109 TABLE 64: RECOMMENDED THERMAL PROFILE PARAMETERS .............................................................. 115 TABLE 65: REEL PACKAGING ........................................................................................................................ 118 TABLE 66: RELATED DOCUMENTS ............................................................................................................... 119 TABLE 67: TERMS AND ABBREVIATIONS ..................................................................................................... 119 TABLE 68: DESCRIPTION OF DIFFERENT CODING SCHEMES ................................................................ 122 TABLE 69: GPRS MULTI-SLOT CLASSES .................................................................................................... 123 TABLE 70: EDGE MODULATION AND CODING SCHEMES ......................................................................... 125 SC20_Hardware_Design 7 / 130 Smart LTE Module Series SC20 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 22 FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 24 FIGURE 3: VOLTAGE DROP SAMPLE ............................................................................................................. 36 FIGURE 4: STAR STRUCTURE OF THE POWER SUPPLY............................................................................ 37 FIGURE 5: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 37 FIGURE 6: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................... 38 FIGURE 7: TURN ON THE MODULE USING KEYSTROKE ........................................................................... 39 FIGURE 8: TIMING OF TURNING ON MODULE ............................................................................................. 39 FIGURE 9: TIMING OF TURNING OFF MODULE ........................................................................................... 40 FIGURE 10: RTC POWERED BY COIN CELL ................................................................................................. 40 FIGURE 11: RTC POWERED BY CAPACITOR ................................................................................................ 41 FIGURE 12: REFERENCE DESIGN FOR BATTERY CHARGING CIRCUIT ................................................... 42 FIGURE 13: USB INTERFACE REFERENCE DESIGN (OTG IS NOT SUPPORTED) ................................... 44 FIGURE 14: USB INTERFACE REFERENCE DESIGN (OTG IS SUPPORTED) ............................................ 44 FIGURE 15: REFERENCE CIRCUIT WITH LEVEL TRANSLATOR CHIP (FOR UART1) ............................... 46 FIGURE 16: RS-232 LEVEL MATCH CIRCUIT (FOR UART1) ......................................................................... 46 FIGURE 17: REFERENCE CIRCUIT FOR (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR

................................................................................................................................................................... 48 FIGURE 18: REFERENCE CIRCUIT FOR (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR

................................................................................................................................................................... 48 FIGURE 19: REFERENCE CIRCUIT FOR SD CARD INTERFACE ................................................................. 50 FIGURE 20: REFERENCE CIRCUIT FOR MOTOR CONNECTION ................................................................ 55 FIGURE 21: REFERENCE CIRCUIT DESIGN FOR LCM INTERFACE ........................................................... 57 FIGURE 22: REFERENCE DESIGN FOR EXTERNAL BACKLIGHT DRIVING CIRCUIT ............................... 58 FIGURE 23: REFERENCE CIRCUIT DESIGN FOR TP INTERFACE .............................................................. 59 FIGURE 24: REFERENCE CIRCUIT DESIGN FOR REAR CAMERA INTERFACE ........................................ 61 FIGURE 25: REFERENCE CIRCUIT DESIGN FOR FRONT CAMERA INTERFACE ...................................... 62 FIGURE 26: REFERENCE CIRCUIT DESIGN FOR MICROPHONE INTERFACES ....................................... 66 FIGURE 27: REFERENCE CIRCUIT DESIGN FOR RECEIVER INTERFACE ................................................ 66 FIGURE 28: REFERENCE CIRCUIT DESIGN FOR HEADPHONE INTERFACE ........................................... 67 FIGURE 29: REFERENCE CIRCUIT DESIGN FOR LOUDSPEAKER INTERFACE ....................................... 67 FIGURE 30: REFERENCE CIRCUIT DESIGN FOR EMERGENCY DOWNLOAD INTERFACE ..................... 68 FIGURE 31: REFERENCE CIRCUIT DESIGN FOR MAIN AND RX-DIVERSITY ANTENNA INTERFACES .. 78 FIGURE 32: MICROSTRIP DESIGN ON A 2-LAYER PCB ............................................................................... 79 FIGURE 33: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB ........................................................... 79 FIGURE 34: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)

................................................................................................................................................................... 79 FIGURE 35: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND)

................................................................................................................................................................... 80 FIGURE 36: REFERENCE CIRCUIT DESIGN FOR WI-FI/BT ANTENNA ....................................................... 81 FIGURE 37: REFERENCE CIRCUIT DESIGN FOR GNSS PASSIVE ANTENNA ........................................... 82 SC20_Hardware_Design 8 / 130 Smart LTE Module Series SC20 Hardware Design FIGURE 38: REFERENCE CIRCUIT DESIGN FOR GNSS ACTIVE ANTENNA ............................................. 83 FIGURE 39: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ................................................ 84 FIGURE 40: MECHANICALS OF U.FL-LP CONNECTORS ............................................................................. 85 FIGURE 41: SPACE FACTOR OF MATED CONNECTORS (UNIT: MM) ......................................................... 85 FIGURE 42: MODULE TOP AND SIDE DIMENSIONS .................................................................................... 110 FIGURE 43: MODULE BOTTOM DIMENSIONS (TOP VIEW) ........................................................................ 111 FIGURE 44: RECOMMENDED FOOTPRINT (TOP VIEW) ............................................................................. 112 FIGURE 45: TOP VIEW OF THE MODULE ..................................................................................................... 113 FIGURE 46: BOTTOM VIEW OF THE MODULE ............................................................................................. 113 FIGURE 47: RECOMMENDED REFLOW SOLDERING THERMAL PROFILE ............................................... 115 FIGURE 48: TAPE DIMENSIONS .................................................................................................................... 117 FIGURE 49: REEL DIMENSIONS .................................................................................................................... 117 SC20_Hardware_Design 9 / 130 Smart LTE Module Series SC20 Hardware Design OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed. End Product Labeling When the module is installed in the host device, the FCC/IC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text:

Contains FCC ID: XMR201911SC20AL Contains IC: 10224A-2019SC20AL The FCC ID/IC ID can be used only when all FCC/IC compliance requirements are met. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

SC20_Hardware_Design 10 / 130 Smart LTE Module Series SC20 Hardware Design

(1) This device may not cause harmful interference, and

(2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:

- Reorient or relocate the receiving antenna.

- Increase the separation between the equipment and receiver.

- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

- Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Industry Canada Statement This device complies with Industry Canadas licence-exempt RSSs. Operation is subject to the following two conditions:

(1) This device may not cause interference; and

(2) This device must accept any interference, including interference that may cause undesired operation of the device. Le prsent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorise aux deux conditions suivantes:

(1) l'appareil ne doit pas produire de brouillage, et

(2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement."

The device could automatically discontinue transmission in case of absence of information to transmit, or operational failure. Note that this is not intended to prohibit transmission of control or signaling information or the use of repetitive codes where required by the technology. The device for operation in the band 51505250 MHz is only for indoor use to reduce the potential for harmful interference to co-channel mobile satellite systems;

The maximum antenna gain permitted for devices in the bands 52505350 MHz and 54705725 MHz shall comply with the e.i.r.p. limit; and The maximum antenna gain permitted for devices in the band 57255825 MHz shall comply with the e.i.r.p. limits specified for point-to-point and non point-to-point operation as appropriate. SC20_Hardware_Design 11 / 130 Smart LTE Module Series SC20 Hardware Design L'appareil peut interrompre automatiquement la transmission en cas d'absence d'informations transmettre ou de panne oprationnelle. Notez que ceci n'est pas destin interdire la transmission d'informations de contrle ou de signalisation ou l'utilisation de codes rptitifs lorsque cela est requis par la technologie. Le dispositif utilis dans la bande 5150-5250 MHz est rserv une utilisation en intrieur afin de rduire le risque de brouillage prjudiciable aux systmes mobiles par satellite dans le mme canal;

Le gain d'antenne maximal autoris pour les dispositifs dans les bandes 5250-5350 MHz et 5470-5725 MHz doit tre conforme la norme e.r.p. limite; et Le gain d'antenne maximal autoris pour les appareils de la bande 5725-5825 MHz doit tre conforme la norme e.i.r.p. les limites spcifies pour un fonctionnement point point et non point point, selon le cas. CAN ICES-3(B)/ NMB-3(B) Radiation Exposure Statement This equipment complies with FCC/IC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator &

your body. SC20_Hardware_Design 12 / 130 Smart LTE Module Series SC20 Hardware Design 1 Introduction This document defines the SC20 module and its air interfaces and hardware interfaces which are connected with customers application. This document can help customers quickly understand module interface specifications, electrical and mechanical details as well as other related information of SC20 module. Associated with application note and user guide, customers can use SC20 module to design and set up mobile applications easily. 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating SC20 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be given to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If the device offers an Airplane Mode, then it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on boarding the aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. SC20_Hardware_Design 13 / 130 Smart LTE Module Series SC20 Hardware Design Cellular terminals or mobiles operating over radio signals and cellular network cannot be guaranteed to connect in all possible conditions (for example, with unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such conditions, please remember using emergency call. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as your phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc. SC20_Hardware_Design 14 / 130 Smart LTE Module Series SC20 Hardware Design 2 Product Concept 2.1. General Description SC20 is a series of Smart LTE module based on Qualcomm platform and Linux operating system, and provides industrial grade performance. Its general features are listed below:

Support worldwide LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, TD-SCDMA, EVDO/CDMA, EDGE and GPRS coverage. Integrate GPS/GLONASS/BeiDou satellite positioning systems. Support short-range wireless communication via Wi-Fi 802.11a/b/g/n and BT4.2 LE. Support multiple audio and video codecs. Built-in high performance AdrenoTM 304 graphics processing unit. Enable smooth play of 720P videos. Provide multiple audio and video input/output interfaces as well as abundant GPIO interfaces. SC20 module contains six variants: SC20-CE R1.1, SC20-EL, SC20-AL, SC20-AUL and SC20-JL. The following tables show the supported frequency bands and network standards of SC20. Table 1: SC20-CE R1.1 Frequency Bands Type LTE-FDD LTE-TDD WCDMA TD-SCDMA EVDO/CDMA GSM Wi-Fi 802.11a/b/g/n Frequency B1/B3/B5/B8 B38/B39/B40/B41 B1/B8 B34/B39 BC0 900/1800MHz 2400MHz~2482MHz 5180MHz~5825MHz SC20_Hardware_Design 15 / 130 Smart LTE Module Series SC20 Hardware Design BT GNSS Type LTE-FDD LTE-TDD WCDMA GSM BT4.2 LE GNSS Type LTE-FDD WCDMA GSM BT4.2 LE GNSS Table 2: SC20-EL Frequency Bands Wi-Fi 802.11a/b/g/n Table 3: SC20-AL Frequency Bands Wi-Fi 802.11a/b/g/n 2402MHz~2480MHz GPS: 1575.42MHz1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz2.046MHz Frequency B1/B3/B5/B7/B8/B20 B38/B40/B41 B1/B5/B8 850/900/1800/1900MHz 2400MHz~2482MHz 5180MHz~5825MHz 2402MHz~2480MHz GPS: 1575.42MHz1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz2.046MHz Frequency B2/B4/B5/B7/B12/B13/B25/B26 B1/B2/B4/B5/B8 850/1900MHz 2400MHz~2482MHz 5180MHz~5825MHz 2402MHz~2480MHz GPS: 1575.42MHz1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz2.046MHz SC20_Hardware_Design 16 / 130 Smart LTE Module Series SC20 Hardware Design Table 4: SC20-AUL Frequency Bands Wi-Fi 802.11a/b/g/n Table 5: SC20-JL Frequency Bands Type LTE-FDD LTE-TDD WCDMA GSM BT4.2 LE GNSS Type LTE-FDD LTE-TDD WCDMA BT4.2 LE GNSS Wi-Fi 802.11a/b/g/n Frequency B1/B3/B5/B7/B8/B28 B40 B1/B2/B5/B8 850/900/1800/1900MHz 2400MHz~2482MHz 5180MHz~5825MHz 2402MHz~2480MHz GPS: 1575.42MHz1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz2.046MHz Frequency B1/B3/B8/B18/B19/B26 B41 B1/B6/B8/B19 2400MHz~2496MHz 5180MHz~5825MHz 2402MHz~2480MHz GPS: 1575.42MHz1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz2.046MHz SC20 is an SMD type module, which can be embedded into applications through its 210-pin pads including 146 LCC signal pads and 64 LGA pads. With a compact profile of 40.5mm 40.5mm 2.8mm, SC20 can meet almost all requirements for M2M applications such as CPE, wireless POS, smart metering, router, data card, automotive, smart phone, digital signage, alarm panel, security and industry PDA, etc. SC20_Hardware_Design 17 / 130 Smart LTE Module Series SC20 Hardware Design 2.2. Key Features The following table describes the detailed features of SC20 module. Table 6: SC20 Key Features Feature Details Modem DSP QDSP6 v5 core up to 691.2MHz 768KB L2 cache Memory 8GB eMMC+8Gb LPDDR3 Operating System Linux Power Supply Supply voltage: 3.5V~4.2V Typical supply voltage: 3.8V Applications Processor ARM Cortex-A7 microprocessor cores (quad-core) up to 1.1GHz 512KB L2 cache Transmitting Power LTE Features UMTS Features Class 4 (33dBm2dB) for GSM850 and EGSM900 Class 1 (30dBm2dB) for DCS1800 and PCS1900 Class E2 (27dBm3dB) for GSM850 and EGSM900 8-PSK Class E2 (26dBm3dB) for DCS1800 and PCS1900 8-PSK Class 3 (24dBm+1/-3dB) for WCDMA bands Class 3 (24dBm+3/-1dB) for EVDO/CDMA BC0 Class 2 (24dBm+1/-3dB) for TD-SCDMA bands Class 3 (23dBm2dB) for LTE-FDD bands Class 3 (23dBm2dB) for LTE-TDD bands Support 3GPP R8 Cat.4 FDD and TDD Support 1.4 to 20 MHz RF bandwidth Support DL 2 x 2 MIMO FDD: Max 150Mbps (DL)/Max 50Mbps (UL) TDD: Max 130Mbps (DL)/Max 30Mbps (UL) Support 3GPP R8 DC-HSDPA/HSPA+/HSDPA/HSUPA/WCDMA Support 16-QAM, 64-QAM and QPSK modulation DC-HSDPA: Max 42Mbps (DL) HSUPA: Max 5.76Mbps (UL) WCDMA: Max 384Kbps (DL)/Max 384Kbps (UL) TD-SCDMA Features Support CCSA Release 3 Max 4.2Mbps (DL)/Max 2.2Mbps (UL) CDMA2000 Features Support 3GPP2 CDMA2000 1X Advanced, CDMA2000 1x EV-DO Rev.A EVDO: Max 3.1Mbps (DL)/Max 1.8Mbps (UL) 1X Advanced: Max 307.2Kbps (DL)/Max 307.2Kbps (UL) SC20_Hardware_Design 18 / 130 GSM Features SMS LCM Interface Camera Interfaces Video Codec Smart LTE Module Series SC20 Hardware Design R99:

CSD: 9.6kbps, 14.4kbps GPRS:

Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 85.6Kbps (UL)/Max 107Kbps (DL) EDGE:

Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max 236.8Kbps (UL)/Max 296Kbps (DL) WLAN Features Support 2.4GHz and 5GHz frequency bands Support 802.11a/b/g/n, maximally up to 150Mbps Support AP mode Bluetooth Feature BT4.2 LE GNSS Features GPS/GLONASS/BeiDou Text and PDU mode Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default 4-lane MIPI_DSI, up to 1.5Gbps per lane Support WVGA (2-lane MIPI_DSI), up to 720p (4-lane MIPI_DSI) 24bit color depth Use MIPI_CSI, up to 1.5Gbps per lane Support two cameras:

2-lane MIPI_CSI for rear camera, max pixel up to 8MP 1-lane MIPI_CSI for front camera, max pixel up to 2MP Video encoding:

H.264 BP/MP 720p @30fps MPEG-4 SP/H.263 P0 WVGA @30fps VP8 WVGA @30fps Video decoding:

H.264 BP/MP/HP 1080P @30fps MPEG-4 SP/ASP 1080P @30fps DivX 4x/5x/6x 1080P @30fps H.263 P0 WVGA @30fps VP8 1080P @30 fps

(HEVC) H.265 MP 8 bit 1080P @30fps Audio Interfaces Audio input:

Two analog microphone inputs, integrating internal bias voltage SC20_Hardware_Design 19 / 130 Smart LTE Module Series SC20 Hardware Design Audio output:

Class AB stereo headphone output Class AB earpiece differential output Class D speaker differential amplifier output Audio Codec HR, FR, EFR, AMR, AMR-WB Compliant with USB 2.0 specification; the data transfer rate can reach up to 480Mbps Used for AT command communication, data transmission, software debugging and firmware upgrade Support USB OTG (Need additional 5V power supply chip) USB Driver: Support Windows XP, Windows Vista, Windows 7/8/8.1 Two (U)SIM interfaces Support USIM/SIM card: 1.8V and 2.95V Support Dual SIM Dual Standby (supported by default) Two UART interfaces: UART1 and UART2 UART1: 4-wire UART interface with RTS/CTS hardware flow control;

baud rate up to 3.75Mbps UART2: 2-wire UART interface used for debugging Motor Drive Interface Drive ERM motor Support SD 3.0, 4-bit SDIO Support hot-plug Three I2C interfaces Used for peripherals such as camera, sensor, touch panel, etc. Support three ADC interfaces Used for input voltage sense, battery temperature detection and gen eral-purpose ADC Real Time Clock Supported Antenna Interfaces Main antenna, DRX antenna, GNSS antenna and Wi-Fi/BT antenna Physical Characteristics Temperature Range Size: (40.50.15) (40.50.15) (2.80.2)mm Package: LCC Weight: approx. 9.8g Operating temperature range: -35C~+65C 1) Extended temperature range: -40C~+75C 2) Storage temperature range: -40C ~ +90C Firmware Upgrade Over USB interface RoHS All hardware components are fully compliant with EU RoHS directive USB Interface

(U)SIM Interfaces UART Interfaces SD Card Interface I2C Interfaces ADC Interfaces NOTES SC20_Hardware_Design 20 / 130 Smart LTE Module Series SC20 Hardware Design 1. 2. 1) Within operation temperature range, the module is 3GPP compliant. 2) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to the normal operating temperature levels, the module will meet 3GPP specifications again. 2.3. Functional Diagram The following figure shows a block diagram of SC20 and illustrates the major functional parts. Power management Radio frequency Baseband LPDDR3+eMMC flash Peripheral interfaces

--USB interface

--UART interfaces

--(U)SIM interfaces

--SD card interface

--GPIO interfaces

--I2C interfaces

--ADC interfaces

--LCM (MIPI) interface

--Touch panel interface

--CAM (MIPI) interfaces

--Audio interfaces SC20_Hardware_Design 21 / 130 Smart LTE Module Series SC20 Hardware Design Figure 1: Functional Diagram 2.4. Evaluation Board In order to help customers to develop applications with SC20, Quectel supplies the evaluation board

(SMART EVB), USB to RS232 converter cable, USB data cable, power adapter, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [1]. SC20_Hardware_Design 22 / 130 VBAT_RF VBAT_BB USB_VBUS VRTC PWRKEY RESET_N AUDIO ADCs ANT_MAIN ANT_GNSS ANT_DRX ANT_WIFI/BT PAM SAW Switch Diplex 2.4G SAW 5G SAW Duplexs LNA APT PA GSM TX SAW SAW WCN TRX_CLK Transceiver LPDDR3+

eMMC PMIC 19.2M XO Baseband LDO Output LCM

(MIPI) TP CAM

(MIPI) USB (U)SIM UART I2C GPIOs SD Card Smart LTE Module Series SC20 Hardware Design 3 Application Interfaces 3.1. General Description SC20 is an SMD type module with 146 LCC pads and 64 LGA pads. The following chapters provide the detailed description of pins/interfaces listed below. Power supply VRTC interface USB interface UART interfaces

(U)SIM interfaces SD card interface GPIO interfaces SPI interface I2C interfaces ADC interfaces Motor drive interface LCM interface Touch panel interface Camera interfaces Sensor interfaces Audio interfaces Emergency download interface SC20_Hardware_Design 23 / 130 Smart LTE Module Series SC20 Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of SC20 module. Figure 2: Pin Assignment (Top View) SC20_Hardware_Design 24 / 130 F R _ T A B V 6 4 1 F R _ T A B V 5 4 1 D N G 4 4 1 D N G 3 4 1 S U B V _ B S U S U B V _ B S U 2 4 1 1 4 1 D N G 0 4 1 T E D _ S H L _ H P H D N G _ H P H R _ H P H D N G M R E H T _ T A B V S N S _ T A B V X R D _ T N A D N G D N G C D A 5 8 V 2 _ 7 1 O D L 9 3 1 8 3 1 7 3 1 6 3 1 5 3 1 4 3 1 3 3 1 2 3 1 1 3 1 0 3 1 9 2 1 8 2 1 8 V 1 _ 6 O D L 7 1 _ O P G I 6 1 _ O P G I D N G S S N G _ T N A 8 _ O P G I D N G 5 2 1 4 2 1 3 2 1 2 2 1 1 2 1 0 2 1 9 1 1 C T R V 6 2 1 0 1 _ O P G I 1 1 _ O P G I 5 9 _ O P G I 7 1 1 6 1 1 5 1 1 9 _ O P G I 8 1 1 Y E K R W P 4 1 1 9 9 _ O P G I 3 1 1 8 V 1 _ 5 O D L 8 5 _ O P G I 2 1 1 1 1 1 8 7 1 7 7 1 2 7 1 1 7 1 L E S _ E G R A H C 7 2 1 4 7 1 2 9 1 8 0 2 1 0 2 5 8 1 9 5 1 3 7 1 1 9 1 7 0 2 2 0 2 6 8 1 0 6 1 6 7 1 4 9 1 0 1 2 9 9 1 3 8 1 7 5 1 5 7 1 3 9 1 9 0 2 0 0 2 4 8 1 8 5 1 149 179 195 206 190 168 150 180 196 205 189 167 151 181 197 204 188 166 152 182 198 203 187 165 5 5 1 6 5 1 1 6 1 2 6 1 170 169 164 163 110 109 108 107 106 105 104 103 102 101 100 102 99 GPIO_96 GPIO_65 GPIO_36 GPIO_94 GPIO_98 GPIO_0 GPIO_110 GPIO_97 GPIO_68 GPIO_69 GPIO_89 GPIO_88 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 GPIO_92 GPIO_31 KEY_VOL_DOWN KEY_VOL_UP UART2_TX UART2_RX SENSOR_I2C_SDA SENSOR_I2C_SCL GPIO_32 GND GND ANT_MAIN GND GND CAM_I2C_SDA CAM_I2C_SCL CAM1_PWD CAM1_RST CAM0_PWD CAM0_RST GND ANT_WIFI/BT GND CAM1_MCLK CAM0_MCLK VBAT_BB VBAT_BB GND MIC1P MIC_GND MIC2P GND EARP EARN SPKP SPKN GND USB_DM USB_DP GND USB_ID USIM2_DETECT USIM2_RST USIM2_CLK USIM2_DATA USIM2_VDD USIM1_DETECT USIM1_RST USIM1_CLK USIM1_DATA USIM1_VDD GND VIB_DRV PWM TP_INT TP_RST SD_LDO12 GPIO_23 UART1_TX UART1_RX UART1_CTS UART1_RTS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 147 148 153 154 RESERVED POWER 8 3 9 3 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 4 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 5 0 6 1 6 2 6 3 6 4 6 5 6 6 6 7 6 8 6 9 6 0 7 1 7 2 7 3 7 K L C _ D S D M C _ D S 1 1 O D L _ D S 0 A T A D _ D S 1 A T A D _ D S 2 A T A D _ D S 3 A T A D _ D S T E D _ D S T O O B _ B S U L C S _ C 2 I _ P T A D S _ C 2 I _ P T D N G E T _ D C L T S R _ D C L D N G I N K L C _ S D _ P M I I I P K L C _ S D _ P M I I I N 0 N L _ S D _ P M I I I P 0 N L _ S D _ P M I I I N 1 N L _ S D _ P M I I I P 1 N L _ S D _ P M I I I N 2 N L _ S D _ P M I I I P 2 N L _ S D _ P M I I I N 3 N L _ S D _ P M I I I P 3 N L _ S D _ P M I I I N K L C _ 0 S C _ P M I I I P K L C _ 0 S C _ P M I I I N 0 N L _ 0 S C _ P M I I I P 0 N L _ 0 S C _ P M I I I N 1 N L _ 0 S C _ P M I I I P 1 N L _ 0 S C _ P M I I D N G I N K L C _ 1 S C _ P M I I I P K L C _ 1 S C _ P M I I I N 0 N L _ 1 S C _ P M I I I P 0 N L _ 1 S C _ P M I I SDIO USB

(U)SIM GND UART AUDIO OTHERS GPIO ANT TP LCM CAMERA Smart LTE Module Series SC20 Hardware Design 3.3. Pin Description The following tables show the SC20s pin definition. Table 7: I/O Parameters Definition Type IO DI DO PI PO AI AO OD Description Bidirectional Digital input Digital output Power input Power output Analog input Analog output Open drain The following tables show the SC20s pin definition and electrical characteristics. Table 8: Pin Description Power Supply Pin Name Pin No. I/O Description VBAT_BB 1, 2 PI VBAT_RF 145, 146 PI VRTC 126 PI/PO DC Characteristics Comment Vmax=4.2V Vmin=3.5V Vnorm=3.8V Vmax=4.2V Vmin=3.5V Vnorm=3.8V It must be able to provide sufficient current up to 3.0A. It is suggested to use a zener diode for voltage stabilization. VOmax=3.2V VI=2.0V~3.25V If unused, keep this pin open. Power supply for modules baseband part. Power supply for modules RF part. Power supply for internal RTC circuit. LDO5_1V8 111 PO 1.8V output power supply Vnorm=1.8V IOmax=20mA Power supply for external GPIOs pull up circuits and level SC20_Hardware_Design 25 / 130 Smart LTE Module Series SC20 Hardware Design LDO6_1V8 125 PO 1.8V output power supply Vnorm=1.8V IOmax=100mA LDO17_2V85 129 PO 2.85V output power supply Vnorm=2.85V IOmax=300mA SD_LDO11 38 PO Power supply for SD card. Vnorm=2.95V IOmax=600mA SD_LDO12 32 PO 1.8V/2.95V output power supply Vnorm=2.95V IOmax=50mA Power supply for SDs pull up circuits. shift circuit. Power supply for peripherals. 2.2uF~4.7uF capacitor is recommended to be applied to the LDO6_1V8 pin. If unused, keep this pin open. Power supply for peripherals. 2.2uF~4.7uF capacitor is recommended to be applied to the LDO17_2V85 pin. If unused, keep this pin open. GND GND 3, 7, 12, 15, 27, 51, 62, 69, 76, 78, 85, 86, 88, 89, 120, 122, 130, 132, 135, 140, 143, 144, 147~150, 160~178, 180~182, 184~186, 188~189, 192~193, SC20_Hardware_Design 26 / 130 Smart LTE Module Series SC20 Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment 198~200, 201~208, 209 Audio Interfaces MIC1P MIC_GND MIC2P EARP EARN SPKP SPKN 4 5 6 8 9 10 11 AI AI AO AO AO AO HPH_R 136 AO HPH_GND 137 AI HPH_L 138 AO USB Interface Microphone positive input for channel 1 MIC reference ground Microphone positive input for channel 2 Earpiece positive output Earpiece negative output Speaker positive output Speaker negative output Headphone right channel output Headphone virtual ground Headphone left channel output Headset insertion detection HS_DET 139 AI High level by default. Pin Name Pin No. I/O Description Comment USB_VBUS 141, 142 PI USB power supply USB_DM USB_DP 13 14 IO IO USB differential data bus (minus) USB differential data bus (plus) DC Characteristics Vmax=6.3V Vmin=4.35V Vnorm=5.0V Compliant with USB 2.0 standard specification. Used for USB 5V power input and USB detection. Require differential impedance of 90. SC20_Hardware_Design 27 / 130 Smart LTE Module Series SC20 Hardware Design USB_ID 16 AI USB ID detection High level by default.

(U)SIM Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment USIM2_ DETECT 17 DI

(U)SIM2 card hot-plug detection VILmax=0.63V VIHmin=1.17V Active Low. External pull-up resistor is required. If unused, keep this pin open. USIM2_RST 18 DO USIM2_CLK 19 DO

(U)SIM2 card reset signal

(U)SIM2 card clock signal USIM2_DATA 20 IO

(U)SIM2 card data signal USIM2_VDD 21 PO

(U)SIM2 card power supply VOLmax=0.4V VOHmin=

0.8USIM2_VDD VOLmax=0.4V VOHmin=

0.8USIM2_VDD VILmax=

0.2USIM2_VDD VIHmin=

0.7USIM2_VDD VOLmax=0.4V VOHmin=

0.8USIM2_VDD For 1.8V (U)SIM:

Vmax=1.85V Vmin=1.75V For 2.95V (U)SIM:

Vmax=3.1V Vmin=2.8V Either 1.8V or 2.95V

(U)SIM card is supported by the module automatically. Active low. External pull-up resistor is required. If unused, keep this pin open. USIM1_ DETECT 22 DI

(U)SIM1 card hot-plug detection VILmax=0.63V VIHmin=1.17V USIM1_RST 23 DO USIM1_CLK 24 DO

(U)SIM1 card reset signal

(U)SIM1 card clock signal VOLmax=0.4V VOHmin=

0.8USIM1_VDD VOLmax=0.4V VOHmin=

0.8USIM1_VDD USIM1_DATA 25 IO

(U)SIM1 card data signal VILmax=

0.2USIM1_VDD SC20_Hardware_Design 28 / 130 Smart LTE Module Series SC20 Hardware Design VIHmin=

0.7USIM1_VDD VOLmax=0.4V VOHmin=

0.8USIM1_VDD For 1.8V (U)SIM:

Vmax=1.85V Vmin=1.75V For 2.95V (U)SIM:

Vmax=3.1V Vmin=2.8V USIM1_VDD 26 PO

(U)SIM1 card power supply UART Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment UART1_TX 34 DO UART1 transmit data VOLmax=0.45V VOHmin=1.35V UART1_RX 35 DI UART1 receive data VILmax=0.63V VIHmin=1.17V UART1_CTS 36 DI UART1 clear to send VILmax=0.63V VIHmin=1.17V UART1_RTS 37 DO UART1 request to send VOLmax=0.45V VOHmin=1.35V UART2_RX 93 DI UART2_TX 94 DO SD Card Interface UART2 receive data. Debug port by default. UART2 transmit data. Debug port by default. VILmax=0.63V VIHmin=1.17V VOLmax=0.45V VOHmin=1.35V Either 1.8V or 2.95V

(U)SIM card is supported by the module automatically 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description Comment SD_CLK 39 DO High speed digital clock signal of SD card DC Characteristics 1.8V SD card:

VOLmax=0.45V VOHmin=1.4V SC20_Hardware_Design 29 / 130 Smart LTE Module Series SC20 Hardware Design 2.95V SD card:

VOLmax=0.37V VOHmin=2.2V 1.8V SD card:

VILmax=0.58V VIHmin=1.27V VOLmax=0.45V VOHmin=1.4V 2.95V SD card:

VILmax=0.73V VIHmin=1.84V VOLmax=0.37V VOHmin=2.2V 1.8V SD card:

VILmax=0.58V VIHmin=1.27V VOLmax=0.45V VOHmin=1.4V 2.95V SD card:

VILmax=0.73V VIHmin=1.84V VOLmax=0.37V VOHmin=2.2V DC Characteristics VILmax=0.63V VIHmin=1.17V SD_CMD 40 IO Command signal of SD card High speed bidirectional digital signal lines of SD card SD_DATA0 41 IO SD_DATA1 42 IO SD_DATA2 43 SD_DATA3 44 SD_DET 45 IO IO DI Touch Panel (TP) Interface SD card insertion detection VILmax=0.63V VIHmin=1.17V Active low Pin Name Pin No. I/O Description Comment TP_INT 30 DI Interrupt signal of TP 1.8V power domain. TP_RST 31 DO Reset signal of TP VOLmax=0.45V VOHmin=1.35V 1.8V power domain. Active low. TP_I2C_SCL 47 OD I2C clock signal of TP 1.8V power domain. TP_I2C_SDA 48 OD I2C data signal of TP 1.8V power domain. SC20_Hardware_Design 30 / 130 Smart LTE Module Series SC20 Hardware Design LCM Interface Pin Name Pin No. I/O Description Comment PWM 29 DO Adjust the backlight brightness. PWM control signal. DC Characteristics VOLmax=0.45V VOHmax=VBAT_B B LCD_RST 49 DO LCD reset signal VOLmax=0.45V VOHmin=1.35V 1.8V power domain. Active low. LCD_TE 50 DI LCD tearing effect signal VILmax=0.63V VIHmin=1.17V 1.8V power domain. MIPI_DSI_ CLKN MIPI_DSI_ CLKP MIPI_DSI_ LN0N MIPI_DSI_ LN0P MIPI_DSI_ LN1N MIPI_DSI_ LN1P MIPI_DSI_ LN2N MIPI_DSI_ LN2P MIPI_DSI_ LN3N MIPI_DSI_ LN3P 52 53 54 55 56 57 58 59 60 61 AO AO AO AO AO MIPI DSI clock signal

(negative) MIPI DSI clock signal

(positive) MIPI DSI data signal

(negative) MIPI DSI data signal

(positive) MIPI DSI data signal

(negative) AO MIPI DSI data signal

(positive) AO MIPI DSI data signal

(negative) AO MIPI DSI data signal

(positive) AO MIPI DSI data signal

(negative) AO MIPI DSI data signal

(positive) Camera Interfaces Pin Name Pin No I/O Description DC Characteristics Comment MIPI_CSI0_ CLKN 63 AI MIPI CSI clock signal

(negative) SC20_Hardware_Design 31 / 130 Smart LTE Module Series SC20 Hardware Design MIPI_CSI0_ CLKP MIPI_CSI0_ LN0N MIPI_CSI0_ LN0P MIPI_CSI0_ LN1N MIPI_CSI0_ LN1P MIPI_CSI1_ CLKN MIPI_CSI1_ CLKP MIPI_CSI1_ LN0N MIPI_CSI1_ LN0P 64 65 66 67 68 70 71 72 73 AI AI AI AI AI AI AI AI AI MIPI CSI clock signal

(positive) MIPI CSI data signal

(negative) MIPI CSI data signal

(positive) MIPI CSI data signal

(negative) MIPI CSI data signal

(positive) MIPI CSI clock signal

(negative) MIPI CSI clock signal

(positive) MIPI CSI data signal

(negative) MIPI CSI data signal

(positive) CAM0_MCLK 74 DO Clock signal of rear camera VOLmax=0.45V VOHmin=1.35V CAM1_MCLK 75 DO Clock signal of front camera VOLmax=0.45V VOHmin=1.35V CAM0_RST 79 DO Reset signal of rear camera VOLmax=0.45V VOHmin=1.35V CAM0_PWD 80 DO Power down signal of rear camera VOLmax=0.45V VOHmin=1.35V CAM1_RST 81 DO Reset signal of front camera VOLmax=0.45V VOHmin=1.35V CAM1_PWD 82 DO Power down signal of front camera VOLmax=0.45V VOHmin=1.35V CAM_I2C_ SCL 83 OD I2C clock signal of camera 1.8V power domain. SC20_Hardware_Design 32 / 130 Smart LTE Module Series SC20 Hardware Design CAM_I2C_ SDA 84 OD I2C data signal of camera 1.8V power domain. Keypad Interfaces Pin Name Pin No I/O Description DC Characteristics Comment PWRKEY 114 DI Turn on/off the module VILmax=0.63V VIHmin=1.17V Pull-up to 1.8V internally, active low. KEY_VOL_ UP KEY_VOL_ DOWN 95 96 SENSOR_I2C Interfaces DI Volume up VILmax=0.63V VIHmin=1.17V If unused, keep this pin open. DI Volume down VILmax=0.63V VIHmin=1.17V If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment SENSOR_I2C _SCL SENSOR_I2C _SDA 91 92 ADC Interfaces OD OD I2C clock signal for external sensor I2C data signal for external sensor ADC 128 AI General purpose ADC VBAT_SNS 133 AI Input voltage sense Pin Name Pin No. I/O Description DC Characteristics Comment VBAT_ THERM 134 AI Battery temperature detection RF Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment ANT_MAIN 87 IO Main antenna ANT_DRX 131 AI Diversity antenna ANT_GNSS 121 AI GNSS antenna ANT_WIFI/BT 77 IO Wi-Fi/BT antenna 1.8V power domain. 1.8V power domain. Maximum voltage not exceeding 1.7V. Maximum input voltage is 4.5V. 50 impedance SC20_Hardware_Design 33 / 130 Smart LTE Module Series SC20 Hardware Design Pin Name Pin No. I/O Description DC Characteristics Comment GPIO Interfaces GPIO_23 GPIO_32 GPIO_31 GPIO_92 GPIO_88 1) 33 90 97 98 99 IO GPIO IO GPIO IO GPIO IO GPIO IO GPIO GPIO_89 100 IO GPIO GPIO_69 101 IO GPIO GPIO_68 1) 102 IO GPIO GPIO_97 103 IO GPIO GPIO_110 104 IO GPIO GPIO_0 105 IO GPIO GPIO_98 106 IO GPIO GPIO_94 107 IO GPIO GPIO_36 108 IO GPIO GPIO_65 109 IO GPIO GPIO_96 110 IO GPIO GPIO_58 112 IO GPIO GPIO_99 113 IO GPIO GPIO_95 115 IO GPIO GPIO_11 116 IO GPIO GPIO_10 117 IO GPIO GPIO_9 GPIO_8 118 119 IO GPIO IO GPIO VILmax=0.63V VIHmin=1.17V VOLmax=0.45V VOHmin=1.4V 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. 1.8V power domain. Can be multiplexed into SPI_CLK. Can be multiplexed into SPI_CS_N. Can be multiplexed into SPI_MISO. Can be multiplexed SC20_Hardware_Design 34 / 130 Smart LTE Module Series SC20 Hardware Design GPIO_16 123 IO GPIO GPIO_17 124 IO GPIO Other Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment VIB_DRV 28 PO Motor drive Imax=0~175mA Vmax=1.2V~3.1V RESET_N 2) 179 DI Reset the module USB_BOOT 46 DI Force the module to boot from USB port CHARGE_ SEL 127 DI Used for charger selection Reserved Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment into SPI_MOSI. 1.8V power domain. 1.8V power domain. Connected to the negative terminal of the motor. Disabled by default and can be enabled through software configuration. Set USB_BOOT to high level will force the module to enter into emergency download mode. If it is open, internal charger is used. If it is connected to GND, external charger is used. RESERVED Reserved pins Keep these pins open. 151, 152, 153, 154, 155, 156, 157, 158, 159, 183, 187, 190, 191, 194, 195, 196, 197, 199, 202, 203, 204, 205, 206, 207, 210 SC20_Hardware_Design 35 / 130 Smart LTE Module Series SC20 Hardware Design 1) GPIO_68 and GPIO_88 cannot be pulled up during start-up. 2) RESET_N is disabled by default and can be enabled through software configuration. NOTES 1. 2. 3.4. Power Supply 3.4.1. Power Supply Pins SC20 provides two VBAT_RF pins and two VBAT_BB pins for connecting with an external power supply. The VBAT_RF pins are used for the RF part of the module and the VBAT_BB pins are used for the baseband part of the module. 3.4.2. Decrease Voltage Drop The power supply range of the module is 3.5V~4.2V, and the recommended value is 3.8V. The power supply performance, such as load capacity, voltage ripple, etc. directly influences the modules performance and stability. Under ultimate conditions, the transient peak current of the module may surge up to 3A. If the supply voltage is not enough, there will be voltage drops, and if the voltage drops below 3.1V, the module will be turned off automatically. Therefore, please make sure the input voltage will never drop below 3.1V. Figure 3: Voltage Drop Sample To decrease voltage drop, a bypass capacitor of about 100F with low ESR (ESR=0.7) should be used, and a multi-layer ceramic chip capacitor (MLCC) should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT_BB/RF pins. The main power supply from an external application SC20_Hardware_Design 36 / 130 3A Input current Voltage 3.8V 3.1V Smart LTE Module Series SC20 Hardware Design has to be a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 1.5mm, and the width of VBAT_RF trace should be no less than 2mm. In principle, the longer the VBAT trace is, the wider it will be. In addition, in order to get a stable power source, it is suggested to use a 0.5W zener diode and place it as close to the VBAT_BB/RF pins as possible to increase voltage surge withstand capability. The following figure shows the star structure of the power supply. Figure 4: Star Structure of the Power Supply 3.4.3. Reference Design for Power Supply The power design for the module is very important, as the performance of module largely depends on the power source. The power supply of SC20 should be able to provide sufficient current up to 3A at least. If the voltage drop between the input and output is not too high, it is suggested to use an LDO to supply power for the module. If there is a big voltage difference between the input source and the desired output

(VBAT), a buck converter is preferred to be used as the power supply. The following figure shows a reference design for +5V input power source which adopts an LDO

(MIC29302WU) from MICREL. The typical output voltage is 3.8V and the maximum load current is 3.0A. Figure 5: Reference Circuit of Power Supply SC20_Hardware_Design 37 / 130 VBAT

D1 C1 C2 C3 C4 C5 C6 C7 C8

100uF 100nF 33pF 10pF 100uF 100nF 33pF 10pF VBAT_RF VBAT_BB Module DC_IN VBAT MIC29302WU U1 2 IN N E OUT 4 J D A D N G 1 3 5 C1 470uF C2 R1 100nF 51K R2 100K 1%

R3 47K 1%

R4 470R C3 C4 470uF 100nF Smart LTE Module Series SC20 Hardware Design NOTES 1. It is suggested that customers should switch off the power supply for module in abnormal state, and then switch on the power to restart the module. 2. The module supports battery charging function by default. If the above power supply design is adopted, please make sure the charging function is disabled by software or connect VBAT to Schottky diode in series to avoid the reverse current to the power supply chip. 3.5. Turn on and off Scenarios 3.5.1. Turn on Module Using the PWRKEY The module can be turned on by driving PWRKEY pin to a low level for at least 1.6s. PWRKEY pin is pulled to 1.8V internally. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. Figure 6: Turn on the Module Using Driving Circuit The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. SC20_Hardware_Design 38 / 130 PWRKEY 1.6s Turn on pulse R1 4.7K Q1 R2 47K Smart LTE Module Series SC20 Hardware Design Figure 7: Turn on the Module Using Keystroke The turning on scenario is illustrated in the following figure. Figure 8: Timing of Turning on Module NOTES shown above. 1. When the module is powered on for the first time, its timing of turning on will be 45ms longer than that 2. Make sure that VBAT is stable before pulling down PWRKEY pin. The recommended time between them is no less than 30ms. PWRKEY pin cannot be pulled down all the time. SC20_Hardware_Design 39 / 130 S1 PWRKEY TVS Close to S1 VBAT (Typ.: 3.8V) PWRKEY 1.6s 173ms 173.5ms LDO5_1V8 LDO6_1V8 LDO17_2V85 438ms Others 40s Active Smart LTE Module Series SC20 Hardware Design 3.5.2. Turn off Module Set the PWRKEY pin low for at least 1s, and then choose to turn off the module when the prompt window comes up. The other way to turn off the module is to drive PWRKEY to a low level for at least 8s. The module will execute forced shutdown. The forced power-down scenario is illustrated in the following figure. Figure 9: Timing of Turning off Module 3.6. VRTC Interface The RTC (Real Time Clock) can be powered by an external power source through VRTC when the module is powered down and there is no power supply for the VBAT. The external power source can be capacitor or rechargeable battery (such as coil cells) according to application demands. The following are some reference circuit designs when an external battery or capacitor is utilized for powering RTC. Figure 10: RTC Powered by Coin Cell SC20_Hardware_Design 40 / 130 VBAT PWRKEY Others

>8s Power down Coin Cell VRTC RTC Core Module Smart LTE Module Series SC20 Hardware Design Figure 11: RTC Powered by Capacitor If RTC is ineffective, it can be synchronized through network after the module is powered on. 2.0V~3.25V input voltage range and 3.0V typical value for VRTC. When VBAT is disconnected, the average consumption is about 5uA. When powered by VBAT, the RTC error is 50ppm. When powered by VRTC, the RTC error is 200ppm. If the rechargeable battery is used, the ESR of the battery should be less than 2K, and it is recommended to use the MS621FE FL11E of SEIKO. If large capacitance capacitor is selected, it is recommended to use a 100uF capacitor with low ESR. The capacitor will be able to power the real-time clock for 45 seconds. 3.7. Power Output SC20 supports output of regulated voltages for peripheral circuits. During application, it is recommended to use parallel capacitors (33pF and 10pF) in the circuit to suppress high frequency noise. Pin Name Default Voltage (V) Driving Current (mA) IDLE Table 9: Power Description LDO5_1V8 LDO6_1V8 LDO17_2V85 SD_LDO12 SD_LDO11 1.8 1.8 2.85 2.95 2.95 USIM1_VDD 1.80/2.95 USIM2_VDD 1.80/2.95 20 100 300 50 600 50 50 KEEP

SC20_Hardware_Design 41 / 130 Large Capacitance Capacitor C VRTC RTC Core Module Smart LTE Module Series SC20 Hardware Design 3.8. Battery Charge and Management SC20 module can recharge batteries. The battery charger in SC20 module supports trickle charging, constant current charging and constant voltage charging modes, which optimize the charging procedure for Li-ion batteries. Trickle charging: There are two steps in this mode. When the battery voltage is below 2.8V, a 90mA trickle charging current is applied to the battery. When the battery voltage is charged up and is between 2.8V and 3.2V, the charging current can be set to 450mA maximally. Constant current mode (CC mode): When the battery is increased to between 3.2V and 4.2V, the system will switch to CC mode. The maximum charging current is 1.44A when adapter is used for battery charging; and the maximum charging current is 450mA while USB charging. Constant voltage mode (CV mode): When the battery voltage reaches the final value 4.2V, the system will switch to CV mode and the charging current will decrease gradually. When the battery level reaches 100%, the charging is completed. SC20 module supports battery temperature detection in the condition that the battery integrates a thermistor (47K 1% NTC thermistor with B-constant of 4050K by default; SDNT1608X473F4050FTF of SUNLORD is recommended) and the thermistor is connected to VBAT_THERM pin. The default battery temperature range is -3.0C~48.5C. If VBAT_THERM pin is not connected, there will be malfunctions such as battery charging failure, battery level display error, etc. A reference design for battery charging circuit is shown as below. Figure 12: Reference Design for Battery Charging Circuit Mobile devices such as mobile phones and handheld POS systems are powered by batteries. When different batteries are utilized, the charging and discharging curve has to be modified correspondingly so as to achieve the best effect. SC20_Hardware_Design 42 / 130 1 2 3 VBAT NTC GND Battery Adapter or USB USB_VBUS VBAT VBAT_SNS R1 0R VBAT_THERM GND Module D1 D2 C1 C2 C3 ESD ESD 100uF 1uF 33pF Smart LTE Module Series SC20 Hardware Design If thermistor is not available in the battery, or adapter is utilized for powering module, then there is only need for VBAT and GND connection. In this case, the system may mistakenly judge that the battery temperature is abnormal, which will cause battery charging failure. In order to avoid this, VBAT_THERM should be connected to GND via a 47K resistor. If VBAT_THERM is unconnected, the system will be unable to detect the battery, making battery cannot be charged. VBAT_SNS pin must be connected. Otherwise, the module will have abnormalities in voltage detection, as well as associated power on/off and battery charging and discharging issues. 3.9. USB Interface SC20 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports high speed (480Mbps) and full speed (12Mbps) modes. The USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. The following table shows the pin definition of USB interface. Table 10: Pin Definition of USB Interface Pin Name Pin No. I/O Description USB_VBUS 141, 142 PI USB power supply Comment 4.35V~6.3V. Typical 5.0V. USB_DM USB_DP USB_ID 13 14 16 IO IO AI USB differential data bus (minus) USB differential data bus (plus) Require differential impedance of 90 USB ID detection High level by default USB_VBUS can be powered by USB power or adapter. It can also be used for detecting USB connection, as well as for battery charging via the internal PMU. The input voltage of power supply ranges from 4.35 to 6.3V, and the typical value is 5V. SC20 module supports charging management for a single Li-ion battery, but varied charging parameters should be set for batteries with varied models or capacities. The module is available a built-in linear-charging circuit which supports maximally 1.44A charging current. The following are two USB interface reference designs for customers to choose from. SC20_Hardware_Design 43 / 130 Smart LTE Module Series SC20 Hardware Design Figure 13: USB Interface Reference Design (OTG is not Supported) Figure 14: USB Interface Reference Design (OTG is Supported) SC20 supports OTG protocol. If OTG function is needed, please refer to the above figure for the reference design. AW3605DNR is a high efficiency DC-DC chip manufactured by AWINIC, and customers can choose according to their own demands. In order to ensure USB performance, please comply with the following principles while designing USB interface. It is important to route the USB signal traces as differential pairs with total grounding. The impedance SC20_Hardware_Design 44 / 130 USB_VUSB USB_DM USB_DP Module C1 D1 D2 D3 100nF ESD ESD ESD 89 D N G D N G 1 2 3 4 5 VUSB USB_DM USB_DP USB_ID GND D N G D N G 6 7 VBAT L1 1.0uH C1 10uF 7 8 6 VOUT VOUT NC 4 5 1 SW VIN EN AW3605DNR D N G A D N G P D N G P U1 2 93 R1 10K C2 22uF/

10V VBAT GPIO USB_VUSB USB_DM USB_DP USB_ID Module 89 D N G D N G 1 2 3 4 5 VUSB USB_DM USB_DP USB_ID GND D N G D N G 6 7 C3 100nF D1 D2 D3 D4 ESD ESD ESD ESD Smart LTE Module Series SC20 Hardware Design of USB differential trace is 90. Keep the ESD protection devices as close as possible to the USB connector. Pay attention to the influence of junction capacitance of ESD protection devices on USB data lines. Typically, the capacitance value should be less than 2pF. Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer with ground shielding on not only upper and lower layer but also right and left sides. Make sure the trace length difference between USB_DM and USB_DP is not exceeding 6.6mm. Table 11: USB Trace Length Inside the Module PIN 13 14 Signal Length (mm) Length Difference (DP-DM) USB_DM USB_DP 29.43 29.36

-0.07 3.10. UART Interfaces The module provides two UART interfaces:

UART1: 4-wire UART interface which supports hardware flow control UART2: 2-wire UART interface and is used for debugging Table 12: Pin Definition of UART Interfaces Pin Name Pin No I/O Description Comment UART1_TX 34 DO UART1 transmit data UART1_RX 35 UART1 receive data UART1_CTS 36 UART1 clear to send UART1_RTS 37 DO UART1 request to send UART2_RX 93 UART2_TX 94 UART2 receive data. Debug port by default. UART2 transmit data. Debug port by default. DI DI DI DO 1.8V power domain. If it is unused, keep it open. 1.8V power domain. If it is unused, keep it open. 1.8V power domain. If it is unused, keep it open. 1.8V power domain. If it is unused, keep it open. 1.8V power domain. If it is unused, keep it open. 1.8V power domain. If it is unused, keep it open. SC20_Hardware_Design 45 / 130 Smart LTE Module Series SC20 Hardware Design UART1 provides 1.8V logic level. A level translator should be used if customers application is equipped with a 3.3V UART interface. A level translator TXS0104PWR provided by Texas Instruments is recommended. The following figure shows the reference design. Figure 15: Reference Circuit with Level Translator Chip (for UART1) The following figure is an example of connection between SC20 and PC. A voltage level translator and a RS-232 level translator chip are also recommended to be added between the module and PC, as these two UART interfaces do not support the RS-232 level, while support the 1.8V CMOS level only. Figure 16: RS-232 Level Match Circuit (for UART1) NOTE UART2 is similar to UART1. Please refer to UART1 reference circuit designs for UART2s. SC20_Hardware_Design 46 / 130 LDO5_1V8 VCCA VCCB VDD_3.3V C1 100pF U1 GND C2 100pF UART1_CTS UART1_RTS UART1_TX UART1_RX OE A1 A2 A3 A4 TXS0104EPWR B1 B2 B3 B4 CTS_3.3V RTS_3.3V TXD_3.3V RXD_3.3V 1.8V 3.3V OE VCCA TXD_1.8V RTS_1.8V VCCB TXD_3.3V RTS_3.3V UART1_TX UART1_RTS UART1_RX UART1_CTS RXD_1.8V CTS_1.8V RXD_3.3V CTS_3.3V GND GND VCC DIN1 DIN2 DIN3 DIN4 DIN5 R1OUTB ROUT1 ROUT2 ROUT3 GND DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 RIN1 RIN2 RIN3 GND RXD CTS TXD RTS 3.3V FORCEON

/FORCEOFF

/INVALID Module TXS0104EPWR SN65C3238 DB-9 Smart LTE Module Series SC20 Hardware Design 3.11. (U)SIM Interfaces SC20 provides 2 (U)SIM interfaces which circuitry meet ETSI and IMT-2000 requirements. Dual SIM Card Dual Standby is supported by default. Both 1.8V and 2.95V (U)SIM cards are supported, and the (U)SIM card interfaces are powered by the internal power supply of SC20 module. Table 13: Pin Definition of (U)SIM Interfaces Pin Name Pin No I/O Description Comment USIM2_DETECT 17 DI

(U)SIM2 card hot-plug detection USIM2_RST DO

(U)SIM2 card reset signal USIM2_CLK DO

(U)SIM2 card clock signal USIM2_DATA IO

(U)SIM2 card data signal USIM2_VDD 21 PO

(U)SIM2 card power supply USIM1_DETECT 22 DI

(U)SIM1 card hot-plug detection USIM1_RST DO

(U)SIM1 card reset signal USIM1_CLK DO

(U)SIM1 card clock signal USIM1_DATA IO

(U)SIM1 card data signal 18 19 20 23 24 25 USIM1_VDD 26 PO

(U)SIM1 card power supply Active Low. External pull-up resistor is required. If unused, keep this pin open. Pull-up to USIM2_VDD with a 10K resistor. Either 1.8V or 2.95V (U)SIM card is supported by the module automatically. Active low. External pull-up resistor is required. If unused, keep this pin open. Pull-up to USIM1_VDD with a 10K resistor. Either 1.8V or 2.95V (U)SIM card is supported by the module automatically. SC20 supports (U)SIM card hot-plug via the USIM_DETECT pin. A reference circuit for (U)SIM interface with an 8-pin (U)SIM card connector is shown below. SC20_Hardware_Design 47 / 130 Smart LTE Module Series SC20 Hardware Design Figure 17: Reference Circuit for (U)SIM Interface with an 8-pin (U)SIM Card Connector If there is no need to use USIM_DETECT, please keep it open. The following is a reference circuit for

(U)SIM interface with a 6-pin (U)SIM card connector. Figure 18: Reference Circuit for (U)SIM Interface with a 6-pin (U)SIM Card Connector In order to ensure good performance and avoid damage of (U)SIM cards, please follow the criteria below in (U)SIM circuit design:

Keep placement of (U)SIM card connector as close to the module as possible. Keep the trace length of (U)SIM card signals as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. A 100nF filter capacitor shall be reserved for USIM_VDD, and its maximum capacitance should not exceed 1uF. The capacitor should be placed near to (U)SIM card. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with ground. USIM_RST also needs ground protection. SC20_Hardware_Design 48 / 130 LD05_1V8 USIM_ VDD R1 100K R2 10K Module USIM_ VDD USIM_ RST USIM_ CLK USIM_ DET R3 R4 22R 22R USIM_ DATA R5 22R C1 100nF

(U)SIM Card Connector VCC RST CLK GND VPP IO C2 C3 C4 33pF 33pF 33pF D1 ESD USIM_VDD R1 10K USIM_VDD USIM_RST USIM_CLK Module 22R R2 R3 22R 22R USIM_DATA R4 C1 100nF

(U)SIM card connector VCC RST CLK GND VPP IO C2 C3 C4 D1 33pF 33pF 33pF ESD Smart LTE Module Series SC20 Hardware Design In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic capacitance not exceeding 50pF. The 22 resistors should be added in series between the module and (U)SIM card so as to suppress EMI spurious transmission and enhance ESD protection. Please note that the (U)SIM peripheral circuit should be close to the (U)SIM card connector. The 33pF capacitors should be added in parallel on USIM_DATA, USIM_CLK and USIM_RST signal lines so as to filter RF interference, and they should be placed as close to the (U)SIM card connector as possible. 3.12. SD Card Interface SC20 module supports SD cards with 4-bit data interfaces or SDIO devices. The pin definition of the SD card interface is shown below. Table 14: Pin Definition of SD Card Interface Pin Name Pin No I/O Description SD_LDO11 38 PO Power supply for SD card Comment Vnorm=2.95V IOmax=600mA Support 1.8V or 2.95V power supply. The maximum drive current is 50mA. Control characteristic impedance as 50. SD_LDO12 32 PO 1.8V/2.95V output power supply SD_CLK SD_CMD 39 40 SD_DATA0 41 SD_DATA1 42 SD_DATA2 43 SD_DATA3 44 I/O I/O I/O I/O DO High speed digital clock signal of SD card I/O Command signal of SD card High speed bidirectional digital signal lines of SD card SD_DET 45 DI SD card insertion detection Active low A reference circuit for SD card interface is shown as below. SC20_Hardware_Design 49 / 130 Smart LTE Module Series SC20 Hardware Design Figure 19: Reference Circuit for SD Card Interface SD_LDO11 is a peripheral driver power supply for SD card. The maximum drive current is approx. 600mA. Because of the high drive current, it is recommended that the trace width is 0.6mm or more. In order to ensure the stability of drive power, a 2.2uF capacitor should be added in parallel near the SD card connector. CMD, CLK, DATA0, DATA1, DATA2 and DATA3 are all high-speed signal lines. In PCB design, please control the characteristic impedance of them to 50, and do not cross with other traces. It is recommended to route the trace on the inner layer of PCB, and keep the same trace length for CLK, CMD, DATA0, DATA1, DATA2 and DATA3. CLK additionally needs ground shielding. Layout guidelines:

Control impedance as 5010%, and ground shielding is required. The total trace length difference between CLK and other signal line traces should not exceed 1mm. Table 15: SD Card Trace Length Inside the Module Pin No. Signal Length (mm) Comment 39 40 41 42 SD_CLK SD_CMD SD_DATA0 SD_DATA1 14.60 14.55 14.53 14.56 SC20_Hardware_Design 50 / 130 120K 33R 33R 33R R7 R8 R9 R10 33R R11 R12 R13 33R 33R 1K SD_DATA2 SD_DATA3 SD_CMD SD_CLK SD_DATA0 SD_DATA1 SD_DET Module LDO5_1V8 SD_LDO12 SD_LDO11 R1 R2 R3 R4 R5 R6 NM_51K NM_51K NM_10K NM_51K NM_51K D1 D2 D3 D4 D5 D6 D7 C1 C2 D8 2.2uF 33pF 1 2 3 4 5 6 7 8 9 P1-DAT2 P2-CD/DAT3 P3-CMD P4-VDD P5-CLK P6-VSS P7-DAT0 P8-DAT1 DETECTIVE 10 11 12 13 GND GND GND GND SD Card Connector Smart LTE Module Series SC20 Hardware Design SD_DATA2 SD_DATA3 14.53 14.57 43 44 30 31 33 34 35 36 37 45 47 48 49 50 74 75 79 80 81 3.13. GPIO Interfaces SC20 has abundant GPIO interfaces with logic level of 1.8V. The pin definition is listed below. Table 16: Pin Definition of GPIO Interfaces PIN Pin Name GPIO Default state Comment TP_INT GPIO_13 B-PD: nppukp 1) Wakeup 2) TP_RST GPIO_12 B-PD: nppukp Wakeup GPIO_23 GPIO_23 B-PD: nppukp UART1_TX GPIO_20 B-PD: nppukp Wakeup UART1_RX GPIO_21 B-PD: nppukp UART1_RX Wakeup UART1_CTS GPIO_111 B-PD: nppukp Wakeup UART1_RTS GPIO_112 B-PD: nppukp Wakeup SD_DET GPIO_38 B-PD: nppukp Wakeup TP_I2C_SCL GPIO_19 B-PD: nppukp TP_I2C_SDA GPIO_18 B-PD: nppukp LCD_RST GPIO_25 B-PD: nppukp Wakeup LCD_TE GPIO_24 B-PD: nppukp CAM0_CLK GPIO_26 B-PD: nppukp CAM1_CLK GPIO_27 B-PD: nppukp CAM0_RST GPIO_35 B-PD: nppukp Wakeup CAM0_PWD GPIO_34 B-PD: nppukp Wakeup CAM1_RST GPIO_28 B-PD: nppukp Wakeup SC20_Hardware_Design 51 / 130 Smart LTE Module Series SC20 Hardware Design 82 83 84 90 91 92 93 94 95 96 97 98 99 CAM1_PWD GPIO_33 B-PD: nppukp CAM_I2C_SCL GPIO_30 B-PD: nppukp CAM_I2C_SDA GPIO_29 B-PD: nppukp GPIO_32 GPIO_32 B-PD: nppukp SENSOR_I2C_SCL GPIO_7 B-PD: nppukp SENSOR_I2C_SDA GPIO_6 B-PD: nppukp UART2_RX GPIO_5 B-PD: nppukp Wakeup UART2_TX GPIO_4 B-PD: nppukp KEY_VOL_UP GPIO_90 B-PD: nppukp Wakeup KEY_VOL_DOWN GPIO_91 B-PD: nppukp Wakeup GPIO_31 GPIO_31 B-PD: nppukp Wakeup GPIO_92 GPIO_92 B-PD: nppukp Wakeup GPIO_88 3) GPIO_88 3) B-PD: nppukp 100 GPIO_89 GPIO_89 B-PD: nppukp 101 GPIO_69 GPIO_69 B-PD: nppukp 102 GPIO_68 3) GPIO_68 3) B-PD: nppukp 103 GPIO_97 GPIO_97 B-PD: nppukp Wakeup 104 GPIO_110 GPIO_110 B-PD: nppukp Wakeup 105 GPIO_0 GPIO_0 B-PD: nppukp 106 GPIO_98 GPIO_98 B-PD: nppukp Wakeup 107 GPIO_94 GPIO_94 B-PD: nppukp Wakeup 108 GPIO_36 GPIO_36 B-PD: nppukp Wakeup 109 GPIO_65 GPIO_65 B-PD: nppukp Wakeup 110 GPIO_96 GPIO_96 B-PD: nppukp Wakeup 112 GPIO_58 GPIO_58 B-PD: nppukp Wakeup SC20_Hardware_Design 52 / 130 NOTES 1. 2. 3. Smart LTE Module Series SC20 Hardware Design 113 GPIO_99 GPIO_99 B-PD: nppukp 115 GPIO_95 GPIO_95 B-PD: nppukp Wakeup 116 GPIO_11 GPIO_11 B-PD: nppukp Wakeup 117 GPIO_10 GPIO_10 B-PD: nppukp 118 GPIO_9 GPIO_9 B-PD: nppukp 119 GPIO_8 GPIO_8 B-PD: nppukp 123 GPIO_16 GPIO_16 B-PD: nppukp 124 GPIO_17 GPIO_17 B-PD: nppukp 1) B: Bidirectional digital with CMOS input. PD: nppukp=default pull-down with programmable options following the colon (:). 2) Wakeup: interrupt pins that can wake up the system. 3) GPIO_68 and GPIO_88 cannot be pulled up during start-up. 3.14. SPI Interface SC20 module provide one SPI interface multiplexed from GPIO interfaces. The interface only supports the master mode. Table 17: Pin Definition of SPI Interface Pin Name Pin No I/O Description Comment GPIO_8 119 GPIO_9 118 IO IO GPIO by default. Can be multiplexed into SPI_MOSI. GPIO by default. Can be multiplexed into SPI_MISO. GPIO by default. Can be multiplexed into SPI_CS_N. Master out slave in of SPI Master in slave out of SPI GPIO_10 117 DO SPI chip select GPIO_11 116 DO GPIO by default. Can be multiplexed into SPI_CLK. SPI clock SC20_Hardware_Design 53 / 130 Smart LTE Module Series SC20 Hardware Design 3.15. I2C Interfaces SC20 module provides three I2C interfaces which only support the master mode. As an open drain output, the I2C interfaces need a pull-up resistor on its external circuit, and the recommended logic level is 1.8V. Table 18: Pin Definition of I2C Interfaces Pin Name Pin No I/O Description Comment TP_I2C_SCL 47 OD I2C clock signal of touch panel TP_I2C_SDA 48 OD I2C data signal of touch panel CAM_I2C_SCL 83 OD I2C clock signal of camera CAM_I2C_SDA 84 OD I2C data signal of camera Used for touch panel Used for camera SENSOR_I2C_ SCL SENSOR_I2C_ SDA 91 92 OD I2C clock signal for external sensor OD I2C data signal for external sensor Used for external sensor 3.16. ADC Interfaces SC20 module provides three analog-to-digital converter (ADC) interfaces, and the pin definition is shown below. Table 19: Pin Definition of ADC Interfaces Pin Name Pin No I/O Description Comment ADC 128 General purpose ADC Max input voltage is 1.7V VBAT_SNS 133 Input voltage sense Max input voltage is 4.5V AI AI VBAT_THERM 134 AI Battery temperature detection The resolution of the ADC is up to 16 bits and the effective resolution is 12 bits. Internal pull-up; externally connect to GND with a 47K NTC thermistor SC20_Hardware_Design 54 / 130 Smart LTE Module Series SC20 Hardware Design When the input voltage exceeds the maximum input voltage of VBAT_SNS pin, resistor divider cannot be used in the circuit design. Instead, general purpose ADC with resistor divider input can be used. NOTE 3.17. Motor Drive Interface The pin of motor drive interface is listed below. Table 20: Pin Definition of Motor Drive Interface Pin Name Pin No I/O Description Comment VIB_DRV 28 PO Motor drive Connected to the negative terminal of the motor The motor is driven by an exclusive circuit, and a reference circuit design is shown below. Figure 20: Reference Circuit for Motor Connection When the motor stops, the redundant electricity can be discharged from the circuit loop formed by diodes, thus avoiding component damages. SC20_Hardware_Design 55 / 130 3V3 C1 1uF D1 C2 NM 1 VIB+

Motor 4 VIB-

VIB_DRV Module Smart LTE Module Series SC20 Hardware Design 3.18. LCM Interface SC20 module provides an LCM interface meeting MIPI DSI specification. The interface supports high speed differential data transmission, with up to four lanes and a transmission rate up to 1.5Gbps per lane. It supports maximally 720P resolution displays. Table 21: Pin Definition of LCM Interface Pin Name Pin No I/O Description Comment LDO6_1V8 125 PO LDO17_2V85 129 PO 1.8V output power supply for LCM logic circuit and DSI 2.85V output power supply for LCM analog circuits 1.8V normal voltage. Vnorm=1.8V IOmax=100mA 2.85V normal voltage. Vnorm=2.85V IOmax=300mA DO Adjust the backlight brightness. PWM control signal. DO LCD reset signal Active low DI LCD tearing effect signal PWM LCD_RST LCD_TE 29 49 50 MIPI_DSI_CLKN 52 MIPI_DSI_CLKP 53 MIPI_DSI_LN0N 54 MIPI_DSI_LN0P 55 MIPI_DSI_LN1N 56 MIPI_DSI_LN1P 57 MIPI_DSI_LN2N 58 MIPI_DSI_LN2P 59 MIPI_DSI_LN3N 60 MIPI_DSI_LN3P 61 AO AO AO AO AO AO AO AO AO AO MIPI DSI clock signal

(negative) MIPI DSI clock signal

(positive) MIPI DSI data signal

(negative) MIPI DSI data signal

(positive) MIPI DSI data signal

(negative) MIPI DSI data signal

(positive) MIPI DSI data signal

(negative) MIPI DSI data signal

(positive) MIPI DSI data signal

(negative) MIPI DSI data signal

(positive) SC20_Hardware_Design 56 / 130 Smart LTE Module Series SC20 Hardware Design Four-lane MIPI DSI is needed for connection with 720P displays. The following is a reference circuit design, by taking the connection with LCM interface on LHR050H41-00 (IC: ILI9881C) from HUARUI Lighting as an example. Figure 21: Reference Circuit Design for LCM Interface MIPI are high speed signal lines. It is recommended that common-mode filters should be added in series near the LCM connector, so as to improve protection against electromagnetic radiation interference. ICMEF112P900MFR from ICT is recommended. When compatible design with other displays is required, please connect the LCD_ID pin of LCM to the modules ADC pin, and please note that the output voltage of LCD_ID cannot exceed the voltage range of ADC pin. External backlight driving circuit needs to be designed for LCM, and a reference circuit design is shown in the following figure. Backlight brightness adjustment can be realized by PWM pin of SC20 module through adjusting the duty ratio. SC20_Hardware_Design 57 / 130 LDO17_2V85 LDO6_1V8 LCM_LED+

LCM_LED-

C1 C2 4.7uF 100nF C3 1uF LCD_TE LCD_RST Module MIPI_DSI_LN3P MIPI_DSI_LN3N MIPI_DSI_LN2P MIPI_DSI_LN2N MIPI_DSI_LN1P MIPI_DSI_LN1N MIPI_DSI_LN0P MIPI_DSI_LN0N MIPI_DSI_CLKP MIPI_DSI_CLKN FL1 3 4 3 4 3 4 3 4 3 4 FL2 FL3 FL4 FL5 1 2 1 2 1 2 1 2 1 2 5 6 5 6 5 6 5 6 5 6 EMI filter 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 LEDA NC LEDK NC LPTE RESET LCD_ID NC (SDA-TP) NC (SCL-TP) NC (RST-TP) NC (EINT-TP) GND VIO18 VCC28 NC (VTP-TP) GND MIPI_TDP3 MIPI_TDN3 GND MIPI_TDP2 MIPI_TDN2 GND MIPI_TDP1 MIPI_TDN1 GND MIPI_TDP0 MIPI_TDN0 GND MIPI_TCP MIPI_TCN LCM Smart LTE Module Series SC20 Hardware Design Figure 22: Reference Design for External Backlight Driving Circuit 3.19. Touch Panel Interface SC20 provides a set of I2C interface for connection with Touch Panel (TP), and also provides the corresponding power supply and interrupt pins. The definition of TP interface pins is illustrated below. Table 22: Pin Definition of Touch Panel Interface Pin Name Pin No I/O Description Comment LDO6_1V8 125 PO LDO17_2V85 129 PO 1.8V output power supply for TP I/O power Pull-up power supply of I2C. 1.8V normal voltage 2.85V output power supply for TP VDD power TP power supply. 2.85V normal voltage TP_INT TP_RST DI Interrupt signal of TP DO Reset signal of TP Active low TP_I2C_SCL OD I2C clock signal of TP TP_I2C_SDA OD I2C data signal of TP The following illustrates a TP interface reference circuit, by taking the connection with TP interface on LHR050H41-00 (IC: GT9147) from HUARUI Lighting as an example. 30 31 47 48 SC20_Hardware_Design 58 / 130 VBAT 29 PWM Module C1 2.2uF Backlight driving circuit LCM_LED+

LCM_LED-

Smart LTE Module Series SC20 Hardware Design Figure 23: Reference Circuit Design for TP Interface 3.20. Camera Interfaces Based on standard MIPI CSI video input interface, SC20 module supports two cameras, and the maximum pixel of the rear camera can be up to 8MP. The video and photo quality are determined by various factors such as the camera sensor, camera lens quality, etc. It is recommended to select a proper camera model, according to the specification of cameras verified and recommended by Quectel. The following models of camera sensors have been verified by Quectel:

For rear camera: Hi843 of SK Hynix, T4KA3 of TOSHIBA For front camera: Hi259 of SK Hynix, SP2508 of SuperPix 3.20.1. Rear Camera Interface The rear camera realizes transmission and control via its FPC and a connector which is connected to the module. SC20 rear camera interface integrates a two-lane MIPI CSI for differential data transmission, and it maximally supports 8MP cameras. The pin definition of rear camera interface is shown below. Table 23: Pin Definition of Rear Camera Interface Pin Name Pin No I/O Description Comment LDO6_1V8 125 PO 1.8V output power supply for DOVDD of camera 1.8V normal voltage. Vnorm=1.8V SC20_Hardware_Design 59 / 130 LDO6_1V8 LDO17_2V85 R1 2.2K R2 2.2K 1 2 3 4 5 6 SDA 1.8V SCL 1.8V RESET 1.8V INT 1.8V GND VDD 2.8V D1 D2 D3 D4 C1 C2 D5 4.7uF 100nF TP TP_I2C_SDA TP_I2C_SCL TP_RST TP_INT Module Smart LTE Module Series SC20 Hardware Design IOmax=100mA 2.85V normal voltage. Vnorm=2.85V IOmax=300mA LDO17_2V85 129 PO 2.85V output power supply for AVDD of camera MIPI_CSI0_CLKN 63 MIPI_CSI0_CLKP 64 MIPI_CSI0_LN0N 65 MIPI_CSI0_LN0P 66 MIPI_CSI0_LN1N 67 MIPI_CSI0_LN1P 68 AI AI AI AI AI AI MIPI CSI clock signal

(negative) MIPI CSI clock signal

(positive) MIPI CSI data signal

(negative) MIPI CSI data signal

(positive) MIPI CSI data signal

(negative) MIPI CSI data signal

(positive) CAM0_MCLK DO Clock signal of rear camera CAM0_RST DO Reset signal of rear camera CAM0_PWD DO Power down signal of rear camera CAM_I2C_SCL OD I2C clock signal of camera CAM_I2C_SDA OD I2C data signal of camera 74 79 80 83 84 The following is a reference circuit design for rear camera interface, by taking the connection with T4KA3 camera as an example. SC20_Hardware_Design 60 / 130 Smart LTE Module Series SC20 Hardware Design Figure 24: Reference Circuit Design for Rear Camera Interface NOTE DVDD_1V2 is used to power the rear camera core, and VDD_AF_2V8 is used to power the rear camera AF circuit. Both of them are powered by an external LDO. 3.20.2. Front Camera Interface The front camera interface integrates a differential data interface meeting one-lane MIPI CSI standard, and is tested to support 2MP cameras. The pin definition of front camera interface is shown below. Table 24: Pin Definition of Front Camera Interface Pin Name Pin No I/O Description Comment LDO6_1V8 125 PO 1.8V output power supply for DOVDD of camera 1.8V normal voltage. Vnorm=1.8V IOmax=100mA SC20_Hardware_Design 61 / 130 DVDD_1V2 LDO6_1V8 VDD_AF_2V8 R1 R2 2.2K 2.2K FL1 1 2 5 6 EMI Filter C1 C2 C3 1uF 1uF 100nF 3 4 3 4 3 4 LDO17_2V85 LDO6_1V8 FL2 2 FL3 1 1 2 5 6 5 6 EMI Filter R3 R4 0R_NM 0R 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 DVDD_1V2 NC AF_VDD2V8 DGND NC NC NC GND MDP2 MDN2 GND SIOD SIOC RESET GND AVDD_2V8 DOVDD1V8 DGND MCP MCN MDP1 MDN1 DGND NC XCLK Rear Camera MIPI_CSI0_LN1P MIPI_CSI0_LN1N CAM_I2C_SDA CAM_I2C_SCL CAM0_RST MIPI_CSI0_CLKP MIPI_CSI0_CLKN MIPI_CSI0_LN0P MIPI_CSI0_LN0N CAM0_PWD CAM0_MCLK Module Smart LTE Module Series SC20 Hardware Design LDO17_2V85 129 PO 2.85V output power supply for AVDD of camera 2.85V normal voltage. Vnorm=2.85V IOmax=300mA MIPI_CSI1_CLKN 70 MIPI_CSI1_CLKP 71 MIPI_CSI1_LN0N 72 MIPI_CSI1_LN0P 73 AI AI AI AI MIPI CSI clock signal

(negative) MIPI CSI clock signal

(positive) MIPI CSI data signal

(negative) MIPI CSI data signal

(positive) CAM1_MCLK DO Clock signal of front camera CAM1_RST DO Reset signal of front camera CAM1_PWD DO Power down signal of front camera CAM_I2C_SCL OD I2C clock signal of camera CAM_I2C_SDA OD I2C data signal of camera 75 81 82 83 84 The following is a reference circuit design for front camera interface, by taking the connection with SP2508 camera as an example. Figure 25: Reference Circuit Design for Front Camera Interface SC20_Hardware_Design 62 / 130 MIPI_CSI1_CLKP MIPI_CSI1_CLKN MIPI_CSI1_LN0P MIPI_CSI1_LN0N CAM1_MCLK CAM_I2C_SCL CAM_I2C_SDA CAM1_PWD CAM1_RST Module FL1 FL2 3 4 3 4 1 2 1 2 5 6 5 6 EMI Filter LDO6_1V8 R1 R2 2.2K 2.2K LDO17_2V85 LDO6_1V8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 DGND DGND CLKP CLKN DGND DGND MDP0 MDN0 DGND DGND NC (MDP1) NC (MDN1) DGND DGND MCLK DGND SCL SDA PWDN RST AVDD2V8 AGND DGND DOVDD1V8 NC R3 0R R4 0R C1 C2 C3 C4 2.2uF 100nF 1uF 100nF Front Camera Smart LTE Module Series SC20 Hardware Design 3.20.3. Design Considerations Special attention should be paid to the definition of video device interface in schematic design. Different video devices will have varied definitions for their corresponding connectors. Assure the device and the connectors are correctly connected. MIPI are high speed signal lines, supporting maximum data rate up to 1.5Gbps. The differential impedance should be controlled as 100. Additionally, it is recommended to route the trace on the inner layer of PCB, and do not cross it with other traces. For the same video device, all the MIPI traces should keep the same length. In order to avoid crosstalk, a distance of 1.5 times of the trace width is recommended to be maintained among MIPI signal lines. During impedance matching, do not connect GND on different planes so as to ensure impedance consistency. It is recommended to select a low capacitance TVS for ESD protection and the recommended parasitic capacitance is below 1pF. Route MIPI traces according to the following rules:

a) The total trace length should not exceed 305mm;

b) Control the differential impedance as 10010%;

c) Control intra-lane length difference within 0.67mm;

d) Control inter-lane length difference within 1.3mm. Table 25: MIPI Trace Length Inside the Module PIN Pin Name Length (mm) Length Difference (P-N) MIPI_DSI_CLKN MIPI_DSI_CLKP MIPI_DSI_LN0N MIPI_DSI_LN0P MIPI_DSI_LN1N MIPI_DSI_LN1P MIPI_DSI_LN2N MIPI_DSI_LN2P MIPI_DSI_LN3N MIPI_DSI_LN3P MIPI_CSI0_CLKN MIPI_CSI0_CLKP 7.08 6.45 6.15 5.85 6.64 6.60 8.20 8.94 9.28 10.24 10.55 11.09

-0.63

-0.30

-0.04 0.74 0.96 0.54 52 53 54 55 56 57 58 59 60 61 63 64 SC20_Hardware_Design 63 / 130 65 66 67 68 70 71 72 73 Smart LTE Module Series SC20 Hardware Design MIPI_CSI0_LN0N MIPI_CSI0_LN0P MIPI_CSI0_LN1N MIPI_CSI0_LN1P MIPI_CSI1_CLKN MIPI_CSI1_CLKP MIPI_CSI1_LN0N MIPI_CSI1_LN0P 12.13 12.53 13.73 14.49 17.32 17.45 18.89 19.24 0.40 0.76 0.13 0.35 3.21. Sensor Interfaces SC20 module supports communication with sensors via I2C interfaces, and it supports ALS/PS, compass, G-sensor, and gyroscopic sensors. Verified sensor models by Quectel include: BST-BMA223, STK3311-WV, MPU-6881 and MMC35240PJ. Table 26: Pin Definition of Sensor Interfaces Pin Name Pin No I/O Description Comment SENSOR_I2C_SCL 91 OD I2C clock signal for external sensor SENSOR_I2C_SDA 92 OD I2C data signal for external sensor GPIO_88 GPIO_89 GPIO_94 GPIO_36 GPIO_65 GPIO_96 99 100 107 108 109 110 DI DI DI DI DI DI Gyroscope sensor interrupt signal 2 Gyroscope sensor interrupt signal 1 Proximity sensor interrupt signal Compass sensor interrupt signal Default configuration;

but not limited to these GPIO pins. Gravity sensor interrupt signal 2 Gravity sensor interrupt signal 1 SC20_Hardware_Design 64 / 130 Smart LTE Module Series SC20 Hardware Design 3.22. Audio Interfaces SC20 module provides two analog input channels and three analog output channels. The following table shows the pin definition. Table 27: Pin Definition of Audio Interfaces Pin Name Pin No I/O Description Comment MIC1P MIC_GND MIC2P EARP EARN SPKP SPKN HPH_R HPH_L HS_DET 4 5 6 8 9 10 11 136 137 138 139 AI Microphone positive input for channel 1 MIC reference ground AI Microphone positive input for channel 2 AO Earpiece positive output AO Earpiece negative output AO Speaker positive output AO Speaker negative output AO Headphone right channel output HPH_GND AI Headphone virtual ground AO Headphone left channel output AI Headset insertion detection High level by default The module offers two audio input channels which are both single-ended channels. The earpiece interface uses differential output. The loudspeaker interface uses differential output as well. The output channel is available with a Class-D amplifier whose output power is 879mW when VBAT is 4.2V and load is 8. The headphone interface features stereo left and right channel output, and headphone insert detection function is supported. SC20_Hardware_Design 65 / 130 Smart LTE Module Series SC20 Hardware Design 3.22.1. Reference Circuit Design for Microphone Interfaces Figure 26: Reference Circuit Design for Microphone Interfaces 3.22.2. Reference Circuit Design for Receiver Interface Figure 27: Reference Circuit Design for Receiver Interface SC20_Hardware_Design 66 / 130 MIC1P MIC_GND Module F1 0R F2 0R C1 NC MIC D1 C3 100pF EARP EARN Module C2 33pF C1 33pF C3 33pF F1 0R F2 0R D1 D2 Smart LTE Module Series SC20 Hardware Design 3.22.3. Reference Circuit Design for Headphone Interface Figure 28: Reference Circuit Design for Headphone Interface 3.22.4. Reference Circuit Design for Loudspeaker Interface Figure 29: Reference Circuit Design for Loudspeaker Interface 3.22.5. Audio Interfaces Design Considerations It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10pF and 33pF) for filtering out RF interference, thus reducing TDD noise. The 33pF capacitor is applied for filtering out RF SC20_Hardware_Design 67 / 130 C1 NM C2 NM R1 0R R3 0R R4 20K F4 0R MIC_GND MIC2P HPH_L HS_DET HPH_R HPH_GND Module R2 0R F1 F2 0R 0R F3 0R C3 C4 C5 33pF 33pF 33pF D1 D2 D3 D4 ESD 1 5 4 6 3 2 F1 0R F2 0R SPKP EARP SPKN EARN Module D1 D2 C1 C2 33pF 33pF Smart LTE Module Series SC20 Hardware Design interference when the module is transmitting at EGSM900MHz. Without placing this capacitor, TDD noise could be heard. Moreover, the 10pF capacitor here is used for filtering out 1800MHz RF interference. Please note that the resonant frequency point of a capacitor largely depends on the material and production technique. Therefore, customers would have to discuss with their capacitor vendors to choose the most suitable capacitor for filtering out high-frequency noises. The severity degree of the RF interference in the voice channel during GSM transmitting largely depends on the application design. In some cases, EGSM900 TDD noise is more severe; while in other cases, DCS1800 TDD noise is more obvious. Therefore, a suitable capacitor can be selected based on the test results. Sometimes, even no RF filtering capacitor is required. The capacitor which is used for filtering out RF noise should be close to the audio device or audio interface. The trace should be as short as possible, and it is recommended to route the trace for capacitors first and then for other points. In order to decrease radio or other signal interference, RF antennas should be placed away from audio interfaces and audio traces. Power traces cannot be parallel with and also should be far away from the audio traces. The differential audio traces must be routed according to the differential signal layout rule. 3.23. Emergency Download Interface USB_BOOT is an emergency download interface. Pull up to LDO5_1V8 during power-up will force the module enter into emergency download mode. This is an emergency option when there are failures such as abnormal startup or running. For convenient firmware upgrade and debugging in the future, please reverse this pin. The reference circuit design is shown as below. Figure 30: Reference Circuit Design for Emergency Download Interface SC20_Hardware_Design 68 / 130 S1 USB_BOOT Module LDO5_1V8 R1 10K Smart LTE Module Series SC20 Hardware Design 4 Wi-Fi and BT SC20 module provides a shared antenna interface ANT_WIFI/BT for Wi-Fi and Bluetooth (BT) functions. The interface impedance is 50. External antennas such as PCB antenna, sucker antenna and ceramic antenna can be connected to the module via the interface, so as to achieve Wi-Fi and BT functions. 4.1. Wi-Fi Overview SC20 series module supports 2.4GHz/5GHz double-band WLAN wireless communication based on IEEE 802.11a/b/g/n standard protocols. The maximum data rate is up to 150Mbps. The features are as below:

Support Wake-on-WLAN (WoWLAN) Support ad hoc mode Support WAPI SMS4 hardware encryption Support AP mode Support Wi-Fi Direct Support MCS 0-7 for HT20 and HT40 4.1.1. Wi-Fi Performance The following table lists the Wi-Fi transmitting and receiving performance of SC20 module. Table 28: Wi-Fi Receiving Performance Standard Sensitivity 2.4GHz 802.11b 802.11b 802.11g 802.11g Rate 1Mbps 11Mbps 6Mbps 54Mbps

-96dBm

-87dBm

-91dBm

-74dBm SC20_Hardware_Design 69 / 130 Smart LTE Module Series SC20 Hardware Design 5GHz 802.11n HT20 802.11n HT20 802.11n HT40 802.11n HT40 802.11a 802.11a 802.11n HT20 802.11n HT20 802.11n HT40 802.11n HT40 MCS0 MCS7 MCS0 MCS7 6Mbps 54Mbps MCS0 MCS7 MCS0 MCS7

-90dBm

-72dBm

-87dBm

-68dBm

-90dBm

-71dBm

-88dBm

-69dBm

-86dBm

-66dBm Referenced specifications are listed below:

IEEE 802.11n WLAN MAC and PHY, October 2009 + IEEE 802.11-2007 WLAN MAC and PHY, June 2007 IEEE Std 802.11b, IEEE Std 802.11d, IEEE Std 802.11e, IEEE Std 802.11g, IEEE Std 802.11i: IEEE 802.11-2007 WLAN MAC and PHY, June 2007 4.2. BT Overview SC20 module supports BT4.2 (BR/EDR+BLE) specification, as well as GFSK, 8-DPSK, /4-DQPSK modulation modes. Maximally support up to 7 wireless connections. Maximally support up to 3.5 piconets at the same time. Support one SCO (Synchronous Connection Oriented) or eSCO connection. The BR/EDR channel bandwidth is 1MHz, and can accommodate 79 channels. The BLE channel bandwidth is 2MHz, and can accommodate 40 channels. SC20_Hardware_Design 70 / 130 Smart LTE Module Series SC20 Hardware Design Table 29: BT Data Rate and Version Version Data rate Maximum Application Throughput Comment 1.2 1 Mbit/s

>80 Kbit/s 2.0 + EDR 3 Mbit/s

>80 Kbit/s 3.0 + HS 24 Mbit/s Reference 3.0 + HS 4.0 24 Mbit/s Reference 4.0 LE Referenced specifications are listed below:

Bluetooth Radio Frequency TSS and TP Specification 1.2/2.0/2.0 + EDR/2.1/2.1+ EDR/3.0/3.0 + HS, August 6, 2009 Bluetooth Low Energy RF PHY Test Specification, RF-PHY.TS/4.0.0, December 15, 2009 SC20_Hardware_Design 71 / 130 Smart LTE Module Series SC20 Hardware Design 5 GNSS SC20 module integrates a Qualcomm IZat GNSS engine (GEN 8C) which supports multiple positioning and navigation systems including GPS, GLONASS and BeiDou. With an embedded LNA, the module provides greatly improved positioning accuracy. 5.1. GNSS Performance The following table lists the GNSS performance of SC20 module in conduction mode. Table 29: GNSS Performance Parameter Description Sensitivity (GNSS) Reacquisition Cold start Tracking Cold start Hot start TTFF (GNSS) Warm start Static Drift (GNSS) CEP-50 Typ.

-146

-157

-157 32 30 2 6 Unit dBm dBm dBm s s s m 5.2. GNSS RF Design Guidelines Bad design of antenna and layout may cause reduced GPS receiving sensitivity, longer GPS positioning time, or reduced positioning accuracy. In order to avoid this, please follow the reference design rules as below:

SC20_Hardware_Design 72 / 130 Smart LTE Module Series SC20 Hardware Design Maximize the distance between the GNSS RF part and the GPRS RF part (including trace routing and antenna layout) to avoid mutual interference. In user systems, GNSS RF signal lines and RF components should be placed far away from high speed circuits, switched-mode power supplies, power inductors, the clock circuit of single-chip microcomputers, etc. For applications with harsh electromagnetic environment or with high requirement on ESD protection, it is recommended to add ESD protective diodes for the antenna interface. Only diodes with ultra-low junction capacitance such as 0.05pF can be selected. Otherwise, there will be effects on the impedance characteristic of RF circuit loop, or attenuation of bypass RF signal may be caused. Control the impedance of either feeder line or PCB trace as 50, and keep the trace length as short as possible. Refer to Chapter 6.3 for GNSS reference circuit design. SC20_Hardware_Design 73 / 130 Smart LTE Module Series SC20 Hardware Design 6 Antenna Interfaces SC20 provides four antenna interfaces for main antenna, Rx-diversity/MIMO antenna, GNSS antenna and Wi-Fi/BT antenna, respectively. The antenna ports have an impedance of 50. 6.1. Main/Rx-diversity Antenna Interfaces The pin definition of main/Rx-diversity antenna interfaces is shown below. Table 30: Pin Definition of Main/Rx-diversity Antenna Interfaces Pin Name Pin No. Description Comment ANT_MAIN 87 Main antenna ANT_DRX 131 Diversity antenna 50 impedance I/O IO AI 6.1.1. Operating Frequency Table 31: SC20-CE R1.1 Module Operating Frequencies 3GPP Band EGSM900 DCS1800 Receive 925~960 1805~1880 1710~1785 WCDMA B1 2110~2170 1920~1980 WCDMA B8 925~960 EVDO/CDMA BC0 869~894 TD-SCDMA B34 2010~2025 2010~2025 TD-SCDMA B39 1880~1920 1880~1920 Transmit 880~915 880~915 824~849 Unit MHz MHz MHz MHz MHz MHz MHz SC20_Hardware_Design 74 / 130 Smart LTE Module Series SC20 Hardware Design LTE-FDD B1 2110~2170 1920~1980 LTE-FDD B3 1805~1880 1710~1785 LTE-FDD B5 LTE-FDD B8 869~894 925~960 824~849 880~915 LTE-TDD B38 2570~2620 2570~2620 LTE-TDD B39 1880~1920 1880~1920 LTE-TDD B40 2300~2400 2300~2400 LTE-TDD B41 2555~2655 2555~2655 Table 32: SC20-EL Module Operating Frequencies 3GPP Band GSM850 EGSM900 DCS1800 PCS1900 WCDMA B5 WCDMA B8 Receive 869~894 925~960 Transmit 824~849 880~915 1805~1880 1710~1785 1930~1990 1850~1910 869~894 925~960 824~849 880~915 WCDMA B1 2110~2170 1920~1980 LTE-FDD B1 2110~2170 1920~1980 LTE-FDD B3 1805~1880 1710~1785 LTE-FDD B5 869~894 824~849 LTE-FDD B7 2620~2690 2500~2570 LTE-FDD B8 LTE-FDD B20 925~960 791~821 880~915 832~862 LTE-TDD B38 2570~2620 2570~2620 MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz SC20_Hardware_Design 75 / 130 Smart LTE Module Series SC20 Hardware Design LTE-TDD B40 2300~2400 2300~2400 LTE-TDD B41 2555~2655 2555~2655 Table 33: SC20-AL Module Operating Frequencies Transmit 824~849 1850~1910 1920~1980 1850~1910 1710~1755 824~849 880~915 1850~1910 1710~1755 824~849 699~716 777~787 3GPP Band GSM850 PCS1900 WCDMA B1 WCDMA B2 WCDMA B4 WCDMA B5 WCDMA B8 Receive 869~894 1930~1990 2110~2170 1930~1990 2110~2155 869~894 925~960 LTE-FDD B2 1930~1990 LTE-FDD B4 2110~2155 LTE-FDD B5 869~894 LTE-FDD B12 LTE-FDD B13 729~746 746~756 LTE-FDD B7 2620~2690 2500~2570 LTE-FDD B25 1930~1995 1850~1915 LTE-FDD B26 859~894 814~849 Table 34: SC20-AUL Module Operating Frequencies 3GPP Band GSM850 EGSM900 DCS1800 Receive 869~894 925~960 Transmit 824~849 880~915 1805~1880 1710~1785 MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz SC20_Hardware_Design 76 / 130 Smart LTE Module Series SC20 Hardware Design LTE-FDD B7 2620~2690 2500~2570 LTE-TDD B40 2300~2400 2300~2400 Table 35: SC20-JL Module Operating Frequencies 3GPP Band Receive Transmit WCDMA B1 2110~2170 1920~1980 PCS1900 WCDMA B1 WCDMA B5 WCDMA B8 1930~1990 2110~2170 869~894 925~960 WCDMA B2 1930~1990 LTE-FDD B1 2110~2170 LTE-FDD B3 1805~1880 LTE-FDD B5 869~894 LTE-FDD B8 LTE-FDD B28 925~960 758~803 LTE-FDD B1 2110~2170 LTE-FDD B3 1805~1880 WCDMA B6 WCDMA B8 WCDAM B19 LTE-FDD B8 LTE-FDD B18 LTE-FDD B19 LTE-FDD B26 875~885 925~960 875~890 925~960 860~875 875~890 859~894 1850~1910 1920~1980 1850~1910 824~849 880~915 1920~1980 1710~1785 824~849 880~915 703~748 830~840 880~915 830~845 1920~1980 1710~1785 880~915 815~830 830~845 814~849 MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz LTE-TDD B41 1) 2545~2655 2545~2655 SC20_Hardware_Design 77 / 130 Smart LTE Module Series SC20 Hardware Design NOTE 1) The bandwidth of LTE-TDD B41 for SC20-JL is 110MHz (2545MHz~2655MHz), and the corresponding channel range is 40140~41240. 6.1.2. Main and Rx-diversity Antenna Interfaces Reference Design A reference circuit design for main and Rx-diversity antenna interfaces is shown as below. A -type matching circuit should be reserved for better RF performance. The -type matching components

(R1/C1/C2, R2/C3/C4) should be placed as close to the antennas as possible and are mounted according to the actual debugging. C1, C2, C3 and C4 are not mounted and a 0 resistor is mounted on R1 and R2 respectively by default. Figure 31: Reference Circuit Design for Main and Rx-diversity Antenna Interfaces 6.1.3. Reference Design of RF Layout For users PCB, the characteristic impedance of all RF traces should be controlled to 50. The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, height from the reference ground to the signal layer (H), and the clearance between RF trace and ground

(S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. SC20_Hardware_Design 78 / 130 Main antenna DRX antenna ANT_MAIN R1 0R C1 NM C3 NM C2 NM C4 NM ANT_DRX R2 0R Module Smart LTE Module Series SC20 Hardware Design Figure 32: Microstrip Design on a 2-layer PCB Figure 33: Coplanar Waveguide Design on a 2-layer PCB Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) SC20_Hardware_Design 79 / 130 Smart LTE Module Series SC20 Hardware Design Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully 50. connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times as wide as RF signal traces (2*W). For more details about RF layout, please refer to document [2]. 6.2. Wi-Fi/BT Antenna Interface The following tables show the pin definition and frequency specification of the Wi-Fi/BT antenna interface. Table 36: Pin Definition of Wi-Fi/BT Antenna Interface Pin Name Pin No. I/O Description Comment ANT_WIFI/BT 77 IO Wi-Fi/BT antenna interface 50 impedance SC20_Hardware_Design 80 / 130 Smart LTE Module Series SC20 Hardware Design Table 37: Wi-Fi/BT Frequency Type 802.11a/b/g/n BT4.2 LE NOTE Frequency 2400~2482 5180~5825 2402~2480 Unit MHz MHz The supported Wi-Fi frequencies of SC20-JL are 2400MHz~2496MHz and 5180MHz~5825MHz. A reference circuit design for Wi-Fi/BT antenna interface is shown as below. A -type matching circuit should be reserved for better RF performance. The -type matching components (R1, C1, C2) should be placed as close to the antenna as possible and are mounted according to the actual debugging. C1 and C2 are not mounted and a 0 resistor is mounted on R1 by default. Figure 36: Reference Circuit Design for Wi-Fi/BT Antenna 6.3. GNSS Antenna Interface The following tables show pin definition and frequency specification of GNSS antenna interface. Table 38: Pin Definition of GNSS Antenna Interface Pin Name Pin No. Description Comment ANT_GNSS 121 GNSS antenna interface 50 impedance I/O AI SC20_Hardware_Design 81 / 130 ANT_WIFI/BT Module R1 0R Wi-Fi/BT antenna C1 NM C2 NM Smart LTE Module Series SC20 Hardware Design Table 39: GNSS Frequency Type GPS Frequency 1575.421.023 GLONASS 1597.5~1605.8 BeiDou 1561.0982.046 Unit MHz MHz MHz 6.3.1. Recommended Circuit for Passive Antenna GNSS antenna interface supports passive ceramic antennas and other types of passive antennas. A reference circuit design is given below. Figure 37: Reference Circuit Design for GNSS Passive Antenna NOTE When the passive antenna is placed far away from the module (that is, the antenna trace is long), it is recommended to add an external LNA circuit for better GNSS receiving performance, and the LNA should be placed close to the antenna. 6.3.2. Recommended Circuit for Active Antenna The active antenna is powered by VCC power supply through the R1 and L1 power paths shown in the following figure. The common power supply voltage ranges from 3.3V to 5.0V. Although featuring low power consumption, the active antenna still requires stable and clean power supplies. It is recommended to use high performance LDO as the power supply. A reference design of GNSS active antenna is shown below. SC20_Hardware_Design 82 / 130 Passive Antenna U1 LNA L1 C1 C2 NM ANT_GNSS Module C3 C4 NM Smart LTE Module Series SC20 Hardware Design Figure 38: Reference Circuit Design for GNSS Active Antenna The following table shows the requirement on main antenna, RX-diversity antenna, Wi-Fi/BT antenna and GNSS antenna. 6.4. Antenna Installation 6.4.1. Antenna Requirements Table 40: Antenna Requirements Type Requirements GSM/WCDMA/TD-SCDMA/

LTE VSWR: 2 Gain (dBi): 1 Max Input Power (W): 50 Input Impedance (): 50 Polarization Type: Vertical Cable Insertion Loss: < 1dB

(GSM850, EGSM900, WCDMA B5/B6/B8/B19, EVDO/CDMA BC0, LTE-FDD B5/B8/B12/B13/B18/B19/B20/B26/B28) Cable Insertion Loss: < 1.5dB

(DCS1800, PCS1900, WCDMA B1/B2/B4, TD-SCDMA B34/B39, LTE-FDD B1/B2/B3/B4/B25, LTE-TDD B39) Cable Insertion Loss: < 2dB

(LTE-FDD B7, LTE-TDD B38/B40/B41) Wi-Fi/BT VSWR: 2 Gain (dBi): 1 Max Input Power (W): 50 SC20_Hardware_Design 83 / 130 VCC Active Antenna R1 C1 1uF C2 100pF 10R L1 56nH ANT_GNSS Module R2 0R C4 NM C3 100pF C5 NM GNSS NOTE Smart LTE Module Series SC20 Hardware Design Input Impedance (): 50 Polarization Type: Vertical Cable Insertion Loss: < 1dB Frequency range: 1559MHz~1609MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive Antenna Gain: > 0dBi Active Antenna Noise Figure: < 1.5dB Active Antenna Total Gain: < 17dBi (Typ.) 1) It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance. 6.4.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by HIROSE. Figure 39: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. SC20_Hardware_Design 84 / 130 Smart LTE Module Series SC20 Hardware Design Figure 40: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 41: Space Factor of Mated Connectors (Unit: mm) For more details, please visit http://www.hirose.com. SC20_Hardware_Design 85 / 130 Smart LTE Module Series SC20 Hardware Design 7 Electrical, Reliability and Radio Characteristics 7.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 41: Absolute Maximum Ratings Parameter VBAT USB_VBUS Peak Current of VBAT Voltage on Digital Pins Min.

-0.5

-0.5 0

-0.3 Max. Unit 6 16 3 2.3 V V A V 7.2. Power Supply Ratings Table 42: SC20 Module Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT 3.5 3.8 4.2 V VBAT Voltage drop during transmitting burst The actual input voltages must stay between the minimum and maximum values. Maximum power control level at EGSM900. 400 mV SC20_Hardware_Design 86 / 130 Smart LTE Module Series SC20 Hardware Design Maximum power control level at EGSM900. 1.8 3.0 A USB_VBUS USB detection 4.35 5.0 6.3 V IVBAT VRTC Peak supply current (during transmission slot) Power supply voltage of backup battery. 2.0 3.0 3.25 V 7.3. Charging Performance Specifications Table 43: Charging Performance Specifications Parameter Min. Typ. Max. Unit Trickle charging-A current 81 90 99 mA Trickle charging-A threshold voltage range

(15.62mV steps) Trickle charging-B threshold voltage range

(18.75mV steps) 2.5 2.796 2.984 V 3.0 3.2 3.581 V V Charge voltage range (25mV steps) 4 4.2 4.775 Charge voltage accuracy

+/-2

Charge current range (90mA steps) 90 1440 mA Charge current accuracy

+/-10

Charge termination current:

when charge current is from 90mA to 450mA Charge termination current:

when charge current is from 450mA to 1440mA 7 7.4

SC20_Hardware_Design 87 / 130 Smart LTE Module Series SC20 Hardware Design 7.4. Operation and Storage Temperatures The operating temperature is listed in the following table. Table 44: Operation and Storage Temperatures Parameter Min. Max. Unit Typ.

+25

+65

+75

+90 C C C Operating temperature range 1)

-35 Extended temperature range 2)

-40 Storage Temperature Range

-40 NOTES 1) Within operation temperature range, the module is 3GPP compliant. 2) Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to the normal operating temperature levels, the module will meet 3GPP specifications again. 1. 2. 7.5. Current Consumption The values of current consumption are shown below. Table 45: SC20-CE R1.1 Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down IVBAT GSM/GPRS supply current Sleep (USB disconnected)

@DRX=2 Sleep (USB disconnected)

@DRX=5 Sleep (USB disconnected)

@DRX=9 20 3.85 uA mA 3.01 mA 2.91 mA SC20_Hardware_Design 88 / 130 Smart LTE Module Series SC20 Hardware Design WCDMA supply current LTE-FDD supply current LTE-TDD supply current GSM voice call Sleep (USB disconnected)

@DRX=6 Sleep (USB disconnected)

@DRX=7 Sleep (USB disconnected)

@DRX=8 Sleep (USB disconnected)

@DRX=9 Sleep (USB disconnected)

@DRX=5 Sleep (USB disconnected)

@DRX=6 Sleep (USB disconnected)

@DRX=7 Sleep (USB disconnected)

@DRX=8 Sleep (USB disconnected)

@DRX=5 Sleep (USB disconnected)

@DRX=6 Sleep (USB disconnected)

@DRX=7 Sleep (USB disconnected)

@DRX=8 EGSM900 PCL=5 @31.84dBm EGSM900 PCL=12 @18.49dBm EGSM900 PCL=19 @4.95dBm DCS1800 PCL=0 @28.91dBm DCS1800 PCL=7 @15.35dBm DCS1800 PCL=15 @-0.21dBm BC0 (max power)

@23.91dBm BC0 (min power)

@-60.28dBm 3.30 mA 2.79 mA 2.49 mA 2.33 mA 5.60 mA 3.83 mA 3.02 mA 2.65 mA 5.49 mA 3.87 mA 3.05 mA 2.67 mA 290 mA 150 mA 104 mA 220 mA 150 mA 120 mA 560 mA 190 mA mA EVDO/CDMA voice call WCDMA voice call B1 (max power) @22.61dBm 560 SC20_Hardware_Design 89 / 130 Smart LTE Module Series SC20 Hardware Design EDGE data transfer B8 (max power)

@22.74dBm EGSM900 (1UL/4DL)

@26.29dBm EGSM900 (2UL/3DL)

@26.15dBm EGSM900 (3UL/2DL)

@26.06dBm EGSM900 (4UL/1DL)

@25.92dBm DCS1800 (1UL/4DL)

@24.89dBm DCS1800 (2UL/3DL)

@24.74dBm DCS1800 (3UL/2DL)

@24.54dBm DCS1800 (4UL/1DL)

@24.44dBm BC0 (max power)

@23.68dBm EVDO/CDMA data transfer WCDMA data transfer B1 (HSDPA) @21.64dBm 540 B8 (HSDPA) @21.61dBm 540 B1 (HSUPA) @21.36dBm 560 B8 (HSUPA) @21.56dBm 550 LTE data transfer LTE-FDD B1

@22.96dBm LTE-FDD B3

@22.95dBm LTE-FDD B5

@22.90dBm LTE-FDD B8

@23.17dBm LTE-TDD B38 @22.02dBm 400 LTE-TDD B39 @22.13dBm 410 LTE-TDD B40 @22.01dBm 410 LTE-TDD B41 @22.31dBm 400 580 mA 220 mA 330 420 530 180 270 360 450 560 750 700 680 680 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC20_Hardware_Design 90 / 130 Smart LTE Module Series SC20 Hardware Design Table 46: SC20-EL Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 20 uA GSM/GPRS supply current 2.46 mA Sleep (USB disconnected)

@DRX=2 Sleep (USB disconnected)

@DRX=5 Sleep (USB disconnected)

@DRX=9 Sleep (USB disconnected)

@DRX=6 Sleep (USB disconnected)

@DRX=7 Sleep (USB disconnected)

@DRX=8 Sleep (USB disconnected)

@DRX=9 Sleep (USB disconnected)

@DRX=5 Sleep (USB disconnected)

@DRX=6 Sleep (USB disconnected)

@DRX=7 Sleep (USB disconnected)

@DRX=8 Sleep (USB disconnected)

@DRX=5 Sleep (USB disconnected)

@DRX=6 Sleep (USB disconnected)

@DRX=7 Sleep (USB disconnected)

@DRX=8 GSM850 PCL=5 @33.13dBm GSM850 PCL=12 @19.15dBm GSM850 PCL=19 @5.31dBm 3.58 mA 2.13 mA 2.99 mA 2.35 mA 2.01 mA 1.85 mA 5.51 mA 3.56 mA 2.62 mA 2.14 mA 5.93 mA 3.74 mA 2.70 mA 2.17 mA 263.8 mA 134.7 mA 109.2 mA WCDMA supply current IVBAT LTE-FDD supply current LTE-TDD supply current GSM voice call SC20_Hardware_Design 91 / 130 Smart LTE Module Series SC20 Hardware Design EGSM900 PCL=5 @33.07dBm EGSM900 PCL=12 @19.53dBm EGSM900 PCL=19 @5.59dBm DCS1800 PCL=0 @30.00dBm DCS1800 PCL=7 @16.45dBm DCS1800 PCL=15 @0.67dBm PCS1900 PCL=0 @29.72dBm PCS1900 PCL=7 @16.72dBm PCS1900 PCL=15 @0.98dBm GSM850 (1UL/4DL)

@33.12dBm GSM850 (2UL/3DL)

@33.02dBm GSM850 (3UL/2DL)

@30.50dBm GSM850 (4UL/1DL)

@29.49dBM EGSM900 (1UL/4DL)

@33.10dBm EGSM900 (2UL/3DL)

@33.00dBm EGSM900 (3UL/2DL)

@30.96dBm EGSM900 (4UL/1DL)

@29.93dBm DCS1800 (1UL/4DL)

@29.96dBm 271.2 mA 137.3 mA 110.6 mA 203.0 mA 150.7 mA 130.8 mA 195.9 mA 151.3 mA 130.0 mA 265.9 mA 435.1 mA 478.8 mA 564.0 mA 272.7 mA 445.0 mA 512.0 mA 599.2 mA 205.8 mA B1 (max power) @23.18dBm 544.1 mA WCDMA voice call B5 (max power) @23.22dBm 513.5 mA B8 (max power) @23.29dBm 522.7 mA GPRS data transfer SC20_Hardware_Design 92 / 130 Smart LTE Module Series SC20 Hardware Design DCS1800 (2UL/3DL)

@29.86dBm DCS1800 (3UL/2DL)

@29.73dBm DCS1800 (4UL/1DL)

@29.63dBm PCS1900 (1UL/4DL)

@29.77dBm PCS1900 (2UL/3DL)

@29.64dBm PCS1900 (3UL/2DL)

@29.54dBm PCS1900 (4UL/1DL)

@29.34dBm GSM850 (1UL/4DL)

@26.75dBm GSM850 (2UL/3DL)

@27.13dBm GSM850 (3UL/2DL)

@26.63dBm GSM850 (4UL/1DL)

@26.54dBm EGSM900 (1UL/4DL)

@27.05dBm EGSM900 (2UL/3DL)

@27.13dBm EGSM900 (3UL/2DL)

@27.28dBm EGSM900 (4UL/1DL)

@27.19dBm DCS1800 (1UL/4DL)

@26.04dBm DCS1800 (2UL/3DL)

@25.98dBm DCS1800 (3UL/2DL)

@25.71dBm DCS1800 (4UL/1DL)

@25.46dBm PCS1900 (1UL/4DL)

@26.14dBm PCS1900 (2UL/3DL)

@26.11dBm 314.3 mA 420.8 mA 531.7 mA 199.3 mA 307.2 mA 411.5 mA 518.7 mA 172.2 mA 266.6 mA 353.1 mA 446.9 mA 182 mA 177.4 mA 278.3 mA 371.0 mA 170.6 mA 260.5 mA 349.8 mA 440.2 mA 171.0 mA 260.5 mA EDGE data transfer SC20_Hardware_Design 93 / 130 Smart LTE Module Series SC20 Hardware Design PCS1900 (3UL/2DL)

@26.11dBm PCS1900 (4UL/1DL)

@25.70dBm B1 (HSDPA)

@22.43dBm B5 (HSDPA)

@22.23dBm B8 (HSDPA)

@22.24dBm B1 (HSUPA)

@22.30dBm B5 (HSUPA)

@21.93dBm B8 (HSUPA)

@21.90dBm LTE-FDD B1

@23.29dBm LTE-FDD B3

@23.29dBm LTE-FDD B5

@23.44dBm LTE-FDD B7

@23.28dBm LTE-FDD B8

@23.44dBm WCDMA data transfer LTE data transfer LTE-FDD B20 @23.36dBm 684 LTE-TDD B38 @23.19dBm 427 LTE-TDD B40 @23.17dBm 427 LTE-TDD B41 @23.19dBm 455 349.6 mA 442.3 mA 503.8 mA 471.6 mA 481.6 mA 504.6 mA 460.5 mA 464.8 mA 737 756 636 842 639 mA mA mA mA mA mA mA mA mA Table 47: SC20-AL Current Consumption Parameter Description Conditions Typ. Unit IVBAT OFF state Power down GSM/GPRS supply current Sleep USB disconnected)

@DRX=2 20 4.08 uA mA SC20_Hardware_Design 94 / 130 Smart LTE Module Series SC20 Hardware Design WCDMA supply current FDD-LTE supply current GSM voice call Sleep (USB disconnected) DRX=5 Sleep (USB disconnected) DRX=9 Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 Sleep (USB disconnected) DRX=8 Sleep (USB disconnected) DRX=9 Sleep (USB disconnected) DRX=5 Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 Sleep (USB disconnected) DRX=8 GSM850 PCL=5 @32.23dBm GSM850 PCL=12 @18.34dBm GSM850 PCL=19 @4.87dBm PCS1900 PCL=0 @29.14dBm PCS1900 PCL=7 @16.23dBm PCS1900 PCL=15 @0.62dBm 3.10 2.77 3.86 2.90 2.55 2.43 6.60 4.24 3.11 2.77 mA mA mA mA mA mA mA mA mA mA 254.60 mA 136.30 mA 111.30 mA 196.60 mA 158.40 mA 135.50 mA B1 (max power) @23.24dBm 548.13 mA B2 (max power) @23.40dBm 575.70 mA WCDMA voice call B4 (max power) @23.20dBm 561.35 mA B5 (max power) @23.47dBm 558.00 mA B8 (max power) @23.5dBm 557.10 mA GPRS data transfer 254.50 mA GSM850 (1UL/4DL)

@32.18dBm SC20_Hardware_Design 95 / 130 Smart LTE Module Series SC20 Hardware Design GSM850 (2UL/3DL)

@32.00dBm GSM850 (3UL/2DL)

@30.43dBm GSM850 (4UL/1DL)

@29.37dBm PCS1900 (1UL/4DL)

@29.13dBm PCS1900 (2UL/3DL)

@29.19dBm PCS1900 (3UL/2DL)

@29.05dBm PCS1900 (4UL/1DL)

@28.84dBm GSM850 (1UL/4DL)

@26.39dBm GSM850 (2UL/3DL)

@26.30dBm GSM850 (3UL/2DL)

@26.30dBm GSM850 (4UL/1DL)

@26.07dBm PCS1900 (1UL/4DL)

@25.70dBm PCS1900 (2UL/3DL)

@25.55dBm PCS1900 (3UL/2DL)

@25.39dBm PCS1900 (4UL/1DL)

@25.17dBm B1 (HSDPA)

@22.24dBm B2 (HSDPA)

@22.44dBm B4 (HSDPA)

@22.23dBm B5 (HSDPA)

@22.38dBm B8 (HSDPA)

@22.47dBm B1 (HSUPA)

@22.2dBm 410.70 mA 496.10 mA 573.90 mA 198.70 mA 306.50 mA 408.90 mA 514.60 mA 186.00 mA 280.00 mA 368.00 mA 456.00 mA 184.40 mA 276.60 mA 365.20 mA 456.50 mA 506.35 mA 535.10 mA 523.07 mA 513.13 mA 512.30 mA 516.00 mA EDGE data transfer WCDMA data transfer SC20_Hardware_Design 96 / 130 Smart LTE Module Series SC20 Hardware Design B2 (HSUPA)

@22.4dBm B4 (HSUPA)

@21.93dBm B5 (HSUPA)

@22.26dBm B8 (HSUPA)

@22 dBm LTE-FDD B2

@23.05dBm LTE-FDD B4

@23.3dBm LTE-FDD B5

@23.13dBm LTE-FDD B7

@22.75dBm LTE-FDD B12

@22.74dBm LTE-FDD B13

@23.3dBm LTE-FDD B25

@23.2dBm LTE-FDD B26

@23.57dBm LTE data transfer Table 48: SC20-AUL Current Consumption Parameter Description Conditions OFF state Power down GSM/GPRS supply current IVBAT Sleep (USB disconnected) DRX=2 Sleep (USB disconnected) DRX=5 Sleep (USB disconnected) DRX=9 Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 WCDMA supply current Sleep (USB disconnected) 1.90 SC20_Hardware_Design 97 / 130 545.60 mA 527.93 mA 528.94 mA 507.70 mA 710.01 mA 736.50 mA 626.18 mA 733.40 mA 606.02 mA 674.84 mA 665.62 mA 718.75 mA Typ. 20 3.31 2.30 2.01 2.79 2.21 Unit uA mA mA mA mA mA mA Smart LTE Module Series SC20 Hardware Design LTE-FDD supply current LTE-TDD supply current GSM voice call DRX=8 Sleep (USB disconnected) DRX=9 Sleep (USB disconnected) DRX=5 Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 Sleep (USB disconnected) DRX=8 Sleep (USB disconnected) DRX=5 Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 Sleep (USB disconnected) DRX=8 GSM850 PCL=5 @32.96dBm GSM850 PCL=12 @18.83dBm GSM850 PCL=19 @5.31dBm EGSM900 PCL=5 @32.96dBm EGSM900 PCL=12 @19.21dBm EGSM900 PCL=19 @5.60dBm DCS1800 PCL=0 @29.93dBm DCS1800 PCL=7 @16.29dBm DCS1800 PCL=15 @0.62dBm PCS1900 PCL=0 @29.67dBm PCS1900 PCL=7 @16.74dBm 1.75 5.29 3.59 2.76 2.24 5.52 3.71 2.76 2.28 268 133 109 267 137 108 202 152 131 194 149 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC20_Hardware_Design 98 / 130 Smart LTE Module Series SC20 Hardware Design WCDMA voice call GPRS data transfer PCS1900 PCL=15 @1.09dBm B1 (max power)

@23.33dBm B2 (max power)

@23.51dBm B5 (max power)

@23.37dBm B8 (max power)

@23.38dBm GSM850 (1UL/4DL)

@32.91dBm GSM850 (2UL/3DL)

@32.26dBm GSM850 (3UL/2DL)

@30.72dBm GSM850 (4UL/1DL)

@29.38dBm EGSM900 (1UL/4DL)

@32.92dBm EGSM900 (2UL/3DL)

@32.74dBm EGSM900 (3UL/2DL)

@30.85dBm EGSM900 (4UL/1DL)

@29.58dBm DCS1800 (1UL/4DL)

@39.81dBm DCS1800 (2UL/3DL)

@39.70dBm DCS1800 (3UL/2DL)

@29.50dBm DCS1800 (4UL/1DL)

@29.34dBm PCS1900 (1UL/4DL)

@29.58dBm PCS1900 (2UL/3DL)

@29.48dBm PCS1900 (3UL/2DL)

@29.31dBm PCS1900 (4UL/1DL)

@29.40dBm 130 561 521 551 478 267 388 503 574 266 396 509 583 205 316 398 530 182 285 385 498 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC20_Hardware_Design 99 / 130 Smart LTE Module Series SC20 Hardware Design GSM850 (1UL/4DL)

@26.70dBm GSM850 (2UL/3DL)

@27.02dBm GSM850 (3UL/2DL)

@26.60dBm GSM850 (4UL/1DL)

@26.33dBm EGSM900 (1UL/4DL)

@26.87dBm EGSM900 (2UL/3DL)

@27.27dBm EGSM900 (3UL/2DL)

@26.85dBm EGSM900 (4UL/1DL)

@26.53dBm DCS1800 (1UL/4DL)

@25.39dBm DCS1800 (2UL/3DL)

@25.40dBm DCS1800 (3UL/2DL)

@25.35dBm DCS1800 (4UL/1DL)

@25.05dBm PCS1900 (1UL/4DL)

@26.03dBm PCS1900 (2UL/3DL)

@26.07dBm PCS1900 (3UL/2DL)

@25.81dBm PCS1900 (4UL/1DL)

@25.70dBm B1 (HSDPA)

@23.02dBm B2 (HSDPA)

@23.11dBm B5 (HSDPA)

@22.68dBm B8 (HSDPA)

@22.72dBm B1 (HSUPA)

@22.39dBm 166 300 389 457 178 276 394 490 197 287 373 461 168 257 345 436 517 550 486 466 521 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA EDGE data transfer WCDMA data transfer SC20_Hardware_Design 100 / 130 Smart LTE Module Series SC20 Hardware Design B2 (HSUPA)

@23.19dBm B5 (HSUPA)

@22.44dBm B8 (HSUPA)

@22.25dBm LTE-FDD B1

@23.37dBm LTE-FDD B3

@23.06dBm LTE-FDD B5

@23.25dBm LTE-FDD B7

@22.82dBm LTE-FDD B8

@23.47dBm LTE-FDD B28

@23.13dBm LTE-TDD B40

@23.24dBm LTE data transfer Table 49: SC20-JL Current Consumption Parameter Description Conditions OFF state Power down IVBAT WCDMA supply current LTE-FDD supply current Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 Sleep (USB disconnected) DRX=8 Sleep (USB disconnected) DRX=9 Sleep (USB disconnected) DRX=5 Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 Sleep (USB disconnected) 2.16 509 503 474 698 709 643 802 620 756 388 Typ. 20 3.07 2.41 2.11 1.95 5.17 3.50 2.60 mA mA mA mA mA mA mA mA mA mA Unit uA mA mA mA mA mA mA mA mA SC20_Hardware_Design 101 / 130 Smart LTE Module Series SC20 Hardware Design LTE-TDD supply current WCDMA voice call DRX=8 Sleep (USB disconnected) DRX=5 Sleep (USB disconnected) DRX=6 Sleep (USB disconnected) DRX=7 Sleep (USB disconnected) DRX=8 B1 (max power)

@22.80dBm B6 (max power)

@23.09dBm B8 (max power)

@23.02dBm B19 (max power)

@23.07dBm B1 (HSDPA)

@22.13dBm B6 (HSDPA)

@22.05dBm B8 (HSDPA)

@22.17dBm B19 (HSDPA)

@22.31dBm B1 (HSUPA)

@21.4dBm B6 (HSUPA)

@22.05dBm B8 (HSUPA)

@21.57dBm B19 (HSUPA)

@22.14dBm LTE-FDD B1

@23.64dBm LTE-FDD B3

@23.52dBm LTE-FDD B8

@23.40dBm LTE-FDD B18

@23.45dBm WCDMA data transfer LTE data transfer 5.40 3.53 2.62 2.17 460 505 504 505 482 477 471 500 494 499 472 496 636 673 637 650 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC20_Hardware_Design 102 / 130 Smart LTE Module Series SC20 Hardware Design LTE-FDD B19

@23.42dBm LTE-FDD B26

@23.36dBm LTE-TDD B41

@23.23dBm 642 645 451 mA mA mA GSM850 EGSM900 DCS1800 PCS1900 WCDMA B1 WCDMA B2 WCDMA B4 WCDMA B5 WCDMA B6 WCDMA B8 7.6. RF Output Power The following table shows the RF output power of SC20 module. Table 50: RF Output Power Frequency Max. 33dBm2dB 33dBm2dB 30dBm2dB 30dBm2dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB 24dBm+1/-3dB Min. 5dBm5dB 5dBm5dB 0dBm5dB 0dBm5dB

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm

<-49dBm WCDMA B19 24dBm+1/-3dB EVDO/CDMA BC0 24dBm+3/-1dB TD-SCDMA B34 24dBm+1/-3dB TD-SCDMA B39 24dBm+1/-3dB SC20_Hardware_Design 103 / 130 Smart LTE Module Series SC20 Hardware Design 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB 23dBm2dB

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm

<-39dBm LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B7 LTE-FDD B8 LTE-FDD B12 LTE-FDD B13 LTE-FDD B18 LTE-FDD B19 LTE-FDD B20 LTE-FDD B25 LTE-FDD B26 LTE-FDD B28 LTE-TDD B38 LTE-TDD B39 LTE-TDD B40 LTE-TDD B41 NOTE In GPRS 4 slots TX mode, the maximum output power is reduced by 3dB. This design conforms to the GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1. SC20_Hardware_Design 104 / 130 Smart LTE Module Series SC20 Hardware Design 7.7. RF Receiving Sensitivity The following table shows the RF receiving sensitivity of SC20 module. Table 51: SC20-CE R1.1 RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) Primary Diversity SIMO 3GPP (SIMO) EGSM900

-109dBm

DCS1800

-109dBm WCDMA B1

-110dBm WCDMA B8

-110dBm EVDO/CDMA BC0

-108dBm TD-SCDMA B34

-113dBm TD-SCDMA B39

-113dBm

-102dBm

-102dBm

-106.7dBm

-103.7dBm

-104dBm

-108dBm

-108dBm LTE-FDD B1 (10M)

-98dBm

-99.1dBm

-100.6dBm

-96.3dBm LTE-FDD B3 (10M)

-98dBm

-98.1dBm

-101dBm

-93.3dBm LTE-FDD B5 (10M)

-98.3dBm

-99.5dBm

-101.7dBm

-94.3dBm LTE-FDD B8 (10M)

-98.2dBm

-99dBm

-101dBm

-93.3dBm LTE-TDD B38 (10M)

-98.3dBm

-98dBm

-99dBm

-96.3dBm LTE-TDD B39 (10M)

-98.5dBm

-98.8dBm

-99.5dBm

-96.3dBm LTE-TDD B40 (10M)

-98.8dBm

-98.6dBm

-101dBm

-96.3dBm LTE-TDD B41 (10M)

-98.5dBm

-98dBm

-101dBm

-94.3dBm SC20_Hardware_Design 105 / 130

-102dBm

-102dBm

-102dBm

-102dBm

-106.7dBm

-104.7dBm

-103.7dBm Smart LTE Module Series SC20 Hardware Design Table 52: SC20-EL RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) Primary Diversity SIMO 3GPP (SIMO) GSM850

-109dBm EGSM900

-109dBm

DCS1800 PCS1900

-109dBm

-109dBm WCDMA B1

-110dBm WCDMA B5

-110dBm WCDMA B8

-110dBm LTE-FDD B1 (10M)

-98dBm

-99dBm

-102dBm

-96.3dBm LTE-FDD B3 (10M)

-97dBm

-98dBm

-101dBm

-93.3dBm LTE-FDD B5 (10M)

-99dBm

-98dBm

-102dBm

-94.3dBm LTE-FDD B7 (10M)

-97dBm

-97dBm

-102dBm

-94.3dBm LTE-FDD B8 (10M)

-98dBm

-98dBm

-101dBm

-93.3dBm LTE-FDD B20 (10M)

-98dBm

-98dBm

-101dBm

-93.3dBm LTE-TDD B38 (10M)

-97dBm

-98dBm

-100dBm

-96.3dBm LTE-TDD B40 (10M)

-97dBm

-98dBm

-100dBm

-96.3dBm LTE-TDD B41 (10M)

-96dBm

-98dBm

-100dBm

-94.3dBm Table 53: SC20-AL RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) Primary Diversity SIMO GSM850

-109.5dBm PCS1900

-109dBm 3GPP (SIMO)

-102dBm

-102dBm WCDMA B1

-110dBm

-110dBm

-113dBm

-106.7dBm WCDMA B2

-110dBm

-110dBm

-113dBm

-104.7dBm SC20_Hardware_Design 106 / 130

Smart LTE Module Series SC20 Hardware Design WCDMA B4

-110dBm

-110dBm

-113dBm

-106.7dBm WCDMA B5

-110dBm

-111dBm

-113dBm

-104.7dBm WCDMA B8

-110dBm

-103.7dBm LTE-FDD B2 (10M)

-98dBm

-99dBm

-102dBm

-94.3dBm LTE-FDD B4 (10M)

-97.5dBm

-98dBm

-101dBm

-96.3dBm LTE-FDD B5 (10M)

-99.5dBm

-99.5dBm

-102.5dBm

-94.3dBm LTE-FDD B7 (10M)

-97dBm

-99dBm

-100dBm

-94.3dBm LTE-FDD B12 (10M)

-98.5dBm

-98.5dBm

-101dBm

-93.3dBm LTE-FDD B13 (10M)

-96.5dBm

-99dBm

-101dBm

-93.3dBm LTE-TDD B25 (10M)

-99dBm

-99dBm

-102dBm

-92.8dBm LTE-TDD B26 (10M)

-99dBm

-100dBm

-102.5dBm

-93.8dBm Table 54: SC20-AUL RF Receiving Sensitivity Receive Sensitivity (Typ.) Primary Diversity SIMO 3GPP (SIMO) Frequency GSM850 EGSM900 DCS1800 PCS1900

-109dBm

-109dBm

-108dBm

-109dBm

-102dBm

-102dBm

-102dBm

-102dBm WCDMA B1

-110dBm

-110dBm

-113dBm

-106.7dBm WCDMA B2

-110dBm

-104.7dBm WCDMA B5

-110dBm

-110dBm

-113dBm

-104.7dBm WCDMA B8

-110dBm

-110dBm

-113dBm

-103.7dBm LTE-FDD B1 (10M)

-98dBm

-99dBm

-101dBm

-96.3dBm LTE-FDD B3 (10M)

-97dBm

-98dBm

-101.8dBm

-93.3dBm LTE-FDD B5 (10M)

-99dBm

-100dBm

-103dBm

-94.3dBm SC20_Hardware_Design 107 / 130 Smart LTE Module Series SC20 Hardware Design LTE-FDD B7 (10M)

-97dBm

-99dBm

-100.6dBm

-94.3dBm LTE-FDD B8 (10M)

-98dBm

-100dBm

-102dBm

-93.3dBm LTE-FDD B28 (10M)

-97.5dBm

-100dBm

-101.8dBm

-94.8dBm LTE-TDD B40 (10M)

-97dBm

-98dBm

-100.7dBm

-96.3dBm Table 55: SC20-JL RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) Primary Diversity SIMO 3GPP (SIMO) WCDMA B1

-110dBm

-110dBm

-113dBm

-106.7dBm WCDMA B6

-110dBm

-112dBm

-113dBm

-106.7dBm WCDMA B8

-110dBm

-110dBm

-113dBm

-103.7dBm WCDMA B19

-110dBm

-111dBm

-113dBm

-106.7dBm LTE-FDD B1 (10M)

-97dBm

-97.5dBm

-100dBm

-96.3dBm LTE-FDD B3 (10M)

-97dBm

-98dBm

-101.8dBm

-93.3dBm LTE-FDD B8 (10M)

-97dBm

-98dBm

-100dBm

-93.3dBm LTE-FDD B18 (10M)

-98dBm

-99dBm

-101.5dBm

-96.3dBm LTE-TDD B19 (10M)

-98dBm

-99dBm

-101.5dBm

-96.3dBm LTE-TDD B26 (10M)

-98dBm

-99dBm

-101.5dBm

-93.8dBm LTE-TDD B41 (10M)

-96dBm

-96.5dBm

-100dBm

-94.3dBm 7.8. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it should be subject to ESD handling precautions that are typically applied to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the electrostatic discharge characteristics of SC20 module. SC20_Hardware_Design 108 / 130 Smart LTE Module Series SC20 Hardware Design Table 56: ESD Characteristics ( Temperature: 25C, Humidity: 45%) Tested Points Contact Discharge Air Discharge Unit VBAT, GND

+/-5 All Antenna Interfaces

+/-5 USB Interface Other Interfaces

+/-0.5

+/-0.5

+/-10

+/-10

+/-1

+/-1 KV KV KV KV SC20_Hardware_Design 109 / 130 Smart LTE Module Series SC20 Hardware Design 8 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the tolerances for dimensions without tolerance values are 0.05mm. 8.1. Mechanical Dimensions of the Module Figure 42: Module Top and Side Dimensions SC20_Hardware_Design 110 / 130 Smart LTE Module Series SC20 Hardware Design Figure 43: Module Bottom Dimensions (Top View) SC20_Hardware_Design 111 / 130 Smart LTE Module Series SC20 Hardware Design 8.2. Recommended Footprint Figure 44: Recommended Footprint (Top View) NOTES on host PCB. 1. For easy maintenance of the module, keep about 3mm between the module and other components 2. All RESERVED pins should be kept open and MUST NOT be connected to ground. SC20_Hardware_Design 112 / 130 Smart LTE Module Series SC20 Hardware Design 8.3. Top and Bottom Views of the Module Figure 45: Top View of the Module Figure 46: Bottom View of the Module NOTE These are renderings of SC20 module. For authentic dimension and appearance, please refer to the module that you receive from Quectel. SC20_Hardware_Design 113 / 130 Smart LTE Module Series SC20 Hardware Design 9 Storage, Manufacturing and Packaging 9.1. Storage SC20 is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40C/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:

Mounted within 168 hours at the factory environment of 30C/60%RH. Stored at <10%RH. 3. Devices require baking before mounting, if any circumstance below occurs. When the ambient temperature is 23C5C and the humidity indication card shows the humidity is >10% before opening the vacuum-sealed bag. Device mounting cannot be finished within 168 hours at factory conditions of 30C/60%RH. If baking is required, devices may be baked for 8 hours at 120C5C. As the plastic package cannot be subjected to high temperature, it should be removed from devic es before high temperature (120C) baking. If shorter baking time is desired, please refer to IPC/J EDECJ-STD-033 for baking procedure. NOTE 4. SC20_Hardware_Design 114 / 130 Smart LTE Module Series SC20 Hardware Design 9.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.18mm~0.20mm. It is recommended to slightly reduce the amount of solder paste for LGA pads, thus avoiding short-circuit. For more details, please refer to document [3]. It is suggested that the peak reflow temperature is 240~245C, and the absolute maximum reflow temperature is 245C. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below:

Figure 47: Recommended Reflow Soldering Thermal Profile Table 57: Recommended Thermal Profile Parameters Factor Soak Zone Max slope Recommendation 1 to 3C/sec SC20_Hardware_Design 115 / 130 Temp. (C) 245 240 220 200 150 100 Soak Zone A Max slope: 1~3C/sec Reflow Zone Max slope:

2~3C/sec C Cooling down slope: 1~4C/sec B D Smart LTE Module Series SC20 Hardware Design Soak time (between A and B: 150C and 200C) 60 to 120 sec Reflow Zone Max slope Reflow time (D: over 220C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle 2 to 3C/sec 40 to 60 sec 240C ~ 245C 1 to 4C/sec 1 SC20_Hardware_Design 116 / 130 Smart LTE Module Series SC20 Hardware Design 9.3. Packaging SC20 is packaged in tape and reel carriers. Each reel is 12.32m long and contains 200 modules. The following figures show the package details, measured in mm. Figure 48: Tape Dimensions Figure 49: Reel Dimensions SC20_Hardware_Design 117 / 130 Smart LTE Module Series SC20 Hardware Design Table 58: Reel Packaging Model Name SC20 200 MOQ for MP Minimum Package: 200pcs Minimum Package 4=800pcs Size: 370mm 350mm 85mm N.W: 1.92kg G.W: 3.17kg Size: 380mm 365mm 365mm N.W: 7.68kg G.W: 13.63kg SC20_Hardware_Design 118 / 130 Smart LTE Module Series SC20 Hardware Design 10 Appendix A References Table 59: Related Documents SN Document Name Remark

[1]

Quectel_Smart_EVB_User_Guide Smart EVB user guide

[2]

Quectel_RF_Layout_Application_Note RF layout application note

[3]

Quectel_Module_Secondary_SMT_User_Guide Module secondary SMT user guide

[4]

Quectel_SC20_Reference_Design SC20 reference design Table 60: Terms and Abbreviations Abbreviation Description Analog-to-Digital Converter Adaptive Multi-rate Antenna Reference Point Bits Per Second Coding Scheme Circuit Switched Data Clear to Send Discontinuous Reception Enhanced Full Rate ADC AMR ARP bps CS CSD CTS DRX EFR EGSM eSCD Extended GSM900 band (includes standard GSM900 band) Enhanced Synchronous Connection Oriented SC20_Hardware_Design 119 / 130 Smart LTE Module Series SC20 Hardware Design ESD FR GMSK GPS GSM HR HSPA I/O LNA MO MS MT PCB PDU PSK QAM QPSK RF RH RHCP RTC Rx SDIO SIM SMS Electrostatic Discharge Full Rate Gaussian Minimum Shift Keying Global Positioning System Global System for Mobile Communications Half Rate High Speed Packet Access Input/Output Low Noise Amplifier Mobile Originated Mobile Station (GSM engine) Mobile Terminated Printed Circuit Board Protocol Data Unit Phase Shift Keying Quadrature Amplitude Modulation Quadrature Phase Shift Keying Radio Frequency Room Humidity Real Time Clock Receive Right Hand Circularly Polarized Secure Digital Input and Output Subscriber Identification Module Short Message Service SC20_Hardware_Design 120 / 130 Smart LTE Module Series SC20 Hardware Design TP TX UART UMTS

(U)SIM Vmax Vnorm Vmin VIHmin VILmax VOHmax VOHmin VSWR Touch Panel Transmit Universal Asynchronous Receiver & Transmitter Universal Mobile Telecommunications System Universal Subscriber Identity Module Maximum Voltage Value Normal Voltage Value Minimum Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Maximum Output High Level Voltage Value Minimum Output High Level Voltage Value Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access SC20_Hardware_Design 121 / 130 Smart LTE Module Series SC20 Hardware Design Scheme Code Rate USF Pre-coded USF BCS Tail Coded Bits Punctured Bits Data Rate Kb/s 11 Appendix B GPRS Coding Schemes Table 61: Description of Different Coding Schemes Radio Block excl.USF and BCS 181 CS-1 1/2 3 3 40 4 456 0 9.05 CS-2 2/3 3 6 268 16 4 588 132 13.4 CS-3 3/4 3 6 312 16 4 676 220 15.6 C4-4 1 3 12 428 16

456 21.4 SC20_Hardware_Design 122 / 130 Smart LTE Module Series SC20 Hardware Design 12 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 62: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 2 3 2 3 3 4 3 4 4 4 3 4 1 1 2 1 2 2 3 1 2 2 3 4 3 4 2 3 3 4 4 4 4 5 5 5 5 5 NA NA SC20_Hardware_Design 123 / 130 Smart LTE Module Series SC20 Hardware Design 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 5 6 7 8 6 6 6 6 6 8 8 8 8 8 8 5 5 5 5 5 6 7 8 2 3 4 4 6 2 3 4 4 6 8 1 2 3 4 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 6 6 6 6 SC20_Hardware_Design 124 / 130 Smart LTE Module Series SC20 Hardware Design CS-1 CS-2 CS-3 CS-4 MCS-1 MCS-2 MCS-3 MCS-4 MCS-5 MCS-6 MCS-7 MCS-8 MCS-9 13 Appendix D EDGE Modulation and Coding Schemes Table 63: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot GMSK GMSK GMSK GMSK GMSK GMSK GMSK GMSK 8-PSK 8-PSK 8-PSK 8-PSK 8-PSK

C B A C B A B A A 9.05kbps 18.1kbps 36.2kbps 13.4kbps 26.8kbps 53.6kbps 15.6kbps 31.2kbps 62.4kbps 21.4kbps 42.8kbps 85.6kbps 8.80kbps 17.60kbps 35.20kbps 11.2kbps 22.4kbps 44.8kbps 14.8kbps 29.6kbps 59.2kbps 17.6kbps 35.2kbps 70.4kbps 22.4kbps 44.8kbps 89.6kbps 29.6kbps 59.2kbps 118.4kbps 44.8kbps 89.6kbps 179.2kbps 54.4kbps 108.8kbps 217.6kbps 59.2kbps 118.4kbps 236.8kbps 1 the characteristic impedence depends on the dielectric of PCB, the trace width and the grand plane spacing,Coated Coplanar Line is required.the detail simulation as below. SC20_Hardware_Design 125 / 130 Smart LTE Module Series SC20 Hardware Design 2 the RF trace of the test board which was used in the FCC test is defined as below. 3 the characteristic impedence depends on the dielectric of PCB, the trace width and the grand plane spacing,Coated Coplanar Line is required.the detail simulation as below. SC20_Hardware_Design 126 / 130 Smart LTE Module Series SC20 Hardware Design 4 the RF trace of the test board which was used in the FCC test is defined as below. SC20_Hardware_Design 127 / 130

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Quectel Wireless Solutions Company Limited Building 5, Shanghai Business Park PhaseIII, (Area B),No.1016 Tianlin Road, Minhang District, Shanghai 200233 China Date: December 23, 2019 Federal Communications Commission Office of Engineering and Technology Laboratory Division 7435 Oakland Mills Rd Columbia MD 21046-1609 Attention: Application Examiner / Review Engineer Subject: Request for a Change in Identification per Section 2.933 of the FCC Rules To The Commission:

This change in identification request applies for a new FCC ID as established in 47 CFR 2.933(b) for a currently approved device. This application by Quectel Wireless Solutions Company Limited will establish a new FCC ID: XMR201911SC20AL for the purpose of marketing. The original grant with FCC ID:XMR201706SC20A, will remain in effect. An authorization letter by Quectel Wireless Solutions Company Limited is attached. Per 2.933(b) 1.) The original identification is: FCC ID: XMR201706SC20A 2.) The original granted date is: 08/14/2017 3.) The equipment is electrically identical. 4.) The original test results are applicable and representative of this device 5.) FCC ID label, location info, External and Internal photos are included in this application. The following files are electronically submitted as attachments:

- Cover Letter

- ID Label and Location Info

- External and Internal photos

-Test reports

-User Manual/Tune pro Sincerely yours, Contact Person: Jean Hu Company: Quectel Wireless Solutions Company Limited TEL: +8602150086326 Ext: 800 FAX: +862153253668 E-mail: jean.hu@quectel.com