all | frequencies |
|
|
|
|
|
exhibits | applications |
---|---|---|---|---|---|---|---|---|
manual | photos | labels |
app s | submitted / available | |||||||
---|---|---|---|---|---|---|---|---|
1 2 3 |
|
User Guide r2 | Users Manual | 3.38 MiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
InPho | Internal Photos | 809.96 KiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
ExPho | External Photos | 667.77 KiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
Label | ID Label/Location Info | 89.06 KiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
Label Location | ID Label/Location Info | 30.04 KiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
Request for Modular Approval per section 15.212 requirements | Cover Letter(s) | 102.53 KiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
Antenna Spec r2 | Test Report | 1.23 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
MPE Rpt r2 | RF Exposure Info | 373.74 KiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt DSS BT Part1-2 r2 | Test Report | 5.48 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt DSS BT Part2-2 | Test Report | 1.57 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
Tsup Antenna Spec | Test Setup Photos | 278.79 KiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
Tsup DSS BT | Test Setup Photos | 276.75 KiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
cvrltr FCC Long-term Confidentiality | Cover Letter(s) | 68.37 KiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
Power of Attorney Letter | Cover Letter(s) | 81.63 KiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
cvrltr FCC Short-term Confidentiality | Cover Letter(s) | 82.15 KiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt NII DFS | Test Report | 1.02 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt NII U-NII-1,2,3 Part1-4 r2 | Test Report | 5.46 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt NII U-NII-1,2,3 Part2-4 | Test Report | 5.46 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt NII U-NII-1,2,3 Part3-4 | Test Report | 5.47 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt NII U-NII-1,2,3 Part4-4 | Test Report | 1.79 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
Tsup NII DFS | Test Setup Photos | 77.49 KiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
Tsup NII U-NII-1,2,3 | Test Setup Photos | 275.04 KiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
TestRpt DTS BLE r2 | Test Report | 4.78 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt DTS WLAN 2.4G Part1-2 r2 | Test Report | 5.47 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
TestRpt DTS WLAN 2.4G Part2-2 | Test Report | 3.13 MiB | January 10 2023 / January 13 2023 | |||
1 2 3 |
|
Tsup DTS BLE | Test Setup Photos | 278.00 KiB | January 10 2023 / July 12 2023 | delayed release | ||
1 2 3 |
|
Tsup DTS WLAN 2.4G | Test Setup Photos | 274.71 KiB | January 10 2023 / July 12 2023 | delayed release |
1 2 3 | User Guide r2 | Users Manual | 3.38 MiB | January 10 2023 / July 12 2023 | delayed release |
WARNING:pdfminer.pdfpage:The PDF <_io.BufferedReader name='/Volumes/Scratch/Incoming/eg-scratch/6320267.pdf'> contains a metadata field indicating that it should not allow text extraction. Ignoring this field and proceeding. Use the check_extractable if you want to raise an error in this case SC668S Series Hardware Design Smart Module Series Version: 1.0.0 Date: 2022-04-20 Status: Preliminary Smart Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters:
Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local offices. For more information, please visit:
http://www.quectel.com/support/sales.htm. For technical support, or to report documentation errors, please visit:
http://www.quectel.com/support/technical.htm. Or email us at: support@quectel.com. Legal Notices We offer information as a service to you. The provided information is based on your requirements and we make every effort to ensure its quality. You agree that you are responsible for using independent analysis and evaluation in designing intended products, and we provide reference designs for illustrative purposes only. Before using any hardware, software or service guided by this document, please read this notice carefully. Even though we employ commercially reasonable efforts to provide the best possible experience, you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as available basis. We may revise or restate this document from time to time at our sole discretion without any prior notice to you. Use and Disclosure Restrictions License Agreements Documents and information provided by us shall be kept confidential, unless specific permission is granted. They shall not be accessed or used for any purpose except as expressly provided herein. Copyright Our and third-party products hereunder may contain copyrighted material. Such copyrighted material shall not be copied, reproduced, distributed, merged, published, translated, or modified without prior written consent. We and the third party have exclusive rights over copyrighted material. No license shall be granted or conveyed under any patents, copyrights, trademarks, or service mark rights. To avoid ambiguities, purchasing in any form cannot be deemed as granting a license other than the normal non-exclusive, royalty-free license to use the material. We reserve the right to take legal action for noncompliance with abovementioned requirements, unauthorized use, or other illegal or malicious use of the material. SC668S_Series_Hardware_Design 1 / 118 Smart Module Series Trademarks Except as otherwise set forth herein, nothing in this document shall be construed as conferring any rights to use any trademark, trade name or name, abbreviation, or counterfeit product thereof owned by Quectel or any third party in advertising, publicity, or other aspects. Third-Party Rights This document may refer to hardware, software and/or documentation owned by one or more third parties
(third-party materials). Use of such third-party materials shall be governed by all restrictions and obligations applicable thereto. We make no warranty or representation, either express or implied, regarding the third-party materials, including but not limited to any implied or statutory, warranties of merchantability or fitness for a particular purpose, quiet enjoyment, system integration, information accuracy, and non-infringement of any third-party intellectual property rights with regard to the licensed technology or use thereof. Nothing herein constitutes a representation or warranty by us to either develop, enhance, modify, distribute, market, sell, offer for sale, or otherwise maintain production of any our products or any other hardware, software, device, tool, information, or product. We moreover disclaim any and all warranties arising from the course of dealing or usage of trade. Privacy Policy To implement module functionality, certain device data are uploaded to Quectels or third-partys servers, including carriers, chipset suppliers or customer-designated servers. Quectel, strictly abiding by the relevant laws and regulations, shall retain, use, disclose or otherwise process relevant data for the purpose of performing the service only or as permitted by applicable laws. Before data interaction with third parties, please be informed of their privacy and data security policy. Disclaimer a) We acknowledge no liability for any injury or damage arising from the reliance upon the information. b) We shall bear no liability resulting from any inaccuracies or omissions, or from the use of the information contained herein. c) While we have made every effort to ensure that the functions and features under development are free from errors, it is possible that they could contain errors, inaccuracies, and omissions. Unless otherwise provided by valid agreement, we make no warranties of any kind, either implied or express, and exclude all liability for any loss or damage suffered in connection with the use of features and functions under development, to the maximum extent permitted by law, regardless of whether such loss or damage may have been foreseeable. d) We are not responsible for the accessibility, safety, accuracy, availability, legality, or completeness of information, advertising, commercial offers, products, services, and materials on third-party websites and third-party resources. Copyright Quectel Wireless Solutions Co., Ltd. 2022. All rights reserved. SC668S_Series_Hardware_Design 2 / 118 Smart Module Series Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions, such as when the mobile bill is unpaid or the (U)SIM card is invalid. When emergency help is needed in such conditions, use emergency call if the device supports it. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. In an emergency, the device with emergency call function cannot be used as the only contact method considering network connection cannot be guaranteed under all circumstances. The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as mobile phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders. SC668S_Series_Hardware_Design 3 / 118 Smart Module Series About the Document Revision History Version Date Author Description
2022-04-20 Lemon LIU/Bobi JIANG Creation of the document 1.0.0 2022-04-20 Lemon LIU/Bobi JIANG Preliminary SC668S_Series_Hardware_Design 4 / 118 Smart Module Series Contents Safety Information ....................................................................................................................................... 3 About the Document ................................................................................................................................... 4 Contents ....................................................................................................................................................... 5 Table Index ................................................................................................................................................... 8 Figure Index ............................................................................................................................................... 10 1 Introduction ........................................................................................................................................ 12 1.1. Special Marks ............................................................................................................................ 16 2 Product Overview .............................................................................................................................. 17 2.1. Frequency Bands and Functions .............................................................................................. 18 2.2. Key Features ............................................................................................................................. 18 2.3. Functional Diagram ................................................................................................................... 21 2.4. Pin Assignment ......................................................................................................................... 22 2.5. Pin Description .......................................................................................................................... 23 2.6. EVB Kit ...................................................................................................................................... 36 3 Operating Characteristics ................................................................................................................. 37 3.1. Power Supply ............................................................................................................................ 37 3.1.1. Power Supply Pins ......................................................................................................... 37 3.1.2. Reference Design for Power Supply .............................................................................. 37 3.1.3. Voltage Stability Requirements ...................................................................................... 38 3.2. Turn On ..................................................................................................................................... 39 3.2.1. Turn On with PWRKEY .................................................................................................. 39 3.2.2. Turn On the Module Automatically ................................................................................ 41 3.3. Turn Off/Restart ........................................................................................................................ 42 3.4. VRTC ......................................................................................................................................... 42 3.5. Power Output ............................................................................................................................ 43 4 Application Interfaces ....................................................................................................................... 45 4.1. USB Interface ............................................................................................................................ 45 4.1.1. USB Type-C Mode ......................................................................................................... 45 4.1.2. Micro USB Interface ....................................................................................................... 47 4.1.3. Design Principles for USB Interfaces ............................................................................. 48
(U)SIM Interfaces ...................................................................................................................... 49 4.2. 4.3. SD Card Interface ..................................................................................................................... 52 4.4. GPIO Interfaces ........................................................................................................................ 54 4.5. UART Interfaces ........................................................................................................................ 55 4.6. SPI Interfaces ............................................................................................................................ 57 I2C Interfaces ............................................................................................................................ 57 4.7. I2S Interfaces ............................................................................................................................ 58 4.8. 4.9. Multiplexing Relationship of UART/SPI/I2C/I2S ....................................................................... 59 4.10. ADC Interfaces .......................................................................................................................... 60 SC668S_Series_Hardware_Design 5 / 118 Smart Module Series 4.11. LCM Interface ............................................................................................................................ 61 4.12. Touch Panel Interface ............................................................................................................... 63 4.13. Camera Interfaces..................................................................................................................... 64 4.14. Sensor Interfaces ...................................................................................................................... 72 4.15. Audio Interfaces ........................................................................................................................ 73 4.15.1. Reference Design for Microphone Interfaces ................................................................ 74 4.15.2. Reference Design for Headset Interface ....................................................................... 75 4.15.3. Reference Design for Headphone Interface .................................................................. 75 4.15.4. Reference Design for Loudspeaker Interface ................................................................ 76 4.15.5. Audio Interfaces Design Considerations........................................................................ 76 4.16. Emergency Download Interface ................................................................................................ 77 5 Antenna Interfaces ............................................................................................................................. 78 5.1. Cellular Network ........................................................................................................................ 78 5.1.1. Antenna Interface & Frequency Bands .......................................................................... 78 5.1.2. Tx Power ........................................................................................................................ 80 5.1.3. Rx Sensitivity .................................................................................................................. 81 5.1.4. Reference Design of Cellular Antenna Interface ........................................................... 83 5.2. GNSS ........................................................................................................................................ 83 5.2.1. Antenna Interface & Frequency Bands .......................................................................... 83 5.2.2. GNSS Performance ....................................................................................................... 84 5.2.3. Reference Design .......................................................................................................... 85 5.2.3.1. Reference Design for GNSS Passive Antenna .................................................. 85 5.2.3.2. Reference Design for GNSS Active Antenna ..................................................... 85 5.2.3.3. GNSS RF Design Guidelines .............................................................................. 86 5.3. Wi-Fi and Bluetooth................................................................................................................... 87 5.3.1. Wi-Fi Overview ............................................................................................................... 87 5.3.2. Bluetooth Overview ........................................................................................................ 90 5.3.3. Reference Design .......................................................................................................... 91 5.4. RF Routing Guidelines .............................................................................................................. 91 5.5. Antenna Design Requirement ................................................................................................... 93 5.6. RF Connector Recommendation .............................................................................................. 94 6 Electrical Characteristics and Reliability ........................................................................................ 96 6.1. Absolute Maximum Ratings ...................................................................................................... 96 6.2. Power Supply Ratings ............................................................................................................... 96 6.3. Power consumption .................................................................................................................. 97 6.4. Digital I/O Characteristics ....................................................................................................... 101 6.5. ESD Protection ........................................................................................................................ 102 6.6. Operating and Storage Temperatures .................................................................................... 103 7 Mechanical Information ................................................................................................................... 104 7.1. Mechanical Dimensions .......................................................................................................... 104 7.2. Recommended Footprint ........................................................................................................ 106 7.3. Top and Bottom Views ............................................................................................................ 107 SC668S_Series_Hardware_Design 6 / 118 Smart Module Series 8 Storage, Manufacturing & Packaging ............................................................................................ 108 8.1. Storage Conditions.................................................................................................................. 108 8.2. Manufacturing and Soldering .................................................................................................. 109 8.3. Packaging Specification .......................................................................................................... 111 8.3.1. Carrier Tape ................................................................................................................. 111 8.3.2. Plastic Reel .................................................................................................................. 111 8.3.3. Packaging Process ...................................................................................................... 112 9 Appendix References ...................................................................................................................... 113 SC668S_Series_Hardware_Design 7 / 118 Smart Module Series Table Index Table 1: Special Marks ............................................................................................................................... 16 Table 2: Brief Introduction of the Module ................................................................................................... 17 Table 3: Wireless Network Type ................................................................................................................ 18 Table 4: Key Features ................................................................................................................................ 18 Table 5: Definition of I/O Parameters ......................................................................................................... 23 Table 6: Pin Description ............................................................................................................................. 23 Table 7: Pin Definition of Power Supply..................................................................................................... 37 Table 8: Pin Definition of PWRKEY ........................................................................................................... 39 Table 9: Pin Definition of CBL_PWR_N ..................................................................................................... 41 Table 10: Pin Definition of VRTC ............................................................................................................... 42 Table 11: Power Description ...................................................................................................................... 44 Table 12: Functions of the USB Interface .................................................................................................. 45 Table 13: Pin Definition of USB Type-C Interface ..................................................................................... 45 Table 14: Pin Definition of Micro USB ........................................................................................................ 47 Table 15: USB Trace Length Inside the Module ........................................................................................ 49 Table 16: Pin Definition of (U)SIM Interface .............................................................................................. 50 Table 17: Pin Definition of SD Card Interface ............................................................................................ 52 Table 18: SD Card Signal Trace Length Inside the Module ...................................................................... 53 Table 19: Pin Definition of GPIOs .............................................................................................................. 54 Table 20: Pin Definition of UART ............................................................................................................... 55 Table 21: Pin Definition of SPI Interfaces .................................................................................................. 57 Table 22: Pin Definition of I2C Interfaces .................................................................................................. 58 Table 23: Pin Definition of I2S Interface .................................................................................................... 58 Table 24: Multiplexing Relationship of UART/SPI/I2C/I2S ........................................................................ 59 Table 25: Pin Definition of ADC Interfaces ................................................................................................ 60 Table 26: Pin Definition of LCM ................................................................................................................. 61 Table 27: Pin Definition of Touch Panel Interfaces.................................................................................... 64 Table 28: Pin Definition of Camera Interfaces ........................................................................................... 65 Table 29: Relationship Between CSI Rate and Trace Length (D-PHY) .................................................... 69 Table 30: Relationship Between DSI Rate and Trace Length (D-PHY) .................................................... 70 Table 31: Trace Length of MIPI Differential Pairs Inside the Module ........................................................ 70 Table 32: Pin Definition of Sensor Interfaces ............................................................................................ 72 Table 33: Pin Definition of Audio Interfaces ............................................................................................... 73 Table 34: Pin Definition of USB_BOOT ..................................................................................................... 77 Table 35: Pin Definition of Cellular Network Interface ............................................................................... 78 Table 36: Operating Frequency of SC668S-CN ........................................................................................ 78 Table 37: Operating Frequency of SC668S-EM ........................................................................................ 79 Table 38: Tx Power of SC668S-CN ........................................................................................................... 80 Table 39: Tx Power of SC668S-EM ........................................................................................................... 80 Table 40: Conducted RF Rx Sensitivity of SC668S-CN ............................................................................ 81 Table 41: Conducted RF Rx Sensitivity of SC668S-EM ............................................................................ 82 SC668S_Series_Hardware_Design 8 / 118 Smart Module Series Table 42: Pin Definition of GNSS Antenna Interface ................................................................................. 83 Table 43: Operating Frequency ................................................................................................................. 84 Table 44: GNSS Performance ................................................................................................................... 84 Table 45: Pin Definition of Wi-Fi/Bluetooth Interfaces ............................................................................... 87 Table 46: Wi-Fi/Bluetooth Frequency ........................................................................................................ 87 Table 47: Wi-Fi Transmitting Performance ................................................................................................ 88 Table 48: Wi-Fi Receiving Performance .................................................................................................... 89 Table 49: Bluetooth Data Rate and Version .............................................................................................. 90 Table 50: Bluetooth Transmitting and Receiving Performance ................................................................. 90 Table 51: Requirements for Antenna Design ............................................................................................. 93 Table 52: Absolute Maximum Ratings ....................................................................................................... 96 Table 53: The Modules Power Supply Ratings ......................................................................................... 96 Table 54: SC668S-CN Power Consumption .............................................................................................. 97 Table 55: SC668S-EM Power Consumption ............................................................................................. 99 Table 56: 1.8 V I/O Requirements ........................................................................................................... 101 Table 57: (U)SIM 1.8 V I/O Requirements ............................................................................................... 101 Table 58: (U)SIM 2.95 V I/O Requirements ............................................................................................. 102 Table 59: Electrostatic Discharge Characteristics (Temperature: 25 C, Humidity: 40 %) ..................... 102 Table 60: Operating and Storage Temperatures ..................................................................................... 103 Table 61: Recommended Thermal Profile Parameters ........................................................................... 110 Table 62: Recommended Thermal Profile Parameters ........................................................................... 111 Table 63: Plastic Reel Dimension Table (Unit: mm) ................................................................................ 112 Table 64: Related Documents .................................................................................................................. 113 Table 65: Terms and Abbreviations ......................................................................................................... 113 SC668S_Series_Hardware_Design 9 / 118 Smart Module Series Figure Index Figure 2: Pin Assignment ........................................................................................................................... 22 Figure 3: Reference Design of Power Supply ............................................................................................ 37 Figure 4: Voltage Drop Sample .................................................................................................................. 38 Figure 5: Structure of Power Supply .......................................................................................................... 39 Figure 6: Turn On the Module Using Driving Circuit .................................................................................. 39 Figure 7: Turn On the Module Using Button .............................................................................................. 40 Figure 8: Power-up Timing ......................................................................................................................... 40 Figure 9: Turn On the Module Automatically ............................................................................................. 41 Figure 10: Power-down Timing .................................................................................................................. 42 Figure 11: RTC Powered by a Rechargeable Cell Battery ........................................................................ 43 Figure 12: RTC Powered by Capacitor ...................................................................................................... 43 Figure 13: USB Type-C Interface Reference Design ................................................................................ 47 Figure 14: Micro-USB Interface Reference Design ................................................................................... 48 Figure 15: Reference Design of (U)SIM Interface with an 8-Pin (U)SIM Card Connector ........................ 51 Figure 16: Reference Design of (U)SIM Interface with a 6-Pin (U)SIM Card Connector .......................... 51 Figure 17: Reference Design for SD Card Interface .................................................................................. 53 Figure 18: Reference Design with Level Translator Chip (for UART00) ................................................... 56 Figure 19: RS-232 Level Match Circuit (for UART00) ............................................................................... 56 Figure 20: LCM External Backlight Driver Reference Design.................................................................... 62 Figure 21: Reference Design for LCM Interface ........................................................................................ 63 Figure 22: Reference Design for TP0 Interface ......................................................................................... 64 Figure 23: Reference Design for Three-Camera Applications................................................................... 68 Figure 24: Reference Design for ECM Microphone Interface.................................................................... 74 Figure 25: Reference Design for MEMS Microphone Interface ................................................................. 74 Figure 26: Reference Design for Headset Interface .................................................................................. 75 Figure 27: Reference Design for Headphone Interface ............................................................................. 75 Figure 28: Reference Design for Loudspeaker Interface ........................................................................... 76 Figure 29: Reference Design for Emergency Download Interface ............................................................ 77 Figure 30: Reference Design for RF Antenna Interfaces .......................................................................... 83 Figure 31: Reference Design for GNSS Passive Antenna ........................................................................ 85 Figure 32: Reference Design for GNSS Active Antenna ........................................................................... 86 Figure 33: Reference Design for Wi-Fi/Bluetooth Antenna ....................................................................... 91 Figure 34: Microstrip Design on a 2-layer PCB ......................................................................................... 91 Figure 35: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 92 Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 92 Figure 37: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 92 Figure 38: Dimensions of the Receptacle (Unit: mm) ................................................................................ 94 Figure 39: Specifications of Mated Plugs (Unit: mm) ................................................................................ 95 Figure 40: Space Factor of Mated Connectors (Unit: mm) ........................................................................ 95 Figure 41: Module Top and Side Dimensions (Unit: mm) ........................................................................ 104 Figure 42: Module Bottom Dimensions (Unit: mm) .................................................................................. 105 SC668S_Series_Hardware_Design 10 / 118 Smart Module Series Figure 43: Recommended Footprint (Top View) ...................................................................................... 106 Figure 44: Top and Bottom Views ............................................................................................................ 107 Figure 45: Recommended Reflow Soldering Thermal Profile ................................................................. 109 Figure 46: Carrier Tape Dimension Drawing ........................................................................................... 111 Figure 47: Plastic Reel Dimension Drawing ............................................................................................ 111 Figure 48: Packaging Process ................................................................................................................. 112 SC668S_Series_Hardware_Design 11 / 118 Smart Module Series 1 Introduction This document defines the SC668S series module and describes its air interfaces and hardware interfaces which connected with your applications. It can help you quickly understand interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, you can use this module to design and to set up mobile applications easily. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
-- Reorient or relocate the receiving antenna.
-- Increase the separation between the equipment and receiver.
-- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
-- Consult the dealer or an experienced radio/TV technician for help. This device complies with FCC radiation exposure limits set forth for an uncontrolled environment. In order to avoid the possibility of exceeding the FCC radio frequency exposure limits, human proximity to the antenna shall not be less than 20cm (8 inches) during normal operation. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify SC668S_Series_Hardware_Design 12 / 118 Smart Module Series compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed. Important Note notice that any deviation(s) from the defined parameters of the antenna trace, as described by the instructions, require that the host product manufacturer must notify to Quectel Wireless Solutions Co., Ltd that they wish to change the antenna trace design. In this case, a Class II permissive change application is required to be filed by the USI, or the host manufacturer can take responsibility through the change in FCC ID (new application) procedure followed by a Class II permissive change application. End Product Labeling When the module is installed in the host device, the FCC/IC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text: Contains FCC ID: XMR2022SC668SWF The FCC ID can be used only when all FCC compliance requirements are met. Antenna Installation
(1) The antenna must be installed such that 20 cm is maintained between the antenna and users,
(2) The transmitter module may not be co-located with any other transmitter or antenna.
(3) Only antennas of the same type and with equal or less gains as shown below may be used with this module. Other types of antennas and/or higher gain antennas may require additional authorization for operation.
(4) The max allowed antenna gain is 0.47 dBi for 2.4G, 1.28 dBi for 5G for Folded Dipole Antenna. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This device complies with ISEDs licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. SC668S_Series_Hardware_Design 13 / 118 Smart Module Series Le prsent appareil est conforme aux CNR d ISED applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes : (1) le dispositif ne doit pas produire de brouillage prjudiciable, et (2) ce dispositif doit accepter tout brouillage reu, y compris un brouillage susceptible de provoquer un fonctionnement indsirable. Radiation Exposure Statement:
This equipment complies with ISED radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator &
your body. Dclaration d'exposition aux radiations:
Cet quipement est conforme aux limites d'exposition aux rayonnements ISED tablies pour un environnement non contrl. Cet quipement doit tre install et utilis avec un minimum de 20 cm de distance entre la source de rayonnement et votre corps. This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Cet appareil est conu uniquement pour les intgrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) 1) L'antenne doit tre installe de telle sorte qu'une distance de 20 cm est respecte entre l'antenne et les utilisateurs, et 2) Le module metteur peut ne pas tre complant avec un autre metteur ou antenne. Tant que les 2 conditions ci-dessus sont remplies, des essais supplmentaires sur l'metteur ne seront pas ncessaires. Toutefois, l'intgrateur OEM est toujours responsable des essais sur son produit final pour toutes exigences de conformit supplmentaires requis pour ce module install. IMPORTANT NOTE:
In the event that these conditions can not be met (for example certain laptop configurations or co- location with another transmitter), then the Canada authorization is no longer considered valid and the IC ID can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate Canada authorization. NOTE IMPORTANTE:
Dans le cas o ces conditions ne peuvent tre satisfaites (par exemple pour certaines configurations d'ordinateur portable ou de certaines co-localisation avec un autre metteur), l'autorisation du Canada SC668S_Series_Hardware_Design 14 / 118 Smart Module Series n'est plus considr comme valide et l'ID IC ne peut pas tre utilis sur le produit final. Dans ces circonstances, l'intgrateur OEM sera charg de rvaluer le produit final (y compris l'metteur) et l'obtention d'une autorisation distincte au Canada. End Product Labeling This transmitter module is authorized only for use in device where the antenna may be installed such that 20 cm may be maintained between the antenna and users. The final end product must be labeled in a visible area with the following: Contains IC: 10224A-22SC668SWF. Plaque signaltique du produit final Ce module metteur est autoris uniquement pour une utilisation dans un dispositif o l'antenne peut tre installe de telle sorte qu'une distance de 20cm peut tre maintenue entre l'antenne et les utilisateurs. Le produit final doit tre tiquet dans un endroit visible avec l'inscription suivante: "Contient des IC:
10224A-22SC668SWF ". Manual Information To the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Manuel d'information l'utilisateur final L'intgrateur OEM doit tre conscient de ne pas fournir des informations l'utilisateur final quant la faon d'installer ou de supprimer ce module RF dans le manuel de l'utilisateur du produit final qui intgre ce module. Le manuel de l'utilisateur final doit inclure toutes les informations rglementaires requises et avertissements comme indiqu dans ce manuel. RSS-247 Section 6.4 (5) (6) (for local area network devices, 5GHz) The device could automatically discontinue transmission in case of absence of information to transmit, or operational failure. Note that this is not intended to prohibit transmission of control or signaling information or the use of repetitive codes where required by the technology. Caution:
i) The device for operation in the band 51505250 MHz is only for indoor use to reduce the potential for harmful interference to co-channel mobile satellite systems;
ii) where applicable, antenna type(s), antenna models(s), and worst-case tilt angle(s) necessary to remain compliant with the e.i.r.p. elevation mask requirement set forth in section 6.2.2.3 shall be clearly indicated. L'appareil peut interrompre automatiquement la transmission en cas d'absence d'informations transmettre ou de panne oprationnelle. Notez que ceci n'est pas destin interdire la transmission d'informations de contrle ou de signalisation ou l'utilisation de codes rptitifs lorsque cela est requis par la technologie. Avertissement:
SC668S_Series_Hardware_Design 15 / 118 Smart Module Series i) Le dispositif utilis dans la bande 5150-5250 MHz est rserv une utilisation en intrieur afin de rduire le risque de brouillage prjudiciable aux systmes mobiles par satellite dans le mme canal;
ii) lorsquil y a lieu, les types dantennes (sil y en a plusieurs), les numros de modle de lantenne et les pires angles dinclinaison ncessaires pour rester conforme lexigence de la p.i.r.e. applicable au masque dlvation, nonce la section 6.2.2.3, doivent tre clairement indiqus. i. for devices with detachable antenna(s), the maximum antenna gain permitted for devices in the bands 5250-5350 MHz and 5470-5725 MHz shall be such that the equipment still complies with the e.i.r.p. limit ii. for devices with detachable antenna(s), the maximum antenna gain permitted for devices in the band 5725-5850 MHz shall be such that the equipment still complies with the e.i.r.p. limits as appropriate;
and iii. where applicable, antenna type(s), antenna models(s), and worst-case tilt angle(s) necessary to remain compliant with the e.i.r.p. elevation mask requirement set forth in section 6.2.2.3 shall be clearly indicated. 1.1. Special Marks Table 1: Special Marks Mark Definition
Unless otherwise specified, when an asterisk (*) is used after a function, feature, interface, pin name, AT command, or argument, it indicates that the function, feature, interface, pin, AT command, or argument is under development and currently not supported; and the asterisk (*) after a model indicates that the sample of the model is currently unavailable. Brackets ([]) used after a pin enclosing a range of numbers indicate all pins of the same type. For example, SDIO_DATA [0:3] refers to all four SDIO pins: SDIO_DATA0, SDIO_DATA1, SDIO_DATA2, and SDIO_DATA3. SC668S_Series_Hardware_Design 16 / 118 Smart Module Series 2 Product Overview SC668S series module is a series of 4G Smart module based on Android operating system, and provides industrial grade performance. It supports multiple audio and video codecs, built-in high performance AdrenoTM 610 GPU and multiple audio and video input/output interfaces as well as abundant GPIO interfaces. With these, the module is engineered to meet the demanding requirements in M2M applications, such as smart cash register, wireless POS, tax printer, security monitor, automotive device, information collection device, smart robot, smart home, smart hardware, industrial PDA, UVAs, alarm panel, vending machine, Parcel locker. Related information and details are listed in the table below:
Table 2: Brief Introduction of the Module Categories Packaging and pins number LCC: 152; LGA: 171 Dimensions
(44.0 0.15) mm (43.0 0.15) mm (2.85 0.20) mm Weight Approx. 12.0 g Wireless network functions LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, EVDO/CDMA, EDGE, GSM, GPRS Wi-Fi & Bluetooth functions Wi-Fi 802.11a/b/g/n/ac & Bluetooth 5.0 GNSS functions GPS/GLONASS/BDS/Galileo/QZSS Variants SC668S-CN, SC668S-WF, SC668S-EM SC668S_Series_Hardware_Design 17 / 118 Smart Module Series 2.1. Frequency Bands and Functions Table 3: Wireless Network Type Wireless Network Type SC668S-CN SC668S-WF SC668S-EM WCDMA B1/B8 EVDO/CDMA BC0 GSM EGSM900/DCS1800
B1/B2/B4/B5/B8
GSM850/EGSM900/DCS1800/
PCS1900 Wi-Fi 802.11a/b/g/n/ac 24122462 MHz 51805825 MHz 24122462 MHz 51805825 MHz 24122462 MHz 5180-5825 MHz BLE 5.0 24022480 MHz 24022480 MHz 24022480 MHz GNSS GPS/QZSS:
1575.42 1.023 MHz GLONASS:
1597.51605.8 MHz BDS:
1561.098 2 .046 MHz Galileo:
1575.42 2.046 MHz
GPS/QZSS:
1575.42 1.023 MHz GLONASS:
1597.51605.8 MHz BDS:
1561.098 2.046 MHz Galileo:
1575.42 2.046 MHz 2.2. Key Features Table 4: Key Features Feature Details Octa-core ARM Kryo 64-bit CPU 260 processor Kryo Gold: One high performance quad-core @ 2.0 GHz with 1 MB L2 Application Processor cache Kryo Silver: One low power consumption quad-core @ 1.8 GHz with 512 KB L2 cache GPU DSP AdrenoTM 610 GPU with 64-bit addressing, up to 950 MHz Hexagon DSP, supports Dual HVX 512 SC668S_Series_Hardware_Design 18 / 118 Smart Module Series Memory eMCP: 32 GB eMMC + 3 GB LPDDR4X (default) eMCP: 64 GB eMMC + 4 GB LPDDR4X (optional) uMCP: 128 GB UFS + 8 GB LPDDR4X (optional) Operating System Android 10/Android 11*
Power Supply SMS Supply voltage: 3.554.4 V Typical supply voltage: 3.8 V Text and PDU mode Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default LCM Interface Supports one group of 4-lane MIPI_DSI, up to 1.5 Gbps/lane Supports up to 1920 1200 @ 60 fps or 1080 2520 @ 60 fps Camera Interfaces Video Codec Audio Interfaces Audio Codec USB Interfaces DisplayPort interface Supports three groups of 4-lane MIPI_CSI, up to 2.1 Gbps/lane Support three cameras (4-lane + 4-lane + 4-lane), each camera (4-lane) can be divided into 2-lane + 1-lane. Supports up to six cameras (up to two cameras at the same time) Supports up to 16 MP + 16 MP or 24 MP with dual ISP Encoding: 4K @ 30 fps, HEVC/H.264/VP8 Decoding: 4K @ 30 fps, HEVC/H.264/VP8/VP9 1080P @ 30 fps, MPEG-2 Audio inputs:
Three analog microphone inputs. MIC1/MIC2 has internal bias, MIC3 has no internal bias Audio outputs:
Class AB stereo headphone output Class AB earpiece differential output Class K loudspeaker differential output EVRC, EVRC-B, EVRC-WB G.711, G.729A/AB GSM-FR, GSM-EFR, GSM-HR AMR-NB, AMR-WB, AMR-eAMR, AMR-BeAMR Complies with USB 3.1 Gen 1 or 2.0 specifications, Supports USB OTG Supports USB 3.1 Type-C interface, compatible with USB 2.0 USB 2.0 and USB 3.1 are used for AT command communication, data transmission, software debugging and firmware upgrade Supports DisplayPort 1.4 interface function through USB_SS1 and USB_SS2. Supports DP standard interface only Supports up to 1920 1200 @ 60 fps DisplayPort cannot be used with USB 3.1 simultaneously for now
(U)SIM Interfaces Two (U)SIM interfaces Supports (U)SIM card: 1.8 V, 2.95 V Supports Dual SIM Dual Standby (supported by default), Dual Active is SC668S_Series_Hardware_Design 19 / 118 Smart Module Series SD Card Interfaces not supported Supports SD 3.0 Protocol Supports 1.8/2.95 V SD card Supports SD card hot-plug UART Interfaces 1 Support up to five groups of UART interfaces, three of them are default configurations, two of them are multiplexed from other interfaces UART interfaces: DBG_UART, UART03 and UART00 Debug UART: 2-wire UART interface, dedicated for debugging by default UART03: 2-wire UART interface UART00: 4-wire UART interface, RTS and CTS hardware flow control are supported, up to 4 Mbps For details about two UART interfaces that multiplexed from other interfaces, see Table 24 SPI Interfaces 1 Supports up to four groups of SPI interfaces, Supports master mode only For details about two SPI interfaces that multiplexed from other interfaces, I2C Interfaces1 see Table 24 Supports up to eight groups of I2C interfaces:
Three of them are dedicated I2C interfaces, used for peripherals such as camera, sensor Two of them are generic I2C interfaces, used for peripherals such as TP For details about three I2C interfaces that multiplexed from other interfaces, see Table 24 I2S Interfaces1 Support up to three groups of I2S interfaces:
One of them is default configuration For details about two I2S interfaces that multiplexed from other interfaces, see Table 24 ADC Interfaces Two general-purpose ADC interfaces Supports up to 15-bit sampling accuracy Real Time Clock Supported Bluetooth Features Supports Bluetooth Core Specification Version 5.0 Supports Bluetooth Classic & BLE Antenna Interface Wi-Fi/Bluetooth antenna WLAN Features Temperature Range Support AP and STA modes 2.4 GHz; 5 GHz, 802.11a/b/g/n/ac, maximally up to 433 Mbps Operating Temperature Range 2: -35 +75 C Storage temperature range: -40 +90 C Firmware Upgrade Use USB interface or OTA to upgrade 1 For details about the multiplexing and conflict relationships of UART, I2C, SPI and I2S interfaces, see Table 24. 2 Within the operating temperature range, the module meets 3GPP specifications. SC668S_Series_Hardware_Design 20 / 118 Smart Module Series RoHS All hardware components are fully compliant with EU RoHS directive 2.3. Functional Diagram The following figure shows a block diagram of the module and illustrates the major functional parts. Power management Radio frequency Baseband Memory Peripheral interfaces USB Interface
(U)SIM Interface SD card Interface GPIO Interfaces UART Interface SPI Interface I2C interface I2S Interface ADC Interface LCM interface Touch Panel Interfaces Camera interfaces Sensor Interfaces Audio interfaces SC668S_Series_Hardware_Design 21 / 118 Smart Module Series 2.4. Pin Assignment The following figure shows the pin assignment of SC668S series module. Figure 1: Pin Assignment NOTE Keep all RESERVED pins and unused pins unconnected. SC668S_Series_Hardware_Design 22 / 118 322GNDPowerRESERVED Camera(U)SIMGPIOUSBSPISD CardBatteryANTLCM211S2A257GNDGNDUARTI2COthersRF CTRLTPAUDIOSENSOR264GND210USIM2_VDD209USIM2_DATA208USIM2_CLK207USIM2_RST206TP_I2C_SDA205I2C11_SCL204I2C11_SDA203SPI13_CS202GNSS_LNA_EN201GPIO_84200GPIO_83199UART00_TXD198UART00_RXD256USIM2_DET255GYRO_INT254MAG_INT253ALPS_INT252ACCL_INT251SPI13_MISO250SPI13_CLK249SPI13_MOSI248GPIO_131247GPIO_130246UART00_CTS245UART00_RTS197DCAM_I2C_SDA196DCAM_I2C_SCL167MIC_BIAS1168MIC_GND169MIC3_P170GND171USB_SS1_RX_P172USB_SS1_RX_M173GND174USB_SS1_TX_P175USB_SS1_TX_M176GND177GPIO_128178GPIO_127179SD_PU_VDD222RESERVED223USB_CC2224USB_CC1225GND226USB_SS_SEL227GPIO_8228GPIO_9229GPIO_124230GPIO_123231GPIO_126232GPIO_125233S2B180DCAM_RST181DCAM_PWDN271GND313GND278GND285GND292GND299GND306GND258GND265GND272GND314GND279GND286GND293GND300GND307GND259GND266GND273GND315GND280GND287GND294GND301GND308GND260GND267GND274GND316GND281GND288GND295GND302GND309GND261GND268GND275GND317GND282GND289GND296GND303GND310GND262GND269GND276GND318GND283GND290GND297GND304GND311GND263GND270GND277GND319GND284GND291GND298GND305GND312GND212MI2S_SCLK213GPIO_117214RESERVED215DP_AUX_N216DP_AUX_P217DP_HPD218RESERVED219GND220RESERVED221RESERVED154MI2S_DATA0155MI2S_DATA1156MI2S_WS157RESERVED158LDO14A_1V8159GND160RESERVED161USB_SS2_RX_M162USB_SS2_RX_P163GND164USB_SS2_TX_M153ADC1165USB_SS2_TX_P166RESERVED244RESERVED243GND242GRFC_36241GRFC_33240CBL_PWR_N239RESERVED238GPIO_43237GPIO_85236CAM4_MCLK235RESERVED234GPIO_119194DCAM_MCLK193GND192CSI2_LN3_N191CSI2_LN3_P190CSI2_LN2_N189CSI2_LN2_P188CSI2_LN1_N187CSI2_LN1_P186CSI2_LN0_N185CSI2_LN0_P184CSI2_CLK_N195GND183CSI2_CLK_P182GND39PWRKEY40GND41USB_VBUS42USB_VBUS43GND44MIC1_P45MIC1_M46MIC2_P47GND48HS_DET49HPH_L50HPH_GND51HPH_R52EAR_M53EAR_P55SPK_P57USB_BOOT59SPI10_CLK61SPI10_MISO63SD_VDD64SD_DET65SD_DATA366SD_DATA267SD_DATA168SD_DATA069SD_CMD70SD_CLK71SCAM_PWDN72SCAM_RST73MCAM_PWDN74MCAM_RST75CAM_I2C_SCL76CAM_I2C_SDA60SPI10_MOSI62GND54SPK_M56GND58SPI10_CS1RESERVED2RESERVED3GND4GND5DBG_TXD6DBG_RXD7UART03_TXD8UART03_RXD9LDO9A_1V810LDO12A_1V811ELDO1_2V812ELDO2_2V8513LDO2C_1V114LDO3C_2V815LDO1C_1V217RESERVED19ANT_MAIN21RESERVED23RESERVED25RESERVED26RESERVED27RESERVED28MIC_BIAS329RESERVED30USB_ID31GND32USB_DP33USB_DM34GND35GND36VBAT37VBAT38VBAT22RESERVED24RESERVED16VRTC18GND20GND114GPIO_97113GPIO_95112GND111RESERVED110RESERVED109RESERVED108RESERVED107RESERVED106RESERVED105RESERVED104RESERVED103RESERVED102RESERVED101GND100SCAM_MCLK98GND96CSI1_LN3_P94CSI1_LN2_P92CSI1_LN1_P90CSI1_LN0_P89CSI1_CLK_N88CSI1_CLK_P87GND86CSI0_LN3_N85CSI0_LN3_P84CSI0_LN2_N83CSI0_LN2_P82CSI0_LN1_N81CSI0_LN1_P80CSI0_LN0_N79CSI0_LN0_P78CSI0_CLK_N77CSI0_CLK_P93CSI1_LN1_N91CSI1_LN0_N99MCAM_MCLK97CSI1_LN3_N95CSI1_LN2_N152PWM151ADC0150GND149ANT_DRX130GND148GND147VOL_DOWN146VOL_UP145USIM1_DET144USIM1_RST143USIM1_CLK142USIM1_DATA141USIM1_VDD140TP_I2C_SCL139TP_INT137GPIO_27135GND133GND131SENSOR_I2C_SCL128GND127LCD_RST126LCD_TE125GND124DSI_LN3_N123DSI_LN3_P122DSI_LN2_N121DSI_LN2_P120DSI_LN1_N119DSI_LN1_P118DSI_LN0_N117DSI_LN0_P116DSI_CLK_N115DSI_CLK_P132SENSOR_I2C_SDA129ANT_WIFI/BT138TP_RST136GPIO_26134ANT_GNSS321GND323GND320GNDKEYI2S Smart Module Series 2.5. Pin Description Table 5: Definition of I/O Parameters Type AI AO AIO DI DO DIO OD PI PO PIO Description Analog Input Analog Output Analog Input/Output Digital Input Digital Output Digital Input/Output Open Drain Power Input Power Output Power Input/Output Table 6: Pin Description Power Supply Pins Pin Name Pin No. I/O Description DC Characteristics Comment VBAT 3638 PI LDO9A_1V8 9 PO Power supply for the module Vmax = 4.4 V Vmin = 3.55 V Vnom = 3.8 V 1.8 V output
(Power supply for external I/O pull up circuits and level-shifting circuit) Vnom = 1.8 V IOmax = 20 mA Provide sufficient current up to 3 A. It is suggested to add a TVS for surge protection. Cannot be used for peripheral equipment. External capacitors is not required. SC668S_Series_Hardware_Design 23 / 118 LDO12A_1V8 10 PO 1.8 V output
(Power supply for I/O VDD of cameras, LCM and sensors) Vnom = 1.8 V IOmax = 300 mA LDO14A_1V8 158 PO 1.8 V output
(Power supply for external Codec) Vnom = 1.8 V IOmax = 600 mA ELDO1_2V8 11 PO ELDO2_2V85 12 PO LDO1C_1V2 15 PO LDO2C_1V1 13 PO 2.8 V output
(Power supply for external cameras and LCM) 2.85 V output
(Power supply for LCM and camera's AFVDD) 1.2 V output
(Power supply for DVDD of front cameras) 1.1 V output
(Power supply for DVDD of rear cameras) Vnom = 2.8 V IOmax = 300 mA Vnom = 2.85 V IOmax = 300 mA Vnom = 1.2 V IOmax = 800 mA Vnom = 1.1 V IOmax = 800 mA LDO3C_2V8 14 PO 2.8 V output
(Power supply for AVDD of cameras) Vnom = 2.8 V IOmax = 300 mA Smart Module Series Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 9 F. If not used, keep it open. Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 18.8 F. If not used, keep it open. Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 9 F. If not used, keep these pins open. Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 15.3 F. If not used, keep these pins open. Power supply only for cameras. Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 47.8 F. If not used, keep it open. Power supply only for cameras. SC668S_Series_Hardware_Design 24 / 118 Smart Module Series VRTC 16 PIO Power supply for RTC VOmax = 3.2 V When there is no VBAT connection:
VI = 2.13.25 V GND 3, 4, 18, 20, 31, 34, 35, 40, 43, 47, 56, 62, 87, 98, 101, 112, 125, 128, 130, 133, 135, 148, 150, 159, 163, 170, 173, 176, 182, 193, 195, 219, 225, 243, 257323 Keypad Interfaces Pin Name PWRKEY VOL_UP VOL_DOWN USB Interfaces Pin Name Pin No. 39 146 147 Pin No. I/O Description DI DI DI Turn on/off the module Volume up Volume down I/O Description USB_VBUS 41, 42 AI USB_DP 32 AIO USB_DM 33 AIO USB_SS1_RX_P 171 AI USB_SS1_RX_M 172 AI USB_SS1_TX_P 174 AO USB_SS1_TX_M 175 AO USB_SS2_RX_P 162 AI USB_SS2_RX_M 161 AI USB hot-plug detection USB 2.0 differential data (+) USB 2.0 differential data (-) USB 3.1 channel 1 super-speed receive
(+) USB 3.1 channel 1 super-speed receive
(-) USB 3.1 channel 1 super-speed transmit (+) USB 3.1 channel 1 super-speed transmit (-) USB 3.1 channel 2 super-speed receive
(+) USB 3.1 channel 2 super-speed receive DC Characteristics Comment 1.8 V Comment DC Characteristics Vmax = 6.0 V Vmin = 4.0 V Vnom = 5.0 V USB 2.0 standard compliant. 90 differential impedance. USB 3.1 Gen 1 compliant. 90 differential impedance. USB Type-C (USB 3.1) interface uses USB_SS1 by default. Insert front and back sides of USB through external switch. USB 3.1 Gen 1 compliant. 90 differential impedance. Use USB_SS1 and SC668S_Series_Hardware_Design 25 / 118 USB_SS2_TX_P 165 AO USB_SS2_TX_M 164 AO USB_CC1 224 AIO USB_CC2 223 AIO USB_SS_SEL 226 DO USB_ID 30 DO
(-) USB 3.1 channel 2 super-speed transmit (+) USB 3.1 channel 2 super-speed transmit (-) USB Type-C detect 1 USB Type-C detect 2 USB Type-C switch control USB 3.1 ID indication signal GPIO_130 247 DI USB ID interruption detect
(U)SIM Interfaces Pin Name Pin No. I/O Description USIM1_VDD 141 PO
(U)SIM1 card power supply 1.8 V DC Characteristics IOmax = 150 mA 1.8 V (U)SIM:
Vmax = 1.9 V Vmin = 1.7 V 2.95 V (U)SIM:
Vmax = 3.03 V Vmin = 2.7 V USIM1_DATA 142 DIO
(U)SIM1 card data USIM1_CLK 143 DO
(U)SIM1 card clock USIM1_RST 144 DO
(U)SIM1 card reset 1.8/2.95 V Smart Module Series USB_SS2 to achieve functions of DisplayPort 1.4 interface. USB Type-C interface USB ID status indicates output. High level by default. Internal pull up by default. Can be configured as general GPIO when this function is not used. Comment Either 1.8 V or 2.95 V
(U)SIM card is supported. External capacitance shall not exceed 4 F. Pull it up to USIM1_VDD with an external 10 k resistor. Cannot be multiplexed into a generic GPIO. Cannot be multiplexed into a generic GPIO. USIM1_DET 145 DI
(U)SIM1 card Require external SC668S_Series_Hardware_Design 26 / 118 hot-plug detect USIM2_VDD 210 PO
(U)SIM2 card power supply IOmax = 150 mA 1.8 V (U)SIM:
Vmax = 1.9 V Vmin = 1.7 V 2.95 V (U)SIM:
Vmax = 3.03 V Vmin = 2.7 V USIM2_DATA 209 DIO
(U)SIM2 card data USIM2_CLK 208 DO
(U)SIM2 card clock USIM2_RST 207 DO
(U)SIM2 card reset 1.8/2.95 V USIM2_DET 256 DI
(U)SIM2 card detect Smart Module Series pull-up to LDO9A_1V8. Active low. If unused, keep this pin open. This function is disabled by default. Cannot be used as general GPIO. Either 1.8 V or 2.95 V
(U)SIM card is supported. External capacitance shall not exceed 4 F. Pull it up to USIM2_VDD with an external 10 k resistor. Cannot be multiplexed into a generic GPIO. Cannot be multiplexed into a generic GPIO. Require external pull-up to LDO9A_1V8. Active low. If unused, keep this pin open. This function is disable by default. Cannot be used as general GPIO. SD Card Interfaces Pin Name SD_CLK SD_CMD SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3 Pin No. 70 69 68 67 66 65 I/O Description DO SD card clock DIO SD card command DIO SDIO data bit 0 DIO SDIO data bit 1 DIO SDIO data bit 2 DIO SDIO data bit 3 DC Characteristics Comment 1.8/2.95 V Control characteristic impedance as 50 . SC668S_Series_Hardware_Design 27 / 118 SD_DET 64 DI SD_VDD 63 PO SD card hot-plug detect SD card power supply Smart Module Series Active low. Require external pull-up to LDO9A_1V8. Vnom =
1.8/2.95 V IOmax = 600 mA External capacitance shall not exceed 13.5 F. SD_PU_VDD 179 PO SD card pull-up power supply:
1.8 V/2.95 V output Vnom =
1.8/2.95 V IOmax = 50 mA Only for SD card pull-up circuits. External capacitance shall not exceed 4 F. DC Characteristics Comment UART Interfaces Pin Name DBG_TXD DBG_RXD UART03_TXD UART03_RXD Pin No. 5 6 7 8 I/O Description DO DI Debug UART transmit Debug UART receive DO UART03 transmit DI UART03 receive UART00_TXD 199 DO UART00 transmit 1.8 V UART00_RXD 198 DI UART00 receive UART00_RTS 245 DO DCE request to send UART00_CTS 246 DI DEC clear to send If not used, keep these pins open. If not used, keep these pins open. When UART00_RTS and UART00_CTS are multiplexed into I2C, UART00_TXD and UART00_RXD can only be used as generic GPIOs. I2C Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment I2C11_SCL 205 OD I2C11_SDA 204 OD I2C serial clock (for external codec) I2C serial data (for external codec) 1.8 V External pull-up resistor is required. SPI Interface Pin Name SPI10_CS Pin No. 58 I/O Description DC Characteristics Comment DO SPI10 chip select 1.8 V Support master mode SC668S_Series_Hardware_Design 28 / 118 Smart Module Series DO SPI10 clock only. SPI10_CLK SPI10_MOSI 59 60 DO SPI10_MISO 61 DI SPI10 master-out slave-in SPI10 master-in slave-out SPI13_CS 203 DO SPI13 chip select SPI13_CLK 250 DO SPI13 clock SPI13_MOSI 249 DO SPI13_MISO 251 DI SPI13 master-out slave-in SPI13 master-in slave-out I2S Interface Pin Name MI2S_DATA1 Pin No. 155 I/O Description DIO I2S data channel 0 DC Characteristics Comment MI2S_DATA0 154 DIO I2S data channel 1 1.8 V MI2S_WS 156 DO I2S word select MI2S_SCLK 212 DO I2S serial clock LCM Interface Pin Name DSI_CLK_P Pin No. 115 I/O Description AO LCD MIPI clock (+) DC Characteristics Comment DSI_CLK_N 116 AO LCD MIPI clock DSI_LN0_P 117 AO DSI_LN0_N 118 AO DSI_LN1_P 119 AO DSI_LN1_N 120 AO DSI_LN2_P 121 AO DSI_LN2_N 122 AO LCD MIPI lane 0 data (+) LCD MIPI lane 0 data (-) LCD MIPI lane 1 data (+) LCD MIPI lane 1 data (-) LCD MIPI lane 2 data (+) LCD MIPI lane 2 data (-) DSI_LN3_P 123 AO LCD MIPI lane 3 Require differential impedance of 100 . SC668S_Series_Hardware_Design 29 / 118 DSI_LN3_N 124 AO data (+) LCD MIPI lane 3 data (-) LCD_TE 126 DI LCD tearing effect LCD_RST 127 DO LCD reset PWM 152 DO PWM output Smart Module Series 1.8 V Voltage shall be the same as VBAT. External pull-up is not required. Cannot be multiplexed into a generic GPIO. Touch Panel Interface Pin Name Pin No. I/O Description DC Characteristics Comment TP_RST 138 DO TP reset TP_INT 139 DI TP interrupt 1.8 V TP_I2C_SCL 140 OD TP I2C clock TP_I2C_SDA 206 OD TP I2C data Camera Interfaces Cannot be pulled up during the module's turning-on process. Used for touch panel. External pull-up is required. Pin Name CSI0_CLK_P CSI0_CLK_N CSI0_LN0_P CSI0_LN0_N CSI0_LN1_P CSI0_LN1_N CSI0_LN2_P CSI0_LN2_N CSI0_LN3_P Pin No. 77 78 79 80 81 82 83 84 85 I/O Description DC Characteristics Comment AI AI AI AI AI AI AI AI AI MIPI CSI0 clock (+) MIPI CSI0 clock (-) MIPI CSI0 lane 0 data (+) MIPI CSI0 lane 0 data (-) MIPI CSI0 lane 1 data (+) MIPI CSI0 lane 1 data (-) MIPI CSI0 lane 2 data (+) MIPI CSI0 lane 2 data (-) MIPI CSI0 lane 3 data (+) Require differential impedance of 100 . Used for front camera by default. SC668S_Series_Hardware_Design 30 / 118 CSI0_LN3_N CSI1_CLK_P CSI1_CLK_N CSI1_LN0_P CSI1_LN0_N CSI1_LN1_P CSI1_LN1_N CSI1_LN2_P CSI1_LN2_N CSI1_LN3_P CSI1_LN3_N 86 88 89 90 91 92 93 94 95 96 97 CSI2_CLK_P CSI2_CLK_N 183 184 AI AI AI AI AI AI AI AI AI AI AI AI AI CSI2_LN0_P 185 AI CSI2_LN0_N 186 AI CSI2_LN1_P 187 AI CSI2_LN1_N 188 AI MIPI CSI0 lane 3 data (-) MIPI CSI1 clock (+) MIPI CSI1 clock (-) MIPI CSI1 lane 0 data (+) MIPI CSI1 lane 0 data (-) MIPI CSI1 lane 1 data (+) MIPI CSI1 lane 1 data (-) MIPI CSI1 lane 2 data (+) MIPI CSI1 lane 2 data (-) MIPI CSI1 lane 3 data (+) MIPI CSI1 lane 3 data (-) MIPI CSI2 clock (+) MIPI CSI2 clock (-) MIPI CSI2 lane 0 data (+) MIPI CSI2 lane 0 data (-) MIPI CSI2 lane 1 data (+) MIPI CSI2 lane 1 data (-) CSI2_LN2_P 189 AI MIPI CSI2 lane 2 data (+) CSI2_LN2_N 190 AI MIPI CSI2 lane 2 data (-) Smart Module Series Require differential impedance of 100 . Used for rear camera by default. Require differential impedance of 100 . Used for depth camera by default. Require differential impedance of 100 . Used for depth camera by default. Can be multiplexed into the 4th cameras MIPI data (+). Require differential impedance of 100 . Used for depth camera by default. SC668S_Series_Hardware_Design 31 / 118 Smart Module Series Can be multiplexed into the 4th cameras MIPI data (-). Require differential impedance of 100 . Used for depth camera by default. Can be multiplexed into the 4th cameras MIPI clock (+). Require differential impedance of 100 . Used for depth camera by default. Can be multiplexed into the 4th cameras MIPI clock (-). External pull-up is required. Dedicated for camera. CSI2_LN3_P 191 AI MIPI CSI2 lane 3 data (+) CSI2_LN3_N 192 AI MIPI CSI2 lane 3 data (-) MCAM_MCLK 99 DO SCAM_MCLK 100 DO DCAM_MCLK 194 DO CAM4_MCLK 236 DO MCAM_RST 74 DO SCAM_RST 72 DO DCAM_RST 180 DO MCAM_PWDN 73 DO SCAM_PWDN 71 DO DCAM_PWDN 181 DO CAM_I2C_SCL 75 OD CAM_I2C_SDA 76 OD DCAM_I2C_SCL 196 OD Master clock of rear camera Master clock of front camera Master clock of depth camera Master clock of the 4th camera Reset of rear camera Reset of front camera Reset of depth camera Power down of rear camera Power down of front camera Power down of depth camera I2C clock of front and rear camera I2C data of front and rear camera I2C clock of depth camera 1.8 V SC668S_Series_Hardware_Design 32 / 118 DCAM_I2C_SDA 197 OD I2C data of depth camera Audio Interfaces Smart Module Series I/O Description DC Characteristics Comment Pin Name MIC1_P MIC1_M MIC2_P Pin No. 44 45 46 AI AI AI MIC3_P 169 AI MIC_GND 168 MIC_BIAS1 167 AO MIC_BIAS3 28 AO HS_DET 48 AI HPH_L 49 AO Microphone input for channel 1 (+) Microphone input for channel 1 (-) Microphone input for headset (+) Microphone input for headset (+) Microphone reference ground Bias voltage 1 output for microphone Bias voltage 3 output for microphone Headset hot-plug detection Headphone left channel output Headphone reference ground Headphone right channel output Integrated with internal bias voltage Integrated without internal bias voltage If not used, connect it to ground. Cannot be externally pulled up. If not used, connect it to ground. VO = 1.02.85 V HPH_GND HPH_R EAR_M EAR_P SPK_M 50 51 52 53 54 SPK_P 55 AO AO AO AO Earpiece output (-) AO Earpiece output (+) Loudspeaker output
(-) Loudspeaker output
(+) Sensor Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment ALPS_INT 253 DI Light/Proximity sensor interrupt 1.8 V 1.8 V power domain. Can be multiplexed SC668S_Series_Hardware_Design 33 / 118 ACCL_INT 252 DI GYRO_INT 255 DI MAG_INT 254 DI SENSOR_I2C_ SCL 131 OD Acceleration sensor interrupt Gyroscope sensor interrupt Geomagnetic sensor interrupt I2C clock for external sensor SENSOR_I2C_ SDA 132 OD I2C data for external sensor Smart Module Series into a generic GPIO. Dedicated for external sensor. Cannot be used for touch panel, NFC, I2C keyboard, etc. Cannot be multiplexed into a generic GPIO. GPIO Interfaces Pin Name GPIO_8 Pin No. 227 I/O Description DIO DC Characteristics Comment GPIO_9 228 DIO GPIO_26 136 DIO GPIO_27 137 DIO GPIO_43 238 DIO GPIO_83 200 DIO GPIO_84 201 DIO Support wakeup interrupt. GPIO_85 237 DIO GPIO_95 113 DIO General-purpose input/output 1.8 V Support wakeup interrupt. GPIO_97 114 DIO GPIO_117 213 DIO GPIO_119 234 DIO GPIO_123 230 DIO GPIO_124 229 DIO GPIO_125 232 DIO GPIO_126 231 DIO Support wakeup interrupt. Support wakeup interrupt. SC668S_Series_Hardware_Design 34 / 118 GPIO_127 178 DIO GPIO_128 177 DIO GPIO_130 247 DIO GPIO_131 248 DIO Smart Module Series Support wakeup interrupt. RF Antenna Interface Pin Name Pin No. I/O Description DC Characteristics Comment ANT_MAIN 19 AIO ANT_DRX 149 AI ANT_GNSS 134 AI ANT_WIFI/BT 129 AIO Antenna Tuner Control Interfaces Main antenna interface Rx-diversity antenna interface GNSS antenna interface Wi-Fi/Bluetooth antenna interface 50 characteristic impedance. Pin Name Pin No. I/O Description DC Characteristics Comment GRFC_36 242 DIO Generic RF controller 1.8 V GRFC_33 241 DIO Only used for RF debugging, cannot be multiplexed into a generic GPIO. Cannot be pulled up during module's turning-on process. Only used for RF debugging, cannot be multiplexed into a generic GPIO. ADC Interface Pin Name ADC0 ADC1 Other Interfaces Pin Name Pin No. 151 153 Pin No. I/O Description AI AI General-purpose ADC interface DC Characteristics Comment 1.8 V power domain. I/O Description DC Characteristics Comment SC668S_Series_Hardware_Design 35 / 118 Smart Module Series The module cannot be turned off when this pin is pulled down. Force the module to enter emergency download mode by pulling this pin up to LDO9A_1V8 during turning-on. Only for internal test, cannot be multiplexed into a generic GPIO. If not used, keep this pin open. CBL_PWR_N 240 DI Initiate turning-on when grounded USB_BOOT 57 DI Force the module into emergency download mode 1.8 V GNSS_LNA_EN 202 DO GNSS LNA enable control S2A S2B 211 233
DP_AUX_P 216 AIO DP_AUX_N 215 AIO DP_HPD 217 DI Direct connect S2A and S2B internally inside the module. DP auxiliary channel
(+) DP auxiliary channel
(-) DP hot-plug detection RESERVED 1.8 V Cannot be externally pulled up. Pin Name Pin No. Comment RESERVED 1, 2, 17, 2127, 29, 102111, 157, 160, 166, 214, 218, 220222, 235, 239, 244 Keep these pins open. NOTE For more details about module's multiplexing functions, see document [1]. 2.6. EVB Kit To help you develop applications conveniently with SC668S series module, Quectel supplies an evaluation board with accessories to control or to test the module. For more details, see document [2]. SC668S_Series_Hardware_Design 36 / 118 Smart Module Series 3 Operating Characteristics 3.1. Power Supply 3.1.1. Power Supply Pins SC668S series module provides three VBAT pins. which are dedicated for connection with external power supply. Power supply range of the module is from 3.55 V to 4.4 V and the recommended value is 3.8 V. Table 7: Pin Definition of Power Supply Pin Name Pin No. I/O Description Comment VBAT 3638 PI Power supply for the module Provide sufficient current up to 3 A. It is suggested to add a TVS for surge protection. 3.1.2. Reference Design for Power Supply The power design for the module is very important, as the performance of the module largely depends on the power source. The power supply of the module should be able to provide sufficient current of 3 A at least. If the voltage drops between input and output is not too high, it is suggested that an LDO should be used to supply power to the module. If there is a big voltage difference between the input source and the desired output (VBAT), a buck converter is preferred to be used as the power supply. The following figure illustrates a reference design for +5 V input power source. Figure 2: Reference Design of Power Supply SC668S_Series_Hardware_Design 37 / 118 DC_IN+5VC1C2U1INOUTENGNDADJ24135VBAT 100 nFC3470 FC4100 nFR2220K100KR3470 F470R51KR4R11 %1 %
Smart Module Series NOTE It is recommended to switch off the power supply when the module is in abnormal state to turn off the module, and then switch on the power supply to restart the module. 3.1.3. Voltage Stability Requirements The power supply range of the module is from 3.55 V to 4.4 V, and the recommended value is 3.8 V. The power supply performance, such as load capacity, voltage ripple, directly influences the modules performance and stability. Under ultimate conditions, the module may have a transient peak current of up to 3 A. If the power supply capability is not sufficient, there will be voltage drops, and if the voltage drops below 3.3 V, the module will be turned off automatically. Therefore, make sure the input voltage never drops below 3.3 V. Figure 3: Voltage Drop Sample To prevent the voltage from dropping below 3.3 V, use a bypass capacitor of about 100 F with low ESR
(ESR 0.7 ), and reserve a multi-layer ceramic chip capacitor (MLCC) array due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) to compose the MLCC array, and place these capacitors close to VBAT pins. Additionally, add a 4.7 F capacitor in parallel. The width of VBAT trace should be no less than 3 mm. In principle, the longer the VBAT trace is, the wider it should be. In addition, to get a stable power supply source, it is suggested to use a 500 W TVS and place it as close to the VBAT pins as possible to enhance surge protection. The following figure shows the structure of the power supply. SC668S_Series_Hardware_Design 38 / 118 Voltage3.8 V3 AInput current Smart Module Series Figure 4: Structure of Power Supply 3.2. Turn On 3.2.1. Turn On with PWRKEY Table 8: Pin Definition of PWRKEY Pin Name Pin No. PWRKEY 39 I/O DI Description Comment Turn on/off the module 1.8 V power domain. The module can be turned on by driving the PWRKEY pin low for at least 1.6 s. PWRKEY is pulled up to 1.8 V internally. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. Figure 5: Turn On the Module Using Driving Circuit SC668S_Series_Hardware_Design 39 / 118 ModuleVBATVBATC1100 F +C2100 nF C333 pF C410 pF D1C54.7 FGNDTurn-on pulsePWRKEY4.7K47K1.6 sR1R2Q1R31K Another way to control PWRKEY is by using a button directly. You must place a TVS component nearby the button and add a 1 k resistor in series for ESD protection. A reference circuit is shown in the following figure. Smart Module Series Figure 6: Turn On the Module Using Button The power-up scenario is illustrated in the following figure. Figure 7: Power-up Timing SC668S_Series_Hardware_Design 40 / 118 PWRKEYModuleS1Close to S1TVS1KTurn-on pulseR1VBAT (Typ. 3.8 V)PWRKEY 1.6 sOthersLDO9A_1V8LDO12A_1V8Software controlledActiveSoftware controlled Smart Module Series NOTE 1. When the module is turned on for the first time, its timing of power-up may be different from that shown above. 2. Make sure that VBAT is stable before pulling down the PWRKEY pin. It is recommended that the time difference between powering up VBAT and pulling down PWRKEY pin is no less than 30 ms. PWRKEY pin cannot be pulled down all the time. 3. Noted that USB_VBUS cannot trigger the module's turn on function. 3.2.2. Turn On the Module Automatically Table 9: Pin Definition of CBL_PWR_N Pin Name Pin No. I/O Description Comment CBL_PWR_N 240 DI Initiate turning-on when grounded 1.8 V power domain. The module cannot be turned off when this pin is pulled down. SC668S series module can be turned on automatically through CBL_PWR_N:
Figure 8: Turn On the Module Automatically NOTE If the module turns on automatically through CBL_PWR_N pin, it cannot be turned off manually. In such case, it can be turned off only by cutting off the power supply of system. SC668S_Series_Hardware_Design 41 / 118 GNDSC668S SeriesCBL_PWR_N0R Smart Module Series 3.3. Turn Off/Restart The module can be turned off by driving the PWRKEY pin low for at least 1 s. Choose to turn off the module when the prompt window comes up. The other way to turn off the module is to drive PWRKEY low for at least 10 s. The module will execute the forced shut-down. The forced power-down scenario is illustrated in the following figure. Figure 9: Power-down Timing 3.4. VRTC Table 10: Pin Definition of VRTC Pin Name Pin No. VRTC 16 I/O PIO Description Power supply for RTC The RTC (Real Time Clock) can be powered by an external power source through VRTC when the module is powered down and there is no power supply for the VBAT. The external power source can be a capacitor according to application demands. The following are some reference designs when an external battery is utilized for powering RTC. SC668S_Series_Hardware_Design 42 / 118 VBATPWRKEYOthers>10 sRestart Smart Module Series Figure 10: RTC Powered by a Rechargeable Cell Battery Figure 11: RTC Powered by Capacitor If RTC fails, the module can synchronize time over the network after being powered up. The recommended input voltage range for VRTC is 2.13.25 V and the recommended typical value is 3.0 V. When powered by VBAT, the RTC error is 50 ppm. When powered by VRTC, the RTC error is about 200 ppm. If a rechargeable battery is used, ESR of the battery should be less than 2 k. If you do not need RTC function, then a 4.7 F capacitor need to be connected to VRTC. 3.5. Power Output The module supports output of regulated voltages for peripheral circuits. During application, it is recommended to connect a 33 pF and a 10 pF capacitor in parallel in the circuit to suppress high-frequency noise. SC668S_Series_Hardware_Design 43 / 118 Button batteryModuleRTC CoreVRTCLarge Capacitance CapacitorModuleRTC CoreVRTCC Table 11: Power Description Pin Name Default Voltage (V) Driving Current (mA)
@ Idle State Smart Module Series LDO9A_1V8 LDO12A_1V8 LDO14A_1V8 ELDO1_2V8 1.8 1.8 1.8 2.8 ELDO2_2V85 2.85 LDO2C_1V1 LDO3C_2V8 LDO1C_1V2 1.1 2.8 1.2 USIM1_VDD 1.8/2.95 USIM2_VDD 1.8/2.95 SD_VDD 1.8/2.95 SD_PU_VDD 1.8/2.95 20 300 600 300 300 800 300 800 150 150 600 50 Keeps ON
SC668S_Series_Hardware_Design 44 / 118 Smart Module Series 4 Application Interfaces 4.1. USB Interface The module provides one USB interface which comply with both USB 3.1 Gen 1 and USB 2.0 specifications and support super speed (5 Gbps) on USB 3.1 Gen 1, high speed (480 Mbps) and full speed (12 Mbps) modes on USB 2.0. The USB interface supports USB OTG function. Table 12: Functions of the USB Interface Functions Data communication with external AP AT command communication Data transmission GNSS NMEA output Software debugging Firmware upgrade Voice over USB Yes Yes Yes Yes Yes Yes Yes 4.1.1. USB Type-C Mode The following table shows the pin definition of USB Type-C interface. Table 13: Pin Definition of USB Type-C Interface Pin Name Pin No. I/O Description Comment USB_VBUS 41, 42 AI USB hot-plug detection USB_DP 32 AIO USB 2.0 differential data (+) USB 2.0 standard compliant. SC668S_Series_Hardware_Design 45 / 118 Smart Module Series USB_DM 33 AIO USB 2.0 differential data (-) 90 differential impedance. USB_SS1_RX_P 171 USB_SS1_RX_M 172 AI AI USB_SS1_TX_P 174 AO USB_SS1_TX_M 175 AO USB_SS2_RX_P 162 USB_SS2_RX_M 161 AI AI USB_SS2_TX_P 165 AO USB_SS2_TX_M 164 AO USB 3.1 channel 1 super-speed receive (+) USB 3.1 channel 1 super-speed receive (-) USB 3.1 channel 1 super-speed transmit (+) USB 3.1 channel 1 super-speed transmit (-) USB 3.1 channel 2 super-speed receive (+) USB 3.1 channel 2 super-speed receive (-) USB 3.1 channel 2 super-speed transmit (+) USB 3.1 channel 2 super-speed transmit (-) USB 3.1 Gen 1 compliant. 90 differential impedance. USB Type-C (USB 3.1) interface use USB_SS1 by default. Insert front and back sides of USB through external switch. USB 3.1 Gen 1 compliant. 90 differential impedance. Use USB_SS1 and USB_SS2 to achieve functions of DisplayPort 1.4 interface. USB_CC1 224 AIO USB Type-C detect 1 USB_CC2 223 AIO USB Type-C detect 2 USB_SS_SEL 226 DO USB Type-C switch control USB_ID 30 DO USB 3.1 ID indication signal GPIO_130 247 DI USB ID interruption detect USB Type-C interface USB ID status indicates output. High level by default. Internal pull up by default. Can be configured as general GPIO when this function is not used. NOTE 1. Use USB_SS1 and USB_SS2 to achieve functions of DisplayPort 1.4 interface. For details, see document [3]. 2. Master/slave detection of USB Type-C (USB 3.1 Gen1) interface is achieved by USB_CC1 or USB_CC2. USB_CC1 or USB_CC2 will control USB_ID and then notice GPIO_130 by USB_ID. When inserted device of USB Type-C interface is in slave mode, USB_ID will output low voltage level to pull GPIO_130 down and then notice the module to enter master mode. If OTG function is not needed, then USB_ID can be kept open. 3. USB Type-C (USB 3.1) interface use USB_SS1 by default. Front and back sides insertion of USB can be achieved through external switch. Meanwhile, USB_SS1 and USB_SS2 can also help to achieve front and back sides insertion of USB. For details, please contact Quectel Technical Support. SC668S_Series_Hardware_Design 46 / 118 Smart Module Series Figure 12: USB Type-C Interface Reference Design The USB interface of the module supports OTG function. If this function is required, please follow the design above to add an external 5 V power supply. VDD_3V in the circuit is not the internal power supply of the platform, you can use an external LDO as the power supply. 4.1.2. Micro USB Interface The following table shows the pin definition of Micro USB interface:
Table 14: Pin Definition of Micro USB Pin Name Pin No. I/O Description Comment USB_VBUS 41, 42 AI USB hot-plug detection SC668S_Series_Hardware_Design 47 / 118 VBATGPIO_130USB_IDUSB_VBUSUSB_DPUSB_DMUSB_CC1USB_CC2USB_SS1_TX_PUSB_SS1_TX_MUSB_SS1_RX_PUSB_SS1_RX_MUSB_SS_SELModuleD-CC1D+CC2TX2+RX2+TX2-RX2-TX1+RX1+TX1-RX1-USB_VBUSSWVIN22 FC210K1.0 HR1ENAGNDVOUTVOUTNCPGNDPGND12945678310 FC1SwitchA0+A0-A1+A1-B0+B0-B1+B1-C0+C0-C1+C1-SELPDR2VDDL1VBATVBUSC3C4C5C6C7C8C9C10C11C12C13C15C14C164.7 F100 nFUSB Type-CVDD_3VGPIO_124DC-DC47KR3D1~D8 USB_DP USB_DM 32 33 AIO USB 2.0 differential data (+) AIO USB 2.0 differential data (-) GPIO_130 247 DI USB ID interruption detect Smart Module Series 90 differential impedance. Internal pull up by default. Can be configured as generic GPIO if not used. Figure 13: Micro-USB Interface Reference Design In the design of USB 2.0 interface, it is suggested to connect GPIO_130 directly to USB_ID of the external Micro USB interface, to detect USB ID. When inserted device of the external Micro USB interface is in slave mode, USB_ID will output low voltage level to pull GPIO_130 down and then notice the module to enter master mode. 4.1.3. Design Principles for USB Interfaces To ensure USB performance, comply with the following principles when designing the USB interface. It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90 . The ground reference plane must be continuous, without any cuts or any holes under the USB signals, to ensure impedance continuity. Pay attention to the influence of junction capacitance of ESD protection devices on USB data lines. Typically, the capacitance value should be less than 2 pF for USB 2.0 and less than 0.5 pF for USB 3.1. Keep the ESD protection devices as close as possible to the USB connector. Do not route signal traces under crystals, oscillators, magnetic devices and RF signal lines. Route the USB differential traces in inner-layer with ground shielding on not only upper and lower layers but also right and left sides. Do not route USB 3.1 signal lines under RF signal lines. Crossing or parallel with RF signal lines is SC668S_Series_Hardware_Design 48 / 118 USB_DPUSB_DMUSB_VBUS12345USB_DPUSB_DMVUSBUSB_IDGNDGNDGNDGNDGND6789100nFModuleC1D1D2D3TVSTVSTVSGPIO_130 Smart Module Series forbidden. Isolation between USB 3.1 signals and RF signals should be more than 90 dB. Otherwise, the RF signals will be seriously affected. Make sure the trace length difference between TX_P and TX_M, as well as RX_P and RX_M of USB 3.1, does not exceed 0.7 mm, and the difference between Rx and Tx differential pair does not exceed 10 mm. Make sure the trace length difference between USB 2.0 DP and USB 2.0 DM differential pair does not exceed 2 mm. For USB 3.1, the spacing between Rx and Tx signal traces should be four times the signal trace width. The spacing between USB 3.1 signal trace and other signal lines should be four times the signal trace width. For USB 2.0, the spacing between DP and DM signal traces should be three times the signal trace width and the spacing between USB 2.0 signal traces and other signal lines should be four times the signal trace width. Table 15: USB Trace Length Inside the Module Pin No. Signal Length (mm) Length Difference (DP-DM) 32 33 171 172 174 175 162 161 165 164 USB_DP USB_DM 38.0 37.9 USB_SS1_RX_P 42.7 USB_SS1_RX_M 42.8 USB_SS1_TX_P 27.0 USB_SS1_TX_M 26.8 USB_SS2_RX_P 27.1 USB_SS2_RX_M 27.0 USB_SS2_TX_P 34.0 USB_SS2_TX_M 33.9 4.2. (U)SIM Interfaces 0.1
-0.1 0.2 0.1 0.1 The module provides two (U)SIM interfaces which meet ETSI and IMT-2000 requirements. Dual SIM Dual Standby is supported and either 1.8 V or 2.95 V (U)SIM card is supported. The pin definition of (U)SIM interface is shown below. SC668S_Series_Hardware_Design 49 / 118 Table 16: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment Smart Module Series USIM1_VDD 141 PO
(U)SIM1 card power supply USIM1_DATA 142 DIO
(U)SIM1 card data USIM1_CLK 143 DO
(U)SIM1 card clock USIM1_RST 144 DO
(U)SIM1 card reset USIM1_DET 145 DI
(U)SIM1 card hot-plug detect USIM2_VDD 210 PO
(U)SIM2 card power supply USIM2_DATA 209 DIO
(U)SIM2 card data USIM2_CLK 208 DO
(U)SIM2 card clock USIM2_RST 207 DO
(U)SIM2 card reset USIM2_DET 256 DI
(U)SIM2 card detect Either 1.8 V or 2.95 V (U)SIM card is supported. External capacitance shall not exceed 4 F. Pull it up to USIM1_VDD with an external 10 k resistor. Cannot be multiplexed into a generic GPIO. Cannot be multiplexed into a generic GPIO. Require external pull-up to LDO9A_1V8. Active low. If unused, keep this pin open. Disable by default. Cannot be used as general GPIO. Either 1.8 V or 2.95 V (U)SIM card is supported. External capacitance shall not exceed 4 F. Pull it up to USIM2_VDD with an external 10 k resistor. Cannot be multiplexed into a generic GPIO. Cannot be multiplexed into a generic GPIO. Require external pull-up to LDO9A_1V8. Active low. If unused, keep this pin open. Disable by default. Cannot be used as general GPIO. The module supports (U)SIM card hot-plug via the USIM_DET. This function is disabled by default via software. To enable it, contact Quectel Technical Support. A reference circuit for (U)SIM card interface with an 8-pin (U)SIM card connector is illustrated in the following figure. SC668S_Series_Hardware_Design 50 / 118 Smart Module Series Figure 14: Reference Design of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If you do not need hot-plug detection, keep USIM1_DET and USIM2_DET pins open. The following is a reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector. Figure 15: Reference Design of (U)SIM Interface with a 6-Pin (U)SIM Card Connector To enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design. Keep placement of (U)SIM card connector as close to the module as possible. Keep the trace length as less than 200 mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Reserve a filter capacitor for USIM_VDD, and its maximum capacitance should not exceed 1 F. Additionally, place the capacitor near the (U)SIM card connector. SC668S_Series_Hardware_Design 51 / 118 USIM_VDDUSIM_RSTUSIM_CLKUSIM_DATAUSIM_DET22R100K100nF(U)SIM Card ConnectorTVS array22pFVCCRSTCLKIOVPPGNDUSIM_VDD10KModuleR1R2C122pF22pFC2C3C4D122R22RR3R4R5LDO9A_1V8ModuleUSIM_VDDUSIM_RSTUSIM_CLKUSIM_DATA22R22R22R100nFTVS array22pFVCCRSTCLKIOVPPGND10KUSIM_VDD22pF22pFR1C1D1R2R3R4C2C3C4USIM_DET(U)SIM Card Connector Smart Module Series To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. USIM_RST also needs ground protection. To ensure good ESD protection, it is recommended to add a TVS diode array with parasitic capacitance not exceeding 30 pF. Add 22 resistors in series between the module and (U)SIM card to suppress EMI spurious transmission and enhance ESD protection. Add 22 pF capacitors parallel on USIM_DATA, USIM_CLK and USIM_RST signal lines to filter RF interference, and place them as close to the (U)SIM card connector as possible. Please note that the (U)SIM peripheral circuit should be close to the (U)SIM card connector. The pull-up resistor on USIM_DATA can improve anti-jamming capability of the (U)SIM card. If the
(U)SIM card traces are too long, or the interference source is relatively close, it is recommended to add a pull-up resistor close to the (U)SIM card connector. 4.3. SD Card Interface The module supports SD 3.0 specifications and SD card hot-plug. The pin definition of the SD card interface is shown below. Table 17: Pin Definition of SD Card Interface Pin Name Pin No. I/O Description Comment SD_CLK SD_CMD 70 69 DO SD card clock DIO SD card command SD_DATA0 68 DIO SDIO data bit 0 SD_DATA1 67 DIO SDIO data bit 1 SD_DATA2 66 DIO SDIO data bit 2 SD_DATA3 65 DIO SDIO data bit 3 Control characteristic impedance as 50 . SD_DET 64 DI SD card hot-plug detect Active low. Require external pull-up to LDO9A_1V8. SD_VDD 63 PO SD_PU_VDD 179 PO SD card power supply SD card pull-up power; supply 1.8/2.95 V output External capacitance shall not exceed 13.5 F. Only for SD card pull-up, maximum power supply is 50 mA. External capacitance shall not exceed 4 F. SC668S_Series_Hardware_Design 52 / 118 A reference circuit for the SD card interface is shown below. Smart Module Series Figure 16: Reference Design for SD Card Interface SD_VDD is a peripheral driver power supply for SD card. The maximum drive current is 600 mA. Because of the high drive current, it is recommended that the trace width is 0.5 mm or above. To ensure the stability of drive power, add a 4.7 F and a 33 pF capacitor in parallel near the SD card connector. SD_CMD, SD_CLK, SD_DATA0, SD_DATA1, SD_DATA2 and SD_DATA3 are all high-speed signal lines. In PCB design, control the characteristic impedance of them as 50 , and do not cross them with other traces. It is recommended to route these traces on the inner layer of PCB. Additionally, SD_CLK needs ground shielding separately. Layout guidelines:
Control impedance to 50 10 %, and add ground shielding. Keep the trace length difference among SD_CLK, SD_CMD and SD_DATA[0:3] less than 2 mm. Trace length requirements: less than 150 mm for traces of 50 Mbps; less than 50 mm for traces of 104 Mbps. The space between signal lines should be 1.5 times the line width. The capacitive reactance of SD_DATA[0:3], SD_CLK, SD_CMD traces should be less than 8 pF. The capacitive reactance of D1D7 should be less than 5 pF. Table 18: SD Card Signal Trace Length Inside the Module Pin No. 70 Signal SD_CLK Length (mm) 63.9 SC668S_Series_Hardware_Design 53 / 118 SD_CMD120KNM_51KSD_DATA2SD_CLKSD_DATA0SD_DETSD_DATA1P1-DAT2P2-CD/DAT3P3-CMDP4-VDDP5-CLKP8-DAT1GNDP6-VSSP7-DAT0DETECTIVEGNDGNDGND1234567891011121333R33R33R33R33R33R1K33 pF4.7 FModuleR1R2R3R4R5R6NM_51KNM_10KNM_51KNM_51KR7R8R9R10R11R12R13D1D2D3D4D5D6D7D8C1C2SD Card ConnectorLDO9A_1V8SD_VDDSD_PU_VDDSD_DATA3 Smart Module Series 63.9 64.2 63.9 64.4 64.0 69 68 67 66 65 SD_CMD SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3 4.4. GPIO Interfaces The module has abundant GPIO interfaces with a power domain of 1.8 V. The pin definition is listed below. Table 19: Pin Definition of GPIOs Pin Name Pin No. GPIO_8 GPIO_9 GPIO_26 GPIO_27 GPIO_43 GPIO_83 GPIO_84 GPIO_85 GPIO_95 GPIO_97 GPIO_117 GPIO_119 GPIO_123 GPIO_124 227 228 136 137 238 200 201 237 113 114 213 234 230 229 I/O DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO Description Comment Support wakeup interrupt. General-purpose input/output Support wakeup interrupt. Support wakeup interrupt. SC668S_Series_Hardware_Design 54 / 118 Smart Module Series Support wakeup interrupt. Support wakeup interrupt. 232 231 178 177 247 248 GPIO_125 GPIO_126 GPIO_127 GPIO_128 GPIO_130 GPIO_131 NOTE DIO DIO DIO DIO DIO DIO For more details about GPIO configuration, see document [1]. 4.5. UART Interfaces The module supports up to five groups of UART interfaces. Three of them are default configurations, see Table 20. Two of them are multiplexed from other interfaces, see Table 24. Three UART interfaces:
UART00: 4-wire UART interface, supports RTS and CTS hardware flow control, up to 4 Mbps;
Debug UART: 2-wire UART interface, used for debugging by default;
UART03: 2-wire UART interface. Pin definition of the UART interface is here as follows:
Table 20: Pin Definition of UART Pin Name Pin No. I/O Description Comment DBG_TXD DBG_RXD UART03_TXD UART03_RXD 5 6 7 8 DO Debug UART transmit. DI Debug UART receive. DO UART03 transmit DI UART03 receive 1.8 V power domain; If not used, keep these pins open. UART00_TXD 199 DO UART00 transmit 1.8 V power domain; If not used, SC668S_Series_Hardware_Design 55 / 118 UART00_RXD 198 DI UART00 receive UART00_RTS 245 DO DCE request to send UART00_CTS 246 DI DCE clear to send Smart Module Series keep these pins open. When UART00_RTS and UART00_CTS are multiplexed into I2C, UART00_TXD and UART00_RXD can only be used as generic GPIO. UART00 is a 4-wire UART interface with 1.8 V power domain. A level translator chip should be used if your application is equipped with a 3.3 V UART interface. The following figure shows a reference design. Figure 17: Reference Design with Level Translator Chip (for UART00) A voltage level translator and an RS-232 level translator chip are recommended to be added between the module and PC, as shown below: The following figure shows a reference design. Figure 18: RS-232 Level Match Circuit (for UART00) SC668S_Series_Hardware_Design 56 / 118 VCCAVCCBOEA1A2A3A4GNDB1B2B3B4LDO9A_1V8UART00_RTSUART00_RXDUART00_CTSUART00_TXDRTS_3.3VRXD_3.3VCTS_3.3VTXD_3.3VVDD_3.3VC1100 pFC2U1100 pFRXD_3.3 VCTS_3.3 VVCCAModuleGNDGND1.8 VVCCB3.3 VDIN1ROUT3ROUT2ROUT1DIN4DIN3DIN2DIN5FORCEON3.3 VDOUT1DOUT2DOUT3DOUT4DOUT5RIN3RIN2RIN1VCCGNDOEDB-9RTSTXDCTSRXDGNDRTS_3.3 VUART00_TXDUART00_RTSUART00_RXDUART00_CTSTXD_1.8 VRTS_1.8 VRXD_1.8 VCTS_1.8 V/FORCEOFF/INVALIDR1OUTBTXD_3.3 V1.8 V Smart Module Series NOTE DBG_UART and UART03 are similar to UART00. For the reference designs, refer to that for UART00. 4.6. SPI Interfaces The module provides four groups of SPI which only supports master mode. It can be used for fingerprint recognition. Two of them are default configurations, see Table 21; The other two of them are multiplexed from other interfaces, see Table 24. Table 21: Pin Definition of SPI Interfaces Pin Name Pin No. I/O Description Comment SPI10_CS SPI10_CLK 58 59 DO SPI10 chip select DO SPI10 clock SPI10_MOSI 60 DO SPI10 master-out slave-in SPI10_MISO 61 DI SPI10 master-in slave-out SPI13_CS 203 DO SPI13 chip select SPI13_CLK 250 DO SPI13 clock SPI13_MOSI 249 DO SPI13 master-out slave-in SPI13_MISO 251 DI SPI13 master-in slave-out 1.8 V power domain;
Supports master mode only. 4.7. I2C Interfaces The module provides eight groups of I2C interfaces. Three of them are dedicated I2C interfaces, used for peripherals such as camera, sensor. Two of them are generic I2C interfaces, used for peripherals such as TP, see Table 22; three of them are multiplexed from other interfaces, see Table 24. All I2C interfaces are open drain signals and therefore you must pull them up externally. The reference power domain is 1.8 V. The sensor I2C interface only supports sensors of aDSP architecture. CAM_I2C and DCAM_I2C signals are controlled by Linux Kernel code and support connection to radio-output-related devices. SC668S_Series_Hardware_Design 57 / 118 Table 22: Pin Definition of I2C Interfaces Pin Name Pin No. I/O Description Comment Smart Module Series CAM_I2C_SCL CAM_I2C_SDA 75 76 OD OD I2C clock of front and rear camera, I2C data of front and rear camera DCAM_I2C_SCL 196 OD I2C clock of depth camera DCAM_I2C_SDA 197 OD I2C data of depth camera SENSOR_I2C_SCL 131 OD I2C clock for external sensor SENSOR_I2C_SDA 132 OD I2C data for external sensor I2C serial clock (for external codec) I2C serial data (for external codec) OD OD TP I2C clock OD TP I2C data I2C11_SCL 205 OD I2C11_SDA TP_I2C_SCL TP_I2C_SDA 204 140 206 4.8. I2S Interfaces 1.8 V power domain. Dedicated for camera only. External pull-up is required. 1.8 V power domain. Dedicated for external sensor. External pull-up is required. 1.8 V power domain. External pull-up is required. SC668S series module supports up to three groups of I2S interfaces. One of them is default configuration, and the power domain is 1.8 V, see Table 23. Two of them are multiplexed from other interfaces, see Table 24. Table 23: Pin Definition of I2S Interface Pin Name Pin No. I/O Description Comment MI2S_DATA1 155 DIO I2S data channel 0 MI2S_DATA0 154 DIO I2S data channel 1 MI2S_WS 156 DO I2S word select MI2S_SCLK 212 DO I2S serial clock 1.8 V power domain. SC668S_Series_Hardware_Design 58 / 118 GPIO_119 234 DIO General-purpose input/output Smart Module Series 1.8 V power domain. Can be used as I2S master clock 4.9. Multiplexing Relationship of UART/SPI/I2C/I2S The module supports six groups of configurable functional interfaces, which can be configured into UART, SPI, I2C or I2S interfaces. For details, see the table below (dedicated I2C interface, dedicated UART for debugging and interfaces those are already used inside the module are not included):
Table 24: Multiplexing Relationship of UART/SPI/I2C/I2S Channel Pin No. Pin Name GPIO No. Multiplexing Functions UART SPI I2C I2S QUP0-SE0 QUP0-SE2 QUP0-SE3 QUP1-SE0 246 UART00_CTS GPIO_0 UART00_CTS SPI00_MISO I2C00_SDA 245 UART00_RTS GPIO_1 UART00_RTS SPI00_MOSI I2C00_SCL 199 UART00_TXD GPIO_2 UART00_TXD SPI00_CLK 198 UART00_RXD GPIO_3 UART00_RXD SPI00_CS
206 TP_I2C_SDA GPIO_6 UART02_CTS SPI02_MISO I2C02_SDA 140 TP_I2C_SCL GPIO_7 UART02_RTS SPI02_MOSI I2C02_SCL 227 GPIO_8 GPIO_8 UART02_TXD SPI02_CLK 228 GPIO_9 GPIO_9 UART02_RXD SPI02_CS
7 8 61 60 59 58 UART03_TXD GPIO_14 UART03_TXD
I2C03_SDA UART03_RXD GPIO_15 UART03_RXD
I2C03_SCL SPI10_MISO GPIO_22 UART10_CTS SPI10_MISO I2C10_SDA SPI10_MOSI GPIO_23 UART10_RTS SPI10_MOSI I2C10_SCL SPI10_CLK GPIO_24 UART10_TXD SPI10_CLK SPI10_CS GPIO_25 UART10_RXD SPI10_CS
QUP1-SE1 204 I2C11_SDA GPIO_30 205 I2C11_SCL GPIO_31
I2C11_SDA I2C11_SCL
SC668S_Series_Hardware_Design 59 / 118 251 SPI13_MISO GPIO_18 249 SPI13_MOSI GPIO_19 250 SPI13_CLK GPIO_20 203 SPI13_CS GPIO_21
232 GPIO_125 GPIO_125
231 GPIO_126 GPIO_126
178 GPIO_127 GPIO_127
177 GPIO_128 GPIO_128
212 MI2S_SCLK GPIO_113
156 MI2S_WS GPIO_114
154 MI2S_DATA0 GPIO_115
155 MI2S_DATA1 GPIO_116
QUP1-SE3
NOTE Smart Module Series SPI13_MISO
I2S2_SCLK SPI13_MOSI
I2S2_WS SPI13_CLK SPI13_CS
I2S2_DATA0 I2S2_DATA1 I2S1_SCLK I2S1_WS I2S1_DATA0 I2S1_DATA1
1. QUP SE interface can be used flexibly, it supports both UART, SPI, I2C and I2S interfaces. 2. Note that QUP SE interfaces in the same group cannot support two protocols. For instance: QUP in the same group cannot support UART and I2C at the same time. If one protocol only occupies parts of pins in one group of QUP, then other pins in this group can only be used as GPIO. 3. MI2S in the table is the default interface. I2S1 interface is configured from default GPIO. To allocate interfaces more conveniently, they are all listed in the table. 4.10. ADC Interfaces The module provides two analog-to-digital converter (ADC) interfaces and the pin definition is shown below. Table 25: Pin Definition of ADC Interfaces Pin Name Pin No. ADC0 151 I/O AI Description Comment General-purpose ADC interface 1.8 V power domain. SC668S_Series_Hardware_Design 60 / 118 Smart Module Series ADC1 153 AI The ADC interfaces support resolution of up to 15 bits. 4.11. LCM Interface The module provides one LCM interface, which is MIPI_DSI standard compliant. The interface supports one group of 4-lane high-speed differential data transmission with maximum speed rate of 1.5 Gbps and supports HD+ display (1920 x 1200 @ 60 fps or 1080 x 2520 @ 60 fps). The pin definition of the LCM interface is shown below. Table 26: Pin Definition of LCM Pin Name Pin No. I/O Description Comment LDO12A_1V8 10 PO ELDO2_2V85 12 PO 1.8 V output
(Power supply for I/O VDD of cameras, LCM and sensors) 2.85 V output
(Power supply for LCM and camera's AFVDD) Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 9 F. If not used, keep these pins open. DSI_CLK_P 115 AO LCD MIPI clock (+) DSI_CLK_N 116 AO LCD MIPI clock (-) DSI_LN0_P 117 AO LCD MIPI lane 0 data (+) DSI_LN0_N 118 AO LCD MIPI lane 0 data (-) DSI_LN1_P 119 AO LCD MIPI lane 1 data (+) DSI_LN1_N 120 AO LCD MIPI lane 1 data (-) DSI_LN2_P 121 AO LCD MIPI lane 2 data (+) DSI_LN2_N 122 AO LCD MIPI lane 2 data (-) DSI_LN3_P 123 AO LCD MIPI lane 3 data (+) DSI_LN3_N 124 AO LCD MIPI lane 3 data (-) Require differential impedance of 100 . LCD_TE 126 DI LCD tearing effect 1.8 V power domain. LCD_RST 127 DO LCD reset 1.8 V power domain. External pull-up is not required. SC668S_Series_Hardware_Design 61 / 118 PWM 152 DO PWM output Smart Module Series Voltage shall be the same as VBAT. You can design external backlight drive circuit for LCM according to actual requirement. The reference designs are shown in the figures below, in which PWM (pin 152) is used for backlight brightness adjustment. Figure 19: LCM External Backlight Driver Reference Design A reference circuit for the LCM interface is shown below. SC668S_Series_Hardware_Design 62 / 118 LCM_LED+Module4.7 FBacklight DriverLCM_LED-VBATC1PWMGNDGND10KR1 Smart Module Series Figure 20: Reference Design for LCM Interface MIPI are high speed signal lines. It is recommended to add common-mode filters in series close to the LCM connector to improve protection against electromagnetic radiation interference. It is recommended to read the LCM ID register through MIPI when compatible design with other displays is required. If several LCMs share the same IC, it is recommended that the LCM factory should burn an OTP register to distinguish different screens. 4.12. Touch Panel Interface The module provides one group of I2C interfaces for connection with Touch Panel (TP), and provides the SC668S_Series_Hardware_Design 63 / 118 DSI_CLK_PLEDANCLEDKLPTENC (SDA-TP) VIO18NC (VTP-TP) DSI_LN3_PLCD_TELCD_RSTDSI_LN3_NDSI_LN2_PDSI_CLK_NDSI_LN2_NRESETLCD_IDNC (SCL-TP) NC (RST-TP) NC (EINT-TP) GNDVCC28GNDMIPI_TDP3MIPI_TDN3GNDMIPI_TDP2MIPI_TDN2GNDMIPI_TDP1MIPI_TDN1GNDELDO2_2V85LDO12A_1V8LCM_LED+LCM_LED-1234567891012131415161718192021222324252627MIPI_TDP0MIPI_TDN0GNDMIPI_TCPMIPI_TCN2928303456345634563456DSI_LN1_NDSI_LN1_PDSI_LN0_NDSI_LN0_P1234561112121212100nF4.7F1FModuleLCMFL1FL2FL3FL4FL5EMI filterC3C2C1NCGNDGNDGNDGNDGPIO31323334GND corresponding power supply and interrupt pins. The definitions of TP interface pins are illustrated below. Smart Module Series Table 27: Pin Definition of Touch Panel Interfaces Pin Name Pin No. I/O Description Comment LDO12A_1V8 10 PO ELDO1_2V8 11 PO 1.8 V output
(Power supply for I/O VDD of cameras, LCM and sensors) 2.8 V output
(Power supply for external cameras and LCM) TP_RST 138 DO TP reset TP_INT 139 DI TP interrupt TP_I2C_SCL 140 OD TP I2C clock TP_I2C_SDA 206 OD TP I2C data A reference design for TP interface is shown below. Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 9 F. If not used, keep these pins open. 1.8 V power domain;
For TP_RST: it cannot be pulled up during module's turning on process;
For TP_I2C: external pull-up is required. Figure 21: Reference Design for TP0 Interface 4.13. Camera Interfaces Based on MIPI_CSI, The module supports three cameras (4-lane + 4-lane + 4-lane) with the speed rate of SC668S_Series_Hardware_Design 64 / 118 TP_RSTTP_I2C_SCLTP_I2C_SDATP_INT1234562.2K2.2K4.7F100 nFModuleRESET 1.8 V SCL 1.8 VSDA 1.8 V INT 1.8 V GNDVDD 2.8 V TPR2R1C1C2D1D2D3D4D5ELDO1_2V8LDO12A_1V8GND up to 2.1 Gbps/lane. Each camera (4-lane) can be divided into 2-lane + 1-lane. The module supports up to six cameras (up to two cameras at the same time) and up to 16 MP + 16 MP or 24 MP with dual ISP. The video and photo quality are determined by various factors such as the camera sensor, camera lens quality. Pin definition of camera interface is shown in the table below:
Smart Module Series Table 28: Pin Definition of Camera Interfaces Pin Name Pin No. I/O Description Comment CSI0_CLK_P CSI0_CLK_N CSI0_LN0_P CSI0_LN0_N CSI0_LN1_P CSI0_LN1_N CSI0_LN2_P CSI0_LN2_N CSI0_LN3_P CSI0_LN3_N CSI1_CLK_P CSI1_CLK_N CSI1_LN0_P CSI1_LN0_N CSI1_LN1_P CSI1_LN1_N CSI1_LN2_P CSI1_LN2_N CSI1_LN3_P CSI1_LN3_N 77 78 79 80 81 82 83 84 85 86 88 89 90 91 92 93 94 95 96 97 CSI2_CLK_P 183 AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI MIPI CSI0 clock (+) MIPI CSI0 clock (-) MIPI CSI0 lane 0 data (+) MIPI CSI0 lane 0 data (-) MIPI CSI0 lane 1 data (+) MIPI CSI0 lane 1 data (-) MIPI CSI0 lane 2 data (+) MIPI CSI0 lane 2 data (-) MIPI CSI0 lane 3 data (+) MIPI CSI0 lane 3 data (-) MIPI CSI1 clock (+) MIPI CSI1 clock (-) MIPI CSI1 lane 0 data (+) MIPI CSI1 lane 0 data (-) MIPI CSI1 lane 1 data (+) MIPI CSI1 lane 1 data (-) MIPI CSI1 lane 2 data (+) MIPI CSI1 lane 2 data (-) MIPI CSI1 lane 3 data (+) MIPI CSI1 lane 3 data (-) Require differential impedance of 100 . Used for front camera by default. Require differential impedance of 100 . Used for rear camera by default. MIPI CSI2 clock (+) Require differential SC668S_Series_Hardware_Design 65 / 118 CSI2_CLK_N CSI2_LN0_P CSI2_LN0_N CSI2_LN1_P CSI2_LN1_N 184 185 186 187 188 AI AI AI AI AI MIPI CSI2 clock (-) MIPI CSI2 lane 0 data (+) MIPI CSI2 lane 0 data (-) MIPI CSI2 lane 1 data (+) MIPI CSI2 lane 1 data (-) CSI2_LN2_P 189 AI MIPI CSI2 lane 2 data (+) CSI2_LN2_N 190 AI MIPI CSI2 lane 2 data (-) CSI2_LN3_P 191 AI MIPI CSI2 lane 3 data (+) CSI2_LN3_N 192 AI MIPI CSI2 lane 3 data (-) MCAM_MCLK 99 DO Master clock of rear camera SCAM_MCLK DCAM_MCLK CAM4_MCLK MCAM_RST SCAM_RST 100 194 236 74 72 DO Master clock of front camera DO Master clock of depth camera DO Master clock of the 4th camera DO Reset of rear camera DO Reset of front camera Smart Module Series impedance of 100 . Used for depth camera by default. Require differential impedance of 100 . Used for depth camera by default. Can be multiplexed into the 4th cameras MIPI data (+). Used for depth camera. Require differential impedance of 100 . Used for depth camera by default. Can be multiplexed into the 4th cameras MIPI data (-). Require differential impedance of 100 . Used for depth camera by default Can be multiplexed into the 4th cameras MIPI clock (+). Require differential impedance of 100 . Used for depth camera by default Can be multiplexed into the 4th cameras MIPI clock (-). 1.8 V power domain. SC668S_Series_Hardware_Design 66 / 118 DCAM_RST 180 DO Reset of depth camera MCAM_PWDN SCAM_PWDN 73 71 DO Power down of rear camera DO Power down of front camera DCAM_PWDN 181 DO Power down of depth camera LDO2C_1V1 13 PO 1.1 V output
(Power supply for DVDD of rear cameras) LDO3C_2V8 14 PO 2.8 V output (Power supply for AVDD of cameras) LDO1C_1V2 15 PO 1.2 V output
(Power supply for DVDD of front cameras) Smart Module Series Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 15.3 F. If not used, keep it open. Power supply only for cameras. Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 47.8 F. If not used, keep it open. Power supply only for cameras. Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 15.3 F. If not used, keep it open. Power supply only for cameras. ELDO2_2V85 12 PO LDO12A_1V8 10 PO 2.85 V output
(Power supply for LCM and camera's AFVDD) 1.8 V output
(Power supply for I/O VDD of cameras, LCM and sensors) Add a 1.04.7 F bypass capacitor if used. Total capacitance cannot exceed 9 F. If not used, keep these pins open. CAM_I2C_SCL 75 CAM_I2C_SDA 76 OD OD I2C clock of front and rear camera I2C data of front and rear camera DCAM_I2C_SCL 196 OD I2C clock of depth camera DCAM_I2C_SDA 197 OD I2C data of depth camera The following is a reference design for three-camera applications. 1.8 V power domain. Dedicated for camera only. SC668S_Series_Hardware_Design 67 / 118 Smart Module Series Figure 22: Reference Design for Three-Camera Applications NOTE 1. The module supports three groups of CSI. CSI0 is used for front camera by default, CSI1 is used for rear camera and CSI2 is used for depth camera by default. SC668S_Series_Hardware_Design 68 / 118 Rear camera connectorMCAM_PWDNMCAM_MCLKCAM_I2C_SDACAM_I2C_SCL_CSI1_LN3_PCSI1_LN3_NCSI1_LN2_PCSI1_LN2_NCSI1_LN1_PCSI1_LN1_NCSI1_LN0_PCSI1_LN0_NSCAM_RSTSCAM_PWDNSCAM_MCLKCSI2_CLK_PCSI2_CLK_NCSI2_LN0_PCSI2_LN0_NCSI0_LN1_PCSI0_LN1_NCSI0_LN0_PCSI0_LN0_NCSI1_CLK_PCSI1_CLK_NCSI0_CLK_PCSI0_CLK_NELDO2_2V852.2K2.2KFront camera connector1F1F1F1F1F2.2FMCAM_RSTDCAM_PWDNDCAM_MCLKDCAM_I2C_SDADCAM_I2C_SCLDCAM_RSTDepth camera connector LDO3C_2V8EMIEMIEMIEMIEMIEMIEMIEMILDO2C_1V11F2.2K2.2KDVDDEMIEMI11FFAVDDLDO12ALDO12A_1V8LDO1C_1V2DOVDDDVDDAFVDDAFVDDELDO2_2V85F0.1AVDD Smart Module Series 2. CSI2_LN2_P, CSI2_LN2_N, CSI2_LN3_P and CSI2_LN3_N can be multiplexed into the MIPI signal traces of the 4th camera. In this circumstance, the related RST and PWDN signals use generic GPIO configurations. 3. The module supports up to 2-lane simultaneously transmission (up to 16 MP for each lane). MIPI design considerations:
Special attention should be paid to the pin definition of LCM/camera connectors. Make sure the module and the connectors are correctly connected. MIPI are high speed signal lines, supporting maximum data rate of up to 2.1 Gbps for CSI and up to 1.5 Gbps for DSI. The impedance of USB differential trace should be controlled to 100 . Additionally, it is recommended to route the trace on the inner layer of PCB, and do not cross it with other traces. For the same group of DSI or CSI signals, keep all the MIPI traces of the same length. Make sure the reference ground plane for CSI/DSI is complete and integral, without any cut or void. Route the camera CLK signals in the inner layer of the PCB and surround them with ground. Route CSI and DSI traces according to the following rules:
a) The intra-pair (P/N) spacing should be 1 time the trace width. b) The inter-lane spacing should be 1.5 times the trace width. c) The spacing to other signal lines should be 2.5 times the trace width. Route MIPI traces according to the following rules:
a) Control the differential impedance to 100 10 %. b) Control intra-lane(P/N) length difference within 0.7 mm;
c) Control inter-lane length difference within 1.4 mm (for CSI2, trace length between lanes needs to be controlled on your baseboard as a whole). Table 29: Relationship Between CSI Rate and Trace Length (D-PHY) Data rate Cable Length (mm) Cable Insertion Loss (dB) Trace Length (mm) 500 Mbps/lane 750 Mbps/lane 1.0 Gbps/lane 1.5 Gbps/lane 76.2 152.4 76.2 152.4 76.2 152.4 76.2 152.4
-0.5
-1
-0.7
-1.15
-0.75
-1.4
-0.9
-1.8
< 260
< 190
< 210
< 155
< 200
< 125
< 145
< 60 SC668S_Series_Hardware_Design 69 / 118 Smart Module Series 2.1 Gbps/lane 76.2 152.4
-1.3
-2.3
< 170
< 90 Table 30: Relationship Between DSI Rate and Trace Length (D-PHY) Data rate Cable Length (mm) Cable Insertion Loss (dB) Trace Length (mm) 76.2 152.4 76.2 152.4 76.2 152.4 76.2 152.4 500 Mbps/lane 750 Mbps/lane 1.0 Gbps/lane 1.5 Gbps/lane NOTE
-0.8
-1.4
-1
-1.5
-1.1
-1.7
-1.2
-2.2
< 280
< 210
< 210
< 150
< 200
< 100
< 135
< 40 1. The cable length listed above is an example with specified insertion loss. 2. The cable insertion loss can be obtained from the cable datasheet provided by the related manufacturer. The cable insertion loss on the design should not be worse than what is listed in this table. 3. The length in the above table includes the length of the trace inside the module. Table 31: Trace Length of MIPI Differential Pairs Inside the Module Pin No. Signal Length (mm) Length Difference (P-N) (mm) 115 116 117 118 119 DSI_CLK_P 49.2 DSI_CLK_N 49.7 DSI_LN0_P 49.2 DSI_LN0_N 49.0 DSI_LN1_P 49.3
-0.5 0.2 0 SC668S_Series_Hardware_Design 70 / 118 Smart Module Series 120 121 122 123 124 77 78 79 80 81 82 83 84 85 86 88 89 90 91 92 93 94 95 96 97 DSI_LN1_N 49.3 DSI_LN2_P 49.1 DSI_LN2_N 49.0 DSI_LN3_P 48.8 DSI_LN3_N 48.5 CSI0_CLK_P 25.2 CSI0_CLK_N 25.2 CSI0_LN0_P 25.2 CSI0_LN0_N 25.2 CSI0_LN1_P 25.2 CSI0_LN1_N 25.2 CSI0_LN2_P 25.2 CSI0_LN2_N 25.2 CSI0_LN3_P 25.3 CSI0_LN3_N 25.2 CSI1_CLK_P 16.2 CSI1_CLK_N 16.2 CSI1_LN0_P 16.2 CSI1_LN0_N 16.2 CSI1_LN1_P 16.2 CSI1_LN1_N 16.2 CSI1_LN2_P 16.2 CSI1_LN2_N 16.4 CSI1_LN3_P 16.1 CSI1_LN3_N 16.0 0.1 0.3 0 0 0 0 0.1 0 0 0
-0.2 0.1 SC668S_Series_Hardware_Design 71 / 118 Smart Module Series 183 184 185 186 187 188 189 190 191 192 CSI2_CLK_P 16.6 CSI2_CLK_N 16.7 CSI2_LN0_P 15.7 CSI2_LN0_N 15.5 CSI2_LN1_P 11.8 CSI2_LN1_N 12.1 CSI2_LN2_P 5.6 CSI2_LN2_N 5.9 CSI2_LN3_P 2.5 CSI2_LN3_N 2.8 4.14. Sensor Interfaces
-0.1 0.2
-0.3
-0.3
-0.3 The module supports communication with sensors via I2C interfaces, and it supports ALS/PS, compass, accelerometer, gyroscope, etc. Pin definition of sensor interfaces are as shown below:
Table 32: Pin Definition of Sensor Interfaces Pin Name Pin No. I/O Description Comment ALPS_INT ACCL_INT GYRO_INT MAG_INT 253 252 255 254 DI DI DI DI Light/proximity sensor interrupt Acceleration sensor interrupt Gyroscope sensor interrupt 1.8 V power domain. Can be multiplexed into a generic GPIO. Geomagnetic sensor interrupt SENSOR_I2C_SCL 131 OD I2C clock for external sensor SENSOR_I2C_SDA 132 OD I2C data for external sensor 1.8 V power domain. Dedicate for external sensors, cannot be used for touch panel, NFC, I2C keyboard, etc. Cannot be multiplexed into a generic GPIO. SC668S_Series_Hardware_Design 72 / 118 Smart Module Series 4.15. Audio Interfaces The module provides three analog input channels and three analog output channels. The following table shows the pin definition. Table 33: Pin Definition of Audio Interfaces Pin Name Pin No. I/O Description Comment MIC1_P MIC1_M MIC2_P 44 45 46 MIC3_P 169 AI AI AI AI Microphone input for channel 1 (+) Microphone input for channel 1 (-) Microphone input for headset (+) Microphone input for headset (+) MIC_GND 168 Microphone reference ground MIC_BIAS1 167 AO Bias voltage 1 output for microphone MIC_BIAS3 28 AO Bias voltage 3 output for microphone HS_DET 48 AI Headset hot-plug detect HPH_L 49 AO Headphone left channel output HPH_GND 50 Headphone reference ground HPH_R EAR_M EAR_P SPK_M SPK_P 51 52 53 54 55 AO Headphone right channel output AO Earpiece output (-) AO Earpiece output (+) AO Loudspeaker output (-) AO Loudspeaker output (+) Integrated with internal bias voltage Integrated without internal bias voltage If not used, connect it to ground. Cannot be externally pulled up. If not used, connect it to ground. The module offers three audio input channels, including one differential input channel and two single ended input channels. MIC1/MIC2 has internal bias voltage. MIC3 has no internal bias voltage. Two MIC_BIAS output. The output voltage range is programmable between 1.0 V to 2.85 V, and the maximum output current is 6 mA. The earpiece interface uses differential output. The loudspeaker interface uses the differential output as well. The output channel is available with a Class-K amplifier whose output power is 1.2 W when load is 8 . SC668S_Series_Hardware_Design 73 / 118 Smart Module Series The headphone interface features stereo left and right channel output, and supports headphone insertion detect. 4.15.1. Reference Design for Microphone Interfaces Figure 23: Reference Design for ECM Microphone Interface Figure 24: Reference Design for MEMS Microphone Interface SC668S_Series_Hardware_Design 74 / 118 MIC1_PECMR2R1ModuleD1MIC1_M100 nFC10R0RR30RMICMIC3_P33pFMEMSR2R1C2ModuleMIC_GND0RC1MIC_BIAS1234F1D1OUTGNDGNDVDD100nFC40R33pF 4.15.2. Reference Design for Headset Interface Smart Module Series Figure 25: Reference Design for Headset Interface 4.15.3. Reference Design for Headphone Interface Figure 26: Reference Design for Headphone Interface SC668S_Series_Hardware_Design 75 / 118 EAR_PEAR_M33 pF33 pF33 pFC2C3C1ModuleD1D2F1F220KTVSarrayMIC_GNDMIC2_PHPH_LHS_DETHPH_RHPH_GND33 pFModuleR10R36452133 pF33 pFC3C4C5F3F2F1D1D2D3D4F4R2R30R 4.15.4. Reference Design for Loudspeaker Interface Smart Module Series Figure 27: Reference Design for Loudspeaker Interface 4.15.5. Audio Interfaces Design Considerations It is recommended to use the electret microphone with dual built-in capacitors (e.g., 10 pF and 33 pF) to filter out RF interference, thus reducing TDD noise. The 33 pF capacitor is applied to filter out RF interference when the module is transmitting at EGSM900. The 10-pF capacitor is used to filter out RF interference at DCS1800. Without this capacitor, TDD noise could be heard during voice calls. Please note that the resonant frequency point of a capacitor largely depends on the material and production technique. Therefore, customers would have to discuss with their capacitor vendors to choose the most suitable capacitor for filtering out high-frequency noises. The severity of RF interference in the voice channel during GSM transmitting largely depends on the application design. In some cases, EGSM900 TDD noise is more severe; while in other cases, DCS1800 TDD noise is more obvious. Therefore, you should select a suitable capacitor according to the test results. Sometimes, even no RF filtering capacitor is required. To decrease radio or other signal interference, RF antennas should be placed away from audio interfaces and audio traces. Power traces cannot be parallel with and should be far away from the audio traces. The differential audio traces must be routed according to the differential signal layout rule. SC668S_Series_Hardware_Design 76 / 118 EARPEARNF2SPK_PSPK_M33 pF33 pFC1C2F1ModuleD1D2 Smart Module Series 4.16. Emergency Download Interface Table 34: Pin Definition of USB_BOOT Pin Name Pin No. I/O Description Comment USB_BOOT 57 DI Force the module into emergency download mode Force the module to enter emergency download mode by pulling this pin up to LDO9A_1V8 during turning-on. USB_BOOT is an emergency download interface. Pull it up to LDO11A_1V8 during power-up will force the module into emergency download mode. There is an emergency option when failures such as abnormal start-up or running occur. For the convenient firmware upgrade and debugging in the future, please reverse this pin. Figure 28: Reference Design for Emergency Download Interface SC668S_Series_Hardware_Design 77 / 118 LDO9A_1V8S1 ModuleUSB_BOOTR110K Smart Module Series 5 Antenna Interfaces 5.1. Cellular Network 5.1.1. Antenna Interface & Frequency Bands The pin definition is shown below:
Table 35: Pin Definition of Cellular Network Interface Pin Name Pin No. I/O Description Comment ANT_MAIN 19 AIO Main antenna interface ANT_DRX 149 AI Rx-diversity antenna interface 50 characteristic impedance. NOTE Only passive antennas are supported. Table 36: Operating Frequency of SC668S-CN Operating Frequencies Receive (MHz) Transmit (MHz) EGSM900 DCS1800 WCDMA B1 WCDMA B8 EVDO/CDMA BC0 LTE-FDD B1 LTE-FDD B3 925960 18051880 21102170 925960 869894 21102170 18051880 880915 17101785 19201980 880915 824849 19201980 17101785 SC668S_Series_Hardware_Design 78 / 118 Smart Module Series LTE-FDD B5 LTE-FDD B8 LTE-TDD B34 LTE-TDD B38 LTE-TDD B39 LTE-TDD B40 LTE-TDD B41 3 869894 925960 20102025 25702620 18801920 23002400 24962690 824849 880915 20102025 25702620 18801920 23002400 24962690 Table 37: Operating Frequency of SC668S-EM Operating Frequencies Receive (MHz) Transmit (MHz) GSM850 EGSM900 DCS1800 PCS1900 WCDMA B1 WCDMA B2 WCDMA B4 WCDMA B5 WCDMA B8 LTE-FDD B1 LTE-FDD B2 LTE-FDD B3 LTE-FDD B4 LTE-FDD B5 LTE-FDD B7 LTE-FDD B8 869894 925960 18051880 19301990 21102170 19301990 21102155 869894 925960 21102170 19301990 18051880 21102155 869894 26202690 925960 824849 880915 17101785 18501910 19201980 18501910 17101755 824849 880915 19201980 18501910 17101785 17101755 824849 25002570 880915 3 Frequency band of modules LTE-TDD B41 is 200 MHz (24962690 MHz), range of channel is 3965041589. SC668S_Series_Hardware_Design 79 / 118 Smart Module Series LTE-FDD B20 LTE-FDD B28 LTE-TDD B38 LTE-TDD B39 LTE-TDD B40 LTE-TDD B41 3 791821 758803 25702620 18801920 23002400 24962690 832862 703748 25702620 18801920 23002400 24962690 5.1.2. 5.1.2. Tx Power The following table shows the RF output power of the module. 5.1.2. Table 38: Tx Power of SC668S-CN 5.1.2. Frequency 5.1.2. EGSM900 5.1.2. DCS1800 WCDMA Bands 5.1.2. EVDO/CDMA BC0 5.1.2. LTE Bands 5.1.2. Table 39: Tx Power of SC668S-EM 5.1.2. Frequency GSM850 5.1.2. EGSM900 5.1.2. DCS1800 PCS1900 5.1.2. WCDMA Bands 5.1.2. LTE Bands 5.1.2. Max. RF output power 33 dBm 2 dB 30 dBm 2 dB 23 dBm 2 dB 24 dBm +3/-1 dB 23 dBm 2 dB Max. RF output power 33 dBm 2 dB 33 dBm 2 dB 30 dBm 2 dB 30 dBm 2 dB 23 dBm 2 dB 23 dBm 2 dB SC668S_Series_Hardware_Design 80 / 118 5.1.2. 5.1.2. Smart Module Series NOTE In GPRS 4-slot Tx mode, the maximum output power is reduced by 3 dB. This design conforms to the GSM specification as described in Chapter 13 of 3GPP TS 51.010-1. 5.1.3. Rx Sensitivity The following table shows conducted RF receiving sensitivity of the module. Table 40: Conducted RF Rx Sensitivity of SC668S-CN Rx Sensitivity (Typ.) (dBm) Primary Diversity SIMO 3GPP Requirement
(SIMO) Frequency EGSM900 DCS1800
-109
-108 WCDMA B1
-109.5 WCDMA B8 EVDO/CDMA BC0
-110
-109 LTE-FDD B1 (10 MHz)
-97.8 LTE-FDD B3 (10 MHz)
-99 LTE-FDD B5 (10 MHz)
-99 LTE-FDD B8 (10 MHz)
-99 LTE-TDD B34 (10 MHz)
-98 LTE-TDD B38 (10 MHz)
-97 LTE-TDD B39 (10 MHz)
-98 LTE-TDD B40 (10 MHz)
-97.5 LTE-TDD B41 (10 MHz)
-97
-110
-110
-99.5
-98.5
-99.5
-99.5
-99
-98.5
-99
-98.5
-97
TBD TBD
-102.4
-102.4
-106.7
-103.7
-104
-101.5
-96.3
-101.5
-93.3
-101.5
-94.3
-101.5
-93.3
-101
-96.3
-100.5
-96.3
-101
-101
-96.3
-96.3
-99.5
-94.3 SC668S_Series_Hardware_Design 81 / 118 Table 41: Conducted RF Rx Sensitivity of SC668S-EM Smart Module Series Rx Sensitivity (Typ.) (dBm) Primary Diversity SIMO 3GPP Requirement
(SIMO) Frequency GSM850 EGSM900 DCS1800 PCS1900 WCDMA B1 WCDMA B2 WCDMA B4 WCDMA B5 WCDMA B8
-109
-109
-108
-108
-110
-110
-110
-110
-110 LTE-FDD B1 (10 MHz)
-98 LTE-FDD B2 (10 MHz)
-98 LTE-FDD B3 (10 MHz)
-99 LTE-FDD B4 (10 MHz)
-98 LTE-FDD B5 (10 MHz)
-99 LTE-FDD B7 (10 MHz)
-97.5 LTE-FDD B8 (10 MHz)
-99 LTE-FDD B20 (10 MHz)
-98.5 LTE-FDD B28 (10 MHz)
-99.5
-110
-110
-110
-110
-110
-100
-100
-99
-100
-100
-99
-100
-100
-100
TBD TBD TBD TBD TBD
-102
-102
-102
-102
-102
-101
-102
-102
-102
-102.4
-102.4
-102.4
-102.4
-106.7
-104.7
-106.7
-104.7
-103.7
-96.3
-94.3
-93.3
-96.3
-94.3
-94.3
-93.3
-93.3
-94.8 LTE-TDD B38 (10 MHz)
-97
-98.5
-100.5
-96.3 LTE-TDD B39 (10 MHz)
-98 LTE-TDD B40 (10 MHz)
-98 LTE-TDD B41 (10 MHz)
-97
-99
-99
-97
-101
-101
-100
-96.3
-96.3
-94.3 SC668S_Series_Hardware_Design 82 / 118 Smart Module Series 5.1.4. Reference Design of Cellular Antenna Interface The module provides four RF antenna interfaces for antenna connection. It is recommended to reserve a -type matching circuit for better RF performance, and the -type matching components (R1/C1/C2, R2/C3/C4) should be placed as close to the antenna as possible. The capacitors are not mounted by default. Figure 29: Reference Design for RF Antenna Interfaces 5.2. GNSS The module integrates the IZat GNSS engine (Gen 9) which supports multiple positioning and navigation systems including GPS, GLONASS, BDS, Galileo and QZSS and so on. With an embedded LNA, the module provides greatly improved positioning accuracy. 5.2.1. Antenna Interface & Frequency Bands The following table shows the pin definition, frequency, and performance of GNSS antenna interface. Table 42: Pin Definition of GNSS Antenna Interface Pin Name Pin No. I/O Description Comment ANT_GNSS 134 AI GNSS antenna interface 50 characteristic impedance. SC668S_Series_Hardware_Design 83 / 118 ANT_MAINR1 0 RC1ModuleMainantennaNMC2NMR2 0 RC3Diversity antennaNMC4NMANT_DRX GNSS_LNA_EN 202 DO GNSS LNA enable control Smart Module Series Only for internal test, cannot be multiplexed into a generic GPIO. If it is not used, keep this pin open. Table 43: Operating Frequency Type GPS/QZSS GLONASS Galileo BDS Frequency Unit 1575.42 1.023 1597.51605.8 1575.42 2.046 1561.098 2.046 MHz 5.2.2. GNSS Performance Table 44: GNSS Performance Parameter Description Acquisition Sensitivity Reacquisition Tracking Cold start TTFF Warm start Hot start CEP-50 Accuracy NOTE Typ.
-147
-158
-159 33 22 1.2
< 2.5 Unit dBm s m 1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). 2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Acquisition sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. SC668S_Series_Hardware_Design 84 / 118 Smart Module Series 5.2.3. Reference Design 5.2.3.1. Reference Design for GNSS Passive Antenna GNSS antenna interface supports passive ceramic antennas and other types of passive antennas. A reference design is given below. Figure 30: Reference Design for GNSS Passive Antenna NOTE When the passive antenna is placed far away from the module (that is, the antenna trace is long), it is recommended to add an external LNA circuit for better GNSS receiving performance, and the LNA should be placed close to the antenna. 5.2.3.2. Reference Design for GNSS Active Antenna The active antenna is powered by a 56 nH inductor through the antenna's signal path. The common power supply voltage ranges from 3.3 V to 5.0 V. Although featuring low power consumption, the active antenna still requires stable and clean power supplies. It is recommended to use high-performance LDO as the power supply. A reference design of the GNSS active antenna is shown below. SC668S_Series_Hardware_Design 85 / 118 Passive AntennaModuleANT_GNSSNMC1C2R1C4NM0R Smart Module Series Figure 31: Reference Design for GNSS Active Antenna NOTE It is recommended to use a passive antenna. If active antennas are required, it is strongly recommended to reserve a -type attenuation and ensure that the total gain of the external GNSS RF path of the module is not greater than 0 dB. At the same time, this may compromise the GNSS performance, depending on the performance of the active antenna. 5.2.3.3. GNSS RF Design Guidelines Improper design of antenna and layout may cause reduced GNSS receiving sensitivity, longer GNSS positioning time, or reduced positioning accuracy. To avoid it, follow the reference design rules as below:
Maximize the distance between the GNSS RF part and the GPRS RF part (including trace routing and antenna layout) to avoid mutual interference. In user systems, GNSS RF signal lines and RF components should be placed far away from high-speed circuits, switched-mode power supplies, power inductors, the clock circuit of single-chip microcomputers, etc. For harsh electromagnetic environment or a design that requires better ESD protection, diodes with ultra-low junction capacitance such as 0.5 pF can be selected and added in the antenna interface. Otherwise, there will be effects on the impedance characteristic of the RF circuit loop or attenuation of the bypass RF signal may be caused. Control the impedance of either feeder line or PCB trace to 50 , and keep the trace length as short as possible. SC668S_Series_Hardware_Design 86 / 118 Active Antenna3V3ModuleANT_GNSS56 nH10 1 F100 pFC1R1L1C3C2100 pFR3R4R50 NMNM Smart Module Series 5.3. Wi-Fi and Bluetooth The module provides a shared antenna interface ANT_WIFI/BT for Wi-Fi and Bluetooth functions. The interface impedance is 50 . You can connect external antennas such as PCB antenna, sucker antenna and ceramic antenna to the module via these interfaces to achieve Wi-Fi and Bluetooth functions. The following tables show the pin definition and frequency specification of the Wi-Fi/Bluetooth antenna interface. Table 45: Pin Definition of Wi-Fi/Bluetooth Interfaces Pin Name Pin No. I/O Description Comment ANT_WIFI/BT 129 AIO Wi-Fi/Bluetooth antenna interface 50 characteristic impedance. Table 46: Wi-Fi/Bluetooth Frequency Type Wi-Fi 802.11a/b/g/n/ac BLE 5.0 Frequency 24122462 51805825 24022480 5.3.1. Wi-Fi Overview Unit MHz MHz The module supports 2.4 GHz and 5 GHz dual-band Wi-Fi wireless communication based on IEEE 802.11a/b/g/n/ac standard protocols. The maximum data rate is up to 433 Mbps. The features are as below:
Supports Wake-on-WLAN (WoWLAN) Supports ad hoc mode Supports WAPI SMS4 hardware encryption Support AP and STA modes Supports Wi-Fi Direct Support MCS 07 for HT20 and HT40 Support MCS 08 for VHT20 Support MCS 09 for VHT40 and VHT80 SC668S_Series_Hardware_Design 87 / 118 The following table lists the Wi-Fi transmitting and receiving performance of the module. Table 47: Wi-Fi Transmitting Performance Smart Module Series Frequency Standard 802.11b 802.11b 802.11g 802.11g 802.11n HT20 802.11n HT20 802.11n HT40 802.11n HT40 802.11a 802.11a 802.11n HT20 802.11n HT20 802.11n HT40 802.11n HT40 2.4 GHz 5 GHz Rate 1 Mbps 11 Mbps 6 Mbps 54 Mbps MCS0 MCS7 MCS0 MCS7 6 Mbps 54 Mbps MCS0 MCS7 MCS0 MCS7 802.11ac VHT20 MCS0 802.11ac VHT20 MCS8 802.11ac VHT40 MCS0 802.11ac VHT40 MCS9 802.11ac VHT80 MCS0 802.11ac VHT80 MCS9 SC668S_Series_Hardware_Design 88 / 118 Table 48: Wi-Fi Receiving Performance Smart Module Series Frequency Standard 2.4 GHz 5 GHz 802.11b 802.11b 802.11g 802.11g 802.11n HT20 802.11n HT20 802.11a 802.11a Rate 1 Mbps 11 Mbps 6 Mbps 54 Mbps MCS0 MCS7 6 Mbps 54 Mbps 802.11n HT20 MCS0 802.11n HT20 MCS7 802.11n HT40 MCS0 802.11n HT40 MCS7 802.11ac VHT20 MCS0 802.11ac VHT20 MCS8 802.11ac VHT40 MCS0 802.11ac VHT40 MCS9 802.11ac VHT80 MCS0 802.11ac VHT80 MCS9 Sensitivity
-97 dBm
-88 dBm
-91 dBm
-74 dBm
-90 dBm
-72 dBm
-91 dBm
-74 dBm
-91 dBm
-71 dBm
-87 dBm
-68 dBm
-91 dBm
-69 dBm
-89 dBm
-65 dBm
-86 dBm
-61 dBm NOTE The product conforms to the IEEE specifications. SC668S_Series_Hardware_Design 89 / 118 Smart Module Series 5.3.2. Bluetooth Overview The module supports Bluetooth 5.0 (BR/EDR + BLE) specification, as well as GFSK, 8-DPSK,
/4-DQPSK modulation modes. Maximally supports up to 7 lanes of wireless connections. Maximally supports up to 3.5 piconets at the same time. Support one SCO or eSCO connection. The BR/EDR channel bandwidth is 1 MHz, and can accommodate 79 channels. The BLE channel bandwidth is 2 MHz, and can accommodate 40 channels. Table 49: Bluetooth Data Rate and Version Version 1.2 2.0 + EDR 3.0 + HS 4.0 5.0 Rate 1 Mbit/s 3 Mbit/s Maximum Application Throughput
> 80 kbit/s
> 80 kbit/s 24 Mbit/s Reference 3.0 + HS 24 Mbit/s Reference 4.0 LE 48 Mbit/s Reference 5.0 LE Reference specifications are listed below:
Bluetooth Radio Frequency TSS and TP Specification 1.2/2.0/2.0 + EDR/2.1/2.1+ EDR/3.0/3.0 + HS, August 6, 2009 Bluetooth Low Energy RF PHY Test Specification, RF-PHY.TS/4.0.0, December 15, 2009 Bluetooth 5.0 RF-PHY Cover Standard: RF-PHY.TS.5.0.0, December 06, 2016 Table 50: Bluetooth Transmitting and Receiving Performance Transmitter Performance Packet Types DH5 2-DH5 3-DH5 Receiver Performance Packet Types DH5 Receiving Sensitivity
-91 2-DH5
-91 3-DH5
-83 SC668S_Series_Hardware_Design 90 / 118 Smart Module Series 5.3.3. Reference Design A reference design for Wi-Fi/Bluetooth antenna interface is shown as below. Capacitors are not mounted by default and the resistor is 0 . Figure 32: Reference Design for Wi-Fi/Bluetooth Antenna 5.4. RF Routing Guidelines For users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 33: Microstrip Design on a 2-layer PCB SC668S_Series_Hardware_Design 91 / 118 ANT_WIFI/BTR1 0RC1ModuleNMC2NM Smart Module Series Figure 34: Coplanar Waveguide Design on a 2-layer PCB Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) SC668S_Series_Hardware_Design 92 / 118 Smart Module Series To ensure RF performance and reliability, the following principles should be complied with in RF layout design:
Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 . The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground. The distance between the RF pins and the RF connector should be as short as possible and all the right-angle traces should be changed to curved ones. The recommended trace angle is 135. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2 W). Keep RF traces away from interference sources, and avoid intersection and paralleling between traces on adjacent layers. For more details about RF layout, see document [4]. 5.5. Antenna Design Requirement Requirements for antenna design are as follow:
Table 51: Requirements for Antenna Design Antenna Type Requirements GNSS Wi-Fi/Bluetooth Frequency range: 15591609 MHz Polarization Type: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi Active antenna noise figure: < 1.5 dB Typ. Active antenna gain: > -2 dBi Active antenna embedded LNA gain: < 17 dB Typ. Active Antenna Embedded LNA Gain: < 0 dBi (Typ.) VSWR: 2 Gain: 1 dBi Max Input Power: 50 W Input Impedance: 50 Polarization Type: Vertical Cable Insertion Loss: < 1 dB SC668S_Series_Hardware_Design 93 / 118 Smart Module Series 5.6. RF Connector Recommendation If you use an RF connector for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by Hirose. Figure 37: Dimensions of the Receptacle (Unit: mm) U.FL-LP series connectors listed in the following figure can be used to match the U.FL-R-SMT. SC668S_Series_Hardware_Design 94 / 118 Smart Module Series Figure 38: Specifications of Mated Plugs (Unit: mm) The following figure describes the space factor of mated connectors. Figure 39: Space Factor of Mated Connectors (Unit: mm) Please visit http://www.hirose.com for more information. SC668S_Series_Hardware_Design 95 / 118 Smart Module Series 6 Electrical Characteristics and Reliability 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module is listed in the following table. Table 52: Absolute Maximum Ratings Parameter VBAT USB_VBUS Min.
-0.3
-0.3 Peak Current of VBAT
Max. 4.75 16 3 Voltage on Digital Pins
-0.3 2.04 Unit V V A V 6.2. Power Supply Ratings Table 53: The Modules Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT VBAT The actual input voltages must stay between the minimum and maximum values 3.55 3.8 4.4 V IVBAT Peak supply current (during transmission slot) Maximum power control level at EGSM900
1.8 3.0 A SC668S_Series_Hardware_Design 96 / 118 Smart Module Series 4.0 5.0 6.0 2.1 3.0 3.25 V V USB_VBUS VRTC USB connection detect Power supply voltage of the backup battery 6.3. Power consumption Table 54: SC668S-CN Power Consumption Description OFF state Sleep state Conditions Power down Screen out GSM/GPRS supply current Sleep state (USB disconnected) CDMA supply current WCDMA supply current Sleep state (USB disconnected) LTE-FDD supply current Sleep state (USB disconnected) EGSM900 CH62 @ DRX = 2 EGSM900 CH62 @ DRX = 5 EGSM900 CH62 @ DRX = 9 DCS1800 698 @ DRX = 2 DCS1800 698 @ DRX = 5 DCS1800 698 @ DRX = 9 BC0 CH283 @
BC0 CH283 @
WCDMA PF = 64 WCDMA PF = 128 WCDMA PF = 256 WCDMA PF = 512 LTE-FDD PF = 32 LTE-FDD PF = 64 LTE-FDD PF = 128 LTE-FDD PF = 256 Typ. 100 5.5 5.3 4.2 3.9 5.4 4.2 3.9 5.8 6 4.7 4.2 3.9 3.8 6.2 4.9 4.3 3.9 Unit A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC668S_Series_Hardware_Design 97 / 118 Smart Module Series LTE-TDD supply current Sleep state (USB disconnected) WCDMA voice call GPRS data transfer EDGE data transfer LTE-TDD PF = 32 LTE-TDD PF = 64 LTE-TDD PF = 128 LTE-TDD PF = 256 B1 @ max power B8 @ max power GSM900 @ 1DL 4UL DCS1800 @ 1DL 4UL GSM900 @ 1DL 4UL DCS1800 @ 1DL 4UL LTE-FDD B1 @ max power LTE-FDD B3 @ max power LTE-FDD B5 @ max power LTE-FDD B8 @ max power LTE data transfer LTE-TDD B34 @ max power LTE-TDD B38 @ max power LTE-TDD B39 @ max power LTE-TDD B40 @ max power LTE-TDD B41 @ max power GSM900 @ PCL 5 DCS1800 @ PCL 0 B1 (HSDPA) @ max. power B8 (HSDPA) @ max. power B1 (HSUPA) @ max. power B8 (HSUPA) @ max. power GSM voice call WCDMA data transfer CDMA voice call BC0 @ max. power 6.2 4.9 4.3 3.9 566 540 579 391 529 456 547 520 538 504 404 433 413 385 440 270 212 557 541 572 557 637 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC668S_Series_Hardware_Design 98 / 118 EVDO data transfer BC0 @ max. power 634 mA Smart Module Series Table 55: SC668S-EM Power Consumption Description OFF state Sleep state Conditions Power down Screen out GSM/GPRS supply current Sleep state (USB disconnected) EGSM900 CH62 @ DRX = 2 EGSM900 CH62 @ DRX = 5 EGSM900 CH62 @ DRX = 9 DCS1800 698 @ DRX = 2 DCS1800 698 @ DRX = 5 DCS1800 698 @ DRX = 9 WCDMA supply current Sleep state (USB disconnected) LTE-FDD supply current Sleep state (USB disconnected) LTE-TDD supply current Sleep state (USB disconnected) WCDMA voice call WCDMA PF = 64 WCDMA PF = 128 WCDMA PF = 256 WCDMA PF = 512 LTE-FDD PF = 32 LTE-FDD PF = 64 LTE-FDD PF = 128 LTE-FDD PF = 256 LTE-TDD PF = 32 LTE-TDD PF = 64 LTE-TDD PF = 128 LTE-TDD PF = 256 B1 @ max power B2 @ max power Typ. 100 5.5 5.3 4.5 4.2 5.4 4.5 4.2 4.3 3.8 3.5 3.4 5.7 4.5 3.8 3.5 5.8 4.5 3.8 3.5 573 591 Unit A mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC668S_Series_Hardware_Design 99 / 118 GPRS data transfer EDGE data transfer B4 @ max power B5 @ max power B8 @ max power GSM850 @ 1DL 4UL GSM900 @ 1DL 4UL DCS1800 @ 1DL 4UL PCS1900 @ 1DL 4UL GSM850 @ 1DL 4UL GSM900 @ 1DL 4UL DCS1800 @ 1DL 4UL PCS1900 @ 1DL 4UL LTE-FDD B1 @ max power LTE-FDD B2 @ max power LTE-FDD B3 @ max power LTE-FDD B4 @ max power LTE-FDD B5 @ max power LTE-FDD B7 @ max power LTE data transfer LTE-FDD B8 @ max power LTE-FDD B20 @ max power LTE-FDD B28 @ max power LTE-TDD B38 @ max power LTE-TDD B39 @ max power LTE-TDD B40 @ max power LTE-TDD B41 @ max power GSM850 @ PCL 5 GSM900 @ PCL 5 GSM voice call Smart Module Series 534 560 547 586 587 429 421 543 544 469 469 613 624 610 585 594 675 592 636 624 337 316 335 344 279 288 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA SC668S_Series_Hardware_Design 100 / 118 Smart Module Series DCS1800 @ PCL 0 PCS1900 @ PCL 0 B1 (HSDPA) @ max power B2 (HSDPA) @ max power B4 (HSDPA) @ max power B5 (HSDPA) @ max power B8 (HSDPA) @ max power B1 (HSUPA) @ max power B2 (HSUPA) @ max power B4 (HSUPA) @ max power B5 (HSUPA) @ max power B8 (HSUPA) @ max power 207 205 563 588 526 546 534 558 606 547 563 550 mA mA mA mA mA mA mA mA mA mA mA mA WCDMA data transfer 6.4. Digital I/O Characteristics Table 56: 1.8 V I/O Requirements Parameter Description VIH VIL VOH VOL Min. 1.17
-0.3 Input high voltage Input low voltage Output high voltage 1.35 Output low voltage 0 Table 57: (U)SIM 1.8 V I/O Requirements Parameter Description USIM_VDD Power supply Min. 1.7 Max. Unit 2.1 0.63 1.8 0.45 Max. 1.9 V V V V Unit V SC668S_Series_Hardware_Design 101 / 118 Smart Module Series VIH VIL VOH VOL Input high voltage Input low voltage 1.26
-0.3 Output high voltage 1.44 Output low voltage 0 2.1 0.36 1.8 0.4 V V V V Table 58: (U)SIM 2.95 V I/O Requirements Parameter Description USIM_VDD Power supply Min. 2.7 2.07
-0.3 Input high voltage Input low voltage Output high voltage 2.36 Output low voltage 0 VIH VIL VOH VOL Max. Unit 3.03 3.25 0.59 2.95 0.4 V V V V V 6.5. ESD Protection Static electricity occurs naturally and it may damage the module. Therefore, applying proper ESD countermeasures and handling methods is imperative. For example, wear anti-static gloves during the development, production, assembly and testing of the module; add ESD protection components to the ESD sensitive interfaces and points in the product design. Table 59: Electrostatic Discharge Characteristics (Temperature: 25 C, Humidity: 40 %) Tested Interfaces Contact Discharge Air Discharge Unit VCC, GND Antenna Interfaces 5 5 Other Interfaces 0.5 10 10 1 kV kV kV SC668S_Series_Hardware_Design 102 / 118 Smart Module Series 6.6. Operating and Storage Temperatures Table 60: Operating and Storage Temperatures Parameter Operating Temperature Range 6 Storage temperature range Min.
-35
-40 Typ.
+25
Max. Unit
+75
+90 C C 6 Within operating temperature range, the module is 3GPP compliant. SC668S_Series_Hardware_Design 103 / 118 Smart Module Series 7 Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the tolerances for dimensions without tolerance values are 0.2 mm. 7.1. Mechanical Dimensions Figure 40: Module Top and Side Dimensions (Unit: mm) SC668S_Series_Hardware_Design 104 / 118 Smart Module Series Figure 41: Module Bottom Dimensions (Unit: mm) NOTE The package warpage level of the module conforms to JEITA ED-7306 standard. SC668S_Series_Hardware_Design 105 / 118 7.2. Recommended Footprint Smart Module Series Figure 42: Recommended Footprint (Top View) NOTE 1. Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience. 2. All RESERVED pins should be kept open and MUST NOT be connected to ground. SC668S_Series_Hardware_Design 106 / 118 7.3. Top and Bottom Views Smart Module Series Figure 43: Top and Bottom Views NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. SC668S_Series_Hardware_Design 107 / 118 Smart Module Series 8 Storage, Manufacturing & Packaging 8.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: the temperature should be 23 5 C and the relative humidity should be 3560 %. 2. Shelf life (in a vacuum-sealed packaging): 12 months in Recommended Storage Condition. 3. Floor life: 168 hours 7 in a factory where the temperature is 23 5 C and relative humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10 % (e.g., a dry cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:
The module is not stored in Recommended Storage Condition;
Violation of the third requirement mentioned above;
Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;
Before module repairing. 5. If needed, the pre-baking should follow the requirements below:
The module should be baked for 8 hours at 120 5 C;
The module must be soldered to PCB within 24 hours after the baking, otherwise it should be put in a dry environment such as in a dry cabinet. 7 This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. It is recommended to start the solder reflow process within 24 hours after the package is removed if the temperature and moisture do not conform to, or are not sure to conform to IPC/JEDEC J-STD-033. And do not remove the packages of tremendous modules if they are not ready for soldering. SC668S_Series_Hardware_Design 108 / 118 Smart Module Series NOTE 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. All modules must be soldered to PCB within 24 hours after the baking, otherwise put them in the drying oven. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules. 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. Apply proper force on the squeegee to produce a clean stencil surface on a single pass. To guarantee module soldering quality, the thickness of stencil for the module is recommended to be 0.180.20 mm. For more details, see document [5]. The peak reflow temperature should be 235246 C, with 246 C as the absolute maximum reflow temperature. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted only after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 44: Recommended Reflow Soldering Thermal Profile SC668S_Series_Hardware_Design 109 / 118 Temp. (C)Reflow ZoneSoak Zone246200217235CDBA150100 Max slope: 13 C/s Cooling down slope: -1.5 to -3 C/s Max slope: 13 C/s Smart Module Series Table 61: Recommended Thermal Profile Parameters Factor Soak Zone Max slope Recommendation 13 C/s Soak time (between A and B: 150 C and 200 C) 70120 s Reflow Zone Max slope Reflow time (D: over 217 C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle NOTE 13 C/s 4070 s 235 C to 246 C
-1.5 to -3 C/s 1 1. If a conformal coating is necessary for the module, do NOT use any coating material that may chemically react with the PCB or shielding cover, and prevent the coating material from flowing into the module. 2. Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the module. 3. Due to the complexity of the SMT process, please contact Quectel Technical Supports in advance for any situation that you are not sure about, or any process (e.g., selective soldering, ultrasonic soldering) that is not mentioned in document [5]. SC668S_Series_Hardware_Design 110 / 118 Smart Module Series 8.3. Packaging Specification The module adopts carrier tape packaging and details are as follow:
8.3.1. Carrier Tape Dimension details are as follow:
Figure 45: Carrier Tape Dimension Drawing Table 62: Recommended Thermal Profile Parameters W 72 P 56 T A0 B0 0.35 44.5 43.5 K0 4.1 K1 5.4 F E 34.2 1.75 8.3.2. Plastic Reel Figure 46: Plastic Reel Dimension Drawing SC668S_Series_Hardware_Design 111 / 118 Smart Module Series Table 63: Plastic Reel Dimension Table (Unit: mm) D1 380 D2 180 W 72.5 8.3.3. Packaging Process Place the packaged plastic reel, humidity indicator card and desiccant bag into a vacuum bag, then vacuumize it. Place the module into the carrier tape and use the cover tape to cover them; then wind the heat-sealed carrier tape to the plastic reel and use the protective tape for protection. One plastic reel can load 200 modules. Place the vacuum-packed plastic reel into a pizza box. Put 4 pizza boxes into 1 carton and seal it. One carton can load 800 modules. Figure 47: Packaging Process SC668S_Series_Hardware_Design 112 / 118 Smart Module Series 9 Appendix References Table 64: Related Documents Document Name
[1] Quectel_SC668S_Series_GPIO_Configuration
[2] Quectel_Smart_EVB_G5_User_Guide
[3] Quectel_SC668S_Series_Display_Port_Application_Note
[4] Quectel_RF_Layout_Application_Note
[5] Quectel_Module_Secondary_SMT_Application_Note Table 65: Terms and Abbreviations Abbreviation Description 3GPP ADC aDSP AMR ANT AP BLE bps BR 3rd Generation Partnership Project Analog-to-Digital Converter Audio Digital Signal Processor Adaptive Multi-rate Antenna Access Point/Application Processor Bluetooth Low Energy Bits per Second Basic Rate CDMA Code-Division Multiple Access SC668S_Series_Hardware_Design 113 / 118 Smart Module Series CS CSD CSI CTS DL DRX DSI DSP EDGE EDR EFR EGSM EMI eMMC eSCO ESD ESR ETSI EVB EVDO EVRC FDD FR Coding Scheme Circuit Switched Data Camera Serial Interface Clear to Send Downlink Discontinuous Reception Display Serial Interface Digital Signal Processing/Digital Signal Processor Enhanced Data Rate for GSM Evolution Enhanced Data Rate Enhanced Full Rate Extended GSM900 band (including standard GSM900 band) Electromagnetic Interference Embedded Multimedia Card Extended Synchronous Connection Oriented Electrostatic Discharge Equivalent Series Resistance European Telecommunications Standards Institute Evaluation Board Evolution-Data Optimized Enhanced Variable Rate Codec Frequency Division Duplex Full Rate GLONASS Global Navigation Satellite System (Russia) GMSK Gaussian Minimum Shift Keying SC668S_Series_Hardware_Design 114 / 118 Smart Module Series GPIO GPS GPRS GPU GSM GNSS GRFC HR General Purpose Input/Output Global Positioning System General packet radio service Graphics Processing Unit Global System for Mobile Communications Global Navigation Satellite System Generic RF Control Half Rate HSDPA High Speed Down Link Packet Access HSPA HEVC I2C I2S IEEE I/O Imax IOmax High Speed Packet Access High Efficiency Video Coding Inter-Integrated Circuit Inter-IC Sound Institute of Electrical and Electronics Engineers Input/Output Maximum Load Current Maximum Output Load Current IMT-2000 International Mobile Telecom System-2000 LCC LCD LCM LDO LGA LNA LTE Leadless Chip Carrier (package) Liquid Crystal Display LCD Module Low Dropout Regulator Land Grid Array Low Noise Amplifier Long-Term Evolution SC668S_Series_Hardware_Design 115 / 118 Smart Module Series Machine to Machine Microcontroller Unit/Microprogrammed Control Unit Multi-input Multi-output Mobile Industry Processor Interface Million Pixel Moisture Sensitivity Levels Over-the-Air Technology On-The-Go Printed Circuit Board Personal Digital Assistant Protocol Data Unit Physical Power Management Unit Point of Sale Phase Shift Keying Power Down Pulse Width Modulation M2M MCU MIMO MIPI MP MSL OTA OTG PCB PDA PDU PHY PMU POS PSK PWDN PWM PWRKEY Power Key QAM QPSK RF RTC RTS RX SCO Quadrature Amplitude Modulation Quadrature Phase Shift Keying Radio Frequency Real Time Clock Request to Send Receive Synchronous Connection Oriented link SC668S_Series_Hardware_Design 116 / 118 Smart Module Series SD SMS SMT SPI STA TDD TE TP TVS TX UART DCE UL UMTS
(U)SIM USB UVA Vmax Vmin Vnom VIH VIL VOL VOH Secure Digital Short Message Service Surface Mount Technology Serial Peripheral Interface Station Time Division Distortion Tearing Effect Touch Panel Transient Voltage Suppressor Transmit Universal Asynchronous Receiver & Transmitter Data Circuit-terminating Equipment Uplink Universal Mobile Telecommunications System
(Universal) Subscriber Identity Module Universal Serial Bus Unmanned Aerial Vehicle Maximum Voltage Minimum Voltage Nominal Voltage High-level Input Voltage Low-level Input Voltage Low-level Output Voltage High-level Output Voltage VSWR Voltage Standing Wave Ratio SC668S_Series_Hardware_Design 117 / 118 Smart Module Series WAPI Wireless LAN Authentication and Privacy Infrastructure WCDMA Wideband Code Division Multiple Access WLAN Wireless Local Area Network SC668S_Series_Hardware_Design 118 / 118
1 2 3 | Label | ID Label/Location Info | 89.06 KiB | January 10 2023 / January 13 2023 |
WARNING:pdfminer.pdfpage:The PDF <_io.BufferedReader name='/Volumes/Scratch/Incoming/eg-scratch/6320274.pdf'> contains a metadata field indicating that it should not allow text extraction. Ignoring this field and proceeding. Use the check_extractable if you want to raise an error in this case
1 2 3 | Label Location | ID Label/Location Info | 30.04 KiB | January 10 2023 / January 13 2023 |
WARNING:pdfminer.pdfpage:The PDF <_io.BufferedReader name='/Volumes/Scratch/Incoming/eg-scratch/6320273.pdf'> contains a metadata field indicating that it should not allow text extraction. Ignoring this field and proceeding. Use the check_extractable if you want to raise an error in this case
1 2 3 | Request for Modular Approval per section 15.212 requirements | Cover Letter(s) | 102.53 KiB | January 10 2023 / January 13 2023 |
WARNING:pdfminer.pdfpage:The PDF <_io.BufferedReader name='/Volumes/Scratch/Incoming/eg-scratch/6320268.pdf'> contains a metadata field indicating that it should not allow text extraction. Ignoring this field and proceeding. Use the check_extractable if you want to raise an error in this case Applicant/Grantee Quectel Wireless Solutions Company Limited /XMR FCC ID:
XMR2022SC668SWF Section 15.212 Modular Transmitters Request for Modular Approval Request for Limited Modular Approval Requirements EUT Conditions Comply (Y/N) Single Modular Approval Requirements The radio portion of this module is shielded, please see exhibition external photos. Y The module has buffer modulation/data inputs. Y The module has its own power supply regulation. Please see the schem.pdf The requirements of antenna connector and spurious emission have been fulfilled. Please refer to the Test Report exhibition. Y Y Please refer to the Setup Photo exhibition for the stand-alone test configuration. Y 1 2 3 4 5 The radio elements of the modular transmitter must have their own shielding. The physical crystal and tuning capacitors may be located external to the shielded radio elements. The modular transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with Part 15 requirements under conditions of excessive data rates or over-modulation. The modular transmitter must have its own power supply regulation. The modular transmitter must comply with the antenna and transmission system requirements of Sections 15.203, 15.204(b) and 15.204(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable). The professional installation provision of Section 15.203 is not applicable to modules but can apply to limited modular approvals under paragraph (b) of this section. The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing for compliance with Part 15 requirements. Unless the transmitter module will be battery powered, it must comply with the AC line conducted requirements found in Section 15.207. AC or DC power lines and data input/output lines connected to the module must not contain ferrites, unless they will be marketed with the module (see Section 15.27(a)). The length of these lines shall be the length typical of actual use or, if that length is unknown, at least 10 centimeters to insure that there is no coupling between the case of the module and supporting 6 7 equipment. Any accessories, peripherals, or support equipment connected to the module during testing shall be unmodified and commercially available
(see Section 15.31(i)). The modular transmitter must be equipped with either a permanently affixed label or must be capable of electronically displaying its FCC identification number.
(A) If using a permanently affixed label, the modular transmitter must be labeled with its own FCC identification number, and, if the FCC identification number is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains Transmitter Module FCC ID: XYZMODEL1 or Contains FCC ID:
XYZMODEL1. Any similar wording that expresses the same meaning may be used. The Grantee may either provide such a label, an example of which must be included in the application for equipment authorization, or, must provide adequate instructions along with the module which explain this requirement. In the latter case, a copy of these instructions must be included in the application for equipment authorization.
(B) If the modular transmitter uses an electronic display of the FCC identification number, the information must be readily accessible and visible on the modular transmitter or on the device in which it is installed. If the module is installed inside another device, then the outside of the device into which the module is installed must display a label referring to the enclosed module. This exterior label can use wording such as the following:
Contains FCC certified transmitter module(s). Any similar wording that expresses the same meaning may be used. The user manual must include instructions on how to access the electronic display. A copy of these instructions must be included in the application for equipment authorization. The modular transmitter must comply with any specific rules or operating requirements that ordinarily apply to a complete transmitter and the manufacturer must provide adequate instructions along with the module to explain any such requirements. A copy of these instructions must be included in the application for equipment authorization. The Module will be labeled with its own FCC ID, and the instruction on the labeling rule of the end product has been stated in the User Manual of this module. Please refer to the Label and User Manual exhibition. Y The required FCC rule has been fulfilled and all the instructions for maintaining compliance have been clearly stated in the User Manual. Y 8 The modular transmitter must comply with any applicable RF exposure requirements in its final configuration. Please refer exhibition RF Exposure for the compliance of MPE RF exposure rule. Y _________________________________ Contact Person: Jean Hu E-mail: jean.hu@quectel.com
1 2 3 | Tsup Antenna Spec | Test Setup Photos | 278.79 KiB | January 10 2023 / July 12 2023 | delayed release |
1 2 3 | Tsup DSS BT | Test Setup Photos | 276.75 KiB | January 10 2023 / July 12 2023 | delayed release |
1 2 3 | cvrltr FCC Long-term Confidentiality | Cover Letter(s) | 68.37 KiB | January 10 2023 / January 13 2023 |
WARNING:pdfminer.pdfpage:The PDF <_io.BufferedReader name='/Volumes/Scratch/Incoming/eg-scratch/6320270.pdf'> contains a metadata field indicating that it should not allow text extraction. Ignoring this field and proceeding. Use the check_extractable if you want to raise an error in this case Quectel Wireless Solutions Company Limited Date: January 5, 2023 Federal Communications Commission Authorization and Evaluation Division Confidentiality Request regarding application for certification of FCC ID: XMR2022SC668SWF Pursuant to Sections 0.457 and 0.459 of the Commissions Rules, we hereby request confidential treatment of information accompanying this application as outlined below:
Part List Schematics Block Diagram Operation Description Tune up Procedure The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these materials may be harmful to the applicant and provide unjustified benefits to its competitors. The applicant understands that pursuant to Section 0.457 of the Rules, disclosure of this application and all accompanying documentation will not be made before the date of the Grant for this application. Sincerely, ________________________ Contact Person: Jean Hu E-mail: jean.hu@quectel.com Rev. 1/1/03
1 2 3 | Power of Attorney Letter | Cover Letter(s) | 81.63 KiB | January 10 2023 / January 13 2023 |
WARNING:pdfminer.pdfpage:The PDF <_io.BufferedReader name='/Volumes/Scratch/Incoming/eg-scratch/6320271.pdf'> contains a metadata field indicating that it should not allow text extraction. Ignoring this field and proceeding. Use the check_extractable if you want to raise an error in this case Quectel Wireless Solutions Company Limited Power of Attorney Date: January 5, 2023 To whom it may concern, Please be notified that I, Jean Hu, have designated Jim Tsai in Sporton International Inc. as the person being responsible for this project and to sign the form 731 and other documentation. Any and all acts carried out by Jim Tsai in Sporton International Inc., on the matters of relating to all processes required in the FCC approval and any communication needed with the national authority, shall have the same legal authority as acts on our own behalf. We further certifies that neither the applicant nor any party to this application, as defined in 47 CFR Ch. 1.2002 (b), is subject to a denial to Federal benefits, that include FCC benefits, pursuant to section 5301 of the Anti-Drug Abuse Act of 1998, 21 U.S.C 862. This authorization is limited to the product of as following:
FCC ID: XMR2022SC668SWF If you have any acknowledgement and response, please send it to Sporton International Inc. directly. Should you have any questions or comments regarding this matter, please have my best attention. Sincerely yours, ____ Contact Person: Jean Hu E-mail: jean.hu@quectel.com
1 2 3 | cvrltr FCC Short-term Confidentiality | Cover Letter(s) | 82.15 KiB | January 10 2023 / January 13 2023 |
WARNING:pdfminer.pdfpage:The PDF <_io.BufferedReader name='/Volumes/Scratch/Incoming/eg-scratch/6320272.pdf'> contains a metadata field indicating that it should not allow text extraction. Ignoring this field and proceeding. Use the check_extractable if you want to raise an error in this case Quectel Wireless Solutions Company Limited Date: January 5, 2023 Federal Communications Commission Authorization and Evaluation Division RE
: Certification Application FCC ID : XMR2022SC668SWF To Whom It May Concern, Pursuant to sections 0.457 and 0.459 of CFR 47, Public Notice DA 04-1705 of the Commissions policy and to avoid premature release of sensitive information prior to marketing or release of the product to the public, the applicant requests the following documents contained in this certification application be temporarily withheld from public disclosure for an initial period of 180 days:
External Photos Internal Photos Test set-up photos Users Manual The application contains technical information, which Quectel Wireless Solutions Company Limited deems to be trade secrets and proprietary. If made public, the information might be used to the disadvantage of the applicant in the market place. The Applicant understands that pursuant to Rule 0.457, disclosure of this Application and all accompanying documentation will not be made before the date of the Grant for this application Sincerely, ____ Contact Person: Jean Hu E-mail: jean.hu@quectel.com 1/1
1 2 3 | TestRpt NII U-NII-1,2,3 Part1-4 r2 | Test Report | 5.46 MiB | January 10 2023 / January 13 2023 |
1 2 3 | TestRpt NII U-NII-1,2,3 Part2-4 | Test Report | 5.46 MiB | January 10 2023 / January 13 2023 |
1 2 3 | TestRpt NII U-NII-1,2,3 Part3-4 | Test Report | 5.47 MiB | January 10 2023 / January 13 2023 |
1 2 3 | TestRpt NII U-NII-1,2,3 Part4-4 | Test Report | 1.79 MiB | January 10 2023 / January 13 2023 |
1 2 3 | Tsup NII DFS | Test Setup Photos | 77.49 KiB | January 10 2023 / July 12 2023 | delayed release |
1 2 3 | Tsup NII U-NII-1,2,3 | Test Setup Photos | 275.04 KiB | January 10 2023 / July 12 2023 | delayed release |
1 2 3 | TestRpt DTS WLAN 2.4G Part1-2 r2 | Test Report | 5.47 MiB | January 10 2023 / January 13 2023 |
1 2 3 | Tsup DTS BLE | Test Setup Photos | 278.00 KiB | January 10 2023 / July 12 2023 | delayed release |
1 2 3 | Tsup DTS WLAN 2.4G | Test Setup Photos | 274.71 KiB | January 10 2023 / July 12 2023 | delayed release |
frequency | equipment class | purpose | ||
---|---|---|---|---|
1 | 2023-01-13 | 2402 ~ 2480 | DSS - Part 15 Spread Spectrum Transmitter | Original Equipment |
2 | 5745 ~ 5825 | NII - Unlicensed National Information Infrastructure TX | ||
3 | 2412 ~ 2462 | DTS - Digital Transmission System |
app s | Applicant Information | |||||
---|---|---|---|---|---|---|
1 2 3 | Effective |
2023-01-13
|
||||
1 2 3 | Applicant's complete, legal business name |
Quectel Wireless Solutions Company Limited
|
||||
1 2 3 | FCC Registration Number (FRN) |
0018988279
|
||||
1 2 3 | Physical Address |
Building 5, Shanghai Business Park PhaseIII (Area B),No.1016 Tianlin Road, Minhang District
|
||||
1 2 3 |
Building 5, Shanghai Business Park PhaseIII
|
|||||
1 2 3 |
Shanghai, N/A
|
|||||
1 2 3 |
China
|
|||||
app s | TCB Information | |||||
1 2 3 | TCB Application Email Address |
K******@sporton-usa.com
|
||||
1 2 3 | TCB Scope |
A4: UNII devices & low power transmitters using spread spectrum techniques
|
||||
app s | FCC ID | |||||
1 2 3 | Grantee Code |
XMR
|
||||
1 2 3 | Equipment Product Code |
2022SC668SWF
|
||||
app s | Person at the applicant's address to receive grant or for contact | |||||
1 2 3 | Name |
J**** H********
|
||||
1 2 3 | Telephone Number |
+8602******** Extension:
|
||||
1 2 3 | Fax Number |
+8621********
|
||||
1 2 3 |
j******@quectel.com
|
|||||
app s | Technical Contact | |||||
n/a | ||||||
app s | Non Technical Contact | |||||
n/a | ||||||
app s | Confidentiality (long or short term) | |||||
1 2 3 | Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | Yes | ||||
1 2 3 | Long-Term Confidentiality Does this application include a request for confidentiality for any portion(s) of the data contained in this application pursuant to 47 CFR § 0.459 of the Commission Rules?: | Yes | ||||
1 2 3 | If so, specify the short-term confidentiality release date (MM/DD/YYYY format) | 07/12/2023 | ||||
if no date is supplied, the release date will be set to 45 calendar days past the date of grant. | ||||||
app s | Cognitive Radio & Software Defined Radio, Class, etc | |||||
1 2 3 | Is this application for software defined/cognitive radio authorization? | No | ||||
1 2 3 | Equipment Class | DSS - Part 15 Spread Spectrum Transmitter | ||||
1 2 3 | NII - Unlicensed National Information Infrastructure TX | |||||
1 2 3 | DTS - Digital Transmission System | |||||
1 2 3 | Description of product as it is marketed: (NOTE: This text will appear below the equipment class on the grant) | Smart Module | ||||
1 2 3 | Related OET KnowledgeDataBase Inquiry: Is there a KDB inquiry associated with this application? | No | ||||
1 2 3 | Modular Equipment Type | Single Modular Approval | ||||
1 2 3 | Purpose / Application is for | Original Equipment | ||||
1 2 3 | Composite Equipment: Is the equipment in this application a composite device subject to an additional equipment authorization? | Yes | ||||
1 2 3 | Related Equipment: Is the equipment in this application part of a system that operates with, or is marketed with, another device that requires an equipment authorization? | No | ||||
1 2 3 | Grant Comments | Single Modular Approval. Output power is conducted. This device is to be used only for mobile and fixed application; and must not be co-located or operating in conjunction with any other antenna or transmitter, except in accordance with FCC multi-transmitter evaluation procedures as documented in this filing. End-users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance. OEM integrators must insure that the end-user has no manual instructions to remove or install this module. For mobile operating configurations, the antenna gain, including cable loss, must not exceed the gains documented in this filing, as defined in 2.1091 for satisfying RF exposure compliance. | ||||
1 2 3 | Single Modular Approval. Output power is conducted. This device supports 20 MHz, 40MHz and 80 MHz bandwidth mode in the 5GHz band. This device is to be used only for mobile and fixed application; and must not be co-located or operating in conjunction with any other antenna or transmitter, except in accordance with FCC multi-transmitter evaluation procedures as documented in this filing. End-users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance. OEM integrators must insure that the end-user has no manual instructions to remove or install this module. For mobile operating configurations, the antenna gain, including cable loss, must not exceed the gains documented in this filing, as defined in 2.1091 for satisfying RF exposure compliance. | |||||
1 2 3 | Single Modular Approval. Output power is conducted. This device supports 20 MHz and 40 MHz bandwidth mode in the 2.4GHz band. This device is to be used only for mobile and fixed application; and must not be co-located or operating in conjunction with any other antenna or transmitter, except in accordance with FCC multi-transmitter evaluation procedures as documented in this filing. End-users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance. OEM integrators must insure that the end-user has no manual instructions to remove or install this module. For mobile operating configurations, the antenna gain, including cable loss, must not exceed the gains documented in this filing, as defined in 2.1091 for satisfying RF exposure compliance. | |||||
1 2 3 | Is there an equipment authorization waiver associated with this application? | No | ||||
1 2 3 | If there is an equipment authorization waiver associated with this application, has the associated waiver been approved and all information uploaded? | No | ||||
app s | Test Firm Name and Contact Information | |||||
1 2 3 | Firm Name |
Sporton International Inc. (Kunshan)
|
||||
1 2 3 | Name |
J******** T****
|
||||
1 2 3 | Telephone Number |
+86 0********
|
||||
1 2 3 |
J******@sporton.com.tw
|
|||||
Equipment Specifications | |||||||||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Line | Rule Parts | Grant Notes | Lower Frequency | Upper Frequency | Power Output | Tolerance | Emission Designator | Microprocessor Number | |||||||||||||||||||||||||||||||||
1 | 1 | 15C | CC | 2402.00000000 | 2480.00000000 | 0.0151000 | |||||||||||||||||||||||||||||||||||
Line | Rule Parts | Grant Notes | Lower Frequency | Upper Frequency | Power Output | Tolerance | Emission Designator | Microprocessor Number | |||||||||||||||||||||||||||||||||
2 | 1 | 15E | CC | 5180 | 5240 | 0.0453 | |||||||||||||||||||||||||||||||||||
2 | 2 | 15E | CC | 5260 | 5320 | 0.0434 | |||||||||||||||||||||||||||||||||||
2 | 3 | 15E | CC | 5500 | 5720 | 0.0393 | |||||||||||||||||||||||||||||||||||
2 | 4 | 15E | CC | 5745 | 5825 | 0.0379 | |||||||||||||||||||||||||||||||||||
Line | Rule Parts | Grant Notes | Lower Frequency | Upper Frequency | Power Output | Tolerance | Emission Designator | Microprocessor Number | |||||||||||||||||||||||||||||||||
3 | 1 | 15C | CC | 2402 | 2480 | 0.002 | |||||||||||||||||||||||||||||||||||
3 | 2 | 15C | CC | 2412 | 2462 | 0.1107 |
some individual PII (Personally Identifiable Information) available on the public forms may be redacted, original source may include additional details
This product uses the FCC Data API but is not endorsed or certified by the FCC