FCC ID: XMR2022SG865WWF Smart Module with WiFi and BT

SG865W Series Hardware Design Smart Module Series Version: 1.0 Date: 2022-05-20 Status: Released Smart Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters:

Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local offices. For more information, please visit:

http://www.quectel.com/support/sales.htm. For technical support, or to report documentation errors, please visit:

http://www.quectel.com/support/technical.htm. Or email us at: support@quectel.com. Legal Notices We offer information as a service to you. The provided information is based on your requirements and we make every effort to ensure its quality. You agree that you are responsible for using independent analysis and evaluation in designing intended products, and we provide reference designs for illustrative purposes only. Before using any hardware, software or service guided by this document, please read this notice carefully. Even though we employ commercially reasonable efforts to provide the best possible experience, you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as available basis. We may revise or restate this document from time to time at our sole discretion without any prior notice to you. Use and Disclosure Restrictions License Agreements Documents and information provided by us shall be kept confidential, unless specific permission is granted. They shall not be accessed or used for any purpose except as expressly provided herein. Copyright Our and third-party products hereunder may contain copyrighted material. Such copyrighted material shall not be copied, reproduced, distributed, merged, published, translated, or modified without prior written consent. We and the third party have exclusive rights over copyrighted material. No license shall be granted or conveyed under any patents, copyrights, trademarks, or service mark rights. To avoid ambiguities, purchasing in any form cannot be deemed as granting a license other than the normal non-exclusive, royalty-free license to use the material. We reserve the right to take legal action for noncompliance with abovementioned requirements, unauthorized use, or other illegal or malicious use of the material. SG865W_Series_Hardware_Design 1 / 123 Smart Module Series Trademarks Except as otherwise set forth herein, nothing in this document shall be construed as conferring any rights to use any trademark, trade name or name, abbreviation, or counterfeit product thereof owned by Quectel or any third party in advertising, publicity, or other aspects. Third-Party Rights This document may refer to hardware, software and/or documentation owned by one or more third parties

(third-party materials). Use of such third-party materials shall be governed by all restrictions and obligations applicable thereto. We make no warranty or representation, either express or implied, regarding the third-party materials, including but not limited to any implied or statutory, warranties of merchantability or fitness for a particular purpose, quiet enjoyment, system integration, information accuracy, and non-infringement of any third-party intellectual property rights with regard to the licensed technology or use thereof. Nothing herein constitutes a representation or warranty by us to either develop, enhance, modify, distribute, market, sell, offer for sale, or otherwise maintain production of any our products or any other hardware, software, device, tool, information, or product. We moreover disclaim any and all warranties arising from the course of dealing or usage of trade. Privacy Policy To implement module functionality, certain device data are uploaded to Quectels or third-partys servers, including carriers, chipset suppliers or customer-designated servers. Quectel, strictly abiding by the relevant laws and regulations, shall retain, use, disclose or otherwise process relevant data for the purpose of performing the service only or as permitted by applicable laws. Before data interaction with third parties, please be informed of their privacy and data security policy. Disclaimer a) We acknowledge no liability for any injury or damage arising from the reliance upon the information. b) We shall bear no liability resulting from any inaccuracies or omissions, or from the use of the information contained herein. c) While we have made every effort to ensure that the functions and features under development are free from errors, it is possible that they could contain errors, inaccuracies, and omissions. Unless otherwise provided by valid agreement, we make no warranties of any kind, either implied or express, and exclude all liability for any loss or damage suffered in connection with the use of features and functions under development, to the maximum extent permitted by law, regardless of whether such loss or damage may have been foreseeable. d) We are not responsible for the accessibility, safety, accuracy, availability, legality, or completeness of information, advertising, commercial offers, products, services, and materials on third-party websites and third-party resources. Copyright Quectel Wireless Solutions Co., Ltd. 2022. All rights reserved. SG865W_Series_Hardware_Design 2 / 123 Smart Module Series Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers failure to comply with these precautions. Full attention must be paid to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) causes distraction and can lead to an accident. Please comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. If there is an Airplane Mode, it should be enabled prior to boarding an aircraft. Please consult the airline staff for more restrictions on the use of wireless devices on an aircraft. Wireless devices may cause interference on sensitive medical equipment, so please be aware of the restrictions on the use of wireless devices when in hospitals, clinics or other healthcare facilities. Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions, such as when the mobile bill is unpaid or the (U)SIM card is invalid. When emergency help is needed in such conditions, use emergency call if the device supports it. In order to make or receive a call, the cellular terminal or mobile must be switched on in a service area with adequate cellular signal strength. In an emergency, the device with emergency call function cannot be used as the only contact method considering network connection cannot be guaranteed under all circumstances. The cellular terminal or mobile contains a transceiver. When it is ON, it receives and transmits radio frequency signals. RF interference can occur if it is used close to TV sets, radios, computers or other electric equipment. In locations with explosive or potentially explosive atmospheres, obey all posted signs and turn off wireless devices such as mobile phone or other cellular terminals. Areas with explosive or potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, and areas where the air contains chemicals or particles such as grain, dust or metal powders. SG865W_Series_Hardware_Design 3 / 123 Smart Module Series About the Document Revision History Version Date Author Description

2022-04-30 1.0 2022-05-20 Glenn GE/

Joshua PAN Glenn GE/

Joshua PAN Creation of the document First official release SG865W_Series_Hardware_Design 4 / 117 Smart Module Series Contents Safety Information ....................................................................................................................................... 3 About the Document ................................................................................................................................... 4 Contents ....................................................................................................................................................... 5 Table Index ................................................................................................................................................... 7 Figure Index ................................................................................................................................................. 9 1 Introduction ........................................................................................................................................ 11 Special Marks .......................................................................................................................... 15 1.1. 2 Product Overview .............................................................................................................................. 16 Frequency Bands and Functions ............................................................................................ 17 Key Features ........................................................................................................................... 17 Functional Diagram ................................................................................................................. 19 Pin Assignment ........................................................................................................................ 21 Pin Description ........................................................................................................................ 22 EVB Kit .................................................................................................................................... 42 2.1. 2.2. 2.3. 2.4. 2.5. 2.6. 3.1. 3 Operating Characteristics ................................................................................................................. 43 Power Supply .......................................................................................................................... 43 3.1.1. Power Supply Pins ......................................................................................................... 43 3.1.2. Battery Charge and Management .................................................................................. 43 3.1.3. Reference Design for Power Supply .............................................................................. 45 3.1.4. Voltage Stability Requirements ...................................................................................... 45 Turn On ................................................................................................................................... 47 3.2.1. Turn On with PWRKEY .................................................................................................. 47 3.2.2. Turn On Automatically with CBL_PWR_N ..................................................................... 48 Turn Off/Restart ....................................................................................................................... 49 VRTC Interface ........................................................................................................................ 50 Power Supply Output .............................................................................................................. 51 3.3. 3.4. 3.5. 3.2. 4.1. 4 Application Interfaces ....................................................................................................................... 53 USB Interfaces ........................................................................................................................ 53 4.1.1. USB0 Type-C ................................................................................................................. 55 4.1.2. DisplayPort ..................................................................................................................... 56 UART Interfaces ...................................................................................................................... 58 4.2. 4.3. SD Card Interface .................................................................................................................... 60 4.4. GPIOs ...................................................................................................................................... 62 I2C Interfaces .......................................................................................................................... 63 4.5. ADC Interfaces ........................................................................................................................ 64 4.6. PCIe Interfaces ........................................................................................................................ 65 4.7. 4.8. Vibrator Drive Interface ........................................................................................................... 68 4.9. Wireless Charging Interface .................................................................................................... 69 4.10. RGB Interfaces ........................................................................................................................ 70 4.11. Keypad Interfaces ................................................................................................................... 70 SG865W_Series_Hardware_Design 5 / 117 Smart Module Series 4.12. LCM Interfaces ........................................................................................................................ 71 4.13. Touch Panel Interfaces ............................................................................................................ 74 4.14. Camera Interfaces ................................................................................................................... 75 4.14.1. Design Considerations ................................................................................................... 81 4.14.2. Flashlight Interfaces ....................................................................................................... 86 4.15. Sensor Interfaces .................................................................................................................... 86 4.16. Audio Interfaces ...................................................................................................................... 87 4.17. I2S Interfaces .......................................................................................................................... 88 4.18. SPI Interfaces .......................................................................................................................... 89 4.19. USB_BOOT ............................................................................................................................. 90 5.2. 5.1. 5 RF Specifications ............................................................................................................................... 91 RF Antenna Interface .............................................................................................................. 91 5.1.1. Antenna Interface and Frequency Bands ...................................................................... 91 5.1.2. Reference Design .......................................................................................................... 91 RF Performance ...................................................................................................................... 92 5.2.1. Wi-Fi Overview ............................................................................................................... 93 5.2.2. Bluetooth Overview ........................................................................................................ 96 Reference Design of RF Routing ............................................................................................ 97 Antenna Design Requirements ............................................................................................... 98 RF Connector Recommendation ............................................................................................ 99 5.3. 5.4. 5.5. 6 Electrical Characteristics & Reliability .......................................................................................... 101 6.1. Absolute Maximum Ratings .................................................................................................. 101 6.2. Power Supply Ratings ........................................................................................................... 101 6.3. Power Consumption .............................................................................................................. 102 6.4. Digital I/O Characteristic ....................................................................................................... 102 ESD Protection ...................................................................................................................... 103 6.5. 6.6. Operating and Storage Temperatures ................................................................................... 103 7 Mechanical Information ................................................................................................................... 104 7.1. Mechanical Dimensions ........................................................................................................ 104 Recommended Footprint ....................................................................................................... 106 7.2. Top and Bottom Views........................................................................................................... 107 7.3. 8 Storage, Manufacturing & Packaging ............................................................................................ 108 8.1. Storage Conditions ................................................................................................................ 108 8.2. Manufacturing and Soldering ................................................................................................ 109 Packaging Specifications .......................................................................................................111 8.3. 8.3.1. Carrier Tape ...................................................................................................................111 8.3.2. Plastic Reel ...................................................................................................................111 8.3.3. Packaging Process ...................................................................................................... 112 9 Appendix References ...................................................................................................................... 113 SG865W_Series_Hardware_Design 6 / 117 Smart Module Series Table Index Table 1: Special Marks ............................................................................................................................... 15 Table 2: Brief Introduction of the Module ................................................................................................... 16 Table 3: Wireless Network Type of the Module .......................................................................................... 17 Table 4: Key Features ................................................................................................................................ 17 Table 5: I/O Parameters Definition ............................................................................................................. 22 Table 6: Pin Description ............................................................................................................................. 22 Table 7: Pin Definition of Charging Interface ............................................................................................. 43 Table 8: Pin Definition of PWRKEY ............................................................................................................ 47 Table 9: Pin Definition of CBL_PWR_N ..................................................................................................... 48 Table 10: Power Supply Description .......................................................................................................... 51 Table 11: Pin Definition of USB0 and USB1 Interfaces ............................................................................. 53 Table 12: USB Trace Length Inside the Module ........................................................................................ 55 Table 13: Pin Definition of USB Type-C/DisplayPort Mode ....................................................................... 56 Table 14: Pin Definition of UART Interfaces ............................................................................................... 58 Table 15: Pin Definition of SD Card Interface ............................................................................................ 60 Table 16: SD Card Signal Trace Length Inside the Module ....................................................................... 61 Table 17: Pin Definition of GPIO Interfaces ............................................................................................... 62 Table 18: Pin Definition of I2C Interfaces ................................................................................................... 63 Table 19: Pin Definition of ADC Interface ................................................................................................... 64 Table 20: Characteristics of ADC Interface ................................................................................................ 64 Table 21: Pin Definition of PCIe Interfaces ................................................................................................ 65 Table 22: PCIe Trace Length Inside the Module ........................................................................................ 67 Table 23: Pin Definition of Vibrator Drive Interface .................................................................................... 68 Table 24: Pin Definition of Wireless Charging Interface ............................................................................ 69 Table 25: Pin Definition of RGB Interfaces ................................................................................................ 70 Table 26: Pin Definition of Keypad Interfaces ............................................................................................ 70 Table 27: Pin Definition of LCM Interfaces ................................................................................................. 71 Table 28: Pin Definition of Touch Panel Interfaces .................................................................................... 74 Table 29: Pin Definition of Camera Interfaces ........................................................................................... 75 Table 30: MIPI Trace Length Inside the Module ........................................................................................ 82 Table 31: CSI and DSI Data Rate and Max. Trace Length (D-PHY) ..................................................... 85 Table 32: Pin Definition of Flashlight Interfaces ......................................................................................... 86 Table 33: Pin Definition of Sensor Interfaces ............................................................................................. 87 Table 34: Pin Definition of Audio Interfaces ............................................................................................... 87 Table 35: Pin Definition of I2S Interfaces ................................................................................................... 88 Table 36: Pin Definition of SPI Interfaces .................................................................................................. 89 Table 37: Pin Definition of Wi-Fi/Bluetooth Application Interfaces ............................................................. 91 Table 38: Pin Definition of Wi-Fi/Bluetooth Application Interfaces ............................................................. 92 Table 39: Wi-Fi/Bluetooth Frequency ......................................................................................................... 93 Table 40: Wi-Fi Transmitting Performance ................................................................................................. 93 Table 41: Wi-Fi Receiving Performance ..................................................................................................... 94 SG865W_Series_Hardware_Design 7 / 117 Smart Module Series Table 42: Bluetooth Transmitting and Receiving Performance .................................................................. 96 Table 43: Antenna Design Requirements .................................................................................................. 98 Table 44: Absolute Maximum Ratings ...................................................................................................... 101 Table 45: The Modules Power Supply Ratings ....................................................................................... 101 Table 46: SG865W-WF Power Consumption .......................................................................................... 102 Table 47: SG865W-AP Power Consumption ........................................................................................... 102 Table 48: 1.8 V I/O Requirements ............................................................................................................ 102 Table 49: Electrostatics Discharge Characteristics (25 C, 45 % Relative Humidity) ............................. 103 Table 50: Operating and Storage Temperatures ...................................................................................... 103 Table 51: Recommended Thermal Profile Parameters ............................................................................ 110 Table 52: Carrier Tape Dimension Table (Unit: mm) ................................................................................. 111 Table 53: Plastic Reel Dimension Table (Unit: mm) ................................................................................. 112 Table 54: Related Documents .................................................................................................................. 113 Table 55: Terms and Abbreviations .......................................................................................................... 113 SG865W_Series_Hardware_Design 8 / 117 Smart Module Series Figure Index Figure 1: Functional Diagram ..................................................................................................................... 20 Figure 2: Pin Assignment (Top View) ......................................................................................................... 21 Figure 3: Reference Design for Battery Charging Circuit .......................................................................... 44 Figure 4: Reference Circuit of Power Supply ............................................................................................. 45 Figure 5: Voltage Drop Sample .................................................................................................................. 46 Figure 6: Structure of Power Supply .......................................................................................................... 46 Figure 7: Turn On the Module Using Driving Circuit .................................................................................. 47 Figure 8: Turn On the Module Using a Button ........................................................................................... 48 Figure 9: Reference Circuit of Automatic Turn-on ...................................................................................... 48 Figure 10: Power-up Timing ....................................................................................................................... 49 Figure 11: Forced Power-down Timing ...................................................................................................... 50 Figure 12: RTC Powered by a Coin Cell .................................................................................................... 50 Figure 13: RTC Powered by Capacitor ...................................................................................................... 50 Figure 14: USB Type-C Interface Reference Design ................................................................................. 55 Figure 15: Reference Design for DisplayPort Mode .................................................................................. 57 Figure 16: Reference Circuit with Voltage-level Translator Chip (for UART 5).......................................... 59 Figure 17: RS-232 Level Matching Circuit (for UART 5) ............................................................................ 59 Figure 18: Reference Circuit for SD Card Interface ................................................................................... 61 Figure 19: Reference Design of PCIe1 Interfaces ..................................................................................... 66 Figure 20: Reference Design for Vibrator Connection ............................................................................... 69 Figure 21: Reference Design for RGB Interfaces ...................................................................................... 70 Figure 22: Reference Design for LCM0 Interface ...................................................................................... 73 Figure 23: Reference Design for TP0 Interface ......................................................................................... 75 Figure 24: Reference Design for Camera0 Application ............................................................................. 80 Figure 25: Reference Design of Camera Power Supply ............................................................................ 81 Figure 26: Reference Design for Flashlight Interfaces .............................................................................. 86 Figure 27: Reference Design for USB_BOOT ........................................................................................... 90 Figure 28: Reference Design for Wi-Fi/Bluetooth Antenna Interface ........................................................ 92 Figure 29: Microstrip Design on a 2-layer PCB ......................................................................................... 97 Figure 30: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 97 Figure 31: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 97 Figure 32: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 98 Figure 33: Dimensions of the Receptacle (Unit: mm) ................................................................................ 99 Figure 34: Specifications of Mated Plugs ................................................................................................ 100 Figure 35: Space Factor of Mated Connectors (Unit: mm) ...................................................................... 100 Figure 36: Module Top and Side Dimensions .......................................................................................... 104 Figure 37: Module Bottom Dimensions (Bottom View) ............................................................................ 105 Figure 38: Recommended Footprint (Top View) ...................................................................................... 106 Figure 39: Top and Bottom Views of the Module ..................................................................................... 107 Figure 40: Recommended Reflow Soldering Thermal Profile ................................................................. 109 Figure 41: Carrier Tape Dimension Drawing ........................................................................................ 111 SG865W_Series_Hardware_Design 9 / 117 Smart Module Series Figure 42: Plastic Reel Dimension Drawing ......................................................................................... 111 Figure 43: Packaging Process ................................................................................................................. 112 SG865W_Series_Hardware_Design 10 / 117 Smart Module Series 1 Introduction This document defines SG865W series module and describes its air interfaces and hardware interfaces which are connected with your applications. It can help you quickly understand interface specifications, electrical and mechanical details as well as other related information of the module. Associated with application notes and user guides, you can use this module to design and to set up mobile applications easily. changes or modifications not expressly approved by the party responsible for compliance could void the users authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

-- Reorient or relocate the receiving antenna.

-- Increase the separation between the equipment and receiver.

-- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

-- Consult the dealer or an experienced radio/TV technician for help. This device complies with FCC radiation exposure limits set forth for an uncontrolled environment. In order to avoid the possibility of exceeding the FCC radio frequency exposure limits, human proximity to the antenna shall not be less than 20cm (8 inches) during normal operation. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations SG865W_Series_Hardware_Design 11 / 117 Smart Module Series 4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module's intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed. Important Note notice that any deviation(s) from the defined parameters of the antenna trace, as described by the instructions, require that the host product manufacturer must notify to Quectel Wireless Solutions Co., Ltd that they wish to change the antenna trace design. In this case, a Class II permissive change application is required to be filed by the USI, or the host manufacturer can take responsibility through the change in FCC ID (new application) procedure followed by a Class II permissive change application. End Product Labeling When the module is installed in the host device, the FCC/IC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text: Contains FCC ID: XMR2022SG865WWF The FCC ID can be used only when all FCC compliance requirements are met. Antenna Installation

(1) The antenna must be installed such that 20 cm is maintained between the antenna and users,

(2) The transmitter module may not be co-located with any other transmitter or antenna.

(3) Only antennas of the same type and with equal or less gains as shown below may be used with this module. Other types of antennas and/or higher gain antennas may require additional authorization for operation.

(4) The max allowed antenna gain is 0dBi for external antenna. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This device complies with ISEDs licence-exempt RSSs. Operation is subject to the following two conditions:

(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. SG865W_Series_Hardware_Design 12 / 117 Smart Module Series Le prsent appareil est conforme aux CNR d ISED applicables aux appareils radio exempts de licence. Lexploitation est autorise aux deux conditions suivantes : (1) le dispositif ne doit pas produire de brouillage prjudiciable, et (2) ce dispositif doit accepter tout brouillage reu, y compris un brouillage susceptible de provoquer un fonctionnement indsirable. Radiation Exposure Statement:

This equipment complies with ISED radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator & your body. Dclaration d'exposition aux radiations:

Cet quipement est conforme aux limites d'exposition aux rayonnements ISED tablies pour un environnement non contrl. Cet quipement doit tre install et utilis avec un minimum de 20 cm de distance entre la source de rayonnement et votre corps. This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Cet appareil est conu uniquement pour les intgrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) 1) L'antenne doit tre installe de telle sorte qu'une distance de 20 cm est respecte entre l'antenne et les utilisateurs, et 2) Le module metteur peut ne pas tre complant avec un autre metteur ou antenne. Tant que les 2 conditions ci-dessus sont remplies, des essais supplmentaires sur l'metteur ne seront pas ncessaires. Toutefois, l'intgrateur OEM est toujours responsable des essais sur son produit final pour toutes exigences de conformit supplmentaires requis pour ce module install. IMPORTANT NOTE:

In the event that these conditions can not be met (for example certain laptop configurations or co- location with another transmitter), then the Canada authorization is no longer considered valid and the IC ID can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate Canada authorization. NOTE IMPORTANTE:

Dans le cas o ces conditions ne peuvent tre satisfaites (par exemple pour certaines configurations d'ordinateur portable ou de certaines co-localisation avec un autre metteur), l'autorisation du Canada n'est plus considr comme valide et l'ID IC ne peut pas tre utilis sur le produit final. Dans ces circonstances, SG865W_Series_Hardware_Design 13 / 117 Smart Module Series l'intgrateur OEM sera charg de rvaluer le produit final (y compris l'metteur) et l'obtention d'une autorisation distincte au Canada. End Product Labeling This transmitter module is authorized only for use in device where the antenna may be installed such that 20 cm may be maintained between the antenna and users. The final end product must be labeled in a visible area with the following:

Contains IC: 10224A-2022SG865W. Plaque signaltique du produit final Ce module metteur est autoris uniquement pour une utilisation dans un dispositif o l'antenne peut tre installe de telle sorte qu'une distance de 20cm peut tre maintenue entre l'antenne et les utilisateurs. Le produit final doit tre tiquet dans un endroit visible avec l'inscription suivante: "Contient des IC: 10224A-2022SG865W ". Manual Information To the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the users manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. Manuel d'information l'utilisateur final L'intgrateur OEM doit tre conscient de ne pas fournir des informations l'utilisateur final quant la faon d'installer ou de supprimer ce module RF dans le manuel de l'utilisateur du produit final qui intgre ce module. Le manuel de l'utilisateur final doit inclure toutes les informations rglementaires requises et avertissements comme indiqu dans ce manuel. RSS-247 Section 6.4 (5) (6) (for local area network devices, 5GHz) The device could automatically discontinue transmission in case of absence of information to transmit, or operational failure. Note that this is not intended to prohibit transmission of control or signaling information or the use of repetitive codes where required by the technology. Caution:

i) The device for operation in the band 51505250 MHz is only for indoor use to reduce the potential for harmful interference to co-channel mobile satellite systems;

ii) where applicable, antenna type(s), antenna models(s), and worst-case tilt angle(s) necessary to remain compliant with the e.i.r.p. elevation mask requirement set forth in section 6.2.2.3 shall be clearly indicated. L'appareil peut interrompre automatiquement la transmission en cas d'absence d'informations transmettre ou de panne oprationnelle. Notez que ceci n'est pas destin interdire la transmission d'informations de contrle ou de signalisation ou l'utilisation de codes rptitifs lorsque cela est requis par la technologie. Avertissement:

i) Le dispositif utilis dans la bande 5150-5250 MHz est rserv une utilisation en intrieur afin de rduire le risque de brouillage prjudiciable aux systmes mobiles par satellite dans le mme canal;

ii) lorsquil y a lieu, les types dantennes (sil y en a plusieurs), les numros de modle de lantenne et les pires angles SG865W_Series_Hardware_Design 14 / 117 Smart Module Series dinclinaison ncessaires pour rester conforme lexigence de la p.i.r.e. applicable au masque dlvation, nonce la section 6.2.2.3, doivent tre clairement indiqus. 1.1. Special Marks Table 1: Special Marks Mark Definition

Unless otherwise specified, when an asterisk (*) is used after a function, feature, interface, pin name, AT command, or argument, it indicates that the function, feature, interface, pin, AT command, or argument is under development and currently not supported; and the asterisk (*) after a model indicates that the sample of the model is currently unavailable. Brackets ([]) used after a pin enclosing a range of numbers indicate all pins of the same type. For example, SD_DATA[0:3] refers to all four SDIO pins: SD_DATA0, SD_DATA1, SD_DATA2, and SD_DATA3. SG865W_Series_Hardware_Design 15 / 117 Smart Module Series 2 Product Overview SG865W series is a series of smart modules based on Android operating system, and provides industrial grade performance. Its general features are listed below:

Supports built-in high performance KryoTM 585 CPU, AdrenoTM 650 GPU, Adreno 995 DPU, Adreno 665 VPU, HexagonTM DSP, and SpectraTM 480 ISP Provides multiple audio and video input/output interfaces as well as abundant GPIO interfaces. Supports multiple video codecs The module is engineered to meet the demanding requirements in high computing power, AI and multimedia functions. Its general features are listed below:

Table 2: Brief Introduction of the Module Categories Packaging and pins number LGA; 571 Dimensions Weight Wi-Fi & Bluetooth functions Variants 46.0 42.0 2.95 mm 14 g 2.4 GHz, 5 GHz BLE 5.1 (BR/EDR + BLE) SG865W-WF, SG865W-AP 1 1 Compared to SG865W-WF, SG865W-AP does not support Wi-Fi and Bluetooth function. SG865W_Series_Hardware_Design 16 / 117 Smart Module Series 2.1. Frequency Bands and Functions Table 3: Wireless Network Type of the Module Mode Wi-Fi 802.11a/b/g/n/ac/ax BLE 5.1 (BR/EDR + BLE) Frequency Bands 24022482 MHz 51705835 MHz 24022480 MHz 2.2. Key Features Table 4: Key Features Features Details 64-bit applications processor (Kryo 585) with 4 MB L3 cache 1 Kryo 585 Gold prime core with a 512 KB L2 cache, Fmax at 2.842 GHz Application Processors 3 Kryo 585 Gold cores with 256 KB L2 cache per core, Fmax at 2.419 GHz 4 low-power Kryo 585 Silver cores with 128 KB L2 cache per core, Fmax at 1.805 GHz Hexagon DSP with 4 Hexagon Vector eXtensions (HVX) processor AdrenoTM 650 64 GB UFS + 8 GB LPDDR5 (default) 256 GB UFS + 12GB LPDDR5 (optional) DSP GPU Memory Operating System Android 10 Power Supply Supply voltage: 3.554.4 V Typical supply voltage: 3.8 V LCM Interfaces Supports 2 groups of 4-lane MIPI DSI, up to 2.5 Gbps/lane Camera Interfaces Video Codec Support 6 groups of 4-lane MIPI CSI, up to 2.5 Gbps/lane Support 7 concurrent camera usages Max. 64 MP @ 30 fps ZSL @ 2 ISP Adreno 665 VPU Video decode up to 4K @ 240 fps; 8K @ 60 fps Video encode up to 4K @ 120 fps; 8K @ 30 fps SG865W_Series_Hardware_Design 17 / 117 Smart Module Series Audio Interfaces SPI Interfaces I2C Interfaces Digital MIC SWR MI2S TDM/PCM 5 SPI interfaces, only supports master mode 1.8 V operating voltage with clock rates up to 50 MHz Supports up to 9 I2C interfaces 4 I2C interfaces dedicated for the camera control interface 1 I2C interface dedicated for communication with the sensors 2 I2C interfaces for TP interface 1 I2C interface for NFC interface 1 I2C interface for general purpose interface Multi-master mode is not supported ADC Interfaces 4 General purpose ADC interfaces Vibrator Drive Interface 1 Drive ERM/LRA vibrator I2S Interfaces 3 I2S interfaces Flashlight Interfaces Wireless Charging Interface 3 High-current Flash LED drivers, which support both flash and torch modes Up to 1.5 A for LED1 and LED2 in flash mode Up to 0.75 A for LED3 in flash mode Used for battery voltage detection, fuel gauge, battery temperature detection Real Time Clock Supported 2 USB interfaces Compliant with USB 2.0 and 3.1 Gen 2 specifications, with transmission rates up to 480 Mbps on USB 2.0 and 10 Gbps on USB 3.1 Gen 2 USB0 is used for data transmission, software debugging, firmware USB Interfaces upgrade USB0 supports DisplayPort V1.4 over Type-C USB0 supports USB OTG function USB1 supports host mode only USB1 supports USB hub expansion PCIe Interfaces 2 2-lane PCIe Gen 3 SDIO Interface Supports SD 3.0 protocol Supports SD card hot-plug Supports 1.8 V or 2.95 V SD card 4 UART interfaces: UART5, UART16, UART17 and debug UART UART5/UART16/UART17:

UART Interfaces Four-wire UART interface Supports RTS and CTS hardware flow control Debug UART:

SG865W_Series_Hardware_Design 18 / 117 Smart Module Series Bluetooth Features

(SG865W-WF only) Antenna Interfaces Wi-Fi Features

(SG865W-WF only) Temperature Range

- Two-wire UART interface

- Used for debugging by default

- Baud rate: 115200 bps by default BLE 5.1 ANT1 ANT2 ANT_BT*

50 impedance 2.4 GHz and 5 GHz Supports 802.11a/b/g/n/ac/ax (20/40/80 MHz), up to 1774.5 Mbps

(2 2 + 2 2 11ax DBS) Supports MIMO and DBS Supports AP and STA modes Operating temperature range 2: -35 to +75 C Storage temperature range: -40 to +90 C Firmware Upgrade Use USB interface or OTA to upgrade RoHS All hardware components are fully compliant with EU RoHS directive 2.3. Functional Diagram The following figure shows a block diagram of the module and illustrates the major functional parts. Power management Baseband LPDDR5 + UFS flash Radio frequency Peripheral interfaces

-- USB interfaces

-- UART interfaces

-- SD card interface

-- GPIOs

-- I2C interfaces

-- ADC interfaces

-- PCIe interfaces

-- Vibrator Drive interface

-- Wireless Charging interface

-- RGB interfaces

-- Keypad interfaces 2 Within operating temperature range, the module is IEEE compliant. SG865W_Series_Hardware_Design 19 / 117 Smart Module Series

-- LCM interfaces

-- Touch panel interfaces

-- Camera interfaces

-- Sensor interfaces

-- Audio interfaces

-- I2S interfaces

-- SPI interfaces

-- Emergency Download interface Figure 1: Functional Diagram SG865W_Series_Hardware_Design 20 / 117 Smart Module Series 2.4. Pin Assignment The following figure illustrates the pin assignment of the module. Figure 2: Pin Assignment (Top View) NOTE Keep all RESERVED pins unconnected. SG865W_Series_Hardware_Design 21 / 117 1WIRELESS_DC_IN_PSNS4BAT_P8GND13GND19VBAT25VBAT31VBAT43WSA_SWR_CLK37GND49WSA_SWR_DATA55GND61LPI_MI2S1_DATA167LPI_MI2S1_DATA073MI2S2_SCLK79GND85WCD_SWR_RX_DATA097SENSOR_I2C_SDA91WCD_SWR_TX_DATA0103CAM3_RST109CAM2_RST114CAM1_RST119CAM0_RST123GPIO63127GND130GND135GND133ANT_BT2WIRELESS_DC_IN_EN5BAT_M9VBAT_SNS_M14GND20VBAT26VBAT32GND44HAP_M38HAP_P50HAP_PWM_IN56GND62LPI_MI2S1_SCLK68MI2S2_WS74MI2S2_DATA180MI2S0_WS86GND98SENSOR_I2C_SCL92WCD_SWR_TX_CLK104CAM6_RST110CAM5_RST115CAM4_RST120GPIO61124GPIO60128GND131GND134GND3WIRELESS_DC_IN_PON6WIRELESS_RST10GND15BAT_ID21GND27VDD_HAP33HAP_BOOST_EN45WSA1_EN39GND51WSA2_EN57GND63MI2S0_MCLK69MI2S2_DATA075MI2S0_DATA181WCD_SWR_RX_DATA187WCD_SWR_TX_DATA199CAM3_MCLK93GND105GND111GND116GPIO62121COEX_RXD125COEX_TXD129LAA_AS_EN132RESERVED7GND11BAT_THERM16RESERVED22GND28SMB_THERM34WIRELESS_THERM40GND52LPI_DMIC3_DATA46LPI_DMIC3_CLK58LPI_MI2S1_WS64MI2S0_SCLK70MI2S0_DATA076GND82WCD_SWR_RX_CLK88WCD_RST94GND106GND100CAM6_MCLK112CAM1_MCLK117GND122RESERVED126RESERVED12RESERVED17SMB_STATUS23SMB_EN_CHG29GND35LDO3F_1V0541GND47LDO4F_1V259LDO6F_2V853GND65GND71LDO7F_1V877GND83SENSOR_I3C_SCL89SENSOR_SPI_CLK95SENSOR_SPI_CS101GND113GND107CAM2_MCLK118CAM0_MCLK18GND24LDO12A_1V830GND36LDO1F_1V142GND48LDO2F_1V254GND66GND60LDO5F_2V8572SENSOR_I3C_SDA78SENSOR_SPI_MOSI84SENSOR_SPI_MISO90GND96CAM4_MCLK102GND108CAM5_MCLK136GND139GND143ANT_WIFI0148GND154GND160GND166GND172ANT_WIFI1178GND184GND190PA_MUTE196LAA_RX202GND208SD_DATA3214SD_DATA2220SD_DATA1226SD_DATA0231GND236GND240LCD_BL_K1244LCD_BL_K2247LCD_BL_K3250LCD_BL_K4252LCD_BL_A137GND140GND144GND149GND155GND161GND167GND173GND179WLAN_TXEN185LAA_TXEN191GND197SD_LDO9C203SD_DET209SD_CLK215SD_CMD221GND227VREG_BOB232VREG_BOB237FLASH_STROBE241CABC2245CABC1248PM_PWM2251PM_PWM1138GND141IMU_INT1145IMU_INT2150CCI1_I2C_SDA156CCI1_I2C_SCL162CCI2_I2C_SDA168CCI2_I2C_SCL174CCI3_I2C_SDA180CCI3_I2C_SCL186SPI4_MOSI192SPI4_MISO198SPI2_CS204SPI2_CLK210GND216LDO8C_1V8222LDO10C_3V3228SD_LDO6C233LDO11C_3V1238GND242FLASH_LDE2246GND249FLASH_LED1142GPIO120146GPIO88151CCI0_I2C_SDA157CCI0_I2C_SCL163MAG_INT169HALL_INT175ALPS_INT181SPI4_CS187SPI4_CLK193GND199SPI2_MOSI205SPI2_MISO211LDO7C_2V85217LDO1C_1V8223GND229PM_ADC2234PM_ADC4239GND243FASH_LED3147GPIO119152GPIO68158UART5_RXD164UART5_TXD170GND176NFC_SE_SPI0_MOSI182NFC_SE_SPI0_MISO188NFC_DWL_REQ194NFC_EN200NFC_I2C1_SCL206NFC_I2C1_SDA212GND218PM_ADC1224GND230PM_ADC3235GND153GND159UART5_RTS165UART5_CTS171GND177NFC_SE_SPI0_CS183NFC_SE_SPI0_CLK189NFC_CLK_REQ195NFC_INT_REQ201GND207B_LED213G_LED219R_LED225GND325CSI4_LN1_N331CSI4_LN0_N337GND343CSI3_LN0_P349CSI3_LN1_P355CSI3_LN2_P361CSI3_LN3_P371GND366CSI3_CLK_P375DSI0_CLK_N379DSI0_LN3_N382DSI0_LN2_N385DSI0_LN1_N387DSI0_LN0_N313CSI4_LN3_N307CSI4_CLK_N295CSI2_LN0_N301GND289CSI2_LN1_N283CSI2_LN2_N277CSI2_LN3_N271GND265CSI0_LN0_N260CSI0_LN1_N256CSI0_LN2_N253CSI0_LN3_N319CSI4_LN2_N386DSI0_LN0_P383DSI0_LN1_P380DSI0_LN2_P376DSI0_LN3_P372DSI0_CLK_P367GND356CSI3_LN3_N362CSI3_CLK_N350CSI3_LN2_N344CSI3_LN1_N338CSI3_LN0_P332GND326CSI4_LN0_P320CSI4_LN1_P314CSI4_LN2_P302CSI4_CLK_P308CSI4_LN3_P296GND290CSI2_LN0_P284CSI2_LN1_P278CSI2_LN2_P272CSI2_LN3_P266CSI0_LN0_P261CSI0_LN1_P257CSI0_LN2_P384DSI1_LN0_N381DSI1_LN1_N377DSI1_LN2_N373DSI1_LN3_N368DSI1_CLK_N363DSI1_CLK_P357GND345CSI5_LN1_N351CSI5_LN0_N339CSI5_LN2_N333CSI5_LN3_N327GND321CSI1_LN0_N315CSI1_LN1_N309CSI1_LN2_N303CSI1_LN3_N291CSI2_CLK_N297GND285CSI2_CLK_P279GND273PCIE1_REFCLK_M267PCIE1_REFCLK_P262GND258CSI0_CLK_N255CSI0_CLK_P378DSI1_LN0_P374DSI1_LN1_P369DSI1_LN2_P364DSI1_LN3_P358GND352CSI5_LN0_P346CSI5_LN1_P334CSI5_LN3_P340CSI5_LN2_P328GND322CSI1_LN0_P316CSI1_LN1_P310CSI1_LN2_P304CSI1_LN3_P298CSI1_CLK_P292CSI1_CLK_N280PCIE1_TX0_M286GND274PCIE1_RX0_M268PCIE1_TX1_M263PCIE1_RX1_M259GND370PCIE2_WAKE_N365GPIO59359GPIO58353FP_SPI14_CS347FP_SPI14_MISO341GND335CSI5_CLK_P323GND329CSI5_CLK_N317GPIO70311RESERVED305RESERVED299PCIE1_CLKREQ_N293PCIE1_RST_N287PCIE1_WAKE_N281PCIE1_TX0_P269PCIE1_TX1_P275PCIE1_RX0_P264PCIE1_RX1_P360GPIO57354GPIO56348FP_SPI14_MOSI342FP_SPI14_CLK336GND330LCD0_RST324LCD0_TE312RESERVED318RESERVED306RESERVED300RESERVED294RESERVED288RESERVED282RESERVED276RESERVED2705G_PON_RST254CSI0_LN3_P504USB_VBUS502USB_VBUS499USB_VBUS496GND492GND488VRTC483GND478USB_BOOT472DBG_TXD466DBG_RXD460TP0_I2C_SDA454TP0_I2C_SCL448GND442USB0_DP436USB0_DM430GND424USB0_SS1_RX_P418USB0_SS1_TX_P412USB0_SS0_RX_P406USB0_SS0_TX_P400GND395PCIE2_REFCLK_P391PCIE2_RX0_P388PCIE2_TX0_P503USB_VBUS500USB_VBUS497GND493USB_IN_MID489USB_IN_MID484GND479VOL_DOWN473VOL_UP467CBL_PWR_N461PWRKEY455TP0_RST449TP0_INT443GND437DP_AUX_M431DP_AUX_P425USB0_SS1_RX_M419USB0_SS1_TX_M413USB0_SS0_RX_M407USB0_SS0_TX_M401GND396PCIE2_REFCLK_M392PCIE2_RX0_M389PCIE2_TX0_M501GND498USB_IN_MID494USB_IN_MID490USB_IN_MID485GND480GND474UART16_CTS468UART16_RTS462CCI_I3C_SDA456CCI_I3C_SCL450GND444UART17_CTS438UART17_RTS432GND426RESERVED420USB_SBU1414USB_SBU2408USB_CC1402USB_CC2397GND393PCIE2_RX1_P390PCIE2_TX1_P495GND491GND486VREG_S4A_1V8481VREG_S4A_1V8475UART16_TXD469UART16_RXD463I2C15_SDA457I2C15_SCL451GND445UART17_RXD439UART17_TXD433GND427TP1_INT421TP1_RST415TP1_I2C_SDA409TP1_I2C_SCL403GND398PCIE2_RX1_M394PCIE2_TX1_M487GND482VPH_PWR476VPH_PWR470CPIO126464GPIO89458GPIO64452GND446LDO13A_3V0440LDO14A_1V8434GND428USB1_SS_TX_P422USB1_SS_TX_M416USB1_DP410GND404PCIE2_RST_N399PCIE2_CLKREQ_N405USB1_SS_RX_P477VPH_PWR471VPH_PWR465GND459LDO2A_3V1453GND447LDO10A_2V9441GND435LCD1_RST429LCD1_TE423GND417USB1_DM411USB1_SS_RX_M569GND570GND571GND568GND505GND506GND507GND508GND509GND510GND511GND512GND513GND514GND515GND516GND517GND518GND519GND520GND521GND522GND523GND524GND525GND526GND527GND528GND529GND530GND531GND532GND533GND534GND535GND536GND537GND538GND539GND540GND541GND542GND543GND544GND545GND546GND547GND548GND549GND550GND551GND552GND553GND554GND555GND556GND557GND558GND559GND560GND561GND562GND563GND564GND565GND566GND567GNDGNDCameraLCMTPUSBPowerPCIeRESERVEDChargeSPIUARTNFCSensorRF ControlGPIOSDADCHAPAudioOthers Smart Module Series 2.5. Pin Description The following table shows the DC characteristics and pin descriptions. Table 5: I/O Parameters Definition Type AI AO AIO DI DO DIO OD PI PO PIO Description Analog Input Analog Output Analog Input/Output Digital Input Digital Output Digital Input/Output Open Drain Power Input Power Output Power Input/Output Table 6: Pin Description Power Supply Pin Name Pin No. I/O Description DC Characteristics Comment VBAT 19, 20, 25, 26, 31 PIO Power supply for the module LDO2A_3V1 459 PO 3.1 V output LDO10A_2V9 447 PO 2.9 V output It must be provided with Vmax = 4.4 V sufficient current up to 5.0 A. Vmin = 3.55 V It is recommended to use a TVS Vnom = 3.8 V to increase voltage surge withstand capability. Power supply for DPs pull-up Vnom = 3.1 V circuits. Reserve a 1.0 F IOmax = 150 mA bypass capacitor if used. If unused, keep this pin open. Vnom = 2.9 V Power supply for digital MIC IOmax = 600 mA circuits. SG865W_Series_Hardware_Design 22 / 117 Smart Module Series Add a 4.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for the pull-up of the forced shutdown pin of LDO12A_1V8 24 PO 1.8 V output Vnom = 1.8 V SMB1390 battery charger. IOmax = 300 mA Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for VDD of TPs. LDO13A_3V0 446 PO 3.0 V output Vnom = 3.0 V Add a 2.2 F bypass capacitor if IOmax = 150 mA used. LDO14A_1V8 440 PO 1.8 V output Vnom = 1.8 V IOmax = 300 mA If unused, keep this pin open. Power supply for IOVDD of LCDs. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for IOVDD of TPs. LDO1C_1V8 217 PO 1.8 V output Vnom = 1.8 V Add a 1.04.7 F bypass IOmax = 150 mA capacitor if used. LDO7C_2V85 211 PO 2.85 V output LDO8C_1V8 216 PO 1.8 V output LDO10C_3V3 222 PO 3.3 V output Vnom = 2.85 V IOmax = 600 mA Vnom = 1.8 V IOmax = 150 mA Vnom = 3.3 V IOmax = 600 mA If unused, keep this pin open. Power supply for motor of cameras. Add a 4.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for IOVDD or VDD of sensors. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open Power supply for LED of ALPS sensors. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open Power supply for VDD of LCDs. LDO11C_3V1 233 PO 3.1 V output VREG_BOB 227, 232 PO BOB output Vnom = 3.1 V Add a 1.04.7 F bypass IOmax = 600 mA capacitor if used. Vnom = 3.3 V IOmax = 2000 mA If unused, keep this pin open Power supply for external LDOs SG865W_Series_Hardware_Design 23 / 117 Smart Module Series VREG_S4A_1V8 481, 486 PO 1.8 V output of buck Vnom = 1.8 V 4 IOmax = 500 mA VPH_PWR 471, 476, 477, 482 PO Power supply for Vnom = VBAT peripherals IOmax = 2000 mA VRTC 488 PIO GPIO Interfaces Power supply for RTC Vmin = 2.5 V Vnom = 3.0 V Vmax = 3.25 V Power supply for external GPIOs pull up circuits and level shifting circuit. Pin Name Pin No. I/O Description DC Characteristics Comment GPIO56 354 DIO GPIO57 360 DIO GPIO58 359 DIO GPIO59 365 DIO GPIO60 124 DIO GPIO61 120 DIO GPIO62 116 DIO GPIO63 123 DIO GPIO64 458 DIO GPIO68 152 DIO GPIO70 317 DIO GPIO88 146 DIO GPIO89 464 DIO GPIO119 147 DIO GPIO120 142 DIO GPIO126 470 DIO General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose VOLmax = 0.45 V input/output VOHmin = 1.35 V General-purpose VILmax = 0.63 V input/output VIHmin = 1.17 V 1.8 V power domain. General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output SG865W_Series_Hardware_Design 24 / 117 Smart Module Series RGB Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment R_LED 219 AO G_LED 213 AO B_LED 207 AO Current source for red LED Current source for green LED Current source for blue LED USB Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS 502, 503, PIO 499, 500, 504 USB0_DP 442 AIO USB0_DM 436 AIO Vmax = 12.6 V Vmin = 4.0 V Vnom = 5.0 V Charging power input;

Power supply for OTG device;

USB/adaptor insertion detection USB0 2.0 differential data (+) USB0 2.0 differential data (-) USB0 3.1 channel 0 USB0_SS0_RX_P 412 AI SuperSpeed receive

(+) USB0 3.1 channel 0 USB0_SS0_RX_M 413 AI SuperSpeed receive

(-) USB0 3.1 channel 0 USB0_SS0_TX_P 406 AO SuperSpeed transmit

(+) USB0 3.1 channel 0 USB0_SS0_TX_M 407 AO SuperSpeed transmit USB0_SS1_RX_P 424 AI SuperSpeed receive

(-) USB0 3.1 channel 1

(+) USB0 3.1 channel 1 USB0_SS1_RX_M 425 AI SuperSpeed receive

(-) USB0 3.1 channel 1 USB0_SS1_TX_P 418 AO SuperSpeed transmit

(+) 90 differential impedance. USB 2.0 standard compliant. 90 differential impedance. USB 3.1 standard compliant. SG865W_Series_Hardware_Design 25 / 117 Smart Module Series USB0_SS1_TX_M 419 AO SuperSpeed transmit USB0 3.1 channel 1

(-) USB_CC1 408 AI USB Type-C detect 1 USB_CC2 402 AI USB Type-C detect 2 USB1_DP 416 AIO USB1_DM 417 AIO USB1 2.0 differential data (+) USB1 2.0 differential data (-) USB1 3.1 USB1_SS_TX_P 428 AO SuperSpeed transmit

(+) USB1 3.1 USB1_SS_TX_M 422 AO SuperSpeed transmit 90 differential impedance. USB 2.0 standard compliant.

(-) USB1 3.1 90 differential impedance. USB 3.1 standard compliant. USB1_SS_RX_P 405 AI SuperSpeed receive

(+) USB1 3.1 USB1_SS_RX_M 411 AI SuperSpeed receive DP_AUX_P 431 AIO DP_AUX_M 437 AIO USB_SBU1 USB_SBU2 420 414 DI DI Audio Interface

(-) DisplayPort auxiliary channel (+) DisplayPort auxiliary channel (-) USB Type-C side band use 1 USB Type-C side band use 2 Pin Name Pin No. I/O Description DC Characteristics Comment WSA1_EN WSA2_EN 45 51 DO WSA enable 1 DO WSA enable 2 WSA_SWR_CLK 43 DO WSA_SWR_DATA 49 DIO WSA SoundWire clock WSA SoundWire data WCD_RST 88 DO WCD reset SG865W_Series_Hardware_Design 26 / 117 Smart Module Series WCD_SWR_TX_CLK 92 DO WCD_SWR_TX_DAT A0 WCD_SWR_TX_DAT A1 91 87 DIO DIO WCD_SWR_RX_CLK 82 DO WCD_SWR_RX_DAT A0 WCD_SWR_RX_DAT A1 85 81 DIO DIO LPI_DMIC3_CLK 46 DO WCD SoundWire transmit clock WCD SoundWire transmit data 0 WCD SoundWire transmit data 1 WCD SoundWire receive clock WCD SoundWire receive data 0 WCD SoundWire receive data 1 LPI digital MIC3 clock LPI_DMIC3_DATA 52 DI LPI digital MIC3 data I2S Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment LPI_MI2S1_SCLK 62 DO LPI MI2S1 bit clock LPI_MI2S1_WS 58 DO LPI_MI2S1_DATA0 67 DIO LPI_MI2S1_DATA1 61 DIO LPI MI2S1 word select LPI MI2S1 data channel 0 LPI MI2S1 data channel 1 MI2S0_MCLK MI2S0_SCLK MI2S0_WS MI2S0_DATA0 MI2S0_DATA1 MI2S2_SCLK MI2S2_WS MI2S2_DATA0 MI2S2_DATA1 63 64 80 70 75 73 68 69 74 DO MI2S0 master clock DO MI2S0 bit clock DO MI2S0 word select DIO DIO MI2S0 data channel 0 MI2S0 data channel 1 DO MI2S2 bit clock DO MI2S2 word select DIO DIO MI2S2 data channel 0 MI2S2 data channel 1 SG865W_Series_Hardware_Design 27 / 117 Smart Module Series SD Card Interface Pin Name Pin No. I/O Description DC Characteristics Comment SD_CLK 209 DO SD card clock SD_CMD 215 DIO SD card command 1.8 V SD card:

VILmax = 0.58 V SD_DATA0 226 DIO SDIO data bit 0 VIHmin = 1.27 V SD_DATA1 220 DIO SDIO data bit 1 SD_DATA2 214 DIO SDIO data bit 2 SD_DATA3 208 DIO SDIO data bit 3 VOLmax = 0.45 V VOHmin = 1.4 V 2.95 V SD card:

VILmax = 0.73 V VIHmin = 1.85 V VOLmax = 0.36 V VOHmin = 2.22 V SD_DET 203 DI SD card hot-plug VILmax = 0.63 V detect VIHmin = 1.17 V SD_LDO9C 197 PO SD card power supply 1.8/2.95 V output Add a 1.02.2 F bypass Iomax = 600 mA capacitor if used. If unused, keep this pin open Add a 1.04.7 F bypass SD_LDO6C 228 PO power for SD card Iomax = 150 mA capacitor if used. pull-up circuits If unused, keep this pin open PCIe Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment PCIE1_REFCLK_P 267 DO PCIE1_REFCLK_M 273 DO PCIe1 reference clock (+) PCIe1 reference clock (-) PCIE1_TX0_P 281 DO PCIe1 transmit 0 (+) PCIE1_TX0_M 280 DO PCIe1 transmit 0 (-) PCIE1_RX0_P 275 DI PCIe1 receive 0 (+) 85 differential impedance. PCIE1_RX0_M 274 DI PCIe1 receive 0 (-) PCIE1_TX1_P 269 DO PCIe1 transmit 1 (+) PCIE1_TX1_M 268 DO PCIe1 transmit 1 (-) PCIE1_RX1_P 264 DI PCIe1 receive 1 (+) SG865W_Series_Hardware_Design 28 / 117 Smart Module Series PCIE1_RX1_M 263 DI PCIe1 receive 1 (-) PCIE1_WAKE_N 287 DI PCIe1 wake up host PCIE1_RST_N 293 DO PCIe1 reset PCIE1_CLKREQ_N 299 DI PCIe1 clock request PCIE2_REFCLK_P 395 DO PCIE2_REFCLK_M 396 DO PCIe2 reference clock (+) PCIe2 reference clock (-) PCIE2_TX0_P 388 DO PCIe2 transmit 0 (+) PCIE2_TX0_M 389 DO PCIe2 transmit 0 (-) PCIE2_RX0_P 391 DI PCIe2 receive 0 (+) PCIE2_RX0_M 392 DI PCIe2 receive 0 (-) PCIE2_TX1_P 390 DO PCIe2 transmit 1 (+) PCIE2_TX1_M 394 DO PCIe2 transmit 1 (-) PCIE2_RX1_P 393 DI PCIe2 receive 1 (+) PCIE2_RX1_M 398 DI PCIe2 receive 1 (-) PCIE2_WAKE_N 370 DI PCIe2 wake up host PCIE2_RST_N 404 DO PCIe2 reset PCIE2_CLKREQ_N 399 DI PCIe2 clock request Touch Panel Interfaces 85 differential impedance. Pin Name Pin No. I/O Description DC Characteristics Comment TP0_RST 455 DO TP0 reset TP0_INT 449 DI TP0 interrupt TP0_I2C_SCL 454 OD TP0 I2C clock TP0_I2C_SDA 460 OD TP0 I2C data 1.8 V power domain. TP1_RST 421 DO TP1 reset TP1_INT 427 DI TP1 interrupt TP1_I2C_SCL 409 OD TP1 I2C clock SG865W_Series_Hardware_Design 29 / 117 Smart Module Series TP1_I2C_SDA 415 OD TP1 I2C data LCM Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment LCD_BL_A 252 PO LCD_BL_K1 240 LCD_BL_K2 244 LCD_BL_K3 247 LCD_BL_K4 250 CABC1 CABC2 245 241 AI AI AI AI DI DI Current output for LCD backlight Current sink for LCD backlight Current sink for LCD backlight Current sink for LCD backlight Current sink for LCD backlight Content adaptive brightness control 1 Content adaptive brightness control 2 LCD0_RST 330 DO LCD0 reset LCD0_TE 324 DI LCD0 tearing effect LCD1_RST 435 DO LCD1 reset LCD1_TE 429 DI LCD1 tearing effect DSI0_CLK_P 372 AO LCD0 MIPI clock (+) DSI0_CLK_N 375 AO LCD0 MIPI clock (-) DSI0_LN0_P 386 AO DSI0_LN0_N 387 AO DSI0_LN1_P 383 AO DSI0_LN1_N 385 AO DSI0_LN2_P 380 AO DSI0_LN2_N 382 AO DSI0_LN3_P 376 AO LCD0 MIPI lane 0 data (+) LCD0 MIPI lane 0 data (-) LCD0 MIPI lane 1 data (+) LCD0 MIPI lane 1 data (-) LCD0 MIPI lane 2 data (+) LCD0 MIPI lane 2 data (-) LCD0 MIPI lane 3 data (+) 85 differential impedance. SG865W_Series_Hardware_Design 30 / 117 Smart Module Series DSI0_LN3_N 379 AO LCD0 MIPI lane 3 data (-) DSI1_CLK_P 363 AO LCD1 MIPI clock (+) DSI1_CLK_N 368 AO LCD1 MIPI clock (-) DSI1_LN0_P 378 AO DSI1_LN0_N 384 AO DSI1_LN1_P 374 AO DSI1_LN1_N 381 AO DSI1_LN2_P 369 AO DSI1_LN2_N 377 AO DSI1_LN3_P 364 AO DSI1_LN3_N 373 AO Camera Interfaces LCD1 MIPI lane 0 data (+) LCD1 MIPI lane 0 data (-) LCD1 MIPI lane 1 data (+) LCD1 MIPI lane 1 data (-) LCD1 MIPI lane 2 data (+) LCD1 MIPI lane 2 data (-) LCD1 MIPI lane 3 data (+) LCD1 MIPI lane 3 data (-) Pin Name Pin No. I/O Description DC Characteristics Comment CSI0_CLK_P 255 CSI0_CLK_N 258 CSI0_LN0_P 266 CSI0_LN0_N 265 CSI0_LN1_P 261 CSI0_LN1_N 260 CSI0_LN2_P 257 CSI0_LN2_N 256 CSI0_LN3_P 254 AI AI AI AI AI AI AI AI AI MIPI clock of camera 0 (+) MIPI clock of camera 0 (-) MIPI lane 0 data of camera 0 (+) MIPI lane 0 data of camera 0 (-) MIPI lane 1 data of camera 0 (+) MIPI lane 1 data of camera 0 (-) MIPI lane 2 data of camera 0 (+) MIPI lane 2 data of camera 0 (-) MIPI lane 3 data of camera 0 (+) 85 differential impedance. SG865W_Series_Hardware_Design 31 / 117 Smart Module Series CSI0_LN3_N 253 CSI1_CLK_P 298 CSI1_CLK_N 292 CSI1_LN0_P 322 CSI1_LN0_N 321 CSI1_LN1_P 316 CSI1_LN1_N 315 CSI1_LN2_P 310 CSI1_LN2_N 309 CSI1_LN3_P 304 CSI1_LN3_N 303 CSI2_CLK_P 285 CSI2_CLK_N 291 CSI2_LN0_P 290 CSI2_LN0_N 295 CSI2_LN1_P 284 CSI2_LN1_N 289 CSI2_LN2_P 278 CSI2_LN2_N 283 CSI2_LN3_P 272 CSI2_LN3_N 277 CSI3_CLK_P 366 AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI MIPI lane 3 data of camera 0 (-) MIPI clock of camera 1 (+) MIPI clock of camera 1 (-) MIPI lane 0 data of camera 1 (+) MIPI lane 0 data of camera 1 (-) MIPI lane 1 data of camera 1 (+) MIPI lane 1 data of camera 1 (-) MIPI lane 2 data of camera 1 (+) MIPI lane 2 data of camera 1 (-) MIPI lane 3 data of camera 1 (+) MIPI lane 3 data of camera 1 (-) MIPI clock of camera 2 (+) MIPI clock of camera 2 (-) MIPI lane 0 data of camera 2 (+) MIPI lane 0 data of camera 2 (-) MIPI lane 1 data of camera 2 (+) MIPI lane 1 data of camera 2 (-) MIPI lane 2 data of camera 2 (+) MIPI lane 2 data of camera 2 (-) MIPI lane 3 data of camera 2 (+) MIPI lane 3 data of camera 2 (-) MIPI clock of camera 3 (+) SG865W_Series_Hardware_Design 32 / 117 Smart Module Series CSI3_CLK_N 362 CSI3_LN0_P 343 CSI3_LN0_N 338 CSI3_LN1_P 349 CSI3_LN1_N 344 CSI3_LN2_P 355 CSI3_LN2_N 350 CSI3_LN3_P 361 CSI3_LN3_N 356 CSI4_CLK_P 302 CSI4_CLK_N 307 CSI4_LN0_P 326 CSI4_LN0_N 331 CSI4_LN1_P 320 CSI4_LN1_N 325 CSI4_LN2_P 314 CSI4_LN2_N 319 CSI4_LN3_P 308 CSI4_LN3_N 313 CSI5_CLK_P 335 CSI5_CLK_N 329 CS5_LN0_P 352 AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI MIPI clock of camera 3 (-) MIPI lane 0 data of camera 3 (+) MIPI lane 0 data of camera 3 (-) MIPI lane 1 data of camera 3 (+) MIPI lane 1 data of camera 3 (-) MIPI lane 2 data of camera 3 (+) MIPI lane 2 data of camera 3 (-) MIPI lane 3 data of camera 3 (+) MIPI lane 3 data of camera 3 (-) MIPI clock of camera 4 (+) MIPI clock of camera 4 (-) MIPI lane 0 data of camera 4 (+) MIPI lane 0 data of camera 4 (-) MIPI lane 1 data of camera 4 (+) MIPI lane 1 data of camera 4 (-) MIPI lane 2 data of camera 4 (+) MIPI lane 2 data of camera 4 (-) MIPI lane 3 data of camera 4 (+) MIPI lane 3 data of camera 4 (-) MIPI clock of camera 5 (+) MIPI clock of camera 5 (-) MIPI lane 0 data of camera 5 (+) SG865W_Series_Hardware_Design 33 / 117 Smart Module Series CSI5_LN0_N 351 CSI5_LN1_P 346 CSI5_LN1_N 345 CSI5_LN2_P 340 CSI5_LN2_N 339 CSI5_LN3_P 334 CSI5_LN3_N 333 AI AI AI AI AI AI AI CAM0_MCLK 118 DO CAM1_MCLK 112 DO CAM2_MCLK 107 DO CAM3_MCLK CAM4_MCLK 99 96 DO DO CAM5_MCLK 108 DO CAM6_MCLK 100 DO MIPI lane 0 data of camera 5 (-) MIPI lane 1 data of camera 5 (+) MIPI lane 1 data of camera 5 (-) MIPI lane 2 data of camera 5 (+) MIPI lane 2 data of camera 5 (-) MIPI lane 3 data of camera 5 (+) MIPI lane 3 data of camera 5 (-) Master clock of camera 0 Master clock of camera 1 Master clock of camera 2 Master clock of camera 3 Master clock of camera 4 Master clock of camera 5 Master clock of camera 6 CAM0_RST CAM1_RST 119 114 DO Reset of camera 0 DO Reset of camera 1 CAM2_RST 109 DO Reset of camera 2 CAM3_RST 103 DO Reset of camera 3 CAM4_RST CAM5_RST 115 110 DO Reset of camera 4 DO Reset of camera 5 CAM6_RST 104 DO Reset of camera 6 CCI0_I2C_SDA 151 OD I2C data of CCI0 CCI0_I2C_SCL 157 OD I2C clock of CCI0 SG865W_Series_Hardware_Design 34 / 117 Smart Module Series CCI1_I2C_SDA 150 OD I2C data of CCI1 CCI1_I2C_SCL 156 OD I2C clock of CCI1 CCI2_I2C_SDA 162 OD I2C data of CCI2 CCI2_I2C_SCL 168 OD I2C clock of CCI2 CCI3_I2C_SDA 174 OD I2C data of CCI3 CCI3_I2C_SCL 180 OD I2C3 clock of CCI3 CCI_I3C_SDA 462 OD I3C data of CCI CCI_I3C_SCL 456 OD I3C clock of CCI LDO1F_1V1 36 PO 1.1 V output LDO2F_1V2 48 PO 1.2 V output LDO3F_1V05 35 PO 1.05 V output LDO4F_1V2*

47 PO 1.2 V output LDO5F_2V85 60 PO 2.85 V output LDO6F_2V8 59 PO 2.8 V output Vnom = 1.1 V IOmax = 1200 mA Vnom = 1.2 V IOmax = 1200 mA Vnom = 1.05 V IOmax = 300 mA Vnom = 1.2 V IOmax = 600 mA Vnom = 2.85 V IOmax = 600 mA Vnom = 2.8 V IOmax = 600 mA Power supply for DVDD of camera. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for DVDD of camera. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for DVDD of camera. Reserve a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for DVDD of camera. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for AVDD of camera. Add a 4.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for AVDD of camera. Add a 4.7 F bypass capacitor if used. If unused, keep this pin open. SG865W_Series_Hardware_Design 35 / 117 Smart Module Series LDO7F_1V8 71 PO 1.8 V output Vnom = 1.8 V IOmax = 600 mA Power supply for DOVDD of camera. Add a 4.7 F bypass capacitor if used. If unused, keep this pin open. Flashlight Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment FLASH_LED1 249 AO FLASH_LED2 242 AO FLASH_LED3 243 AO Flash/torch driver output 1 Flash/torch driver output 2 Flash/torch driver output 3 FLASH_STROBE 237 DI Flash LED strobe If unused, connect it to GND. Keypad Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment PWRKEY 461 DI Turn on/off the module VOL_UP 473 DI Volume up VOL_DOWN 479 DI Volume down UART Interfaces PWRKEY pin is pulled to 1.8 V internally. Pin Name Pin No. I/O Description DC Characteristics Comment DBG_TXD 472 DO Debug UART transmit DBG_RXD 466 DI Debug UART receive UART5_TXD 164 DO UART5 transmit UART5_RXD 158 DI UART5 receive UART5_CTS 165 DI UART5_RTS 159 DO DCE clear to send signal from DTE DCE request to send signal to DTE UART16_TXD 475 DO UART16 transmit UART16_RXD 469 DI UART16 receive UART16_CTS 474 DI DCE clear to send signal from DTE SG865W_Series_Hardware_Design 36 / 117 Smart Module Series UART16_RTS 468 DO DCE request to send signal to DTE UART17_TXD 439 DO UART17 transmit UART17_RXD 445 DI UART17 receive UART17_CTS 444 DI UART17_RTS 438 DO DCE clear to send signal from DTE DCE request to send signal to DTE Sensor Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment SENSOR_I2C_SDA 97 OD SENSOR_I2C_SCL 98 OD SENSOR_I3C_SDA 72 OD SENSOR_I3C_SCL 83 OD SENSOR_SPI_CLK 89 DO SENSOR_SPI_CS 95 DO I2C clock for external sensor I2C data for external sensor I3C data for external sensor I3C clock for external sensor SPI clock for external sensor SPI chip select for external sensor SPI master-out SENSOR_SPI_MOSI 78 DO slave-in for external sensor SPI master-in SENSOR_SPI_MISO 84 DI slave-out for external sensor MAG_INT 163 DI MAG interrupt HALL_INT 169 DI HALL interrupt ALPS_INT 175 DI ALPS interrupt IMU_INT1 141 DI IMU interrupt 1 IMU_INT2 145 DI IMU interrupt 2 SPI Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment SPI2_CLK 204 DO SPI2 clock SG865W_Series_Hardware_Design 37 / 117 Smart Module Series SPI2_CS 198 DO SPI2 chip select SPI2_MISO 205 DI SPI2_MOSI 199 DO SPI2 master-in slave-out SPI2 master-out slave-in SPI4_CLK 187 DO SPI4 clock SPI4_CS 181 DO SPI4 chip select SPI4_MISO 192 DI SPI4_MOSI 186 DO SPI4 master-in slave-out SPI4 master-out slave-in FP_SPI14_CLK 342 DO FP SPI14 clock FP_SPI14_CS 353 DO FP SPI14 chip select FP_SPI14_MISO 347 DI FP_SPI14_MOSI 348 DO FP SPI14 master-in slave-out FP SPI14 master-out slave-in RF Control Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment ANT_BT*

133 AIO ANT_WIFI0 143 AIO ANT_WIFI1 172 AIO PA_MUTE 190 DI Bluetooth antenna interface Wi-Fi0/Bluetoothante nna interface Wi-Fi1 antenna interface Wi-Fi xFEM control to disable Wi-Fi PA Wi-Fi xFEM control WLAN_TXEN 179 DO to enable Wi-Fi LAA_RX 196 DI transmit Wi-Fi xFEM control for LAA/n79 receiver Wi-Fi xFEM control Reserved If unused, connect it to GND. If unused, connect it to GND with a 10 k resistor. If unused, connect it to GND. LAA_TXEN 185 DO to enable LAA/n79 If unused, connect it to GND. LAA_AS_EN 129 DI transmit Allow LAA/n79 to control Wi-Fi xFEM during Wi-Fi sleep mode If unused, connect it to GND with a 10 k resistor. SG865W_Series_Hardware_Design 38 / 117 Smart Module Series COEX_RXD 121 DI Wi-Fi/Bluetooth If unused, connect it to GND. 2.4 GHz WWAN &

coexistence receive 2.4 GHz WWAN &

COEX_TXD 125 DO Wi-Fi/Bluetooth coexistence transmit NFC Interface If unused, connect it to GND with 10 k resistor. Pin Name Pin No. I/O Description DC Characteristics Comment NFC_SE_SPI0_CLK 183 DO NFC SE SPI0 clock NFC_SE_SPI0_CS 177 DO NFC_SE_SPI0_MISO 182 DI NFC_SE_SPI0_MOSI 176 DO NFC SE SPI0 chip select NFC SE SPI0 master-in slave-out NFC SE SPI0 master-out slave-in NFC_I2C1_SCL 200 OD I2C1 clock of NFC NFC_I2C1_SDA 206 OD I2C1 data of NFC NFC_DWL_REQ 188 DI NFC download request NFC_EN 194 DO NFC enable NFC_CLK_REQ 189 DI NFC clock request NFC_INT_REQ 195 DI NFC interrupt request I2C Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment I2C15_SCL 457 OD I2C15 serial clock I2C15_SDA 463 OD I2C15 serial data ADC Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment PM_ADC1 PM_ADC2 PM_ADC3 218 229 230 AI AI AI General-purpose ADC interface 1 General-purpose ADC interface 2 General-purpose ADC interface 3 SG865W_Series_Hardware_Design 39 / 117 Smart Module Series PM_ADC4 234 AI General-purpose ADC interface 4 Charging Interface Pin Name Pin No. I/O Description DC Characteristics Comment BAT_P BAT_M VBAT_SNS_M BAT_THERM BAT_ID 4 5 9 11 15 AI AI Battery voltage detect (+) Battery voltage detect (-) Sensed battery AI voltage (-) for charger circuits Battery temperature detect AI AI Battery type detect SMB1390 parallel SMB_THERM 28 AI charging temperature detect SMB1390 parallel SMB_STATUS 17 DI charging status SMB_EN_CHG 23 DO indicator SMB1390 parallel charging enable USB_IN_MID 493, 494, PO SMB1390 parallel 489, 490, Power output for 498 charging Wireless Charging Interface Must be connected. Must be connected. Must be connected. Must be pull down to GND with a 100 k resistor. Parallel charging is not supported by default. If parallel charging is not needed, keep these pins open. Pin Name Pin No. I/O Description DC Characteristics Comment WIRELESS_DC_IN_ PSNS WIRELESS_DC_IN_ EN WIRELESS_DC_IN_ PON 1 2 3 WIRELESS_RST 6 DO WIRELESS_THERM 34 AI DC and wireless AI charging input for power sense DC and wireless DO charging output enable and disable DC and wireless AI charging power-on trigger Wireless charging reset Wireless charging temperature detect SG865W_Series_Hardware_Design 40 / 117 Smart Module Series Vibration Drive Interface Pin Name Pin No. I/O Description DC Characteristics Comment HAP_P HAP_M HAP_PWM_IN VDD_HAP 38 44 50 27 AO AO Haptics driver output

(+) Haptics driver output

(-) DI Haptics PWM input If unused, connect it to GND. PI Power supply for haptics HAP_BOOST_EN 33 DO Haptics boost enable Other Interfaces Pin Name Pin No. I/O Description DC Characteristics Comment 5G_PON_RST 270 DO PON control signal for 5G Force the module USB_BOOT 478 DI into emergency CBL_PWR_N 467 DI download mode Initiates power-on when grounded PM_PWM1 251 DO PWM output 1 PM_PWM2 248 DO PWM output 2 RESERVED 12, 16, 122, 126, 132, 276, 282, 288, 294, 300, 305, 306, 311, 312, 318, 426 7, 8, 10, 13, 14, 18, 21, 22, 29, 30, 32, 37, 39, 40, 41, 42, 53, 54, 55, 56, 57, 65, 66, 76, 77, 79, 86, 90, 93, 94, 101, 102, 105, 106, 111, 113, 117, 127, 128, 130, 131, 134, 135, 136, 137, 138, 139, 140, 144, 148, 149, 153, 154, 155, 160, 161, 166, 167, 170, 171, 173, 178, 184, 191, 193, 201, GND 202, 210, 212, 221, 223, 224, 225, 231, 235, 236, 238, 239, 246, 259, 262, 271, 279, 286, 296, 297, 301, 323, 327, 328, 332, 336, 337, 341, 357, 358, 367, 371, 397, 400, 401, 403, 410, 423, 430, 432, 433, 434, 441, 443, 448, 450, 451, 452, 453, 465, 480, 483, 484, 485, 487, 491, 492, 495, 496, 497, 501, 505571 NOTE 1. Keep all RESERVED pins unconnected. 2. All GND pins should be connected to the ground network. SG865W_Series_Hardware_Design 41 / 117 Smart Module Series 2.6. EVB Kit To help you develop applications with the module, Quectel supplies an evaluation board with accessories to control or test the module. For more details, see document [1]. SG865W_Series_Hardware_Design 42 / 117 Smart Module Series 3 Operating Characteristics 3.1. Power Supply 3.1.1. Power Supply Pins The module provides 5 VBAT pins, 4 VPH_PWR pins. VBAT pins must be connected to an external power to supply power to the module. VPH_PWR pins are used to power other devices. 3.1.2. Battery Charge and Management The module can recharge batteries. The battery charger in the module supports trickle charging, constant current charging and constant voltage charging modes, which optimize the charging procedure for Li-ion batteries. Trickle charging: There are two steps in this mode. When the battery voltage is below 2.1 V, a 45 mA trickle charging current is applied to the battery. When the battery voltage is charged to between 2.1 V and 3.0 V, the maximum charging current can be set to 1575 mA. Constant current mode (CC mode): When the battery is increased to between 3.0 V and 4.35 V, the system will switch to CC mode. The maximum charging current is 6 A when an adapter is used for battery charging, and the maximum charging current is 500 mA for USB charging. Constant voltage mode (CV mode): When the battery voltage reaches the final value 4.35 V, the system will switch to CV mode and the charging current will decrease gradually. When the battery level reaches 100 %, the charging is completed. Table 7: Pin Definition of Charging Interface Pin Name Pin No. I/O Description Comment BAT_P BAT_M VBAT_SNS_M 4 5 9 AI AI AI Battery voltage detect (+) Must be connected. Battery voltage detect (-) Must be connected. Sensed battery voltage (-) for charger circuits Must be connected. BAT_THERM 11 AI Battery temperature detect Must be pull down to GND with a 100 k resistor. SG865W_Series_Hardware_Design 43 / 117 Smart Module Series BAT_ID SMB_THERM 15 28 SMB_STATUS 17 AI AI DI SMB_EN_CHG 23 DO Battery type detect SMB1390 parallel charging temperature detect SMB1390 parallel charging status indicator SMB1390 parallel charging enable USB_IN_MID 489, 490, 493, 494, 498 PO Power output for SMB1390 parallel charging Parallel charging is not supported by default. If parallel charging is not needed, keep these pins open. The module supports battery temperature detection in the condition that the battery integrates a thermistor (100 k 1 % NTC thermistor with a B-constant of 4050K by default); and the thermistor is connected to BAT_THERM pin, If the BAT_THERM pin is not connected, there will be malfunctions such as battery charging failure, battery level display error, etc. A reference design for the battery charging circuit is shown below. Figure 3: Reference Design for Battery Charging Circuit Mobile devices such as mobile phones and handheld POS systems are powered by batteries. When different batteries are utilized, the charging and discharging curve must be modified correspondingly to achieve the best effect. If the thermistor is not available in the battery, or adapter is utilized for powering the module, then there is only a need for VBAT and GND connection. In this case, the system may mistakenly judge that the battery temperature is abnormal, which will cause battery charging failure. In order to avoid this, BAT_THERM should be connected to GND via a 100 k resistor. If BAT_THERM is unconnected, the system will be SG865W_Series_Hardware_Design 44 / 117 GNDBAT_THERMVBAT100FNTCVBAT33 pF1 FESDUSB_VBUSAdapter or USBModuleBatteryC1C2C3D1BAT_PBAT_MGNDVBAT_SNS_M Smart Module Series unable to detect the battery, making the battery cannot be charged. BAT_P and BAT_M must be connected, and VBAT_SNS_M pin must be connected. Otherwise, the module will have abnormalities in voltage detection, as well as associated module power on/off and battery charging and discharging issues. 3.1.3. Reference Design for Power Supply The power design for the module is very important for the performance of the module. The power supply of the module should be able to provide sufficient current up to 5 A at least. If the voltage drop between the input and output is not too high, it is suggested to use an LDO to supply power for the module. If there is a big voltage difference between the input voltage and the desired output (VBAT) voltage, a buck converter is recommended. The following figure shows a reference design for +12 V input power source:

Figure 4: Reference Circuit of Power Supply 3.1.4. Voltage Stability Requirements The power supply range of the module is from 3.55 V to 4.4 V, and the recommended value is 3.8 V. The power supply performance, such as load capacity, voltage ripple, etc. directly influences the modules performance and stability. Under ultimate conditions, the module may have a transient peak current of up to 3 A. If the power supply capability is not sufficient, there will be voltage drops, and if the voltage drops below 3.1 V, the module will power off automatically. Therefore, make sure the input voltage never drops below 3.1 V. SG865W_Series_Hardware_Design 45 / 117 DC_INC1C2U1VBAT 10 FC822 FC9100 nFR2120K27KR322 F10K1 %1 %EN100 nFC3R1GNDGNDSSVREG5C722 FVFBINVBSTSWL1 3.3 H 1 F8 nF100 nFC4C5C6 Smart Module Series Figure 5: Voltage Drop Sample To prevent the voltage from dropping below 3.1 V, use a bypass capacitor of about 100 F with low ESR

(ESR = 0.7 ), and reserve a multi-layer ceramic chip capacitor (MLCC) array due to its ultra-low ESR. It is recommended to use four ceramic capacitors (10 F, 100 nF, 33 pF, 10 pF) to compose the MLCC array, and place four capacitors close to VBAT pins. The width of VBAT trace should be no less than 3 mm. In principle, the longer the VBAT trace is, the wider it should be. In addition, to get a stable power source, it is suggested to use a 2000 W TVS and place it as close to the VBAT pins as possible to enhance surge protection. The following figure shows the structure of the power supply. Figure 6: Structure of Power Supply SG865W_Series_Hardware_Design 46 / 117 Voltage3.8 VInput current3 AModuleVBATC1100F+C2100nFC333pFC410pFD1C510 FGNDVBAT Smart Module Series 3.2. Turn On 3.2.1. Turn On with PWRKEY Table 8: Pin Definition of PWRKEY Pin Name Pin No. I/O Description Comment PWRKEY 461 DI Turn on/off the module PWRKEY pin is pulled to 1.8 V internally. The module can be turned on by driving PWRKEY low for at least 1.6 s. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. Figure 7: Turn On the Module Using Driving Circuit The other way to control the PWRKEY is by using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. Additionally, a 1 k resistor is connected in series to PWRKEY. A reference circuit is shown in the following figure. SG865W_Series_Hardware_Design 47 / 117 PWRKEY> 1.6 sMCUGPIOModuleTurn on pulse4.7K47KQ1 Smart Module Series Figure 8: Turn On the Module Using a Button 3.2.2. Turn On Automatically with CBL_PWR_N Table 9: Pin Definition of CBL_PWR_N Pin Name Pin No. CBL_PWR_N 467 I/O DI Description Initiates power-on when grounded The module can be turned on automatically by driving CBL_PWR_N pin to GND via a 1 k resistor. CBL_PWR_N pin is pulled up internally. A simple reference circuit is illustrated in the following figure. Figure 9: Reference Circuit of Automatic Turn-on NOTE If the module turns on automatically through CBL_PWR_N pin, it cannot be turned off manually. In such case, it can be turned off only by cutting off the power supply of system. SG865W_Series_Hardware_Design 48 / 117 PWRKEYModuleS1Close to S1TVS1KTurn-on pulseR1CBL_PWR_NModule1K Smart Module Series The power-up timing is illustrated in the following figure. Figure 10: Power-up Timing NOTE 1. When the module is powered on for the first time, its power-up timing may be different from that shown in the figure above. 2. Make sure that VBAT is stable before pulling down the PWRKEY pin. The recommended time between them is no less than 30 ms. PWRKEY pin cannot be pulled down all the time. 3.3. Turn Off/Restart The module can be turned off by driving PWRKEY low for at least 1 s. Then the module will detect a turn-off action and a prompt window will pop up on the screen. You can choose to turn off the module in the prompt window. The other way to turn off the module is by driving PWRKEY low for at least 8 s. The module will execute the forced shutdown. The forced power-down timing is illustrated in the following figure. SG865W_Series_Hardware_Design 49 / 117 VBAT (Typ: 3.8 V)PWRKEY> 1.6 sOthersVREG_BOB38 sVREG_S4A_1V850 msSoftware controlledLDO12A_1V8ActiveNOTE 2Software controlled Smart Module Series Figure 11: Forced Power-down Timing 3.4. VRTC Interface The RTC (Real Time Clock) can be powered by an external power source through VRTC when the module is powered down and there is no power supply for the VBAT. The external power source can be a capacitor according to application demands. The following are some reference circuit designs when an external battery is utilized for powering RTC. Figure 12: RTC Powered by a Coin Cell Figure 13: RTC Powered by Capacitor SG865W_Series_Hardware_Design 50 / 117 VBATPWRKEYOthers> 8 sPower downModuleRTC CoreVRTCCoin CellLarge Capacitance CapacitorModuleRTC CoreVRTCC Smart Module Series When VBAT is disconnected, the recommended input voltage range for VRTC is 2.53.25 V and the recommended typical value is 3.0 V. When powered by VBAT, the RTC error is 50 ppm. When powered by VRTC, the RTC error is about 200 ppm. If a rechargeable battery is used, ESR of the battery should be less than 1 k, and it is recommended to use MS621FE FL11E of SEIKO. 3.5. Power Supply Output The module supports regulated voltages output for peripheral circuits. During application, it is recommended to use 33 pF and 10 pF capacitors in parallel in the circuit to effectively suppress high-frequency noise. Table 10: Power Supply Description Pin Name Default Voltage (V) Drive Current (mA) Standby LDO2A_3V1 LDO10A_2V9 LDO12A_1V8 LDO13A_3V0 LDO14A_1V8 LDO1C_1V8 3.1 1.8 1.8 3.0 1.8 1.8 LDO7C_2V85 2.85 LDO8C_1V8 LDO10C_3V3 LDO11C_3V1 VREG_BOB 1.8 3.3 3.1 3.3 VREG_S4A_1V8 1.8 VPH_PWR VBAT 150 600 300 150 300 150 600 150 600 600 2000 500 2000 Keep ON Keep ON Keep ON SG865W_Series_Hardware_Design 51 / 117 Smart Module Series NOTE The actual LDO output voltage can be adjusted according to different application scenarios. SG865W_Series_Hardware_Design 52 / 117 Smart Module Series 4 Application Interfaces 4.1. USB Interfaces USB0 interface:

Compliant with the USB 3.1 Gen 2 and USB 2.0 specifications Supports USB OTG function Supports host and device modes Used for AT command communication, data transmission, software debugging and firmware upgrade Supports DisplayPort V1.4 over Type-C USB1 interface:

Compliant with the USB 3.1 Gen 2 and USB 2.0 specifications Supports host mode only Supports USB hub expansion The following table shows the pin definition of USB0 and USB1 interfaces. Table 11: Pin Definition of USB0 and USB1 Interfaces Pin Name Pin No. I/O Description Comment USB_VBUS 499, 500, 502, 503, 504 PIO Charging power input;

Power supply for OTG device;

USB/adaptor insertion detection USB0_DP 442 AIO USB0 2.0 differential data (+) USB0_DM 436 AIO USB0 2.0 differential data (-) USB0_SS0_RX_P 412 USB0_SS0_RX_M 413 AI AI USB0_SS0_TX_P 406 AO USB0 3.1 channel 0 SuperSpeed receive (+) USB0 3.1 channel 0 SuperSpeed receive (-) USB0 3.1 channel 0 SuperSpeed transmit (+) 90 differential impedance. USB 2.0 standard compliant. 90 differential impedance. USB 3.1 standard compliant. SG865W_Series_Hardware_Design 53 / 117 Smart Module Series USB0_SS0_TX_M 407 AO USB0_SS1_RX_P 424 USB0_SS1_RX_M 425 USB0_SS1_TX_P 418 USB0_SS1_TX_M 419 USB_CC1 USB_CC2 DP_AUX_P DP_AUX_M USB_SBU1 USB_SBU2 USB1_DP 408 402 431 437 420 414 416 USB0 3.1 channel 0 SuperSpeed transmit (-) USB0 3.1 channel 1 SuperSpeed receive (+) USB0 3.1 channel 1 SuperSpeed receive (-) USB0 3.1 channel 1 SuperSpeed transmit (+) USB0 3.1 channel 1 SuperSpeed transmit (-) USB Type-C detect 1 USB Type-C detect 2 AI AI AO AO AI AI AIO DisplayPort auxiliary channel (+) AIO DisplayPort auxiliary channel (-) DI DI USB Type-C side band use 1 USB Type-C side band use 2 AIO USB1 2.0 differential data (+) USB1_DM 417 AIO USB1 2.0 differential data (-) USB1_SS_TX_P 428 AO USB1 3.1 SuperSpeed transmit (+) USB1_SS_TX_M 422 AO USB1 3.1 SuperSpeed transmit (-) USB1_SS_RX_P 405 USB1_SS_RX_M 411 AI AI USB1 3.1 SuperSpeed receive (+) USB1 3.1 SuperSpeed receive (-) 90 differential impedance. USB 2.0 standard compliant. 90 differential impedance. USB 3.1 standard compliant. SG865W_Series_Hardware_Design 54 / 117 Smart Module Series 4.1.1. USB0 Type-C Figure 14: USB Type-C Interface Reference Design Follow the following principles while designing the USB interfaces to ensure USB performance. It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90 . Pay attention to the influence of junction capacitance of ESD protection components on USB data traces. Typically, the junction capacitance value should be less than 2 pF for USB 2.0 and less than 0.5 pF for USB 3.1. Do not route signal traces under crystals, oscillators, magnetic devices, and RF signal traces. It is important to route the USB differential traces in inner-layer and surround the traces with ground on that layer and with ground planes above and below. For USB 2.0, the total trace length of each signal should be less than 250 mm, and the length matching of each differential pair should be less than 2 mm. For USB 3.1, intra-pair length matching (USB_SS_TX/RX_P/M) should be less than 0.7 mm, while the inter-pair length matching (USB_SS_Tx/Rx) should be less than 10 mm. For DisplayPort, intra-pair length matching (DP_AUX_P/M) should be less than 7 mm. Table 12: USB Trace Length Inside the Module Signal Pin No. Length (mm) Length Difference (mm) USB0_DP USB0_DM USB0_SS0_RX_P 442 436 412 53.00 53.16 18.33

-0.16

-0.30 SG865W_Series_Hardware_Design 55 / 117 USB0_DMModuleUSB0_SS0_RX_PRX2+RX2-VBUSCC1D-D+TX2-TX2+CC2USB_CC1USB_CC2RX1+RX1-TX1+TX1-USB Type-CC3C4C7C8USB0_DPUSB_VBUS_SS0_RX_M_SS0_TX_P_SS0_TX_M_SS1_RX_P_SS1_RX_M_SS1_TX_P__TX_MC1C2C5C6USB0USB0USB0USB0USB0USB0USB0SS1USB_SBU1USB_SBU2SBU1SBU2 Smart Module Series 413 406 407 424 425 418 419 431 437 416 417 428 422 405 411 USB0_SS0_RX_M USB0_SS0_TX_P USB0_SS0_TX_M USB0_SS1_RX_P USB0_SS1_RX_M USB0_SS1_TX_P USB0_SS1_TX_M DP_AUX_P DP_AUX_M USB1_DP USB1_DM USB1_SS_TX_P USB1_SS_TX_M USB1_SS_RX_P USB1_SS_RX_M 4.1.2. DisplayPort 18.63 22.72 22.43 22.03 22.25 24.18 24.39 19.17 19.59 18.47 18.17 20.81 20.88 14.82 15.07 0.29

-0.22

-0.21

-0.42 0.3

-0.07

-0.25 The module supports 4-lane DisplayPort mode of up to 4K @ 60 fps over Type-C. The pin definition of USB Type-C/DisplayPort mode is listed below:

Table 13: Pin Definition of USB Type-C/DisplayPort Mode Pin Name USB Type-C Mode DisplayPort Mode USB0_SS1_RX_P/M USB0_SS1_RX_P/M DP_LANE0_P/M USB0_SS1_TX_P/M USB0_SS1_TX_P/M DP_LANE1_P/M USB0_SS0_RX_P/M USB0_SS0_RX_P/M DP_LANE3_P/M USB0_SS0_TX_P/M USB0_SS0_TX_P/M DP_LANE2_P/M SG865W_Series_Hardware_Design 56 / 117 Smart Module Series DP_AUX_P/M SBU1/2 DP_AUX_P/N USB0_DP/M USB1_DP/M USB1_DP/M USB_CC1/CC2 USB_CC1/CC2 HOTPLUG_DET/VCONN USB_VBUS USB_VBUS USB_VBUS UART5_CTS UART5_RTS GND

GND SBU_SW_OE SBU_SW_SEL GND The reference design for DisplayPort is shown below:

Figure 15: Reference Design for DisplayPort Mode SG865W_Series_Hardware_Design 57 / 117 USB0_DPModuleUSB0_SS0_RX_PRX2+RX2-USB_VBUSCC1D+D-TX2-TX2+CC2USB_CC1USB_CC2RX1+RX1-TX1+TX1-USB Type-CC1C2C7C8USB0_DMUSB_VBUSUSB0_SS0_RX_MUSB0_SS0_TX_PUSB0_SS0_TX_MUSB0_SS1_RX_PUSB0_SS1_RX_MUSB0_SS1_TX_PUSB0__TX_MSS1SBU1SBU2OEHSD2+HSD2-HSD1+HSD1-VCCSD+D-GNDVDD_3V3DP_AUX_PDP_AUX_MLDO2A_3V1100K100KSBU_SW_OEVREG_S4A_1V80.1 F0.1 FModule1 FSBU1SBU22.2KSGM7227YMS10G/TRSBU_SW_SELC3C4C5C6C1C2R1R1R3C3USB_SBU1USB_SBU20R0RSBU1SBU2 Smart Module Series 4.2. UART Interfaces The module provides 4 UART interfaces:

UART5/UART16/UART17: 4-wire UART interface, supports hardware flow control. Debug UART: 2-wire UART interface; used for debugging by default, baud rate is 115200 bps by default. Pin definition of the UART interfaces is here as follows:

Table 14: Pin Definition of UART Interfaces Pin Name Pin No. I/O Description DBG_TXD DBG_RXD UART5_TXD UART5_RXD UART5_CTS UART5_RTS UART16_TXD UART16_RXD UART16_CTS UART16_RTS UART17_TXD UART17_RXD UART17_CTS UART17_RTS 472 466 164 158 165 159 475 469 474 468 439 445 444 438 DO Debug UART transmit DI Debug UART receive DO UART5 transmit DI DI DO DO DI DI DO DO DI DI UART5 receive DCE clear to send signal from DTE DCE request to send signal to DTE UART16 transmit UART16 receive DCE clear to send signal from DTE DCE request to send signal to DTE UART17 transmit UART17 receive DCE clear to send signal from DTE DO DCE request to send signal to DTE UART5/UART16/UART17 are a 4-wire UART interface with 1.8 V power domain. A voltage-level translator chip should be used if your application is equipped with a 3.3 V UART interface. The following figure shows a reference design. SG865W_Series_Hardware_Design 58 / 117 Smart Module Series Figure 16: Reference Circuit with Voltage-level Translator Chip (for UART 5) When the module communicates with PC, voltage-level translator is also required. A voltage-level translator chip and an RS-232 translator chip are recommended to be added. The following figure shows a corresponding reference design. Figure 17: RS-232 Level Matching Circuit (for UART 5) NOTE Debug UART, UART16 and UART17 are similar to UART5. For the reference designs, refer to that of UART5. SG865W_Series_Hardware_Design 59 / 117 VCCAVCCBOEA1A2A3A4GNDB1B2B3B4VREG_S4A_1V8UART5_RTSUART5_RXDUART5_CTSUART5_TXDRXD_3.3VCTS_3.3VTXD_3.3VVDD_3.3VTXS0104EPWRC1100pFC2U1100pFRTS_3.3VTXS0104EPWRRXD_3.3VCTS_3.3VVCCAModuleGNDGND1.8VVCCB3.3VDIN1ROUT3ROUT2ROUT1DIN4DIN3DIN2DIN5FORCEON3.3VDOUT1DOUT2DOUT3DOUT4DOUT5RIN3RIN2RIN1VCCGNDOESN65C3238DB-9RTSTXDCTSRXDGNDRTS_3.3VUART5_TXDUART5_RTSUART5_RXDUART5_CTSTXD_1.8VRTS_1.8VRXD_1.8VCTS_1.8V/FORCEOFF/INVALIDR1OUTBTXD_3.3V Smart Module Series 4.3. SD Card Interface The module supports SD 3.0 specifications. The pin definition of the SD card interface is shown below. Table 15: Pin Definition of SD Card Interface Pin Name Pin No. I/O Description Comment SD_CLK SD_CMD 209 215 DO SD card clock DIO SD card command SD_DATA0 226 DIO SDIO data bit 0 SD_DATA1 220 DIO SDIO data bit 1 SD_DATA2 214 DIO SDIO data bit 2 SD_DATA3 208 DIO SDIO data bit 3 SD_DET 203 DI SD card hot-plug detect

SD_LDO9C 197 PO SD card power supply SD_LDO6C 228 PO 1.8/2.95 V output power for SD card pull-up circuits A reference circuit for SD card interface is shown below. IOmax = 600 mA Add a 1.02.2 F bypass capacitor if used. If unused, keep this pin open. IOmax = 150 mA Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. SG865W_Series_Hardware_Design 60 / 117 Smart Module Series Figure 18: Reference Circuit for SD Card Interface SD_LDO9C is a peripheral driver power supply for SD card. The maximum drive current is 600 mA. Because of the large drive current, it is recommended that the trace width is 0.6 mm or above. To ensure the stability of drive power, add 2.2 F and 10 pF capacitors in parallel near the SD card connector. SD_CMD, SD_CLK, SD_DATA[0:3] are all high-speed signal traces. In PCB design, control the characteristic impedance of them as 45 10 %, and do not cross them with other traces. It is recommended to route these traces on the inner layer of PCB, and keep the same trace length for SD_CMD, SD_CLK, SD_DATA[0:3]. Additionally, SD_CLK needs separate ground shielding. Layout guidelines:

Control impedance to 45 10 %, and add ground shielding for SD_DATA[0:3] traces. The total trace length of each signal (except for SD_DET) should be less than 50 mm for SDR 104 mode. The trace length difference between SD_CLK and other signal traces like SD_CMD/SD_DATA should not exceed 2 mm for SDR 104 mode. Table 16: SD Card Signal Trace Length Inside the Module Signal SD_CLK SD_CMD SD_DATA0 Pin No. Length (mm) Length Difference (mm) 209 215 226 23.92 22.83 23.23 1.35 SG865W_Series_Hardware_Design 61 / 117 SD_CMD120KNM_51KSD_DATA3SD_DATA2SD_CLKSD_DATA0SD_DETSD_DATA1P1-DAT2P2-CD/DAT3P3-CMDP4-VDDP5-CLKP8-DAT1GNDP6-VSSP7-DAT0DETECTIVEGNDGNDGND1234567891011121333R33R33R33R33R33R1K10 pF2.2 FModuleR1R2R3R4R5R6NM_51KNM_10KNM_51KNM_51KR7R8R9R10R11R12R13D1D2D3D4D5D6D7D8C1C2SD Card ConnectorVREG_S4A_1V8SD_LDO9CSD_LDO6CGND Smart Module Series SD_DATA1 SD_DATA2 SD_DATA3 220 214 208 23.82 23.4 22.57 4.4. GPIOs The module has abundant GPIO interfaces with 1.8 V power domain. The pin definition is listed below. Table 17: Pin Definition of GPIO Interfaces Pin Name Pin No. I/O Description Comment GPIO56 GPIO57 GPIO58 GPIO59 GPIO60 GPIO61 GPIO62 GPIO63 GPIO64 GPIO68 GPIO70 GPIO88 GPIO89 GPIO119 354 360 359 365 124 120 116 123 458 152 317 146 464 147 GPIO120 142 GPIO126 470 DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output General-purpose input/output 1.8 V power domain. SG865W_Series_Hardware_Design 62 / 117 Smart Module Series 4.5. I2C Interfaces The module provides 9 I2C interfaces. All I2C interfaces are open drain signals and therefore you must pull them up externally. The reference power domain is 1.8 V. Table 18: Pin Definition of I2C Interfaces Pin Name Pin No. I/O Description Comment I2C15_SCL I2C15_SDA TP0_I2C_SCL TP0_I2C_SDA TP1_I2C_SCL TP1_I2C_SDA CCI0_I2C_SDA CCI0_I2C_SCL CCI1_I2C_SDA CCI1_I2C_SCL CCI2_I2C_SDA CCI2_I2C_SCL CCI3_I2C_SDA CCI3_I2C_SCL 457 463 454 460 409 415 151 157 150 156 162 168 174 180 SENSOR_I2C_SDA 97 SENSOR_I2C_SCL 98 NFC_I2C1_SDA NFC_I2C1_SCL 206 200 OD OD OD OD OD OD OD OD OD OD OD OD OD OD OD OD OD OD I2C15 serial clock I2C15 serial data TP0 I2C clock TP0 I2C data TP1 I2C clock TP1 I2C data I2C data of CCI0 I2C clock of CCI0 I2C data of CCI1 I2C clock of CCI1 I2C data of CCI2 I2C clock of CCI2 I2C data of CCI3 I2C3clock of CCI3 I2C clock for external sensor I2C data for external sensor I2C data of NFC I2C clock of NFC SG865W_Series_Hardware_Design 63 / 117 Smart Module Series 4.6. ADC Interfaces The module provides 4 Analog-to-Digital Converter (ADC) interfaces. To improve the accuracy of ADC, the trace of ADC interfaces should be surrounded by ground. Table 19: Pin Definition of ADC Interface Pin Name Pin No. I/O Description Comment PM_ADC1 PM_ADC2 PM_ADC3 PM_ADC4 218 229 230 234 AI AI AI AI General-purpose ADC interface 1 General-purpose ADC interface 2 General-purpose ADC interface 3 General-purpose ADC interface 4 The accuracy of the ADC is up to 7 mV. The following table describes the characteristic of the ADC interface. Table 20: Characteristics of ADC Interface Name Min. Typ. Max. Unit ADC1 Voltage Range ADC2 Voltage Range ADC3 Voltage Range ADC4 Voltage Range ADC Input Resistance ADC1/ADC3/ADC4 Accuracy

(Voltage Range: 01.8 V) 0 0 0 0 1

-12.5 ADC2 Accuracy (Voltage Range: 05.0 V)

-20 ADC Sample Clock

7 10 4.8 1.8 5.0 1.8 1.8

12.5 20

V V V V M mV mV MHz NOTE 1. The input voltage of ADC should not exceed its corresponding voltage range. It is prohibited to supply any voltage to ADC pin when VBAT is removed. 2. SG865W_Series_Hardware_Design 64 / 117 Smart Module Series 3. It is recommended to use resistor divider circuit for ADC application. 4.7. PCIe Interfaces The module provides 2 integrated PCIe (Peripheral Component Interconnect Express) interfaces. The key features of the PCIe interfaces are mentioned below:

PCI Express Base Specification Revision 3.0 compliance. Data rate at 8 Gbps per lane. Can be used to connect to an external Ethernet IC (MAC and PHY) or WLAN IC. Table 21: Pin Definition of PCIe Interfaces Pin Name Pin No. I/O Description Comment PCIE1_REFCLK_P PCIE1_REFCLK_M PCIE1_TX0_P PCIE1_TX0_M PCIE1_RX0_P PCIE1_RX0_M PCIE1_TX1_P PCIE1_TX1_M PCIE1_RX1_P PCIE1_RX1_M PCIE1_WAKE_N PCIE1_RST_N PCIE1_CLKREQ_N PCIE2_REFCLK_P PCIE2_REFCLK_M 267 273 281 280 275 274 269 268 264 263 287 293 299 395 396 DO DO DO DO DI DI DO DO DI DI DI PCIe1 reference clock (+) PCIe1 reference clock (-) PCIe1 transmit 0 (+) PCIe1 transmit 0 (-) PCIe1 receive 0 (+) PCIe1 receive 0 (-) PCIe1 transmit 1 (+) PCIe1 transmit 1 (-) PCIe1 receive 1 (+) PCIe1 receive 1 (-) PCIe1 wake up host 85 differential impedance. DO PCIe1 reset DI DO DO PCIe1 clock request PCIe2 reference clock (+) 85 differential PCIe2 reference clock (-) impedance. SG865W_Series_Hardware_Design 65 / 117 Smart Module Series PCIE2_TX0_P PCIE2_TX0_M PCIE2_RX0_P PCIE2_RX0_M PCIE2_TX1_P PCIE2_TX1_M PCIE2_RX1_P PCIE2_RX1_M PCIE2_WAKE_N PCIE2_RST_N PCIE2_CLKREQ_N 388 389 391 392 390 394 393 398 370 404 399 DO DO DI DI DO DO DI DI DI PCIe2 transmit 0 (+) PCIe2 transmit 0 (-) PCIe2 receive 0 (+) PCIe2 receive 0 (-) PCIe2 transmit 1 (+) PCIe2 transmit 1 (-) PCIe2 receive 1 (+) PCIe2 receive 1 (-) PCIe2 wake up host DO PCIe2 reset DI PCIe2 clock request The following figure illustrates the PCIe interface connection. Figure 19: Reference Design of PCIe1 Interfaces SG865W_Series_Hardware_Design 66 / 117 PCIE_RX_PPCIE_RX_MPCIE_TX_PPCIE_TX_MPCIE1_RX1_PPCIE1_RX1_MPCIE1_TX1_PPCIE1_TX1_MC1PCIE_REFCLK_PPCIE_REFCLK_MPCIE_RX_PPCIE_RX_MPCIE_TX_PPCIE_TX_MPCIE1_REFCLK_PPCIE1_REFCLK_MPCIE1_RX0_PPCIE1_RX0_MPCIE1_TX0_PPCIE1_TX0_MPCIE1_CLKREQ_NPCIE1_RST_NPCIE1_WAKE_NPCIE_CLKREQ_NPCIE_RST_NPCIE_WAKE_NVREG_S4A_1V8R11kR210kR310kC7 C8ModuleC3 C4C2C5C6 Smart Module Series NOTE The reference design of PCIe2 interface is similar to PCIe1 interface. The following principles of PCIe interface design should be complied with to meet PCIe specifications. It is important to route the PCIe signal traces as differential pairs with ground surrounded. The differential impedance is 70100 and 85 is recommended. PCIe signals must be protected from noisy signals (clocks, DC-DC, RF and so forth). All other sensitive/high-speed signals and circuits must be routed far away from PCIe traces. The total trace length of each signal should be less than 300 mm. For each differential pair, intra-lane length match (P/M) should be less than 0.7 mm. Inter-lane length match, that is, the trace length matching between the reference clock, Tx, and Rx pairs is not required. The spacing between Tx and Rx, and the spacing between PCIe lanes and all other signals, should be larger than 4 times of the trace width. PCIe Tx AC coupling capacitors can be anywhere along the line, but better to be placed close to source or connector side to keep good SI of main route on PCB. Ensure not to stagger the capacitors. This can affect the differential integrity of the design and can create EMI. PCIe Tx AC coupling capacitors should be 220 nF for Gen 3, and 100 nF is recommended for Gen 2 application. In the case of trace serpentines, one trace of a differential pair must be routed to make up a length delta, then it must be routed at the source (breakout) this ensures that traces stay differential thereafter. To reduce the probability for layer-to-layer manufacturing variation, minimize layer transitions on the main route (in other words, apply layer transitions only at module breakouts and connectors to ensure minimum layer transitions on the main route). Table 22: PCIe Trace Length Inside the Module Signal Pin No. Length (mm) Length Difference (mm) PCIE1_REFCLK_P 267 PCIE1_REFCLK_M 273 PCIE1_TX0_P PCIE1_TX0_M PCIE1_RX0_P 281 280 275 20.16 20.42 9.26 9.33 22.55

-0.26

-0.07 0.3 SG865W_Series_Hardware_Design 67 / 117 Smart Module Series PCIE1_RX0_M PCIE1_TX1_P PCIE1_TX1_M PCIE1_RX1_P PCIE1_RX1_M PCIE2_REFCLK_P 274 269 268 264 263 395 PCIE2_REFCLK_M 396 PCIE2_TX0_P PCIE2_TX0_M PCIE2_RX0_P PCIE2_RX0_M PCIE2_TX1_P PCIE2_TX1_M PCIE2_RX1_P PCIE2_RX1_M 388 389 391 392 390 394 393 398 22.25 17.06 16.97 23.58 23.82 19.38 19.66 22.19 21.84 19.19 19.43 19.84 19.66 16.49 16.51 0.09

-0.24

-0.28 0.35

-0.24 0.18

-0.02 4.8. Vibrator Drive Interface The module supports eccentric rotating machines (ERM) and linear resonant actuators (LRA). The pin definition of vibrator drive interface is listed below. Table 23: Pin Definition of Vibrator Drive Interface Pin Name Pin No I/O Description Comment HAP_P HAP_M HAP_PWM_IN 38 44 50 AO Haptics driver output (+) AO Haptics driver output (-) DI Haptics PWM input If unused, connect it to GND. SG865W_Series_Hardware_Design 68 / 117 Smart Module Series VDD_HAP 27 PI Power supply for haptics HAP_BOOST_EN 33 DO Haptics boost enable The vibrator is driven by an exclusive circuit, and a reference design is shown below. Figure 20: Reference Design for Vibrator Connection 4.9. Wireless Charging Interface The module provides a wireless charging interface and the Rx integrated circuit of HL6111 is recommended. Table 24: Pin Definition of Wireless Charging Interface Pin Name Pin No. I/O Description WIRELESS_DC_IN_PSNS WIRELESS_DC_IN_EN WIRELESS_DC_IN_PON WIRELESS_RST 1 2 3 6 AI DC and wireless charging input for power sense DO DC and wireless charging output enable and disable AI DC and wireless charging power-on trigger DO Wireless charging reset. WIRELESS_THERM 34 AI Wireless charging temperature detect SG865W_Series_Hardware_Design 69 / 117 ModuleVIB+MotorVIB-33 pFC1HAP_PHAP_M33 pFC2VDD_HAPHAP_BOOST_ENBOOST ICC3VPH_PWRC4 Smart Module Series 4.10. RGB Interfaces The module provides 3 RGB interfaces, which are with maximal output current up to 12 mA. Table 25: Pin Definition of RGB Interfaces Pin Name Pin No. R_LED G_LED B_LED 219 213 207 I/O AO AO AO Description Current source for red LED Current source for green LED Current source for blue LED Figure 21: Reference Design for RGB Interfaces 4.11. Keypad Interfaces The module provides 3 keypad interfaces, which are used for turning on/off the module and adjusting the volume. Table 26: Pin Definition of Keypad Interfaces Pin Name Pin No. I/O Description Comment PWRKEY VOL_UP 461 473 DI DI Turn on/off the module PWRKEY pin is pulled to 1.8 V internally. Volume up SG865W_Series_Hardware_Design 70 / 117 ModuleD2R_LEDD1G_LEDD3B_LED Smart Module Series VOL_DOWN 479 DI Volume down 4.12. LCM Interfaces The module provides 2 LCM interfaces, which is MIPI_DSI standard compliant. The interface supports high-speed differential data transmission and supports double 2560 1600 @ 60 fps with 4-lane MIPI or 5040 2160 @ 60 fps with 8-lane MIPI. The pin definition of the LCM interface is shown below. Table 27: Pin Definition of LCM Interfaces Pin Name Pin No. LCD_BL_A LCD_BL_K1 LCD_BL_K2 LCD_BL_K3 LCD_BL_K4 CABC1 CABC2 LCD0_RST LCD0_TE LCD1_RST LCD1_TE DSI0_CLK_P DSI0_CLK_N DSI0_LN0_P DSI0_LN0_N DSI0_LN1_P DSI0_LN1_N 252 240 244 247 250 245 241 330 324 435 429 372 375 386 387 383 385 I/O PO AI AI AI AI DI DI DO DI DO DI AO AO AO AO AO AO Description Current output for LCD backlight Current sink for LCD backlight Current sink for LCD backlight Current sink for LCD backlight Current sink for LCD backlight Content adaptive brightness control 1 Content adaptive brightness control 2 LCD0 reset LCD0 tearing effect LCD1 reset LCD1 tearing effect LCD0 MIPI clock (+) LCD0 MIPI clock (-) LCD0 MIPI lane 0 data (+) LCD0 MIPI lane 0 data (-) LCD0 MIPI lane 1 data (+) LCD0 MIPI lane 1 data (-) SG865W_Series_Hardware_Design 71 / 117 Smart Module Series DSI0_LN2_P DSI0_LN2_N DSI0_LN3_P DSI0_LN3_N DSI1_CLK_P DSI1_CLK_N DSI1_LN0_P DSI1_LN0_N DSI1_LN1_P DSI1_LN1_N DSI1_LN2_P DSI1_LN2_N DSI1_LN3_P DSI1_LN3_N 380 382 376 379 363 368 378 384 374 381 369 377 364 373 AO AO AO AO AO AO AO AO AO AO AO AO AO AO LCD0 MIPI lane 2 data (+) LCD0 MIPI lane 2 data (-) LCD0 MIPI lane 3 data (+) LCD0 MIPI lane 3 data (-) LCD1 MIPI clock (+) LCD1 MIPI clock (-) LCD1 MIPI lane 0 data (+) LCD1 MIPI lane 0 data (-) LCD1 MIPI lane 1 data (+) LCD1 MIPI lane 1 data (-) LCD1 MIPI lane 2 data (+) LCD1 MIPI lane 2 data (-) LCD1 MIPI lane 3 data (+) LCD1 MIPI lane 3 data (-) The following figures show the reference design for LCM interfaces. SG865W_Series_Hardware_Design 72 / 117 Smart Module Series Figure 22: Reference Design for LCM0 Interface NOTE The reference design of LCM1 interface is similar to LCM0 interface. MIPI are high speed signal traces. It is recommended to add common-mode filters in series near the LCM connector to improve protection against electromagnetic radiation interference. It is recommended to read the LCM ID register through MIPI when compatible design with other displays is required. If several LCMs share the same IC, it is recommended that LCM module factory should burn an OTP register to distinguish different screens. You can also connect the LCD_ID pin of LCM to the ADC pin of the module, but please note that the output voltage of LCD_ID should not exceed the voltage range of the ADC pin. Backlight driving circuits should be designed for LCMs. The module provides backlight driving output which can be used to drive LCM backlight WLEDs directly. The features are listed below:

SG865W_Series_Hardware_Design 73 / 117 DSI0_CLK_PLEDANCLEDKLPTENC (SDA-TP) VIO18NC (VTP-TP) DSI0_LN3_PLCD0_TELCD0_RSTDSI0_LN3_NDSI0_LN2_PDSI0_CLK_NDSI0_LN2_NRESETLCD_IDNC (SCL-TP) NC (RST-TP) NC (EINT-TP) GNDVCC28GNDMIPI_TDP3MIPI_TDN3GNDMIPI_TDP2MIPI_TDN2GNDMIPI_TDP1MIPI_TDN1GNDLCD_BL_ALCD_BL_K11234567891012131415161718192021222324252627MIPI_TDP0MIPI_TDN0GNDMIPI_TCPMIPI_TCN2928303456345634563456DSI0_LN1_NDSI0_LN1_PDSI0_LN0_NDSI0_LN0_P1234561112121212100 nF4.7 F1FModuleLCMFL1FL2FL3FL4FL5EMI filterC3C2C1NCGNDGNDGNDGND31323334LCD_BL_K2PM_ADC1LDO14A_1V82.2 FLDO_ICVPH_PWRC5C4100KGPIO2.2 FR1LDO11C_3V1NM Smart Module Series Use the high voltage output (LCD_BL_A) for powering WLED strings, and the output OVP voltage is 32.5 V. Support 4 current sinks (LCD_BL_K1, LCD_BL_K2, LCD_BL_K3, LCD_BL_K4), with maximum sink current up to 30 mA for each string. Power four strings of WLEDs (about 6s4p WLEDs) with four current sink drivers. 4.13. Touch Panel Interfaces The module provides 2 I2C interfaces for connection with Touch Panel (TP), and provides the corresponding power supply and interrupt pins. The pin definition of touch panel interfaces is illustrated below. Table 28: Pin Definition of Touch Panel Interfaces Pin Name Pin No. I/O Description Comment TP0_RST TP0_INT TP0_I2C_SCL TP0_I2C_SDA TP1_RST TP1_INT TP1_I2C_SCL TP1_I2C_SDA 455 449 454 460 421 427 409 415 DO TP0 reset DI OD OD DO DI OD OD TP0 interrupt TP0 I2C clock TP0 I2C data TP1 reset TP1 interrupt TP1 I2C clock TP1 I2C data A reference design for TP interfaces is shown below. 1.8 V power domain. SG865W_Series_Hardware_Design 74 / 117 Smart Module Series Figure 23: Reference Design for TP0 Interface NOTE The reference design of TP1 interface is similar to TP0 interface. 4.14. Camera Interfaces Based on the standard MIPI CSI video input interface, the module supports 7 cameras, and the maximum pixel of the camera can be up to 64 MP. The video and photo quality are determined by various factors such as the camera sensor, camera lens quality, etc. CCI_I2C/I3C signals are controlled by Linux Kernel code and support connection with video output related devices. Table 29: Pin Definition of Camera Interfaces Pin Name Pin No. I/O Description Comment CSI0_CLK_P CSI0_CLK_N CSI0_LN0_P 255 258 266 CSI0_LN0_N 265 CSI0_LN1_P 261 CSI0_LN1_N 260 AI AI AI AI AI AI MIPI clock of camera 0 (+) MIPI clock of camera 0 (-) MIPI lane 0 data of camera 0 (+) MIPI lane 0 data of camera 0 (-) MIPI lane 1 data of camera 0 (+) MIPI lane 1 data of camera 0 (-) SG865W_Series_Hardware_Design 75 / 117 TP0_RSTTP0_I2C_SCLTP0_I2C_SDATP0_INT1234562.2K2.2K4.7 F100 nFModuleRESET SCLSDA INT GNDVDD TPR2R1C1C2D1D2D3D4D5LDO13A_3V0LDO1C_1V8GND Smart Module Series CSI0_LN2_P 257 CSI0_LN2_N 256 CSI0_LN3_P 254 CSI0_LN3_N CSI1_CLK_P CSI1_CLK_N CSI1_LN0_P 253 298 292 322 CSI1_LN0_N 321 CSI1_LN1_P 316 CSI1_LN1_N 315 CSI1_LN2_P 310 CSI1_LN2_N 309 CSI1_LN3_P 304 CSI1_LN3_N CSI2_CLK_P CSI2_CLK_N CSI2_LN0_P 303 285 291 290 CSI2_LN0_N 295 CSI2_LN1_P 284 CSI2_LN1_N 289 CSI2_LN2_P 278 CSI2_LN2_N 283 AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI MIPI lane 2 data of camera 0 (+) MIPI lane 2 data of camera 0 (-) MIPI lane 3 data of camera 0 (+) MIPI lane 3 data of camera 0 (-) MIPI clock of camera 1 (+) MIPI clock of camera 1 (-) MIPI lane 0 data of camera 1 (+) MIPI lane 0 data of camera 1 (-) MIPI lane 1 data of camera 1 (+) MIPI lane 1 data of camera 1 (-) MIPI lane 2 data of camera 1 (+) MIPI lane 2 data of camera 1 (-) MIPI lane 3 data of camera 1 (+) MIPI lane 3 data of camera 1 (-) MIPI clock of camera 2 (+) MIPI clock of camera 2 (-) MIPI lane 0 data of camera 2 (+) MIPI lane 0 data of camera 2 (-) MIPI lane 1 data of camera 2 (+) MIPI lane 1 data of camera 2 (-) MIPI lane 2 data of camera 2 (+) MIPI lane 2 data of camera 2 (-) SG865W_Series_Hardware_Design 76 / 117 Smart Module Series CSI2_LN3_P 272 CSI2_LN3_N CSI3_CLK_P CSI3_CLK_N CSI3_LN0_P 277 366 362 343 CSI3_LN0_N 338 CSI3_LN1_P 349 CSI3_LN1_N 344 CSI3_LN2_P 355 CSI3_LN2_N 350 CSI3_LN3_P 361 CSI3_LN3_N CSI4_CLK_P CSI4_CLK_N CSI4_LN0_P 356 302 307 326 CSI4_LN0_N 331 CSI4_LN1_P 320 CSI4_LN1_N 325 CSI4_LN2_P 314 CSI4_LN2_N 319 CSI4_LN3_P 308 CSI4_LN3_N 313 AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI MIPI lane 3 data of camera 2 (+) MIPI lane 3 data of camera 2 (-) MIPI clock of camera 3 (+) MIPI clock of camera 3 (-) MIPI lane 0 data of camera 3 (+) MIPI lane 0 data of camera 3 (-) MIPI lane 1 data of camera 3 (+) MIPI lane 1 data of camera 3 (-) MIPI lane 2 data of camera 3 (+) MIPI lane 2 data of camera 3 (-) MIPI lane 3 data of camera 3 (+) MIPI lane 3 data of camera 3 (-) MIPI clock of camera 4 (+) MIPI clock of camera 4 (-) MIPI lane 0 data of camera 4 (+) MIPI lane 0 data of camera 4 (-) MIPI lane 1 data of camera 4 (+) MIPI lane 1 data of camera 4 (-) MIPI lane 2 data of camera 4 (+) MIPI lane 2 data of camera 4 (-) MIPI lane 3 data of camera 4 (+) MIPI lane 3 data of camera 4 (-) SG865W_Series_Hardware_Design 77 / 117 Smart Module Series CSI5_CLK_P CSI5_CLK_N CS5_LN0_P 335 329 352 CSI5_LN0_N 351 CSI5_LN1_P 346 CSI5_LN1_N 345 CSI5_LN2_P 340 CSI5_LN2_N 339 CSI5_LN3_P 334 CSI5_LN3_N 333 AI AI AI AI AI AI AI AI AI AI MIPI clock of camera 5 (+) MIPI clock of camera 5 (-) MIPI lane 0 data of camera 5 (+) MIPI lane 0 data of camera 5 (-) MIPI lane 1 data of camera 5 (+) MIPI lane 1 data of camera 5 (-) MIPI lane 2 data of camera 5 (+) MIPI lane 2 data of camera 5 (-) MIPI lane 3 data of camera 5 (+) MIPI lane 3 data of camera 5 (-) CAM0_MCLK 118 DO Master clock of camera 0 CAM1_MCLK 112 DO Master clock of camera 1 CAM2_MCLK 107 DO Master clock of camera 2 CAM3_MCLK CAM4_MCLK 99 96 DO Master clock of camera 3 DO Master clock of camera 4 CAM5_MCLK 108 DO Master clock of camera 5 CAM6_MCLK 100 DO Master clock of camera 6 CAM0_RST 119 DO Reset of camera 0 CAM1_RST 114 DO Reset of camera 1 CAM2_RST 109 DO Reset of camera 2 CAM3_RST 103 DO Reset of camera 3 CAM4_RST 115 DO Reset of camera 4 CAM5_RST 110 DO Reset of camera 5 CAM6_RST 104 DO Reset of camera 6 CCI0_I2C_SDA 151 OD I2C data of CCI0 SG865W_Series_Hardware_Design 78 / 117 Smart Module Series CCI0_I2C_SCL 157 OD I2C clock of CCI0 CCI1_I2C_SDA 150 OD I2C data of CCI1 CCI1_I2C_SCL 156 OD I2C clock of CCI1 CCI2_I2C_SDA 162 OD I2C data of CCI2 CCI2_I2C_SCL 168 OD I2C clock of CCI2 CCI3_I2C_SDA 174 OD I2C data of CCI3 CCI3_I2C_SCL 180 OD I2C3clock of CCI3 CCI_I3C_SDA 462 OD I3C data of CCI CCI_I3C_SCL 456 OD I3C clock of CCI LDO1F_1V1 36 PO 1.1 V output LDO2F_1V2 48 PO 1.2 V output LDO3F_1V05 35 PO 1.05 V output LDO4F_1V2*

47 PO 1.2 V output LDO5F_2V85 60 PO 2.85 V output LDO6F_2V8 59 PO 2.8 V output Power supply for DVDD of camera. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for DVDD of camera. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for DVDD of camera. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for DVDD of camera. Add a 1.04.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for AVDD of camera. Add a 4.7 F bypass capacitor if used. If unused, keep this pin open. Power supply for AVDD of camera. Add a 4.7 F bypass capacitor if used. SG865W_Series_Hardware_Design 79 / 117 Smart Module Series LDO7F_1V8 71 PO 1.8 V output The following is a reference circuit design for camera applications. If unused, keep this pin open. Power supply for DOVDD of camera. Add a 4.7 F bypass capacitor if used. If unused, keep this pin open.

NOTE Figure 24: Reference Design for Camera0 Application The reference design of CSI1, CSI2, CSI3, CSI4 and CSI5 interfaces is similar to CSI0 interface. SG865W_Series_Hardware_Design 80 / 117 Camera connectorCAM0_PWDNCAM0_MCLKCCI0_I2C_SDACCI0_I2C_SCLCSI0_CLK_PCSI0_CLK_N2.2K2.2KCAM0_RSTEMIEMIEMIEMIEMIAVDDDVDDDOVDD1 FCSI0_LN0_PCSI0_LN0_NCSI0_LN1_PCSI0_LN1_NCSI0_LN2_PCSI0_LN2_NCSI0_LN3_PCSI0_LN3_NLDO5F_2V85CAM0_AF_VDDLDO1F_1V1LDO7F_1V8AFVDDModule1 F4.7 F4.7 FR1R2C1C2C3C4 Smart Module Series Figure 25: Reference Design of Camera Power Supply NOTE CAM0_AFVDD_EN pin can be multiplexed from UART17_CTS. 4.14.1. Design Considerations Special attention should be paid to the pin definition of LCM/camera connectors. Assure the module and the connectors are correctly connected. MIPI is high speed signal traces, supporting maximum data rate up to 2.5 Gbps. The differential impedance should be controlled to 85 . Additionally, it is recommended to route the trace on the inner layer of PCB, and do not cross it with other traces. For the same group of DSI or CSI signals, all the MIPI traces should keep the same length. To avoid crosstalk, spacing the lanes according to the following rules:

Intra-pair P to N: 1 trace width lane to lane: 1.5 trace width lanes to all other signals: 2.5 trace width a) b) c) It is recommended to select a low capacitance TVS for ESD protection and the recommended parasitic capacitance should be below 0.5 pF. Route MIPI traces according to the following rules:

a) The total trace length should be less than 150 mm with -6.5 dB total insertion loss and -3.5 dB cable insertion loss for 2.5 Gbps;

b) Control the differential impedance to 85 10 %;

c) Control intra-pair length matching (P/N) within 0.7 mm;

d) Control inter-lane length matching within 1.4 mm. SG865W_Series_Hardware_Design 81 / 117 CAM0_AF_VDD_2V8Module2.2 FLDO_ICVPH_PWRC1CAM0_AFVDD_ENR1100KC22.2 FLDO7C_2V85NM Smart Module Series Table 30: MIPI Trace Length Inside the Module Signal Pin No. Length (mm) Length Difference (mm) DSI0_CLK_P DSI0_CLK_N DSI0_LN0_P DSI0_LN0_N DSI0_LN1_P DSI0_LN1_N DSI0_LN2_P DSI0_LN2_N DSI0_LN3_P DSI0_LN3_N DSI1_CLK_P DSI1_CLK_N DSI1_LN0_P DSI1_LN0_N DSI1_LN1_P DSI1_LN1_N DSI1_LN2_P DSI1_LN2_N DSI1_LN3_P DSI1_LN3_N CSI0_CLK_P CSI0_CLK_N CSI0_LN0_P 372 375 386 387 383 385 380 382 376 379 363 368 378 384 374 381 369 377 364 373 255 258 266 22.56 22.41 22.80 23.04 22.85 22.54 22.40 22.57 22.89 22.85 25.24 25.16 25.78 25.48 25.69 25.53 24.99 25 25.06 24.81 19.59 19.27 19 0.15

-0.24 0.31

-0.17 0.04 0.08 0.3 0.16

-0.01 0.25 0.32 0.27 SG865W_Series_Hardware_Design 82 / 117 Smart Module Series CSI0_LN0_N CSI0_LN1_P CSI0_LN1_N CSI0_LN2_P CSI0_LN2_N CSI0_LN3_P CSI0_LN3_N CSI1_CLK_P CSI1_CLK_N CSI1_LN0_P CSI1_LN0_N CSI1_LN1_P CSI1_LN1_N CSI1_LN2_P CSI1_LN2_N CSI1_LN3_P CSI1_LN3_N CSI2_CLK_P CSI2_CLK_N CSI2_LN0_P CSI2_LN0_N CSI2_LN1_P CSI2_LN1_N CSI2_LN2_P CSI2_LN2_N 265 261 260 257 256 254 253 298 292 322 321 316 315 310 309 304 303 285 291 290 295 284 289 278 283 18.73 18.78 18.70 19.89 19.55 19.25 19.37 18.14 18.2 18.57 18.31 18.08 18.17 17.87 17.63 18.84 18.76 14.82 14.77 14.27 14.49 14.63 14.39 14.3 14.43 0.08 0.34

-0.12

-0.06 0.26

-0.09 0.24 0.08 0.05

-0.22 0.24

-0.13 SG865W_Series_Hardware_Design 83 / 117 Smart Module Series CSI2_LN3_P CSI2_LN3_N CSI3_CLK_P CSI3_CLK_N CSI3_LN0_P CSI3_LN0_N CSI3_LN1_P CSI3_LN1_N CSI3_LN2_P CSI3_LN2_N CSI3_LN3_P CSI3_LN3_N CSI4_CLK_P CSI4_CLK_N CSI4_LN0_P CSI4_LN0_N CSI4_LN1_P CSI4_LN1_N CSI4_LN2_P CSI4_LN2_N CSI4_LN3_P CSI4_LN3_N CSI5_CLK_P CSI5_CLK_N CS5_LN0_P 272 277 366 362 343 338 349 344 355 350 361 356 302 307 326 331 320 325 314 319 308 313 335 329 352 14.83 14.53 31.35 31.63 30.96 31.08 31.16 30.94 30.94 30.98 31.86 31.61 14.90 14.67 15.38 15.31 14.67 14.67 15.83 15.95 14.62 14.65 19.20 19.45 19.48 0.3

-0.28

-0.12 0.22

-0.04 0.25 0.23 0.07 0

-0.12

-0.03

-0.25 0.21 SG865W_Series_Hardware_Design 84 / 117 Smart Module Series CSI5_LN0_N CSI5_LN1_P CSI5_LN1_N CSI5_LN2_P CSI5_LN2_N CSI5_LN3_P CSI5_LN3_N 351 346 345 340 339 334 333 19.27 18.92 18.64 18.65 18.67 19.26 19.45 0.28

-0.02

-0.19 Table 31: CSI and DSI Data Rate and Max. Trace Length (D-PHY) Data Rate Total Insertion Loss (dB) Cable Insertion Loss (dB) Max. Trace Length (mm) 500 Mbps/lane

-2.1 750 Mbps/lane

-2.3 1.0 Gbps/lane

-2.3 1.5 Gbps/lane

-2.5 2.1 Gbps/lane

-2.5 2.5 Gbps/lane

-2.5

-0.5

-1

-0.7

-1.15

-0.75

-1.4

-0.9

-1.8

-1.3

-2.3

-2.1

-3.5

< 260

< 190

< 210

< 155

< 200

< 125

< 145

< 60

< 170

< 90

< 210

<150 SG865W_Series_Hardware_Design 85 / 117 Smart Module Series 4.14.2. Flashlight Interfaces The module supports 3 flash LED drivers, FLASH_LED1 and FLASH_LED2 are both with maximal output current up to 1.5 A per channel in flash mode and 300 mA in torch mode. FLASH_LED3 with maximal output current up to 0.75 A in flash mode and 300 mA in torch mode. Table 32: Pin Definition of Flashlight Interfaces Pin Name Pin No. I/O Description Comment FLASH_LED1 249 AO Flash/torch driver output 1 FLASH_LED2 242 AO Flash/torch driver output 2 FLASH_LED3 243 AO Flash/torch driver output 3 FLASH_STROBE 237 DI Flash LED strobe If unused, connect it to GND. A reference circuit design is shown below. Figure 26: Reference Design for Flashlight Interfaces 4.15. Sensor Interfaces The module supports communication with sensors via I2C/I3C/SPI interface, and it supports various sensors such as acceleration sensor, gyroscopic sensor, compass, light sensor, temperature sensor, etc. The SENSOR_I2C/I3C interface only supports sensors of the aDSP architecture. SG865W_Series_Hardware_Design 86 / 117 ModuleD2FLASH_LED1D1FLASH_LED2D3FLASH_LED3 Smart Module Series Table 33: Pin Definition of Sensor Interfaces Pin Name Pin No. I/O Description SENSOR_I2C_SDA SENSOR_I2C_SCL SENSOR_I3C_SDA SENSOR_I3C_SCL SENSOR_SPI_CLK SENSOR_SPI_CS SENSOR_SPI_MOSI SENSOR_SPI_MISO MAG_INT HALL_INT ALPS_INT IMU_INT1 IMU_INT2 97 98 72 83 89 95 78 84 163 169 175 141 145 4.16. Audio Interfaces OD I2C clock for external sensor OD I2C data for external sensor OD I3C data for external sensor OD I3C clock for external sensor DO SPI clock for external sensor DO SPI chip select for external sensor DO SPI master-out slave-in for external sensor DI DI DI DI DI DI SPI master-in slave-out for external sensor MAG interrupt HALL interrupt ALPS interrupt IMU interrupt 1 IMU interrupt 2 The module provides SoundWire and digital MIC interface. One SoundWire interface which dedicated to transmit data between the module and analog codec WCD938x. The other SoundWire interface which dedicated to transmit data between the module and audio amplifier WSA881x. Table 34: Pin Definition of Audio Interfaces Pin Name WSA1_EN WSA2_EN WSA_SWR_CLK Pin No. I/O Description 45 51 43 DO DO DO WSA enable 1 WSA enable 2 WSA SoundWire clock SG865W_Series_Hardware_Design 87 / 117 Smart Module Series 49 88 92 91 87 82 85 81 46 52 DIO WSA SoundWire data DO DO DO DO DO DI DI WCD reset WCD SoundWire transmit clock WCD SoundWire transmit data 0 WCD SoundWire transmit data 1 WCD SoundWire receive clock WCD SoundWire receive data 0 WCD SoundWire receive data 1 DO LPI digital MIC3 clock DI LPI digital MIC3 data WSA_SWR_DATA WCD_RST WCD_SWR_TX_CLK WCD_SWR_TX_DATA0 WCD_SWR_TX_DATA1 WCD_SWR_RX_CLK WCD_SWR_RX_DATA0 WCD_SWR_RX_DATA1 LPI_DMIC3_CLK LPI_DMIC3_DATA 4.17. I2S Interfaces The module provides three I2S interfaces which can support TDM function and also can be multiplexed to PCM. For more details about PCM interface, see document [2]. The following table shows the pin definition. Table 35: Pin Definition of I2S Interfaces Pin Name Pin No. LPI_MI2S1_SCLK LPI_MI2S1_WS LPI_MI2S1_DATA0 LPI_MI2S1_DATA1 MI2S0_MCLK MI2S0_SCLK MI2S0_WS MI2S0_DATA0 62 58 67 61 63 64 80 70 I/O DO DO DIO DIO DO DO DO Description LPI MI2S1 bit clock LPI MI2S1 word select LPI MI2S1 Data channel 0 LPI MI2S1 Data channel 1 MI2S0 master clock MI2S0 bit clock MI2S0 word select DIO MI2S0 data channel 0 SG865W_Series_Hardware_Design 88 / 117 Smart Module Series MI2S0_DATA1 MI2S2_SCLK MI2S2_WS MI2S2_DATA0 MI2S2_DATA1 75 73 68 69 74 DIO MI2S0 data channel 1 DO DO DIO DIO MI2S2 bit clock MI2S2 word select MI2S2 data channel 0 MI2S2 data channel 1 4.18. SPI Interfaces The module provides 5 SPI interfaces. These interfaces can only support the master mode. SPI interfaces can be used for fingerprint recognition. Table 36: Pin Definition of SPI Interfaces Pin Name SPI2_CLK SPI2_CS SPI2_MISO SPI2_MOSI SPI4_CLK SPI4_CS SPI4_MISO SPI4_MOSI FP_SPI14_CLK FP_SPI14_CS FP_SPI14_MISO FP_SPI14_MOSI NFC_SE_SPI8_CLK NFC_SE_SPI8_CS Pin No. I/O Description 204 198 205 199 187 181 192 186 342 353 347 348 183 177 DO SPI2 clock DO SPI2 chip select DI SPI2 master-in slave-out DO SPI2 master-out slave-in DO SPI4 clock DO SPI4 chip select DI SPI4 master-in slave-out DO SPI4 master-out slave-in DO FP SPI14 clock DO FP SPI14 chip select DI FP SPI14 master-in slave-out DO FP SPI14 master-out slave-in DO NFC SE SPI8 clock DO NFC SE SPI8 chip select SG865W_Series_Hardware_Design 89 / 117 Smart Module Series NFC_SE_SPI8_MISO NFC_SE_SPI8_MOSI SENSOR_SPI_CLK SENSOR_SPI_CS SENSOR_SPI_MOSI SENSOR_SPI_MISO 182 176 89 95 78 84 DI NFC SE SPI8 master-in slave-out DO NFC SE SPI8 master-out slave-in DO SPI clock for external sensor DO SPI chip select for external sensor DO SPI master-out slave-in for external sensor DI SPI master-in slave-out for external sensor 4.19. USB_BOOT USB_BOOT is an emergency download interface. Pull it up to VREG_S4A_1V8 when booting, the module can enter the emergency download mode. There is an emergency option when failures such as abnormal start-up or running occur. For the convenient firmware upgrade and debugging in the future, reserve this pin. The reference circuit design is shown below. Figure 27: Reference Design for USB_BOOT SG865W_Series_Hardware_Design 90 / 117 VREG_S4A_1V8S1 ModuleUSB_BOOTR110K Smart Module Series 5 RF Specifications 5.1. RF Antenna Interface This module provides 3 antennas, one of which is Wi-Fi/Bluetooth antenna (Wi-Fi and Bluetooth functions share the same antenna), one antenna is single Wi-Fi and one antenna is reserved for Bluetooth. The interface impedance is 50 . You can connect external antennas such as PCB antenna, sucker antenna and ceramic antenna to the module via these interfaces to achieve Wi-Fi and Bluetooth functions. 5.1.1. Antenna Interface and Frequency Bands Table 37: Pin Definition of Wi-Fi/Bluetooth Application Interfaces Pin Name Pin No. I/O Description Comment ANT_BT*

ANT_WIFI0 ANT_WIFI1 133 143 172 AIO Bluetooth antenna interface Reserved AIO Wi-Fi0/Bluetooth antenna interface AIO Wi-Fi1 antenna interface 5.1.2. Reference Design A reference circuit design for Wi-Fi/Bluetooth antenna interface is shown as below. To facilitate future debugging, it is recommended to add a type matching circuit in antenna circuit design. C1 and C2 are not mounted and a 0 resistor (R1) is mounted by default. SG865W_Series_Hardware_Design 91 / 114 Smart Module Series Figure 28: Reference Design for Wi-Fi/Bluetooth Antenna Interface NOTE The dedicated Bluetooth antenna circuit should be reserved for future debugging. 5.2. RF Performance Table 38: Pin Definition of Wi-Fi/Bluetooth Application Interfaces Pin Name Pin No. I/O Description Comment PA_MUTE 190 DI Wi-Fi xFEM control to disable Wi-Fi PA WLAN_TXEN 179 DO Wi-Fi xFEM control to enable Wi-Fi transmit LAA_RX 196 DI Wi-Fi xFEM control for LAA/n79 receiver LAA_TXEN 185 DO LAA_AS_EN 129 DI COEX_RXD 121 DI COEX_TXD 125 DO Wi-Fi xFEM control to enable LAA/n79 transmit Allow LAA/n79 to control Wi-Fi xFEM during Wi-Fi sleep mode 2.4 GHz WWAN & Wi-Fi/Bluetooth coexistence receive 2.4 GHz WWAN & Wi-Fi/Bluetooth coexistence transmit If unused, connect it to GND. If unused, connect it to GND with a 10 k resistor. If unused, connect it to GND If unused, connect it to GND. If unused, connect it to GND with a 10 k resistor. If unused, connect it to GND. If unused, connect it to GND with a 10 k resistor. SG865W_Series_Hardware_Design 92 / 114 ANT_WIFI0/ANT_WIFI1/ANT_BTR1 0RC1ModuleNMC2NMWi-Fi/Bluetooth antenna Smart Module Series Table 39: Wi-Fi/Bluetooth Frequency Type Wi-Fi BLE 5.1 Frequency 24022482 51705835 24022480 Unit MHz MHz 5.2.1. Wi-Fi Overview The module supports 2.4 GHz and 5 GHz double-band WLAN wireless communication based on IEEE 802.11a/b/g/n/ac/ax standard protocols. The maximum data rate is up to 1774.5 Mbps (2 2 + 2 2 11ax DBS). The following table lists the Wi-Fi transmitting and receiving performance of the module. Table 40: Wi-Fi Transmitting Performance Frequency Bands Standard Rate Output Power 802.11b 802.11b 802.11g 802.11g 1 Mbps 18 dBm 2.5 dB 11 Mbps 18 dBm 2.5 dB 6 Mbps 18 dBm 2.5 dB 54 Mbps 17 dBm 2.5 dB 802.11n HT20 MCS0 18 dBm 2.5 dB 2.4 GHz 802.11n HT20 MCS7 16 dBm 2.5 dB 802.11n HT40 MCS0 18 dBm 2.5 dB 802.11n HT40 MCS7 15dBm 2.5 dB 802.11ax HE20 MCS0 18 dBm 2.5 dB 802.11ax HE20 MCS11 12 dBm 2.5 dB 802.11ax HE40 MCS0 18dBm 2.5 dB 802.11ax HE40 MCS11 12 dBm 2.5 dB 5 GHz 802.11a 6 Mbps 18 dBm 2.5 dB SG865W_Series_Hardware_Design 93 / 114 Smart Module Series 802.11a 54 Mbps 15 dBm 2.5 dB 802.11n HT20 MCS0 18 dBm 2.5 dB 802.11n HT20 MCS7 15 dBm 2.5 dB 802.11n HT40 MCS0 18 dBm 2.5 dB 802.11n HT40 MCS7 15 dBm 2.5 dB 802.11ac VHT20 MCS0 18 dBm 2.5 dB 802.11ac VHT20 MCS8 14 dBm 2.5 dB 802.11ac VHT40 MCS0 18 dBm 2.5 dB 802.11ac VHT40 MCS9 14 dBm 2.5 dB 802.11ac VHT80 MCS0 18 dBm 2.5 dB 802.11ac VHT80 MCS9 14 dBm 2.5 dB 802.11ax HE20 MCS0 18 dBm 2.5 dB 802.11ax HE20 MCS11 12 dBm 2.5 dB 802.11ax HE40 MCS0 18 dBm 2.5 dB 802.11ax HE40 MCS11 12 dBm 2.5 dB 802.11ax HE80 MCS0 18 dBm 2.5 dB 802.11ax HE80 MCS11 12 dBm 2.5 dB Table 41: Wi-Fi Receiving Performance Frequency Bands Standard Rate Sensitivity 2.4 GHz 802.11b 802.11b 802.11g 802.11g 1 Mbps

-96 dBm 11 Mbps

-90 dBm 6 Mbps

-94 dBm 54 Mbps

-77 dBm 802.11n HT20 MCS0

-92 dBm SG865W_Series_Hardware_Design 94 / 114 Smart Module Series 802.11n HT20 802.11n HT40 802.11n HT40 MCS7 MCS0 MCS7 802.11ax HE20 MCS0

-73 dBm

-90 dBm

-69 dBm

-93 dBm 802.11ax HE20 MCS11

-64 dBm 802.11ax HE40 MCS0

-92 dBm 802.11ax HE40 MCS11

-62 dBm 6Mbps

-95 dBm 54Mbps

-78 dBm 802.11a 802.11a 802.11n HT20 802.11n HT20 802.11n HT40 802.11n HT40 MCS0 MCS7 MCS0 MCS7

-93 dBm

-74 dBm

-90 dBm

-71 dBm

-94 dBm

-72 dBm

-92 dBm

-68 dBm

-88 dBm

-64 dBm

-94 dBm 5 GHz 802.11ac VHT20 MCS0 802.11ac VHT20 MCS8 802.11ac VHT40 MCS0 802.11ac VHT40 MCS9 802.11ac VHT80 MCS0 802.11ac VHT80 MCS9 802.11ax HE20 MCS0 802.11ax HE20 MCS11

-62 dBm 802.11ax HE40 MCS0

-92 dBm 802.11ax HE40 MCS11

-63 dBm 802.11ax HE80 MCS0

-87 dBm 802.11ax HE80 MCS11

-58 dBm SG865W_Series_Hardware_Design 95 / 114 Smart Module Series

. NOTE The module conforms to the IEEE specifications. 5.2.2. Bluetooth Overview The module supports Bluetooth 5.1 (BR/EDR + BLE) specification, as well as GFSK, 8-DPSK,

/4-DQPSK modulation modes. The BR/EDR channel bandwidth is 1 MHz, and can accommodate 79 channels. The BLE channel bandwidth is 2 MHz, and can accommodate 40 channels. The following table lists the Bluetooth transmitting and receiving performance of the module. Table 42: Bluetooth Transmitting and Receiving Performance Transmitting Performance Conducted RF Output Power GFSK

/4-DQPSK 8-DQPSK BLE_1M BLE_2M 12 dBm 2.5 dB 12 dBm 2 dB 12 dBm 2 dB 11.5 dBm 2.5 dB 11.5 dBm 2.5 dB Receiving Performance Conducted RF Receiving Sensitivity GFSK

/4-DQPSK 8-DQPSK BLE_1M BLE_2M

-92 dBm

-90 dBm

-85 dBm

-98 dBm

-96 dBm SG865W_Series_Hardware_Design 96 / 114 Smart Module Series 5.3. Reference Design of RF Routing For users PCB, the characteristic impedance of all RF traces should be controlled to 50 . The impedance of the RF traces is usually determined by the trace width (W), the materials dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 29: Microstrip Design on a 2-layer PCB Figure 30: Coplanar Waveguide Design on a 2-layer PCB Figure 31: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) SG865W_Series_Hardware_Design 97 / 114 Smart Module Series Figure 32: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, follow the principles below in RF layout design :

Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 . The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right-angle traces should be changed to curved ones. There should be clearance under the signal pin of the antenna connector or solder joint. The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around RF traces and the reference ground could help to improve RF performance. The distance between the ground vias and RF traces should be no less than two times the width of RF signal traces (2 W). For more details about RF layout, see document [3]. 5.4. Antenna Design Requirements Table 43: Antenna Design Requirements Antenna Type Requirements Wi-Fi/Bluetooth Frequency Range:

2.4022.482 GHz 5.1705.835 GHz VSWR: 2 Gain: 1 dBi Max input power: 50 W SG865W_Series_Hardware_Design 98 / 114 Smart Module Series Input impedance: 50 Polarization type: Vertical Cable insertion loss: < 1 dB 5.5. RF Connector Recommendation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by Hirose. Figure 33: Dimensions of the Receptacle (Unit: mm) U.FL-LP series mated plugs listed in the following figure can be used to match the U.FL-R-SMT connector. SG865W_Series_Hardware_Design 99 / 114 Smart Module Series Figure 34: Specifications of Mated Plugs The following figure describes the space factor of mated connectors. Figure 35: Space Factor of Mated Connectors (Unit: mm) For more details, visit http://www.hirose.com. SG865W_Series_Hardware_Design 100 / 114 Smart Module Series 6 Electrical Characteristics &

Reliability 6.1. Absolute Maximum Ratings Absolute maximum ratings voltage on digital and analog pins of the module are listed in the following table. Table 44: Absolute Maximum Ratings Parameter VBAT USB_VBUS Voltage at Digital Pins Min.

-0.3

-0.3

-0.3 Max. 6 28 2.16 Unit V V V 6.2. Power Supply Ratings Table 45: Module Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT Power supply for the module The actual input voltages must stay between the minimum and maximum values. 3.55 3.8 4.4 V USB_VBUS Charging power input. Power supply for OTG device. USB/adaptor insertion detection

4.0 5.0 12.6 V SG865W_Series_Hardware_Design 101 / 114 Smart Module Series 6.3. Power Consumption Table 46: SG865W-WF Power Consumption Description Conditions OFF state Power off Typ. 160 Sleep state Enter standby after power on 7 Table 47: SG865W-AP Power Consumption Description Conditions OFF state Power off Typ. TBD Sleep state Enter standby after power on TBD Unit A mA Unit A mA 6.4. Digital I/O Characteristic Table 48: 1.8 V I/O Requirements Parameter Description VIH VIL VOH VOL Min. 1.17

-0.3 Input high voltage Input low voltage Output high voltage 1.45 Output low voltage 0 Max. Unit 2.1 0.63 1.8 0.45 V V V V SG865W_Series_Hardware_Design 102 / 114 Smart Module Series 6.5. ESD Protection Static electricity occurs naturally and it may damage the module. Therefore, applying proper ESD countermeasures and handling methods is imperative. For example, wear anti-static gloves during the development, production, assembly and testing of the module; add ESD protection components to the ESD sensitive interfaces and points in the product design. Table 49: Electrostatics Discharge Characteristics (25 C, 45 % Relative Humidity) Tested Interfaces Contact Discharge Air Discharge Unit VBAT, GND 8 Antenna Interfaces TBD Other Interfaces 0.5 12 TBD 1 kV kV kV 6.6. Operating and Storage Temperatures Table 50: Operating and Storage Temperatures Parameter Operating Temperature Range 3 Storage temperature range Min.

-35

-40 Typ.

+25

Max. Unit

+75

+90 C C 3 Within operating temperature range, the module is IEEE compliant. SG865W_Series_Hardware_Design 103 / 114 Smart Module Series 7 Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are 0.2 mm unless otherwise specified. 7.1. Mechanical Dimensions Pin 1 Figure 36: Module Top and Side Dimensions SG865W_Series_Hardware_Design 104 / 114 Smart Module Series Figure 37: Module Bottom Dimensions (Bottom View) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard. SG865W_Series_Hardware_Design 105 / 114 Smart Module Series 7.2. Recommended Footprint Figure 38: Recommended Footprint (Top View)

. NOTE Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience. SG865W_Series_Hardware_Design 106 / 114 Smart Module Series 7.3. Top and Bottom Views Figure 39: Top and Bottom Views of the Module NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. SG865W_Series_Hardware_Design 107 / 114 Smart Module Series 8 Storage, Manufacturing & Packaging 8.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: the temperature should be 23 5 C and the relative humidity should be 3560 %. 2. Shelf life (in a vacuum-sealed packaging): 12 months in Recommended Storage Condition. 3. Floor life: 168 hours 4 in a factory where the temperature is 23 5 C and relative humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the module should be stored in an environment where the relative humidity is less than 10 % (e.g., a dry cabinet). 4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under the following circumstances:

The module is not stored in Recommended Storage Condition;

Violation of the third requirement mentioned above;

Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;

Before module repairing. 5. If needed, the pre-baking should follow the requirements below:

The module should be baked for 8 hours at 120 5 C;

The module must be soldered to PCB within 24 hours after the baking, otherwise it should be put in a dry environment such as in a dry cabinet. 4 This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. It is recommended to start the solder reflow process within 24 hours after the package is removed if the temperature and moisture do not conform to, or are not sure to conform to IPC/JEDEC J-STD-033. And do not remove the packages of tremendous modules if they are not ready for soldering. SG865W_Series_Hardware_Design 108 / 114 Smart Module Series NOTE 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules. 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. Apply proper force on the squeegee to produce a clean stencil surface on a single pass. To guarantee module soldering quality, the thickness of stencil for the module is recommended to be 0.150.18 mm. For more details, see document [4]. The peak reflow temperature should be 235246 C, with 246 C as the absolute maximum reflow temperature. To avoid damage to the module caused by repeated heating, it is strongly recommended that the module should be mounted only after reflow soldering for the other side of PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 40: Recommended Reflow Soldering Thermal Profile SG865W_Series_Hardware_Design 109 / 114 Temp. (C)Reflow ZoneSoak Zone246200217235CDBA150100 Max slope: 13 C/s Cooling down slope: -1.5 to -3 C/s Max slope: 13 C/s Smart Module Series Table 51: Recommended Thermal Profile Parameters Factor Soak Zone Max slope Recommendation 13 C/s Soak time (between A and B: 150 C and 200 C) 70120 s Reflow Zone Max slope Reflow time (D: over 217 C) Max temperature Cooling down slope Reflow Cycle Max reflow cycle NOTE 13 C/s 4070 s 235 C to 246 C

-1.5 to -3 C/s 1 1. If a conformal coating is necessary for the module, do NOT use any coating material that may chemically react with the PCB or shielding cover, and prevent the coating material from flowing into the module. 2. Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the module. 3. Due to the complexity of the SMT process, please contact Quectel Technical Supports in advance for any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic soldering) that is not mentioned in document [4]. SG865W_Series_Hardware_Design 110 / 114 Smart Module Series 8.3. Packaging Specifications The module adopts carrier tape packaging and details are as follow:

8.3.1. Carrier Tape Dimension details are as follow:

Figure 41: Carrier Tape Dimension Drawing Table 52: Carrier Tape Dimension Table (Unit: mm) T A0 B0 K0 K1 F E 0.4 42.6 46.6 4.25 5.25 34.2 1.75 W 72 P 56 8.3.2. Plastic Reel Figure 42: Plastic Reel Dimension Drawing SG865W_Series_Hardware_Design 111 / 114 Smart Module Series Table 53: Plastic Reel Dimension Table (Unit: mm) D1 380 D2 180 W 72.5 8.3.3. Packaging Process Place the packaged plastic reel, humidity indicator card and desiccant bag into a vacuum bag, then vacuumize it. Place the module into the carrier tape and use the cover tape to cover them; then wind the heat-sealed carrier tape to the plastic reel and use the protective tape for protection. One plastic reel can load 200 modules. Place the vacuum-packed plastic reel into a pizza box. Put 4 pizza boxes into 1 carton and seal it. One carton can pack 800 modules. Figure 43: Packaging Process SG865W_Series_Hardware_Design 112 / 114 Smart Module Series 9 Appendix References Table 54: Related Documents Document Name

[1] Quectel_SA800U-WF_EVB_User_Guide

[2] Quectel_SG865W_Series_GPIO_Configuration

[3] Quectel_RF_Layout_Application_Note

[4] Quectel_Module_Secondary_SMT_Application_Note Table 55: Terms and Abbreviations Abbreviation Description ADC AI AP BLE bps Analog-to-Digital Converter Artificial Intelligence Application Processor Bluetooth Low Energy Bits Per Second BPSK Binary Phase Shift Keying DBS CCI CPU CSI CTS DAI Date Base System Camera Control Interface Central Processing Unit Camera Serial Interface Clear to Send Digital Audio Interface SG865W_Series_Hardware_Design 113 / 114 Smart Module Series DCE DDR DL DPU DSP DTE DTR EDR EFR EMI ERM ESD ESR FDD FEM FP FR Data Communications Equipment Double Data Rate Downlink Data Processing Unit Digital Signal Processor Data Terminal Equipment Data Terminal Ready Enhanced Data Rate Enhanced Full Rate Electromagnetic Interference Eccentric Rotating Machines Electrostatic Discharge Equivalent Series Resistance Frequency Division Duplex Front-End Module Fingerprint Full Rate GFSK Gauss Frequency Shift Keying GLONASS Global Navigation Satellite System (Russia) GMSK GPIO GPU IC I2C I2S Gaussian Minimum Shift Keying General Purpose Input/Output Graphic Processing Unit Integrated Circuit Inter-Integrated Circuit Inter-IC Sound SG865W_Series_Hardware_Design 114 / 114 Smart Module Series Institute of Electrical and Electronics Engineers Input/Output Image Signal Processing Nominal Current License Assisted Access Low Band Liquid Crystal Display Liquid Crystal Monitor Light Emitting Diode Low-dropout Regulator Land Grid Array Linear Resonant Actuators Low Power Island Media Access Control Multiple Input Multiple Output Mobile Industry Processor Interface Mobile Terminated Near Field Communication Negative Temperature Coefficient Over-the-air programming On-The-Go One Time Programmable Over Voltage Protection Power Amplifier Password Authentication Protocol IEEE I/O ISP Inom LAA LB LCD LCM LED LDO LGA LRA LPI MAC MIMO MIPI MT NFC NTC OTA OTG OTP OVP PA PAP SG865W_Series_Hardware_Design 115 / 114 Smart Module Series PC PCB PCIe PCM PDA PDU PHY PMIC POS PWM QAM QPSK RI RF RoHS RTC Rx SE SMD SMS SPI STA SWR TDM Personal Computer Printed Circuit Board Peripheral Component Interconnect Express Pulse Code Modulation Personal Digital Assistant Protocol Data Unit Physical Layer Power Management Integrated Circuit Point of Sale Pulse Width Modulation Quadrature Amplitude Modulation Quadrature Phase Shift Keying Ring Indicator Radio Frequency Restriction of Hazardous Substances Real Time Clock Receive Security Surface Mount Device Short Message Service Serial Peripheral Interface Station SoundWire Time-Division Multiplexing TDMA Time Division Multiple Access SG865W_Series_Hardware_Design 116 / 114 Smart Module Series Tx UART UFS UL UMTS URC USB VBAT Vmax Vnom Vmin VIHmax VIHmin VILmax VILmin VImax VImin VOHmax VOHmin VOLmax VOLmin VPU VSWR WCN WLAN Transmit Universal Asynchronous Receiver/Transmitter Universal Flash Storage Uplink Universal Mobile Telecommunications System Unsolicited Result Code Universal Serial Bus Voltage at Battery (Pin) Maximum Voltage Nominal Voltage Minimum Voltage Maximum High-level Input Voltage Minimum High-level Input Voltage Maximum Low-level Input Voltage Minimum Low-level Input Voltage Absolute Maximum Input Voltage Absolute Minimum Input Voltage Maximum High-level Output Voltage Minimum High-level Output Voltage Maximum Low-level Output Voltage Minimum Low-level Output Voltage Video Processing Unit Voltage Standing Wave Ratio Windows Connect Now Wireless Local Area Network SG865W_Series_Hardware_Design 117 / 114 Smart Module Series Wi-Fi WWAN Wireless Fidelity Wireless Wide Area Network SG865W_Series_Hardware_Design 118 / 114

Quecres ee is SOE WE: : Q1=AXXXX: ||

| PA SGB65WWFPA-F64-UNNNA |

|. FOG JD:XMR2022SG865WWF...|....-...-.-..-f2--.--5 J. 1G 1D (:10224A-20228G865W of} fe

PKG D: % CARTON NUM BS Quantity: % PACK QUANS

% PNY LotNo.: % O%

% DCS % YEARS Orderng Code:

TUT TTT SG865W W FPA~ F64~ UNNNA Model: SG 865 WF FM Ver.: % S%

% SW 2%

% PACKERS FM/ECLTEL. Packer:

RoHS SL3 WADE TN CHINA

Quectel Wireless Solutions Co., Ltd. Federal Communications Commission Authorization and Evaluation Division Confidentiality Request regarding application for certification of FCC ID: (XMR2022SG865WWF). Pursuant to Sections 0.457 and 0.459 of the Commissions Rules, we hereby request confidential treatment of information accompanying this application as outlined below:

Exhibit Type Schematic Diagram Block Diagram BOM Operational Description Tune-up Procedure The above materials contain trade secrets and proprietary information not customarily released to the public. The public disclosure of these materials may be harmful to the applicant and provide unjustified benefits to its competitors. The applicant understands that pursuant to Section 0.457 of the Rules, disclosure of this application and all accompanying documentation will not be made before the date of the Grant for this application. Pursuant to DA04-1705 June 15, 2004 of the Commissions public notice, we also request temporary confidential treatment of information accompanying this application as outlined below for a period of 180days:

Exhibit Type User Manual External Photos Internal Photos Test Setup Photos Sincerely, Signature:

Printed name: Jean Hu Rev 11/21/30

Modular Approval Request FCC ID: XMR2022SG865WWF IC: 10224A-2022SG865W Items to be covered 1. The modular shielding. 2. The modular transmitter must have its own RF 5. transmitter must have buffered modulation/data inputs (if such inputs are provided) to ensure that the module will comply with Part 15 requirements under conditions of excessive data rates or over-modulation. 3. The modular transmitter must have its own power supply regulation. 4. The modular transmitter must comply with the antenna requirements of Section 15.203 and 15.204(c). The antenna must either be permanently attached or employ a unique antenna coupler (at all connections between the module and the antenna, including the cable).. The modular transmitter must be tested in a stand-alone configuration, i.e., the module must not be inside another device during testing. This is intended to demonstrate that the module is capable of complying with Part 15 emission limits regardless of the device into which it is eventually installed. 6. The modular transmitter must be labeled with its own FCC ID number, and, if the FCC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. This exterior label can use wording such as the following: Contains Transmitter Module FCC ID:

XYZMODEL1 or Contains FCC ID: XYZMODEL1. Any similar wording that expresses the same meaning may be used. The Grantee may either provide such a label, an example of which must be included in the application for equipment authorization, or, must provide adequate instructions along with the module which explain this requirement. In the latter case, a copy of these instructions must be included in the application for equipment authorization. to 7. The modular transmitter must comply with any specific the rule or operating requirements applicable transmitter and the manufacturer must provide adequate instructions along with the module to explain any such requirements. A copy of these instructions must be included in the application for equipment authorization. For example, there are very strict operational and timing requirements that must be met before a transmitter is authorized for operation under Section 15.231. For instance, data transmission is for operation under Section prohibited, except 15.231(e), in which case there are separate field strength level and timing requirements. Compliance with these requirements must be assured. 8. The modular transmitter must comply with any applicable RF exposure requirements. For example, Answer from applicant Y The EUT provides the RF shielding. See EUT photo. Y The EUT has its buffered modulation. Y The EUT has its own power supply regulation, please see the Schematic Diagram. Y The EUT meets the FCC/ISED antenna requirements; unique antenna connector and photo of antenna are shown in the test report. Y The EUT was tested with a test board, Please see test report and setup photo Y The FCC ID is XMR2022SG865WWF The IC ID is 10224A-2022SG865W Y The EUT is compliant with all applicable FCC/ISED rules. Details instructions for maintaining compliance are give in the User Manual. Y The EUT complies with RF exposure requirement. FCC Rules in Sections 2.1091, 2.1093 and specific Sections of Part 15, including 15.319(i), 15.407(f), 15.253(f) and 15.255(g), require that Unlicensed PCS, UNII and millimeter wave devices perform routine environmental evaluation for RF Exposure to demonstrate compliance. In addition, spread spectrum transmitters operating under Section 15.247 are required to address RF Exposure compliance in accordance with Section 15.247(b)(4). Modular transmitters approved under other Sections of Part 15, when necessary, may also need to address certain RF Exposure concerns, typically by providing specific installation and operating instructions for users, installers and other interested parties to ensure compliance. Note: If compliance with one or more of the numbered requirements, listed above, cannot be demonstrated, it may be possible to obtain a Limited Modular Approval (LMA). Name and surname of applicant (or authorized representative): Jean Hu Date: 2022-06-14 Signature:

RF_160, Issue 04 Quectel Wireless Solutions Co., Ltd. Declaration of Authorization We Name: Quectel Wireless Solutions Co., Ltd. Address: Building 5, Shanghai Business Park PhaseIII (Area B),No.1016 Tianlin Road, Minhang District City: Shanghai Country: China Declare that:

Name Representative of agent: Well Wei Agent Company name: SGS-CSTC Standards Technical Services Co., Ltd. Suzhou Branch Address: South of No. 6 Plant, No. 1, Runsheng Road ,Suzhou Industrial Park, Suzhou Area, China

(Jiangsu) Pilot Free Trade Zone City: Suzhou Country: China is authorized to apply for Certification of the following product(s):

Product description: Smart Module Type designation: SG865W-WF Trademark: Quectel on our behalf. Date:

City:

Name:

Function:

Jean hu (2) Manager. Shanghai 2022/06/09 Signature:

Notes:

(1): Required for FCC application

(2): For FCC it must be the Grantee Code owner or the authorized agent.